1 /* Target-dependent code for Atmel AVR, for GDB.
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 /* Contributed by Theodore A. Roth, troth@openavr.org */
23 /* Portions of this file were taken from the original gdb-4.18 patch developed
24 by Denis Chertykov, denisc@overta.ru */
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
36 #include "arch-utils.h"
38 #include "gdb_string.h"
43 (AVR micros are pure Harvard Architecture processors.)
45 The AVR family of microcontrollers have three distinctly different memory
46 spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for
47 the most part to store program instructions. The sram is 8 bits wide and is
48 used for the stack and the heap. Some devices lack sram and some can have
49 an additional external sram added on as a peripheral.
51 The eeprom is 8 bits wide and is used to store data when the device is
52 powered down. Eeprom is not directly accessible, it can only be accessed
53 via io-registers using a special algorithm. Accessing eeprom via gdb's
54 remote serial protocol ('m' or 'M' packets) looks difficult to do and is
55 not included at this time.
57 [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or
58 written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to
59 work, the remote target must be able to handle eeprom accesses and perform
60 the address translation.]
62 All three memory spaces have physical addresses beginning at 0x0. In
63 addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit
64 bytes instead of the 16 bit wide words used by the real device for the
67 In order for remote targets to work correctly, extra bits must be added to
68 addresses before they are send to the target or received from the target
69 via the remote serial protocol. The extra bits are the MSBs and are used to
70 decode which memory space the address is referring to. */
73 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
76 #define EXTRACT_INSN(addr) extract_unsigned_integer(addr,2)
78 /* Constants: prefixed with AVR_ to avoid name space clashes */
92 AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/,
93 AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/,
95 AVR_PC_REG_INDEX = 35, /* index into array of registers */
97 AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */
99 /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */
102 /* Number of the last pushed register. r17 for current avr-gcc */
103 AVR_LAST_PUSHED_REGNUM = 17,
105 AVR_ARG1_REGNUM = 24, /* Single byte argument */
106 AVR_ARGN_REGNUM = 25, /* Multi byte argments */
108 AVR_RET1_REGNUM = 24, /* Single byte return value */
109 AVR_RETN_REGNUM = 25, /* Multi byte return value */
111 /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8
112 bits? Do these have to match the bfd vma values?. It sure would make
113 things easier in the future if they didn't need to match.
115 Note: I chose these values so as to be consistent with bfd vma
118 TRoth/2002-04-08: There is already a conflict with very large programs
119 in the mega128. The mega128 has 128K instruction bytes (64K words),
120 thus the Most Significant Bit is 0x10000 which gets masked off my
123 The problem manifests itself when trying to set a breakpoint in a
124 function which resides in the upper half of the instruction space and
125 thus requires a 17-bit address.
127 For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK
128 from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet,
129 but could be for some remote targets by just adding the correct offset
130 to the address and letting the remote target handle the low-level
131 details of actually accessing the eeprom. */
133 AVR_IMEM_START = 0x00000000, /* INSN memory */
134 AVR_SMEM_START = 0x00800000, /* SRAM memory */
136 /* No eeprom mask defined */
137 AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */
139 AVR_EMEM_START = 0x00810000, /* EEPROM memory */
140 AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */
146 NORMAL and CALL are the typical types (the -mcall-prologues gcc option
147 causes the generation of the CALL type prologues). */
150 AVR_PROLOGUE_NONE, /* No prologue */
152 AVR_PROLOGUE_CALL, /* -mcall-prologues */
154 AVR_PROLOGUE_INTR, /* interrupt handler */
155 AVR_PROLOGUE_SIG, /* signal handler */
158 /* Any function with a frame looks like this
159 ....... <-SP POINTS HERE
160 LOCALS1 <-FP POINTS HERE
169 struct avr_unwind_cache
171 /* The previous frame's inner most stack address. Used as this
172 frame ID's stack_addr. */
174 /* The frame's base, optionally used by the high-level debug info. */
178 /* Table indicating the location of each and every register. */
179 struct trad_frame_saved_reg *saved_regs;
184 /* Number of bytes stored to the stack by call instructions.
185 2 bytes for avr1-5, 3 bytes for avr6. */
189 /* Lookup the name of a register given it's number. */
192 avr_register_name (struct gdbarch *gdbarch, int regnum)
194 static const char * const register_names[] = {
195 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
196 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
197 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
198 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
203 if (regnum >= (sizeof (register_names) / sizeof (*register_names)))
205 return register_names[regnum];
208 /* Return the GDB type object for the "standard" data type
209 of data in register N. */
212 avr_register_type (struct gdbarch *gdbarch, int reg_nr)
214 if (reg_nr == AVR_PC_REGNUM)
215 return builtin_type (gdbarch)->builtin_uint32;
216 if (reg_nr == AVR_SP_REGNUM)
217 return builtin_type (gdbarch)->builtin_data_ptr;
219 return builtin_type (gdbarch)->builtin_uint8;
222 /* Instruction address checks and convertions. */
225 avr_make_iaddr (CORE_ADDR x)
227 return ((x) | AVR_IMEM_START);
230 /* FIXME: TRoth: Really need to use a larger mask for instructions. Some
231 devices are already up to 128KBytes of flash space.
233 TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */
236 avr_convert_iaddr_to_raw (CORE_ADDR x)
238 return ((x) & 0xffffffff);
241 /* SRAM address checks and convertions. */
244 avr_make_saddr (CORE_ADDR x)
246 return ((x) | AVR_SMEM_START);
250 avr_convert_saddr_to_raw (CORE_ADDR x)
252 return ((x) & 0xffffffff);
255 /* EEPROM address checks and convertions. I don't know if these will ever
256 actually be used, but I've added them just the same. TRoth */
258 /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large
259 programs in the mega128. */
261 /* static CORE_ADDR */
262 /* avr_make_eaddr (CORE_ADDR x) */
264 /* return ((x) | AVR_EMEM_START); */
268 /* avr_eaddr_p (CORE_ADDR x) */
270 /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */
273 /* static CORE_ADDR */
274 /* avr_convert_eaddr_to_raw (CORE_ADDR x) */
276 /* return ((x) & 0xffffffff); */
279 /* Convert from address to pointer and vice-versa. */
282 avr_address_to_pointer (struct gdbarch *gdbarch,
283 struct type *type, gdb_byte *buf, CORE_ADDR addr)
285 /* Is it a code address? */
286 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
287 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD)
289 store_unsigned_integer (buf, TYPE_LENGTH (type),
290 avr_convert_iaddr_to_raw (addr >> 1));
294 /* Strip off any upper segment bits. */
295 store_unsigned_integer (buf, TYPE_LENGTH (type),
296 avr_convert_saddr_to_raw (addr));
301 avr_pointer_to_address (struct gdbarch *gdbarch,
302 struct type *type, const gdb_byte *buf)
304 CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type));
306 /* Is it a code address? */
307 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
308 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
309 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type)))
310 return avr_make_iaddr (addr << 1);
312 return avr_make_saddr (addr);
316 avr_read_pc (struct regcache *regcache)
319 regcache_cooked_read_unsigned (regcache, AVR_PC_REGNUM, &pc);
320 return avr_make_iaddr (pc);
324 avr_write_pc (struct regcache *regcache, CORE_ADDR val)
326 regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM,
327 avr_convert_iaddr_to_raw (val));
330 /* Function: avr_scan_prologue
332 This function decodes an AVR function prologue to determine:
333 1) the size of the stack frame
334 2) which registers are saved on it
335 3) the offsets of saved regs
336 This information is stored in the avr_unwind_cache structure.
338 Some devices lack the sbiw instruction, so on those replace this:
344 A typical AVR function prologue with a frame pointer might look like this:
345 push rXX ; saved regs
351 sbiw r28,<LOCALS_SIZE>
352 in __tmp_reg__,__SREG__
355 out __SREG__,__tmp_reg__
358 A typical AVR function prologue without a frame pointer might look like
360 push rXX ; saved regs
363 A main function prologue looks like this:
364 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
365 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
369 A signal handler prologue looks like this:
372 in __tmp_reg__, __SREG__
375 push rXX ; save registers r18:r27, r30:r31
377 push r28 ; save frame pointer
381 sbiw r28, <LOCALS_SIZE>
385 A interrupt handler prologue looks like this:
389 in __tmp_reg__, __SREG__
392 push rXX ; save registers r18:r27, r30:r31
394 push r28 ; save frame pointer
398 sbiw r28, <LOCALS_SIZE>
404 A `-mcall-prologues' prologue looks like this (Note that the megas use a
405 jmp instead of a rjmp, thus the prologue is one word larger since jmp is a
406 32 bit insn and rjmp is a 16 bit insn):
407 ldi r26,lo8(<LOCALS_SIZE>)
408 ldi r27,hi8(<LOCALS_SIZE>)
409 ldi r30,pm_lo8(.L_foo_body)
410 ldi r31,pm_hi8(.L_foo_body)
411 rjmp __prologue_saves__+RRR
414 /* Not really part of a prologue, but still need to scan for it, is when a
415 function prologue moves values passed via registers as arguments to new
416 registers. In this case, all local variables live in registers, so there
417 may be some register saves. This is what it looks like:
421 There could be multiple movw's. If the target doesn't have a movw insn, it
422 will use two mov insns. This could be done after any of the above prologue
426 avr_scan_prologue (CORE_ADDR pc_beg, CORE_ADDR pc_end,
427 struct avr_unwind_cache *info)
432 struct minimal_symbol *msymbol;
433 unsigned char prologue[AVR_MAX_PROLOGUE_SIZE];
437 len = pc_end - pc_beg;
438 if (len > AVR_MAX_PROLOGUE_SIZE)
439 len = AVR_MAX_PROLOGUE_SIZE;
441 /* FIXME: TRoth/2003-06-11: This could be made more efficient by only
442 reading in the bytes of the prologue. The problem is that the figuring
443 out where the end of the prologue is is a bit difficult. The old code
444 tried to do that, but failed quite often. */
445 read_memory (pc_beg, prologue, len);
447 /* Scanning main()'s prologue
448 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
449 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
456 static const unsigned char img[] = {
457 0xde, 0xbf, /* out __SP_H__,r29 */
458 0xcd, 0xbf /* out __SP_L__,r28 */
461 insn = EXTRACT_INSN (&prologue[vpc]);
462 /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */
463 if ((insn & 0xf0f0) == 0xe0c0)
465 locals = (insn & 0xf) | ((insn & 0x0f00) >> 4);
466 insn = EXTRACT_INSN (&prologue[vpc + 2]);
467 /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */
468 if ((insn & 0xf0f0) == 0xe0d0)
470 locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
471 if (vpc + 4 + sizeof (img) < len
472 && memcmp (prologue + vpc + 4, img, sizeof (img)) == 0)
474 info->prologue_type = AVR_PROLOGUE_MAIN;
482 /* Scanning `-mcall-prologues' prologue
483 Classic prologue is 10 bytes, mega prologue is a 12 bytes long */
485 while (1) /* Using a while to avoid many goto's */
492 /* At least the fifth instruction must have been executed to
493 modify frame shape. */
497 insn = EXTRACT_INSN (&prologue[vpc]);
498 /* ldi r26,<LOCALS_SIZE> */
499 if ((insn & 0xf0f0) != 0xe0a0)
501 loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4);
504 insn = EXTRACT_INSN (&prologue[vpc + 2]);
505 /* ldi r27,<LOCALS_SIZE> / 256 */
506 if ((insn & 0xf0f0) != 0xe0b0)
508 loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
511 insn = EXTRACT_INSN (&prologue[vpc + 4]);
512 /* ldi r30,pm_lo8(.L_foo_body) */
513 if ((insn & 0xf0f0) != 0xe0e0)
515 body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4);
518 insn = EXTRACT_INSN (&prologue[vpc + 6]);
519 /* ldi r31,pm_hi8(.L_foo_body) */
520 if ((insn & 0xf0f0) != 0xe0f0)
522 body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
525 msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL);
529 insn = EXTRACT_INSN (&prologue[vpc + 8]);
530 /* rjmp __prologue_saves__+RRR */
531 if ((insn & 0xf000) == 0xc000)
533 /* Extract PC relative offset from RJMP */
534 i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0);
535 /* Convert offset to byte addressable mode */
537 /* Destination address */
540 if (body_addr != (pc_beg + 10)/2)
545 else if ((insn & 0xfe0e) == 0x940c)
547 /* Extract absolute PC address from JMP */
548 i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16)
549 | (EXTRACT_INSN (&prologue[vpc + 10]) & 0xffff));
550 /* Convert address to byte addressable mode */
553 if (body_addr != (pc_beg + 12)/2)
561 /* Resolve offset (in words) from __prologue_saves__ symbol.
562 Which is a pushes count in `-mcall-prologues' mode */
563 num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2;
565 if (num_pushes > AVR_MAX_PUSHES)
567 fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"),
576 info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes;
578 info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1;
581 for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2);
582 from <= AVR_LAST_PUSHED_REGNUM; ++from)
583 info->saved_regs [from].addr = ++i;
585 info->size = loc_size + num_pushes;
586 info->prologue_type = AVR_PROLOGUE_CALL;
588 return pc_beg + pc_offset;
591 /* Scan for the beginning of the prologue for an interrupt or signal
592 function. Note that we have to set the prologue type here since the
593 third stage of the prologue may not be present (e.g. no saved registered
594 or changing of the SP register). */
598 static const unsigned char img[] = {
599 0x78, 0x94, /* sei */
600 0x1f, 0x92, /* push r1 */
601 0x0f, 0x92, /* push r0 */
602 0x0f, 0xb6, /* in r0,0x3f SREG */
603 0x0f, 0x92, /* push r0 */
604 0x11, 0x24 /* clr r1 */
606 if (len >= sizeof (img)
607 && memcmp (prologue, img, sizeof (img)) == 0)
609 info->prologue_type = AVR_PROLOGUE_INTR;
611 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
612 info->saved_regs[0].addr = 2;
613 info->saved_regs[1].addr = 1;
616 else if (len >= sizeof (img) - 2
617 && memcmp (img + 2, prologue, sizeof (img) - 2) == 0)
619 info->prologue_type = AVR_PROLOGUE_SIG;
620 vpc += sizeof (img) - 2;
621 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
622 info->saved_regs[0].addr = 2;
623 info->saved_regs[1].addr = 1;
628 /* First stage of the prologue scanning.
629 Scan pushes (saved registers) */
631 for (; vpc < len; vpc += 2)
633 insn = EXTRACT_INSN (&prologue[vpc]);
634 if ((insn & 0xfe0f) == 0x920f) /* push rXX */
636 /* Bits 4-9 contain a mask for registers R0-R32. */
637 int regno = (insn & 0x1f0) >> 4;
639 info->saved_regs[regno].addr = info->size;
646 if (vpc >= AVR_MAX_PROLOGUE_SIZE)
647 fprintf_unfiltered (gdb_stderr,
648 _("Hit end of prologue while scanning pushes\n"));
650 /* Second stage of the prologue scanning.
655 if (scan_stage == 1 && vpc < len)
657 static const unsigned char img[] = {
658 0xcd, 0xb7, /* in r28,__SP_L__ */
659 0xde, 0xb7 /* in r29,__SP_H__ */
661 unsigned short insn1;
663 if (vpc + sizeof (img) < len
664 && memcmp (prologue + vpc, img, sizeof (img)) == 0)
671 /* Third stage of the prologue scanning. (Really two stages)
673 sbiw r28,XX or subi r28,lo8(XX)
675 in __tmp_reg__,__SREG__
678 out __SREG__,__tmp_reg__
681 if (scan_stage == 2 && vpc < len)
684 static const unsigned char img[] = {
685 0x0f, 0xb6, /* in r0,0x3f */
686 0xf8, 0x94, /* cli */
687 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
688 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */
689 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
691 static const unsigned char img_sig[] = {
692 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
693 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
695 static const unsigned char img_int[] = {
696 0xf8, 0x94, /* cli */
697 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
698 0x78, 0x94, /* sei */
699 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
702 insn = EXTRACT_INSN (&prologue[vpc]);
704 if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */
705 locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2);
706 else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */
708 locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4);
709 insn = EXTRACT_INSN (&prologue[vpc]);
711 locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4) << 8);
716 /* Scan the last part of the prologue. May not be present for interrupt
717 or signal handler functions, which is why we set the prologue type
718 when we saw the beginning of the prologue previously. */
720 if (vpc + sizeof (img_sig) < len
721 && memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0)
723 vpc += sizeof (img_sig);
725 else if (vpc + sizeof (img_int) < len
726 && memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0)
728 vpc += sizeof (img_int);
730 if (vpc + sizeof (img) < len
731 && memcmp (prologue + vpc, img, sizeof (img)) == 0)
733 info->prologue_type = AVR_PROLOGUE_NORMAL;
737 info->size += locals_size;
742 /* If we got this far, we could not scan the prologue, so just return the pc
743 of the frame plus an adjustment for argument move insns. */
745 for (; vpc < len; vpc += 2)
747 insn = EXTRACT_INSN (&prologue[vpc]);
748 if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */
750 else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */
760 avr_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
762 CORE_ADDR func_addr, func_end;
763 CORE_ADDR prologue_end = pc;
765 /* See what the symbol table says */
767 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
769 struct symtab_and_line sal;
770 struct avr_unwind_cache info = {0};
771 struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS];
773 info.saved_regs = saved_regs;
775 /* Need to run the prologue scanner to figure out if the function has a
776 prologue and possibly skip over moving arguments passed via registers
777 to other registers. */
779 prologue_end = avr_scan_prologue (func_addr, func_end, &info);
781 if (info.prologue_type == AVR_PROLOGUE_NONE)
785 sal = find_pc_line (func_addr, 0);
787 if (sal.line != 0 && sal.end < func_end)
792 /* Either we didn't find the start of this function (nothing we can do),
793 or there's no line info, or the line after the prologue is after
794 the end of the function (there probably isn't a prologue). */
799 /* Not all avr devices support the BREAK insn. Those that don't should treat
800 it as a NOP. Thus, it should be ok. Since the avr is currently a remote
801 only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */
803 static const unsigned char *
804 avr_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR * pcptr, int *lenptr)
806 static const unsigned char avr_break_insn [] = { 0x98, 0x95 };
807 *lenptr = sizeof (avr_break_insn);
808 return avr_break_insn;
811 /* Given a return value in `regcache' with a type `type',
812 extract and copy its value into `valbuf'.
814 Return values are always passed via registers r25:r24:... */
817 avr_extract_return_value (struct type *type, struct regcache *regcache,
823 if (TYPE_LENGTH (type) == 1)
825 regcache_cooked_read_unsigned (regcache, 24, &c);
826 store_unsigned_integer (valbuf, 1, c);
831 /* The MSB of the return value is always in r25, calculate which
832 register holds the LSB. */
833 int lsb_reg = 25 - TYPE_LENGTH (type) + 1;
835 for (i=0; i< TYPE_LENGTH (type); i++)
837 regcache_cooked_read (regcache, lsb_reg + i,
838 (bfd_byte *) valbuf + i);
843 /* Determine, for architecture GDBARCH, how a return value of TYPE
844 should be returned. If it is supposed to be returned in registers,
845 and READBUF is non-zero, read the appropriate value from REGCACHE,
846 and copy it into READBUF. If WRITEBUF is non-zero, write the value
847 from WRITEBUF into REGCACHE. */
849 static enum return_value_convention
850 avr_return_value (struct gdbarch *gdbarch, struct type *func_type,
851 struct type *valtype, struct regcache *regcache,
852 gdb_byte *readbuf, const gdb_byte *writebuf)
854 int struct_return = ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
855 || TYPE_CODE (valtype) == TYPE_CODE_UNION
856 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
857 && !(TYPE_LENGTH (valtype) == 1
858 || TYPE_LENGTH (valtype) == 2
859 || TYPE_LENGTH (valtype) == 4
860 || TYPE_LENGTH (valtype) == 8));
862 if (writebuf != NULL)
864 gdb_assert (!struct_return);
865 error (_("Cannot store return value."));
870 gdb_assert (!struct_return);
871 avr_extract_return_value (valtype, regcache, readbuf);
875 return RETURN_VALUE_STRUCT_CONVENTION;
877 return RETURN_VALUE_REGISTER_CONVENTION;
881 /* Put here the code to store, into fi->saved_regs, the addresses of
882 the saved registers of frame described by FRAME_INFO. This
883 includes special registers such as pc and fp saved in special ways
884 in the stack frame. sp is even more special: the address we return
885 for it IS the sp for the next frame. */
887 static struct avr_unwind_cache *
888 avr_frame_unwind_cache (struct frame_info *this_frame,
889 void **this_prologue_cache)
891 CORE_ADDR start_pc, current_pc;
894 struct avr_unwind_cache *info;
895 struct gdbarch *gdbarch;
896 struct gdbarch_tdep *tdep;
899 if (*this_prologue_cache)
900 return *this_prologue_cache;
902 info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache);
903 *this_prologue_cache = info;
904 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
907 info->prologue_type = AVR_PROLOGUE_NONE;
909 start_pc = get_frame_func (this_frame);
910 current_pc = get_frame_pc (this_frame);
911 if ((start_pc > 0) && (start_pc <= current_pc))
912 avr_scan_prologue (start_pc, current_pc, info);
914 if ((info->prologue_type != AVR_PROLOGUE_NONE)
915 && (info->prologue_type != AVR_PROLOGUE_MAIN))
917 ULONGEST high_base; /* High byte of FP */
919 /* The SP was moved to the FP. This indicates that a new frame
920 was created. Get THIS frame's FP value by unwinding it from
922 this_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM);
923 high_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM + 1);
924 this_base += (high_base << 8);
926 /* The FP points at the last saved register. Adjust the FP back
927 to before the first saved register giving the SP. */
928 prev_sp = this_base + info->size;
932 /* Assume that the FP is this frame's SP but with that pushed
933 stack space added back. */
934 this_base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
935 prev_sp = this_base + info->size;
938 /* Add 1 here to adjust for the post-decrement nature of the push
940 info->prev_sp = avr_make_saddr (prev_sp + 1);
941 info->base = avr_make_saddr (this_base);
943 gdbarch = get_frame_arch (this_frame);
945 /* Adjust all the saved registers so that they contain addresses and not
947 for (i = 0; i < gdbarch_num_regs (gdbarch) - 1; i++)
948 if (info->saved_regs[i].addr > 0)
949 info->saved_regs[i].addr = info->prev_sp - info->saved_regs[i].addr;
951 /* Except for the main and startup code, the return PC is always saved on
952 the stack and is at the base of the frame. */
954 if (info->prologue_type != AVR_PROLOGUE_MAIN)
955 info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp;
957 /* The previous frame's SP needed to be computed. Save the computed
959 tdep = gdbarch_tdep (gdbarch);
960 trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM,
961 info->prev_sp - 1 + tdep->call_length);
967 avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
971 pc = frame_unwind_register_unsigned (next_frame, AVR_PC_REGNUM);
973 return avr_make_iaddr (pc);
977 avr_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
981 sp = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM);
983 return avr_make_saddr (sp);
986 /* Given a GDB frame, determine the address of the calling function's
987 frame. This will be used to create a new GDB frame struct. */
990 avr_frame_this_id (struct frame_info *this_frame,
991 void **this_prologue_cache,
992 struct frame_id *this_id)
994 struct avr_unwind_cache *info
995 = avr_frame_unwind_cache (this_frame, this_prologue_cache);
1000 /* The FUNC is easy. */
1001 func = get_frame_func (this_frame);
1003 /* Hopefully the prologue analysis either correctly determined the
1004 frame's base (which is the SP from the previous frame), or set
1005 that base to "NULL". */
1006 base = info->prev_sp;
1010 id = frame_id_build (base, func);
1014 static struct value *
1015 avr_frame_prev_register (struct frame_info *this_frame,
1016 void **this_prologue_cache, int regnum)
1018 struct avr_unwind_cache *info
1019 = avr_frame_unwind_cache (this_frame, this_prologue_cache);
1021 if (regnum == AVR_PC_REGNUM)
1023 if (trad_frame_addr_p (info->saved_regs, regnum))
1025 /* Reading the return PC from the PC register is slightly
1026 abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes,
1027 but in reality, only two bytes (3 in upcoming mega256) are
1028 stored on the stack.
1030 Also, note that the value on the stack is an addr to a word
1031 not a byte, so we will need to multiply it by two at some
1034 And to confuse matters even more, the return address stored
1035 on the stack is in big endian byte order, even though most
1036 everything else about the avr is little endian. Ick! */
1039 unsigned char buf[3];
1040 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1041 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1043 read_memory (info->saved_regs[regnum].addr, buf, tdep->call_length);
1045 /* Extract the PC read from memory as a big-endian. */
1047 for (i = 0; i < tdep->call_length; i++)
1048 pc = (pc << 8) | buf[i];
1050 return frame_unwind_got_constant (this_frame, regnum, pc << 1);
1053 return frame_unwind_got_optimized (this_frame, regnum);
1056 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1059 static const struct frame_unwind avr_frame_unwind = {
1062 avr_frame_prev_register,
1064 default_frame_sniffer
1068 avr_frame_base_address (struct frame_info *this_frame, void **this_cache)
1070 struct avr_unwind_cache *info
1071 = avr_frame_unwind_cache (this_frame, this_cache);
1076 static const struct frame_base avr_frame_base = {
1078 avr_frame_base_address,
1079 avr_frame_base_address,
1080 avr_frame_base_address
1083 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
1084 frame. The frame ID's base needs to match the TOS value saved by
1085 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
1087 static struct frame_id
1088 avr_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1092 base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
1093 return frame_id_build (avr_make_saddr (base), get_frame_pc (this_frame));
1096 /* When arguments must be pushed onto the stack, they go on in reverse
1097 order. The below implements a FILO (stack) to do this. */
1102 struct stack_item *prev;
1106 static struct stack_item *
1107 push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len)
1109 struct stack_item *si;
1110 si = xmalloc (sizeof (struct stack_item));
1111 si->data = xmalloc (len);
1114 memcpy (si->data, contents, len);
1118 static struct stack_item *pop_stack_item (struct stack_item *si);
1119 static struct stack_item *
1120 pop_stack_item (struct stack_item *si)
1122 struct stack_item *dead = si;
1129 /* Setup the function arguments for calling a function in the inferior.
1131 On the AVR architecture, there are 18 registers (R25 to R8) which are
1132 dedicated for passing function arguments. Up to the first 18 arguments
1133 (depending on size) may go into these registers. The rest go on the stack.
1135 All arguments are aligned to start in even-numbered registers (odd-sized
1136 arguments, including char, have one free register above them). For example,
1137 an int in arg1 and a char in arg2 would be passed as such:
1142 Arguments that are larger than 2 bytes will be split between two or more
1143 registers as available, but will NOT be split between a register and the
1144 stack. Arguments that go onto the stack are pushed last arg first (this is
1145 similar to the d10v). */
1147 /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be
1150 An exceptional case exists for struct arguments (and possibly other
1151 aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but
1152 not a multiple of WORDSIZE bytes. In this case the argument is never split
1153 between the registers and the stack, but instead is copied in its entirety
1154 onto the stack, AND also copied into as many registers as there is room
1155 for. In other words, space in registers permitting, two copies of the same
1156 argument are passed in. As far as I can tell, only the one on the stack is
1157 used, although that may be a function of the level of compiler
1158 optimization. I suspect this is a compiler bug. Arguments of these odd
1159 sizes are left-justified within the word (as opposed to arguments smaller
1160 than WORDSIZE bytes, which are right-justified).
1162 If the function is to return an aggregate type such as a struct, the caller
1163 must allocate space into which the callee will copy the return value. In
1164 this case, a pointer to the return value location is passed into the callee
1165 in register R0, which displaces one of the other arguments passed in via
1166 registers R0 to R2. */
1169 avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1170 struct regcache *regcache, CORE_ADDR bp_addr,
1171 int nargs, struct value **args, CORE_ADDR sp,
1172 int struct_return, CORE_ADDR struct_addr)
1175 unsigned char buf[2];
1176 CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr);
1177 int regnum = AVR_ARGN_REGNUM;
1178 struct stack_item *si = NULL;
1181 /* FIXME: TRoth/2003-06-18: Not sure what to do when returning a struct. */
1184 fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr);
1185 regcache_cooked_write_unsigned (regcache, argreg--, struct_addr & 0xff);
1186 regcache_cooked_write_unsigned (regcache, argreg--, (struct_addr >>8) & 0xff);
1190 for (i = 0; i < nargs; i++)
1194 struct value *arg = args[i];
1195 struct type *type = check_typedef (value_type (arg));
1196 const bfd_byte *contents = value_contents (arg);
1197 int len = TYPE_LENGTH (type);
1199 /* Calculate the potential last register needed. */
1200 last_regnum = regnum - (len + (len & 1));
1202 /* If there are registers available, use them. Once we start putting
1203 stuff on the stack, all subsequent args go on stack. */
1204 if ((si == NULL) && (last_regnum >= 8))
1208 /* Skip a register for odd length args. */
1212 val = extract_unsigned_integer (contents, len);
1213 for (j=0; j<len; j++)
1215 regcache_cooked_write_unsigned (regcache, regnum--,
1216 val >> (8*(len-j-1)));
1219 /* No registers available, push the args onto the stack. */
1222 /* From here on, we don't care about regnum. */
1223 si = push_stack_item (si, contents, len);
1227 /* Push args onto the stack. */
1231 /* Add 1 to sp here to account for post decr nature of pushes. */
1232 write_memory (sp + 1, si->data, si->len);
1233 si = pop_stack_item (si);
1236 /* Set the return address. For the avr, the return address is the BP_ADDR.
1237 Need to push the return address onto the stack noting that it needs to be
1238 in big-endian order on the stack. */
1239 buf[0] = (return_pc >> 8) & 0xff;
1240 buf[1] = return_pc & 0xff;
1243 write_memory (sp + 1, buf, 2); /* Add one since pushes are post decr ops. */
1245 /* Finally, update the SP register. */
1246 regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM,
1247 avr_convert_saddr_to_raw (sp));
1252 /* Initialize the gdbarch structure for the AVR's. */
1254 static struct gdbarch *
1255 avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1257 struct gdbarch *gdbarch;
1258 struct gdbarch_tdep *tdep;
1259 struct gdbarch_list *best_arch;
1262 /* Avr-6 call instructions save 3 bytes. */
1263 switch (info.bfd_arch_info->mach)
1278 /* If there is already a candidate, use it. */
1279 for (best_arch = gdbarch_list_lookup_by_info (arches, &info);
1281 best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info))
1283 if (gdbarch_tdep (best_arch->gdbarch)->call_length == call_length)
1284 return best_arch->gdbarch;
1287 /* None found, create a new architecture from the information provided. */
1288 tdep = XMALLOC (struct gdbarch_tdep);
1289 gdbarch = gdbarch_alloc (&info, tdep);
1291 tdep->call_length = call_length;
1293 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1294 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1295 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1296 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1297 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1298 set_gdbarch_addr_bit (gdbarch, 32);
1300 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1301 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1302 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1304 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1305 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1306 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
1308 set_gdbarch_read_pc (gdbarch, avr_read_pc);
1309 set_gdbarch_write_pc (gdbarch, avr_write_pc);
1311 set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS);
1313 set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM);
1314 set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM);
1316 set_gdbarch_register_name (gdbarch, avr_register_name);
1317 set_gdbarch_register_type (gdbarch, avr_register_type);
1319 set_gdbarch_return_value (gdbarch, avr_return_value);
1320 set_gdbarch_print_insn (gdbarch, print_insn_avr);
1322 set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call);
1324 set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer);
1325 set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address);
1327 set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue);
1328 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1330 set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc);
1332 frame_unwind_append_unwinder (gdbarch, &avr_frame_unwind);
1333 frame_base_set_default (gdbarch, &avr_frame_base);
1335 set_gdbarch_dummy_id (gdbarch, avr_dummy_id);
1337 set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc);
1338 set_gdbarch_unwind_sp (gdbarch, avr_unwind_sp);
1343 /* Send a query request to the avr remote target asking for values of the io
1344 registers. If args parameter is not NULL, then the user has requested info
1345 on a specific io register [This still needs implemented and is ignored for
1346 now]. The query string should be one of these forms:
1348 "Ravr.io_reg" -> reply is "NN" number of io registers
1350 "Ravr.io_reg:addr,len" where addr is first register and len is number of
1351 registers to be read. The reply should be "<NAME>,VV;" for each io register
1352 where, <NAME> is a string, and VV is the hex value of the register.
1354 All io registers are 8-bit. */
1357 avr_io_reg_read_command (char *args, int from_tty)
1363 unsigned int nreg = 0;
1367 /* Find out how many io registers the target has. */
1368 bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR,
1369 "avr.io_reg", &buf);
1373 fprintf_unfiltered (gdb_stderr,
1374 _("ERR: info io_registers NOT supported "
1375 "by current target\n"));
1379 if (sscanf (buf, "%x", &nreg) != 1)
1381 fprintf_unfiltered (gdb_stderr,
1382 _("Error fetching number of io registers\n"));
1389 reinitialize_more_filter ();
1391 printf_unfiltered (_("Target has %u io registers:\n\n"), nreg);
1393 /* only fetch up to 8 registers at a time to keep the buffer small */
1396 for (i = 0; i < nreg; i += step)
1398 /* how many registers this round? */
1401 j = nreg - i; /* last block is less than 8 registers */
1403 snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j);
1404 bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR,
1408 for (k = i; k < (i + j); k++)
1410 if (sscanf (p, "%[^,],%x;", query, &val) == 2)
1412 printf_filtered ("[%02x] %-15s : %02x\n", k, query, val);
1413 while ((*p != ';') && (*p != '\0'))
1415 p++; /* skip over ';' */
1425 extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */
1428 _initialize_avr_tdep (void)
1430 register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init);
1432 /* Add a new command to allow the user to query the avr remote target for
1433 the values of the io space registers in a saner way than just using
1436 /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr
1437 io_registers' to signify it is not available on other platforms. */
1439 add_cmd ("io_registers", class_info, avr_io_reg_read_command,
1440 _("query remote avr target for io space register values"),