1 /* Target-dependent code for Atmel AVR, for GDB.
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 /* Contributed by Theodore A. Roth, troth@openavr.org */
23 /* Portions of this file were taken from the original gdb-4.18 patch developed
24 by Denis Chertykov, denisc@overta.ru */
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
36 #include "arch-utils.h"
38 #include "gdb_string.h"
43 (AVR micros are pure Harvard Architecture processors.)
45 The AVR family of microcontrollers have three distinctly different memory
46 spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for
47 the most part to store program instructions. The sram is 8 bits wide and is
48 used for the stack and the heap. Some devices lack sram and some can have
49 an additional external sram added on as a peripheral.
51 The eeprom is 8 bits wide and is used to store data when the device is
52 powered down. Eeprom is not directly accessible, it can only be accessed
53 via io-registers using a special algorithm. Accessing eeprom via gdb's
54 remote serial protocol ('m' or 'M' packets) looks difficult to do and is
55 not included at this time.
57 [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or
58 written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to
59 work, the remote target must be able to handle eeprom accesses and perform
60 the address translation.]
62 All three memory spaces have physical addresses beginning at 0x0. In
63 addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit
64 bytes instead of the 16 bit wide words used by the real device for the
67 In order for remote targets to work correctly, extra bits must be added to
68 addresses before they are send to the target or received from the target
69 via the remote serial protocol. The extra bits are the MSBs and are used to
70 decode which memory space the address is referring to. */
73 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
76 #define EXTRACT_INSN(addr) extract_unsigned_integer(addr,2)
78 /* Constants: prefixed with AVR_ to avoid name space clashes */
92 AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/,
93 AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/,
95 AVR_PC_REG_INDEX = 35, /* index into array of registers */
97 AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */
99 /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */
102 /* Number of the last pushed register. r17 for current avr-gcc */
103 AVR_LAST_PUSHED_REGNUM = 17,
105 AVR_ARG1_REGNUM = 24, /* Single byte argument */
106 AVR_ARGN_REGNUM = 25, /* Multi byte argments */
108 AVR_RET1_REGNUM = 24, /* Single byte return value */
109 AVR_RETN_REGNUM = 25, /* Multi byte return value */
111 /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8
112 bits? Do these have to match the bfd vma values?. It sure would make
113 things easier in the future if they didn't need to match.
115 Note: I chose these values so as to be consistent with bfd vma
118 TRoth/2002-04-08: There is already a conflict with very large programs
119 in the mega128. The mega128 has 128K instruction bytes (64K words),
120 thus the Most Significant Bit is 0x10000 which gets masked off my
123 The problem manifests itself when trying to set a breakpoint in a
124 function which resides in the upper half of the instruction space and
125 thus requires a 17-bit address.
127 For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK
128 from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet,
129 but could be for some remote targets by just adding the correct offset
130 to the address and letting the remote target handle the low-level
131 details of actually accessing the eeprom. */
133 AVR_IMEM_START = 0x00000000, /* INSN memory */
134 AVR_SMEM_START = 0x00800000, /* SRAM memory */
136 /* No eeprom mask defined */
137 AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */
139 AVR_EMEM_START = 0x00810000, /* EEPROM memory */
140 AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */
146 NORMAL and CALL are the typical types (the -mcall-prologues gcc option
147 causes the generation of the CALL type prologues). */
150 AVR_PROLOGUE_NONE, /* No prologue */
152 AVR_PROLOGUE_CALL, /* -mcall-prologues */
154 AVR_PROLOGUE_INTR, /* interrupt handler */
155 AVR_PROLOGUE_SIG, /* signal handler */
158 /* Any function with a frame looks like this
159 ....... <-SP POINTS HERE
160 LOCALS1 <-FP POINTS HERE
169 struct avr_unwind_cache
171 /* The previous frame's inner most stack address. Used as this
172 frame ID's stack_addr. */
174 /* The frame's base, optionally used by the high-level debug info. */
178 /* Table indicating the location of each and every register. */
179 struct trad_frame_saved_reg *saved_regs;
184 /* Number of bytes stored to the stack by call instructions.
185 2 bytes for avr1-5, 3 bytes for avr6. */
189 /* Lookup the name of a register given it's number. */
192 avr_register_name (struct gdbarch *gdbarch, int regnum)
194 static const char * const register_names[] = {
195 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
196 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
197 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
198 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
203 if (regnum >= (sizeof (register_names) / sizeof (*register_names)))
205 return register_names[regnum];
208 /* Return the GDB type object for the "standard" data type
209 of data in register N. */
212 avr_register_type (struct gdbarch *gdbarch, int reg_nr)
214 if (reg_nr == AVR_PC_REGNUM)
215 return builtin_type_uint32;
216 if (reg_nr == AVR_SP_REGNUM)
217 return builtin_type (gdbarch)->builtin_data_ptr;
219 return builtin_type_uint8;
222 /* Instruction address checks and convertions. */
225 avr_make_iaddr (CORE_ADDR x)
227 return ((x) | AVR_IMEM_START);
230 /* FIXME: TRoth: Really need to use a larger mask for instructions. Some
231 devices are already up to 128KBytes of flash space.
233 TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */
236 avr_convert_iaddr_to_raw (CORE_ADDR x)
238 return ((x) & 0xffffffff);
241 /* SRAM address checks and convertions. */
244 avr_make_saddr (CORE_ADDR x)
246 return ((x) | AVR_SMEM_START);
250 avr_convert_saddr_to_raw (CORE_ADDR x)
252 return ((x) & 0xffffffff);
255 /* EEPROM address checks and convertions. I don't know if these will ever
256 actually be used, but I've added them just the same. TRoth */
258 /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large
259 programs in the mega128. */
261 /* static CORE_ADDR */
262 /* avr_make_eaddr (CORE_ADDR x) */
264 /* return ((x) | AVR_EMEM_START); */
268 /* avr_eaddr_p (CORE_ADDR x) */
270 /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */
273 /* static CORE_ADDR */
274 /* avr_convert_eaddr_to_raw (CORE_ADDR x) */
276 /* return ((x) & 0xffffffff); */
279 /* Convert from address to pointer and vice-versa. */
282 avr_address_to_pointer (struct type *type, gdb_byte *buf, CORE_ADDR addr)
284 /* Is it a code address? */
285 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
286 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD)
288 store_unsigned_integer (buf, TYPE_LENGTH (type),
289 avr_convert_iaddr_to_raw (addr >> 1));
293 /* Strip off any upper segment bits. */
294 store_unsigned_integer (buf, TYPE_LENGTH (type),
295 avr_convert_saddr_to_raw (addr));
300 avr_pointer_to_address (struct type *type, const gdb_byte *buf)
302 CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type));
304 /* Is it a code address? */
305 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
306 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
307 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type)))
308 return avr_make_iaddr (addr << 1);
310 return avr_make_saddr (addr);
314 avr_read_pc (struct regcache *regcache)
317 regcache_cooked_read_unsigned (regcache, AVR_PC_REGNUM, &pc);
318 return avr_make_iaddr (pc);
322 avr_write_pc (struct regcache *regcache, CORE_ADDR val)
324 regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM,
325 avr_convert_iaddr_to_raw (val));
328 /* Function: avr_scan_prologue
330 This function decodes an AVR function prologue to determine:
331 1) the size of the stack frame
332 2) which registers are saved on it
333 3) the offsets of saved regs
334 This information is stored in the avr_unwind_cache structure.
336 Some devices lack the sbiw instruction, so on those replace this:
342 A typical AVR function prologue with a frame pointer might look like this:
343 push rXX ; saved regs
349 sbiw r28,<LOCALS_SIZE>
350 in __tmp_reg__,__SREG__
353 out __SREG__,__tmp_reg__
356 A typical AVR function prologue without a frame pointer might look like
358 push rXX ; saved regs
361 A main function prologue looks like this:
362 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
363 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
367 A signal handler prologue looks like this:
370 in __tmp_reg__, __SREG__
373 push rXX ; save registers r18:r27, r30:r31
375 push r28 ; save frame pointer
379 sbiw r28, <LOCALS_SIZE>
383 A interrupt handler prologue looks like this:
387 in __tmp_reg__, __SREG__
390 push rXX ; save registers r18:r27, r30:r31
392 push r28 ; save frame pointer
396 sbiw r28, <LOCALS_SIZE>
402 A `-mcall-prologues' prologue looks like this (Note that the megas use a
403 jmp instead of a rjmp, thus the prologue is one word larger since jmp is a
404 32 bit insn and rjmp is a 16 bit insn):
405 ldi r26,lo8(<LOCALS_SIZE>)
406 ldi r27,hi8(<LOCALS_SIZE>)
407 ldi r30,pm_lo8(.L_foo_body)
408 ldi r31,pm_hi8(.L_foo_body)
409 rjmp __prologue_saves__+RRR
412 /* Not really part of a prologue, but still need to scan for it, is when a
413 function prologue moves values passed via registers as arguments to new
414 registers. In this case, all local variables live in registers, so there
415 may be some register saves. This is what it looks like:
419 There could be multiple movw's. If the target doesn't have a movw insn, it
420 will use two mov insns. This could be done after any of the above prologue
424 avr_scan_prologue (CORE_ADDR pc_beg, CORE_ADDR pc_end,
425 struct avr_unwind_cache *info)
430 struct minimal_symbol *msymbol;
431 unsigned char prologue[AVR_MAX_PROLOGUE_SIZE];
435 len = pc_end - pc_beg;
436 if (len > AVR_MAX_PROLOGUE_SIZE)
437 len = AVR_MAX_PROLOGUE_SIZE;
439 /* FIXME: TRoth/2003-06-11: This could be made more efficient by only
440 reading in the bytes of the prologue. The problem is that the figuring
441 out where the end of the prologue is is a bit difficult. The old code
442 tried to do that, but failed quite often. */
443 read_memory (pc_beg, prologue, len);
445 /* Scanning main()'s prologue
446 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
447 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
454 static const unsigned char img[] = {
455 0xde, 0xbf, /* out __SP_H__,r29 */
456 0xcd, 0xbf /* out __SP_L__,r28 */
459 insn = EXTRACT_INSN (&prologue[vpc]);
460 /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */
461 if ((insn & 0xf0f0) == 0xe0c0)
463 locals = (insn & 0xf) | ((insn & 0x0f00) >> 4);
464 insn = EXTRACT_INSN (&prologue[vpc + 2]);
465 /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */
466 if ((insn & 0xf0f0) == 0xe0d0)
468 locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
469 if (vpc + 4 + sizeof (img) < len
470 && memcmp (prologue + vpc + 4, img, sizeof (img)) == 0)
472 info->prologue_type = AVR_PROLOGUE_MAIN;
480 /* Scanning `-mcall-prologues' prologue
481 Classic prologue is 10 bytes, mega prologue is a 12 bytes long */
483 while (1) /* Using a while to avoid many goto's */
490 /* At least the fifth instruction must have been executed to
491 modify frame shape. */
495 insn = EXTRACT_INSN (&prologue[vpc]);
496 /* ldi r26,<LOCALS_SIZE> */
497 if ((insn & 0xf0f0) != 0xe0a0)
499 loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4);
502 insn = EXTRACT_INSN (&prologue[vpc + 2]);
503 /* ldi r27,<LOCALS_SIZE> / 256 */
504 if ((insn & 0xf0f0) != 0xe0b0)
506 loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
509 insn = EXTRACT_INSN (&prologue[vpc + 4]);
510 /* ldi r30,pm_lo8(.L_foo_body) */
511 if ((insn & 0xf0f0) != 0xe0e0)
513 body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4);
516 insn = EXTRACT_INSN (&prologue[vpc + 6]);
517 /* ldi r31,pm_hi8(.L_foo_body) */
518 if ((insn & 0xf0f0) != 0xe0f0)
520 body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
523 msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL);
527 insn = EXTRACT_INSN (&prologue[vpc + 8]);
528 /* rjmp __prologue_saves__+RRR */
529 if ((insn & 0xf000) == 0xc000)
531 /* Extract PC relative offset from RJMP */
532 i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0);
533 /* Convert offset to byte addressable mode */
535 /* Destination address */
538 if (body_addr != (pc_beg + 10)/2)
543 else if ((insn & 0xfe0e) == 0x940c)
545 /* Extract absolute PC address from JMP */
546 i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16)
547 | (EXTRACT_INSN (&prologue[vpc + 10]) & 0xffff));
548 /* Convert address to byte addressable mode */
551 if (body_addr != (pc_beg + 12)/2)
559 /* Resolve offset (in words) from __prologue_saves__ symbol.
560 Which is a pushes count in `-mcall-prologues' mode */
561 num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2;
563 if (num_pushes > AVR_MAX_PUSHES)
565 fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"),
574 info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes;
576 info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1;
579 for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2);
580 from <= AVR_LAST_PUSHED_REGNUM; ++from)
581 info->saved_regs [from].addr = ++i;
583 info->size = loc_size + num_pushes;
584 info->prologue_type = AVR_PROLOGUE_CALL;
586 return pc_beg + pc_offset;
589 /* Scan for the beginning of the prologue for an interrupt or signal
590 function. Note that we have to set the prologue type here since the
591 third stage of the prologue may not be present (e.g. no saved registered
592 or changing of the SP register). */
596 static const unsigned char img[] = {
597 0x78, 0x94, /* sei */
598 0x1f, 0x92, /* push r1 */
599 0x0f, 0x92, /* push r0 */
600 0x0f, 0xb6, /* in r0,0x3f SREG */
601 0x0f, 0x92, /* push r0 */
602 0x11, 0x24 /* clr r1 */
604 if (len >= sizeof (img)
605 && memcmp (prologue, img, sizeof (img)) == 0)
607 info->prologue_type = AVR_PROLOGUE_INTR;
609 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
610 info->saved_regs[0].addr = 2;
611 info->saved_regs[1].addr = 1;
614 else if (len >= sizeof (img) - 2
615 && memcmp (img + 2, prologue, sizeof (img) - 2) == 0)
617 info->prologue_type = AVR_PROLOGUE_SIG;
618 vpc += sizeof (img) - 2;
619 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
620 info->saved_regs[0].addr = 2;
621 info->saved_regs[1].addr = 1;
626 /* First stage of the prologue scanning.
627 Scan pushes (saved registers) */
629 for (; vpc < len; vpc += 2)
631 insn = EXTRACT_INSN (&prologue[vpc]);
632 if ((insn & 0xfe0f) == 0x920f) /* push rXX */
634 /* Bits 4-9 contain a mask for registers R0-R32. */
635 int regno = (insn & 0x1f0) >> 4;
637 info->saved_regs[regno].addr = info->size;
644 if (vpc >= AVR_MAX_PROLOGUE_SIZE)
645 fprintf_unfiltered (gdb_stderr,
646 _("Hit end of prologue while scanning pushes\n"));
648 /* Second stage of the prologue scanning.
653 if (scan_stage == 1 && vpc < len)
655 static const unsigned char img[] = {
656 0xcd, 0xb7, /* in r28,__SP_L__ */
657 0xde, 0xb7 /* in r29,__SP_H__ */
659 unsigned short insn1;
661 if (vpc + sizeof (img) < len
662 && memcmp (prologue + vpc, img, sizeof (img)) == 0)
669 /* Third stage of the prologue scanning. (Really two stages)
671 sbiw r28,XX or subi r28,lo8(XX)
673 in __tmp_reg__,__SREG__
676 out __SREG__,__tmp_reg__
679 if (scan_stage == 2 && vpc < len)
682 static const unsigned char img[] = {
683 0x0f, 0xb6, /* in r0,0x3f */
684 0xf8, 0x94, /* cli */
685 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
686 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */
687 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
689 static const unsigned char img_sig[] = {
690 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
691 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
693 static const unsigned char img_int[] = {
694 0xf8, 0x94, /* cli */
695 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
696 0x78, 0x94, /* sei */
697 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
700 insn = EXTRACT_INSN (&prologue[vpc]);
702 if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */
703 locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2);
704 else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */
706 locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4);
707 insn = EXTRACT_INSN (&prologue[vpc]);
709 locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4) << 8);
714 /* Scan the last part of the prologue. May not be present for interrupt
715 or signal handler functions, which is why we set the prologue type
716 when we saw the beginning of the prologue previously. */
718 if (vpc + sizeof (img_sig) < len
719 && memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0)
721 vpc += sizeof (img_sig);
723 else if (vpc + sizeof (img_int) < len
724 && memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0)
726 vpc += sizeof (img_int);
728 if (vpc + sizeof (img) < len
729 && memcmp (prologue + vpc, img, sizeof (img)) == 0)
731 info->prologue_type = AVR_PROLOGUE_NORMAL;
735 info->size += locals_size;
740 /* If we got this far, we could not scan the prologue, so just return the pc
741 of the frame plus an adjustment for argument move insns. */
743 for (; vpc < len; vpc += 2)
745 insn = EXTRACT_INSN (&prologue[vpc]);
746 if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */
748 else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */
758 avr_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
760 CORE_ADDR func_addr, func_end;
761 CORE_ADDR prologue_end = pc;
763 /* See what the symbol table says */
765 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
767 struct symtab_and_line sal;
768 struct avr_unwind_cache info = {0};
769 struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS];
771 info.saved_regs = saved_regs;
773 /* Need to run the prologue scanner to figure out if the function has a
774 prologue and possibly skip over moving arguments passed via registers
775 to other registers. */
777 prologue_end = avr_scan_prologue (func_addr, func_end, &info);
779 if (info.prologue_type == AVR_PROLOGUE_NONE)
783 sal = find_pc_line (func_addr, 0);
785 if (sal.line != 0 && sal.end < func_end)
790 /* Either we didn't find the start of this function (nothing we can do),
791 or there's no line info, or the line after the prologue is after
792 the end of the function (there probably isn't a prologue). */
797 /* Not all avr devices support the BREAK insn. Those that don't should treat
798 it as a NOP. Thus, it should be ok. Since the avr is currently a remote
799 only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */
801 static const unsigned char *
802 avr_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR * pcptr, int *lenptr)
804 static const unsigned char avr_break_insn [] = { 0x98, 0x95 };
805 *lenptr = sizeof (avr_break_insn);
806 return avr_break_insn;
809 /* Given a return value in `regcache' with a type `type',
810 extract and copy its value into `valbuf'.
812 Return values are always passed via registers r25:r24:... */
815 avr_extract_return_value (struct type *type, struct regcache *regcache,
821 if (TYPE_LENGTH (type) == 1)
823 regcache_cooked_read_unsigned (regcache, 24, &c);
824 store_unsigned_integer (valbuf, 1, c);
829 /* The MSB of the return value is always in r25, calculate which
830 register holds the LSB. */
831 int lsb_reg = 25 - TYPE_LENGTH (type) + 1;
833 for (i=0; i< TYPE_LENGTH (type); i++)
835 regcache_cooked_read (regcache, lsb_reg + i,
836 (bfd_byte *) valbuf + i);
841 /* Determine, for architecture GDBARCH, how a return value of TYPE
842 should be returned. If it is supposed to be returned in registers,
843 and READBUF is non-zero, read the appropriate value from REGCACHE,
844 and copy it into READBUF. If WRITEBUF is non-zero, write the value
845 from WRITEBUF into REGCACHE. */
847 static enum return_value_convention
848 avr_return_value (struct gdbarch *gdbarch, struct type *func_type,
849 struct type *valtype, struct regcache *regcache,
850 gdb_byte *readbuf, const gdb_byte *writebuf)
852 int struct_return = ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
853 || TYPE_CODE (valtype) == TYPE_CODE_UNION
854 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
855 && !(TYPE_LENGTH (valtype) == 1
856 || TYPE_LENGTH (valtype) == 2
857 || TYPE_LENGTH (valtype) == 4
858 || TYPE_LENGTH (valtype) == 8));
860 if (writebuf != NULL)
862 gdb_assert (!struct_return);
863 error (_("Cannot store return value."));
868 gdb_assert (!struct_return);
869 avr_extract_return_value (valtype, regcache, readbuf);
873 return RETURN_VALUE_STRUCT_CONVENTION;
875 return RETURN_VALUE_REGISTER_CONVENTION;
879 /* Put here the code to store, into fi->saved_regs, the addresses of
880 the saved registers of frame described by FRAME_INFO. This
881 includes special registers such as pc and fp saved in special ways
882 in the stack frame. sp is even more special: the address we return
883 for it IS the sp for the next frame. */
885 static struct avr_unwind_cache *
886 avr_frame_unwind_cache (struct frame_info *this_frame,
887 void **this_prologue_cache)
889 CORE_ADDR start_pc, current_pc;
892 struct avr_unwind_cache *info;
893 struct gdbarch *gdbarch;
894 struct gdbarch_tdep *tdep;
897 if (*this_prologue_cache)
898 return *this_prologue_cache;
900 info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache);
901 *this_prologue_cache = info;
902 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
905 info->prologue_type = AVR_PROLOGUE_NONE;
907 start_pc = get_frame_func (this_frame);
908 current_pc = get_frame_pc (this_frame);
909 if ((start_pc > 0) && (start_pc <= current_pc))
910 avr_scan_prologue (start_pc, current_pc, info);
912 if ((info->prologue_type != AVR_PROLOGUE_NONE)
913 && (info->prologue_type != AVR_PROLOGUE_MAIN))
915 ULONGEST high_base; /* High byte of FP */
917 /* The SP was moved to the FP. This indicates that a new frame
918 was created. Get THIS frame's FP value by unwinding it from
920 this_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM);
921 high_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM + 1);
922 this_base += (high_base << 8);
924 /* The FP points at the last saved register. Adjust the FP back
925 to before the first saved register giving the SP. */
926 prev_sp = this_base + info->size;
930 /* Assume that the FP is this frame's SP but with that pushed
931 stack space added back. */
932 this_base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
933 prev_sp = this_base + info->size;
936 /* Add 1 here to adjust for the post-decrement nature of the push
938 info->prev_sp = avr_make_saddr (prev_sp + 1);
939 info->base = avr_make_saddr (this_base);
941 gdbarch = get_frame_arch (this_frame);
943 /* Adjust all the saved registers so that they contain addresses and not
945 for (i = 0; i < gdbarch_num_regs (gdbarch) - 1; i++)
946 if (info->saved_regs[i].addr > 0)
947 info->saved_regs[i].addr = info->prev_sp - info->saved_regs[i].addr;
949 /* Except for the main and startup code, the return PC is always saved on
950 the stack and is at the base of the frame. */
952 if (info->prologue_type != AVR_PROLOGUE_MAIN)
953 info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp;
955 /* The previous frame's SP needed to be computed. Save the computed
957 tdep = gdbarch_tdep (gdbarch);
958 trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM,
959 info->prev_sp - 1 + tdep->call_length);
965 avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
969 pc = frame_unwind_register_unsigned (next_frame, AVR_PC_REGNUM);
971 return avr_make_iaddr (pc);
975 avr_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
979 sp = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM);
981 return avr_make_saddr (sp);
984 /* Given a GDB frame, determine the address of the calling function's
985 frame. This will be used to create a new GDB frame struct. */
988 avr_frame_this_id (struct frame_info *this_frame,
989 void **this_prologue_cache,
990 struct frame_id *this_id)
992 struct avr_unwind_cache *info
993 = avr_frame_unwind_cache (this_frame, this_prologue_cache);
998 /* The FUNC is easy. */
999 func = get_frame_func (this_frame);
1001 /* Hopefully the prologue analysis either correctly determined the
1002 frame's base (which is the SP from the previous frame), or set
1003 that base to "NULL". */
1004 base = info->prev_sp;
1008 id = frame_id_build (base, func);
1012 static struct value *
1013 avr_frame_prev_register (struct frame_info *this_frame,
1014 void **this_prologue_cache, int regnum)
1016 struct avr_unwind_cache *info
1017 = avr_frame_unwind_cache (this_frame, this_prologue_cache);
1019 if (regnum == AVR_PC_REGNUM)
1021 if (trad_frame_addr_p (info->saved_regs, regnum))
1023 /* Reading the return PC from the PC register is slightly
1024 abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes,
1025 but in reality, only two bytes (3 in upcoming mega256) are
1026 stored on the stack.
1028 Also, note that the value on the stack is an addr to a word
1029 not a byte, so we will need to multiply it by two at some
1032 And to confuse matters even more, the return address stored
1033 on the stack is in big endian byte order, even though most
1034 everything else about the avr is little endian. Ick! */
1037 unsigned char buf[3];
1038 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1039 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1041 read_memory (info->saved_regs[regnum].addr, buf, tdep->call_length);
1043 /* Extract the PC read from memory as a big-endian. */
1045 for (i = 0; i < tdep->call_length; i++)
1046 pc = (pc << 8) | buf[i];
1048 return frame_unwind_got_constant (this_frame, regnum, pc << 1);
1051 return frame_unwind_got_optimized (this_frame, regnum);
1054 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1057 static const struct frame_unwind avr_frame_unwind = {
1060 avr_frame_prev_register,
1062 default_frame_sniffer
1066 avr_frame_base_address (struct frame_info *this_frame, void **this_cache)
1068 struct avr_unwind_cache *info
1069 = avr_frame_unwind_cache (this_frame, this_cache);
1074 static const struct frame_base avr_frame_base = {
1076 avr_frame_base_address,
1077 avr_frame_base_address,
1078 avr_frame_base_address
1081 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
1082 frame. The frame ID's base needs to match the TOS value saved by
1083 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
1085 static struct frame_id
1086 avr_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1090 base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
1091 return frame_id_build (avr_make_saddr (base), get_frame_pc (this_frame));
1094 /* When arguments must be pushed onto the stack, they go on in reverse
1095 order. The below implements a FILO (stack) to do this. */
1100 struct stack_item *prev;
1104 static struct stack_item *
1105 push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len)
1107 struct stack_item *si;
1108 si = xmalloc (sizeof (struct stack_item));
1109 si->data = xmalloc (len);
1112 memcpy (si->data, contents, len);
1116 static struct stack_item *pop_stack_item (struct stack_item *si);
1117 static struct stack_item *
1118 pop_stack_item (struct stack_item *si)
1120 struct stack_item *dead = si;
1127 /* Setup the function arguments for calling a function in the inferior.
1129 On the AVR architecture, there are 18 registers (R25 to R8) which are
1130 dedicated for passing function arguments. Up to the first 18 arguments
1131 (depending on size) may go into these registers. The rest go on the stack.
1133 All arguments are aligned to start in even-numbered registers (odd-sized
1134 arguments, including char, have one free register above them). For example,
1135 an int in arg1 and a char in arg2 would be passed as such:
1140 Arguments that are larger than 2 bytes will be split between two or more
1141 registers as available, but will NOT be split between a register and the
1142 stack. Arguments that go onto the stack are pushed last arg first (this is
1143 similar to the d10v). */
1145 /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be
1148 An exceptional case exists for struct arguments (and possibly other
1149 aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but
1150 not a multiple of WORDSIZE bytes. In this case the argument is never split
1151 between the registers and the stack, but instead is copied in its entirety
1152 onto the stack, AND also copied into as many registers as there is room
1153 for. In other words, space in registers permitting, two copies of the same
1154 argument are passed in. As far as I can tell, only the one on the stack is
1155 used, although that may be a function of the level of compiler
1156 optimization. I suspect this is a compiler bug. Arguments of these odd
1157 sizes are left-justified within the word (as opposed to arguments smaller
1158 than WORDSIZE bytes, which are right-justified).
1160 If the function is to return an aggregate type such as a struct, the caller
1161 must allocate space into which the callee will copy the return value. In
1162 this case, a pointer to the return value location is passed into the callee
1163 in register R0, which displaces one of the other arguments passed in via
1164 registers R0 to R2. */
1167 avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1168 struct regcache *regcache, CORE_ADDR bp_addr,
1169 int nargs, struct value **args, CORE_ADDR sp,
1170 int struct_return, CORE_ADDR struct_addr)
1173 unsigned char buf[2];
1174 CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr);
1175 int regnum = AVR_ARGN_REGNUM;
1176 struct stack_item *si = NULL;
1179 /* FIXME: TRoth/2003-06-18: Not sure what to do when returning a struct. */
1182 fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr);
1183 regcache_cooked_write_unsigned (regcache, argreg--, struct_addr & 0xff);
1184 regcache_cooked_write_unsigned (regcache, argreg--, (struct_addr >>8) & 0xff);
1188 for (i = 0; i < nargs; i++)
1192 struct value *arg = args[i];
1193 struct type *type = check_typedef (value_type (arg));
1194 const bfd_byte *contents = value_contents (arg);
1195 int len = TYPE_LENGTH (type);
1197 /* Calculate the potential last register needed. */
1198 last_regnum = regnum - (len + (len & 1));
1200 /* If there are registers available, use them. Once we start putting
1201 stuff on the stack, all subsequent args go on stack. */
1202 if ((si == NULL) && (last_regnum >= 8))
1206 /* Skip a register for odd length args. */
1210 val = extract_unsigned_integer (contents, len);
1211 for (j=0; j<len; j++)
1213 regcache_cooked_write_unsigned (regcache, regnum--,
1214 val >> (8*(len-j-1)));
1217 /* No registers available, push the args onto the stack. */
1220 /* From here on, we don't care about regnum. */
1221 si = push_stack_item (si, contents, len);
1225 /* Push args onto the stack. */
1229 /* Add 1 to sp here to account for post decr nature of pushes. */
1230 write_memory (sp + 1, si->data, si->len);
1231 si = pop_stack_item (si);
1234 /* Set the return address. For the avr, the return address is the BP_ADDR.
1235 Need to push the return address onto the stack noting that it needs to be
1236 in big-endian order on the stack. */
1237 buf[0] = (return_pc >> 8) & 0xff;
1238 buf[1] = return_pc & 0xff;
1241 write_memory (sp + 1, buf, 2); /* Add one since pushes are post decr ops. */
1243 /* Finally, update the SP register. */
1244 regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM,
1245 avr_convert_saddr_to_raw (sp));
1250 /* Initialize the gdbarch structure for the AVR's. */
1252 static struct gdbarch *
1253 avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1255 struct gdbarch *gdbarch;
1256 struct gdbarch_tdep *tdep;
1257 struct gdbarch_list *best_arch;
1260 /* Avr-6 call instructions save 3 bytes. */
1261 switch (info.bfd_arch_info->mach)
1276 /* If there is already a candidate, use it. */
1277 for (best_arch = gdbarch_list_lookup_by_info (arches, &info);
1279 best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info))
1281 if (gdbarch_tdep (best_arch->gdbarch)->call_length == call_length)
1282 return best_arch->gdbarch;
1285 /* None found, create a new architecture from the information provided. */
1286 tdep = XMALLOC (struct gdbarch_tdep);
1287 gdbarch = gdbarch_alloc (&info, tdep);
1289 tdep->call_length = call_length;
1291 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1292 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1293 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1294 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1295 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1296 set_gdbarch_addr_bit (gdbarch, 32);
1298 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1299 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1300 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1302 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1303 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1304 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
1306 set_gdbarch_read_pc (gdbarch, avr_read_pc);
1307 set_gdbarch_write_pc (gdbarch, avr_write_pc);
1309 set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS);
1311 set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM);
1312 set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM);
1314 set_gdbarch_register_name (gdbarch, avr_register_name);
1315 set_gdbarch_register_type (gdbarch, avr_register_type);
1317 set_gdbarch_return_value (gdbarch, avr_return_value);
1318 set_gdbarch_print_insn (gdbarch, print_insn_avr);
1320 set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call);
1322 set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer);
1323 set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address);
1325 set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue);
1326 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1328 set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc);
1330 frame_unwind_append_unwinder (gdbarch, &avr_frame_unwind);
1331 frame_base_set_default (gdbarch, &avr_frame_base);
1333 set_gdbarch_dummy_id (gdbarch, avr_dummy_id);
1335 set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc);
1336 set_gdbarch_unwind_sp (gdbarch, avr_unwind_sp);
1341 /* Send a query request to the avr remote target asking for values of the io
1342 registers. If args parameter is not NULL, then the user has requested info
1343 on a specific io register [This still needs implemented and is ignored for
1344 now]. The query string should be one of these forms:
1346 "Ravr.io_reg" -> reply is "NN" number of io registers
1348 "Ravr.io_reg:addr,len" where addr is first register and len is number of
1349 registers to be read. The reply should be "<NAME>,VV;" for each io register
1350 where, <NAME> is a string, and VV is the hex value of the register.
1352 All io registers are 8-bit. */
1355 avr_io_reg_read_command (char *args, int from_tty)
1361 unsigned int nreg = 0;
1365 /* Find out how many io registers the target has. */
1366 bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR,
1367 "avr.io_reg", &buf);
1371 fprintf_unfiltered (gdb_stderr,
1372 _("ERR: info io_registers NOT supported "
1373 "by current target\n"));
1377 if (sscanf (buf, "%x", &nreg) != 1)
1379 fprintf_unfiltered (gdb_stderr,
1380 _("Error fetching number of io registers\n"));
1387 reinitialize_more_filter ();
1389 printf_unfiltered (_("Target has %u io registers:\n\n"), nreg);
1391 /* only fetch up to 8 registers at a time to keep the buffer small */
1394 for (i = 0; i < nreg; i += step)
1396 /* how many registers this round? */
1399 j = nreg - i; /* last block is less than 8 registers */
1401 snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j);
1402 bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR,
1406 for (k = i; k < (i + j); k++)
1408 if (sscanf (p, "%[^,],%x;", query, &val) == 2)
1410 printf_filtered ("[%02x] %-15s : %02x\n", k, query, val);
1411 while ((*p != ';') && (*p != '\0'))
1413 p++; /* skip over ';' */
1423 extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */
1426 _initialize_avr_tdep (void)
1428 register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init);
1430 /* Add a new command to allow the user to query the avr remote target for
1431 the values of the io space registers in a saner way than just using
1434 /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr
1435 io_registers' to signify it is not available on other platforms. */
1437 add_cmd ("io_registers", class_info, avr_io_reg_read_command,
1438 _("query remote avr target for io space register values"),