1 /* Target-dependent code for Atmel AVR, for GDB.
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 /* Contributed by Theodore A. Roth, troth@openavr.org */
23 /* Portions of this file were taken from the original gdb-4.18 patch developed
24 by Denis Chertykov, denisc@overta.ru */
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
36 #include "arch-utils.h"
38 #include "gdb_string.h"
43 (AVR micros are pure Harvard Architecture processors.)
45 The AVR family of microcontrollers have three distinctly different memory
46 spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for
47 the most part to store program instructions. The sram is 8 bits wide and is
48 used for the stack and the heap. Some devices lack sram and some can have
49 an additional external sram added on as a peripheral.
51 The eeprom is 8 bits wide and is used to store data when the device is
52 powered down. Eeprom is not directly accessible, it can only be accessed
53 via io-registers using a special algorithm. Accessing eeprom via gdb's
54 remote serial protocol ('m' or 'M' packets) looks difficult to do and is
55 not included at this time.
57 [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or
58 written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to
59 work, the remote target must be able to handle eeprom accesses and perform
60 the address translation.]
62 All three memory spaces have physical addresses beginning at 0x0. In
63 addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit
64 bytes instead of the 16 bit wide words used by the real device for the
67 In order for remote targets to work correctly, extra bits must be added to
68 addresses before they are send to the target or received from the target
69 via the remote serial protocol. The extra bits are the MSBs and are used to
70 decode which memory space the address is referring to. */
73 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
75 /* Constants: prefixed with AVR_ to avoid name space clashes */
89 AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/,
90 AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/,
92 AVR_PC_REG_INDEX = 35, /* index into array of registers */
94 AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */
96 /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */
99 /* Number of the last pushed register. r17 for current avr-gcc */
100 AVR_LAST_PUSHED_REGNUM = 17,
102 AVR_ARG1_REGNUM = 24, /* Single byte argument */
103 AVR_ARGN_REGNUM = 25, /* Multi byte argments */
105 AVR_RET1_REGNUM = 24, /* Single byte return value */
106 AVR_RETN_REGNUM = 25, /* Multi byte return value */
108 /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8
109 bits? Do these have to match the bfd vma values?. It sure would make
110 things easier in the future if they didn't need to match.
112 Note: I chose these values so as to be consistent with bfd vma
115 TRoth/2002-04-08: There is already a conflict with very large programs
116 in the mega128. The mega128 has 128K instruction bytes (64K words),
117 thus the Most Significant Bit is 0x10000 which gets masked off my
120 The problem manifests itself when trying to set a breakpoint in a
121 function which resides in the upper half of the instruction space and
122 thus requires a 17-bit address.
124 For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK
125 from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet,
126 but could be for some remote targets by just adding the correct offset
127 to the address and letting the remote target handle the low-level
128 details of actually accessing the eeprom. */
130 AVR_IMEM_START = 0x00000000, /* INSN memory */
131 AVR_SMEM_START = 0x00800000, /* SRAM memory */
133 /* No eeprom mask defined */
134 AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */
136 AVR_EMEM_START = 0x00810000, /* EEPROM memory */
137 AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */
143 NORMAL and CALL are the typical types (the -mcall-prologues gcc option
144 causes the generation of the CALL type prologues). */
147 AVR_PROLOGUE_NONE, /* No prologue */
149 AVR_PROLOGUE_CALL, /* -mcall-prologues */
151 AVR_PROLOGUE_INTR, /* interrupt handler */
152 AVR_PROLOGUE_SIG, /* signal handler */
155 /* Any function with a frame looks like this
156 ....... <-SP POINTS HERE
157 LOCALS1 <-FP POINTS HERE
166 struct avr_unwind_cache
168 /* The previous frame's inner most stack address. Used as this
169 frame ID's stack_addr. */
171 /* The frame's base, optionally used by the high-level debug info. */
175 /* Table indicating the location of each and every register. */
176 struct trad_frame_saved_reg *saved_regs;
181 /* Number of bytes stored to the stack by call instructions.
182 2 bytes for avr1-5, 3 bytes for avr6. */
186 /* Lookup the name of a register given it's number. */
189 avr_register_name (struct gdbarch *gdbarch, int regnum)
191 static const char * const register_names[] = {
192 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
193 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
194 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
195 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
200 if (regnum >= (sizeof (register_names) / sizeof (*register_names)))
202 return register_names[regnum];
205 /* Return the GDB type object for the "standard" data type
206 of data in register N. */
209 avr_register_type (struct gdbarch *gdbarch, int reg_nr)
211 if (reg_nr == AVR_PC_REGNUM)
212 return builtin_type (gdbarch)->builtin_uint32;
213 if (reg_nr == AVR_SP_REGNUM)
214 return builtin_type (gdbarch)->builtin_data_ptr;
216 return builtin_type (gdbarch)->builtin_uint8;
219 /* Instruction address checks and convertions. */
222 avr_make_iaddr (CORE_ADDR x)
224 return ((x) | AVR_IMEM_START);
227 /* FIXME: TRoth: Really need to use a larger mask for instructions. Some
228 devices are already up to 128KBytes of flash space.
230 TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */
233 avr_convert_iaddr_to_raw (CORE_ADDR x)
235 return ((x) & 0xffffffff);
238 /* SRAM address checks and convertions. */
241 avr_make_saddr (CORE_ADDR x)
243 /* Return 0 for NULL. */
247 return ((x) | AVR_SMEM_START);
251 avr_convert_saddr_to_raw (CORE_ADDR x)
253 return ((x) & 0xffffffff);
256 /* EEPROM address checks and convertions. I don't know if these will ever
257 actually be used, but I've added them just the same. TRoth */
259 /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large
260 programs in the mega128. */
262 /* static CORE_ADDR */
263 /* avr_make_eaddr (CORE_ADDR x) */
265 /* return ((x) | AVR_EMEM_START); */
269 /* avr_eaddr_p (CORE_ADDR x) */
271 /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */
274 /* static CORE_ADDR */
275 /* avr_convert_eaddr_to_raw (CORE_ADDR x) */
277 /* return ((x) & 0xffffffff); */
280 /* Convert from address to pointer and vice-versa. */
283 avr_address_to_pointer (struct gdbarch *gdbarch,
284 struct type *type, gdb_byte *buf, CORE_ADDR addr)
286 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
288 /* Is it a code address? */
289 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
290 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD)
292 store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
293 avr_convert_iaddr_to_raw (addr >> 1));
297 /* Strip off any upper segment bits. */
298 store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
299 avr_convert_saddr_to_raw (addr));
304 avr_pointer_to_address (struct gdbarch *gdbarch,
305 struct type *type, const gdb_byte *buf)
307 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
309 = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);
311 /* Is it a code address? */
312 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
313 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
314 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type)))
315 return avr_make_iaddr (addr << 1);
317 return avr_make_saddr (addr);
321 avr_read_pc (struct regcache *regcache)
324 regcache_cooked_read_unsigned (regcache, AVR_PC_REGNUM, &pc);
325 return avr_make_iaddr (pc);
329 avr_write_pc (struct regcache *regcache, CORE_ADDR val)
331 regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM,
332 avr_convert_iaddr_to_raw (val));
335 /* Function: avr_scan_prologue
337 This function decodes an AVR function prologue to determine:
338 1) the size of the stack frame
339 2) which registers are saved on it
340 3) the offsets of saved regs
341 This information is stored in the avr_unwind_cache structure.
343 Some devices lack the sbiw instruction, so on those replace this:
349 A typical AVR function prologue with a frame pointer might look like this:
350 push rXX ; saved regs
356 sbiw r28,<LOCALS_SIZE>
357 in __tmp_reg__,__SREG__
360 out __SREG__,__tmp_reg__
363 A typical AVR function prologue without a frame pointer might look like
365 push rXX ; saved regs
368 A main function prologue looks like this:
369 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
370 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
374 A signal handler prologue looks like this:
377 in __tmp_reg__, __SREG__
380 push rXX ; save registers r18:r27, r30:r31
382 push r28 ; save frame pointer
386 sbiw r28, <LOCALS_SIZE>
390 A interrupt handler prologue looks like this:
394 in __tmp_reg__, __SREG__
397 push rXX ; save registers r18:r27, r30:r31
399 push r28 ; save frame pointer
403 sbiw r28, <LOCALS_SIZE>
409 A `-mcall-prologues' prologue looks like this (Note that the megas use a
410 jmp instead of a rjmp, thus the prologue is one word larger since jmp is a
411 32 bit insn and rjmp is a 16 bit insn):
412 ldi r26,lo8(<LOCALS_SIZE>)
413 ldi r27,hi8(<LOCALS_SIZE>)
414 ldi r30,pm_lo8(.L_foo_body)
415 ldi r31,pm_hi8(.L_foo_body)
416 rjmp __prologue_saves__+RRR
419 /* Not really part of a prologue, but still need to scan for it, is when a
420 function prologue moves values passed via registers as arguments to new
421 registers. In this case, all local variables live in registers, so there
422 may be some register saves. This is what it looks like:
426 There could be multiple movw's. If the target doesn't have a movw insn, it
427 will use two mov insns. This could be done after any of the above prologue
431 avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end,
432 struct avr_unwind_cache *info)
434 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
438 struct minimal_symbol *msymbol;
439 unsigned char prologue[AVR_MAX_PROLOGUE_SIZE];
443 len = pc_end - pc_beg;
444 if (len > AVR_MAX_PROLOGUE_SIZE)
445 len = AVR_MAX_PROLOGUE_SIZE;
447 /* FIXME: TRoth/2003-06-11: This could be made more efficient by only
448 reading in the bytes of the prologue. The problem is that the figuring
449 out where the end of the prologue is is a bit difficult. The old code
450 tried to do that, but failed quite often. */
451 read_memory (pc_beg, prologue, len);
453 /* Scanning main()'s prologue
454 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
455 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
462 static const unsigned char img[] = {
463 0xde, 0xbf, /* out __SP_H__,r29 */
464 0xcd, 0xbf /* out __SP_L__,r28 */
467 insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
468 /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */
469 if ((insn & 0xf0f0) == 0xe0c0)
471 locals = (insn & 0xf) | ((insn & 0x0f00) >> 4);
472 insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order);
473 /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */
474 if ((insn & 0xf0f0) == 0xe0d0)
476 locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
477 if (vpc + 4 + sizeof (img) < len
478 && memcmp (prologue + vpc + 4, img, sizeof (img)) == 0)
480 info->prologue_type = AVR_PROLOGUE_MAIN;
488 /* Scanning `-mcall-prologues' prologue
489 Classic prologue is 10 bytes, mega prologue is a 12 bytes long */
491 while (1) /* Using a while to avoid many goto's */
498 /* At least the fifth instruction must have been executed to
499 modify frame shape. */
503 insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
504 /* ldi r26,<LOCALS_SIZE> */
505 if ((insn & 0xf0f0) != 0xe0a0)
507 loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4);
510 insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order);
511 /* ldi r27,<LOCALS_SIZE> / 256 */
512 if ((insn & 0xf0f0) != 0xe0b0)
514 loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
517 insn = extract_unsigned_integer (&prologue[vpc + 4], 2, byte_order);
518 /* ldi r30,pm_lo8(.L_foo_body) */
519 if ((insn & 0xf0f0) != 0xe0e0)
521 body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4);
524 insn = extract_unsigned_integer (&prologue[vpc + 6], 2, byte_order);
525 /* ldi r31,pm_hi8(.L_foo_body) */
526 if ((insn & 0xf0f0) != 0xe0f0)
528 body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
531 msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL);
535 insn = extract_unsigned_integer (&prologue[vpc + 8], 2, byte_order);
536 /* rjmp __prologue_saves__+RRR */
537 if ((insn & 0xf000) == 0xc000)
539 /* Extract PC relative offset from RJMP */
540 i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0);
541 /* Convert offset to byte addressable mode */
543 /* Destination address */
546 if (body_addr != (pc_beg + 10)/2)
551 else if ((insn & 0xfe0e) == 0x940c)
553 /* Extract absolute PC address from JMP */
554 i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16)
555 | (extract_unsigned_integer (&prologue[vpc + 10], 2, byte_order)
557 /* Convert address to byte addressable mode */
560 if (body_addr != (pc_beg + 12)/2)
568 /* Resolve offset (in words) from __prologue_saves__ symbol.
569 Which is a pushes count in `-mcall-prologues' mode */
570 num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2;
572 if (num_pushes > AVR_MAX_PUSHES)
574 fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"),
583 info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes;
585 info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1;
588 for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2);
589 from <= AVR_LAST_PUSHED_REGNUM; ++from)
590 info->saved_regs [from].addr = ++i;
592 info->size = loc_size + num_pushes;
593 info->prologue_type = AVR_PROLOGUE_CALL;
595 return pc_beg + pc_offset;
598 /* Scan for the beginning of the prologue for an interrupt or signal
599 function. Note that we have to set the prologue type here since the
600 third stage of the prologue may not be present (e.g. no saved registered
601 or changing of the SP register). */
605 static const unsigned char img[] = {
606 0x78, 0x94, /* sei */
607 0x1f, 0x92, /* push r1 */
608 0x0f, 0x92, /* push r0 */
609 0x0f, 0xb6, /* in r0,0x3f SREG */
610 0x0f, 0x92, /* push r0 */
611 0x11, 0x24 /* clr r1 */
613 if (len >= sizeof (img)
614 && memcmp (prologue, img, sizeof (img)) == 0)
616 info->prologue_type = AVR_PROLOGUE_INTR;
618 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
619 info->saved_regs[0].addr = 2;
620 info->saved_regs[1].addr = 1;
623 else if (len >= sizeof (img) - 2
624 && memcmp (img + 2, prologue, sizeof (img) - 2) == 0)
626 info->prologue_type = AVR_PROLOGUE_SIG;
627 vpc += sizeof (img) - 2;
628 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
629 info->saved_regs[0].addr = 2;
630 info->saved_regs[1].addr = 1;
635 /* First stage of the prologue scanning.
636 Scan pushes (saved registers) */
638 for (; vpc < len; vpc += 2)
640 insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
641 if ((insn & 0xfe0f) == 0x920f) /* push rXX */
643 /* Bits 4-9 contain a mask for registers R0-R32. */
644 int regno = (insn & 0x1f0) >> 4;
646 info->saved_regs[regno].addr = info->size;
653 if (vpc >= AVR_MAX_PROLOGUE_SIZE)
654 fprintf_unfiltered (gdb_stderr,
655 _("Hit end of prologue while scanning pushes\n"));
657 /* Handle static small stack allocation using rcall or push. */
659 while (scan_stage == 1 && vpc < len)
661 insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
662 if (insn == 0xd000) /* rcall .+0 */
664 info->size += gdbarch_tdep (gdbarch)->call_length;
667 else if (insn == 0x920f) /* push r0 */
676 /* Second stage of the prologue scanning.
681 if (scan_stage == 1 && vpc < len)
683 static const unsigned char img[] = {
684 0xcd, 0xb7, /* in r28,__SP_L__ */
685 0xde, 0xb7 /* in r29,__SP_H__ */
687 unsigned short insn1;
689 if (vpc + sizeof (img) < len
690 && memcmp (prologue + vpc, img, sizeof (img)) == 0)
697 /* Third stage of the prologue scanning. (Really two stages)
699 sbiw r28,XX or subi r28,lo8(XX)
701 in __tmp_reg__,__SREG__
704 out __SREG__,__tmp_reg__
707 if (scan_stage == 2 && vpc < len)
710 static const unsigned char img[] = {
711 0x0f, 0xb6, /* in r0,0x3f */
712 0xf8, 0x94, /* cli */
713 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
714 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */
715 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
717 static const unsigned char img_sig[] = {
718 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
719 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
721 static const unsigned char img_int[] = {
722 0xf8, 0x94, /* cli */
723 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
724 0x78, 0x94, /* sei */
725 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
728 insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
729 if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */
731 locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2);
734 else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */
736 locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4);
738 insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
740 locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4)) << 8;
745 /* Scan the last part of the prologue. May not be present for interrupt
746 or signal handler functions, which is why we set the prologue type
747 when we saw the beginning of the prologue previously. */
749 if (vpc + sizeof (img_sig) < len
750 && memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0)
752 vpc += sizeof (img_sig);
754 else if (vpc + sizeof (img_int) < len
755 && memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0)
757 vpc += sizeof (img_int);
759 if (vpc + sizeof (img) < len
760 && memcmp (prologue + vpc, img, sizeof (img)) == 0)
762 info->prologue_type = AVR_PROLOGUE_NORMAL;
766 info->size += locals_size;
771 /* If we got this far, we could not scan the prologue, so just return the pc
772 of the frame plus an adjustment for argument move insns. */
774 for (; vpc < len; vpc += 2)
776 insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
777 if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */
779 else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */
789 avr_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
791 CORE_ADDR func_addr, func_end;
792 CORE_ADDR prologue_end = pc;
794 /* See what the symbol table says */
796 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
798 struct symtab_and_line sal;
799 struct avr_unwind_cache info = {0};
800 struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS];
802 info.saved_regs = saved_regs;
804 /* Need to run the prologue scanner to figure out if the function has a
805 prologue and possibly skip over moving arguments passed via registers
806 to other registers. */
808 prologue_end = avr_scan_prologue (gdbarch, func_addr, func_end, &info);
810 if (info.prologue_type == AVR_PROLOGUE_NONE)
814 sal = find_pc_line (func_addr, 0);
816 if (sal.line != 0 && sal.end < func_end)
821 /* Either we didn't find the start of this function (nothing we can do),
822 or there's no line info, or the line after the prologue is after
823 the end of the function (there probably isn't a prologue). */
828 /* Not all avr devices support the BREAK insn. Those that don't should treat
829 it as a NOP. Thus, it should be ok. Since the avr is currently a remote
830 only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */
832 static const unsigned char *
833 avr_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR * pcptr, int *lenptr)
835 static const unsigned char avr_break_insn [] = { 0x98, 0x95 };
836 *lenptr = sizeof (avr_break_insn);
837 return avr_break_insn;
840 /* Determine, for architecture GDBARCH, how a return value of TYPE
841 should be returned. If it is supposed to be returned in registers,
842 and READBUF is non-zero, read the appropriate value from REGCACHE,
843 and copy it into READBUF. If WRITEBUF is non-zero, write the value
844 from WRITEBUF into REGCACHE. */
846 static enum return_value_convention
847 avr_return_value (struct gdbarch *gdbarch, struct type *func_type,
848 struct type *valtype, struct regcache *regcache,
849 gdb_byte *readbuf, const gdb_byte *writebuf)
852 /* Single byte are returned in r24.
853 Otherwise, the MSB of the return value is always in r25, calculate which
854 register holds the LSB. */
857 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
858 || TYPE_CODE (valtype) == TYPE_CODE_UNION
859 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
860 && TYPE_LENGTH (valtype) > 8)
861 return RETURN_VALUE_STRUCT_CONVENTION;
863 if (TYPE_LENGTH (valtype) <= 2)
865 else if (TYPE_LENGTH (valtype) <= 4)
867 else if (TYPE_LENGTH (valtype) <= 8)
872 if (writebuf != NULL)
874 for (i = 0; i < TYPE_LENGTH (valtype); i++)
875 regcache_cooked_write (regcache, lsb_reg + i, writebuf + i);
880 for (i = 0; i < TYPE_LENGTH (valtype); i++)
881 regcache_cooked_read (regcache, lsb_reg + i, readbuf + i);
884 return RETURN_VALUE_REGISTER_CONVENTION;
888 /* Put here the code to store, into fi->saved_regs, the addresses of
889 the saved registers of frame described by FRAME_INFO. This
890 includes special registers such as pc and fp saved in special ways
891 in the stack frame. sp is even more special: the address we return
892 for it IS the sp for the next frame. */
894 static struct avr_unwind_cache *
895 avr_frame_unwind_cache (struct frame_info *this_frame,
896 void **this_prologue_cache)
898 CORE_ADDR start_pc, current_pc;
901 struct avr_unwind_cache *info;
902 struct gdbarch *gdbarch;
903 struct gdbarch_tdep *tdep;
906 if (*this_prologue_cache)
907 return *this_prologue_cache;
909 info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache);
910 *this_prologue_cache = info;
911 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
914 info->prologue_type = AVR_PROLOGUE_NONE;
916 start_pc = get_frame_func (this_frame);
917 current_pc = get_frame_pc (this_frame);
918 if ((start_pc > 0) && (start_pc <= current_pc))
919 avr_scan_prologue (get_frame_arch (this_frame),
920 start_pc, current_pc, info);
922 if ((info->prologue_type != AVR_PROLOGUE_NONE)
923 && (info->prologue_type != AVR_PROLOGUE_MAIN))
925 ULONGEST high_base; /* High byte of FP */
927 /* The SP was moved to the FP. This indicates that a new frame
928 was created. Get THIS frame's FP value by unwinding it from
930 this_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM);
931 high_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM + 1);
932 this_base += (high_base << 8);
934 /* The FP points at the last saved register. Adjust the FP back
935 to before the first saved register giving the SP. */
936 prev_sp = this_base + info->size;
940 /* Assume that the FP is this frame's SP but with that pushed
941 stack space added back. */
942 this_base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
943 prev_sp = this_base + info->size;
946 /* Add 1 here to adjust for the post-decrement nature of the push
948 info->prev_sp = avr_make_saddr (prev_sp + 1);
949 info->base = avr_make_saddr (this_base);
951 gdbarch = get_frame_arch (this_frame);
953 /* Adjust all the saved registers so that they contain addresses and not
955 for (i = 0; i < gdbarch_num_regs (gdbarch) - 1; i++)
956 if (info->saved_regs[i].addr > 0)
957 info->saved_regs[i].addr = info->prev_sp - info->saved_regs[i].addr;
959 /* Except for the main and startup code, the return PC is always saved on
960 the stack and is at the base of the frame. */
962 if (info->prologue_type != AVR_PROLOGUE_MAIN)
963 info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp;
965 /* The previous frame's SP needed to be computed. Save the computed
967 tdep = gdbarch_tdep (gdbarch);
968 trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM,
969 info->prev_sp - 1 + tdep->call_length);
975 avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
979 pc = frame_unwind_register_unsigned (next_frame, AVR_PC_REGNUM);
981 return avr_make_iaddr (pc);
985 avr_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
989 sp = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM);
991 return avr_make_saddr (sp);
994 /* Given a GDB frame, determine the address of the calling function's
995 frame. This will be used to create a new GDB frame struct. */
998 avr_frame_this_id (struct frame_info *this_frame,
999 void **this_prologue_cache,
1000 struct frame_id *this_id)
1002 struct avr_unwind_cache *info
1003 = avr_frame_unwind_cache (this_frame, this_prologue_cache);
1008 /* The FUNC is easy. */
1009 func = get_frame_func (this_frame);
1011 /* Hopefully the prologue analysis either correctly determined the
1012 frame's base (which is the SP from the previous frame), or set
1013 that base to "NULL". */
1014 base = info->prev_sp;
1018 id = frame_id_build (base, func);
1022 static struct value *
1023 avr_frame_prev_register (struct frame_info *this_frame,
1024 void **this_prologue_cache, int regnum)
1026 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1027 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1028 struct avr_unwind_cache *info
1029 = avr_frame_unwind_cache (this_frame, this_prologue_cache);
1031 if (regnum == AVR_PC_REGNUM)
1033 if (trad_frame_addr_p (info->saved_regs, regnum))
1035 /* Reading the return PC from the PC register is slightly
1036 abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes,
1037 but in reality, only two bytes (3 in upcoming mega256) are
1038 stored on the stack.
1040 Also, note that the value on the stack is an addr to a word
1041 not a byte, so we will need to multiply it by two at some
1044 And to confuse matters even more, the return address stored
1045 on the stack is in big endian byte order, even though most
1046 everything else about the avr is little endian. Ick! */
1049 unsigned char buf[3];
1050 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1051 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1053 read_memory (info->saved_regs[regnum].addr, buf, tdep->call_length);
1055 /* Extract the PC read from memory as a big-endian. */
1057 for (i = 0; i < tdep->call_length; i++)
1058 pc = (pc << 8) | buf[i];
1060 return frame_unwind_got_constant (this_frame, regnum, pc << 1);
1063 return frame_unwind_got_optimized (this_frame, regnum);
1066 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1069 static const struct frame_unwind avr_frame_unwind = {
1072 avr_frame_prev_register,
1074 default_frame_sniffer
1078 avr_frame_base_address (struct frame_info *this_frame, void **this_cache)
1080 struct avr_unwind_cache *info
1081 = avr_frame_unwind_cache (this_frame, this_cache);
1086 static const struct frame_base avr_frame_base = {
1088 avr_frame_base_address,
1089 avr_frame_base_address,
1090 avr_frame_base_address
1093 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
1094 frame. The frame ID's base needs to match the TOS value saved by
1095 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
1097 static struct frame_id
1098 avr_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1102 base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
1103 return frame_id_build (avr_make_saddr (base), get_frame_pc (this_frame));
1106 /* When arguments must be pushed onto the stack, they go on in reverse
1107 order. The below implements a FILO (stack) to do this. */
1112 struct stack_item *prev;
1116 static struct stack_item *
1117 push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len)
1119 struct stack_item *si;
1120 si = xmalloc (sizeof (struct stack_item));
1121 si->data = xmalloc (len);
1124 memcpy (si->data, contents, len);
1128 static struct stack_item *pop_stack_item (struct stack_item *si);
1129 static struct stack_item *
1130 pop_stack_item (struct stack_item *si)
1132 struct stack_item *dead = si;
1139 /* Setup the function arguments for calling a function in the inferior.
1141 On the AVR architecture, there are 18 registers (R25 to R8) which are
1142 dedicated for passing function arguments. Up to the first 18 arguments
1143 (depending on size) may go into these registers. The rest go on the stack.
1145 All arguments are aligned to start in even-numbered registers (odd-sized
1146 arguments, including char, have one free register above them). For example,
1147 an int in arg1 and a char in arg2 would be passed as such:
1152 Arguments that are larger than 2 bytes will be split between two or more
1153 registers as available, but will NOT be split between a register and the
1154 stack. Arguments that go onto the stack are pushed last arg first (this is
1155 similar to the d10v). */
1157 /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be
1160 An exceptional case exists for struct arguments (and possibly other
1161 aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but
1162 not a multiple of WORDSIZE bytes. In this case the argument is never split
1163 between the registers and the stack, but instead is copied in its entirety
1164 onto the stack, AND also copied into as many registers as there is room
1165 for. In other words, space in registers permitting, two copies of the same
1166 argument are passed in. As far as I can tell, only the one on the stack is
1167 used, although that may be a function of the level of compiler
1168 optimization. I suspect this is a compiler bug. Arguments of these odd
1169 sizes are left-justified within the word (as opposed to arguments smaller
1170 than WORDSIZE bytes, which are right-justified).
1172 If the function is to return an aggregate type such as a struct, the caller
1173 must allocate space into which the callee will copy the return value. In
1174 this case, a pointer to the return value location is passed into the callee
1175 in register R0, which displaces one of the other arguments passed in via
1176 registers R0 to R2. */
1179 avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1180 struct regcache *regcache, CORE_ADDR bp_addr,
1181 int nargs, struct value **args, CORE_ADDR sp,
1182 int struct_return, CORE_ADDR struct_addr)
1184 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1186 unsigned char buf[3];
1187 int call_length = gdbarch_tdep (gdbarch)->call_length;
1188 CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr);
1189 int regnum = AVR_ARGN_REGNUM;
1190 struct stack_item *si = NULL;
1194 regcache_cooked_write_unsigned (regcache, regnum--,
1195 struct_addr & 0xff);
1196 regcache_cooked_write_unsigned (regcache, regnum--,
1197 (struct_addr >> 8) & 0xff);
1200 for (i = 0; i < nargs; i++)
1204 struct value *arg = args[i];
1205 struct type *type = check_typedef (value_type (arg));
1206 const bfd_byte *contents = value_contents (arg);
1207 int len = TYPE_LENGTH (type);
1209 /* Calculate the potential last register needed. */
1210 last_regnum = regnum - (len + (len & 1));
1212 /* If there are registers available, use them. Once we start putting
1213 stuff on the stack, all subsequent args go on stack. */
1214 if ((si == NULL) && (last_regnum >= 8))
1218 /* Skip a register for odd length args. */
1222 val = extract_unsigned_integer (contents, len, byte_order);
1223 for (j = 0; j < len; j++)
1224 regcache_cooked_write_unsigned
1225 (regcache, regnum--, val >> (8 * (len - j - 1)));
1227 /* No registers available, push the args onto the stack. */
1230 /* From here on, we don't care about regnum. */
1231 si = push_stack_item (si, contents, len);
1235 /* Push args onto the stack. */
1239 /* Add 1 to sp here to account for post decr nature of pushes. */
1240 write_memory (sp + 1, si->data, si->len);
1241 si = pop_stack_item (si);
1244 /* Set the return address. For the avr, the return address is the BP_ADDR.
1245 Need to push the return address onto the stack noting that it needs to be
1246 in big-endian order on the stack. */
1247 for (i = 1; i <= call_length; i++)
1249 buf[call_length - i] = return_pc & 0xff;
1254 /* Use 'sp + 1' since pushes are post decr ops. */
1255 write_memory (sp + 1, buf, call_length);
1257 /* Finally, update the SP register. */
1258 regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM,
1259 avr_convert_saddr_to_raw (sp));
1261 /* Return SP value for the dummy frame, where the return address hasn't been
1263 return sp + call_length;
1266 /* Unfortunately dwarf2 register for SP is 32. */
1269 avr_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1271 if (reg >= 0 && reg < 32)
1274 return AVR_SP_REGNUM;
1276 warning (_("Unmapped DWARF Register #%d encountered."), reg);
1281 /* Initialize the gdbarch structure for the AVR's. */
1283 static struct gdbarch *
1284 avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1286 struct gdbarch *gdbarch;
1287 struct gdbarch_tdep *tdep;
1288 struct gdbarch_list *best_arch;
1291 /* Avr-6 call instructions save 3 bytes. */
1292 switch (info.bfd_arch_info->mach)
1307 /* If there is already a candidate, use it. */
1308 for (best_arch = gdbarch_list_lookup_by_info (arches, &info);
1310 best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info))
1312 if (gdbarch_tdep (best_arch->gdbarch)->call_length == call_length)
1313 return best_arch->gdbarch;
1316 /* None found, create a new architecture from the information provided. */
1317 tdep = XMALLOC (struct gdbarch_tdep);
1318 gdbarch = gdbarch_alloc (&info, tdep);
1320 tdep->call_length = call_length;
1322 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1323 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1324 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1325 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1326 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1327 set_gdbarch_addr_bit (gdbarch, 32);
1329 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1330 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1331 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1333 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1334 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1335 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
1337 set_gdbarch_read_pc (gdbarch, avr_read_pc);
1338 set_gdbarch_write_pc (gdbarch, avr_write_pc);
1340 set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS);
1342 set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM);
1343 set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM);
1345 set_gdbarch_register_name (gdbarch, avr_register_name);
1346 set_gdbarch_register_type (gdbarch, avr_register_type);
1348 set_gdbarch_return_value (gdbarch, avr_return_value);
1349 set_gdbarch_print_insn (gdbarch, print_insn_avr);
1351 set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call);
1353 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, avr_dwarf_reg_to_regnum);
1355 set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer);
1356 set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address);
1358 set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue);
1359 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1361 set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc);
1363 frame_unwind_append_unwinder (gdbarch, &avr_frame_unwind);
1364 frame_base_set_default (gdbarch, &avr_frame_base);
1366 set_gdbarch_dummy_id (gdbarch, avr_dummy_id);
1368 set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc);
1369 set_gdbarch_unwind_sp (gdbarch, avr_unwind_sp);
1374 /* Send a query request to the avr remote target asking for values of the io
1375 registers. If args parameter is not NULL, then the user has requested info
1376 on a specific io register [This still needs implemented and is ignored for
1377 now]. The query string should be one of these forms:
1379 "Ravr.io_reg" -> reply is "NN" number of io registers
1381 "Ravr.io_reg:addr,len" where addr is first register and len is number of
1382 registers to be read. The reply should be "<NAME>,VV;" for each io register
1383 where, <NAME> is a string, and VV is the hex value of the register.
1385 All io registers are 8-bit. */
1388 avr_io_reg_read_command (char *args, int from_tty)
1394 unsigned int nreg = 0;
1398 /* Find out how many io registers the target has. */
1399 bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR,
1400 "avr.io_reg", &buf);
1404 fprintf_unfiltered (gdb_stderr,
1405 _("ERR: info io_registers NOT supported "
1406 "by current target\n"));
1410 if (sscanf (buf, "%x", &nreg) != 1)
1412 fprintf_unfiltered (gdb_stderr,
1413 _("Error fetching number of io registers\n"));
1420 reinitialize_more_filter ();
1422 printf_unfiltered (_("Target has %u io registers:\n\n"), nreg);
1424 /* only fetch up to 8 registers at a time to keep the buffer small */
1427 for (i = 0; i < nreg; i += step)
1429 /* how many registers this round? */
1432 j = nreg - i; /* last block is less than 8 registers */
1434 snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j);
1435 bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR,
1439 for (k = i; k < (i + j); k++)
1441 if (sscanf (p, "%[^,],%x;", query, &val) == 2)
1443 printf_filtered ("[%02x] %-15s : %02x\n", k, query, val);
1444 while ((*p != ';') && (*p != '\0'))
1446 p++; /* skip over ';' */
1456 extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */
1459 _initialize_avr_tdep (void)
1461 register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init);
1463 /* Add a new command to allow the user to query the avr remote target for
1464 the values of the io space registers in a saner way than just using
1467 /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr
1468 io_registers' to signify it is not available on other platforms. */
1470 add_cmd ("io_registers", class_info, avr_io_reg_read_command,
1471 _("query remote avr target for io space register values"),