1 /* Target-dependent code for Atmel AVR, for GDB.
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2006, 2007 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 /* Contributed by Theodore A. Roth, troth@openavr.org */
23 /* Portions of this file were taken from the original gdb-4.18 patch developed
24 by Denis Chertykov, denisc@overta.ru */
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
36 #include "arch-utils.h"
38 #include "gdb_string.h"
43 (AVR micros are pure Harvard Architecture processors.)
45 The AVR family of microcontrollers have three distinctly different memory
46 spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for
47 the most part to store program instructions. The sram is 8 bits wide and is
48 used for the stack and the heap. Some devices lack sram and some can have
49 an additional external sram added on as a peripheral.
51 The eeprom is 8 bits wide and is used to store data when the device is
52 powered down. Eeprom is not directly accessible, it can only be accessed
53 via io-registers using a special algorithm. Accessing eeprom via gdb's
54 remote serial protocol ('m' or 'M' packets) looks difficult to do and is
55 not included at this time.
57 [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or
58 written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to
59 work, the remote target must be able to handle eeprom accesses and perform
60 the address translation.]
62 All three memory spaces have physical addresses beginning at 0x0. In
63 addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit
64 bytes instead of the 16 bit wide words used by the real device for the
67 In order for remote targets to work correctly, extra bits must be added to
68 addresses before they are send to the target or received from the target
69 via the remote serial protocol. The extra bits are the MSBs and are used to
70 decode which memory space the address is referring to. */
73 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
76 #define EXTRACT_INSN(addr) extract_unsigned_integer(addr,2)
78 /* Constants: prefixed with AVR_ to avoid name space clashes */
92 AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/,
93 AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/,
95 AVR_PC_REG_INDEX = 35, /* index into array of registers */
97 AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */
99 /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */
102 /* Number of the last pushed register. r17 for current avr-gcc */
103 AVR_LAST_PUSHED_REGNUM = 17,
105 AVR_ARG1_REGNUM = 24, /* Single byte argument */
106 AVR_ARGN_REGNUM = 25, /* Multi byte argments */
108 AVR_RET1_REGNUM = 24, /* Single byte return value */
109 AVR_RETN_REGNUM = 25, /* Multi byte return value */
111 /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8
112 bits? Do these have to match the bfd vma values?. It sure would make
113 things easier in the future if they didn't need to match.
115 Note: I chose these values so as to be consistent with bfd vma
118 TRoth/2002-04-08: There is already a conflict with very large programs
119 in the mega128. The mega128 has 128K instruction bytes (64K words),
120 thus the Most Significant Bit is 0x10000 which gets masked off my
123 The problem manifests itself when trying to set a breakpoint in a
124 function which resides in the upper half of the instruction space and
125 thus requires a 17-bit address.
127 For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK
128 from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet,
129 but could be for some remote targets by just adding the correct offset
130 to the address and letting the remote target handle the low-level
131 details of actually accessing the eeprom. */
133 AVR_IMEM_START = 0x00000000, /* INSN memory */
134 AVR_SMEM_START = 0x00800000, /* SRAM memory */
136 /* No eeprom mask defined */
137 AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */
139 AVR_EMEM_START = 0x00810000, /* EEPROM memory */
140 AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */
146 NORMAL and CALL are the typical types (the -mcall-prologues gcc option
147 causes the generation of the CALL type prologues). */
150 AVR_PROLOGUE_NONE, /* No prologue */
152 AVR_PROLOGUE_CALL, /* -mcall-prologues */
154 AVR_PROLOGUE_INTR, /* interrupt handler */
155 AVR_PROLOGUE_SIG, /* signal handler */
158 /* Any function with a frame looks like this
159 ....... <-SP POINTS HERE
160 LOCALS1 <-FP POINTS HERE
169 struct avr_unwind_cache
171 /* The previous frame's inner most stack address. Used as this
172 frame ID's stack_addr. */
174 /* The frame's base, optionally used by the high-level debug info. */
178 /* Table indicating the location of each and every register. */
179 struct trad_frame_saved_reg *saved_regs;
184 /* FIXME: TRoth: is there anything to put here? */
188 /* Lookup the name of a register given it's number. */
191 avr_register_name (int regnum)
193 static char *register_names[] = {
194 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
195 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
196 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
197 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
202 if (regnum >= (sizeof (register_names) / sizeof (*register_names)))
204 return register_names[regnum];
207 /* Return the GDB type object for the "standard" data type
208 of data in register N. */
211 avr_register_type (struct gdbarch *gdbarch, int reg_nr)
213 if (reg_nr == AVR_PC_REGNUM)
214 return builtin_type_uint32;
215 if (reg_nr == AVR_SP_REGNUM)
216 return builtin_type_void_data_ptr;
218 return builtin_type_uint8;
221 /* Instruction address checks and convertions. */
224 avr_make_iaddr (CORE_ADDR x)
226 return ((x) | AVR_IMEM_START);
229 /* FIXME: TRoth: Really need to use a larger mask for instructions. Some
230 devices are already up to 128KBytes of flash space.
232 TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */
235 avr_convert_iaddr_to_raw (CORE_ADDR x)
237 return ((x) & 0xffffffff);
240 /* SRAM address checks and convertions. */
243 avr_make_saddr (CORE_ADDR x)
245 return ((x) | AVR_SMEM_START);
249 avr_convert_saddr_to_raw (CORE_ADDR x)
251 return ((x) & 0xffffffff);
254 /* EEPROM address checks and convertions. I don't know if these will ever
255 actually be used, but I've added them just the same. TRoth */
257 /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large
258 programs in the mega128. */
260 /* static CORE_ADDR */
261 /* avr_make_eaddr (CORE_ADDR x) */
263 /* return ((x) | AVR_EMEM_START); */
267 /* avr_eaddr_p (CORE_ADDR x) */
269 /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */
272 /* static CORE_ADDR */
273 /* avr_convert_eaddr_to_raw (CORE_ADDR x) */
275 /* return ((x) & 0xffffffff); */
278 /* Convert from address to pointer and vice-versa. */
281 avr_address_to_pointer (struct type *type, gdb_byte *buf, CORE_ADDR addr)
283 /* Is it a code address? */
284 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
285 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD)
287 store_unsigned_integer (buf, TYPE_LENGTH (type),
288 avr_convert_iaddr_to_raw (addr >> 1));
292 /* Strip off any upper segment bits. */
293 store_unsigned_integer (buf, TYPE_LENGTH (type),
294 avr_convert_saddr_to_raw (addr));
299 avr_pointer_to_address (struct type *type, const gdb_byte *buf)
301 CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type));
303 /* Is it a code address? */
304 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
305 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
306 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type)))
307 return avr_make_iaddr (addr << 1);
309 return avr_make_saddr (addr);
313 avr_read_pc (struct regcache *regcache)
316 regcache_cooked_read_unsigned (regcache, AVR_PC_REGNUM, &pc);
317 return avr_make_iaddr (pc);
321 avr_write_pc (struct regcache *regcache, CORE_ADDR val)
323 regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM,
324 avr_convert_iaddr_to_raw (val));
328 avr_scan_arg_moves (int vpc, unsigned char *prologue)
332 for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2)
334 insn = EXTRACT_INSN (&prologue[vpc]);
335 if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */
337 else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */
346 /* Function: avr_scan_prologue
348 This function decodes an AVR function prologue to determine:
349 1) the size of the stack frame
350 2) which registers are saved on it
351 3) the offsets of saved regs
352 This information is stored in the avr_unwind_cache structure.
354 Some devices lack the sbiw instruction, so on those replace this:
360 A typical AVR function prologue with a frame pointer might look like this:
361 push rXX ; saved regs
367 sbiw r28,<LOCALS_SIZE>
368 in __tmp_reg__,__SREG__
371 out __SREG__,__tmp_reg__
374 A typical AVR function prologue without a frame pointer might look like
376 push rXX ; saved regs
379 A main function prologue looks like this:
380 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
381 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
385 A signal handler prologue looks like this:
388 in __tmp_reg__, __SREG__
391 push rXX ; save registers r18:r27, r30:r31
393 push r28 ; save frame pointer
397 sbiw r28, <LOCALS_SIZE>
401 A interrupt handler prologue looks like this:
405 in __tmp_reg__, __SREG__
408 push rXX ; save registers r18:r27, r30:r31
410 push r28 ; save frame pointer
414 sbiw r28, <LOCALS_SIZE>
420 A `-mcall-prologues' prologue looks like this (Note that the megas use a
421 jmp instead of a rjmp, thus the prologue is one word larger since jmp is a
422 32 bit insn and rjmp is a 16 bit insn):
423 ldi r26,lo8(<LOCALS_SIZE>)
424 ldi r27,hi8(<LOCALS_SIZE>)
425 ldi r30,pm_lo8(.L_foo_body)
426 ldi r31,pm_hi8(.L_foo_body)
427 rjmp __prologue_saves__+RRR
430 /* Not really part of a prologue, but still need to scan for it, is when a
431 function prologue moves values passed via registers as arguments to new
432 registers. In this case, all local variables live in registers, so there
433 may be some register saves. This is what it looks like:
437 There could be multiple movw's. If the target doesn't have a movw insn, it
438 will use two mov insns. This could be done after any of the above prologue
442 avr_scan_prologue (CORE_ADDR pc, struct avr_unwind_cache *info)
447 struct minimal_symbol *msymbol;
448 unsigned char prologue[AVR_MAX_PROLOGUE_SIZE];
451 /* FIXME: TRoth/2003-06-11: This could be made more efficient by only
452 reading in the bytes of the prologue. The problem is that the figuring
453 out where the end of the prologue is is a bit difficult. The old code
454 tried to do that, but failed quite often. */
455 read_memory (pc, prologue, AVR_MAX_PROLOGUE_SIZE);
457 /* Scanning main()'s prologue
458 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
459 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
466 unsigned char img[] = {
467 0xde, 0xbf, /* out __SP_H__,r29 */
468 0xcd, 0xbf /* out __SP_L__,r28 */
471 insn = EXTRACT_INSN (&prologue[vpc]);
472 /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */
473 if ((insn & 0xf0f0) == 0xe0c0)
475 locals = (insn & 0xf) | ((insn & 0x0f00) >> 4);
476 insn = EXTRACT_INSN (&prologue[vpc + 2]);
477 /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */
478 if ((insn & 0xf0f0) == 0xe0d0)
480 locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
481 if (memcmp (prologue + vpc + 4, img, sizeof (img)) == 0)
483 info->prologue_type = AVR_PROLOGUE_MAIN;
491 /* Scanning `-mcall-prologues' prologue
492 Classic prologue is 10 bytes, mega prologue is a 12 bytes long */
494 while (1) /* Using a while to avoid many goto's */
501 insn = EXTRACT_INSN (&prologue[vpc]);
502 /* ldi r26,<LOCALS_SIZE> */
503 if ((insn & 0xf0f0) != 0xe0a0)
505 loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4);
508 insn = EXTRACT_INSN (&prologue[vpc + 2]);
509 /* ldi r27,<LOCALS_SIZE> / 256 */
510 if ((insn & 0xf0f0) != 0xe0b0)
512 loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
515 insn = EXTRACT_INSN (&prologue[vpc + 4]);
516 /* ldi r30,pm_lo8(.L_foo_body) */
517 if ((insn & 0xf0f0) != 0xe0e0)
519 body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4);
522 insn = EXTRACT_INSN (&prologue[vpc + 6]);
523 /* ldi r31,pm_hi8(.L_foo_body) */
524 if ((insn & 0xf0f0) != 0xe0f0)
526 body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
529 msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL);
533 insn = EXTRACT_INSN (&prologue[vpc + 8]);
534 /* rjmp __prologue_saves__+RRR */
535 if ((insn & 0xf000) == 0xc000)
537 /* Extract PC relative offset from RJMP */
538 i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0);
539 /* Convert offset to byte addressable mode */
541 /* Destination address */
544 if (body_addr != (pc + 10)/2)
549 else if ((insn & 0xfe0e) == 0x940c)
551 /* Extract absolute PC address from JMP */
552 i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16)
553 | (EXTRACT_INSN (&prologue[vpc + 10]) & 0xffff));
554 /* Convert address to byte addressable mode */
557 if (body_addr != (pc + 12)/2)
565 /* Resolve offset (in words) from __prologue_saves__ symbol.
566 Which is a pushes count in `-mcall-prologues' mode */
567 num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2;
569 if (num_pushes > AVR_MAX_PUSHES)
571 fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"),
580 info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes;
582 info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1;
585 for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2);
586 from <= AVR_LAST_PUSHED_REGNUM; ++from)
587 info->saved_regs [from].addr = ++i;
589 info->size = loc_size + num_pushes;
590 info->prologue_type = AVR_PROLOGUE_CALL;
592 return pc + pc_offset;
595 /* Scan for the beginning of the prologue for an interrupt or signal
596 function. Note that we have to set the prologue type here since the
597 third stage of the prologue may not be present (e.g. no saved registered
598 or changing of the SP register). */
602 unsigned char img[] = {
603 0x78, 0x94, /* sei */
604 0x1f, 0x92, /* push r1 */
605 0x0f, 0x92, /* push r0 */
606 0x0f, 0xb6, /* in r0,0x3f SREG */
607 0x0f, 0x92, /* push r0 */
608 0x11, 0x24 /* clr r1 */
610 if (memcmp (prologue, img, sizeof (img)) == 0)
612 info->prologue_type = AVR_PROLOGUE_INTR;
614 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
615 info->saved_regs[0].addr = 2;
616 info->saved_regs[1].addr = 1;
619 else if (memcmp (img + 2, prologue, sizeof (img) - 2) == 0)
621 info->prologue_type = AVR_PROLOGUE_SIG;
622 vpc += sizeof (img) - 2;
623 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
624 info->saved_regs[0].addr = 2;
625 info->saved_regs[1].addr = 1;
630 /* First stage of the prologue scanning.
631 Scan pushes (saved registers) */
633 for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2)
635 insn = EXTRACT_INSN (&prologue[vpc]);
636 if ((insn & 0xfe0f) == 0x920f) /* push rXX */
638 /* Bits 4-9 contain a mask for registers R0-R32. */
639 int regno = (insn & 0x1f0) >> 4;
641 info->saved_regs[regno].addr = info->size;
648 if (vpc >= AVR_MAX_PROLOGUE_SIZE)
649 fprintf_unfiltered (gdb_stderr,
650 _("Hit end of prologue while scanning pushes\n"));
652 /* Second stage of the prologue scanning.
657 if (scan_stage == 1 && vpc < AVR_MAX_PROLOGUE_SIZE)
659 unsigned char img[] = {
660 0xcd, 0xb7, /* in r28,__SP_L__ */
661 0xde, 0xb7 /* in r29,__SP_H__ */
663 unsigned short insn1;
665 if (memcmp (prologue + vpc, img, sizeof (img)) == 0)
672 /* Third stage of the prologue scanning. (Really two stages)
674 sbiw r28,XX or subi r28,lo8(XX)
676 in __tmp_reg__,__SREG__
679 out __SREG__,__tmp_reg__
682 if (scan_stage == 2 && vpc < AVR_MAX_PROLOGUE_SIZE)
685 unsigned char img[] = {
686 0x0f, 0xb6, /* in r0,0x3f */
687 0xf8, 0x94, /* cli */
688 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
689 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */
690 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
692 unsigned char img_sig[] = {
693 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
694 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
696 unsigned char img_int[] = {
697 0xf8, 0x94, /* cli */
698 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
699 0x78, 0x94, /* sei */
700 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
703 insn = EXTRACT_INSN (&prologue[vpc]);
705 if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */
706 locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2);
707 else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */
709 locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4);
710 insn = EXTRACT_INSN (&prologue[vpc]);
712 locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4) << 8);
717 /* Scan the last part of the prologue. May not be present for interrupt
718 or signal handler functions, which is why we set the prologue type
719 when we saw the beginning of the prologue previously. */
721 if (memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0)
723 vpc += sizeof (img_sig);
725 else if (memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0)
727 vpc += sizeof (img_int);
729 if (memcmp (prologue + vpc, img, sizeof (img)) == 0)
731 info->prologue_type = AVR_PROLOGUE_NORMAL;
735 info->size += locals_size;
737 return pc + avr_scan_arg_moves (vpc, prologue);
740 /* If we got this far, we could not scan the prologue, so just return the pc
741 of the frame plus an adjustment for argument move insns. */
743 return pc + avr_scan_arg_moves (vpc, prologue);;
747 avr_skip_prologue (CORE_ADDR pc)
749 CORE_ADDR func_addr, func_end;
750 CORE_ADDR prologue_end = pc;
752 /* See what the symbol table says */
754 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
756 struct symtab_and_line sal;
757 struct avr_unwind_cache info = {0};
758 struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS];
760 info.saved_regs = saved_regs;
762 /* Need to run the prologue scanner to figure out if the function has a
763 prologue and possibly skip over moving arguments passed via registers
764 to other registers. */
766 prologue_end = avr_scan_prologue (pc, &info);
768 if (info.prologue_type == AVR_PROLOGUE_NONE)
772 sal = find_pc_line (func_addr, 0);
774 if (sal.line != 0 && sal.end < func_end)
779 /* Either we didn't find the start of this function (nothing we can do),
780 or there's no line info, or the line after the prologue is after
781 the end of the function (there probably isn't a prologue). */
786 /* Not all avr devices support the BREAK insn. Those that don't should treat
787 it as a NOP. Thus, it should be ok. Since the avr is currently a remote
788 only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */
790 static const unsigned char *
791 avr_breakpoint_from_pc (CORE_ADDR * pcptr, int *lenptr)
793 static unsigned char avr_break_insn [] = { 0x98, 0x95 };
794 *lenptr = sizeof (avr_break_insn);
795 return avr_break_insn;
798 /* Given a return value in `regbuf' with a type `valtype',
799 extract and copy its value into `valbuf'.
801 Return values are always passed via registers r25:r24:... */
804 avr_extract_return_value (struct type *type, struct regcache *regcache,
810 if (TYPE_LENGTH (type) == 1)
812 regcache_cooked_read_unsigned (regcache, 24, &c);
813 store_unsigned_integer (valbuf, 1, c);
818 /* The MSB of the return value is always in r25, calculate which
819 register holds the LSB. */
820 int lsb_reg = 25 - TYPE_LENGTH (type) + 1;
822 for (i=0; i< TYPE_LENGTH (type); i++)
824 regcache_cooked_read (regcache, lsb_reg + i,
825 (bfd_byte *) valbuf + i);
830 /* Determine, for architecture GDBARCH, how a return value of TYPE
831 should be returned. If it is supposed to be returned in registers,
832 and READBUF is non-zero, read the appropriate value from REGCACHE,
833 and copy it into READBUF. If WRITEBUF is non-zero, write the value
834 from WRITEBUF into REGCACHE. */
836 enum return_value_convention
837 avr_return_value (struct gdbarch *gdbarch, struct type *valtype,
838 struct regcache *regcache, gdb_byte *readbuf,
839 const gdb_byte *writebuf)
841 int struct_return = ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
842 || TYPE_CODE (valtype) == TYPE_CODE_UNION
843 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
844 && !(TYPE_LENGTH (valtype) == 1
845 || TYPE_LENGTH (valtype) == 2
846 || TYPE_LENGTH (valtype) == 4
847 || TYPE_LENGTH (valtype) == 8));
849 if (writebuf != NULL)
851 gdb_assert (!struct_return);
852 error (_("Cannot store return value."));
857 gdb_assert (!struct_return);
858 avr_extract_return_value (valtype, regcache, readbuf);
862 return RETURN_VALUE_STRUCT_CONVENTION;
864 return RETURN_VALUE_REGISTER_CONVENTION;
868 /* Put here the code to store, into fi->saved_regs, the addresses of
869 the saved registers of frame described by FRAME_INFO. This
870 includes special registers such as pc and fp saved in special ways
871 in the stack frame. sp is even more special: the address we return
872 for it IS the sp for the next frame. */
874 struct avr_unwind_cache *
875 avr_frame_unwind_cache (struct frame_info *next_frame,
876 void **this_prologue_cache)
881 struct avr_unwind_cache *info;
884 if ((*this_prologue_cache))
885 return (*this_prologue_cache);
887 info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache);
888 (*this_prologue_cache) = info;
889 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
892 info->prologue_type = AVR_PROLOGUE_NONE;
894 pc = frame_func_unwind (next_frame, NORMAL_FRAME);
896 if ((pc > 0) && (pc < frame_pc_unwind (next_frame)))
897 avr_scan_prologue (pc, info);
899 if ((info->prologue_type != AVR_PROLOGUE_NONE)
900 && (info->prologue_type != AVR_PROLOGUE_MAIN))
902 ULONGEST high_base; /* High byte of FP */
904 /* The SP was moved to the FP. This indicates that a new frame
905 was created. Get THIS frame's FP value by unwinding it from
907 this_base = frame_unwind_register_unsigned (next_frame, AVR_FP_REGNUM);
908 high_base = frame_unwind_register_unsigned (next_frame, AVR_FP_REGNUM+1);
909 this_base += (high_base << 8);
911 /* The FP points at the last saved register. Adjust the FP back
912 to before the first saved register giving the SP. */
913 prev_sp = this_base + info->size;
917 /* Assume that the FP is this frame's SP but with that pushed
918 stack space added back. */
919 this_base = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM);
920 prev_sp = this_base + info->size;
923 /* Add 1 here to adjust for the post-decrement nature of the push
925 info->prev_sp = avr_make_saddr (prev_sp+1);
927 info->base = avr_make_saddr (this_base);
929 /* Adjust all the saved registers so that they contain addresses and not
931 for (i = 0; i < gdbarch_num_regs (current_gdbarch) - 1; i++)
932 if (info->saved_regs[i].addr)
934 info->saved_regs[i].addr = (info->prev_sp - info->saved_regs[i].addr);
937 /* Except for the main and startup code, the return PC is always saved on
938 the stack and is at the base of the frame. */
940 if (info->prologue_type != AVR_PROLOGUE_MAIN)
942 info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp;
945 /* The previous frame's SP needed to be computed. Save the computed
947 trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM, info->prev_sp+1);
953 avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
957 pc = frame_unwind_register_unsigned (next_frame, AVR_PC_REGNUM);
959 return avr_make_iaddr (pc);
963 avr_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
967 sp = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM);
969 return avr_make_saddr (sp);
972 /* Given a GDB frame, determine the address of the calling function's
973 frame. This will be used to create a new GDB frame struct. */
976 avr_frame_this_id (struct frame_info *next_frame,
977 void **this_prologue_cache,
978 struct frame_id *this_id)
980 struct avr_unwind_cache *info
981 = avr_frame_unwind_cache (next_frame, this_prologue_cache);
986 /* The FUNC is easy. */
987 func = frame_func_unwind (next_frame, NORMAL_FRAME);
989 /* Hopefully the prologue analysis either correctly determined the
990 frame's base (which is the SP from the previous frame), or set
991 that base to "NULL". */
992 base = info->prev_sp;
996 id = frame_id_build (base, func);
1001 avr_frame_prev_register (struct frame_info *next_frame,
1002 void **this_prologue_cache,
1003 int regnum, int *optimizedp,
1004 enum lval_type *lvalp, CORE_ADDR *addrp,
1005 int *realnump, gdb_byte *bufferp)
1007 struct avr_unwind_cache *info
1008 = avr_frame_unwind_cache (next_frame, this_prologue_cache);
1010 if (regnum == AVR_PC_REGNUM)
1012 if (trad_frame_addr_p (info->saved_regs, regnum))
1015 *lvalp = lval_memory;
1016 *addrp = info->saved_regs[regnum].addr;
1018 if (bufferp != NULL)
1020 /* Reading the return PC from the PC register is slightly
1021 abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes,
1022 but in reality, only two bytes (3 in upcoming mega256) are
1023 stored on the stack.
1025 Also, note that the value on the stack is an addr to a word
1026 not a byte, so we will need to multiply it by two at some
1029 And to confuse matters even more, the return address stored
1030 on the stack is in big endian byte order, even though most
1031 everything else about the avr is little endian. Ick! */
1033 /* FIXME: number of bytes read here will need updated for the
1034 mega256 when it is available. */
1038 unsigned char buf[2];
1040 read_memory (info->saved_regs[regnum].addr, buf, 2);
1042 /* Convert the PC read from memory as a big-endian to
1043 little-endian order. */
1048 pc = (extract_unsigned_integer (buf, 2) * 2);
1049 store_unsigned_integer (bufferp,
1050 register_size (current_gdbarch, regnum),
1056 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
1057 optimizedp, lvalp, addrp, realnump, bufferp);
1060 static const struct frame_unwind avr_frame_unwind = {
1063 avr_frame_prev_register
1066 const struct frame_unwind *
1067 avr_frame_sniffer (struct frame_info *next_frame)
1069 return &avr_frame_unwind;
1073 avr_frame_base_address (struct frame_info *next_frame, void **this_cache)
1075 struct avr_unwind_cache *info
1076 = avr_frame_unwind_cache (next_frame, this_cache);
1081 static const struct frame_base avr_frame_base = {
1083 avr_frame_base_address,
1084 avr_frame_base_address,
1085 avr_frame_base_address
1088 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1089 dummy frame. The frame ID's base needs to match the TOS value
1090 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1093 static struct frame_id
1094 avr_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1098 base = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM);
1099 return frame_id_build (avr_make_saddr (base), frame_pc_unwind (next_frame));
1102 /* When arguments must be pushed onto the stack, they go on in reverse
1103 order. The below implements a FILO (stack) to do this. */
1108 struct stack_item *prev;
1112 static struct stack_item *
1113 push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len)
1115 struct stack_item *si;
1116 si = xmalloc (sizeof (struct stack_item));
1117 si->data = xmalloc (len);
1120 memcpy (si->data, contents, len);
1124 static struct stack_item *pop_stack_item (struct stack_item *si);
1125 static struct stack_item *
1126 pop_stack_item (struct stack_item *si)
1128 struct stack_item *dead = si;
1135 /* Setup the function arguments for calling a function in the inferior.
1137 On the AVR architecture, there are 18 registers (R25 to R8) which are
1138 dedicated for passing function arguments. Up to the first 18 arguments
1139 (depending on size) may go into these registers. The rest go on the stack.
1141 All arguments are aligned to start in even-numbered registers (odd-sized
1142 arguments, including char, have one free register above them). For example,
1143 an int in arg1 and a char in arg2 would be passed as such:
1148 Arguments that are larger than 2 bytes will be split between two or more
1149 registers as available, but will NOT be split between a register and the
1150 stack. Arguments that go onto the stack are pushed last arg first (this is
1151 similar to the d10v). */
1153 /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be
1156 An exceptional case exists for struct arguments (and possibly other
1157 aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but
1158 not a multiple of WORDSIZE bytes. In this case the argument is never split
1159 between the registers and the stack, but instead is copied in its entirety
1160 onto the stack, AND also copied into as many registers as there is room
1161 for. In other words, space in registers permitting, two copies of the same
1162 argument are passed in. As far as I can tell, only the one on the stack is
1163 used, although that may be a function of the level of compiler
1164 optimization. I suspect this is a compiler bug. Arguments of these odd
1165 sizes are left-justified within the word (as opposed to arguments smaller
1166 than WORDSIZE bytes, which are right-justified).
1168 If the function is to return an aggregate type such as a struct, the caller
1169 must allocate space into which the callee will copy the return value. In
1170 this case, a pointer to the return value location is passed into the callee
1171 in register R0, which displaces one of the other arguments passed in via
1172 registers R0 to R2. */
1175 avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1176 struct regcache *regcache, CORE_ADDR bp_addr,
1177 int nargs, struct value **args, CORE_ADDR sp,
1178 int struct_return, CORE_ADDR struct_addr)
1181 unsigned char buf[2];
1182 CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr);
1183 int regnum = AVR_ARGN_REGNUM;
1184 struct stack_item *si = NULL;
1187 /* FIXME: TRoth/2003-06-18: Not sure what to do when returning a struct. */
1190 fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr);
1191 regcache_cooked_write_unsigned (regcache, argreg--, struct_addr & 0xff);
1192 regcache_cooked_write_unsigned (regcache, argreg--, (struct_addr >>8) & 0xff);
1196 for (i = 0; i < nargs; i++)
1200 struct value *arg = args[i];
1201 struct type *type = check_typedef (value_type (arg));
1202 const bfd_byte *contents = value_contents (arg);
1203 int len = TYPE_LENGTH (type);
1205 /* Calculate the potential last register needed. */
1206 last_regnum = regnum - (len + (len & 1));
1208 /* If there are registers available, use them. Once we start putting
1209 stuff on the stack, all subsequent args go on stack. */
1210 if ((si == NULL) && (last_regnum >= 8))
1214 /* Skip a register for odd length args. */
1218 val = extract_unsigned_integer (contents, len);
1219 for (j=0; j<len; j++)
1221 regcache_cooked_write_unsigned (regcache, regnum--,
1222 val >> (8*(len-j-1)));
1225 /* No registers available, push the args onto the stack. */
1228 /* From here on, we don't care about regnum. */
1229 si = push_stack_item (si, contents, len);
1233 /* Push args onto the stack. */
1237 /* Add 1 to sp here to account for post decr nature of pushes. */
1238 write_memory (sp+1, si->data, si->len);
1239 si = pop_stack_item (si);
1242 /* Set the return address. For the avr, the return address is the BP_ADDR.
1243 Need to push the return address onto the stack noting that it needs to be
1244 in big-endian order on the stack. */
1245 buf[0] = (return_pc >> 8) & 0xff;
1246 buf[1] = return_pc & 0xff;
1249 write_memory (sp+1, buf, 2); /* Add one since pushes are post decr ops. */
1251 /* Finally, update the SP register. */
1252 regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM,
1253 avr_convert_saddr_to_raw (sp));
1258 /* Initialize the gdbarch structure for the AVR's. */
1260 static struct gdbarch *
1261 avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1263 struct gdbarch *gdbarch;
1264 struct gdbarch_tdep *tdep;
1266 /* Find a candidate among the list of pre-declared architectures. */
1267 arches = gdbarch_list_lookup_by_info (arches, &info);
1269 return arches->gdbarch;
1271 /* None found, create a new architecture from the information provided. */
1272 tdep = XMALLOC (struct gdbarch_tdep);
1273 gdbarch = gdbarch_alloc (&info, tdep);
1275 /* If we ever need to differentiate the device types, do it here. */
1276 switch (info.bfd_arch_info->mach)
1286 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1287 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1288 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1289 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1290 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1291 set_gdbarch_addr_bit (gdbarch, 32);
1293 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1294 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1295 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1297 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1298 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1299 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
1301 set_gdbarch_read_pc (gdbarch, avr_read_pc);
1302 set_gdbarch_write_pc (gdbarch, avr_write_pc);
1304 set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS);
1306 set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM);
1307 set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM);
1309 set_gdbarch_register_name (gdbarch, avr_register_name);
1310 set_gdbarch_register_type (gdbarch, avr_register_type);
1312 set_gdbarch_return_value (gdbarch, avr_return_value);
1313 set_gdbarch_print_insn (gdbarch, print_insn_avr);
1315 set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call);
1317 set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer);
1318 set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address);
1320 set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue);
1321 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1323 set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc);
1325 frame_unwind_append_sniffer (gdbarch, avr_frame_sniffer);
1326 frame_base_set_default (gdbarch, &avr_frame_base);
1328 set_gdbarch_unwind_dummy_id (gdbarch, avr_unwind_dummy_id);
1330 set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc);
1331 set_gdbarch_unwind_sp (gdbarch, avr_unwind_sp);
1336 /* Send a query request to the avr remote target asking for values of the io
1337 registers. If args parameter is not NULL, then the user has requested info
1338 on a specific io register [This still needs implemented and is ignored for
1339 now]. The query string should be one of these forms:
1341 "Ravr.io_reg" -> reply is "NN" number of io registers
1343 "Ravr.io_reg:addr,len" where addr is first register and len is number of
1344 registers to be read. The reply should be "<NAME>,VV;" for each io register
1345 where, <NAME> is a string, and VV is the hex value of the register.
1347 All io registers are 8-bit. */
1350 avr_io_reg_read_command (char *args, int from_tty)
1356 unsigned int nreg = 0;
1360 /* Find out how many io registers the target has. */
1361 bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR,
1362 "avr.io_reg", &buf);
1366 fprintf_unfiltered (gdb_stderr,
1367 _("ERR: info io_registers NOT supported "
1368 "by current target\n"));
1372 if (sscanf (buf, "%x", &nreg) != 1)
1374 fprintf_unfiltered (gdb_stderr,
1375 _("Error fetching number of io registers\n"));
1382 reinitialize_more_filter ();
1384 printf_unfiltered (_("Target has %u io registers:\n\n"), nreg);
1386 /* only fetch up to 8 registers at a time to keep the buffer small */
1389 for (i = 0; i < nreg; i += step)
1391 /* how many registers this round? */
1394 j = nreg - i; /* last block is less than 8 registers */
1396 snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j);
1397 bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR,
1401 for (k = i; k < (i + j); k++)
1403 if (sscanf (p, "%[^,],%x;", query, &val) == 2)
1405 printf_filtered ("[%02x] %-15s : %02x\n", k, query, val);
1406 while ((*p != ';') && (*p != '\0'))
1408 p++; /* skip over ';' */
1418 extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */
1421 _initialize_avr_tdep (void)
1423 register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init);
1425 /* Add a new command to allow the user to query the avr remote target for
1426 the values of the io space registers in a saner way than just using
1429 /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr
1430 io_registers' to signify it is not available on other platforms. */
1432 add_cmd ("io_registers", class_info, avr_io_reg_read_command,
1433 _("query remote avr target for io space register values"),