1 /* Common target dependent code for GDB on ARM systems.
2 Copyright 2002 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Register numbers of various important registers. Note that some of
22 these values are "real" register numbers, and correspond to the
23 general registers of the machine, and some are "phony" register
24 numbers which are too large to be actual register numbers as far as
25 the user is concerned but do serve to get the desired values when
26 passed to read_register. */
28 #define ARM_A1_REGNUM 0 /* first integer-like argument */
29 #define ARM_A4_REGNUM 3 /* last integer-like argument */
30 #define ARM_AP_REGNUM 11
31 #define ARM_SP_REGNUM 13 /* Contains address of top of stack */
32 #define ARM_LR_REGNUM 14 /* address to return to from a function call */
33 #define ARM_PC_REGNUM 15 /* Contains program counter */
34 #define ARM_F0_REGNUM 16 /* first floating point register */
35 #define ARM_F3_REGNUM 19 /* last floating point argument register */
36 #define ARM_F7_REGNUM 23 /* last floating point register */
37 #define ARM_FPS_REGNUM 24 /* floating point status register */
38 #define ARM_PS_REGNUM 25 /* Contains processor status */
40 #define ARM_FP_REGNUM 11 /* Frame register in ARM code, if used. */
41 #define THUMB_FP_REGNUM 7 /* Frame register in Thumb code, if used. */
43 #define ARM_NUM_ARG_REGS 4
44 #define ARM_LAST_ARG_REGNUM ARM_A4_REGNUM
45 #define ARM_NUM_FP_ARG_REGS 4
46 #define ARM_LAST_FP_ARG_REGNUM ARM_F3_REGNUM
48 /* Size of integer registers. */
49 #define INT_REGISTER_RAW_SIZE 4
50 #define INT_REGISTER_VIRTUAL_SIZE 4
52 /* Say how long FP registers are. Used for documentation purposes and
53 code readability in this header. IEEE extended doubles are 80
54 bits. DWORD aligned they use 96 bits. */
55 #define FP_REGISTER_RAW_SIZE 12
57 /* GCC doesn't support long doubles (extended IEEE values). The FP
58 register virtual size is therefore 64 bits. Used for documentation
59 purposes and code readability in this header. */
60 #define FP_REGISTER_VIRTUAL_SIZE 8
62 /* Status registers are the same size as general purpose registers.
63 Used for documentation purposes and code readability in this
65 #define STATUS_REGISTER_SIZE 4
67 /* Number of machine registers. The only define actually required
68 is NUM_REGS. The other definitions are used for documentation
69 purposes and code readability. */
70 /* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS)
71 (and called PS for processor status) so the status bits can be cleared
72 from the PC (register 15). For 32 bit ARM code, a copy of CPSR is placed
74 #define NUM_FREGS 8 /* Number of floating point registers. */
75 #define NUM_SREGS 2 /* Number of status registers. */
76 #define NUM_GREGS 16 /* Number of general purpose registers. */
79 /* Instruction condition field values. */
97 #define FLAG_N 0x80000000
98 #define FLAG_Z 0x40000000
99 #define FLAG_C 0x20000000
100 #define FLAG_V 0x10000000
102 /* ABI variants that we know about. If you add to this enum, please
103 update the table of names in tm-arm.c. */
116 ARM_ABI_INVALID /* Keep this last. */
119 /* Target-dependent structure in gdbarch. */
122 enum arm_abi arm_abi; /* OS/ABI of inferior. */
123 const char *abi_name; /* Name of the above. */
124 CORE_ADDR lowest_pc; /* Lowest address at which instructions
129 #define LOWEST_PC (gdbarch_tdep (current_gdbarch)->lowest_pc)
132 /* Prototypes for internal interfaces needed by more than one MD file. */
133 int arm_pc_is_thumb_dummy (CORE_ADDR);
135 int arm_pc_is_thumb (CORE_ADDR);
137 CORE_ADDR thumb_get_next_pc (CORE_ADDR);
139 CORE_ADDR arm_get_next_pc (CORE_ADDR);
141 /* How a OS variant tells the ARM generic code that it can handle an ABI
144 arm_gdbarch_register_os_abi (enum arm_abi abi,
145 void (*init_abi)(struct gdbarch_info,