1 /* GNU/Linux on ARM target support.
2 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 #include "floatformat.h"
31 /* For arm_linux_skip_solib_resolver. */
37 This sequence of words is the instructions
43 Note this is 12 bytes. */
45 LONGEST arm_linux_call_dummy_words[] =
47 0xe1a0e00f, 0xe1a0f004, 0xef9f001
50 #ifdef GET_LONGJMP_TARGET
52 /* Figure out where the longjmp will land. We expect that we have
53 just entered longjmp and haven't yet altered r0, r1, so the
54 arguments are still in the registers. (A1_REGNUM) points at the
55 jmp_buf structure from which we extract the pc (JB_PC) that we will
56 land at. The pc is copied into ADDR. This routine returns true on
59 #define LONGJMP_TARGET_SIZE sizeof(int)
60 #define JB_ELEMENT_SIZE sizeof(int)
67 arm_get_longjmp_target (CORE_ADDR * pc)
70 char buf[LONGJMP_TARGET_SIZE];
72 jb_addr = read_register (A1_REGNUM);
74 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
78 *pc = extract_address (buf, LONGJMP_TARGET_SIZE);
82 #endif /* GET_LONGJMP_TARGET */
84 /* Extract from an array REGBUF containing the (raw) register state
85 a function return value of type TYPE, and copy that, in virtual format,
89 arm_linux_extract_return_value (struct type *type,
90 char regbuf[REGISTER_BYTES],
93 /* ScottB: This needs to be looked at to handle the different
94 floating point emulators on ARM Linux. Right now the code
95 assumes that fetch inferior registers does the right thing for
96 GDB. I suspect this won't handle NWFPE registers correctly, nor
97 will the default ARM version (arm_extract_return_value()). */
99 int regnum = (TYPE_CODE_FLT == TYPE_CODE (type)) ? F0_REGNUM : A1_REGNUM;
100 memcpy (valbuf, ®buf[REGISTER_BYTE (regnum)], TYPE_LENGTH (type));
105 This function does not support passing parameters using the FPA
106 variant of the APCS. It passes any floating point arguments in the
107 general registers and/or on the stack.
109 FIXME: This and arm_push_arguments should be merged. However this
110 function breaks on a little endian host, big endian target
111 using the COFF file format. ELF is ok.
115 /* Addresses for calling Thumb functions have the bit 0 set.
116 Here are some macros to test, set, or clear bit 0 of addresses. */
117 #define IS_THUMB_ADDR(addr) ((addr) & 1)
118 #define MAKE_THUMB_ADDR(addr) ((addr) | 1)
119 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
122 arm_linux_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
123 int struct_return, CORE_ADDR struct_addr)
126 int argnum, argreg, nstack_size;
128 /* Walk through the list of args and determine how large a temporary
129 stack is required. Need to take care here as structs may be
130 passed on the stack, and we have to to push them. */
131 nstack_size = -4 * REGISTER_SIZE; /* Some arguments go into A1-A4. */
133 if (struct_return) /* The struct address goes in A1. */
134 nstack_size += REGISTER_SIZE;
136 /* Walk through the arguments and add their size to nstack_size. */
137 for (argnum = 0; argnum < nargs; argnum++)
140 struct type *arg_type;
142 arg_type = check_typedef (VALUE_TYPE (args[argnum]));
143 len = TYPE_LENGTH (arg_type);
145 /* ANSI C code passes float arguments as integers, K&R code
146 passes float arguments as doubles. Correct for this here. */
147 if (TYPE_CODE_FLT == TYPE_CODE (arg_type) && REGISTER_SIZE == len)
148 nstack_size += FP_REGISTER_VIRTUAL_SIZE;
153 /* Allocate room on the stack, and initialize our stack frame
162 /* Initialize the integer argument register pointer. */
165 /* The struct_return pointer occupies the first parameter passing
168 write_register (argreg++, struct_addr);
170 /* Process arguments from left to right. Store as many as allowed
171 in the parameter passing registers (A1-A4), and save the rest on
172 the temporary stack. */
173 for (argnum = 0; argnum < nargs; argnum++)
178 enum type_code typecode;
179 struct type *arg_type, *target_type;
181 arg_type = check_typedef (VALUE_TYPE (args[argnum]));
182 target_type = TYPE_TARGET_TYPE (arg_type);
183 len = TYPE_LENGTH (arg_type);
184 typecode = TYPE_CODE (arg_type);
185 val = (char *) VALUE_CONTENTS (args[argnum]);
187 /* ANSI C code passes float arguments as integers, K&R code
188 passes float arguments as doubles. The .stabs record for
189 for ANSI prototype floating point arguments records the
190 type as FP_INTEGER, while a K&R style (no prototype)
191 .stabs records the type as FP_FLOAT. In this latter case
192 the compiler converts the float arguments to double before
193 calling the function. */
194 if (TYPE_CODE_FLT == typecode && REGISTER_SIZE == len)
197 dblval = extract_floating (val, len);
198 len = TARGET_DOUBLE_BIT / TARGET_CHAR_BIT;
200 store_floating (val, len, dblval);
203 /* If the argument is a pointer to a function, and it is a Thumb
204 function, set the low bit of the pointer. */
205 if (TYPE_CODE_PTR == typecode
206 && NULL != target_type
207 && TYPE_CODE_FUNC == TYPE_CODE (target_type))
209 CORE_ADDR regval = extract_address (val, len);
210 if (arm_pc_is_thumb (regval))
211 store_address (val, len, MAKE_THUMB_ADDR (regval));
214 /* Copy the argument to general registers or the stack in
215 register-sized pieces. Large arguments are split between
216 registers and stack. */
219 int partial_len = len < REGISTER_SIZE ? len : REGISTER_SIZE;
221 if (argreg <= ARM_LAST_ARG_REGNUM)
223 /* It's an argument being passed in a general register. */
224 regval = extract_address (val, partial_len);
225 write_register (argreg++, regval);
229 /* Push the arguments onto the stack. */
230 write_memory ((CORE_ADDR) fp, val, REGISTER_SIZE);
239 /* Return adjusted stack pointer. */
244 Dynamic Linking on ARM Linux
245 ----------------------------
247 Note: PLT = procedure linkage table
248 GOT = global offset table
250 As much as possible, ELF dynamic linking defers the resolution of
251 jump/call addresses until the last minute. The technique used is
252 inspired by the i386 ELF design, and is based on the following
255 1) The calling technique should not force a change in the assembly
256 code produced for apps; it MAY cause changes in the way assembly
257 code is produced for position independent code (i.e. shared
260 2) The technique must be such that all executable areas must not be
261 modified; and any modified areas must not be executed.
263 To do this, there are three steps involved in a typical jump:
267 3) using a pointer from the GOT
269 When the executable or library is first loaded, each GOT entry is
270 initialized to point to the code which implements dynamic name
271 resolution and code finding. This is normally a function in the
272 program interpreter (on ARM Linux this is usually ld-linux.so.2,
273 but it does not have to be). On the first invocation, the function
274 is located and the GOT entry is replaced with the real function
275 address. Subsequent calls go through steps 1, 2 and 3 and end up
276 calling the real code.
283 This is typical ARM code using the 26 bit relative branch or branch
284 and link instructions. The target of the instruction
285 (function_call is usually the address of the function to be called.
286 In position independent code, the target of the instruction is
287 actually an entry in the PLT when calling functions in a shared
288 library. Note that this call is identical to a normal function
289 call, only the target differs.
293 The PLT is a synthetic area, created by the linker. It exists in
294 both executables and libraries. It is an array of stubs, one per
295 imported function call. It looks like this:
298 str lr, [sp, #-4]! @push the return address (lr)
299 ldr lr, [pc, #16] @load from 6 words ahead
300 add lr, pc, lr @form an address for GOT[0]
301 ldr pc, [lr, #8]! @jump to the contents of that addr
303 The return address (lr) is pushed on the stack and used for
304 calculations. The load on the second line loads the lr with
305 &GOT[3] - . - 20. The addition on the third leaves:
307 lr = (&GOT[3] - . - 20) + (. + 8)
311 On the fourth line, the pc and lr are both updated, so that:
317 NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
318 "tight", but allows us to keep all the PLT entries the same size.
321 ldr ip, [pc, #4] @load offset from gotoff
322 add ip, pc, ip @add the offset to the pc
323 ldr pc, [ip] @jump to that address
324 gotoff: .word GOT[n+3] - .
326 The load on the first line, gets an offset from the fourth word of
327 the PLT entry. The add on the second line makes ip = &GOT[n+3],
328 which contains either a pointer to PLT[0] (the fixup trampoline) or
329 a pointer to the actual code.
333 The GOT contains helper pointers for both code (PLT) fixups and
334 data fixups. The first 3 entries of the GOT are special. The next
335 M entries (where M is the number of entries in the PLT) belong to
336 the PLT fixups. The next D (all remaining) entries belong to
337 various data fixups. The actual size of the GOT is 3 + M + D.
339 The GOT is also a synthetic area, created by the linker. It exists
340 in both executables and libraries. When the GOT is first
341 initialized , all the GOT entries relating to PLT fixups are
342 pointing to code back at PLT[0].
344 The special entries in the GOT are:
346 GOT[0] = linked list pointer used by the dynamic loader
347 GOT[1] = pointer to the reloc table for this module
348 GOT[2] = pointer to the fixup/resolver code
350 The first invocation of function call comes through and uses the
351 fixup/resolver code. On the entry to the fixup/resolver code:
355 stack[0] = return address (lr) of the function call
356 [r0, r1, r2, r3] are still the arguments to the function call
358 This is enough information for the fixup/resolver code to work
359 with. Before the fixup/resolver code returns, it actually calls
360 the requested function and repairs &GOT[n+3]. */
362 /* Find the minimal symbol named NAME, and return both the minsym
363 struct and its objfile. This probably ought to be in minsym.c, but
364 everything there is trying to deal with things like C++ and
365 SOFUN_ADDRESS_MAYBE_TURQUOISE, ... Since this is so simple, it may
366 be considered too special-purpose for general consumption. */
368 static struct minimal_symbol *
369 find_minsym_and_objfile (char *name, struct objfile **objfile_p)
371 struct objfile *objfile;
373 ALL_OBJFILES (objfile)
375 struct minimal_symbol *msym;
377 ALL_OBJFILE_MSYMBOLS (objfile, msym)
379 if (SYMBOL_NAME (msym)
380 && STREQ (SYMBOL_NAME (msym), name))
382 *objfile_p = objfile;
393 skip_hurd_resolver (CORE_ADDR pc)
395 /* The HURD dynamic linker is part of the GNU C library, so many
396 GNU/Linux distributions use it. (All ELF versions, as far as I
397 know.) An unresolved PLT entry points to "_dl_runtime_resolve",
398 which calls "fixup" to patch the PLT, and then passes control to
401 We look for the symbol `_dl_runtime_resolve', and find `fixup' in
402 the same objfile. If we are at the entry point of `fixup', then
403 we set a breakpoint at the return address (at the top of the
404 stack), and continue.
406 It's kind of gross to do all these checks every time we're
407 called, since they don't change once the executable has gotten
408 started. But this is only a temporary hack --- upcoming versions
409 of Linux will provide a portable, efficient interface for
410 debugging programs that use shared libraries. */
412 struct objfile *objfile;
413 struct minimal_symbol *resolver
414 = find_minsym_and_objfile ("_dl_runtime_resolve", &objfile);
418 struct minimal_symbol *fixup
419 = lookup_minimal_symbol ("fixup", NULL, objfile);
421 if (fixup && SYMBOL_VALUE_ADDRESS (fixup) == pc)
422 return (SAVED_PC_AFTER_CALL (get_current_frame ()));
428 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c.
430 1) decides whether a PLT has sent us into the linker to resolve
431 a function reference, and
432 2) if so, tells us where to set a temporary breakpoint that will
433 trigger when the dynamic linker is done. */
436 arm_linux_skip_solib_resolver (CORE_ADDR pc)
440 /* Plug in functions for other kinds of resolvers here. */
441 result = skip_hurd_resolver (pc);
449 /* The constants below were determined by examining the following files
450 in the linux kernel sources:
452 arch/arm/kernel/signal.c
453 - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
454 include/asm-arm/unistd.h
455 - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
457 #define ARM_LINUX_SIGRETURN_INSTR 0xef900077
458 #define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
460 /* arm_linux_in_sigtramp determines if PC points at one of the
461 instructions which cause control to return to the Linux kernel upon
462 return from a signal handler. FUNC_NAME is unused. */
465 arm_linux_in_sigtramp (CORE_ADDR pc, char *func_name)
469 inst = read_memory_integer (pc, 4);
471 return (inst == ARM_LINUX_SIGRETURN_INSTR
472 || inst == ARM_LINUX_RT_SIGRETURN_INSTR);
476 /* arm_linux_sigcontext_register_address returns the address in the
477 sigcontext of register REGNO given a stack pointer value SP and
478 program counter value PC. The value 0 is returned if PC is not
479 pointing at one of the signal return instructions or if REGNO is
480 not saved in the sigcontext struct. */
483 arm_linux_sigcontext_register_address (CORE_ADDR sp, CORE_ADDR pc, int regno)
486 CORE_ADDR reg_addr = 0;
488 inst = read_memory_integer (pc, 4);
490 if (inst == ARM_LINUX_SIGRETURN_INSTR || inst == ARM_LINUX_RT_SIGRETURN_INSTR)
492 CORE_ADDR sigcontext_addr;
494 /* The sigcontext structure is at different places for the two
495 signal return instructions. For ARM_LINUX_SIGRETURN_INSTR,
496 it starts at the SP value. For ARM_LINUX_RT_SIGRETURN_INSTR,
497 it is at SP+8. For the latter instruction, it may also be
498 the case that the address of this structure may be determined
499 by reading the 4 bytes at SP, but I'm not convinced this is
502 In any event, these magic constants (0 and 8) may be
503 determined by examining struct sigframe and struct
504 rt_sigframe in arch/arm/kernel/signal.c in the Linux kernel
507 if (inst == ARM_LINUX_RT_SIGRETURN_INSTR)
508 sigcontext_addr = sp + 8;
509 else /* inst == ARM_LINUX_SIGRETURN_INSTR */
510 sigcontext_addr = sp + 0;
512 /* The layout of the sigcontext structure for ARM GNU/Linux is
513 in include/asm-arm/sigcontext.h in the Linux kernel sources.
515 There are three 4-byte fields which precede the saved r0
516 field. (This accounts for the 12 in the code below.) The
517 sixteen registers (4 bytes per field) follow in order. The
518 PSR value follows the sixteen registers which accounts for
519 the constant 19 below. */
521 if (0 <= regno && regno <= PC_REGNUM)
522 reg_addr = sigcontext_addr + 12 + (4 * regno);
523 else if (regno == PS_REGNUM)
524 reg_addr = sigcontext_addr + 19 * 4;
531 _initialize_arm_linux_tdep (void)