1 /* GNU/Linux on ARM target support.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009, 2010, 2011 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #include "floatformat.h"
30 #include "solib-svr4.h"
33 #include "trad-frame.h"
34 #include "tramp-frame.h"
35 #include "breakpoint.h"
38 #include "arm-linux-tdep.h"
39 #include "linux-tdep.h"
40 #include "glibc-tdep.h"
41 #include "arch-utils.h"
43 #include "gdbthread.h"
46 #include "gdb_string.h"
48 extern int arm_apcs_32;
50 /* Under ARM GNU/Linux the traditional way of performing a breakpoint
51 is to execute a particular software interrupt, rather than use a
52 particular undefined instruction to provoke a trap. Upon exection
53 of the software interrupt the kernel stops the inferior with a
54 SIGTRAP, and wakes the debugger. */
56 static const char arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef };
58 static const char arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 };
60 /* However, the EABI syscall interface (new in Nov. 2005) does not look at
61 the operand of the swi if old-ABI compatibility is disabled. Therefore,
62 use an undefined instruction instead. This is supported as of kernel
63 version 2.5.70 (May 2003), so should be a safe assumption for EABI
66 static const char eabi_linux_arm_le_breakpoint[] = { 0xf0, 0x01, 0xf0, 0xe7 };
68 static const char eabi_linux_arm_be_breakpoint[] = { 0xe7, 0xf0, 0x01, 0xf0 };
70 /* All the kernels which support Thumb support using a specific undefined
71 instruction for the Thumb breakpoint. */
73 static const char arm_linux_thumb_be_breakpoint[] = {0xde, 0x01};
75 static const char arm_linux_thumb_le_breakpoint[] = {0x01, 0xde};
77 /* Because the 16-bit Thumb breakpoint is affected by Thumb-2 IT blocks,
78 we must use a length-appropriate breakpoint for 32-bit Thumb
79 instructions. See also thumb_get_next_pc. */
81 static const char arm_linux_thumb2_be_breakpoint[] = { 0xf7, 0xf0, 0xa0, 0x00 };
83 static const char arm_linux_thumb2_le_breakpoint[] = { 0xf0, 0xf7, 0x00, 0xa0 };
85 /* Description of the longjmp buffer. The buffer is treated as an array of
86 elements of size ARM_LINUX_JB_ELEMENT_SIZE.
88 The location of saved registers in this buffer (in particular the PC
89 to use after longjmp is called) varies depending on the ABI (in
90 particular the FP model) and also (possibly) the C Library.
92 For glibc, eglibc, and uclibc the following holds: If the FP model is
93 SoftVFP or VFP (which implies EABI) then the PC is at offset 9 in the
94 buffer. This is also true for the SoftFPA model. However, for the FPA
95 model the PC is at offset 21 in the buffer. */
96 #define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE
97 #define ARM_LINUX_JB_PC_FPA 21
98 #define ARM_LINUX_JB_PC_EABI 9
101 Dynamic Linking on ARM GNU/Linux
102 --------------------------------
104 Note: PLT = procedure linkage table
105 GOT = global offset table
107 As much as possible, ELF dynamic linking defers the resolution of
108 jump/call addresses until the last minute. The technique used is
109 inspired by the i386 ELF design, and is based on the following
112 1) The calling technique should not force a change in the assembly
113 code produced for apps; it MAY cause changes in the way assembly
114 code is produced for position independent code (i.e. shared
117 2) The technique must be such that all executable areas must not be
118 modified; and any modified areas must not be executed.
120 To do this, there are three steps involved in a typical jump:
124 3) using a pointer from the GOT
126 When the executable or library is first loaded, each GOT entry is
127 initialized to point to the code which implements dynamic name
128 resolution and code finding. This is normally a function in the
129 program interpreter (on ARM GNU/Linux this is usually
130 ld-linux.so.2, but it does not have to be). On the first
131 invocation, the function is located and the GOT entry is replaced
132 with the real function address. Subsequent calls go through steps
133 1, 2 and 3 and end up calling the real code.
140 This is typical ARM code using the 26 bit relative branch or branch
141 and link instructions. The target of the instruction
142 (function_call is usually the address of the function to be called.
143 In position independent code, the target of the instruction is
144 actually an entry in the PLT when calling functions in a shared
145 library. Note that this call is identical to a normal function
146 call, only the target differs.
150 The PLT is a synthetic area, created by the linker. It exists in
151 both executables and libraries. It is an array of stubs, one per
152 imported function call. It looks like this:
155 str lr, [sp, #-4]! @push the return address (lr)
156 ldr lr, [pc, #16] @load from 6 words ahead
157 add lr, pc, lr @form an address for GOT[0]
158 ldr pc, [lr, #8]! @jump to the contents of that addr
160 The return address (lr) is pushed on the stack and used for
161 calculations. The load on the second line loads the lr with
162 &GOT[3] - . - 20. The addition on the third leaves:
164 lr = (&GOT[3] - . - 20) + (. + 8)
168 On the fourth line, the pc and lr are both updated, so that:
174 NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
175 "tight", but allows us to keep all the PLT entries the same size.
178 ldr ip, [pc, #4] @load offset from gotoff
179 add ip, pc, ip @add the offset to the pc
180 ldr pc, [ip] @jump to that address
181 gotoff: .word GOT[n+3] - .
183 The load on the first line, gets an offset from the fourth word of
184 the PLT entry. The add on the second line makes ip = &GOT[n+3],
185 which contains either a pointer to PLT[0] (the fixup trampoline) or
186 a pointer to the actual code.
190 The GOT contains helper pointers for both code (PLT) fixups and
191 data fixups. The first 3 entries of the GOT are special. The next
192 M entries (where M is the number of entries in the PLT) belong to
193 the PLT fixups. The next D (all remaining) entries belong to
194 various data fixups. The actual size of the GOT is 3 + M + D.
196 The GOT is also a synthetic area, created by the linker. It exists
197 in both executables and libraries. When the GOT is first
198 initialized , all the GOT entries relating to PLT fixups are
199 pointing to code back at PLT[0].
201 The special entries in the GOT are:
203 GOT[0] = linked list pointer used by the dynamic loader
204 GOT[1] = pointer to the reloc table for this module
205 GOT[2] = pointer to the fixup/resolver code
207 The first invocation of function call comes through and uses the
208 fixup/resolver code. On the entry to the fixup/resolver code:
212 stack[0] = return address (lr) of the function call
213 [r0, r1, r2, r3] are still the arguments to the function call
215 This is enough information for the fixup/resolver code to work
216 with. Before the fixup/resolver code returns, it actually calls
217 the requested function and repairs &GOT[n+3]. */
219 /* The constants below were determined by examining the following files
220 in the linux kernel sources:
222 arch/arm/kernel/signal.c
223 - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
224 include/asm-arm/unistd.h
225 - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
227 #define ARM_LINUX_SIGRETURN_INSTR 0xef900077
228 #define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
230 /* For ARM EABI, the syscall number is not in the SWI instruction
231 (instead it is loaded into r7). We recognize the pattern that
232 glibc uses... alternatively, we could arrange to do this by
233 function name, but they are not always exported. */
234 #define ARM_SET_R7_SIGRETURN 0xe3a07077
235 #define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad
236 #define ARM_EABI_SYSCALL 0xef000000
238 /* OABI syscall restart trampoline, used for EABI executables too
239 whenever OABI support has been enabled in the kernel. */
240 #define ARM_OABI_SYSCALL_RESTART_SYSCALL 0xef900000
241 #define ARM_LDR_PC_SP_12 0xe49df00c
242 #define ARM_LDR_PC_SP_4 0xe49df004
245 arm_linux_sigtramp_cache (struct frame_info *this_frame,
246 struct trad_frame_cache *this_cache,
247 CORE_ADDR func, int regs_offset)
249 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
250 CORE_ADDR base = sp + regs_offset;
253 for (i = 0; i < 16; i++)
254 trad_frame_set_reg_addr (this_cache, i, base + i * 4);
256 trad_frame_set_reg_addr (this_cache, ARM_PS_REGNUM, base + 16 * 4);
258 /* The VFP or iWMMXt registers may be saved on the stack, but there's
259 no reliable way to restore them (yet). */
261 /* Save a frame ID. */
262 trad_frame_set_id (this_cache, frame_id_build (sp, func));
265 /* There are a couple of different possible stack layouts that
268 Before version 2.6.18, the kernel used completely independent
269 layouts for non-RT and RT signals. For non-RT signals the stack
270 began directly with a struct sigcontext. For RT signals the stack
271 began with two redundant pointers (to the siginfo and ucontext),
272 and then the siginfo and ucontext.
274 As of version 2.6.18, the non-RT signal frame layout starts with
275 a ucontext and the RT signal frame starts with a siginfo and then
276 a ucontext. Also, the ucontext now has a designated save area
277 for coprocessor registers.
279 For RT signals, it's easy to tell the difference: we look for
280 pinfo, the pointer to the siginfo. If it has the expected
281 value, we have an old layout. If it doesn't, we have the new
284 For non-RT signals, it's a bit harder. We need something in one
285 layout or the other with a recognizable offset and value. We can't
286 use the return trampoline, because ARM usually uses SA_RESTORER,
287 in which case the stack return trampoline is not filled in.
288 We can't use the saved stack pointer, because sigaltstack might
289 be in use. So for now we guess the new layout... */
291 /* There are three words (trap_no, error_code, oldmask) in
292 struct sigcontext before r0. */
293 #define ARM_SIGCONTEXT_R0 0xc
295 /* There are five words (uc_flags, uc_link, and three for uc_stack)
296 in the ucontext_t before the sigcontext. */
297 #define ARM_UCONTEXT_SIGCONTEXT 0x14
299 /* There are three elements in an rt_sigframe before the ucontext:
300 pinfo, puc, and info. The first two are pointers and the third
301 is a struct siginfo, with size 128 bytes. We could follow puc
302 to the ucontext, but it's simpler to skip the whole thing. */
303 #define ARM_OLD_RT_SIGFRAME_SIGINFO 0x8
304 #define ARM_OLD_RT_SIGFRAME_UCONTEXT 0x88
306 #define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80
308 #define ARM_NEW_SIGFRAME_MAGIC 0x5ac3c35a
311 arm_linux_sigreturn_init (const struct tramp_frame *self,
312 struct frame_info *this_frame,
313 struct trad_frame_cache *this_cache,
316 struct gdbarch *gdbarch = get_frame_arch (this_frame);
317 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
318 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
319 ULONGEST uc_flags = read_memory_unsigned_integer (sp, 4, byte_order);
321 if (uc_flags == ARM_NEW_SIGFRAME_MAGIC)
322 arm_linux_sigtramp_cache (this_frame, this_cache, func,
323 ARM_UCONTEXT_SIGCONTEXT
324 + ARM_SIGCONTEXT_R0);
326 arm_linux_sigtramp_cache (this_frame, this_cache, func,
331 arm_linux_rt_sigreturn_init (const struct tramp_frame *self,
332 struct frame_info *this_frame,
333 struct trad_frame_cache *this_cache,
336 struct gdbarch *gdbarch = get_frame_arch (this_frame);
337 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
338 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
339 ULONGEST pinfo = read_memory_unsigned_integer (sp, 4, byte_order);
341 if (pinfo == sp + ARM_OLD_RT_SIGFRAME_SIGINFO)
342 arm_linux_sigtramp_cache (this_frame, this_cache, func,
343 ARM_OLD_RT_SIGFRAME_UCONTEXT
344 + ARM_UCONTEXT_SIGCONTEXT
345 + ARM_SIGCONTEXT_R0);
347 arm_linux_sigtramp_cache (this_frame, this_cache, func,
348 ARM_NEW_RT_SIGFRAME_UCONTEXT
349 + ARM_UCONTEXT_SIGCONTEXT
350 + ARM_SIGCONTEXT_R0);
354 arm_linux_restart_syscall_init (const struct tramp_frame *self,
355 struct frame_info *this_frame,
356 struct trad_frame_cache *this_cache,
359 struct gdbarch *gdbarch = get_frame_arch (this_frame);
360 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
361 CORE_ADDR pc = get_frame_memory_unsigned (this_frame, sp, 4);
362 CORE_ADDR cpsr = get_frame_register_unsigned (this_frame, ARM_PS_REGNUM);
363 ULONGEST t_bit = arm_psr_thumb_bit (gdbarch);
366 /* There are two variants of this trampoline; with older kernels, the
367 stub is placed on the stack, while newer kernels use the stub from
368 the vector page. They are identical except that the older version
369 increments SP by 12 (to skip stored PC and the stub itself), while
370 the newer version increments SP only by 4 (just the stored PC). */
371 if (self->insn[1].bytes == ARM_LDR_PC_SP_4)
376 /* Update Thumb bit in CPSR. */
382 /* Remove Thumb bit from PC. */
383 pc = gdbarch_addr_bits_remove (gdbarch, pc);
385 /* Save previous register values. */
386 trad_frame_set_reg_value (this_cache, ARM_SP_REGNUM, sp + sp_offset);
387 trad_frame_set_reg_value (this_cache, ARM_PC_REGNUM, pc);
388 trad_frame_set_reg_value (this_cache, ARM_PS_REGNUM, cpsr);
390 /* Save a frame ID. */
391 trad_frame_set_id (this_cache, frame_id_build (sp, func));
394 static struct tramp_frame arm_linux_sigreturn_tramp_frame = {
398 { ARM_LINUX_SIGRETURN_INSTR, -1 },
399 { TRAMP_SENTINEL_INSN }
401 arm_linux_sigreturn_init
404 static struct tramp_frame arm_linux_rt_sigreturn_tramp_frame = {
408 { ARM_LINUX_RT_SIGRETURN_INSTR, -1 },
409 { TRAMP_SENTINEL_INSN }
411 arm_linux_rt_sigreturn_init
414 static struct tramp_frame arm_eabi_linux_sigreturn_tramp_frame = {
418 { ARM_SET_R7_SIGRETURN, -1 },
419 { ARM_EABI_SYSCALL, -1 },
420 { TRAMP_SENTINEL_INSN }
422 arm_linux_sigreturn_init
425 static struct tramp_frame arm_eabi_linux_rt_sigreturn_tramp_frame = {
429 { ARM_SET_R7_RT_SIGRETURN, -1 },
430 { ARM_EABI_SYSCALL, -1 },
431 { TRAMP_SENTINEL_INSN }
433 arm_linux_rt_sigreturn_init
436 static struct tramp_frame arm_linux_restart_syscall_tramp_frame = {
440 { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 },
441 { ARM_LDR_PC_SP_12, -1 },
442 { TRAMP_SENTINEL_INSN }
444 arm_linux_restart_syscall_init
447 static struct tramp_frame arm_kernel_linux_restart_syscall_tramp_frame = {
451 { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 },
452 { ARM_LDR_PC_SP_4, -1 },
453 { TRAMP_SENTINEL_INSN }
455 arm_linux_restart_syscall_init
458 /* Core file and register set support. */
460 #define ARM_LINUX_SIZEOF_GREGSET (18 * INT_REGISTER_SIZE)
463 arm_linux_supply_gregset (const struct regset *regset,
464 struct regcache *regcache,
465 int regnum, const void *gregs_buf, size_t len)
467 struct gdbarch *gdbarch = get_regcache_arch (regcache);
468 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
469 const gdb_byte *gregs = gregs_buf;
472 gdb_byte pc_buf[INT_REGISTER_SIZE];
474 for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
475 if (regnum == -1 || regnum == regno)
476 regcache_raw_supply (regcache, regno,
477 gregs + INT_REGISTER_SIZE * regno);
479 if (regnum == ARM_PS_REGNUM || regnum == -1)
482 regcache_raw_supply (regcache, ARM_PS_REGNUM,
483 gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
485 regcache_raw_supply (regcache, ARM_PS_REGNUM,
486 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
489 if (regnum == ARM_PC_REGNUM || regnum == -1)
491 reg_pc = extract_unsigned_integer (gregs
492 + INT_REGISTER_SIZE * ARM_PC_REGNUM,
493 INT_REGISTER_SIZE, byte_order);
494 reg_pc = gdbarch_addr_bits_remove (gdbarch, reg_pc);
495 store_unsigned_integer (pc_buf, INT_REGISTER_SIZE, byte_order, reg_pc);
496 regcache_raw_supply (regcache, ARM_PC_REGNUM, pc_buf);
501 arm_linux_collect_gregset (const struct regset *regset,
502 const struct regcache *regcache,
503 int regnum, void *gregs_buf, size_t len)
505 gdb_byte *gregs = gregs_buf;
508 for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
509 if (regnum == -1 || regnum == regno)
510 regcache_raw_collect (regcache, regno,
511 gregs + INT_REGISTER_SIZE * regno);
513 if (regnum == ARM_PS_REGNUM || regnum == -1)
516 regcache_raw_collect (regcache, ARM_PS_REGNUM,
517 gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
519 regcache_raw_collect (regcache, ARM_PS_REGNUM,
520 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
523 if (regnum == ARM_PC_REGNUM || regnum == -1)
524 regcache_raw_collect (regcache, ARM_PC_REGNUM,
525 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
528 /* Support for register format used by the NWFPE FPA emulator. */
530 #define typeNone 0x00
531 #define typeSingle 0x01
532 #define typeDouble 0x02
533 #define typeExtended 0x03
536 supply_nwfpe_register (struct regcache *regcache, int regno,
537 const gdb_byte *regs)
539 const gdb_byte *reg_data;
541 gdb_byte buf[FP_REGISTER_SIZE];
543 reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
544 reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
545 memset (buf, 0, FP_REGISTER_SIZE);
550 memcpy (buf, reg_data, 4);
553 memcpy (buf, reg_data + 4, 4);
554 memcpy (buf + 4, reg_data, 4);
557 /* We want sign and exponent, then least significant bits,
558 then most significant. NWFPE does sign, most, least. */
559 memcpy (buf, reg_data, 4);
560 memcpy (buf + 4, reg_data + 8, 4);
561 memcpy (buf + 8, reg_data + 4, 4);
567 regcache_raw_supply (regcache, regno, buf);
571 collect_nwfpe_register (const struct regcache *regcache, int regno,
576 gdb_byte buf[FP_REGISTER_SIZE];
578 regcache_raw_collect (regcache, regno, buf);
580 /* NOTE drow/2006-06-07: This code uses the tag already in the
581 register buffer. I've preserved that when moving the code
582 from the native file to the target file. But this doesn't
583 always make sense. */
585 reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
586 reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
591 memcpy (reg_data, buf, 4);
594 memcpy (reg_data, buf + 4, 4);
595 memcpy (reg_data + 4, buf, 4);
598 memcpy (reg_data, buf, 4);
599 memcpy (reg_data + 4, buf + 8, 4);
600 memcpy (reg_data + 8, buf + 4, 4);
608 arm_linux_supply_nwfpe (const struct regset *regset,
609 struct regcache *regcache,
610 int regnum, const void *regs_buf, size_t len)
612 const gdb_byte *regs = regs_buf;
615 if (regnum == ARM_FPS_REGNUM || regnum == -1)
616 regcache_raw_supply (regcache, ARM_FPS_REGNUM,
617 regs + NWFPE_FPSR_OFFSET);
619 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
620 if (regnum == -1 || regnum == regno)
621 supply_nwfpe_register (regcache, regno, regs);
625 arm_linux_collect_nwfpe (const struct regset *regset,
626 const struct regcache *regcache,
627 int regnum, void *regs_buf, size_t len)
629 gdb_byte *regs = regs_buf;
632 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
633 if (regnum == -1 || regnum == regno)
634 collect_nwfpe_register (regcache, regno, regs);
636 if (regnum == ARM_FPS_REGNUM || regnum == -1)
637 regcache_raw_collect (regcache, ARM_FPS_REGNUM,
638 regs + INT_REGISTER_SIZE * ARM_FPS_REGNUM);
641 /* Return the appropriate register set for the core section identified
642 by SECT_NAME and SECT_SIZE. */
644 static const struct regset *
645 arm_linux_regset_from_core_section (struct gdbarch *gdbarch,
646 const char *sect_name, size_t sect_size)
648 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
650 if (strcmp (sect_name, ".reg") == 0
651 && sect_size == ARM_LINUX_SIZEOF_GREGSET)
653 if (tdep->gregset == NULL)
654 tdep->gregset = regset_alloc (gdbarch, arm_linux_supply_gregset,
655 arm_linux_collect_gregset);
656 return tdep->gregset;
659 if (strcmp (sect_name, ".reg2") == 0
660 && sect_size == ARM_LINUX_SIZEOF_NWFPE)
662 if (tdep->fpregset == NULL)
663 tdep->fpregset = regset_alloc (gdbarch, arm_linux_supply_nwfpe,
664 arm_linux_collect_nwfpe);
665 return tdep->fpregset;
671 /* Copy the value of next pc of sigreturn and rt_sigrturn into PC,
672 return 1. In addition, set IS_THUMB depending on whether we
673 will return to ARM or Thumb code. Return 0 if it is not a
674 rt_sigreturn/sigreturn syscall. */
676 arm_linux_sigreturn_return_addr (struct frame_info *frame,
677 unsigned long svc_number,
678 CORE_ADDR *pc, int *is_thumb)
680 /* Is this a sigreturn or rt_sigreturn syscall? */
681 if (svc_number == 119 || svc_number == 173)
683 if (get_frame_type (frame) == SIGTRAMP_FRAME)
685 ULONGEST t_bit = arm_psr_thumb_bit (frame_unwind_arch (frame));
687 = frame_unwind_register_unsigned (frame, ARM_PS_REGNUM);
689 *is_thumb = (cpsr & t_bit) != 0;
690 *pc = frame_unwind_caller_pc (frame);
697 /* When FRAME is at a syscall instruction, return the PC of the next
698 instruction to be executed. */
701 arm_linux_syscall_next_pc (struct frame_info *frame)
703 CORE_ADDR pc = get_frame_pc (frame);
704 CORE_ADDR return_addr = 0;
705 int is_thumb = arm_frame_is_thumb (frame);
706 ULONGEST svc_number = 0;
710 svc_number = get_frame_register_unsigned (frame, 7);
711 return_addr = pc + 2;
715 struct gdbarch *gdbarch = get_frame_arch (frame);
716 enum bfd_endian byte_order_for_code =
717 gdbarch_byte_order_for_code (gdbarch);
718 unsigned long this_instr =
719 read_memory_unsigned_integer (pc, 4, byte_order_for_code);
721 unsigned long svc_operand = (0x00ffffff & this_instr);
722 if (svc_operand) /* OABI. */
724 svc_number = svc_operand - 0x900000;
728 svc_number = get_frame_register_unsigned (frame, 7);
731 return_addr = pc + 4;
734 arm_linux_sigreturn_return_addr (frame, svc_number, &return_addr, &is_thumb);
736 /* Addresses for calling Thumb functions have the bit 0 set. */
744 /* Insert a single step breakpoint at the next executed instruction. */
747 arm_linux_software_single_step (struct frame_info *frame)
749 struct gdbarch *gdbarch = get_frame_arch (frame);
750 struct address_space *aspace = get_frame_address_space (frame);
751 CORE_ADDR next_pc = arm_get_next_pc (frame, get_frame_pc (frame));
753 /* The Linux kernel offers some user-mode helpers in a high page. We can
754 not read this page (as of 2.6.23), and even if we could then we couldn't
755 set breakpoints in it, and even if we could then the atomic operations
756 would fail when interrupted. They are all called as functions and return
757 to the address in LR, so step to there instead. */
758 if (next_pc > 0xffff0000)
759 next_pc = get_frame_register_unsigned (frame, ARM_LR_REGNUM);
761 arm_insert_single_step_breakpoint (gdbarch, aspace, next_pc);
766 /* Support for displaced stepping of Linux SVC instructions. */
769 arm_linux_cleanup_svc (struct gdbarch *gdbarch,
770 struct regcache *regs,
771 struct displaced_step_closure *dsc)
773 CORE_ADDR from = dsc->insn_addr;
774 ULONGEST apparent_pc;
777 regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &apparent_pc);
779 within_scratch = (apparent_pc >= dsc->scratch_base
780 && apparent_pc < (dsc->scratch_base
781 + DISPLACED_MODIFIED_INSNS * 4 + 4));
785 fprintf_unfiltered (gdb_stdlog, "displaced: PC is apparently %.8lx after "
786 "SVC step ", (unsigned long) apparent_pc);
788 fprintf_unfiltered (gdb_stdlog, "(within scratch space)\n");
790 fprintf_unfiltered (gdb_stdlog, "(outside scratch space)\n");
794 displaced_write_reg (regs, dsc, ARM_PC_REGNUM, from + 4, BRANCH_WRITE_PC);
798 arm_linux_copy_svc (struct gdbarch *gdbarch, uint32_t insn, CORE_ADDR to,
799 struct regcache *regs, struct displaced_step_closure *dsc)
801 CORE_ADDR return_to = 0;
803 struct frame_info *frame;
804 unsigned int svc_number = displaced_read_reg (regs, dsc, 7);
805 int is_sigreturn = 0;
809 fprintf_unfiltered (gdb_stdlog, "displaced: copying Linux svc insn %.8lx\n",
810 (unsigned long) insn);
812 frame = get_current_frame ();
814 is_sigreturn = arm_linux_sigreturn_return_addr(frame, svc_number,
815 &return_to, &is_thumb);
818 struct symtab_and_line sal;
821 fprintf_unfiltered (gdb_stdlog, "displaced: found "
822 "sigreturn/rt_sigreturn SVC call. PC in frame = %lx\n",
823 (unsigned long) get_frame_pc (frame));
826 fprintf_unfiltered (gdb_stdlog, "displaced: unwind pc = %lx. "
827 "Setting momentary breakpoint.\n", (unsigned long) return_to);
829 gdb_assert (inferior_thread ()->control.step_resume_breakpoint
832 sal = find_pc_line (return_to, 0);
834 sal.section = find_pc_overlay (return_to);
837 frame = get_prev_frame (frame);
841 inferior_thread ()->control.step_resume_breakpoint
842 = set_momentary_breakpoint (gdbarch, sal, get_frame_id (frame),
845 /* We need to make sure we actually insert the momentary
846 breakpoint set above. */
847 insert_breakpoints ();
849 else if (debug_displaced)
850 fprintf_unfiltered (gdb_stderr, "displaced: couldn't find previous "
851 "frame to set momentary breakpoint for "
852 "sigreturn/rt_sigreturn\n");
854 else if (debug_displaced)
855 fprintf_unfiltered (gdb_stdlog, "displaced: sigreturn/rt_sigreturn "
856 "SVC call not in signal trampoline frame\n");
859 /* Preparation: If we detect sigreturn, set momentary breakpoint at resume
860 location, else nothing.
861 Insn: unmodified svc.
862 Cleanup: if pc lands in scratch space, pc <- insn_addr + 4
863 else leave pc alone. */
865 dsc->modinsn[0] = insn;
867 dsc->cleanup = &arm_linux_cleanup_svc;
868 /* Pretend we wrote to the PC, so cleanup doesn't set PC to the next
870 dsc->wrote_to_pc = 1;
876 /* The following two functions implement single-stepping over calls to Linux
877 kernel helper routines, which perform e.g. atomic operations on architecture
878 variants which don't support them natively.
880 When this function is called, the PC will be pointing at the kernel helper
881 (at an address inaccessible to GDB), and r14 will point to the return
882 address. Displaced stepping always executes code in the copy area:
883 so, make the copy-area instruction branch back to the kernel helper (the
884 "from" address), and make r14 point to the breakpoint in the copy area. In
885 that way, we regain control once the kernel helper returns, and can clean
886 up appropriately (as if we had just returned from the kernel helper as it
887 would have been called from the non-displaced location). */
890 cleanup_kernel_helper_return (struct gdbarch *gdbarch,
891 struct regcache *regs,
892 struct displaced_step_closure *dsc)
894 displaced_write_reg (regs, dsc, ARM_LR_REGNUM, dsc->tmp[0], CANNOT_WRITE_PC);
895 displaced_write_reg (regs, dsc, ARM_PC_REGNUM, dsc->tmp[0], BRANCH_WRITE_PC);
899 arm_catch_kernel_helper_return (struct gdbarch *gdbarch, CORE_ADDR from,
900 CORE_ADDR to, struct regcache *regs,
901 struct displaced_step_closure *dsc)
903 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
906 dsc->insn_addr = from;
907 dsc->cleanup = &cleanup_kernel_helper_return;
908 /* Say we wrote to the PC, else cleanup will set PC to the next
909 instruction in the helper, which isn't helpful. */
910 dsc->wrote_to_pc = 1;
912 /* Preparation: tmp[0] <- r14
913 r14 <- <scratch space>+4
914 *(<scratch space>+8) <- from
915 Insn: ldr pc, [r14, #4]
916 Cleanup: r14 <- tmp[0], pc <- tmp[0]. */
918 dsc->tmp[0] = displaced_read_reg (regs, dsc, ARM_LR_REGNUM);
919 displaced_write_reg (regs, dsc, ARM_LR_REGNUM, (ULONGEST) to + 4,
921 write_memory_unsigned_integer (to + 8, 4, byte_order, from);
923 dsc->modinsn[0] = 0xe59ef004; /* ldr pc, [lr, #4]. */
926 /* Linux-specific displaced step instruction copying function. Detects when
927 the program has stepped into a Linux kernel helper routine (which must be
928 handled as a special case), falling back to arm_displaced_step_copy_insn()
931 static struct displaced_step_closure *
932 arm_linux_displaced_step_copy_insn (struct gdbarch *gdbarch,
933 CORE_ADDR from, CORE_ADDR to,
934 struct regcache *regs)
936 struct displaced_step_closure *dsc
937 = xmalloc (sizeof (struct displaced_step_closure));
939 /* Detect when we enter an (inaccessible by GDB) Linux kernel helper, and
940 stop at the return location. */
941 if (from > 0xffff0000)
944 fprintf_unfiltered (gdb_stdlog, "displaced: detected kernel helper "
945 "at %.8lx\n", (unsigned long) from);
947 arm_catch_kernel_helper_return (gdbarch, from, to, regs, dsc);
951 /* Override the default handling of SVC instructions. */
952 dsc->u.svc.copy_svc_os = arm_linux_copy_svc;
954 arm_process_displaced_insn (gdbarch, from, to, regs, dsc);
957 arm_displaced_init_closure (gdbarch, from, to, dsc);
963 arm_linux_init_abi (struct gdbarch_info info,
964 struct gdbarch *gdbarch)
966 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
968 linux_init_abi (info, gdbarch);
970 tdep->lowest_pc = 0x8000;
971 if (info.byte_order == BFD_ENDIAN_BIG)
973 if (tdep->arm_abi == ARM_ABI_AAPCS)
974 tdep->arm_breakpoint = eabi_linux_arm_be_breakpoint;
976 tdep->arm_breakpoint = arm_linux_arm_be_breakpoint;
977 tdep->thumb_breakpoint = arm_linux_thumb_be_breakpoint;
978 tdep->thumb2_breakpoint = arm_linux_thumb2_be_breakpoint;
982 if (tdep->arm_abi == ARM_ABI_AAPCS)
983 tdep->arm_breakpoint = eabi_linux_arm_le_breakpoint;
985 tdep->arm_breakpoint = arm_linux_arm_le_breakpoint;
986 tdep->thumb_breakpoint = arm_linux_thumb_le_breakpoint;
987 tdep->thumb2_breakpoint = arm_linux_thumb2_le_breakpoint;
989 tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint);
990 tdep->thumb_breakpoint_size = sizeof (arm_linux_thumb_le_breakpoint);
991 tdep->thumb2_breakpoint_size = sizeof (arm_linux_thumb2_le_breakpoint);
993 if (tdep->fp_model == ARM_FLOAT_AUTO)
994 tdep->fp_model = ARM_FLOAT_FPA;
996 switch (tdep->fp_model)
999 tdep->jb_pc = ARM_LINUX_JB_PC_FPA;
1001 case ARM_FLOAT_SOFT_FPA:
1002 case ARM_FLOAT_SOFT_VFP:
1004 tdep->jb_pc = ARM_LINUX_JB_PC_EABI;
1008 (__FILE__, __LINE__,
1009 _("arm_linux_init_abi: Floating point model not supported"));
1012 tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE;
1014 set_solib_svr4_fetch_link_map_offsets
1015 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1017 /* Single stepping. */
1018 set_gdbarch_software_single_step (gdbarch, arm_linux_software_single_step);
1020 /* Shared library handling. */
1021 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1022 set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
1024 /* Enable TLS support. */
1025 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1026 svr4_fetch_objfile_link_map);
1028 tramp_frame_prepend_unwinder (gdbarch,
1029 &arm_linux_sigreturn_tramp_frame);
1030 tramp_frame_prepend_unwinder (gdbarch,
1031 &arm_linux_rt_sigreturn_tramp_frame);
1032 tramp_frame_prepend_unwinder (gdbarch,
1033 &arm_eabi_linux_sigreturn_tramp_frame);
1034 tramp_frame_prepend_unwinder (gdbarch,
1035 &arm_eabi_linux_rt_sigreturn_tramp_frame);
1036 tramp_frame_prepend_unwinder (gdbarch,
1037 &arm_linux_restart_syscall_tramp_frame);
1038 tramp_frame_prepend_unwinder (gdbarch,
1039 &arm_kernel_linux_restart_syscall_tramp_frame);
1041 /* Core file support. */
1042 set_gdbarch_regset_from_core_section (gdbarch,
1043 arm_linux_regset_from_core_section);
1045 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
1047 /* Displaced stepping. */
1048 set_gdbarch_displaced_step_copy_insn (gdbarch,
1049 arm_linux_displaced_step_copy_insn);
1050 set_gdbarch_displaced_step_fixup (gdbarch, arm_displaced_step_fixup);
1051 set_gdbarch_displaced_step_free_closure (gdbarch,
1052 simple_displaced_step_free_closure);
1053 set_gdbarch_displaced_step_location (gdbarch, displaced_step_at_entry_point);
1056 tdep->syscall_next_pc = arm_linux_syscall_next_pc;
1059 /* Provide a prototype to silence -Wmissing-prototypes. */
1060 extern initialize_file_ftype _initialize_arm_linux_tdep;
1063 _initialize_arm_linux_tdep (void)
1065 gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX,
1066 arm_linux_init_abi);