1 /* GNU/Linux on ARM native support.
2 Copyright (C) 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009,
3 2010, 2011 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "gdb_string.h"
26 #include "linux-nat.h"
27 #include "target-descriptions.h"
30 #include "gdbthread.h"
33 #include "arm-linux-tdep.h"
35 #include <elf/common.h>
37 #include <sys/ptrace.h>
38 #include <sys/utsname.h>
39 #include <sys/procfs.h>
41 /* Prototypes for supply_gregset etc. */
44 /* Defines ps_err_e, struct ps_prochandle. */
45 #include "gdb_proc_service.h"
47 #ifndef PTRACE_GET_THREAD_AREA
48 #define PTRACE_GET_THREAD_AREA 22
51 #ifndef PTRACE_GETWMMXREGS
52 #define PTRACE_GETWMMXREGS 18
53 #define PTRACE_SETWMMXREGS 19
56 #ifndef PTRACE_GETVFPREGS
57 #define PTRACE_GETVFPREGS 27
58 #define PTRACE_SETVFPREGS 28
61 #ifndef PTRACE_GETHBPREGS
62 #define PTRACE_GETHBPREGS 29
63 #define PTRACE_SETHBPREGS 30
66 /* A flag for whether the WMMX registers are available. */
67 static int arm_linux_has_wmmx_registers;
69 /* The number of 64-bit VFP registers we have (expect this to be 0,
71 static int arm_linux_vfp_register_count;
73 extern int arm_apcs_32;
75 /* The following variables are used to determine the version of the
76 underlying GNU/Linux operating system. Examples:
78 GNU/Linux 2.0.35 GNU/Linux 2.2.12
79 os_version = 0x00020023 os_version = 0x0002020c
80 os_major = 2 os_major = 2
81 os_minor = 0 os_minor = 2
82 os_release = 35 os_release = 12
84 Note: os_version = (os_major << 16) | (os_minor << 8) | os_release
86 These are initialized using get_linux_version() from
87 _initialize_arm_linux_nat(). */
89 static unsigned int os_version, os_major, os_minor, os_release;
91 /* On GNU/Linux, threads are implemented as pseudo-processes, in which
92 case we may be tracing more than one process at a time. In that
93 case, inferior_ptid will contain the main process ID and the
94 individual thread (process) ID. get_thread_id () is used to get
95 the thread id if it's available, and the process id otherwise. */
98 get_thread_id (ptid_t ptid)
100 int tid = TIDGET (ptid);
106 #define GET_THREAD_ID(PTID) get_thread_id (PTID)
108 /* Get the value of a particular register from the floating point
109 state of the process and store it into regcache. */
112 fetch_fpregister (struct regcache *regcache, int regno)
115 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
117 /* Get the thread id for the ptrace call. */
118 tid = GET_THREAD_ID (inferior_ptid);
120 /* Read the floating point state. */
121 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
124 warning (_("Unable to fetch floating point register."));
129 if (ARM_FPS_REGNUM == regno)
130 regcache_raw_supply (regcache, ARM_FPS_REGNUM,
131 fp + NWFPE_FPSR_OFFSET);
133 /* Fetch the floating point register. */
134 if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
135 supply_nwfpe_register (regcache, regno, fp);
138 /* Get the whole floating point state of the process and store it
142 fetch_fpregs (struct regcache *regcache)
145 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
147 /* Get the thread id for the ptrace call. */
148 tid = GET_THREAD_ID (inferior_ptid);
150 /* Read the floating point state. */
151 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
154 warning (_("Unable to fetch the floating point registers."));
159 regcache_raw_supply (regcache, ARM_FPS_REGNUM,
160 fp + NWFPE_FPSR_OFFSET);
162 /* Fetch the floating point registers. */
163 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
164 supply_nwfpe_register (regcache, regno, fp);
167 /* Save a particular register into the floating point state of the
168 process using the contents from regcache. */
171 store_fpregister (const struct regcache *regcache, int regno)
174 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
176 /* Get the thread id for the ptrace call. */
177 tid = GET_THREAD_ID (inferior_ptid);
179 /* Read the floating point state. */
180 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
183 warning (_("Unable to fetch the floating point registers."));
188 if (ARM_FPS_REGNUM == regno
189 && REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
190 regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
192 /* Store the floating point register. */
193 if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
194 collect_nwfpe_register (regcache, regno, fp);
196 ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
199 warning (_("Unable to store floating point register."));
204 /* Save the whole floating point state of the process using
205 the contents from regcache. */
208 store_fpregs (const struct regcache *regcache)
211 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
213 /* Get the thread id for the ptrace call. */
214 tid = GET_THREAD_ID (inferior_ptid);
216 /* Read the floating point state. */
217 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
220 warning (_("Unable to fetch the floating point registers."));
225 if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
226 regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
228 /* Store the floating point registers. */
229 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
230 if (REG_VALID == regcache_register_status (regcache, regno))
231 collect_nwfpe_register (regcache, regno, fp);
233 ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
236 warning (_("Unable to store floating point registers."));
241 /* Fetch a general register of the process and store into
245 fetch_register (struct regcache *regcache, int regno)
250 /* Get the thread id for the ptrace call. */
251 tid = GET_THREAD_ID (inferior_ptid);
253 ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
256 warning (_("Unable to fetch general register."));
260 if (regno >= ARM_A1_REGNUM && regno < ARM_PC_REGNUM)
261 regcache_raw_supply (regcache, regno, (char *) ®s[regno]);
263 if (ARM_PS_REGNUM == regno)
266 regcache_raw_supply (regcache, ARM_PS_REGNUM,
267 (char *) ®s[ARM_CPSR_GREGNUM]);
269 regcache_raw_supply (regcache, ARM_PS_REGNUM,
270 (char *) ®s[ARM_PC_REGNUM]);
273 if (ARM_PC_REGNUM == regno)
275 regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
276 (get_regcache_arch (regcache),
277 regs[ARM_PC_REGNUM]);
278 regcache_raw_supply (regcache, ARM_PC_REGNUM,
279 (char *) ®s[ARM_PC_REGNUM]);
283 /* Fetch all general registers of the process and store into
287 fetch_regs (struct regcache *regcache)
292 /* Get the thread id for the ptrace call. */
293 tid = GET_THREAD_ID (inferior_ptid);
295 ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
298 warning (_("Unable to fetch general registers."));
302 for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
303 regcache_raw_supply (regcache, regno, (char *) ®s[regno]);
306 regcache_raw_supply (regcache, ARM_PS_REGNUM,
307 (char *) ®s[ARM_CPSR_GREGNUM]);
309 regcache_raw_supply (regcache, ARM_PS_REGNUM,
310 (char *) ®s[ARM_PC_REGNUM]);
312 regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
313 (get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
314 regcache_raw_supply (regcache, ARM_PC_REGNUM,
315 (char *) ®s[ARM_PC_REGNUM]);
318 /* Store all general registers of the process from the values in
322 store_register (const struct regcache *regcache, int regno)
327 if (REG_VALID != regcache_register_status (regcache, regno))
330 /* Get the thread id for the ptrace call. */
331 tid = GET_THREAD_ID (inferior_ptid);
333 /* Get the general registers from the process. */
334 ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
337 warning (_("Unable to fetch general registers."));
341 if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM)
342 regcache_raw_collect (regcache, regno, (char *) ®s[regno]);
343 else if (arm_apcs_32 && regno == ARM_PS_REGNUM)
344 regcache_raw_collect (regcache, regno,
345 (char *) ®s[ARM_CPSR_GREGNUM]);
346 else if (!arm_apcs_32 && regno == ARM_PS_REGNUM)
347 regcache_raw_collect (regcache, ARM_PC_REGNUM,
348 (char *) ®s[ARM_PC_REGNUM]);
350 ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
353 warning (_("Unable to store general register."));
359 store_regs (const struct regcache *regcache)
364 /* Get the thread id for the ptrace call. */
365 tid = GET_THREAD_ID (inferior_ptid);
367 /* Fetch the general registers. */
368 ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
371 warning (_("Unable to fetch general registers."));
375 for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
377 if (REG_VALID == regcache_register_status (regcache, regno))
378 regcache_raw_collect (regcache, regno, (char *) ®s[regno]);
381 if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
382 regcache_raw_collect (regcache, ARM_PS_REGNUM,
383 (char *) ®s[ARM_CPSR_GREGNUM]);
385 ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
389 warning (_("Unable to store general registers."));
394 /* Fetch all WMMX registers of the process and store into
397 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
400 fetch_wmmx_regs (struct regcache *regcache)
402 char regbuf[IWMMXT_REGS_SIZE];
405 /* Get the thread id for the ptrace call. */
406 tid = GET_THREAD_ID (inferior_ptid);
408 ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
411 warning (_("Unable to fetch WMMX registers."));
415 for (regno = 0; regno < 16; regno++)
416 regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
419 for (regno = 0; regno < 2; regno++)
420 regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
421 ®buf[16 * 8 + regno * 4]);
423 for (regno = 0; regno < 4; regno++)
424 regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
425 ®buf[16 * 8 + 2 * 4 + regno * 4]);
429 store_wmmx_regs (const struct regcache *regcache)
431 char regbuf[IWMMXT_REGS_SIZE];
434 /* Get the thread id for the ptrace call. */
435 tid = GET_THREAD_ID (inferior_ptid);
437 ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
440 warning (_("Unable to fetch WMMX registers."));
444 for (regno = 0; regno < 16; regno++)
445 if (REG_VALID == regcache_register_status (regcache,
446 regno + ARM_WR0_REGNUM))
447 regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
450 for (regno = 0; regno < 2; regno++)
451 if (REG_VALID == regcache_register_status (regcache,
452 regno + ARM_WCSSF_REGNUM))
453 regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
454 ®buf[16 * 8 + regno * 4]);
456 for (regno = 0; regno < 4; regno++)
457 if (REG_VALID == regcache_register_status (regcache,
458 regno + ARM_WCGR0_REGNUM))
459 regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
460 ®buf[16 * 8 + 2 * 4 + regno * 4]);
462 ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
466 warning (_("Unable to store WMMX registers."));
471 /* Fetch and store VFP Registers. The kernel object has space for 32
472 64-bit registers, and the FPSCR. This is even when on a VFPv2 or
474 #define VFP_REGS_SIZE (32 * 8 + 4)
477 fetch_vfp_regs (struct regcache *regcache)
479 char regbuf[VFP_REGS_SIZE];
482 /* Get the thread id for the ptrace call. */
483 tid = GET_THREAD_ID (inferior_ptid);
485 ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
488 warning (_("Unable to fetch VFP registers."));
492 for (regno = 0; regno < arm_linux_vfp_register_count; regno++)
493 regcache_raw_supply (regcache, regno + ARM_D0_REGNUM,
494 (char *) regbuf + regno * 8);
496 regcache_raw_supply (regcache, ARM_FPSCR_REGNUM,
497 (char *) regbuf + 32 * 8);
501 store_vfp_regs (const struct regcache *regcache)
503 char regbuf[VFP_REGS_SIZE];
506 /* Get the thread id for the ptrace call. */
507 tid = GET_THREAD_ID (inferior_ptid);
509 ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
512 warning (_("Unable to fetch VFP registers (for update)."));
516 for (regno = 0; regno < arm_linux_vfp_register_count; regno++)
517 regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
518 (char *) regbuf + regno * 8);
520 regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
521 (char *) regbuf + 32 * 8);
523 ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
527 warning (_("Unable to store VFP registers."));
532 /* Fetch registers from the child process. Fetch all registers if
533 regno == -1, otherwise fetch all general registers or all floating
534 point registers depending upon the value of regno. */
537 arm_linux_fetch_inferior_registers (struct target_ops *ops,
538 struct regcache *regcache, int regno)
542 fetch_regs (regcache);
543 fetch_fpregs (regcache);
544 if (arm_linux_has_wmmx_registers)
545 fetch_wmmx_regs (regcache);
546 if (arm_linux_vfp_register_count > 0)
547 fetch_vfp_regs (regcache);
551 if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
552 fetch_register (regcache, regno);
553 else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
554 fetch_fpregister (regcache, regno);
555 else if (arm_linux_has_wmmx_registers
556 && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
557 fetch_wmmx_regs (regcache);
558 else if (arm_linux_vfp_register_count > 0
559 && regno >= ARM_D0_REGNUM
560 && regno <= ARM_D0_REGNUM + arm_linux_vfp_register_count)
561 fetch_vfp_regs (regcache);
565 /* Store registers back into the inferior. Store all registers if
566 regno == -1, otherwise store all general registers or all floating
567 point registers depending upon the value of regno. */
570 arm_linux_store_inferior_registers (struct target_ops *ops,
571 struct regcache *regcache, int regno)
575 store_regs (regcache);
576 store_fpregs (regcache);
577 if (arm_linux_has_wmmx_registers)
578 store_wmmx_regs (regcache);
579 if (arm_linux_vfp_register_count > 0)
580 store_vfp_regs (regcache);
584 if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
585 store_register (regcache, regno);
586 else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
587 store_fpregister (regcache, regno);
588 else if (arm_linux_has_wmmx_registers
589 && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
590 store_wmmx_regs (regcache);
591 else if (arm_linux_vfp_register_count > 0
592 && regno >= ARM_D0_REGNUM
593 && regno <= ARM_D0_REGNUM + arm_linux_vfp_register_count)
594 store_vfp_regs (regcache);
598 /* Wrapper functions for the standard regset handling, used by
602 fill_gregset (const struct regcache *regcache,
603 gdb_gregset_t *gregsetp, int regno)
605 arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
609 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
611 arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
615 fill_fpregset (const struct regcache *regcache,
616 gdb_fpregset_t *fpregsetp, int regno)
618 arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
621 /* Fill GDB's register array with the floating-point register values
625 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
627 arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
630 /* Fetch the thread-local storage pointer for libthread_db. */
633 ps_get_thread_area (const struct ps_prochandle *ph,
634 lwpid_t lwpid, int idx, void **base)
636 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
639 /* IDX is the bias from the thread pointer to the beginning of the
640 thread descriptor. It has to be subtracted due to implementation
641 quirks in libthread_db. */
642 *base = (void *) ((char *)*base - idx);
648 get_linux_version (unsigned int *vmajor,
649 unsigned int *vminor,
650 unsigned int *vrelease)
653 char *pmajor, *pminor, *prelease, *tail;
655 if (-1 == uname (&info))
657 warning (_("Unable to determine GNU/Linux version."));
661 pmajor = strtok (info.release, ".");
662 pminor = strtok (NULL, ".");
663 prelease = strtok (NULL, ".");
665 *vmajor = (unsigned int) strtoul (pmajor, &tail, 0);
666 *vminor = (unsigned int) strtoul (pminor, &tail, 0);
667 *vrelease = (unsigned int) strtoul (prelease, &tail, 0);
669 return ((*vmajor << 16) | (*vminor << 8) | *vrelease);
672 static const struct target_desc *
673 arm_linux_read_description (struct target_ops *ops)
675 CORE_ADDR arm_hwcap = 0;
676 arm_linux_has_wmmx_registers = 0;
677 arm_linux_vfp_register_count = 0;
679 if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
684 if (arm_hwcap & HWCAP_IWMMXT)
686 arm_linux_has_wmmx_registers = 1;
687 return tdesc_arm_with_iwmmxt;
690 if (arm_hwcap & HWCAP_VFP)
694 const struct target_desc * result = NULL;
696 /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
697 Neon with VFPv3-D32. */
698 if (arm_hwcap & HWCAP_NEON)
700 arm_linux_vfp_register_count = 32;
701 result = tdesc_arm_with_neon;
703 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
705 arm_linux_vfp_register_count = 32;
706 result = tdesc_arm_with_vfpv3;
710 arm_linux_vfp_register_count = 16;
711 result = tdesc_arm_with_vfpv2;
714 /* Now make sure that the kernel supports reading these
715 registers. Support was added in 2.6.30. */
716 pid = GET_LWP (inferior_ptid);
718 buf = alloca (VFP_REGS_SIZE);
719 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
729 /* Information describing the hardware breakpoint capabilities. */
730 struct arm_linux_hwbp_cap
733 gdb_byte max_wp_length;
738 /* Get hold of the Hardware Breakpoint information for the target we are
739 attached to. Returns NULL if the kernel doesn't support Hardware
740 breakpoints at all, or a pointer to the information structure. */
741 static const struct arm_linux_hwbp_cap *
742 arm_linux_get_hwbp_cap (void)
744 /* The info structure we return. */
745 static struct arm_linux_hwbp_cap info;
747 /* Is INFO in a good state? -1 means that no attempt has been made to
748 initialize INFO; 0 means an attempt has been made, but it failed; 1
749 means INFO is in an initialized state. */
750 static int available = -1;
757 tid = GET_THREAD_ID (inferior_ptid);
758 if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
762 info.arch = (gdb_byte)((val >> 24) & 0xff);
763 info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
764 info.wp_count = (gdb_byte)((val >> 8) & 0xff);
765 info.bp_count = (gdb_byte)(val & 0xff);
766 available = (info.arch != 0);
770 return available == 1 ? &info : NULL;
773 /* How many hardware breakpoints are available? */
775 arm_linux_get_hw_breakpoint_count (void)
777 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
778 return cap != NULL ? cap->bp_count : 0;
781 /* How many hardware watchpoints are available? */
783 arm_linux_get_hw_watchpoint_count (void)
785 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
786 return cap != NULL ? cap->wp_count : 0;
789 /* Have we got a free break-/watch-point available for use? Returns -1 if
790 there is not an appropriate resource available, otherwise returns 1. */
792 arm_linux_can_use_hw_breakpoint (int type, int cnt, int ot)
794 if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
795 || type == bp_access_watchpoint || type == bp_watchpoint)
797 if (cnt + ot > arm_linux_get_hw_watchpoint_count ())
800 else if (type == bp_hardware_breakpoint)
802 if (cnt > arm_linux_get_hw_breakpoint_count ())
811 /* Enum describing the different types of ARM hardware break-/watch-points. */
820 /* Type describing an ARM Hardware Breakpoint Control register value. */
821 typedef unsigned int arm_hwbp_control_t;
823 /* Structure used to keep track of hardware break-/watch-points. */
824 struct arm_linux_hw_breakpoint
826 /* Address to break on, or being watched. */
827 unsigned int address;
828 /* Control register for break-/watch- point. */
829 arm_hwbp_control_t control;
832 /* Structure containing arrays of the break and watch points which are have
833 active in each thread.
835 The Linux ptrace interface to hardware break-/watch-points presents the
836 values in a vector centred around 0 (which is used fo generic information).
837 Positive indicies refer to breakpoint addresses/control registers, negative
838 indices to watchpoint addresses/control registers.
840 The Linux vector is indexed as follows:
841 -((i << 1) + 2): Control register for watchpoint i.
842 -((i << 1) + 1): Address register for watchpoint i.
843 0: Information register.
844 ((i << 1) + 1): Address register for breakpoint i.
845 ((i << 1) + 2): Control register for breakpoint i.
847 This structure is used as a per-thread cache of the state stored by the
848 kernel, so that we don't need to keep calling into the kernel to find a
851 We treat break-/watch-points with their enable bit clear as being deleted.
853 typedef struct arm_linux_thread_points
857 /* Breakpoints for thread. */
858 struct arm_linux_hw_breakpoint *bpts;
859 /* Watchpoint for threads. */
860 struct arm_linux_hw_breakpoint *wpts;
861 } *arm_linux_thread_points_p;
862 DEF_VEC_P (arm_linux_thread_points_p);
864 /* Vector of hardware breakpoints for each thread. */
865 VEC(arm_linux_thread_points_p) *arm_threads = NULL;
867 /* Find the list of hardware break-/watch-points for a thread with id TID.
868 If no list exists for TID we return NULL if ALLOC_NEW is 0, otherwise we
869 create a new list and return that. */
870 static struct arm_linux_thread_points *
871 arm_linux_find_breakpoints_by_tid (int tid, int alloc_new)
874 struct arm_linux_thread_points *t;
876 for (i = 0; VEC_iterate (arm_linux_thread_points_p, arm_threads, i, t); ++i)
886 t = xmalloc (sizeof (struct arm_linux_thread_points));
888 t->bpts = xzalloc (arm_linux_get_hw_breakpoint_count ()
889 * sizeof (struct arm_linux_hw_breakpoint));
890 t->wpts = xzalloc (arm_linux_get_hw_watchpoint_count ()
891 * sizeof (struct arm_linux_hw_breakpoint));
892 VEC_safe_push (arm_linux_thread_points_p, arm_threads, t);
898 /* Initialize an ARM hardware break-/watch-point control register value.
899 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
900 type of break-/watch-point; ENABLE indicates whether the point is enabled.
902 static arm_hwbp_control_t
903 arm_hwbp_control_initialize (unsigned byte_address_select,
904 arm_hwbp_type hwbp_type,
907 gdb_assert ((byte_address_select & ~0xffU) == 0);
908 gdb_assert (hwbp_type != arm_hwbp_break
909 || ((byte_address_select & 0xfU) != 0));
911 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
914 /* Does the breakpoint control value CONTROL have the enable bit set? */
916 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
918 return control & 0x1;
921 /* Change a breakpoint control word so that it is in the disabled state. */
922 static arm_hwbp_control_t
923 arm_hwbp_control_disable (arm_hwbp_control_t control)
925 return control & ~0x1;
928 /* Initialise the hardware breakpoint structure P. The breakpoint will be
929 enabled, and will point to the placed address of BP_TGT. */
931 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
932 struct bp_target_info *bp_tgt,
933 struct arm_linux_hw_breakpoint *p)
936 CORE_ADDR address = bp_tgt->placed_address;
938 /* We have to create a mask for the control register which says which bits
939 of the word pointed to by address to break on. */
940 if (arm_pc_is_thumb (gdbarch, address))
941 mask = 0x3 << (address & 2);
945 p->address = (unsigned int) (address & ~3);
946 p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
949 /* Get the ARM hardware breakpoint type from the RW value we're given when
950 asked to set a watchpoint. */
952 arm_linux_get_hwbp_type (int rw)
955 return arm_hwbp_load;
956 else if (rw == hw_write)
957 return arm_hwbp_store;
959 return arm_hwbp_access;
962 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
963 to LEN. The type of watchpoint is given in RW. */
965 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
966 struct arm_linux_hw_breakpoint *p)
968 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
971 gdb_assert (cap != NULL);
972 gdb_assert (cap->max_wp_length != 0);
974 mask = (1 << len) - 1;
976 p->address = (unsigned int) addr;
977 p->control = arm_hwbp_control_initialize (mask,
978 arm_linux_get_hwbp_type (rw), 1);
981 /* Are two break-/watch-points equal? */
983 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
984 const struct arm_linux_hw_breakpoint *p2)
986 return p1->address == p2->address && p1->control == p2->control;
989 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
990 =1) BPT for thread TID. */
992 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
993 int tid, int watchpoint)
995 struct arm_linux_thread_points *t = arm_linux_find_breakpoints_by_tid (tid, 1);
997 struct arm_linux_hw_breakpoint* bpts;
1000 gdb_assert (t != NULL);
1004 count = arm_linux_get_hw_watchpoint_count ();
1010 count = arm_linux_get_hw_breakpoint_count ();
1015 for (i = 0; i < count; ++i)
1016 if (!arm_hwbp_control_is_enabled (bpts[i].control))
1019 if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 1),
1021 perror_with_name (_("Unexpected error setting breakpoint address"));
1022 if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 2),
1024 perror_with_name (_("Unexpected error setting breakpoint"));
1026 memcpy (bpts + i, bpt, sizeof (struct arm_linux_hw_breakpoint));
1030 gdb_assert (i != count);
1033 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1034 (WATCHPOINT = 1) BPT for thread TID. */
1036 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1037 int tid, int watchpoint)
1039 struct arm_linux_thread_points *t = arm_linux_find_breakpoints_by_tid (tid, 0);
1041 struct arm_linux_hw_breakpoint *bpts;
1044 gdb_assert (t != NULL);
1048 count = arm_linux_get_hw_watchpoint_count ();
1054 count = arm_linux_get_hw_breakpoint_count ();
1059 for (i = 0; i < count; ++i)
1060 if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1063 bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1064 if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 2),
1065 &bpts[i].control) < 0)
1066 perror_with_name (_("Unexpected error clearing breakpoint"));
1070 gdb_assert (i != count);
1073 /* Insert a Hardware breakpoint. */
1075 arm_linux_insert_hw_breakpoint (struct gdbarch *gdbarch,
1076 struct bp_target_info *bp_tgt)
1079 struct lwp_info *lp;
1080 struct arm_linux_hw_breakpoint p;
1082 if (arm_linux_get_hw_breakpoint_count () == 0)
1085 arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1087 arm_linux_insert_hw_breakpoint1 (&p, TIDGET (ptid), 0);
1092 /* Remove a hardware breakpoint. */
1094 arm_linux_remove_hw_breakpoint (struct gdbarch *gdbarch,
1095 struct bp_target_info *bp_tgt)
1098 struct lwp_info *lp;
1099 struct arm_linux_hw_breakpoint p;
1101 if (arm_linux_get_hw_breakpoint_count () == 0)
1104 arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1106 arm_linux_remove_hw_breakpoint1 (&p, TIDGET (ptid), 0);
1111 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1114 arm_linux_region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
1116 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1117 CORE_ADDR max_wp_length, aligned_addr;
1119 /* Can not set watchpoints for zero or negative lengths. */
1123 /* Need to be able to use the ptrace interface. */
1124 if (cap == NULL || cap->wp_count == 0)
1127 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1128 range covered by a watchpoint. */
1129 max_wp_length = (CORE_ADDR)cap->max_wp_length;
1130 aligned_addr = addr & ~(max_wp_length - 1);
1132 if (aligned_addr + max_wp_length < addr + len)
1135 /* The current ptrace interface can only handle watchpoints that are a
1137 if ((len & (len - 1)) != 0)
1140 /* All tests passed so we must be able to set a watchpoint. */
1144 /* Insert a Hardware breakpoint. */
1146 arm_linux_insert_watchpoint (CORE_ADDR addr, int len, int rw,
1147 struct expression *cond)
1150 struct lwp_info *lp;
1151 struct arm_linux_hw_breakpoint p;
1153 if (arm_linux_get_hw_watchpoint_count () == 0)
1156 arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1158 arm_linux_insert_hw_breakpoint1 (&p, TIDGET (ptid), 1);
1163 /* Remove a hardware breakpoint. */
1165 arm_linux_remove_watchpoint (CORE_ADDR addr, int len, int rw,
1166 struct expression *cond)
1169 struct lwp_info *lp;
1170 struct arm_linux_hw_breakpoint p;
1172 if (arm_linux_get_hw_watchpoint_count () == 0)
1175 arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1177 arm_linux_remove_hw_breakpoint1 (&p, TIDGET (ptid), 1);
1182 /* What was the data address the target was stopped on accessing. */
1184 arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
1186 struct siginfo *siginfo_p = linux_nat_get_siginfo (inferior_ptid);
1187 int slot = siginfo_p->si_errno;
1189 /* This must be a hardware breakpoint. */
1190 if (siginfo_p->si_signo != SIGTRAP
1191 || (siginfo_p->si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1194 /* We must be able to set hardware watchpoints. */
1195 if (arm_linux_get_hw_watchpoint_count () == 0)
1198 /* If we are in a positive slot then we're looking at a breakpoint and not
1203 *addr_p = (CORE_ADDR) (uintptr_t) siginfo_p->si_addr;
1207 /* Has the target been stopped by hitting a watchpoint? */
1209 arm_linux_stopped_by_watchpoint (void)
1212 return arm_linux_stopped_data_address (¤t_target, &addr);
1216 arm_linux_watchpoint_addr_within_range (struct target_ops *target,
1218 CORE_ADDR start, int length)
1220 return start <= addr && start + length - 1 >= addr;
1223 /* Handle thread creation. We need to copy the breakpoints and watchpoints
1224 in the parent thread to the child thread. */
1226 arm_linux_new_thread (ptid_t ptid)
1228 int tid = TIDGET (ptid);
1229 const struct arm_linux_hwbp_cap *info = arm_linux_get_hwbp_cap ();
1234 struct arm_linux_thread_points *p;
1235 struct arm_linux_hw_breakpoint *bpts;
1237 if (VEC_empty (arm_linux_thread_points_p, arm_threads))
1240 /* Get a list of breakpoints from any thread. */
1241 p = VEC_last (arm_linux_thread_points_p, arm_threads);
1243 /* Copy that thread's breakpoints and watchpoints to the new thread. */
1244 for (i = 0; i < info->bp_count; i++)
1245 if (arm_hwbp_control_is_enabled (p->bpts[i].control))
1246 arm_linux_insert_hw_breakpoint1 (p->bpts + i, tid, 0);
1247 for (i = 0; i < info->wp_count; i++)
1248 if (arm_hwbp_control_is_enabled (p->wpts[i].control))
1249 arm_linux_insert_hw_breakpoint1 (p->wpts + i, tid, 1);
1253 /* Handle thread exit. Tidy up the memory that has been allocated for the
1256 arm_linux_thread_exit (struct thread_info *tp, int silent)
1258 const struct arm_linux_hwbp_cap *info = arm_linux_get_hwbp_cap ();
1263 int tid = TIDGET (tp->ptid);
1264 struct arm_linux_thread_points *t = NULL, *p;
1267 VEC_iterate (arm_linux_thread_points_p, arm_threads, i, p); i++)
1279 VEC_unordered_remove (arm_linux_thread_points_p, arm_threads, i);
1287 void _initialize_arm_linux_nat (void);
1290 _initialize_arm_linux_nat (void)
1292 struct target_ops *t;
1294 os_version = get_linux_version (&os_major, &os_minor, &os_release);
1296 /* Fill in the generic GNU/Linux methods. */
1297 t = linux_target ();
1299 /* Add our register access methods. */
1300 t->to_fetch_registers = arm_linux_fetch_inferior_registers;
1301 t->to_store_registers = arm_linux_store_inferior_registers;
1303 /* Add our hardware breakpoint and watchpoint implementation. */
1304 t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
1305 t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
1306 t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
1307 t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
1308 t->to_insert_watchpoint = arm_linux_insert_watchpoint;
1309 t->to_remove_watchpoint = arm_linux_remove_watchpoint;
1310 t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
1311 t->to_stopped_data_address = arm_linux_stopped_data_address;
1312 t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
1314 t->to_read_description = arm_linux_read_description;
1316 /* Register the target. */
1317 linux_nat_add_target (t);
1319 /* Handle thread creation and exit */
1320 observer_attach_thread_exit (arm_linux_thread_exit);
1321 linux_nat_set_new_thread (t, arm_linux_new_thread);