1 /* GNU/Linux on ARM native support.
2 Copyright (C) 1999-2018 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "linux-nat.h"
25 #include "target-descriptions.h"
27 #include "observable.h"
28 #include "gdbthread.h"
31 #include "arm-linux-tdep.h"
32 #include "aarch32-linux-nat.h"
34 #include <elf/common.h>
36 #include "nat/gdb_ptrace.h"
37 #include <sys/utsname.h>
38 #include <sys/procfs.h>
40 #include "nat/linux-ptrace.h"
42 /* Prototypes for supply_gregset etc. */
45 /* Defines ps_err_e, struct ps_prochandle. */
46 #include "gdb_proc_service.h"
48 #ifndef PTRACE_GET_THREAD_AREA
49 #define PTRACE_GET_THREAD_AREA 22
52 #ifndef PTRACE_GETWMMXREGS
53 #define PTRACE_GETWMMXREGS 18
54 #define PTRACE_SETWMMXREGS 19
57 #ifndef PTRACE_GETVFPREGS
58 #define PTRACE_GETVFPREGS 27
59 #define PTRACE_SETVFPREGS 28
62 #ifndef PTRACE_GETHBPREGS
63 #define PTRACE_GETHBPREGS 29
64 #define PTRACE_SETHBPREGS 30
67 extern int arm_apcs_32;
69 class arm_linux_nat_target final : public linux_nat_target
72 /* Add our register access methods. */
73 void fetch_registers (struct regcache *, int) override;
74 void store_registers (struct regcache *, int) override;
76 /* Add our hardware breakpoint and watchpoint implementation. */
77 int can_use_hw_breakpoint (enum bptype, int, int) override;
79 int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
81 int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
83 int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
85 int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
86 struct expression *) override;
88 int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
89 struct expression *) override;
90 bool stopped_by_watchpoint () override;
92 bool stopped_data_address (CORE_ADDR *) override;
94 bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
96 const struct target_desc *read_description () override;
98 /* Override linux_nat_target low methods. */
100 /* Handle thread creation and exit. */
101 void low_new_thread (struct lwp_info *lp) override;
102 void low_delete_thread (struct arch_lwp_info *lp) override;
103 void low_prepare_to_resume (struct lwp_info *lp) override;
105 /* Handle process creation and exit. */
106 void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
107 void low_forget_process (pid_t pid) override;
110 static arm_linux_nat_target the_arm_linux_nat_target;
112 /* Get the whole floating point state of the process and store it
116 fetch_fpregs (struct regcache *regcache)
119 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
121 /* Get the thread id for the ptrace call. */
122 tid = ptid_get_lwp (regcache->ptid ());
124 /* Read the floating point state. */
125 if (have_ptrace_getregset == TRIBOOL_TRUE)
130 iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
132 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
135 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
138 perror_with_name (_("Unable to fetch the floating point registers."));
141 regcache->raw_supply (ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
143 /* Fetch the floating point registers. */
144 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
145 supply_nwfpe_register (regcache, regno, fp);
148 /* Save the whole floating point state of the process using
149 the contents from regcache. */
152 store_fpregs (const struct regcache *regcache)
155 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
157 /* Get the thread id for the ptrace call. */
158 tid = ptid_get_lwp (regcache->ptid ());
160 /* Read the floating point state. */
161 if (have_ptrace_getregset == TRIBOOL_TRUE)
163 elf_fpregset_t fpregs;
166 iov.iov_base = &fpregs;
167 iov.iov_len = sizeof (fpregs);
169 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
172 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
175 perror_with_name (_("Unable to fetch the floating point registers."));
178 if (REG_VALID == regcache->get_register_status (ARM_FPS_REGNUM))
179 regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
181 /* Store the floating point registers. */
182 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
183 if (REG_VALID == regcache->get_register_status (regno))
184 collect_nwfpe_register (regcache, regno, fp);
186 if (have_ptrace_getregset == TRIBOOL_TRUE)
191 iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
193 ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
196 ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
199 perror_with_name (_("Unable to store floating point registers."));
202 /* Fetch all general registers of the process and store into
206 fetch_regs (struct regcache *regcache)
211 /* Get the thread id for the ptrace call. */
212 tid = ptid_get_lwp (regcache->ptid ());
214 if (have_ptrace_getregset == TRIBOOL_TRUE)
218 iov.iov_base = ®s;
219 iov.iov_len = sizeof (regs);
221 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
224 ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
227 perror_with_name (_("Unable to fetch general registers."));
229 aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
233 store_regs (const struct regcache *regcache)
238 /* Get the thread id for the ptrace call. */
239 tid = ptid_get_lwp (regcache->ptid ());
241 /* Fetch the general registers. */
242 if (have_ptrace_getregset == TRIBOOL_TRUE)
246 iov.iov_base = ®s;
247 iov.iov_len = sizeof (regs);
249 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
252 ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
255 perror_with_name (_("Unable to fetch general registers."));
257 aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32);
259 if (have_ptrace_getregset == TRIBOOL_TRUE)
263 iov.iov_base = ®s;
264 iov.iov_len = sizeof (regs);
266 ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
269 ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
272 perror_with_name (_("Unable to store general registers."));
275 /* Fetch all WMMX registers of the process and store into
278 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
281 fetch_wmmx_regs (struct regcache *regcache)
283 char regbuf[IWMMXT_REGS_SIZE];
286 /* Get the thread id for the ptrace call. */
287 tid = ptid_get_lwp (regcache->ptid ());
289 ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
291 perror_with_name (_("Unable to fetch WMMX registers."));
293 for (regno = 0; regno < 16; regno++)
294 regcache->raw_supply (regno + ARM_WR0_REGNUM, ®buf[regno * 8]);
296 for (regno = 0; regno < 2; regno++)
297 regcache->raw_supply (regno + ARM_WCSSF_REGNUM,
298 ®buf[16 * 8 + regno * 4]);
300 for (regno = 0; regno < 4; regno++)
301 regcache->raw_supply (regno + ARM_WCGR0_REGNUM,
302 ®buf[16 * 8 + 2 * 4 + regno * 4]);
306 store_wmmx_regs (const struct regcache *regcache)
308 char regbuf[IWMMXT_REGS_SIZE];
311 /* Get the thread id for the ptrace call. */
312 tid = ptid_get_lwp (regcache->ptid ());
314 ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
316 perror_with_name (_("Unable to fetch WMMX registers."));
318 for (regno = 0; regno < 16; regno++)
319 if (REG_VALID == regcache->get_register_status (regno + ARM_WR0_REGNUM))
320 regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
323 for (regno = 0; regno < 2; regno++)
324 if (REG_VALID == regcache->get_register_status (regno + ARM_WCSSF_REGNUM))
325 regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
326 ®buf[16 * 8 + regno * 4]);
328 for (regno = 0; regno < 4; regno++)
329 if (REG_VALID == regcache->get_register_status (regno + ARM_WCGR0_REGNUM))
330 regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
331 ®buf[16 * 8 + 2 * 4 + regno * 4]);
333 ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
336 perror_with_name (_("Unable to store WMMX registers."));
340 fetch_vfp_regs (struct regcache *regcache)
342 gdb_byte regbuf[VFP_REGS_SIZE];
344 struct gdbarch *gdbarch = regcache->arch ();
345 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
347 /* Get the thread id for the ptrace call. */
348 tid = ptid_get_lwp (regcache->ptid ());
350 if (have_ptrace_getregset == TRIBOOL_TRUE)
354 iov.iov_base = regbuf;
355 iov.iov_len = VFP_REGS_SIZE;
356 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
359 ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
362 perror_with_name (_("Unable to fetch VFP registers."));
364 aarch32_vfp_regcache_supply (regcache, regbuf,
365 tdep->vfp_register_count);
369 store_vfp_regs (const struct regcache *regcache)
371 gdb_byte regbuf[VFP_REGS_SIZE];
373 struct gdbarch *gdbarch = regcache->arch ();
374 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
376 /* Get the thread id for the ptrace call. */
377 tid = ptid_get_lwp (regcache->ptid ());
379 if (have_ptrace_getregset == TRIBOOL_TRUE)
383 iov.iov_base = regbuf;
384 iov.iov_len = VFP_REGS_SIZE;
385 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
388 ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
391 perror_with_name (_("Unable to fetch VFP registers (for update)."));
393 aarch32_vfp_regcache_collect (regcache, regbuf,
394 tdep->vfp_register_count);
396 if (have_ptrace_getregset == TRIBOOL_TRUE)
400 iov.iov_base = regbuf;
401 iov.iov_len = VFP_REGS_SIZE;
402 ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
405 ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
408 perror_with_name (_("Unable to store VFP registers."));
411 /* Fetch registers from the child process. Fetch all registers if
412 regno == -1, otherwise fetch all general registers or all floating
413 point registers depending upon the value of regno. */
416 arm_linux_nat_target::fetch_registers (struct regcache *regcache, int regno)
418 struct gdbarch *gdbarch = regcache->arch ();
419 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
423 fetch_regs (regcache);
424 if (tdep->have_wmmx_registers)
425 fetch_wmmx_regs (regcache);
426 if (tdep->vfp_register_count > 0)
427 fetch_vfp_regs (regcache);
428 if (tdep->have_fpa_registers)
429 fetch_fpregs (regcache);
433 if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
434 fetch_regs (regcache);
435 else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
436 fetch_fpregs (regcache);
437 else if (tdep->have_wmmx_registers
438 && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
439 fetch_wmmx_regs (regcache);
440 else if (tdep->vfp_register_count > 0
441 && regno >= ARM_D0_REGNUM
442 && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
443 || regno == ARM_FPSCR_REGNUM))
444 fetch_vfp_regs (regcache);
448 /* Store registers back into the inferior. Store all registers if
449 regno == -1, otherwise store all general registers or all floating
450 point registers depending upon the value of regno. */
453 arm_linux_nat_target::store_registers (struct regcache *regcache, int regno)
455 struct gdbarch *gdbarch = regcache->arch ();
456 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
460 store_regs (regcache);
461 if (tdep->have_wmmx_registers)
462 store_wmmx_regs (regcache);
463 if (tdep->vfp_register_count > 0)
464 store_vfp_regs (regcache);
465 if (tdep->have_fpa_registers)
466 store_fpregs (regcache);
470 if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
471 store_regs (regcache);
472 else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
473 store_fpregs (regcache);
474 else if (tdep->have_wmmx_registers
475 && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
476 store_wmmx_regs (regcache);
477 else if (tdep->vfp_register_count > 0
478 && regno >= ARM_D0_REGNUM
479 && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
480 || regno == ARM_FPSCR_REGNUM))
481 store_vfp_regs (regcache);
485 /* Wrapper functions for the standard regset handling, used by
489 fill_gregset (const struct regcache *regcache,
490 gdb_gregset_t *gregsetp, int regno)
492 arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
496 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
498 arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
502 fill_fpregset (const struct regcache *regcache,
503 gdb_fpregset_t *fpregsetp, int regno)
505 arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
508 /* Fill GDB's register array with the floating-point register values
512 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
514 arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
517 /* Fetch the thread-local storage pointer for libthread_db. */
520 ps_get_thread_area (struct ps_prochandle *ph,
521 lwpid_t lwpid, int idx, void **base)
523 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
526 /* IDX is the bias from the thread pointer to the beginning of the
527 thread descriptor. It has to be subtracted due to implementation
528 quirks in libthread_db. */
529 *base = (void *) ((char *)*base - idx);
534 const struct target_desc *
535 arm_linux_nat_target::read_description ()
537 CORE_ADDR arm_hwcap = 0;
539 if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
541 elf_gregset_t gpregs;
543 int tid = ptid_get_lwp (inferior_ptid);
545 iov.iov_base = &gpregs;
546 iov.iov_len = sizeof (gpregs);
548 /* Check if PTRACE_GETREGSET works. */
549 if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
550 have_ptrace_getregset = TRIBOOL_FALSE;
552 have_ptrace_getregset = TRIBOOL_TRUE;
555 if (target_auxv_search (this, AT_HWCAP, &arm_hwcap) != 1)
557 return this->beneath->read_description ();
560 if (arm_hwcap & HWCAP_IWMMXT)
561 return tdesc_arm_with_iwmmxt;
563 if (arm_hwcap & HWCAP_VFP)
567 const struct target_desc * result = NULL;
569 /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
570 Neon with VFPv3-D32. */
571 if (arm_hwcap & HWCAP_NEON)
572 result = tdesc_arm_with_neon;
573 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
574 result = tdesc_arm_with_vfpv3;
576 result = tdesc_arm_with_vfpv2;
578 /* Now make sure that the kernel supports reading these
579 registers. Support was added in 2.6.30. */
580 pid = ptid_get_lwp (inferior_ptid);
582 buf = (char *) alloca (VFP_REGS_SIZE);
583 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
590 return this->beneath->read_description ();
593 /* Information describing the hardware breakpoint capabilities. */
594 struct arm_linux_hwbp_cap
597 gdb_byte max_wp_length;
602 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
603 assume a maximum number of supported break-/watchpoints. */
607 /* Get hold of the Hardware Breakpoint information for the target we are
608 attached to. Returns NULL if the kernel doesn't support Hardware
609 breakpoints at all, or a pointer to the information structure. */
610 static const struct arm_linux_hwbp_cap *
611 arm_linux_get_hwbp_cap (void)
613 /* The info structure we return. */
614 static struct arm_linux_hwbp_cap info;
616 /* Is INFO in a good state? -1 means that no attempt has been made to
617 initialize INFO; 0 means an attempt has been made, but it failed; 1
618 means INFO is in an initialized state. */
619 static int available = -1;
626 tid = ptid_get_lwp (inferior_ptid);
627 if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
631 info.arch = (gdb_byte)((val >> 24) & 0xff);
632 info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
633 info.wp_count = (gdb_byte)((val >> 8) & 0xff);
634 info.bp_count = (gdb_byte)(val & 0xff);
636 if (info.wp_count > MAX_WPTS)
638 warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
639 supports %d"), MAX_WPTS, info.wp_count);
640 info.wp_count = MAX_WPTS;
643 if (info.bp_count > MAX_BPTS)
645 warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
646 supports %d"), MAX_BPTS, info.bp_count);
647 info.bp_count = MAX_BPTS;
649 available = (info.arch != 0);
653 return available == 1 ? &info : NULL;
656 /* How many hardware breakpoints are available? */
658 arm_linux_get_hw_breakpoint_count (void)
660 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
661 return cap != NULL ? cap->bp_count : 0;
664 /* How many hardware watchpoints are available? */
666 arm_linux_get_hw_watchpoint_count (void)
668 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
669 return cap != NULL ? cap->wp_count : 0;
672 /* Have we got a free break-/watch-point available for use? Returns -1 if
673 there is not an appropriate resource available, otherwise returns 1. */
675 arm_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
678 if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
679 || type == bp_access_watchpoint || type == bp_watchpoint)
681 int count = arm_linux_get_hw_watchpoint_count ();
685 else if (cnt + ot > count)
688 else if (type == bp_hardware_breakpoint)
690 int count = arm_linux_get_hw_breakpoint_count ();
694 else if (cnt > count)
703 /* Enum describing the different types of ARM hardware break-/watch-points. */
712 /* Type describing an ARM Hardware Breakpoint Control register value. */
713 typedef unsigned int arm_hwbp_control_t;
715 /* Structure used to keep track of hardware break-/watch-points. */
716 struct arm_linux_hw_breakpoint
718 /* Address to break on, or being watched. */
719 unsigned int address;
720 /* Control register for break-/watch- point. */
721 arm_hwbp_control_t control;
724 /* Structure containing arrays of per process hardware break-/watchpoints
725 for caching address and control information.
727 The Linux ptrace interface to hardware break-/watch-points presents the
728 values in a vector centred around 0 (which is used fo generic information).
729 Positive indicies refer to breakpoint addresses/control registers, negative
730 indices to watchpoint addresses/control registers.
732 The Linux vector is indexed as follows:
733 -((i << 1) + 2): Control register for watchpoint i.
734 -((i << 1) + 1): Address register for watchpoint i.
735 0: Information register.
736 ((i << 1) + 1): Address register for breakpoint i.
737 ((i << 1) + 2): Control register for breakpoint i.
739 This structure is used as a per-thread cache of the state stored by the
740 kernel, so that we don't need to keep calling into the kernel to find a
743 We treat break-/watch-points with their enable bit clear as being deleted.
745 struct arm_linux_debug_reg_state
747 /* Hardware breakpoints for this process. */
748 struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
749 /* Hardware watchpoints for this process. */
750 struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
753 /* Per-process arch-specific data we want to keep. */
754 struct arm_linux_process_info
757 struct arm_linux_process_info *next;
758 /* The process identifier. */
760 /* Hardware break-/watchpoints state information. */
761 struct arm_linux_debug_reg_state state;
765 /* Per-thread arch-specific data we want to keep. */
768 /* Non-zero if our copy differs from what's recorded in the thread. */
769 char bpts_changed[MAX_BPTS];
770 char wpts_changed[MAX_WPTS];
773 static struct arm_linux_process_info *arm_linux_process_list = NULL;
775 /* Find process data for process PID. */
777 static struct arm_linux_process_info *
778 arm_linux_find_process_pid (pid_t pid)
780 struct arm_linux_process_info *proc;
782 for (proc = arm_linux_process_list; proc; proc = proc->next)
783 if (proc->pid == pid)
789 /* Add process data for process PID. Returns newly allocated info
792 static struct arm_linux_process_info *
793 arm_linux_add_process (pid_t pid)
795 struct arm_linux_process_info *proc;
797 proc = XCNEW (struct arm_linux_process_info);
800 proc->next = arm_linux_process_list;
801 arm_linux_process_list = proc;
806 /* Get data specific info for process PID, creating it if necessary.
807 Never returns NULL. */
809 static struct arm_linux_process_info *
810 arm_linux_process_info_get (pid_t pid)
812 struct arm_linux_process_info *proc;
814 proc = arm_linux_find_process_pid (pid);
816 proc = arm_linux_add_process (pid);
821 /* Called whenever GDB is no longer debugging process PID. It deletes
822 data structures that keep track of debug register state. */
825 arm_linux_nat_target::low_forget_process (pid_t pid)
827 struct arm_linux_process_info *proc, **proc_link;
829 proc = arm_linux_process_list;
830 proc_link = &arm_linux_process_list;
834 if (proc->pid == pid)
836 *proc_link = proc->next;
842 proc_link = &proc->next;
847 /* Get hardware break-/watchpoint state for process PID. */
849 static struct arm_linux_debug_reg_state *
850 arm_linux_get_debug_reg_state (pid_t pid)
852 return &arm_linux_process_info_get (pid)->state;
855 /* Initialize an ARM hardware break-/watch-point control register value.
856 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
857 type of break-/watch-point; ENABLE indicates whether the point is enabled.
859 static arm_hwbp_control_t
860 arm_hwbp_control_initialize (unsigned byte_address_select,
861 arm_hwbp_type hwbp_type,
864 gdb_assert ((byte_address_select & ~0xffU) == 0);
865 gdb_assert (hwbp_type != arm_hwbp_break
866 || ((byte_address_select & 0xfU) != 0));
868 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
871 /* Does the breakpoint control value CONTROL have the enable bit set? */
873 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
875 return control & 0x1;
878 /* Change a breakpoint control word so that it is in the disabled state. */
879 static arm_hwbp_control_t
880 arm_hwbp_control_disable (arm_hwbp_control_t control)
882 return control & ~0x1;
885 /* Initialise the hardware breakpoint structure P. The breakpoint will be
886 enabled, and will point to the placed address of BP_TGT. */
888 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
889 struct bp_target_info *bp_tgt,
890 struct arm_linux_hw_breakpoint *p)
893 CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
895 /* We have to create a mask for the control register which says which bits
896 of the word pointed to by address to break on. */
897 if (arm_pc_is_thumb (gdbarch, address))
908 p->address = (unsigned int) address;
909 p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
912 /* Get the ARM hardware breakpoint type from the TYPE value we're
913 given when asked to set a watchpoint. */
915 arm_linux_get_hwbp_type (enum target_hw_bp_type type)
918 return arm_hwbp_load;
919 else if (type == hw_write)
920 return arm_hwbp_store;
922 return arm_hwbp_access;
925 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
926 to LEN. The type of watchpoint is given in RW. */
928 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len,
929 enum target_hw_bp_type type,
930 struct arm_linux_hw_breakpoint *p)
932 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
935 gdb_assert (cap != NULL);
936 gdb_assert (cap->max_wp_length != 0);
938 mask = (1 << len) - 1;
940 p->address = (unsigned int) addr;
941 p->control = arm_hwbp_control_initialize (mask,
942 arm_linux_get_hwbp_type (type), 1);
945 /* Are two break-/watch-points equal? */
947 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
948 const struct arm_linux_hw_breakpoint *p2)
950 return p1->address == p2->address && p1->control == p2->control;
953 /* Callback to mark a watch-/breakpoint to be updated in all threads of
954 the current process. */
956 struct update_registers_data
963 update_registers_callback (struct lwp_info *lwp, void *arg)
965 struct update_registers_data *data = (struct update_registers_data *) arg;
967 if (lwp->arch_private == NULL)
968 lwp->arch_private = XCNEW (struct arch_lwp_info);
970 /* The actual update is done later just before resuming the lwp,
971 we just mark that the registers need updating. */
973 lwp->arch_private->wpts_changed[data->index] = 1;
975 lwp->arch_private->bpts_changed[data->index] = 1;
977 /* If the lwp isn't stopped, force it to momentarily pause, so
978 we can update its breakpoint registers. */
980 linux_stop_lwp (lwp);
985 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
986 =1) BPT for thread TID. */
988 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
994 struct arm_linux_hw_breakpoint* bpts;
995 struct update_registers_data data;
997 pid = ptid_get_pid (inferior_ptid);
998 pid_ptid = pid_to_ptid (pid);
1002 count = arm_linux_get_hw_watchpoint_count ();
1003 bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1007 count = arm_linux_get_hw_breakpoint_count ();
1008 bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1011 for (i = 0; i < count; ++i)
1012 if (!arm_hwbp_control_is_enabled (bpts[i].control))
1014 data.watch = watchpoint;
1017 iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1021 gdb_assert (i != count);
1024 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1025 (WATCHPOINT = 1) BPT for thread TID. */
1027 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1033 struct arm_linux_hw_breakpoint* bpts;
1034 struct update_registers_data data;
1036 pid = ptid_get_pid (inferior_ptid);
1037 pid_ptid = pid_to_ptid (pid);
1041 count = arm_linux_get_hw_watchpoint_count ();
1042 bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1046 count = arm_linux_get_hw_breakpoint_count ();
1047 bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1050 for (i = 0; i < count; ++i)
1051 if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1053 data.watch = watchpoint;
1055 bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1056 iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1060 gdb_assert (i != count);
1063 /* Insert a Hardware breakpoint. */
1065 arm_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
1066 struct bp_target_info *bp_tgt)
1068 struct lwp_info *lp;
1069 struct arm_linux_hw_breakpoint p;
1071 if (arm_linux_get_hw_breakpoint_count () == 0)
1074 arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1076 arm_linux_insert_hw_breakpoint1 (&p, 0);
1081 /* Remove a hardware breakpoint. */
1083 arm_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
1084 struct bp_target_info *bp_tgt)
1086 struct lwp_info *lp;
1087 struct arm_linux_hw_breakpoint p;
1089 if (arm_linux_get_hw_breakpoint_count () == 0)
1092 arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1094 arm_linux_remove_hw_breakpoint1 (&p, 0);
1099 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1102 arm_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
1104 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1105 CORE_ADDR max_wp_length, aligned_addr;
1107 /* Can not set watchpoints for zero or negative lengths. */
1111 /* Need to be able to use the ptrace interface. */
1112 if (cap == NULL || cap->wp_count == 0)
1115 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1116 range covered by a watchpoint. */
1117 max_wp_length = (CORE_ADDR)cap->max_wp_length;
1118 aligned_addr = addr & ~(max_wp_length - 1);
1120 if (aligned_addr + max_wp_length < addr + len)
1123 /* The current ptrace interface can only handle watchpoints that are a
1125 if ((len & (len - 1)) != 0)
1128 /* All tests passed so we must be able to set a watchpoint. */
1132 /* Insert a Hardware breakpoint. */
1134 arm_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
1135 enum target_hw_bp_type rw,
1136 struct expression *cond)
1138 struct lwp_info *lp;
1139 struct arm_linux_hw_breakpoint p;
1141 if (arm_linux_get_hw_watchpoint_count () == 0)
1144 arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1146 arm_linux_insert_hw_breakpoint1 (&p, 1);
1151 /* Remove a hardware breakpoint. */
1153 arm_linux_nat_target::remove_watchpoint (CORE_ADDR addr,
1154 int len, enum target_hw_bp_type rw,
1155 struct expression *cond)
1157 struct lwp_info *lp;
1158 struct arm_linux_hw_breakpoint p;
1160 if (arm_linux_get_hw_watchpoint_count () == 0)
1163 arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1165 arm_linux_remove_hw_breakpoint1 (&p, 1);
1170 /* What was the data address the target was stopped on accessing. */
1172 arm_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
1177 if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1180 /* This must be a hardware breakpoint. */
1181 if (siginfo.si_signo != SIGTRAP
1182 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1185 /* We must be able to set hardware watchpoints. */
1186 if (arm_linux_get_hw_watchpoint_count () == 0)
1189 slot = siginfo.si_errno;
1191 /* If we are in a positive slot then we're looking at a breakpoint and not
1196 *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1200 /* Has the target been stopped by hitting a watchpoint? */
1202 arm_linux_nat_target::stopped_by_watchpoint ()
1205 return stopped_data_address (&addr);
1209 arm_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
1213 return start <= addr && start + length - 1 >= addr;
1216 /* Handle thread creation. We need to copy the breakpoints and watchpoints
1217 in the parent thread to the child thread. */
1219 arm_linux_nat_target::low_new_thread (struct lwp_info *lp)
1222 struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1224 /* Mark that all the hardware breakpoint/watchpoint register pairs
1225 for this thread need to be initialized. */
1227 for (i = 0; i < MAX_BPTS; i++)
1229 info->bpts_changed[i] = 1;
1230 info->wpts_changed[i] = 1;
1233 lp->arch_private = info;
1236 /* Function to call when a thread is being deleted. */
1239 arm_linux_nat_target::low_delete_thread (struct arch_lwp_info *arch_lwp)
1244 /* Called when resuming a thread.
1245 The hardware debug registers are updated when there is any change. */
1248 arm_linux_nat_target::low_prepare_to_resume (struct lwp_info *lwp)
1251 struct arm_linux_hw_breakpoint *bpts, *wpts;
1252 struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1254 pid = ptid_get_lwp (lwp->ptid);
1255 bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
1256 wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
1258 /* NULL means this is the main thread still going through the shell,
1259 or, no watchpoint has been set yet. In that case, there's
1261 if (arm_lwp_info == NULL)
1264 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1265 if (arm_lwp_info->bpts_changed[i])
1268 if (arm_hwbp_control_is_enabled (bpts[i].control))
1269 if (ptrace (PTRACE_SETHBPREGS, pid,
1270 (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1271 perror_with_name (_("Unexpected error setting breakpoint"));
1273 if (bpts[i].control != 0)
1274 if (ptrace (PTRACE_SETHBPREGS, pid,
1275 (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1276 perror_with_name (_("Unexpected error setting breakpoint"));
1278 arm_lwp_info->bpts_changed[i] = 0;
1281 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1282 if (arm_lwp_info->wpts_changed[i])
1285 if (arm_hwbp_control_is_enabled (wpts[i].control))
1286 if (ptrace (PTRACE_SETHBPREGS, pid,
1287 (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1288 perror_with_name (_("Unexpected error setting watchpoint"));
1290 if (wpts[i].control != 0)
1291 if (ptrace (PTRACE_SETHBPREGS, pid,
1292 (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1293 perror_with_name (_("Unexpected error setting watchpoint"));
1295 arm_lwp_info->wpts_changed[i] = 0;
1299 /* linux_nat_new_fork hook. */
1302 arm_linux_nat_target::low_new_fork (struct lwp_info *parent, pid_t child_pid)
1305 struct arm_linux_debug_reg_state *parent_state;
1306 struct arm_linux_debug_reg_state *child_state;
1308 /* NULL means no watchpoint has ever been set in the parent. In
1309 that case, there's nothing to do. */
1310 if (parent->arch_private == NULL)
1313 /* GDB core assumes the child inherits the watchpoints/hw
1314 breakpoints of the parent, and will remove them all from the
1315 forked off process. Copy the debug registers mirrors into the
1316 new process so that all breakpoints and watchpoints can be
1317 removed together. */
1319 parent_pid = ptid_get_pid (parent->ptid);
1320 parent_state = arm_linux_get_debug_reg_state (parent_pid);
1321 child_state = arm_linux_get_debug_reg_state (child_pid);
1322 *child_state = *parent_state;
1326 _initialize_arm_linux_nat (void)
1328 /* Register the target. */
1329 linux_target = &the_arm_linux_nat_target;
1330 add_inf_child_target (&the_arm_linux_nat_target);