1 /* GNU/Linux on ARM native support.
2 Copyright (C) 1999-2015 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "linux-nat.h"
25 #include "target-descriptions.h"
28 #include "gdbthread.h"
31 #include "arm-linux-tdep.h"
33 #include <elf/common.h>
35 #include <sys/ptrace.h>
36 #include <sys/utsname.h>
37 #include <sys/procfs.h>
39 #include "nat/linux-ptrace.h"
41 /* Prototypes for supply_gregset etc. */
44 /* Defines ps_err_e, struct ps_prochandle. */
45 #include "gdb_proc_service.h"
47 #ifndef PTRACE_GET_THREAD_AREA
48 #define PTRACE_GET_THREAD_AREA 22
51 #ifndef PTRACE_GETWMMXREGS
52 #define PTRACE_GETWMMXREGS 18
53 #define PTRACE_SETWMMXREGS 19
56 #ifndef PTRACE_GETVFPREGS
57 #define PTRACE_GETVFPREGS 27
58 #define PTRACE_SETVFPREGS 28
61 #ifndef PTRACE_GETHBPREGS
62 #define PTRACE_GETHBPREGS 29
63 #define PTRACE_SETHBPREGS 30
66 extern int arm_apcs_32;
68 /* On GNU/Linux, threads are implemented as pseudo-processes, in which
69 case we may be tracing more than one process at a time. In that
70 case, inferior_ptid will contain the main process ID and the
71 individual thread (process) ID. get_thread_id () is used to get
72 the thread id if it's available, and the process id otherwise. */
75 get_thread_id (ptid_t ptid)
77 int tid = ptid_get_lwp (ptid);
79 tid = ptid_get_pid (ptid);
83 #define GET_THREAD_ID(PTID) get_thread_id (PTID)
85 /* Get the whole floating point state of the process and store it
89 fetch_fpregs (struct regcache *regcache)
92 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
94 /* Get the thread id for the ptrace call. */
95 tid = GET_THREAD_ID (inferior_ptid);
97 /* Read the floating point state. */
98 if (have_ptrace_getregset == TRIBOOL_TRUE)
103 iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
105 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
108 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
112 warning (_("Unable to fetch the floating point registers."));
117 regcache_raw_supply (regcache, ARM_FPS_REGNUM,
118 fp + NWFPE_FPSR_OFFSET);
120 /* Fetch the floating point registers. */
121 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
122 supply_nwfpe_register (regcache, regno, fp);
125 /* Save the whole floating point state of the process using
126 the contents from regcache. */
129 store_fpregs (const struct regcache *regcache)
132 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
134 /* Get the thread id for the ptrace call. */
135 tid = GET_THREAD_ID (inferior_ptid);
137 /* Read the floating point state. */
138 if (have_ptrace_getregset == TRIBOOL_TRUE)
140 elf_fpregset_t fpregs;
143 iov.iov_base = &fpregs;
144 iov.iov_len = sizeof (fpregs);
146 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
149 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
153 warning (_("Unable to fetch the floating point registers."));
158 if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
159 regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
161 /* Store the floating point registers. */
162 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
163 if (REG_VALID == regcache_register_status (regcache, regno))
164 collect_nwfpe_register (regcache, regno, fp);
166 if (have_ptrace_getregset == TRIBOOL_TRUE)
171 iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
173 ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
176 ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
180 warning (_("Unable to store floating point registers."));
185 /* Fetch all general registers of the process and store into
189 fetch_regs (struct regcache *regcache)
194 /* Get the thread id for the ptrace call. */
195 tid = GET_THREAD_ID (inferior_ptid);
197 if (have_ptrace_getregset == TRIBOOL_TRUE)
201 iov.iov_base = ®s;
202 iov.iov_len = sizeof (regs);
204 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
207 ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
211 warning (_("Unable to fetch general registers."));
215 for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
216 regcache_raw_supply (regcache, regno, (char *) ®s[regno]);
219 regcache_raw_supply (regcache, ARM_PS_REGNUM,
220 (char *) ®s[ARM_CPSR_GREGNUM]);
222 regcache_raw_supply (regcache, ARM_PS_REGNUM,
223 (char *) ®s[ARM_PC_REGNUM]);
225 regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
226 (get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
227 regcache_raw_supply (regcache, ARM_PC_REGNUM,
228 (char *) ®s[ARM_PC_REGNUM]);
232 store_regs (const struct regcache *regcache)
237 /* Get the thread id for the ptrace call. */
238 tid = GET_THREAD_ID (inferior_ptid);
240 /* Fetch the general registers. */
241 if (have_ptrace_getregset == TRIBOOL_TRUE)
245 iov.iov_base = ®s;
246 iov.iov_len = sizeof (regs);
248 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
251 ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
255 warning (_("Unable to fetch general registers."));
259 for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
261 if (REG_VALID == regcache_register_status (regcache, regno))
262 regcache_raw_collect (regcache, regno, (char *) ®s[regno]);
265 if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
266 regcache_raw_collect (regcache, ARM_PS_REGNUM,
267 (char *) ®s[ARM_CPSR_GREGNUM]);
269 if (have_ptrace_getregset == TRIBOOL_TRUE)
273 iov.iov_base = ®s;
274 iov.iov_len = sizeof (regs);
276 ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
279 ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
283 warning (_("Unable to store general registers."));
288 /* Fetch all WMMX registers of the process and store into
291 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
294 fetch_wmmx_regs (struct regcache *regcache)
296 char regbuf[IWMMXT_REGS_SIZE];
299 /* Get the thread id for the ptrace call. */
300 tid = GET_THREAD_ID (inferior_ptid);
302 ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
305 warning (_("Unable to fetch WMMX registers."));
309 for (regno = 0; regno < 16; regno++)
310 regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
313 for (regno = 0; regno < 2; regno++)
314 regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
315 ®buf[16 * 8 + regno * 4]);
317 for (regno = 0; regno < 4; regno++)
318 regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
319 ®buf[16 * 8 + 2 * 4 + regno * 4]);
323 store_wmmx_regs (const struct regcache *regcache)
325 char regbuf[IWMMXT_REGS_SIZE];
328 /* Get the thread id for the ptrace call. */
329 tid = GET_THREAD_ID (inferior_ptid);
331 ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
334 warning (_("Unable to fetch WMMX registers."));
338 for (regno = 0; regno < 16; regno++)
339 if (REG_VALID == regcache_register_status (regcache,
340 regno + ARM_WR0_REGNUM))
341 regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
344 for (regno = 0; regno < 2; regno++)
345 if (REG_VALID == regcache_register_status (regcache,
346 regno + ARM_WCSSF_REGNUM))
347 regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
348 ®buf[16 * 8 + regno * 4]);
350 for (regno = 0; regno < 4; regno++)
351 if (REG_VALID == regcache_register_status (regcache,
352 regno + ARM_WCGR0_REGNUM))
353 regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
354 ®buf[16 * 8 + 2 * 4 + regno * 4]);
356 ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
360 warning (_("Unable to store WMMX registers."));
365 /* Fetch and store VFP Registers. The kernel object has space for 32
366 64-bit registers, and the FPSCR. This is even when on a VFPv2 or
368 #define VFP_REGS_SIZE (32 * 8 + 4)
371 fetch_vfp_regs (struct regcache *regcache)
373 char regbuf[VFP_REGS_SIZE];
375 struct gdbarch *gdbarch = get_regcache_arch (regcache);
376 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
378 /* Get the thread id for the ptrace call. */
379 tid = GET_THREAD_ID (inferior_ptid);
381 if (have_ptrace_getregset == TRIBOOL_TRUE)
385 iov.iov_base = regbuf;
386 iov.iov_len = VFP_REGS_SIZE;
387 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
390 ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
394 warning (_("Unable to fetch VFP registers."));
398 for (regno = 0; regno < tdep->vfp_register_count; regno++)
399 regcache_raw_supply (regcache, regno + ARM_D0_REGNUM,
400 (char *) regbuf + regno * 8);
402 regcache_raw_supply (regcache, ARM_FPSCR_REGNUM,
403 (char *) regbuf + 32 * 8);
407 store_vfp_regs (const struct regcache *regcache)
409 char regbuf[VFP_REGS_SIZE];
411 struct gdbarch *gdbarch = get_regcache_arch (regcache);
412 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
414 /* Get the thread id for the ptrace call. */
415 tid = GET_THREAD_ID (inferior_ptid);
417 if (have_ptrace_getregset == TRIBOOL_TRUE)
421 iov.iov_base = regbuf;
422 iov.iov_len = VFP_REGS_SIZE;
423 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
426 ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
430 warning (_("Unable to fetch VFP registers (for update)."));
434 for (regno = 0; regno < tdep->vfp_register_count; regno++)
435 regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
436 (char *) regbuf + regno * 8);
438 regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
439 (char *) regbuf + 32 * 8);
441 if (have_ptrace_getregset == TRIBOOL_TRUE)
445 iov.iov_base = regbuf;
446 iov.iov_len = VFP_REGS_SIZE;
447 ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
450 ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
454 warning (_("Unable to store VFP registers."));
459 /* Fetch registers from the child process. Fetch all registers if
460 regno == -1, otherwise fetch all general registers or all floating
461 point registers depending upon the value of regno. */
464 arm_linux_fetch_inferior_registers (struct target_ops *ops,
465 struct regcache *regcache, int regno)
467 struct gdbarch *gdbarch = get_regcache_arch (regcache);
468 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
472 fetch_regs (regcache);
473 fetch_fpregs (regcache);
474 if (tdep->have_wmmx_registers)
475 fetch_wmmx_regs (regcache);
476 if (tdep->vfp_register_count > 0)
477 fetch_vfp_regs (regcache);
481 if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
482 fetch_regs (regcache);
483 else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
484 fetch_fpregs (regcache);
485 else if (tdep->have_wmmx_registers
486 && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
487 fetch_wmmx_regs (regcache);
488 else if (tdep->vfp_register_count > 0
489 && regno >= ARM_D0_REGNUM
490 && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
491 fetch_vfp_regs (regcache);
495 /* Store registers back into the inferior. Store all registers if
496 regno == -1, otherwise store all general registers or all floating
497 point registers depending upon the value of regno. */
500 arm_linux_store_inferior_registers (struct target_ops *ops,
501 struct regcache *regcache, int regno)
503 struct gdbarch *gdbarch = get_regcache_arch (regcache);
504 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
508 store_regs (regcache);
509 store_fpregs (regcache);
510 if (tdep->have_wmmx_registers)
511 store_wmmx_regs (regcache);
512 if (tdep->vfp_register_count > 0)
513 store_vfp_regs (regcache);
517 if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
518 store_regs (regcache);
519 else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
520 store_fpregs (regcache);
521 else if (tdep->have_wmmx_registers
522 && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
523 store_wmmx_regs (regcache);
524 else if (tdep->vfp_register_count > 0
525 && regno >= ARM_D0_REGNUM
526 && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
527 store_vfp_regs (regcache);
531 /* Wrapper functions for the standard regset handling, used by
535 fill_gregset (const struct regcache *regcache,
536 gdb_gregset_t *gregsetp, int regno)
538 arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
542 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
544 arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
548 fill_fpregset (const struct regcache *regcache,
549 gdb_fpregset_t *fpregsetp, int regno)
551 arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
554 /* Fill GDB's register array with the floating-point register values
558 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
560 arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
563 /* Fetch the thread-local storage pointer for libthread_db. */
566 ps_get_thread_area (const struct ps_prochandle *ph,
567 lwpid_t lwpid, int idx, void **base)
569 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
572 /* IDX is the bias from the thread pointer to the beginning of the
573 thread descriptor. It has to be subtracted due to implementation
574 quirks in libthread_db. */
575 *base = (void *) ((char *)*base - idx);
580 static const struct target_desc *
581 arm_linux_read_description (struct target_ops *ops)
583 CORE_ADDR arm_hwcap = 0;
585 if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
587 elf_gregset_t gpregs;
589 int tid = GET_THREAD_ID (inferior_ptid);
591 iov.iov_base = &gpregs;
592 iov.iov_len = sizeof (gpregs);
594 /* Check if PTRACE_GETREGSET works. */
595 if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
596 have_ptrace_getregset = TRIBOOL_FALSE;
598 have_ptrace_getregset = TRIBOOL_TRUE;
601 if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
603 return ops->beneath->to_read_description (ops->beneath);
606 if (arm_hwcap & HWCAP_IWMMXT)
607 return tdesc_arm_with_iwmmxt;
609 if (arm_hwcap & HWCAP_VFP)
613 const struct target_desc * result = NULL;
615 /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
616 Neon with VFPv3-D32. */
617 if (arm_hwcap & HWCAP_NEON)
618 result = tdesc_arm_with_neon;
619 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
620 result = tdesc_arm_with_vfpv3;
622 result = tdesc_arm_with_vfpv2;
624 /* Now make sure that the kernel supports reading these
625 registers. Support was added in 2.6.30. */
626 pid = ptid_get_lwp (inferior_ptid);
628 buf = alloca (VFP_REGS_SIZE);
629 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
636 return ops->beneath->to_read_description (ops->beneath);
639 /* Information describing the hardware breakpoint capabilities. */
640 struct arm_linux_hwbp_cap
643 gdb_byte max_wp_length;
648 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
649 assume a maximum number of supported break-/watchpoints. */
653 /* Get hold of the Hardware Breakpoint information for the target we are
654 attached to. Returns NULL if the kernel doesn't support Hardware
655 breakpoints at all, or a pointer to the information structure. */
656 static const struct arm_linux_hwbp_cap *
657 arm_linux_get_hwbp_cap (void)
659 /* The info structure we return. */
660 static struct arm_linux_hwbp_cap info;
662 /* Is INFO in a good state? -1 means that no attempt has been made to
663 initialize INFO; 0 means an attempt has been made, but it failed; 1
664 means INFO is in an initialized state. */
665 static int available = -1;
672 tid = GET_THREAD_ID (inferior_ptid);
673 if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
677 info.arch = (gdb_byte)((val >> 24) & 0xff);
678 info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
679 info.wp_count = (gdb_byte)((val >> 8) & 0xff);
680 info.bp_count = (gdb_byte)(val & 0xff);
682 if (info.wp_count > MAX_WPTS)
684 warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
685 supports %d"), MAX_WPTS, info.wp_count);
686 info.wp_count = MAX_WPTS;
689 if (info.bp_count > MAX_BPTS)
691 warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
692 supports %d"), MAX_BPTS, info.bp_count);
693 info.bp_count = MAX_BPTS;
695 available = (info.arch != 0);
699 return available == 1 ? &info : NULL;
702 /* How many hardware breakpoints are available? */
704 arm_linux_get_hw_breakpoint_count (void)
706 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
707 return cap != NULL ? cap->bp_count : 0;
710 /* How many hardware watchpoints are available? */
712 arm_linux_get_hw_watchpoint_count (void)
714 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
715 return cap != NULL ? cap->wp_count : 0;
718 /* Have we got a free break-/watch-point available for use? Returns -1 if
719 there is not an appropriate resource available, otherwise returns 1. */
721 arm_linux_can_use_hw_breakpoint (struct target_ops *self,
722 int type, int cnt, int ot)
724 if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
725 || type == bp_access_watchpoint || type == bp_watchpoint)
727 int count = arm_linux_get_hw_watchpoint_count ();
731 else if (cnt + ot > count)
734 else if (type == bp_hardware_breakpoint)
736 int count = arm_linux_get_hw_breakpoint_count ();
740 else if (cnt > count)
749 /* Enum describing the different types of ARM hardware break-/watch-points. */
758 /* Type describing an ARM Hardware Breakpoint Control register value. */
759 typedef unsigned int arm_hwbp_control_t;
761 /* Structure used to keep track of hardware break-/watch-points. */
762 struct arm_linux_hw_breakpoint
764 /* Address to break on, or being watched. */
765 unsigned int address;
766 /* Control register for break-/watch- point. */
767 arm_hwbp_control_t control;
770 /* Structure containing arrays of per process hardware break-/watchpoints
771 for caching address and control information.
773 The Linux ptrace interface to hardware break-/watch-points presents the
774 values in a vector centred around 0 (which is used fo generic information).
775 Positive indicies refer to breakpoint addresses/control registers, negative
776 indices to watchpoint addresses/control registers.
778 The Linux vector is indexed as follows:
779 -((i << 1) + 2): Control register for watchpoint i.
780 -((i << 1) + 1): Address register for watchpoint i.
781 0: Information register.
782 ((i << 1) + 1): Address register for breakpoint i.
783 ((i << 1) + 2): Control register for breakpoint i.
785 This structure is used as a per-thread cache of the state stored by the
786 kernel, so that we don't need to keep calling into the kernel to find a
789 We treat break-/watch-points with their enable bit clear as being deleted.
791 struct arm_linux_debug_reg_state
793 /* Hardware breakpoints for this process. */
794 struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
795 /* Hardware watchpoints for this process. */
796 struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
799 /* Per-process arch-specific data we want to keep. */
800 struct arm_linux_process_info
803 struct arm_linux_process_info *next;
804 /* The process identifier. */
806 /* Hardware break-/watchpoints state information. */
807 struct arm_linux_debug_reg_state state;
811 /* Per-thread arch-specific data we want to keep. */
814 /* Non-zero if our copy differs from what's recorded in the thread. */
815 char bpts_changed[MAX_BPTS];
816 char wpts_changed[MAX_WPTS];
819 static struct arm_linux_process_info *arm_linux_process_list = NULL;
821 /* Find process data for process PID. */
823 static struct arm_linux_process_info *
824 arm_linux_find_process_pid (pid_t pid)
826 struct arm_linux_process_info *proc;
828 for (proc = arm_linux_process_list; proc; proc = proc->next)
829 if (proc->pid == pid)
835 /* Add process data for process PID. Returns newly allocated info
838 static struct arm_linux_process_info *
839 arm_linux_add_process (pid_t pid)
841 struct arm_linux_process_info *proc;
843 proc = xcalloc (1, sizeof (*proc));
846 proc->next = arm_linux_process_list;
847 arm_linux_process_list = proc;
852 /* Get data specific info for process PID, creating it if necessary.
853 Never returns NULL. */
855 static struct arm_linux_process_info *
856 arm_linux_process_info_get (pid_t pid)
858 struct arm_linux_process_info *proc;
860 proc = arm_linux_find_process_pid (pid);
862 proc = arm_linux_add_process (pid);
867 /* Called whenever GDB is no longer debugging process PID. It deletes
868 data structures that keep track of debug register state. */
871 arm_linux_forget_process (pid_t pid)
873 struct arm_linux_process_info *proc, **proc_link;
875 proc = arm_linux_process_list;
876 proc_link = &arm_linux_process_list;
880 if (proc->pid == pid)
882 *proc_link = proc->next;
888 proc_link = &proc->next;
893 /* Get hardware break-/watchpoint state for process PID. */
895 static struct arm_linux_debug_reg_state *
896 arm_linux_get_debug_reg_state (pid_t pid)
898 return &arm_linux_process_info_get (pid)->state;
901 /* Initialize an ARM hardware break-/watch-point control register value.
902 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
903 type of break-/watch-point; ENABLE indicates whether the point is enabled.
905 static arm_hwbp_control_t
906 arm_hwbp_control_initialize (unsigned byte_address_select,
907 arm_hwbp_type hwbp_type,
910 gdb_assert ((byte_address_select & ~0xffU) == 0);
911 gdb_assert (hwbp_type != arm_hwbp_break
912 || ((byte_address_select & 0xfU) != 0));
914 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
917 /* Does the breakpoint control value CONTROL have the enable bit set? */
919 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
921 return control & 0x1;
924 /* Change a breakpoint control word so that it is in the disabled state. */
925 static arm_hwbp_control_t
926 arm_hwbp_control_disable (arm_hwbp_control_t control)
928 return control & ~0x1;
931 /* Initialise the hardware breakpoint structure P. The breakpoint will be
932 enabled, and will point to the placed address of BP_TGT. */
934 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
935 struct bp_target_info *bp_tgt,
936 struct arm_linux_hw_breakpoint *p)
939 CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
941 /* We have to create a mask for the control register which says which bits
942 of the word pointed to by address to break on. */
943 if (arm_pc_is_thumb (gdbarch, address))
954 p->address = (unsigned int) address;
955 p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
958 /* Get the ARM hardware breakpoint type from the RW value we're given when
959 asked to set a watchpoint. */
961 arm_linux_get_hwbp_type (int rw)
964 return arm_hwbp_load;
965 else if (rw == hw_write)
966 return arm_hwbp_store;
968 return arm_hwbp_access;
971 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
972 to LEN. The type of watchpoint is given in RW. */
974 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
975 struct arm_linux_hw_breakpoint *p)
977 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
980 gdb_assert (cap != NULL);
981 gdb_assert (cap->max_wp_length != 0);
983 mask = (1 << len) - 1;
985 p->address = (unsigned int) addr;
986 p->control = arm_hwbp_control_initialize (mask,
987 arm_linux_get_hwbp_type (rw), 1);
990 /* Are two break-/watch-points equal? */
992 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
993 const struct arm_linux_hw_breakpoint *p2)
995 return p1->address == p2->address && p1->control == p2->control;
998 /* Callback to mark a watch-/breakpoint to be updated in all threads of
999 the current process. */
1001 struct update_registers_data
1008 update_registers_callback (struct lwp_info *lwp, void *arg)
1010 struct update_registers_data *data = (struct update_registers_data *) arg;
1012 if (lwp->arch_private == NULL)
1013 lwp->arch_private = XCNEW (struct arch_lwp_info);
1015 /* The actual update is done later just before resuming the lwp,
1016 we just mark that the registers need updating. */
1018 lwp->arch_private->wpts_changed[data->index] = 1;
1020 lwp->arch_private->bpts_changed[data->index] = 1;
1022 /* If the lwp isn't stopped, force it to momentarily pause, so
1023 we can update its breakpoint registers. */
1025 linux_stop_lwp (lwp);
1030 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
1031 =1) BPT for thread TID. */
1033 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
1039 struct arm_linux_hw_breakpoint* bpts;
1040 struct update_registers_data data;
1042 pid = ptid_get_pid (inferior_ptid);
1043 pid_ptid = pid_to_ptid (pid);
1047 count = arm_linux_get_hw_watchpoint_count ();
1048 bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1052 count = arm_linux_get_hw_breakpoint_count ();
1053 bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1056 for (i = 0; i < count; ++i)
1057 if (!arm_hwbp_control_is_enabled (bpts[i].control))
1059 data.watch = watchpoint;
1062 iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1066 gdb_assert (i != count);
1069 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1070 (WATCHPOINT = 1) BPT for thread TID. */
1072 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1078 struct arm_linux_hw_breakpoint* bpts;
1079 struct update_registers_data data;
1081 pid = ptid_get_pid (inferior_ptid);
1082 pid_ptid = pid_to_ptid (pid);
1086 count = arm_linux_get_hw_watchpoint_count ();
1087 bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1091 count = arm_linux_get_hw_breakpoint_count ();
1092 bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1095 for (i = 0; i < count; ++i)
1096 if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1098 data.watch = watchpoint;
1100 bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1101 iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1105 gdb_assert (i != count);
1108 /* Insert a Hardware breakpoint. */
1110 arm_linux_insert_hw_breakpoint (struct target_ops *self,
1111 struct gdbarch *gdbarch,
1112 struct bp_target_info *bp_tgt)
1114 struct lwp_info *lp;
1115 struct arm_linux_hw_breakpoint p;
1117 if (arm_linux_get_hw_breakpoint_count () == 0)
1120 arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1122 arm_linux_insert_hw_breakpoint1 (&p, 0);
1127 /* Remove a hardware breakpoint. */
1129 arm_linux_remove_hw_breakpoint (struct target_ops *self,
1130 struct gdbarch *gdbarch,
1131 struct bp_target_info *bp_tgt)
1133 struct lwp_info *lp;
1134 struct arm_linux_hw_breakpoint p;
1136 if (arm_linux_get_hw_breakpoint_count () == 0)
1139 arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1141 arm_linux_remove_hw_breakpoint1 (&p, 0);
1146 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1149 arm_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
1150 CORE_ADDR addr, int len)
1152 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1153 CORE_ADDR max_wp_length, aligned_addr;
1155 /* Can not set watchpoints for zero or negative lengths. */
1159 /* Need to be able to use the ptrace interface. */
1160 if (cap == NULL || cap->wp_count == 0)
1163 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1164 range covered by a watchpoint. */
1165 max_wp_length = (CORE_ADDR)cap->max_wp_length;
1166 aligned_addr = addr & ~(max_wp_length - 1);
1168 if (aligned_addr + max_wp_length < addr + len)
1171 /* The current ptrace interface can only handle watchpoints that are a
1173 if ((len & (len - 1)) != 0)
1176 /* All tests passed so we must be able to set a watchpoint. */
1180 /* Insert a Hardware breakpoint. */
1182 arm_linux_insert_watchpoint (struct target_ops *self,
1183 CORE_ADDR addr, int len, int rw,
1184 struct expression *cond)
1186 struct lwp_info *lp;
1187 struct arm_linux_hw_breakpoint p;
1189 if (arm_linux_get_hw_watchpoint_count () == 0)
1192 arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1194 arm_linux_insert_hw_breakpoint1 (&p, 1);
1199 /* Remove a hardware breakpoint. */
1201 arm_linux_remove_watchpoint (struct target_ops *self,
1202 CORE_ADDR addr, int len, int rw,
1203 struct expression *cond)
1205 struct lwp_info *lp;
1206 struct arm_linux_hw_breakpoint p;
1208 if (arm_linux_get_hw_watchpoint_count () == 0)
1211 arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1213 arm_linux_remove_hw_breakpoint1 (&p, 1);
1218 /* What was the data address the target was stopped on accessing. */
1220 arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
1225 if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1228 /* This must be a hardware breakpoint. */
1229 if (siginfo.si_signo != SIGTRAP
1230 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1233 /* We must be able to set hardware watchpoints. */
1234 if (arm_linux_get_hw_watchpoint_count () == 0)
1237 slot = siginfo.si_errno;
1239 /* If we are in a positive slot then we're looking at a breakpoint and not
1244 *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1248 /* Has the target been stopped by hitting a watchpoint? */
1250 arm_linux_stopped_by_watchpoint (struct target_ops *ops)
1253 return arm_linux_stopped_data_address (ops, &addr);
1257 arm_linux_watchpoint_addr_within_range (struct target_ops *target,
1259 CORE_ADDR start, int length)
1261 return start <= addr && start + length - 1 >= addr;
1264 /* Handle thread creation. We need to copy the breakpoints and watchpoints
1265 in the parent thread to the child thread. */
1267 arm_linux_new_thread (struct lwp_info *lp)
1270 struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1272 /* Mark that all the hardware breakpoint/watchpoint register pairs
1273 for this thread need to be initialized. */
1275 for (i = 0; i < MAX_BPTS; i++)
1277 info->bpts_changed[i] = 1;
1278 info->wpts_changed[i] = 1;
1281 lp->arch_private = info;
1284 /* Called when resuming a thread.
1285 The hardware debug registers are updated when there is any change. */
1288 arm_linux_prepare_to_resume (struct lwp_info *lwp)
1291 struct arm_linux_hw_breakpoint *bpts, *wpts;
1292 struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1294 pid = ptid_get_lwp (lwp->ptid);
1295 bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
1296 wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
1298 /* NULL means this is the main thread still going through the shell,
1299 or, no watchpoint has been set yet. In that case, there's
1301 if (arm_lwp_info == NULL)
1304 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1305 if (arm_lwp_info->bpts_changed[i])
1308 if (arm_hwbp_control_is_enabled (bpts[i].control))
1309 if (ptrace (PTRACE_SETHBPREGS, pid,
1310 (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1311 perror_with_name (_("Unexpected error setting breakpoint"));
1313 if (bpts[i].control != 0)
1314 if (ptrace (PTRACE_SETHBPREGS, pid,
1315 (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1316 perror_with_name (_("Unexpected error setting breakpoint"));
1318 arm_lwp_info->bpts_changed[i] = 0;
1321 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1322 if (arm_lwp_info->wpts_changed[i])
1325 if (arm_hwbp_control_is_enabled (wpts[i].control))
1326 if (ptrace (PTRACE_SETHBPREGS, pid,
1327 (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1328 perror_with_name (_("Unexpected error setting watchpoint"));
1330 if (wpts[i].control != 0)
1331 if (ptrace (PTRACE_SETHBPREGS, pid,
1332 (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1333 perror_with_name (_("Unexpected error setting watchpoint"));
1335 arm_lwp_info->wpts_changed[i] = 0;
1339 /* linux_nat_new_fork hook. */
1342 arm_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
1345 struct arm_linux_debug_reg_state *parent_state;
1346 struct arm_linux_debug_reg_state *child_state;
1348 /* NULL means no watchpoint has ever been set in the parent. In
1349 that case, there's nothing to do. */
1350 if (parent->arch_private == NULL)
1353 /* GDB core assumes the child inherits the watchpoints/hw
1354 breakpoints of the parent, and will remove them all from the
1355 forked off process. Copy the debug registers mirrors into the
1356 new process so that all breakpoints and watchpoints can be
1357 removed together. */
1359 parent_pid = ptid_get_pid (parent->ptid);
1360 parent_state = arm_linux_get_debug_reg_state (parent_pid);
1361 child_state = arm_linux_get_debug_reg_state (child_pid);
1362 *child_state = *parent_state;
1365 void _initialize_arm_linux_nat (void);
1368 _initialize_arm_linux_nat (void)
1370 struct target_ops *t;
1372 /* Fill in the generic GNU/Linux methods. */
1373 t = linux_target ();
1375 /* Add our register access methods. */
1376 t->to_fetch_registers = arm_linux_fetch_inferior_registers;
1377 t->to_store_registers = arm_linux_store_inferior_registers;
1379 /* Add our hardware breakpoint and watchpoint implementation. */
1380 t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
1381 t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
1382 t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
1383 t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
1384 t->to_insert_watchpoint = arm_linux_insert_watchpoint;
1385 t->to_remove_watchpoint = arm_linux_remove_watchpoint;
1386 t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
1387 t->to_stopped_data_address = arm_linux_stopped_data_address;
1388 t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
1390 t->to_read_description = arm_linux_read_description;
1392 /* Register the target. */
1393 linux_nat_add_target (t);
1395 /* Handle thread creation and exit. */
1396 linux_nat_set_new_thread (t, arm_linux_new_thread);
1397 linux_nat_set_prepare_to_resume (t, arm_linux_prepare_to_resume);
1399 /* Handle process creation and exit. */
1400 linux_nat_set_new_fork (t, arm_linux_new_fork);
1401 linux_nat_set_forget_process (t, arm_linux_forget_process);