1 /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
3 Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
4 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #include "frame-unwind.h"
26 #include "frame-base.h"
27 #include "dwarf2-frame.h"
36 #include "gdb_string.h"
39 #include "reggroups.h"
40 #include "arch-utils.h"
44 #include "trad-frame.h"
48 #include "alpha-tdep.h"
50 /* Instruction decoding. The notations for registers, immediates and
51 opcodes are the same as the one used in Compaq's Alpha architecture
54 #define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26)
56 /* Memory instruction format */
57 #define MEM_RA(insn) ((insn & 0x03e00000) >> 21)
58 #define MEM_RB(insn) ((insn & 0x001f0000) >> 16)
59 #define MEM_DISP(insn) \
60 (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff))
62 static const int lda_opcode = 0x08;
63 static const int stq_opcode = 0x2d;
65 /* Branch instruction format */
66 #define BR_RA(insn) MEM_RA(insn)
68 static const int bne_opcode = 0x3d;
70 /* Operate instruction format */
71 #define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5)
72 #define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000)
73 #define OPR_RA(insn) MEM_RA(insn)
74 #define OPR_RC(insn) ((insn & 0x1f))
75 #define OPR_LIT(insn) ((insn & 0x1fe000) >> 13)
77 static const int subq_opcode = 0x10;
78 static const int subq_function = 0x29;
81 /* Return the name of the REGNO register.
83 An empty name corresponds to a register number that used to
84 be used for a virtual register. That virtual register has
85 been removed, but the index is still reserved to maintain
86 compatibility with existing remote alpha targets. */
89 alpha_register_name (struct gdbarch *gdbarch, int regno)
91 static const char * const register_names[] =
93 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
94 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
95 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
96 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
97 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
98 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
99 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
100 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
106 if (regno >= ARRAY_SIZE(register_names))
108 return register_names[regno];
112 alpha_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
114 return (regno == ALPHA_ZERO_REGNUM
115 || strlen (alpha_register_name (gdbarch, regno)) == 0);
119 alpha_cannot_store_register (struct gdbarch *gdbarch, int regno)
121 return (regno == ALPHA_ZERO_REGNUM
122 || strlen (alpha_register_name (gdbarch, regno)) == 0);
126 alpha_register_type (struct gdbarch *gdbarch, int regno)
128 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
129 return builtin_type (gdbarch)->builtin_data_ptr;
130 if (regno == ALPHA_PC_REGNUM)
131 return builtin_type (gdbarch)->builtin_func_ptr;
133 /* Don't need to worry about little vs big endian until
134 some jerk tries to port to alpha-unicosmk. */
135 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
136 return builtin_type (gdbarch)->builtin_double;
138 return builtin_type (gdbarch)->builtin_int64;
141 /* Is REGNUM a member of REGGROUP? */
144 alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
145 struct reggroup *group)
147 /* Filter out any registers eliminated, but whose regnum is
148 reserved for backward compatibility, e.g. the vfp. */
149 if (gdbarch_register_name (gdbarch, regnum) == NULL
150 || *gdbarch_register_name (gdbarch, regnum) == '\0')
153 if (group == all_reggroup)
156 /* Zero should not be saved or restored. Technically it is a general
157 register (just as $f31 would be a float if we represented it), but
158 there's no point displaying it during "info regs", so leave it out
159 of all groups except for "all". */
160 if (regnum == ALPHA_ZERO_REGNUM)
163 /* All other registers are saved and restored. */
164 if (group == save_reggroup || group == restore_reggroup)
167 /* All other groups are non-overlapping. */
169 /* Since this is really a PALcode memory slot... */
170 if (regnum == ALPHA_UNIQUE_REGNUM)
171 return group == system_reggroup;
173 /* Force the FPCR to be considered part of the floating point state. */
174 if (regnum == ALPHA_FPCR_REGNUM)
175 return group == float_reggroup;
177 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
178 return group == float_reggroup;
180 return group == general_reggroup;
183 /* The following represents exactly the conversion performed by
184 the LDS instruction. This applies to both single-precision
185 floating point and 32-bit integers. */
188 alpha_lds (struct gdbarch *gdbarch, void *out, const void *in)
190 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
191 ULONGEST mem = extract_unsigned_integer (in, 4, byte_order);
192 ULONGEST frac = (mem >> 0) & 0x7fffff;
193 ULONGEST sign = (mem >> 31) & 1;
194 ULONGEST exp_msb = (mem >> 30) & 1;
195 ULONGEST exp_low = (mem >> 23) & 0x7f;
198 exp = (exp_msb << 10) | exp_low;
210 reg = (sign << 63) | (exp << 52) | (frac << 29);
211 store_unsigned_integer (out, 8, byte_order, reg);
214 /* Similarly, this represents exactly the conversion performed by
215 the STS instruction. */
218 alpha_sts (struct gdbarch *gdbarch, void *out, const void *in)
220 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
223 reg = extract_unsigned_integer (in, 8, byte_order);
224 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
225 store_unsigned_integer (out, 4, byte_order, mem);
228 /* The alpha needs a conversion between register and memory format if the
229 register is a floating point register and memory format is float, as the
230 register format must be double or memory format is an integer with 4
231 bytes or less, as the representation of integers in floating point
232 registers is different. */
235 alpha_convert_register_p (struct gdbarch *gdbarch, int regno,
238 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31
239 && TYPE_LENGTH (type) != 8);
243 alpha_register_to_value (struct frame_info *frame, int regnum,
244 struct type *valtype, gdb_byte *out,
245 int *optimizedp, int *unavailablep)
247 struct gdbarch *gdbarch = get_frame_arch (frame);
248 gdb_byte in[MAX_REGISTER_SIZE];
250 /* Convert to TYPE. */
251 if (!get_frame_register_bytes (frame, regnum, 0,
252 register_size (gdbarch, regnum),
253 in, optimizedp, unavailablep))
256 if (TYPE_LENGTH (valtype) == 4)
258 alpha_sts (gdbarch, out, in);
259 *optimizedp = *unavailablep = 0;
263 error (_("Cannot retrieve value from floating point register"));
267 alpha_value_to_register (struct frame_info *frame, int regnum,
268 struct type *valtype, const gdb_byte *in)
270 gdb_byte out[MAX_REGISTER_SIZE];
272 switch (TYPE_LENGTH (valtype))
275 alpha_lds (get_frame_arch (frame), out, in);
278 error (_("Cannot store value in floating point register"));
280 put_frame_register (frame, regnum, out);
284 /* The alpha passes the first six arguments in the registers, the rest on
285 the stack. The register arguments are stored in ARG_REG_BUFFER, and
286 then moved into the register file; this simplifies the passing of a
287 large struct which extends from the registers to the stack, plus avoids
288 three ptrace invocations per word.
290 We don't bother tracking which register values should go in integer
291 regs or fp regs; we load the same values into both.
293 If the called function is returning a structure, the address of the
294 structure to be returned is passed as a hidden first argument. */
297 alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
298 struct regcache *regcache, CORE_ADDR bp_addr,
299 int nargs, struct value **args, CORE_ADDR sp,
300 int struct_return, CORE_ADDR struct_addr)
302 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
304 int accumulate_size = struct_return ? 8 : 0;
307 const gdb_byte *contents;
311 struct alpha_arg *alpha_args
312 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
313 struct alpha_arg *m_arg;
314 gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
315 int required_arg_regs;
316 CORE_ADDR func_addr = find_function_addr (function, NULL);
318 /* The ABI places the address of the called function in T12. */
319 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
321 /* Set the return address register to point to the entry point
322 of the program, where a breakpoint lies in wait. */
323 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
325 /* Lay out the arguments in memory. */
326 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
328 struct value *arg = args[i];
329 struct type *arg_type = check_typedef (value_type (arg));
331 /* Cast argument to long if necessary as the compiler does it too. */
332 switch (TYPE_CODE (arg_type))
337 case TYPE_CODE_RANGE:
339 if (TYPE_LENGTH (arg_type) == 4)
341 /* 32-bit values must be sign-extended to 64 bits
342 even if the base data type is unsigned. */
343 arg_type = builtin_type (gdbarch)->builtin_int32;
344 arg = value_cast (arg_type, arg);
346 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
348 arg_type = builtin_type (gdbarch)->builtin_int64;
349 arg = value_cast (arg_type, arg);
354 /* "float" arguments loaded in registers must be passed in
355 register format, aka "double". */
356 if (accumulate_size < sizeof (arg_reg_buffer)
357 && TYPE_LENGTH (arg_type) == 4)
359 arg_type = builtin_type (gdbarch)->builtin_double;
360 arg = value_cast (arg_type, arg);
362 /* Tru64 5.1 has a 128-bit long double, and passes this by
363 invisible reference. No one else uses this data type. */
364 else if (TYPE_LENGTH (arg_type) == 16)
366 /* Allocate aligned storage. */
367 sp = (sp & -16) - 16;
369 /* Write the real data into the stack. */
370 write_memory (sp, value_contents (arg), 16);
372 /* Construct the indirection. */
373 arg_type = lookup_pointer_type (arg_type);
374 arg = value_from_pointer (arg_type, sp);
378 case TYPE_CODE_COMPLEX:
379 /* ??? The ABI says that complex values are passed as two
380 separate scalar values. This distinction only matters
381 for complex float. However, GCC does not implement this. */
383 /* Tru64 5.1 has a 128-bit long double, and passes this by
384 invisible reference. */
385 if (TYPE_LENGTH (arg_type) == 32)
387 /* Allocate aligned storage. */
388 sp = (sp & -16) - 16;
390 /* Write the real data into the stack. */
391 write_memory (sp, value_contents (arg), 32);
393 /* Construct the indirection. */
394 arg_type = lookup_pointer_type (arg_type);
395 arg = value_from_pointer (arg_type, sp);
402 m_arg->len = TYPE_LENGTH (arg_type);
403 m_arg->offset = accumulate_size;
404 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
405 m_arg->contents = value_contents (arg);
408 /* Determine required argument register loads, loading an argument register
409 is expensive as it uses three ptrace calls. */
410 required_arg_regs = accumulate_size / 8;
411 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
412 required_arg_regs = ALPHA_NUM_ARG_REGS;
414 /* Make room for the arguments on the stack. */
415 if (accumulate_size < sizeof(arg_reg_buffer))
418 accumulate_size -= sizeof(arg_reg_buffer);
419 sp -= accumulate_size;
421 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
424 /* `Push' arguments on the stack. */
425 for (i = nargs; m_arg--, --i >= 0;)
427 const gdb_byte *contents = m_arg->contents;
428 int offset = m_arg->offset;
429 int len = m_arg->len;
431 /* Copy the bytes destined for registers into arg_reg_buffer. */
432 if (offset < sizeof(arg_reg_buffer))
434 if (offset + len <= sizeof(arg_reg_buffer))
436 memcpy (arg_reg_buffer + offset, contents, len);
441 int tlen = sizeof(arg_reg_buffer) - offset;
442 memcpy (arg_reg_buffer + offset, contents, tlen);
449 /* Everything else goes to the stack. */
450 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
453 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE,
454 byte_order, struct_addr);
456 /* Load the argument registers. */
457 for (i = 0; i < required_arg_regs; i++)
459 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
460 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
461 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
462 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
465 /* Finally, update the stack pointer. */
466 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
471 /* Extract from REGCACHE the value about to be returned from a function
472 and copy it into VALBUF. */
475 alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
478 struct gdbarch *gdbarch = get_regcache_arch (regcache);
479 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
480 int length = TYPE_LENGTH (valtype);
481 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
484 switch (TYPE_CODE (valtype))
490 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
491 alpha_sts (gdbarch, valbuf, raw_buffer);
495 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
499 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
500 read_memory (l, valbuf, 16);
504 internal_error (__FILE__, __LINE__,
505 _("unknown floating point width"));
509 case TYPE_CODE_COMPLEX:
513 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
514 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
518 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
519 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
523 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
524 read_memory (l, valbuf, 32);
528 internal_error (__FILE__, __LINE__,
529 _("unknown floating point width"));
534 /* Assume everything else degenerates to an integer. */
535 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
536 store_unsigned_integer (valbuf, length, byte_order, l);
541 /* Insert the given value into REGCACHE as if it was being
542 returned by a function. */
545 alpha_store_return_value (struct type *valtype, struct regcache *regcache,
546 const gdb_byte *valbuf)
548 struct gdbarch *gdbarch = get_regcache_arch (regcache);
549 int length = TYPE_LENGTH (valtype);
550 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
553 switch (TYPE_CODE (valtype))
559 alpha_lds (gdbarch, raw_buffer, valbuf);
560 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
564 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
568 /* FIXME: 128-bit long doubles are returned like structures:
569 by writing into indirect storage provided by the caller
570 as the first argument. */
571 error (_("Cannot set a 128-bit long double return value."));
574 internal_error (__FILE__, __LINE__,
575 _("unknown floating point width"));
579 case TYPE_CODE_COMPLEX:
583 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
584 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
588 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
589 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
593 /* FIXME: 128-bit long doubles are returned like structures:
594 by writing into indirect storage provided by the caller
595 as the first argument. */
596 error (_("Cannot set a 128-bit long double return value."));
599 internal_error (__FILE__, __LINE__,
600 _("unknown floating point width"));
605 /* Assume everything else degenerates to an integer. */
606 /* 32-bit values must be sign-extended to 64 bits
607 even if the base data type is unsigned. */
609 valtype = builtin_type (gdbarch)->builtin_int32;
610 l = unpack_long (valtype, valbuf);
611 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
616 static enum return_value_convention
617 alpha_return_value (struct gdbarch *gdbarch, struct type *func_type,
618 struct type *type, struct regcache *regcache,
619 gdb_byte *readbuf, const gdb_byte *writebuf)
621 enum type_code code = TYPE_CODE (type);
623 if ((code == TYPE_CODE_STRUCT
624 || code == TYPE_CODE_UNION
625 || code == TYPE_CODE_ARRAY)
626 && gdbarch_tdep (gdbarch)->return_in_memory (type))
631 regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
632 read_memory (addr, readbuf, TYPE_LENGTH (type));
635 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
639 alpha_extract_return_value (type, regcache, readbuf);
641 alpha_store_return_value (type, regcache, writebuf);
643 return RETURN_VALUE_REGISTER_CONVENTION;
647 alpha_return_in_memory_always (struct type *type)
652 static const gdb_byte *
653 alpha_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
655 static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
657 *len = sizeof(break_insn);
662 /* This returns the PC of the first insn after the prologue.
663 If we can't find the prologue, then return 0. */
666 alpha_after_prologue (CORE_ADDR pc)
668 struct symtab_and_line sal;
669 CORE_ADDR func_addr, func_end;
671 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
674 sal = find_pc_line (func_addr, 0);
675 if (sal.end < func_end)
678 /* The line after the prologue is after the end of the function. In this
679 case, tell the caller to find the prologue the hard way. */
683 /* Read an instruction from memory at PC, looking through breakpoints. */
686 alpha_read_insn (struct gdbarch *gdbarch, CORE_ADDR pc)
688 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
689 gdb_byte buf[ALPHA_INSN_SIZE];
692 status = target_read_memory (pc, buf, sizeof (buf));
694 memory_error (status, pc);
695 return extract_unsigned_integer (buf, sizeof (buf), byte_order);
698 /* To skip prologues, I use this predicate. Returns either PC itself
699 if the code at PC does not look like a function prologue; otherwise
700 returns an address that (if we're lucky) follows the prologue. If
701 LENIENT, then we must skip everything which is involved in setting
702 up the frame (it's OK to skip more, just so long as we don't skip
703 anything which might clobber the registers which are being saved. */
706 alpha_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
710 CORE_ADDR post_prologue_pc;
711 gdb_byte buf[ALPHA_INSN_SIZE];
713 /* Silently return the unaltered pc upon memory errors.
714 This could happen on OSF/1 if decode_line_1 tries to skip the
715 prologue for quickstarted shared library functions when the
716 shared library is not yet mapped in.
717 Reading target memory is slow over serial lines, so we perform
718 this check only if the target has shared libraries (which all
719 Alpha targets do). */
720 if (target_read_memory (pc, buf, sizeof (buf)))
723 /* See if we can determine the end of the prologue via the symbol table.
724 If so, then return either PC, or the PC after the prologue, whichever
727 post_prologue_pc = alpha_after_prologue (pc);
728 if (post_prologue_pc != 0)
729 return max (pc, post_prologue_pc);
731 /* Can't determine prologue from the symbol table, need to examine
734 /* Skip the typical prologue instructions. These are the stack adjustment
735 instruction and the instructions that save registers on the stack
736 or in the gcc frame. */
737 for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE)
739 inst = alpha_read_insn (gdbarch, pc + offset);
741 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
743 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
745 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
747 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
750 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
751 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
752 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
755 if (inst == 0x47de040f) /* bis sp,sp,fp */
757 if (inst == 0x47fe040f) /* bis zero,sp,fp */
766 /* Figure out where the longjmp will land.
767 We expect the first arg to be a pointer to the jmp_buf structure from
768 which we extract the PC (JB_PC) that we will land at. The PC is copied
769 into the "pc". This routine returns true on success. */
772 alpha_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
774 struct gdbarch *gdbarch = get_frame_arch (frame);
775 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
776 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
778 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
780 jb_addr = get_frame_register_unsigned (frame, ALPHA_A0_REGNUM);
782 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
783 raw_buffer, tdep->jb_elt_size))
786 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size, byte_order);
791 /* Frame unwinder for signal trampolines. We use alpha tdep bits that
792 describe the location and shape of the sigcontext structure. After
793 that, all registers are in memory, so it's easy. */
794 /* ??? Shouldn't we be able to do this generically, rather than with
795 OSABI data specific to Alpha? */
797 struct alpha_sigtramp_unwind_cache
799 CORE_ADDR sigcontext_addr;
802 static struct alpha_sigtramp_unwind_cache *
803 alpha_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
804 void **this_prologue_cache)
806 struct alpha_sigtramp_unwind_cache *info;
807 struct gdbarch_tdep *tdep;
809 if (*this_prologue_cache)
810 return *this_prologue_cache;
812 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
813 *this_prologue_cache = info;
815 tdep = gdbarch_tdep (get_frame_arch (this_frame));
816 info->sigcontext_addr = tdep->sigcontext_addr (this_frame);
821 /* Return the address of REGNUM in a sigtramp frame. Since this is
822 all arithmetic, it doesn't seem worthwhile to cache it. */
825 alpha_sigtramp_register_address (struct gdbarch *gdbarch,
826 CORE_ADDR sigcontext_addr, int regnum)
828 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
830 if (regnum >= 0 && regnum < 32)
831 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
832 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
833 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
834 else if (regnum == ALPHA_PC_REGNUM)
835 return sigcontext_addr + tdep->sc_pc_offset;
840 /* Given a GDB frame, determine the address of the calling function's
841 frame. This will be used to create a new GDB frame struct. */
844 alpha_sigtramp_frame_this_id (struct frame_info *this_frame,
845 void **this_prologue_cache,
846 struct frame_id *this_id)
848 struct gdbarch *gdbarch = get_frame_arch (this_frame);
849 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
850 struct alpha_sigtramp_unwind_cache *info
851 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
852 CORE_ADDR stack_addr, code_addr;
854 /* If the OSABI couldn't locate the sigcontext, give up. */
855 if (info->sigcontext_addr == 0)
858 /* If we have dynamic signal trampolines, find their start.
859 If we do not, then we must assume there is a symbol record
860 that can provide the start address. */
861 if (tdep->dynamic_sigtramp_offset)
864 code_addr = get_frame_pc (this_frame);
865 offset = tdep->dynamic_sigtramp_offset (gdbarch, code_addr);
872 code_addr = get_frame_func (this_frame);
874 /* The stack address is trivially read from the sigcontext. */
875 stack_addr = alpha_sigtramp_register_address (gdbarch, info->sigcontext_addr,
877 stack_addr = get_frame_memory_unsigned (this_frame, stack_addr,
878 ALPHA_REGISTER_SIZE);
880 *this_id = frame_id_build (stack_addr, code_addr);
883 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
885 static struct value *
886 alpha_sigtramp_frame_prev_register (struct frame_info *this_frame,
887 void **this_prologue_cache, int regnum)
889 struct alpha_sigtramp_unwind_cache *info
890 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
893 if (info->sigcontext_addr != 0)
895 /* All integer and fp registers are stored in memory. */
896 addr = alpha_sigtramp_register_address (get_frame_arch (this_frame),
897 info->sigcontext_addr, regnum);
899 return frame_unwind_got_memory (this_frame, regnum, addr);
902 /* This extra register may actually be in the sigcontext, but our
903 current description of it in alpha_sigtramp_frame_unwind_cache
904 doesn't include it. Too bad. Fall back on whatever's in the
906 return frame_unwind_got_register (this_frame, regnum, regnum);
910 alpha_sigtramp_frame_sniffer (const struct frame_unwind *self,
911 struct frame_info *this_frame,
912 void **this_prologue_cache)
914 struct gdbarch *gdbarch = get_frame_arch (this_frame);
915 CORE_ADDR pc = get_frame_pc (this_frame);
918 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
919 look at tramp-frame.h and other simplier per-architecture
920 sigtramp unwinders. */
922 /* We shouldn't even bother to try if the OSABI didn't register a
923 sigcontext_addr handler or pc_in_sigtramp hander. */
924 if (gdbarch_tdep (gdbarch)->sigcontext_addr == NULL)
926 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp == NULL)
929 /* Otherwise we should be in a signal frame. */
930 find_pc_partial_function (pc, &name, NULL, NULL);
931 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp (gdbarch, pc, name))
937 static const struct frame_unwind alpha_sigtramp_frame_unwind = {
939 alpha_sigtramp_frame_this_id,
940 alpha_sigtramp_frame_prev_register,
942 alpha_sigtramp_frame_sniffer
947 /* Heuristic_proc_start may hunt through the text section for a long
948 time across a 2400 baud serial line. Allows the user to limit this
950 static unsigned int heuristic_fence_post = 0;
952 /* Attempt to locate the start of the function containing PC. We assume that
953 the previous function ends with an about_to_return insn. Not foolproof by
954 any means, since gcc is happy to put the epilogue in the middle of a
955 function. But we're guessing anyway... */
958 alpha_heuristic_proc_start (struct gdbarch *gdbarch, CORE_ADDR pc)
960 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
961 CORE_ADDR last_non_nop = pc;
962 CORE_ADDR fence = pc - heuristic_fence_post;
963 CORE_ADDR orig_pc = pc;
965 struct inferior *inf;
970 /* First see if we can find the start of the function from minimal
971 symbol information. This can succeed with a binary that doesn't
972 have debug info, but hasn't been stripped. */
973 func = get_pc_function_start (pc);
977 if (heuristic_fence_post == UINT_MAX
978 || fence < tdep->vm_min_address)
979 fence = tdep->vm_min_address;
981 /* Search back for previous return; also stop at a 0, which might be
982 seen for instance before the start of a code section. Don't include
983 nops, since this usually indicates padding between functions. */
984 for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE)
986 unsigned int insn = alpha_read_insn (gdbarch, pc);
989 case 0: /* invalid insn */
990 case 0x6bfa8001: /* ret $31,($26),1 */
993 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
994 case 0x47ff041f: /* nop: bis $31,$31,$31 */
1003 inf = current_inferior ();
1005 /* It's not clear to me why we reach this point when stopping quietly,
1006 but with this test, at least we don't print out warnings for every
1007 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
1008 if (inf->control.stop_soon == NO_STOP_QUIETLY)
1010 static int blurb_printed = 0;
1012 if (fence == tdep->vm_min_address)
1013 warning (_("Hit beginning of text section without finding \
1014 enclosing function for address %s"), paddress (gdbarch, orig_pc));
1016 warning (_("Hit heuristic-fence-post without finding \
1017 enclosing function for address %s"), paddress (gdbarch, orig_pc));
1021 printf_filtered (_("\
1022 This warning occurs if you are debugging a function without any symbols\n\
1023 (for example, in a stripped executable). In that case, you may wish to\n\
1024 increase the size of the search with the `set heuristic-fence-post' command.\n\
1026 Otherwise, you told GDB there was a function where there isn't one, or\n\
1027 (more likely) you have encountered a bug in GDB.\n"));
1035 /* Fallback alpha frame unwinder. Uses instruction scanning and knows
1036 something about the traditional layout of alpha stack frames. */
1038 struct alpha_heuristic_unwind_cache
1042 struct trad_frame_saved_reg *saved_regs;
1046 /* If a probing loop sequence starts at PC, simulate it and compute
1047 FRAME_SIZE and PC after its execution. Otherwise, return with PC and
1048 FRAME_SIZE unchanged. */
1051 alpha_heuristic_analyze_probing_loop (struct gdbarch *gdbarch, CORE_ADDR *pc,
1054 CORE_ADDR cur_pc = *pc;
1055 int cur_frame_size = *frame_size;
1056 int nb_of_iterations, reg_index, reg_probe;
1059 /* The following pattern is recognized as a probing loop:
1061 lda REG_INDEX,NB_OF_ITERATIONS
1062 lda REG_PROBE,<immediate>(sp)
1065 stq zero,<immediate>(REG_PROBE)
1066 subq REG_INDEX,0x1,REG_INDEX
1067 lda REG_PROBE,<immediate>(REG_PROBE)
1068 bne REG_INDEX, LOOP_START
1070 lda sp,<immediate>(REG_PROBE)
1072 If anything different is found, the function returns without
1073 changing PC and FRAME_SIZE. Otherwise, PC will point immediately
1074 after this sequence, and FRAME_SIZE will be updated. */
1076 /* lda REG_INDEX,NB_OF_ITERATIONS */
1078 insn = alpha_read_insn (gdbarch, cur_pc);
1079 if (INSN_OPCODE (insn) != lda_opcode)
1081 reg_index = MEM_RA (insn);
1082 nb_of_iterations = MEM_DISP (insn);
1084 /* lda REG_PROBE,<immediate>(sp) */
1086 cur_pc += ALPHA_INSN_SIZE;
1087 insn = alpha_read_insn (gdbarch, cur_pc);
1088 if (INSN_OPCODE (insn) != lda_opcode
1089 || MEM_RB (insn) != ALPHA_SP_REGNUM)
1091 reg_probe = MEM_RA (insn);
1092 cur_frame_size -= MEM_DISP (insn);
1094 /* stq zero,<immediate>(REG_PROBE) */
1096 cur_pc += ALPHA_INSN_SIZE;
1097 insn = alpha_read_insn (gdbarch, cur_pc);
1098 if (INSN_OPCODE (insn) != stq_opcode
1099 || MEM_RA (insn) != 0x1f
1100 || MEM_RB (insn) != reg_probe)
1103 /* subq REG_INDEX,0x1,REG_INDEX */
1105 cur_pc += ALPHA_INSN_SIZE;
1106 insn = alpha_read_insn (gdbarch, cur_pc);
1107 if (INSN_OPCODE (insn) != subq_opcode
1108 || !OPR_HAS_IMMEDIATE (insn)
1109 || OPR_FUNCTION (insn) != subq_function
1110 || OPR_LIT(insn) != 1
1111 || OPR_RA (insn) != reg_index
1112 || OPR_RC (insn) != reg_index)
1115 /* lda REG_PROBE,<immediate>(REG_PROBE) */
1117 cur_pc += ALPHA_INSN_SIZE;
1118 insn = alpha_read_insn (gdbarch, cur_pc);
1119 if (INSN_OPCODE (insn) != lda_opcode
1120 || MEM_RA (insn) != reg_probe
1121 || MEM_RB (insn) != reg_probe)
1123 cur_frame_size -= MEM_DISP (insn) * nb_of_iterations;
1125 /* bne REG_INDEX, LOOP_START */
1127 cur_pc += ALPHA_INSN_SIZE;
1128 insn = alpha_read_insn (gdbarch, cur_pc);
1129 if (INSN_OPCODE (insn) != bne_opcode
1130 || MEM_RA (insn) != reg_index)
1133 /* lda sp,<immediate>(REG_PROBE) */
1135 cur_pc += ALPHA_INSN_SIZE;
1136 insn = alpha_read_insn (gdbarch, cur_pc);
1137 if (INSN_OPCODE (insn) != lda_opcode
1138 || MEM_RA (insn) != ALPHA_SP_REGNUM
1139 || MEM_RB (insn) != reg_probe)
1141 cur_frame_size -= MEM_DISP (insn);
1144 *frame_size = cur_frame_size;
1147 static struct alpha_heuristic_unwind_cache *
1148 alpha_heuristic_frame_unwind_cache (struct frame_info *this_frame,
1149 void **this_prologue_cache,
1152 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1153 struct alpha_heuristic_unwind_cache *info;
1155 CORE_ADDR limit_pc, cur_pc;
1156 int frame_reg, frame_size, return_reg, reg;
1158 if (*this_prologue_cache)
1159 return *this_prologue_cache;
1161 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
1162 *this_prologue_cache = info;
1163 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1165 limit_pc = get_frame_pc (this_frame);
1167 start_pc = alpha_heuristic_proc_start (gdbarch, limit_pc);
1168 info->start_pc = start_pc;
1170 frame_reg = ALPHA_SP_REGNUM;
1174 /* If we've identified a likely place to start, do code scanning. */
1177 /* Limit the forward search to 50 instructions. */
1178 if (start_pc + 200 < limit_pc)
1179 limit_pc = start_pc + 200;
1181 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE)
1183 unsigned int word = alpha_read_insn (gdbarch, cur_pc);
1185 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1189 /* Consider only the first stack allocation instruction
1190 to contain the static size of the frame. */
1191 if (frame_size == 0)
1192 frame_size = (-word) & 0xffff;
1196 /* Exit loop if a positive stack adjustment is found, which
1197 usually means that the stack cleanup code in the function
1198 epilogue is reached. */
1202 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1204 reg = (word & 0x03e00000) >> 21;
1206 /* Ignore this instruction if we have already encountered
1207 an instruction saving the same register earlier in the
1208 function code. The current instruction does not tell
1209 us where the original value upon function entry is saved.
1210 All it says is that the function we are scanning reused
1211 that register for some computation of its own, and is now
1212 saving its result. */
1213 if (trad_frame_addr_p(info->saved_regs, reg))
1219 /* Do not compute the address where the register was saved yet,
1220 because we don't know yet if the offset will need to be
1221 relative to $sp or $fp (we can not compute the address
1222 relative to $sp if $sp is updated during the execution of
1223 the current subroutine, for instance when doing some alloca).
1224 So just store the offset for the moment, and compute the
1225 address later when we know whether this frame has a frame
1227 /* Hack: temporarily add one, so that the offset is non-zero
1228 and we can tell which registers have save offsets below. */
1229 info->saved_regs[reg].addr = (word & 0xffff) + 1;
1231 /* Starting with OSF/1-3.2C, the system libraries are shipped
1232 without local symbols, but they still contain procedure
1233 descriptors without a symbol reference. GDB is currently
1234 unable to find these procedure descriptors and uses
1235 heuristic_proc_desc instead.
1236 As some low level compiler support routines (__div*, __add*)
1237 use a non-standard return address register, we have to
1238 add some heuristics to determine the return address register,
1239 or stepping over these routines will fail.
1240 Usually the return address register is the first register
1241 saved on the stack, but assembler optimization might
1242 rearrange the register saves.
1243 So we recognize only a few registers (t7, t9, ra) within
1244 the procedure prologue as valid return address registers.
1245 If we encounter a return instruction, we extract the
1246 the return address register from it.
1248 FIXME: Rewriting GDB to access the procedure descriptors,
1249 e.g. via the minimal symbol table, might obviate this
1251 if (return_reg == -1
1252 && cur_pc < (start_pc + 80)
1253 && (reg == ALPHA_T7_REGNUM
1254 || reg == ALPHA_T9_REGNUM
1255 || reg == ALPHA_RA_REGNUM))
1258 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1259 return_reg = (word >> 16) & 0x1f;
1260 else if (word == 0x47de040f) /* bis sp,sp,fp */
1261 frame_reg = ALPHA_GCC_FP_REGNUM;
1262 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1263 frame_reg = ALPHA_GCC_FP_REGNUM;
1265 alpha_heuristic_analyze_probing_loop (gdbarch, &cur_pc, &frame_size);
1268 /* If we haven't found a valid return address register yet, keep
1269 searching in the procedure prologue. */
1270 if (return_reg == -1)
1272 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1274 unsigned int word = alpha_read_insn (gdbarch, cur_pc);
1276 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1278 reg = (word & 0x03e00000) >> 21;
1279 if (reg == ALPHA_T7_REGNUM
1280 || reg == ALPHA_T9_REGNUM
1281 || reg == ALPHA_RA_REGNUM)
1287 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1289 return_reg = (word >> 16) & 0x1f;
1293 cur_pc += ALPHA_INSN_SIZE;
1298 /* Failing that, do default to the customary RA. */
1299 if (return_reg == -1)
1300 return_reg = ALPHA_RA_REGNUM;
1301 info->return_reg = return_reg;
1303 val = get_frame_register_unsigned (this_frame, frame_reg);
1304 info->vfp = val + frame_size;
1306 /* Convert offsets to absolute addresses. See above about adding
1307 one to the offsets to make all detected offsets non-zero. */
1308 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1309 if (trad_frame_addr_p(info->saved_regs, reg))
1310 info->saved_regs[reg].addr += val - 1;
1312 /* The stack pointer of the previous frame is computed by popping
1313 the current stack frame. */
1314 if (!trad_frame_addr_p (info->saved_regs, ALPHA_SP_REGNUM))
1315 trad_frame_set_value (info->saved_regs, ALPHA_SP_REGNUM, info->vfp);
1320 /* Given a GDB frame, determine the address of the calling function's
1321 frame. This will be used to create a new GDB frame struct. */
1324 alpha_heuristic_frame_this_id (struct frame_info *this_frame,
1325 void **this_prologue_cache,
1326 struct frame_id *this_id)
1328 struct alpha_heuristic_unwind_cache *info
1329 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1331 *this_id = frame_id_build (info->vfp, info->start_pc);
1334 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
1336 static struct value *
1337 alpha_heuristic_frame_prev_register (struct frame_info *this_frame,
1338 void **this_prologue_cache, int regnum)
1340 struct alpha_heuristic_unwind_cache *info
1341 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1343 /* The PC of the previous frame is stored in the link register of
1344 the current frame. Frob regnum so that we pull the value from
1345 the correct place. */
1346 if (regnum == ALPHA_PC_REGNUM)
1347 regnum = info->return_reg;
1349 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1352 static const struct frame_unwind alpha_heuristic_frame_unwind = {
1354 alpha_heuristic_frame_this_id,
1355 alpha_heuristic_frame_prev_register,
1357 default_frame_sniffer
1361 alpha_heuristic_frame_base_address (struct frame_info *this_frame,
1362 void **this_prologue_cache)
1364 struct alpha_heuristic_unwind_cache *info
1365 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1370 static const struct frame_base alpha_heuristic_frame_base = {
1371 &alpha_heuristic_frame_unwind,
1372 alpha_heuristic_frame_base_address,
1373 alpha_heuristic_frame_base_address,
1374 alpha_heuristic_frame_base_address
1377 /* Just like reinit_frame_cache, but with the right arguments to be
1378 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
1381 reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
1383 reinit_frame_cache ();
1387 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1388 dummy frame. The frame ID's base needs to match the TOS value
1389 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1392 static struct frame_id
1393 alpha_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1396 base = get_frame_register_unsigned (this_frame, ALPHA_SP_REGNUM);
1397 return frame_id_build (base, get_frame_pc (this_frame));
1401 alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1404 pc = frame_unwind_register_unsigned (next_frame, ALPHA_PC_REGNUM);
1409 /* Helper routines for alpha*-nat.c files to move register sets to and
1410 from core files. The UNIQUE pointer is allowed to be NULL, as most
1411 targets don't supply this value in their core files. */
1414 alpha_supply_int_regs (struct regcache *regcache, int regno,
1415 const void *r0_r30, const void *pc, const void *unique)
1417 const gdb_byte *regs = r0_r30;
1420 for (i = 0; i < 31; ++i)
1421 if (regno == i || regno == -1)
1422 regcache_raw_supply (regcache, i, regs + i * 8);
1424 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
1425 regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, NULL);
1427 if (regno == ALPHA_PC_REGNUM || regno == -1)
1428 regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc);
1430 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
1431 regcache_raw_supply (regcache, ALPHA_UNIQUE_REGNUM, unique);
1435 alpha_fill_int_regs (const struct regcache *regcache,
1436 int regno, void *r0_r30, void *pc, void *unique)
1438 gdb_byte *regs = r0_r30;
1441 for (i = 0; i < 31; ++i)
1442 if (regno == i || regno == -1)
1443 regcache_raw_collect (regcache, i, regs + i * 8);
1445 if (regno == ALPHA_PC_REGNUM || regno == -1)
1446 regcache_raw_collect (regcache, ALPHA_PC_REGNUM, pc);
1448 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
1449 regcache_raw_collect (regcache, ALPHA_UNIQUE_REGNUM, unique);
1453 alpha_supply_fp_regs (struct regcache *regcache, int regno,
1454 const void *f0_f30, const void *fpcr)
1456 const gdb_byte *regs = f0_f30;
1459 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1460 if (regno == i || regno == -1)
1461 regcache_raw_supply (regcache, i,
1462 regs + (i - ALPHA_FP0_REGNUM) * 8);
1464 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1465 regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, fpcr);
1469 alpha_fill_fp_regs (const struct regcache *regcache,
1470 int regno, void *f0_f30, void *fpcr)
1472 gdb_byte *regs = f0_f30;
1475 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1476 if (regno == i || regno == -1)
1477 regcache_raw_collect (regcache, i,
1478 regs + (i - ALPHA_FP0_REGNUM) * 8);
1480 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1481 regcache_raw_collect (regcache, ALPHA_FPCR_REGNUM, fpcr);
1486 /* Return nonzero if the G_floating register value in REG is equal to
1487 zero for FP control instructions. */
1490 fp_register_zero_p (LONGEST reg)
1492 /* Check that all bits except the sign bit are zero. */
1493 const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1;
1495 return ((reg & zero_mask) == 0);
1498 /* Return the value of the sign bit for the G_floating register
1499 value held in REG. */
1502 fp_register_sign_bit (LONGEST reg)
1504 const LONGEST sign_mask = (LONGEST) 1 << 63;
1506 return ((reg & sign_mask) != 0);
1509 /* alpha_software_single_step() is called just before we want to resume
1510 the inferior, if we want to single-step it but there is no hardware
1511 or kernel single-step support (NetBSD on Alpha, for example). We find
1512 the target of the coming instruction and breakpoint it. */
1515 alpha_next_pc (struct frame_info *frame, CORE_ADDR pc)
1517 struct gdbarch *gdbarch = get_frame_arch (frame);
1524 insn = alpha_read_insn (gdbarch, pc);
1526 /* Opcode is top 6 bits. */
1527 op = (insn >> 26) & 0x3f;
1531 /* Jump format: target PC is:
1533 return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3);
1536 if ((op & 0x30) == 0x30)
1538 /* Branch format: target PC is:
1539 (new PC) + (4 * sext(displacement)) */
1540 if (op == 0x30 /* BR */
1541 || op == 0x34) /* BSR */
1544 offset = (insn & 0x001fffff);
1545 if (offset & 0x00100000)
1546 offset |= 0xffe00000;
1547 offset *= ALPHA_INSN_SIZE;
1548 return (pc + ALPHA_INSN_SIZE + offset);
1551 /* Need to determine if branch is taken; read RA. */
1552 regno = (insn >> 21) & 0x1f;
1555 case 0x31: /* FBEQ */
1556 case 0x36: /* FBGE */
1557 case 0x37: /* FBGT */
1558 case 0x33: /* FBLE */
1559 case 0x32: /* FBLT */
1560 case 0x35: /* FBNE */
1561 regno += gdbarch_fp0_regnum (gdbarch);
1564 rav = get_frame_register_signed (frame, regno);
1568 case 0x38: /* BLBC */
1572 case 0x3c: /* BLBS */
1576 case 0x39: /* BEQ */
1580 case 0x3d: /* BNE */
1584 case 0x3a: /* BLT */
1588 case 0x3b: /* BLE */
1592 case 0x3f: /* BGT */
1596 case 0x3e: /* BGE */
1601 /* Floating point branches. */
1603 case 0x31: /* FBEQ */
1604 if (fp_register_zero_p (rav))
1607 case 0x36: /* FBGE */
1608 if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav))
1611 case 0x37: /* FBGT */
1612 if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav))
1615 case 0x33: /* FBLE */
1616 if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav))
1619 case 0x32: /* FBLT */
1620 if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav))
1623 case 0x35: /* FBNE */
1624 if (! fp_register_zero_p (rav))
1630 /* Not a branch or branch not taken; target PC is:
1632 return (pc + ALPHA_INSN_SIZE);
1636 alpha_software_single_step (struct frame_info *frame)
1638 struct gdbarch *gdbarch = get_frame_arch (frame);
1639 struct address_space *aspace = get_frame_address_space (frame);
1640 CORE_ADDR pc, next_pc;
1642 pc = get_frame_pc (frame);
1643 next_pc = alpha_next_pc (frame, pc);
1645 insert_single_step_breakpoint (gdbarch, aspace, next_pc);
1650 /* Initialize the current architecture based on INFO. If possible, re-use an
1651 architecture from ARCHES, which is a list of architectures already created
1652 during this debugging session.
1654 Called e.g. at program startup, when reading a core file, and when reading
1657 static struct gdbarch *
1658 alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1660 struct gdbarch_tdep *tdep;
1661 struct gdbarch *gdbarch;
1663 /* Try to determine the ABI of the object we are loading. */
1664 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
1666 /* If it's an ECOFF file, assume it's OSF/1. */
1667 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
1668 info.osabi = GDB_OSABI_OSF1;
1671 /* Find a candidate among extant architectures. */
1672 arches = gdbarch_list_lookup_by_info (arches, &info);
1674 return arches->gdbarch;
1676 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1677 gdbarch = gdbarch_alloc (&info, tdep);
1679 /* Lowest text address. This is used by heuristic_proc_start()
1680 to decide when to stop looking. */
1681 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL;
1683 tdep->dynamic_sigtramp_offset = NULL;
1684 tdep->sigcontext_addr = NULL;
1685 tdep->sc_pc_offset = 2 * 8;
1686 tdep->sc_regs_offset = 4 * 8;
1687 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
1689 tdep->jb_pc = -1; /* longjmp support not enabled by default. */
1691 tdep->return_in_memory = alpha_return_in_memory_always;
1694 set_gdbarch_short_bit (gdbarch, 16);
1695 set_gdbarch_int_bit (gdbarch, 32);
1696 set_gdbarch_long_bit (gdbarch, 64);
1697 set_gdbarch_long_long_bit (gdbarch, 64);
1698 set_gdbarch_float_bit (gdbarch, 32);
1699 set_gdbarch_double_bit (gdbarch, 64);
1700 set_gdbarch_long_double_bit (gdbarch, 64);
1701 set_gdbarch_ptr_bit (gdbarch, 64);
1704 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1705 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
1706 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1707 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1709 set_gdbarch_register_name (gdbarch, alpha_register_name);
1710 set_gdbarch_register_type (gdbarch, alpha_register_type);
1712 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1713 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1715 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p);
1716 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value);
1717 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register);
1719 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1721 /* Prologue heuristics. */
1722 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1725 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1729 set_gdbarch_return_value (gdbarch, alpha_return_value);
1731 /* Settings for calling functions in the inferior. */
1732 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
1734 /* Methods for saving / extracting a dummy frame's ID. */
1735 set_gdbarch_dummy_id (gdbarch, alpha_dummy_id);
1737 /* Return the unwound PC value. */
1738 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
1740 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1741 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1743 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
1744 set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE);
1745 set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
1747 /* Hook in ABI-specific overrides, if they have been registered. */
1748 gdbarch_init_osabi (info, gdbarch);
1750 /* Now that we have tuned the configuration, set a few final things
1751 based on what the OS ABI has told us. */
1753 if (tdep->jb_pc >= 0)
1754 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1756 frame_unwind_append_unwinder (gdbarch, &alpha_sigtramp_frame_unwind);
1757 frame_unwind_append_unwinder (gdbarch, &alpha_heuristic_frame_unwind);
1759 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
1765 alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1767 dwarf2_append_unwinders (gdbarch);
1768 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
1771 extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */
1774 _initialize_alpha_tdep (void)
1776 struct cmd_list_element *c;
1778 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
1780 /* Let the user set the fence post for heuristic_proc_start. */
1782 /* We really would like to have both "0" and "unlimited" work, but
1783 command.c doesn't deal with that. So make it a var_zinteger
1784 because the user can always use "999999" or some such for unlimited. */
1785 /* We need to throw away the frame cache when we set this, since it
1786 might change our ability to get backtraces. */
1787 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support,
1788 &heuristic_fence_post, _("\
1789 Set the distance searched for the start of a function."), _("\
1790 Show the distance searched for the start of a function."), _("\
1791 If you are debugging a stripped executable, GDB needs to search through the\n\
1792 program for the start of a function. This command sets the distance of the\n\
1793 search. The only need to set it is when debugging a stripped executable."),
1794 reinit_frame_cache_sfunc,
1795 NULL, /* FIXME: i18n: The distance searched for
1796 the start of a function is \"%d\". */
1797 &setlist, &showlist);