gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqsub.c

   1 #define INSN_NAME vqsub
   2 #define TEST_MSG "VQSUB/VQSUBQ"
   3
   4 /* Extra tests for special cases:
   5    - some requiring intermediate types larger than 64 bits to
   6    compute saturation flag.
   7    - corner case saturations with types smaller than 64 bits.
   8 */
   9 void vqsub_extras(void);
  10 #define EXTRA_TESTS vqsub_extras
  11
  12 #include "binary_sat_op.inc"
  13
  14
  15 /* Expected results.  */
  16 VECT_VAR_DECL(expected,int,8,8) [] = { 0xdf, 0xe0, 0xe1, 0xe2,
  17                                        0xe3, 0xe4, 0xe5, 0xe6 };
  18 VECT_VAR_DECL(expected,int,16,4) [] = { 0xffce, 0xffcf,
  19                                         0xffd0, 0xffd1 };
  20 VECT_VAR_DECL(expected,int,32,2) [] = { 0xffffffbd, 0xffffffbe };
  21 VECT_VAR_DECL(expected,int,64,1) [] = { 0xffffffffffffffac };
  22 VECT_VAR_DECL(expected,uint,8,8) [] = { 0x9b, 0x9c, 0x9d, 0x9e,
  23                                         0x9f, 0xa0, 0xa1, 0xa2 };
  24 VECT_VAR_DECL(expected,uint,16,4) [] = { 0xff8a, 0xff8b,
  25                                          0xff8c, 0xff8d };
  26 VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffff79, 0xffffff7a };
  27 VECT_VAR_DECL(expected,uint,64,1) [] = { 0xffffffffffffff68 };
  28 VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
  29                                         0x33, 0x33, 0x33, 0x33 };
  30 VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
  31 VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
  32 VECT_VAR_DECL(expected,int,8,16) [] = { 0xdf, 0xe0, 0xe1, 0xe2,
  33                                         0xe3, 0xe4, 0xe5, 0xe6,
  34                                         0xe7, 0xe8, 0xe9, 0xea,
  35                                         0xeb, 0xec, 0xed, 0xee };
  36 VECT_VAR_DECL(expected,int,16,8) [] = { 0xffce, 0xffcf, 0xffd0, 0xffd1,
  37                                         0xffd2, 0xffd3, 0xffd4, 0xffd5 };
  38 VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffbd, 0xffffffbe,
  39                                         0xffffffbf, 0xffffffc0 };
  40 VECT_VAR_DECL(expected,int,64,2) [] = { 0xffffffffffffffac,
  41                                         0xffffffffffffffad };
  42 VECT_VAR_DECL(expected,uint,8,16) [] = { 0x9b, 0x9c, 0x9d, 0x9e,
  43                                          0x9f, 0xa0, 0xa1, 0xa2,
  44                                          0xa3, 0xa4, 0xa5, 0xa6,
  45                                          0xa7, 0xa8, 0xa9, 0xaa };
  46 VECT_VAR_DECL(expected,uint,16,8) [] = { 0xff8a, 0xff8b, 0xff8c, 0xff8d,
  47                                          0xff8e, 0xff8f, 0xff90, 0xff91 };
  48 VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffff79, 0xffffff7a,
  49                                          0xffffff7b, 0xffffff7c };
  50 VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffff68,
  51                                          0xffffffffffffff69 };
  52 VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
  53                                          0x33, 0x33, 0x33, 0x33,
  54                                          0x33, 0x33, 0x33, 0x33,
  55                                          0x33, 0x33, 0x33, 0x33 };
  56 VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
  57                                          0x3333, 0x3333, 0x3333, 0x3333 };
  58 VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
  59                                            0x33333333, 0x33333333 };
  60
  61 /* Expected values of cumulative saturation flag.  */
  62 int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
  63 int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
  64 int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
  65 int VECT_VAR(expected_cumulative_sat,int,64,1) = 0;
  66 int VECT_VAR(expected_cumulative_sat,uint,8,8) = 0;
  67 int VECT_VAR(expected_cumulative_sat,uint,16,4) = 0;
  68 int VECT_VAR(expected_cumulative_sat,uint,32,2) = 0;
  69 int VECT_VAR(expected_cumulative_sat,uint,64,1) = 0;
  70 int VECT_VAR(expected_cumulative_sat,int,8,16) = 0;
  71 int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
  72 int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
  73 int VECT_VAR(expected_cumulative_sat,int,64,2) = 0;
  74 int VECT_VAR(expected_cumulative_sat,uint,8,16) = 0;
  75 int VECT_VAR(expected_cumulative_sat,uint,16,8) = 0;
  76 int VECT_VAR(expected_cumulative_sat,uint,32,4) = 0;
  77 int VECT_VAR(expected_cumulative_sat,uint,64,2) = 0;
  78
  79 /* 64-bits types, with 0 as second input.  */
  80 VECT_VAR_DECL(expected_64,int,64,1) [] = { 0xfffffffffffffff0 };
  81 VECT_VAR_DECL(expected_64,uint,64,1) [] = { 0xfffffffffffffff0 };
  82 VECT_VAR_DECL(expected_64,int,64,2) [] = { 0xfffffffffffffff0,
  83                                            0xfffffffffffffff1 };
  84 VECT_VAR_DECL(expected_64,uint,64,2) [] = { 0xfffffffffffffff0,
  85                                             0xfffffffffffffff1 };
  86 int VECT_VAR(expected_cumulative_sat_64,int,64,1) = 0;
  87 int VECT_VAR(expected_cumulative_sat_64,uint,64,1) = 0;
  88 int VECT_VAR(expected_cumulative_sat_64,int,64,2) = 0;
  89 int VECT_VAR(expected_cumulative_sat_64,uint,64,2) = 0;
  90
  91 /* 64-bits types, other cases.  */
  92 VECT_VAR_DECL(expected_64_2,int,64,1) [] = { 0xffffffffffffffac };
  93 VECT_VAR_DECL(expected_64_2,uint,64,1) [] = { 0xffffffffffffff68 };
  94 VECT_VAR_DECL(expected_64_2,int,64,2) [] = { 0xffffffffffffffac,
  95                                              0xffffffffffffffad };
  96 VECT_VAR_DECL(expected_64_2,uint,64,2) [] = { 0xffffffffffffff68,
  97                                               0xffffffffffffff69 };
  98 int VECT_VAR(expected_cumulative_sat_64_2,int,64,1) = 0;
  99 int VECT_VAR(expected_cumulative_sat_64_2,uint,64,1) = 0;
 100 int VECT_VAR(expected_cumulative_sat_64_2,int,64,2) = 0;
 101 int VECT_VAR(expected_cumulative_sat_64_2,uint,64,2) = 0;
 102
 103 /* 64-bits types, all causing cumulative saturation.  */
 104 VECT_VAR_DECL(expected_64_3,int,64,1) [] = { 0x8000000000000000 };
 105 VECT_VAR_DECL(expected_64_3,uint,64,1) [] = { 0x0 };
 106 VECT_VAR_DECL(expected_64_3,int,64,2) [] = { 0x7fffffffffffffff,
 107                                              0x7fffffffffffffff };
 108 VECT_VAR_DECL(expected_64_3,uint,64,2) [] = { 0x0, 0x0 };
 109 int VECT_VAR(expected_cumulative_sat_64_3,int,64,1) = 1;
 110 int VECT_VAR(expected_cumulative_sat_64_3,uint,64,1) = 1;
 111 int VECT_VAR(expected_cumulative_sat_64_3,int,64,2) = 1;
 112 int VECT_VAR(expected_cumulative_sat_64_3,uint,64,2) = 1;
 113
 114 /* smaller types, corner cases causing cumulative saturation. (1)  */
 115 VECT_VAR_DECL(expected_lt_64_1,int,8,8) [] = { 0x80, 0x80, 0x80, 0x80,
 116                                                0x80, 0x80, 0x80, 0x80 };
 117 VECT_VAR_DECL(expected_lt_64_1,int,16,4) [] = { 0x8000, 0x8000,
 118                                                 0x8000, 0x8000 };
 119 VECT_VAR_DECL(expected_lt_64_1,int,32,2) [] = { 0x80000000, 0x80000000 };
 120 VECT_VAR_DECL(expected_lt_64_1,int,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
 121                                                 0x80, 0x80, 0x80, 0x80,
 122                                                 0x80, 0x80, 0x80, 0x80,
 123                                                 0x80, 0x80, 0x80, 0x80 };
 124 VECT_VAR_DECL(expected_lt_64_1,int,16,8) [] = { 0x8000, 0x8000,
 125                                                 0x8000, 0x8000,
 126                                                 0x8000, 0x8000,
 127                                                 0x8000, 0x8000 };
 128 VECT_VAR_DECL(expected_lt_64_1,int,32,4) [] = { 0x80000000, 0x80000000,
 129                                                 0x80000000, 0x80000000 };
 130 int VECT_VAR(expected_csat_lt_64_1,int,8,8) = 1;
 131 int VECT_VAR(expected_csat_lt_64_1,int,16,4) = 1;
 132 int VECT_VAR(expected_csat_lt_64_1,int,32,2) = 1;
 133 int VECT_VAR(expected_csat_lt_64_1,int,8,16) = 1;
 134 int VECT_VAR(expected_csat_lt_64_1,int,16,8) = 1;
 135 int VECT_VAR(expected_csat_lt_64_1,int,32,4) = 1;
 136
 137 /* smaller types, corner cases causing cumulative saturation. (2)  */
 138 VECT_VAR_DECL(expected_lt_64_2,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
 139                                                 0x0, 0x0, 0x0, 0x0 };
 140 VECT_VAR_DECL(expected_lt_64_2,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
 141 VECT_VAR_DECL(expected_lt_64_2,uint,32,2) [] = { 0x0, 0x0 };
 142 VECT_VAR_DECL(expected_lt_64_2,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
 143                                                  0x0, 0x0, 0x0, 0x0,
 144                                                  0x0, 0x0, 0x0, 0x0,
 145                                                  0x0, 0x0, 0x0, 0x0 };
 146 VECT_VAR_DECL(expected_lt_64_2,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
 147                                                  0x0, 0x0, 0x0, 0x0 };
 148 VECT_VAR_DECL(expected_lt_64_2,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
 149 int VECT_VAR(expected_csat_lt_64_2,uint,8,8) = 1;
 150 int VECT_VAR(expected_csat_lt_64_2,uint,16,4) = 1;
 151 int VECT_VAR(expected_csat_lt_64_2,uint,32,2) = 1;
 152 int VECT_VAR(expected_csat_lt_64_2,uint,8,16) = 1;
 153 int VECT_VAR(expected_csat_lt_64_2,uint,16,8) = 1;
 154 int VECT_VAR(expected_csat_lt_64_2,uint,32,4) = 1;
 155
 156 void vqsub_extras(void)
 157 {
 158   DECL_VARIABLE_ALL_VARIANTS(vector1);
 159   DECL_VARIABLE_ALL_VARIANTS(vector2);
 160   DECL_VARIABLE_ALL_VARIANTS(vector_res);
 161
 162   /* Initialize input "vector1" from "buffer".  */
 163   TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector1, buffer);
 164
 165   /* Use a second vector full of 0.  */
 166   VDUP(vector2, , int, s, 64, 1, 0x0);
 167   VDUP(vector2, , uint, u, 64, 1, 0x0);
 168   VDUP(vector2, q, int, s, 64, 2, 0x0);
 169   VDUP(vector2, q, uint, u, 64, 2, 0x0);
 170
 171 #define MSG "64 bits saturation when adding zero"
 172   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 64, 1, expected_cumulative_sat_64, MSG);
 173   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 64, 1, expected_cumulative_sat_64, MSG);
 174   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 64, 2, expected_cumulative_sat_64, MSG);
 175   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 64, 2, expected_cumulative_sat_64, MSG);
 176
 177   CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_64, MSG);
 178   CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_64, MSG);
 179   CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_64, MSG);
 180   CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_64, MSG);
 181
 182   /* Another set of tests with non-zero values.  */
 183   VDUP(vector2, , int, s, 64, 1, 0x44);
 184   VDUP(vector2, , uint, u, 64, 1, 0x88);
 185   VDUP(vector2, q, int, s, 64, 2, 0x44);
 186   VDUP(vector2, q, uint, u, 64, 2, 0x88);
 187
 188 #undef MSG
 189 #define MSG "64 bits saturation cumulative_sat (2)"
 190   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 64, 1, expected_cumulative_sat_64_2, MSG);
 191   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 64, 1, expected_cumulative_sat_64_2, MSG);
 192   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 64, 2, expected_cumulative_sat_64_2, MSG);
 193   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 64, 2, expected_cumulative_sat_64_2, MSG);
 194
 195   CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_64_2, MSG);
 196   CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_64_2, MSG);
 197   CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_64_2, MSG);
 198   CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_64_2, MSG);
 199
 200   /* Another set of tests, with input values chosen to set
 201      cumulative_sat in all cases.  */
 202   VDUP(vector2, , int, s, 64, 1, 0x7fffffffffffffffLL);
 203   VDUP(vector2, , uint, u, 64, 1, 0xffffffffffffffffULL);
 204   /* To check positive saturation, we need to write a positive value
 205      in vector1.  */
 206   VDUP(vector1, q, int, s, 64, 2, 0x3fffffffffffffffLL);
 207   VDUP(vector2, q, int, s, 64, 2, 0x8000000000000000LL);
 208   VDUP(vector2, q, uint, u, 64, 2, 0xffffffffffffffffULL);
 209
 210 #undef MSG
 211 #define MSG "64 bits saturation cumulative_sat (3)"
 212   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 64, 1, expected_cumulative_sat_64_3, MSG);
 213   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 64, 1, expected_cumulative_sat_64_3, MSG);
 214   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 64, 2, expected_cumulative_sat_64_3, MSG);
 215   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 64, 2, expected_cumulative_sat_64_3, MSG);
 216
 217   CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_64_3, MSG);
 218   CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_64_3, MSG);
 219   CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_64_3, MSG);
 220   CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_64_3, MSG);
 221
 222   /* To improve coverage, check saturation with less than 64 bits
 223      too.  */
 224   VDUP(vector2, , int, s, 8, 8, 0x7F);
 225   VDUP(vector2, , int, s, 16, 4, 0x7FFF);
 226   VDUP(vector2, , int, s, 32, 2, 0x7FFFFFFF);
 227   VDUP(vector2, q, int, s, 8, 16, 0x7F);
 228   VDUP(vector2, q, int, s, 16, 8, 0x7FFF);
 229   VDUP(vector2, q, int, s, 32, 4, 0x7FFFFFFF);
 230
 231 #undef MSG
 232 #define MSG "less than 64 bits saturation cumulative_sat (1)"
 233   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 8, 8, expected_csat_lt_64_1, MSG);
 234   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 16, 4, expected_csat_lt_64_1, MSG);
 235   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 32, 2, expected_csat_lt_64_1, MSG);
 236   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 8, 16, expected_csat_lt_64_1, MSG);
 237   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 16, 8, expected_csat_lt_64_1, MSG);
 238   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 32, 4, expected_csat_lt_64_1, MSG);
 239
 240   CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_lt_64_1, MSG);
 241   CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_lt_64_1, MSG);
 242   CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_lt_64_1, MSG);
 243   CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_lt_64_1, MSG);
 244   CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_lt_64_1, MSG);
 245   CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_lt_64_1, MSG);
 246
 247   /* Another set of tests with vector1 values smaller than
 248      vector2.  */
 249   VDUP(vector1, , uint, u, 8, 8, 0x10);
 250   VDUP(vector1, , uint, u, 16, 4, 0x10);
 251   VDUP(vector1, , uint, u, 32, 2, 0x10);
 252   VDUP(vector1, q, uint, u, 8, 16, 0x10);
 253   VDUP(vector1, q, uint, u, 16, 8, 0x10);
 254   VDUP(vector1, q, uint, u, 32, 4, 0x10);
 255
 256   VDUP(vector2, , uint, u, 8, 8, 0x20);
 257   VDUP(vector2, , uint, u, 16, 4, 0x20);
 258   VDUP(vector2, , uint, u, 32, 2, 0x20);
 259   VDUP(vector2, q, uint, u, 8, 16, 0x20);
 260   VDUP(vector2, q, uint, u, 16, 8, 0x20);
 261   VDUP(vector2, q, uint, u, 32, 4, 0x20);
 262
 263 #undef MSG
 264 #define MSG "less than 64 bits saturation cumulative_sat (2)"
 265   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 8, 8, expected_csat_lt_64_2, MSG);
 266   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 16, 4, expected_csat_lt_64_2, MSG);
 267   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 32, 2, expected_csat_lt_64_2, MSG);
 268   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 8, 16, expected_csat_lt_64_2, MSG);
 269   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 16, 8, expected_csat_lt_64_2, MSG);
 270   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 32, 4, expected_csat_lt_64_2, MSG);
 271
 272   CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_lt_64_2, MSG);
 273   CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_lt_64_2, MSG);
 274   CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_lt_64_2, MSG);
 275   CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_lt_64_2, MSG);
 276   CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_lt_64_2, MSG);
 277   CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_lt_64_2, MSG);
 278 }