New Advanced SIMD intrinsics tests.
[platform/upstream/gcc49.git] / gcc / testsuite / gcc.target / aarch64 / advsimd-intrinsics / vorr.c
1 #define INSN_NAME vorr
2 #define TEST_MSG "VORR/VORRQ"
3
4 #include "binary_op.inc"
5
6 /* Expected results.  */
7 VECT_VAR_DECL(expected,int,8,8) [] = { 0xf2, 0xf3, 0xf2, 0xf3,
8                                        0xf6, 0xf7, 0xf6, 0xf7 };
9 VECT_VAR_DECL(expected,int,16,4) [] = { 0xfffc, 0xfffd, 0xfffe, 0xffff };
10 VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff3, 0xfffffff3 };
11 VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff4 };
12 VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf4, 0xf5, 0xf6, 0xf7,
13                                         0xf4, 0xf5, 0xf6, 0xf7 };
14 VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfffe, 0xffff, 0xfffe, 0xffff };
15 VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff8, 0xfffffff9 };
16 VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff2 };
17 VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
18                                         0x33, 0x33, 0x33, 0x33 };
19 VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
20 VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
21 VECT_VAR_DECL(expected,int,8,16) [] = { 0xf6, 0xf7, 0xf6, 0xf7,
22                                         0xf6, 0xf7, 0xf6, 0xf7,
23                                         0xfe, 0xff, 0xfe, 0xff,
24                                         0xfe, 0xff, 0xfe, 0xff };
25 VECT_VAR_DECL(expected,int,16,8) [] = { 0xfffc, 0xfffd, 0xfffe, 0xffff,
26                                         0xfffc, 0xfffd, 0xfffe, 0xffff };
27 VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff2, 0xfffffff3,
28                                         0xfffffff2, 0xfffffff3 };
29 VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff8,
30                                         0xfffffffffffffff9 };
31 VECT_VAR_DECL(expected,uint,8,16) [] = { 0xfc, 0xfd, 0xfe, 0xff,
32                                          0xfc, 0xfd, 0xfe, 0xff,
33                                          0xfc, 0xfd, 0xfe, 0xff,
34                                          0xfc, 0xfd, 0xfe, 0xff };
35 VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff3, 0xfff3, 0xfff3, 0xfff3,
36                                          0xfff7, 0xfff7, 0xfff7, 0xfff7 };
37 VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff7, 0xfffffff7,
38                                          0xfffffff7, 0xfffffff7 };
39 VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff3,
40                                          0xfffffffffffffff3 };
41 VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
42                                          0x33, 0x33, 0x33, 0x33,
43                                          0x33, 0x33, 0x33, 0x33,
44                                          0x33, 0x33, 0x33, 0x33 };
45 VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
46                                          0x3333, 0x3333, 0x3333, 0x3333 };
47 VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
48                                            0x33333333, 0x33333333 };