New Advanced SIMD intrinsics tests.
[platform/upstream/gcc49.git] / gcc / testsuite / gcc.target / aarch64 / advsimd-intrinsics / vld1.c
1 #include <arm_neon.h>
2 #include "arm-neon-ref.h"
3 #include "compute-ref-data.h"
4
5 /* Expected results.  */
6 VECT_VAR_DECL(expected,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
7                                        0xf4, 0xf5, 0xf6, 0xf7 };
8 VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
9 VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
10 VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff0 };
11 VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
12                                         0xf4, 0xf5, 0xf6, 0xf7 };
13 VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
14 VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff0, 0xfffffff1 };
15 VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
16 VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
17                                         0xf4, 0xf5, 0xf6, 0xf7 };
18 VECT_VAR_DECL(expected,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
19 VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
20 VECT_VAR_DECL(expected,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
21                                         0xf4, 0xf5, 0xf6, 0xf7,
22                                         0xf8, 0xf9, 0xfa, 0xfb,
23                                         0xfc, 0xfd, 0xfe, 0xff };
24 VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
25                                         0xfff4, 0xfff5, 0xfff6, 0xfff7 };
26 VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
27                                         0xfffffff2, 0xfffffff3 };
28 VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff0,
29                                         0xfffffffffffffff1 };
30 VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
31                                          0xf4, 0xf5, 0xf6, 0xf7,
32                                          0xf8, 0xf9, 0xfa, 0xfb,
33                                          0xfc, 0xfd, 0xfe, 0xff };
34 VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2,
35                                          0xfff3, 0xfff4, 0xfff5,
36                                          0xfff6, 0xfff7 };
37 VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
38                                          0xfffffff2, 0xfffffff3 };
39 VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0,
40                                          0xfffffffffffffff1 };
41 VECT_VAR_DECL(expected,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
42                                          0xf4, 0xf5, 0xf6, 0xf7,
43                                          0xf8, 0xf9, 0xfa, 0xfb,
44                                          0xfc, 0xfd, 0xfe, 0xff };
45 VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
46                                          0xfff4, 0xfff5, 0xfff6, 0xfff7 };
47 VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
48                                            0xc1600000, 0xc1500000 };
49
50 #define TEST_MSG "VLD1/VLD1Q"
51 void exec_vld1 (void)
52 {
53   /* Basic test vec=vld1(buffer); then store vec: vst1(result, vector).  */
54   /* This test actually tests vdl1 and vst1 at the same time.  */
55 #define TEST_VLD1(VAR, BUF, Q, T1, T2, W, N)                            \
56   VECT_VAR(VAR, T1, W, N) = vld1##Q##_##T2##W(VECT_VAR(BUF, T1, W, N)); \
57   vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(VAR, T1, W, N))
58
59   DECL_VARIABLE_ALL_VARIANTS(vector);
60
61   clean_results ();
62
63   TEST_MACRO_ALL_VARIANTS_2_5(TEST_VLD1, vector, buffer);
64
65   TEST_VLD1(vector, buffer, , float, f, 32, 2);
66   TEST_VLD1(vector, buffer, q, float, f, 32, 4);
67
68   CHECK_RESULTS (TEST_MSG, "");
69 }
70
71 int main (void)
72 {
73   exec_vld1 ();
74   return 0;
75 }