1 /* Skip on MIPS, where LOGICAL_OP_NON_SHORT_CIRCUIT inhibits the setcc
2 optimizations that expose the VRP opportunity. */
3 /* Skip on S/390 and avr. Lower values in BRANCH_COST lead to two conditional
4 jumps when evaluating an && condition. VRP is not able to optimize
6 /* { dg-do compile { target { ! "mips*-*-* s390*-*-* avr-*-* mn10300-*-*" } } } */
7 /* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-dom1 -fdump-tree-dom2" } */
8 /* { dg-additional-options "-march=i586" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
9 /* Skip on ARM Cortex-M0, where LOGICAL_OP_NON_SHORT_CIRCUIT is set to false,
10 leading to two conditional jumps when evaluating an && condition. VRP is
11 not able to optimize this. */
12 /* { dg-skip-if "" { arm_cortex_m && arm_thumb1} } */
16 if ((x >= 0 && x <= 1) && (y >= 0 && y <= 1))
24 if ((x >= 0 && x <= 1) && (y >= 0 && y <= 1))
39 /* Test that x and y are never compared to 0 -- they're always known to be
41 /* { dg-final { scan-tree-dump-times "\[xy\]\[^ \]* !=" 0 "vrp1" } } */
43 /* This one needs more copy propagation that only happens in dom1. */
44 /* { dg-final { scan-tree-dump-times "x\[^ \]* & y" 1 "dom1" { xfail *-*-* } } } */
45 /* { dg-final { scan-tree-dump-times "x\[^ \]* & y" 1 "dom2" } } */
46 /* { dg-final { scan-tree-dump-times "x\[^ \]* & y" 1 "vrp1" { xfail *-*-* } } } */
48 /* These two are fully simplified by VRP. */
49 /* { dg-final { scan-tree-dump-times "x\[^ \]* \[|\] y" 1 "vrp1" } } */
50 /* { dg-final { scan-tree-dump-times "x\[^ \]* \\^ 1" 1 "vrp1" } } */
52 /* { dg-final { cleanup-tree-dump "vrp1" } } */
53 /* { dg-final { cleanup-tree-dump "dom1" } } */
54 /* { dg-final { cleanup-tree-dump "dom2" } } */