1 /* Analyze RTL for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
30 #include "insn-config.h"
42 /* Information about a subreg of a hard register. */
45 /* Offset of first hard register involved in the subreg. */
47 /* Number of hard registers involved in the subreg. */
49 /* Whether this subreg can be represented as a hard reg with the new
54 /* Forward declarations */
55 static void set_of_1 (rtx, const_rtx, void *);
56 static bool covers_regno_p (const_rtx, unsigned int);
57 static bool covers_regno_no_parallel_p (const_rtx, unsigned int);
58 static int rtx_referenced_p_1 (rtx *, void *);
59 static int computed_jump_p_1 (const_rtx);
60 static void parms_set (rtx, const_rtx, void *);
61 static void subreg_get_info (unsigned int, enum machine_mode,
62 unsigned int, enum machine_mode,
63 struct subreg_info *);
65 static unsigned HOST_WIDE_INT cached_nonzero_bits (const_rtx, enum machine_mode,
66 const_rtx, enum machine_mode,
67 unsigned HOST_WIDE_INT);
68 static unsigned HOST_WIDE_INT nonzero_bits1 (const_rtx, enum machine_mode,
69 const_rtx, enum machine_mode,
70 unsigned HOST_WIDE_INT);
71 static unsigned int cached_num_sign_bit_copies (const_rtx, enum machine_mode, const_rtx,
74 static unsigned int num_sign_bit_copies1 (const_rtx, enum machine_mode, const_rtx,
75 enum machine_mode, unsigned int);
77 /* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or
78 -1 if a code has no such operand. */
79 static int non_rtx_starting_operands[NUM_RTX_CODE];
81 /* Bit flags that specify the machine subtype we are compiling for.
82 Bits are tested using macros TARGET_... defined in the tm.h file
83 and set by `-m...' switches. Must be defined in rtlanal.c. */
87 /* Truncation narrows the mode from SOURCE mode to DESTINATION mode.
88 If TARGET_MODE_REP_EXTENDED (DESTINATION, DESTINATION_REP) is
89 SIGN_EXTEND then while narrowing we also have to enforce the
90 representation and sign-extend the value to mode DESTINATION_REP.
92 If the value is already sign-extended to DESTINATION_REP mode we
93 can just switch to DESTINATION mode on it. For each pair of
94 integral modes SOURCE and DESTINATION, when truncating from SOURCE
95 to DESTINATION, NUM_SIGN_BIT_COPIES_IN_REP[SOURCE][DESTINATION]
96 contains the number of high-order bits in SOURCE that have to be
97 copies of the sign-bit so that we can do this mode-switch to
101 num_sign_bit_copies_in_rep[MAX_MODE_INT + 1][MAX_MODE_INT + 1];
103 /* Return 1 if the value of X is unstable
104 (would be different at a different point in the program).
105 The frame pointer, arg pointer, etc. are considered stable
106 (within one function) and so is anything marked `unchanging'. */
109 rtx_unstable_p (const_rtx x)
111 const RTX_CODE code = GET_CODE (x);
118 return !MEM_READONLY_P (x) || rtx_unstable_p (XEXP (x, 0));
130 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
131 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
132 /* The arg pointer varies if it is not a fixed register. */
133 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
135 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
136 /* ??? When call-clobbered, the value is stable modulo the restore
137 that must happen after a call. This currently screws up local-alloc
138 into believing that the restore is not needed. */
139 if (x == pic_offset_table_rtx)
145 if (MEM_VOLATILE_P (x))
154 fmt = GET_RTX_FORMAT (code);
155 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
158 if (rtx_unstable_p (XEXP (x, i)))
161 else if (fmt[i] == 'E')
164 for (j = 0; j < XVECLEN (x, i); j++)
165 if (rtx_unstable_p (XVECEXP (x, i, j)))
172 /* Return 1 if X has a value that can vary even between two
173 executions of the program. 0 means X can be compared reliably
174 against certain constants or near-constants.
175 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
176 zero, we are slightly more conservative.
177 The frame pointer and the arg pointer are considered constant. */
180 rtx_varies_p (const_rtx x, bool for_alias)
193 return !MEM_READONLY_P (x) || rtx_varies_p (XEXP (x, 0), for_alias);
205 /* Note that we have to test for the actual rtx used for the frame
206 and arg pointers and not just the register number in case we have
207 eliminated the frame and/or arg pointer and are using it
209 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
210 /* The arg pointer varies if it is not a fixed register. */
211 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
213 if (x == pic_offset_table_rtx
214 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
215 /* ??? When call-clobbered, the value is stable modulo the restore
216 that must happen after a call. This currently screws up
217 local-alloc into believing that the restore is not needed, so we
218 must return 0 only if we are called from alias analysis. */
226 /* The operand 0 of a LO_SUM is considered constant
227 (in fact it is related specifically to operand 1)
228 during alias analysis. */
229 return (! for_alias && rtx_varies_p (XEXP (x, 0), for_alias))
230 || rtx_varies_p (XEXP (x, 1), for_alias);
233 if (MEM_VOLATILE_P (x))
242 fmt = GET_RTX_FORMAT (code);
243 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
246 if (rtx_varies_p (XEXP (x, i), for_alias))
249 else if (fmt[i] == 'E')
252 for (j = 0; j < XVECLEN (x, i); j++)
253 if (rtx_varies_p (XVECEXP (x, i, j), for_alias))
260 /* Return nonzero if the use of X as an address in a MEM can cause a trap.
261 MODE is the mode of the MEM (not that of X) and UNALIGNED_MEMS controls
262 whether nonzero is returned for unaligned memory accesses on strict
263 alignment machines. */
266 rtx_addr_can_trap_p_1 (const_rtx x, HOST_WIDE_INT offset, HOST_WIDE_INT size,
267 enum machine_mode mode, bool unaligned_mems)
269 enum rtx_code code = GET_CODE (x);
273 && GET_MODE_SIZE (mode) != 0)
275 HOST_WIDE_INT actual_offset = offset;
276 #ifdef SPARC_STACK_BOUNDARY_HACK
277 /* ??? The SPARC port may claim a STACK_BOUNDARY higher than
278 the real alignment of %sp. However, when it does this, the
279 alignment of %sp+STACK_POINTER_OFFSET is STACK_BOUNDARY. */
280 if (SPARC_STACK_BOUNDARY_HACK
281 && (x == stack_pointer_rtx || x == hard_frame_pointer_rtx))
282 actual_offset -= STACK_POINTER_OFFSET;
285 if (actual_offset % GET_MODE_SIZE (mode) != 0)
292 if (SYMBOL_REF_WEAK (x))
294 if (!CONSTANT_POOL_ADDRESS_P (x))
297 HOST_WIDE_INT decl_size;
302 size = GET_MODE_SIZE (mode);
306 /* If the size of the access or of the symbol is unknown,
308 decl = SYMBOL_REF_DECL (x);
310 /* Else check that the access is in bounds. TODO: restructure
311 expr_size/lhd_expr_size/int_expr_size and just use the latter. */
314 else if (DECL_P (decl) && DECL_SIZE_UNIT (decl))
315 decl_size = (host_integerp (DECL_SIZE_UNIT (decl), 0)
316 ? tree_low_cst (DECL_SIZE_UNIT (decl), 0)
318 else if (TREE_CODE (decl) == STRING_CST)
319 decl_size = TREE_STRING_LENGTH (decl);
320 else if (TYPE_SIZE_UNIT (TREE_TYPE (decl)))
321 decl_size = int_size_in_bytes (TREE_TYPE (decl));
325 return (decl_size <= 0 ? offset != 0 : offset + size > decl_size);
334 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
335 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
336 || x == stack_pointer_rtx
337 /* The arg pointer varies if it is not a fixed register. */
338 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
340 /* All of the virtual frame registers are stack references. */
341 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
342 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
347 return rtx_addr_can_trap_p_1 (XEXP (x, 0), offset, size,
348 mode, unaligned_mems);
351 /* An address is assumed not to trap if:
352 - it is the pic register plus a constant. */
353 if (XEXP (x, 0) == pic_offset_table_rtx && CONSTANT_P (XEXP (x, 1)))
356 /* - or it is an address that can't trap plus a constant integer,
357 with the proper remainder modulo the mode size if we are
358 considering unaligned memory references. */
359 if (GET_CODE (XEXP (x, 1)) == CONST_INT
360 && !rtx_addr_can_trap_p_1 (XEXP (x, 0), offset + INTVAL (XEXP (x, 1)),
361 size, mode, unaligned_mems))
368 return rtx_addr_can_trap_p_1 (XEXP (x, 1), offset, size,
369 mode, unaligned_mems);
376 return rtx_addr_can_trap_p_1 (XEXP (x, 0), offset, size,
377 mode, unaligned_mems);
383 /* If it isn't one of the case above, it can cause a trap. */
387 /* Return nonzero if the use of X as an address in a MEM can cause a trap. */
390 rtx_addr_can_trap_p (const_rtx x)
392 return rtx_addr_can_trap_p_1 (x, 0, 0, VOIDmode, false);
395 /* Return true if X is an address that is known to not be zero. */
398 nonzero_address_p (const_rtx x)
400 const enum rtx_code code = GET_CODE (x);
405 return !SYMBOL_REF_WEAK (x);
411 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
412 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
413 || x == stack_pointer_rtx
414 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
416 /* All of the virtual frame registers are stack references. */
417 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
418 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
423 return nonzero_address_p (XEXP (x, 0));
426 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
427 return nonzero_address_p (XEXP (x, 0));
428 /* Handle PIC references. */
429 else if (XEXP (x, 0) == pic_offset_table_rtx
430 && CONSTANT_P (XEXP (x, 1)))
435 /* Similar to the above; allow positive offsets. Further, since
436 auto-inc is only allowed in memories, the register must be a
438 if (GET_CODE (XEXP (x, 1)) == CONST_INT
439 && INTVAL (XEXP (x, 1)) > 0)
441 return nonzero_address_p (XEXP (x, 0));
444 /* Similarly. Further, the offset is always positive. */
451 return nonzero_address_p (XEXP (x, 0));
454 return nonzero_address_p (XEXP (x, 1));
460 /* If it isn't one of the case above, might be zero. */
464 /* Return 1 if X refers to a memory location whose address
465 cannot be compared reliably with constant addresses,
466 or if X refers to a BLKmode memory object.
467 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
468 zero, we are slightly more conservative. */
471 rtx_addr_varies_p (const_rtx x, bool for_alias)
482 return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0), for_alias);
484 fmt = GET_RTX_FORMAT (code);
485 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
488 if (rtx_addr_varies_p (XEXP (x, i), for_alias))
491 else if (fmt[i] == 'E')
494 for (j = 0; j < XVECLEN (x, i); j++)
495 if (rtx_addr_varies_p (XVECEXP (x, i, j), for_alias))
501 /* Return the value of the integer term in X, if one is apparent;
503 Only obvious integer terms are detected.
504 This is used in cse.c with the `related_value' field. */
507 get_integer_term (const_rtx x)
509 if (GET_CODE (x) == CONST)
512 if (GET_CODE (x) == MINUS
513 && GET_CODE (XEXP (x, 1)) == CONST_INT)
514 return - INTVAL (XEXP (x, 1));
515 if (GET_CODE (x) == PLUS
516 && GET_CODE (XEXP (x, 1)) == CONST_INT)
517 return INTVAL (XEXP (x, 1));
521 /* If X is a constant, return the value sans apparent integer term;
523 Only obvious integer terms are detected. */
526 get_related_value (const_rtx x)
528 if (GET_CODE (x) != CONST)
531 if (GET_CODE (x) == PLUS
532 && GET_CODE (XEXP (x, 1)) == CONST_INT)
534 else if (GET_CODE (x) == MINUS
535 && GET_CODE (XEXP (x, 1)) == CONST_INT)
540 /* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
541 to somewhere in the same object or object_block as SYMBOL. */
544 offset_within_block_p (const_rtx symbol, HOST_WIDE_INT offset)
548 if (GET_CODE (symbol) != SYMBOL_REF)
556 if (CONSTANT_POOL_ADDRESS_P (symbol)
557 && offset < (int) GET_MODE_SIZE (get_pool_mode (symbol)))
560 decl = SYMBOL_REF_DECL (symbol);
561 if (decl && offset < int_size_in_bytes (TREE_TYPE (decl)))
565 if (SYMBOL_REF_HAS_BLOCK_INFO_P (symbol)
566 && SYMBOL_REF_BLOCK (symbol)
567 && SYMBOL_REF_BLOCK_OFFSET (symbol) >= 0
568 && ((unsigned HOST_WIDE_INT) offset + SYMBOL_REF_BLOCK_OFFSET (symbol)
569 < (unsigned HOST_WIDE_INT) SYMBOL_REF_BLOCK (symbol)->size))
575 /* Split X into a base and a constant offset, storing them in *BASE_OUT
576 and *OFFSET_OUT respectively. */
579 split_const (rtx x, rtx *base_out, rtx *offset_out)
581 if (GET_CODE (x) == CONST)
584 if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
586 *base_out = XEXP (x, 0);
587 *offset_out = XEXP (x, 1);
592 *offset_out = const0_rtx;
595 /* Return the number of places FIND appears within X. If COUNT_DEST is
596 zero, we do not count occurrences inside the destination of a SET. */
599 count_occurrences (const_rtx x, const_rtx find, int count_dest)
603 const char *format_ptr;
625 count = count_occurrences (XEXP (x, 0), find, count_dest);
627 count += count_occurrences (XEXP (x, 1), find, count_dest);
631 if (MEM_P (find) && rtx_equal_p (x, find))
636 if (SET_DEST (x) == find && ! count_dest)
637 return count_occurrences (SET_SRC (x), find, count_dest);
644 format_ptr = GET_RTX_FORMAT (code);
647 for (i = 0; i < GET_RTX_LENGTH (code); i++)
649 switch (*format_ptr++)
652 count += count_occurrences (XEXP (x, i), find, count_dest);
656 for (j = 0; j < XVECLEN (x, i); j++)
657 count += count_occurrences (XVECEXP (x, i, j), find, count_dest);
665 /* Nonzero if register REG appears somewhere within IN.
666 Also works if REG is not a register; in this case it checks
667 for a subexpression of IN that is Lisp "equal" to REG. */
670 reg_mentioned_p (const_rtx reg, const_rtx in)
682 if (GET_CODE (in) == LABEL_REF)
683 return reg == XEXP (in, 0);
685 code = GET_CODE (in);
689 /* Compare registers by number. */
691 return REG_P (reg) && REGNO (in) == REGNO (reg);
693 /* These codes have no constituent expressions
704 /* These are kept unique for a given value. */
711 if (GET_CODE (reg) == code && rtx_equal_p (reg, in))
714 fmt = GET_RTX_FORMAT (code);
716 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
721 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
722 if (reg_mentioned_p (reg, XVECEXP (in, i, j)))
725 else if (fmt[i] == 'e'
726 && reg_mentioned_p (reg, XEXP (in, i)))
732 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
733 no CODE_LABEL insn. */
736 no_labels_between_p (const_rtx beg, const_rtx end)
741 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
747 /* Nonzero if register REG is used in an insn between
748 FROM_INSN and TO_INSN (exclusive of those two). */
751 reg_used_between_p (const_rtx reg, const_rtx from_insn, const_rtx to_insn)
755 if (from_insn == to_insn)
758 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
760 && (reg_overlap_mentioned_p (reg, PATTERN (insn))
761 || (CALL_P (insn) && find_reg_fusage (insn, USE, reg))))
766 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
767 is entirely replaced by a new value and the only use is as a SET_DEST,
768 we do not consider it a reference. */
771 reg_referenced_p (const_rtx x, const_rtx body)
775 switch (GET_CODE (body))
778 if (reg_overlap_mentioned_p (x, SET_SRC (body)))
781 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
782 of a REG that occupies all of the REG, the insn references X if
783 it is mentioned in the destination. */
784 if (GET_CODE (SET_DEST (body)) != CC0
785 && GET_CODE (SET_DEST (body)) != PC
786 && !REG_P (SET_DEST (body))
787 && ! (GET_CODE (SET_DEST (body)) == SUBREG
788 && REG_P (SUBREG_REG (SET_DEST (body)))
789 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body))))
790 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
791 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body)))
792 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
793 && reg_overlap_mentioned_p (x, SET_DEST (body)))
798 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
799 if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i)))
806 return reg_overlap_mentioned_p (x, body);
809 return reg_overlap_mentioned_p (x, TRAP_CONDITION (body));
812 return reg_overlap_mentioned_p (x, XEXP (body, 0));
815 case UNSPEC_VOLATILE:
816 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
817 if (reg_overlap_mentioned_p (x, XVECEXP (body, 0, i)))
822 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
823 if (reg_referenced_p (x, XVECEXP (body, 0, i)))
828 if (MEM_P (XEXP (body, 0)))
829 if (reg_overlap_mentioned_p (x, XEXP (XEXP (body, 0), 0)))
834 if (reg_overlap_mentioned_p (x, COND_EXEC_TEST (body)))
836 return reg_referenced_p (x, COND_EXEC_CODE (body));
843 /* Nonzero if register REG is set or clobbered in an insn between
844 FROM_INSN and TO_INSN (exclusive of those two). */
847 reg_set_between_p (const_rtx reg, const_rtx from_insn, const_rtx to_insn)
851 if (from_insn == to_insn)
854 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
855 if (INSN_P (insn) && reg_set_p (reg, insn))
860 /* Internals of reg_set_between_p. */
862 reg_set_p (const_rtx reg, const_rtx insn)
864 /* We can be passed an insn or part of one. If we are passed an insn,
865 check if a side-effect of the insn clobbers REG. */
867 && (FIND_REG_INC_NOTE (insn, reg)
870 && REGNO (reg) < FIRST_PSEUDO_REGISTER
871 && overlaps_hard_reg_set_p (regs_invalidated_by_call,
872 GET_MODE (reg), REGNO (reg)))
874 || find_reg_fusage (insn, CLOBBER, reg)))))
877 return set_of (reg, insn) != NULL_RTX;
880 /* Similar to reg_set_between_p, but check all registers in X. Return 0
881 only if none of them are modified between START and END. Return 1 if
882 X contains a MEM; this routine does use memory aliasing. */
885 modified_between_p (const_rtx x, const_rtx start, const_rtx end)
887 const enum rtx_code code = GET_CODE (x);
911 if (modified_between_p (XEXP (x, 0), start, end))
913 if (MEM_READONLY_P (x))
915 for (insn = NEXT_INSN (start); insn != end; insn = NEXT_INSN (insn))
916 if (memory_modified_in_insn_p (x, insn))
922 return reg_set_between_p (x, start, end);
928 fmt = GET_RTX_FORMAT (code);
929 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
931 if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end))
934 else if (fmt[i] == 'E')
935 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
936 if (modified_between_p (XVECEXP (x, i, j), start, end))
943 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
944 of them are modified in INSN. Return 1 if X contains a MEM; this routine
945 does use memory aliasing. */
948 modified_in_p (const_rtx x, const_rtx insn)
950 const enum rtx_code code = GET_CODE (x);
970 if (modified_in_p (XEXP (x, 0), insn))
972 if (MEM_READONLY_P (x))
974 if (memory_modified_in_insn_p (x, insn))
980 return reg_set_p (x, insn);
986 fmt = GET_RTX_FORMAT (code);
987 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
989 if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn))
992 else if (fmt[i] == 'E')
993 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
994 if (modified_in_p (XVECEXP (x, i, j), insn))
1001 /* Helper function for set_of. */
1009 set_of_1 (rtx x, const_rtx pat, void *data1)
1011 struct set_of_data *const data = (struct set_of_data *) (data1);
1012 if (rtx_equal_p (x, data->pat)
1013 || (!MEM_P (x) && reg_overlap_mentioned_p (data->pat, x)))
1017 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
1018 (either directly or via STRICT_LOW_PART and similar modifiers). */
1020 set_of (const_rtx pat, const_rtx insn)
1022 struct set_of_data data;
1023 data.found = NULL_RTX;
1025 note_stores (INSN_P (insn) ? PATTERN (insn) : insn, set_of_1, &data);
1029 /* Given an INSN, return a SET expression if this insn has only a single SET.
1030 It may also have CLOBBERs, USEs, or SET whose output
1031 will not be used, which we ignore. */
1034 single_set_2 (const_rtx insn, const_rtx pat)
1037 int set_verified = 1;
1040 if (GET_CODE (pat) == PARALLEL)
1042 for (i = 0; i < XVECLEN (pat, 0); i++)
1044 rtx sub = XVECEXP (pat, 0, i);
1045 switch (GET_CODE (sub))
1052 /* We can consider insns having multiple sets, where all
1053 but one are dead as single set insns. In common case
1054 only single set is present in the pattern so we want
1055 to avoid checking for REG_UNUSED notes unless necessary.
1057 When we reach set first time, we just expect this is
1058 the single set we are looking for and only when more
1059 sets are found in the insn, we check them. */
1062 if (find_reg_note (insn, REG_UNUSED, SET_DEST (set))
1063 && !side_effects_p (set))
1069 set = sub, set_verified = 0;
1070 else if (!find_reg_note (insn, REG_UNUSED, SET_DEST (sub))
1071 || side_effects_p (sub))
1083 /* Given an INSN, return nonzero if it has more than one SET, else return
1087 multiple_sets (const_rtx insn)
1092 /* INSN must be an insn. */
1093 if (! INSN_P (insn))
1096 /* Only a PARALLEL can have multiple SETs. */
1097 if (GET_CODE (PATTERN (insn)) == PARALLEL)
1099 for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1100 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
1102 /* If we have already found a SET, then return now. */
1110 /* Either zero or one SET. */
1114 /* Return nonzero if the destination of SET equals the source
1115 and there are no side effects. */
1118 set_noop_p (const_rtx set)
1120 rtx src = SET_SRC (set);
1121 rtx dst = SET_DEST (set);
1123 if (dst == pc_rtx && src == pc_rtx)
1126 if (MEM_P (dst) && MEM_P (src))
1127 return rtx_equal_p (dst, src) && !side_effects_p (dst);
1129 if (GET_CODE (dst) == ZERO_EXTRACT)
1130 return rtx_equal_p (XEXP (dst, 0), src)
1131 && ! BYTES_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx
1132 && !side_effects_p (src);
1134 if (GET_CODE (dst) == STRICT_LOW_PART)
1135 dst = XEXP (dst, 0);
1137 if (GET_CODE (src) == SUBREG && GET_CODE (dst) == SUBREG)
1139 if (SUBREG_BYTE (src) != SUBREG_BYTE (dst))
1141 src = SUBREG_REG (src);
1142 dst = SUBREG_REG (dst);
1145 return (REG_P (src) && REG_P (dst)
1146 && REGNO (src) == REGNO (dst));
1149 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1153 noop_move_p (const_rtx insn)
1155 rtx pat = PATTERN (insn);
1157 if (INSN_CODE (insn) == NOOP_MOVE_INSN_CODE)
1160 /* Insns carrying these notes are useful later on. */
1161 if (find_reg_note (insn, REG_EQUAL, NULL_RTX))
1164 if (GET_CODE (pat) == SET && set_noop_p (pat))
1167 if (GET_CODE (pat) == PARALLEL)
1170 /* If nothing but SETs of registers to themselves,
1171 this insn can also be deleted. */
1172 for (i = 0; i < XVECLEN (pat, 0); i++)
1174 rtx tem = XVECEXP (pat, 0, i);
1176 if (GET_CODE (tem) == USE
1177 || GET_CODE (tem) == CLOBBER)
1180 if (GET_CODE (tem) != SET || ! set_noop_p (tem))
1190 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1191 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1192 If the object was modified, if we hit a partial assignment to X, or hit a
1193 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1194 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1198 find_last_value (rtx x, rtx *pinsn, rtx valid_to, int allow_hwreg)
1202 for (p = PREV_INSN (*pinsn); p && !LABEL_P (p);
1206 rtx set = single_set (p);
1207 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
1209 if (set && rtx_equal_p (x, SET_DEST (set)))
1211 rtx src = SET_SRC (set);
1213 if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
1214 src = XEXP (note, 0);
1216 if ((valid_to == NULL_RTX
1217 || ! modified_between_p (src, PREV_INSN (p), valid_to))
1218 /* Reject hard registers because we don't usually want
1219 to use them; we'd rather use a pseudo. */
1221 && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg))
1228 /* If set in non-simple way, we don't have a value. */
1229 if (reg_set_p (x, p))
1236 /* Return nonzero if register in range [REGNO, ENDREGNO)
1237 appears either explicitly or implicitly in X
1238 other than being stored into.
1240 References contained within the substructure at LOC do not count.
1241 LOC may be zero, meaning don't ignore anything. */
1244 refers_to_regno_p (unsigned int regno, unsigned int endregno, const_rtx x,
1248 unsigned int x_regno;
1253 /* The contents of a REG_NONNEG note is always zero, so we must come here
1254 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1258 code = GET_CODE (x);
1263 x_regno = REGNO (x);
1265 /* If we modifying the stack, frame, or argument pointer, it will
1266 clobber a virtual register. In fact, we could be more precise,
1267 but it isn't worth it. */
1268 if ((x_regno == STACK_POINTER_REGNUM
1269 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1270 || x_regno == ARG_POINTER_REGNUM
1272 || x_regno == FRAME_POINTER_REGNUM)
1273 && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER)
1276 return endregno > x_regno && regno < END_REGNO (x);
1279 /* If this is a SUBREG of a hard reg, we can see exactly which
1280 registers are being modified. Otherwise, handle normally. */
1281 if (REG_P (SUBREG_REG (x))
1282 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
1284 unsigned int inner_regno = subreg_regno (x);
1285 unsigned int inner_endregno
1286 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
1287 ? subreg_nregs (x) : 1);
1289 return endregno > inner_regno && regno < inner_endregno;
1295 if (&SET_DEST (x) != loc
1296 /* Note setting a SUBREG counts as referring to the REG it is in for
1297 a pseudo but not for hard registers since we can
1298 treat each word individually. */
1299 && ((GET_CODE (SET_DEST (x)) == SUBREG
1300 && loc != &SUBREG_REG (SET_DEST (x))
1301 && REG_P (SUBREG_REG (SET_DEST (x)))
1302 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
1303 && refers_to_regno_p (regno, endregno,
1304 SUBREG_REG (SET_DEST (x)), loc))
1305 || (!REG_P (SET_DEST (x))
1306 && refers_to_regno_p (regno, endregno, SET_DEST (x), loc))))
1309 if (code == CLOBBER || loc == &SET_SRC (x))
1318 /* X does not match, so try its subexpressions. */
1320 fmt = GET_RTX_FORMAT (code);
1321 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1323 if (fmt[i] == 'e' && loc != &XEXP (x, i))
1331 if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc))
1334 else if (fmt[i] == 'E')
1337 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1338 if (loc != &XVECEXP (x, i, j)
1339 && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc))
1346 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1347 we check if any register number in X conflicts with the relevant register
1348 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1349 contains a MEM (we don't bother checking for memory addresses that can't
1350 conflict because we expect this to be a rare case. */
1353 reg_overlap_mentioned_p (const_rtx x, const_rtx in)
1355 unsigned int regno, endregno;
1357 /* If either argument is a constant, then modifying X can not
1358 affect IN. Here we look at IN, we can profitably combine
1359 CONSTANT_P (x) with the switch statement below. */
1360 if (CONSTANT_P (in))
1364 switch (GET_CODE (x))
1366 case STRICT_LOW_PART:
1369 /* Overly conservative. */
1374 regno = REGNO (SUBREG_REG (x));
1375 if (regno < FIRST_PSEUDO_REGISTER)
1376 regno = subreg_regno (x);
1377 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
1378 ? subreg_nregs (x) : 1);
1383 endregno = END_REGNO (x);
1385 return refers_to_regno_p (regno, endregno, in, (rtx*) 0);
1395 fmt = GET_RTX_FORMAT (GET_CODE (in));
1396 for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--)
1399 if (reg_overlap_mentioned_p (x, XEXP (in, i)))
1402 else if (fmt[i] == 'E')
1405 for (j = XVECLEN (in, i) - 1; j >= 0; --j)
1406 if (reg_overlap_mentioned_p (x, XVECEXP (in, i, j)))
1416 return reg_mentioned_p (x, in);
1422 /* If any register in here refers to it we return true. */
1423 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1424 if (XEXP (XVECEXP (x, 0, i), 0) != 0
1425 && reg_overlap_mentioned_p (XEXP (XVECEXP (x, 0, i), 0), in))
1431 gcc_assert (CONSTANT_P (x));
1436 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1437 (X would be the pattern of an insn). DATA is an arbitrary pointer,
1438 ignored by note_stores, but passed to FUN.
1440 FUN receives three arguments:
1441 1. the REG, MEM, CC0 or PC being stored in or clobbered,
1442 2. the SET or CLOBBER rtx that does the store,
1443 3. the pointer DATA provided to note_stores.
1445 If the item being stored in or clobbered is a SUBREG of a hard register,
1446 the SUBREG will be passed. */
1449 note_stores (const_rtx x, void (*fun) (rtx, const_rtx, void *), void *data)
1453 if (GET_CODE (x) == COND_EXEC)
1454 x = COND_EXEC_CODE (x);
1456 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1458 rtx dest = SET_DEST (x);
1460 while ((GET_CODE (dest) == SUBREG
1461 && (!REG_P (SUBREG_REG (dest))
1462 || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER))
1463 || GET_CODE (dest) == ZERO_EXTRACT
1464 || GET_CODE (dest) == STRICT_LOW_PART)
1465 dest = XEXP (dest, 0);
1467 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1468 each of whose first operand is a register. */
1469 if (GET_CODE (dest) == PARALLEL)
1471 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1472 if (XEXP (XVECEXP (dest, 0, i), 0) != 0)
1473 (*fun) (XEXP (XVECEXP (dest, 0, i), 0), x, data);
1476 (*fun) (dest, x, data);
1479 else if (GET_CODE (x) == PARALLEL)
1480 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1481 note_stores (XVECEXP (x, 0, i), fun, data);
1484 /* Like notes_stores, but call FUN for each expression that is being
1485 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1486 FUN for each expression, not any interior subexpressions. FUN receives a
1487 pointer to the expression and the DATA passed to this function.
1489 Note that this is not quite the same test as that done in reg_referenced_p
1490 since that considers something as being referenced if it is being
1491 partially set, while we do not. */
1494 note_uses (rtx *pbody, void (*fun) (rtx *, void *), void *data)
1499 switch (GET_CODE (body))
1502 (*fun) (&COND_EXEC_TEST (body), data);
1503 note_uses (&COND_EXEC_CODE (body), fun, data);
1507 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
1508 note_uses (&XVECEXP (body, 0, i), fun, data);
1512 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
1513 note_uses (&PATTERN (XVECEXP (body, 0, i)), fun, data);
1517 (*fun) (&XEXP (body, 0), data);
1521 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
1522 (*fun) (&ASM_OPERANDS_INPUT (body, i), data);
1526 (*fun) (&TRAP_CONDITION (body), data);
1530 (*fun) (&XEXP (body, 0), data);
1534 case UNSPEC_VOLATILE:
1535 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
1536 (*fun) (&XVECEXP (body, 0, i), data);
1540 if (MEM_P (XEXP (body, 0)))
1541 (*fun) (&XEXP (XEXP (body, 0), 0), data);
1546 rtx dest = SET_DEST (body);
1548 /* For sets we replace everything in source plus registers in memory
1549 expression in store and operands of a ZERO_EXTRACT. */
1550 (*fun) (&SET_SRC (body), data);
1552 if (GET_CODE (dest) == ZERO_EXTRACT)
1554 (*fun) (&XEXP (dest, 1), data);
1555 (*fun) (&XEXP (dest, 2), data);
1558 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART)
1559 dest = XEXP (dest, 0);
1562 (*fun) (&XEXP (dest, 0), data);
1567 /* All the other possibilities never store. */
1568 (*fun) (pbody, data);
1573 /* Return nonzero if X's old contents don't survive after INSN.
1574 This will be true if X is (cc0) or if X is a register and
1575 X dies in INSN or because INSN entirely sets X.
1577 "Entirely set" means set directly and not through a SUBREG, or
1578 ZERO_EXTRACT, so no trace of the old contents remains.
1579 Likewise, REG_INC does not count.
1581 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1582 but for this use that makes no difference, since regs don't overlap
1583 during their lifetimes. Therefore, this function may be used
1584 at any time after deaths have been computed.
1586 If REG is a hard reg that occupies multiple machine registers, this
1587 function will only return 1 if each of those registers will be replaced
1591 dead_or_set_p (const_rtx insn, const_rtx x)
1593 unsigned int regno, end_regno;
1596 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1597 if (GET_CODE (x) == CC0)
1600 gcc_assert (REG_P (x));
1603 end_regno = END_REGNO (x);
1604 for (i = regno; i < end_regno; i++)
1605 if (! dead_or_set_regno_p (insn, i))
1611 /* Return TRUE iff DEST is a register or subreg of a register and
1612 doesn't change the number of words of the inner register, and any
1613 part of the register is TEST_REGNO. */
1616 covers_regno_no_parallel_p (const_rtx dest, unsigned int test_regno)
1618 unsigned int regno, endregno;
1620 if (GET_CODE (dest) == SUBREG
1621 && (((GET_MODE_SIZE (GET_MODE (dest))
1622 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1623 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1624 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1625 dest = SUBREG_REG (dest);
1630 regno = REGNO (dest);
1631 endregno = END_REGNO (dest);
1632 return (test_regno >= regno && test_regno < endregno);
1635 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1636 any member matches the covers_regno_no_parallel_p criteria. */
1639 covers_regno_p (const_rtx dest, unsigned int test_regno)
1641 if (GET_CODE (dest) == PARALLEL)
1643 /* Some targets place small structures in registers for return
1644 values of functions, and those registers are wrapped in
1645 PARALLELs that we may see as the destination of a SET. */
1648 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1650 rtx inner = XEXP (XVECEXP (dest, 0, i), 0);
1651 if (inner != NULL_RTX
1652 && covers_regno_no_parallel_p (inner, test_regno))
1659 return covers_regno_no_parallel_p (dest, test_regno);
1662 /* Utility function for dead_or_set_p to check an individual register. */
1665 dead_or_set_regno_p (const_rtx insn, unsigned int test_regno)
1669 /* See if there is a death note for something that includes TEST_REGNO. */
1670 if (find_regno_note (insn, REG_DEAD, test_regno))
1674 && find_regno_fusage (insn, CLOBBER, test_regno))
1677 pattern = PATTERN (insn);
1679 if (GET_CODE (pattern) == COND_EXEC)
1680 pattern = COND_EXEC_CODE (pattern);
1682 if (GET_CODE (pattern) == SET)
1683 return covers_regno_p (SET_DEST (pattern), test_regno);
1684 else if (GET_CODE (pattern) == PARALLEL)
1688 for (i = XVECLEN (pattern, 0) - 1; i >= 0; i--)
1690 rtx body = XVECEXP (pattern, 0, i);
1692 if (GET_CODE (body) == COND_EXEC)
1693 body = COND_EXEC_CODE (body);
1695 if ((GET_CODE (body) == SET || GET_CODE (body) == CLOBBER)
1696 && covers_regno_p (SET_DEST (body), test_regno))
1704 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1705 If DATUM is nonzero, look for one whose datum is DATUM. */
1708 find_reg_note (const_rtx insn, enum reg_note kind, const_rtx datum)
1714 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1715 if (! INSN_P (insn))
1719 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1720 if (REG_NOTE_KIND (link) == kind)
1725 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1726 if (REG_NOTE_KIND (link) == kind && datum == XEXP (link, 0))
1731 /* Return the reg-note of kind KIND in insn INSN which applies to register
1732 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1733 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1734 it might be the case that the note overlaps REGNO. */
1737 find_regno_note (const_rtx insn, enum reg_note kind, unsigned int regno)
1741 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1742 if (! INSN_P (insn))
1745 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1746 if (REG_NOTE_KIND (link) == kind
1747 /* Verify that it is a register, so that scratch and MEM won't cause a
1749 && REG_P (XEXP (link, 0))
1750 && REGNO (XEXP (link, 0)) <= regno
1751 && END_REGNO (XEXP (link, 0)) > regno)
1756 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1760 find_reg_equal_equiv_note (const_rtx insn)
1767 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1768 if (REG_NOTE_KIND (link) == REG_EQUAL
1769 || REG_NOTE_KIND (link) == REG_EQUIV)
1771 /* FIXME: We should never have REG_EQUAL/REG_EQUIV notes on
1772 insns that have multiple sets. Checking single_set to
1773 make sure of this is not the proper check, as explained
1774 in the comment in set_unique_reg_note.
1776 This should be changed into an assert. */
1777 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
1784 /* Check whether INSN is a single_set whose source is known to be
1785 equivalent to a constant. Return that constant if so, otherwise
1789 find_constant_src (const_rtx insn)
1793 set = single_set (insn);
1796 x = avoid_constant_pool_reference (SET_SRC (set));
1801 note = find_reg_equal_equiv_note (insn);
1802 if (note && CONSTANT_P (XEXP (note, 0)))
1803 return XEXP (note, 0);
1808 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1809 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1812 find_reg_fusage (const_rtx insn, enum rtx_code code, const_rtx datum)
1814 /* If it's not a CALL_INSN, it can't possibly have a
1815 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1825 for (link = CALL_INSN_FUNCTION_USAGE (insn);
1827 link = XEXP (link, 1))
1828 if (GET_CODE (XEXP (link, 0)) == code
1829 && rtx_equal_p (datum, XEXP (XEXP (link, 0), 0)))
1834 unsigned int regno = REGNO (datum);
1836 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1837 to pseudo registers, so don't bother checking. */
1839 if (regno < FIRST_PSEUDO_REGISTER)
1841 unsigned int end_regno = END_HARD_REGNO (datum);
1844 for (i = regno; i < end_regno; i++)
1845 if (find_regno_fusage (insn, code, i))
1853 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1854 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1857 find_regno_fusage (const_rtx insn, enum rtx_code code, unsigned int regno)
1861 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1862 to pseudo registers, so don't bother checking. */
1864 if (regno >= FIRST_PSEUDO_REGISTER
1868 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1872 if (GET_CODE (op = XEXP (link, 0)) == code
1873 && REG_P (reg = XEXP (op, 0))
1874 && REGNO (reg) <= regno
1875 && END_HARD_REGNO (reg) > regno)
1883 /* Add register note with kind KIND and datum DATUM to INSN. */
1886 add_reg_note (rtx insn, enum reg_note kind, rtx datum)
1894 case REG_LABEL_TARGET:
1895 case REG_LABEL_OPERAND:
1896 /* These types of register notes use an INSN_LIST rather than an
1897 EXPR_LIST, so that copying is done right and dumps look
1899 note = alloc_INSN_LIST (datum, REG_NOTES (insn));
1900 PUT_REG_NOTE_KIND (note, kind);
1904 note = alloc_EXPR_LIST (kind, datum, REG_NOTES (insn));
1908 REG_NOTES (insn) = note;
1911 /* Remove register note NOTE from the REG_NOTES of INSN. */
1914 remove_note (rtx insn, const_rtx note)
1918 if (note == NULL_RTX)
1921 if (REG_NOTES (insn) == note)
1922 REG_NOTES (insn) = XEXP (note, 1);
1924 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1925 if (XEXP (link, 1) == note)
1927 XEXP (link, 1) = XEXP (note, 1);
1931 switch (REG_NOTE_KIND (note))
1935 df_notes_rescan (insn);
1942 /* Remove REG_EQUAL and/or REG_EQUIV notes if INSN has such notes. */
1945 remove_reg_equal_equiv_notes (rtx insn)
1949 loc = ®_NOTES (insn);
1952 enum reg_note kind = REG_NOTE_KIND (*loc);
1953 if (kind == REG_EQUAL || kind == REG_EQUIV)
1954 *loc = XEXP (*loc, 1);
1956 loc = &XEXP (*loc, 1);
1960 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1961 return 1 if it is found. A simple equality test is used to determine if
1965 in_expr_list_p (const_rtx listp, const_rtx node)
1969 for (x = listp; x; x = XEXP (x, 1))
1970 if (node == XEXP (x, 0))
1976 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1977 remove that entry from the list if it is found.
1979 A simple equality test is used to determine if NODE matches. */
1982 remove_node_from_expr_list (const_rtx node, rtx *listp)
1985 rtx prev = NULL_RTX;
1989 if (node == XEXP (temp, 0))
1991 /* Splice the node out of the list. */
1993 XEXP (prev, 1) = XEXP (temp, 1);
1995 *listp = XEXP (temp, 1);
2001 temp = XEXP (temp, 1);
2005 /* Nonzero if X contains any volatile instructions. These are instructions
2006 which may cause unpredictable machine state instructions, and thus no
2007 instructions should be moved or combined across them. This includes
2008 only volatile asms and UNSPEC_VOLATILE instructions. */
2011 volatile_insn_p (const_rtx x)
2013 const RTX_CODE code = GET_CODE (x);
2034 case UNSPEC_VOLATILE:
2035 /* case TRAP_IF: This isn't clear yet. */
2040 if (MEM_VOLATILE_P (x))
2047 /* Recursively scan the operands of this expression. */
2050 const char *const fmt = GET_RTX_FORMAT (code);
2053 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2057 if (volatile_insn_p (XEXP (x, i)))
2060 else if (fmt[i] == 'E')
2063 for (j = 0; j < XVECLEN (x, i); j++)
2064 if (volatile_insn_p (XVECEXP (x, i, j)))
2072 /* Nonzero if X contains any volatile memory references
2073 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
2076 volatile_refs_p (const_rtx x)
2078 const RTX_CODE code = GET_CODE (x);
2097 case UNSPEC_VOLATILE:
2103 if (MEM_VOLATILE_P (x))
2110 /* Recursively scan the operands of this expression. */
2113 const char *const fmt = GET_RTX_FORMAT (code);
2116 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2120 if (volatile_refs_p (XEXP (x, i)))
2123 else if (fmt[i] == 'E')
2126 for (j = 0; j < XVECLEN (x, i); j++)
2127 if (volatile_refs_p (XVECEXP (x, i, j)))
2135 /* Similar to above, except that it also rejects register pre- and post-
2139 side_effects_p (const_rtx x)
2141 const RTX_CODE code = GET_CODE (x);
2160 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2161 when some combination can't be done. If we see one, don't think
2162 that we can simplify the expression. */
2163 return (GET_MODE (x) != VOIDmode);
2172 case UNSPEC_VOLATILE:
2173 /* case TRAP_IF: This isn't clear yet. */
2179 if (MEM_VOLATILE_P (x))
2186 /* Recursively scan the operands of this expression. */
2189 const char *fmt = GET_RTX_FORMAT (code);
2192 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2196 if (side_effects_p (XEXP (x, i)))
2199 else if (fmt[i] == 'E')
2202 for (j = 0; j < XVECLEN (x, i); j++)
2203 if (side_effects_p (XVECEXP (x, i, j)))
2211 /* Return nonzero if evaluating rtx X might cause a trap.
2212 FLAGS controls how to consider MEMs. A nonzero means the context
2213 of the access may have changed from the original, such that the
2214 address may have become invalid. */
2217 may_trap_p_1 (const_rtx x, unsigned flags)
2223 /* We make no distinction currently, but this function is part of
2224 the internal target-hooks ABI so we keep the parameter as
2225 "unsigned flags". */
2226 bool code_changed = flags != 0;
2230 code = GET_CODE (x);
2233 /* Handle these cases quickly. */
2248 case UNSPEC_VOLATILE:
2249 return targetm.unspec_may_trap_p (x, flags);
2256 return MEM_VOLATILE_P (x);
2258 /* Memory ref can trap unless it's a static var or a stack slot. */
2260 if (/* MEM_NOTRAP_P only relates to the actual position of the memory
2261 reference; moving it out of context such as when moving code
2262 when optimizing, might cause its address to become invalid. */
2264 || !MEM_NOTRAP_P (x))
2266 HOST_WIDE_INT size = MEM_SIZE (x) ? INTVAL (MEM_SIZE (x)) : 0;
2267 return rtx_addr_can_trap_p_1 (XEXP (x, 0), 0, size,
2268 GET_MODE (x), code_changed);
2273 /* Division by a non-constant might trap. */
2278 if (HONOR_SNANS (GET_MODE (x)))
2280 if (SCALAR_FLOAT_MODE_P (GET_MODE (x)))
2281 return flag_trapping_math;
2282 if (!CONSTANT_P (XEXP (x, 1)) || (XEXP (x, 1) == const0_rtx))
2287 /* An EXPR_LIST is used to represent a function call. This
2288 certainly may trap. */
2297 /* Some floating point comparisons may trap. */
2298 if (!flag_trapping_math)
2300 /* ??? There is no machine independent way to check for tests that trap
2301 when COMPARE is used, though many targets do make this distinction.
2302 For instance, sparc uses CCFPE for compares which generate exceptions
2303 and CCFP for compares which do not generate exceptions. */
2304 if (HONOR_NANS (GET_MODE (x)))
2306 /* But often the compare has some CC mode, so check operand
2308 if (HONOR_NANS (GET_MODE (XEXP (x, 0)))
2309 || HONOR_NANS (GET_MODE (XEXP (x, 1))))
2315 if (HONOR_SNANS (GET_MODE (x)))
2317 /* Often comparison is CC mode, so check operand modes. */
2318 if (HONOR_SNANS (GET_MODE (XEXP (x, 0)))
2319 || HONOR_SNANS (GET_MODE (XEXP (x, 1))))
2324 /* Conversion of floating point might trap. */
2325 if (flag_trapping_math && HONOR_NANS (GET_MODE (XEXP (x, 0))))
2332 /* These operations don't trap even with floating point. */
2336 /* Any floating arithmetic may trap. */
2337 if (SCALAR_FLOAT_MODE_P (GET_MODE (x))
2338 && flag_trapping_math)
2342 fmt = GET_RTX_FORMAT (code);
2343 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2347 if (may_trap_p_1 (XEXP (x, i), flags))
2350 else if (fmt[i] == 'E')
2353 for (j = 0; j < XVECLEN (x, i); j++)
2354 if (may_trap_p_1 (XVECEXP (x, i, j), flags))
2361 /* Return nonzero if evaluating rtx X might cause a trap. */
2364 may_trap_p (const_rtx x)
2366 return may_trap_p_1 (x, 0);
2369 /* Same as above, but additionally return nonzero if evaluating rtx X might
2370 cause a fault. We define a fault for the purpose of this function as a
2371 erroneous execution condition that cannot be encountered during the normal
2372 execution of a valid program; the typical example is an unaligned memory
2373 access on a strict alignment machine. The compiler guarantees that it
2374 doesn't generate code that will fault from a valid program, but this
2375 guarantee doesn't mean anything for individual instructions. Consider
2376 the following example:
2378 struct S { int d; union { char *cp; int *ip; }; };
2380 int foo(struct S *s)
2388 on a strict alignment machine. In a valid program, foo will never be
2389 invoked on a structure for which d is equal to 1 and the underlying
2390 unique field of the union not aligned on a 4-byte boundary, but the
2391 expression *s->ip might cause a fault if considered individually.
2393 At the RTL level, potentially problematic expressions will almost always
2394 verify may_trap_p; for example, the above dereference can be emitted as
2395 (mem:SI (reg:P)) and this expression is may_trap_p for a generic register.
2396 However, suppose that foo is inlined in a caller that causes s->cp to
2397 point to a local character variable and guarantees that s->d is not set
2398 to 1; foo may have been effectively translated into pseudo-RTL as:
2401 (set (reg:SI) (mem:SI (%fp - 7)))
2403 (set (reg:QI) (mem:QI (%fp - 7)))
2405 Now (mem:SI (%fp - 7)) is considered as not may_trap_p since it is a
2406 memory reference to a stack slot, but it will certainly cause a fault
2407 on a strict alignment machine. */
2410 may_trap_or_fault_p (const_rtx x)
2412 return may_trap_p_1 (x, 1);
2415 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2416 i.e., an inequality. */
2419 inequality_comparisons_p (const_rtx x)
2423 const enum rtx_code code = GET_CODE (x);
2454 len = GET_RTX_LENGTH (code);
2455 fmt = GET_RTX_FORMAT (code);
2457 for (i = 0; i < len; i++)
2461 if (inequality_comparisons_p (XEXP (x, i)))
2464 else if (fmt[i] == 'E')
2467 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2468 if (inequality_comparisons_p (XVECEXP (x, i, j)))
2476 /* Replace any occurrence of FROM in X with TO. The function does
2477 not enter into CONST_DOUBLE for the replace.
2479 Note that copying is not done so X must not be shared unless all copies
2480 are to be modified. */
2483 replace_rtx (rtx x, rtx from, rtx to)
2488 /* The following prevents loops occurrence when we change MEM in
2489 CONST_DOUBLE onto the same CONST_DOUBLE. */
2490 if (x != 0 && GET_CODE (x) == CONST_DOUBLE)
2496 /* Allow this function to make replacements in EXPR_LISTs. */
2500 if (GET_CODE (x) == SUBREG)
2502 rtx new_rtx = replace_rtx (SUBREG_REG (x), from, to);
2504 if (GET_CODE (new_rtx) == CONST_INT)
2506 x = simplify_subreg (GET_MODE (x), new_rtx,
2507 GET_MODE (SUBREG_REG (x)),
2512 SUBREG_REG (x) = new_rtx;
2516 else if (GET_CODE (x) == ZERO_EXTEND)
2518 rtx new_rtx = replace_rtx (XEXP (x, 0), from, to);
2520 if (GET_CODE (new_rtx) == CONST_INT)
2522 x = simplify_unary_operation (ZERO_EXTEND, GET_MODE (x),
2523 new_rtx, GET_MODE (XEXP (x, 0)));
2527 XEXP (x, 0) = new_rtx;
2532 fmt = GET_RTX_FORMAT (GET_CODE (x));
2533 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2536 XEXP (x, i) = replace_rtx (XEXP (x, i), from, to);
2537 else if (fmt[i] == 'E')
2538 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2539 XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to);
2545 /* Replace occurrences of the old label in *X with the new one.
2546 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2549 replace_label (rtx *x, void *data)
2552 rtx old_label = ((replace_label_data *) data)->r1;
2553 rtx new_label = ((replace_label_data *) data)->r2;
2554 bool update_label_nuses = ((replace_label_data *) data)->update_label_nuses;
2559 if (GET_CODE (l) == SYMBOL_REF
2560 && CONSTANT_POOL_ADDRESS_P (l))
2562 rtx c = get_pool_constant (l);
2563 if (rtx_referenced_p (old_label, c))
2566 replace_label_data *d = (replace_label_data *) data;
2568 /* Create a copy of constant C; replace the label inside
2569 but do not update LABEL_NUSES because uses in constant pool
2571 new_c = copy_rtx (c);
2572 d->update_label_nuses = false;
2573 for_each_rtx (&new_c, replace_label, data);
2574 d->update_label_nuses = update_label_nuses;
2576 /* Add the new constant NEW_C to constant pool and replace
2577 the old reference to constant by new reference. */
2578 new_l = XEXP (force_const_mem (get_pool_mode (l), new_c), 0);
2579 *x = replace_rtx (l, l, new_l);
2584 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2585 field. This is not handled by for_each_rtx because it doesn't
2586 handle unprinted ('0') fields. */
2587 if (JUMP_P (l) && JUMP_LABEL (l) == old_label)
2588 JUMP_LABEL (l) = new_label;
2590 if ((GET_CODE (l) == LABEL_REF
2591 || GET_CODE (l) == INSN_LIST)
2592 && XEXP (l, 0) == old_label)
2594 XEXP (l, 0) = new_label;
2595 if (update_label_nuses)
2597 ++LABEL_NUSES (new_label);
2598 --LABEL_NUSES (old_label);
2606 /* When *BODY is equal to X or X is directly referenced by *BODY
2607 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2608 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2611 rtx_referenced_p_1 (rtx *body, void *x)
2615 if (*body == NULL_RTX)
2616 return y == NULL_RTX;
2618 /* Return true if a label_ref *BODY refers to label Y. */
2619 if (GET_CODE (*body) == LABEL_REF && LABEL_P (y))
2620 return XEXP (*body, 0) == y;
2622 /* If *BODY is a reference to pool constant traverse the constant. */
2623 if (GET_CODE (*body) == SYMBOL_REF
2624 && CONSTANT_POOL_ADDRESS_P (*body))
2625 return rtx_referenced_p (y, get_pool_constant (*body));
2627 /* By default, compare the RTL expressions. */
2628 return rtx_equal_p (*body, y);
2631 /* Return true if X is referenced in BODY. */
2634 rtx_referenced_p (rtx x, rtx body)
2636 return for_each_rtx (&body, rtx_referenced_p_1, x);
2639 /* If INSN is a tablejump return true and store the label (before jump table) to
2640 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2643 tablejump_p (const_rtx insn, rtx *labelp, rtx *tablep)
2648 && (label = JUMP_LABEL (insn)) != NULL_RTX
2649 && (table = next_active_insn (label)) != NULL_RTX
2651 && (GET_CODE (PATTERN (table)) == ADDR_VEC
2652 || GET_CODE (PATTERN (table)) == ADDR_DIFF_VEC))
2663 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2664 constant that is not in the constant pool and not in the condition
2665 of an IF_THEN_ELSE. */
2668 computed_jump_p_1 (const_rtx x)
2670 const enum rtx_code code = GET_CODE (x);
2690 return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
2691 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)));
2694 return (computed_jump_p_1 (XEXP (x, 1))
2695 || computed_jump_p_1 (XEXP (x, 2)));
2701 fmt = GET_RTX_FORMAT (code);
2702 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2705 && computed_jump_p_1 (XEXP (x, i)))
2708 else if (fmt[i] == 'E')
2709 for (j = 0; j < XVECLEN (x, i); j++)
2710 if (computed_jump_p_1 (XVECEXP (x, i, j)))
2717 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2719 Tablejumps and casesi insns are not considered indirect jumps;
2720 we can recognize them by a (use (label_ref)). */
2723 computed_jump_p (const_rtx insn)
2728 rtx pat = PATTERN (insn);
2730 /* If we have a JUMP_LABEL set, we're not a computed jump. */
2731 if (JUMP_LABEL (insn) != NULL)
2734 if (GET_CODE (pat) == PARALLEL)
2736 int len = XVECLEN (pat, 0);
2737 int has_use_labelref = 0;
2739 for (i = len - 1; i >= 0; i--)
2740 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
2741 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
2743 has_use_labelref = 1;
2745 if (! has_use_labelref)
2746 for (i = len - 1; i >= 0; i--)
2747 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
2748 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
2749 && computed_jump_p_1 (SET_SRC (XVECEXP (pat, 0, i))))
2752 else if (GET_CODE (pat) == SET
2753 && SET_DEST (pat) == pc_rtx
2754 && computed_jump_p_1 (SET_SRC (pat)))
2760 /* Optimized loop of for_each_rtx, trying to avoid useless recursive
2761 calls. Processes the subexpressions of EXP and passes them to F. */
2763 for_each_rtx_1 (rtx exp, int n, rtx_function f, void *data)
2766 const char *format = GET_RTX_FORMAT (GET_CODE (exp));
2769 for (; format[n] != '\0'; n++)
2776 result = (*f) (x, data);
2778 /* Do not traverse sub-expressions. */
2780 else if (result != 0)
2781 /* Stop the traversal. */
2785 /* There are no sub-expressions. */
2788 i = non_rtx_starting_operands[GET_CODE (*x)];
2791 result = for_each_rtx_1 (*x, i, f, data);
2799 if (XVEC (exp, n) == 0)
2801 for (j = 0; j < XVECLEN (exp, n); ++j)
2804 x = &XVECEXP (exp, n, j);
2805 result = (*f) (x, data);
2807 /* Do not traverse sub-expressions. */
2809 else if (result != 0)
2810 /* Stop the traversal. */
2814 /* There are no sub-expressions. */
2817 i = non_rtx_starting_operands[GET_CODE (*x)];
2820 result = for_each_rtx_1 (*x, i, f, data);
2828 /* Nothing to do. */
2836 /* Traverse X via depth-first search, calling F for each
2837 sub-expression (including X itself). F is also passed the DATA.
2838 If F returns -1, do not traverse sub-expressions, but continue
2839 traversing the rest of the tree. If F ever returns any other
2840 nonzero value, stop the traversal, and return the value returned
2841 by F. Otherwise, return 0. This function does not traverse inside
2842 tree structure that contains RTX_EXPRs, or into sub-expressions
2843 whose format code is `0' since it is not known whether or not those
2844 codes are actually RTL.
2846 This routine is very general, and could (should?) be used to
2847 implement many of the other routines in this file. */
2850 for_each_rtx (rtx *x, rtx_function f, void *data)
2856 result = (*f) (x, data);
2858 /* Do not traverse sub-expressions. */
2860 else if (result != 0)
2861 /* Stop the traversal. */
2865 /* There are no sub-expressions. */
2868 i = non_rtx_starting_operands[GET_CODE (*x)];
2872 return for_each_rtx_1 (*x, i, f, data);
2876 /* Searches X for any reference to REGNO, returning the rtx of the
2877 reference found if any. Otherwise, returns NULL_RTX. */
2880 regno_use_in (unsigned int regno, rtx x)
2886 if (REG_P (x) && REGNO (x) == regno)
2889 fmt = GET_RTX_FORMAT (GET_CODE (x));
2890 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2894 if ((tem = regno_use_in (regno, XEXP (x, i))))
2897 else if (fmt[i] == 'E')
2898 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2899 if ((tem = regno_use_in (regno , XVECEXP (x, i, j))))
2906 /* Return a value indicating whether OP, an operand of a commutative
2907 operation, is preferred as the first or second operand. The higher
2908 the value, the stronger the preference for being the first operand.
2909 We use negative values to indicate a preference for the first operand
2910 and positive values for the second operand. */
2913 commutative_operand_precedence (rtx op)
2915 enum rtx_code code = GET_CODE (op);
2917 /* Constants always come the second operand. Prefer "nice" constants. */
2918 if (code == CONST_INT)
2920 if (code == CONST_DOUBLE)
2922 if (code == CONST_FIXED)
2924 op = avoid_constant_pool_reference (op);
2925 code = GET_CODE (op);
2927 switch (GET_RTX_CLASS (code))
2930 if (code == CONST_INT)
2932 if (code == CONST_DOUBLE)
2934 if (code == CONST_FIXED)
2939 /* SUBREGs of objects should come second. */
2940 if (code == SUBREG && OBJECT_P (SUBREG_REG (op)))
2945 /* Complex expressions should be the first, so decrease priority
2946 of objects. Prefer pointer objects over non pointer objects. */
2947 if ((REG_P (op) && REG_POINTER (op))
2948 || (MEM_P (op) && MEM_POINTER (op)))
2952 case RTX_COMM_ARITH:
2953 /* Prefer operands that are themselves commutative to be first.
2954 This helps to make things linear. In particular,
2955 (and (and (reg) (reg)) (not (reg))) is canonical. */
2959 /* If only one operand is a binary expression, it will be the first
2960 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
2961 is canonical, although it will usually be further simplified. */
2965 /* Then prefer NEG and NOT. */
2966 if (code == NEG || code == NOT)
2974 /* Return 1 iff it is necessary to swap operands of commutative operation
2975 in order to canonicalize expression. */
2978 swap_commutative_operands_p (rtx x, rtx y)
2980 return (commutative_operand_precedence (x)
2981 < commutative_operand_precedence (y));
2984 /* Return 1 if X is an autoincrement side effect and the register is
2985 not the stack pointer. */
2987 auto_inc_p (const_rtx x)
2989 switch (GET_CODE (x))
2997 /* There are no REG_INC notes for SP. */
2998 if (XEXP (x, 0) != stack_pointer_rtx)
3006 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
3008 loc_mentioned_in_p (rtx *loc, const_rtx in)
3017 code = GET_CODE (in);
3018 fmt = GET_RTX_FORMAT (code);
3019 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3023 if (loc == &XEXP (in, i) || loc_mentioned_in_p (loc, XEXP (in, i)))
3026 else if (fmt[i] == 'E')
3027 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
3028 if (loc == &XVECEXP (in, i, j)
3029 || loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
3035 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
3036 and SUBREG_BYTE, return the bit offset where the subreg begins
3037 (counting from the least significant bit of the operand). */
3040 subreg_lsb_1 (enum machine_mode outer_mode,
3041 enum machine_mode inner_mode,
3042 unsigned int subreg_byte)
3044 unsigned int bitpos;
3048 /* A paradoxical subreg begins at bit position 0. */
3049 if (GET_MODE_BITSIZE (outer_mode) > GET_MODE_BITSIZE (inner_mode))
3052 if (WORDS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
3053 /* If the subreg crosses a word boundary ensure that
3054 it also begins and ends on a word boundary. */
3055 gcc_assert (!((subreg_byte % UNITS_PER_WORD
3056 + GET_MODE_SIZE (outer_mode)) > UNITS_PER_WORD
3057 && (subreg_byte % UNITS_PER_WORD
3058 || GET_MODE_SIZE (outer_mode) % UNITS_PER_WORD)));
3060 if (WORDS_BIG_ENDIAN)
3061 word = (GET_MODE_SIZE (inner_mode)
3062 - (subreg_byte + GET_MODE_SIZE (outer_mode))) / UNITS_PER_WORD;
3064 word = subreg_byte / UNITS_PER_WORD;
3065 bitpos = word * BITS_PER_WORD;
3067 if (BYTES_BIG_ENDIAN)
3068 byte = (GET_MODE_SIZE (inner_mode)
3069 - (subreg_byte + GET_MODE_SIZE (outer_mode))) % UNITS_PER_WORD;
3071 byte = subreg_byte % UNITS_PER_WORD;
3072 bitpos += byte * BITS_PER_UNIT;
3077 /* Given a subreg X, return the bit offset where the subreg begins
3078 (counting from the least significant bit of the reg). */
3081 subreg_lsb (const_rtx x)
3083 return subreg_lsb_1 (GET_MODE (x), GET_MODE (SUBREG_REG (x)),
3087 /* Fill in information about a subreg of a hard register.
3088 xregno - A regno of an inner hard subreg_reg (or what will become one).
3089 xmode - The mode of xregno.
3090 offset - The byte offset.
3091 ymode - The mode of a top level SUBREG (or what may become one).
3092 info - Pointer to structure to fill in. */
3094 subreg_get_info (unsigned int xregno, enum machine_mode xmode,
3095 unsigned int offset, enum machine_mode ymode,
3096 struct subreg_info *info)
3098 int nregs_xmode, nregs_ymode;
3099 int mode_multiple, nregs_multiple;
3100 int offset_adj, y_offset, y_offset_adj;
3101 int regsize_xmode, regsize_ymode;
3104 gcc_assert (xregno < FIRST_PSEUDO_REGISTER);
3108 /* If there are holes in a non-scalar mode in registers, we expect
3109 that it is made up of its units concatenated together. */
3110 if (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode))
3112 enum machine_mode xmode_unit;
3114 nregs_xmode = HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode);
3115 if (GET_MODE_INNER (xmode) == VOIDmode)
3118 xmode_unit = GET_MODE_INNER (xmode);
3119 gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode_unit));
3120 gcc_assert (nregs_xmode
3121 == (GET_MODE_NUNITS (xmode)
3122 * HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode_unit)));
3123 gcc_assert (hard_regno_nregs[xregno][xmode]
3124 == (hard_regno_nregs[xregno][xmode_unit]
3125 * GET_MODE_NUNITS (xmode)));
3127 /* You can only ask for a SUBREG of a value with holes in the middle
3128 if you don't cross the holes. (Such a SUBREG should be done by
3129 picking a different register class, or doing it in memory if
3130 necessary.) An example of a value with holes is XCmode on 32-bit
3131 x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
3132 3 for each part, but in memory it's two 128-bit parts.
3133 Padding is assumed to be at the end (not necessarily the 'high part')
3135 if ((offset / GET_MODE_SIZE (xmode_unit) + 1
3136 < GET_MODE_NUNITS (xmode))
3137 && (offset / GET_MODE_SIZE (xmode_unit)
3138 != ((offset + GET_MODE_SIZE (ymode) - 1)
3139 / GET_MODE_SIZE (xmode_unit))))
3141 info->representable_p = false;
3146 nregs_xmode = hard_regno_nregs[xregno][xmode];
3148 nregs_ymode = hard_regno_nregs[xregno][ymode];
3150 /* Paradoxical subregs are otherwise valid. */
3153 && GET_MODE_SIZE (ymode) > GET_MODE_SIZE (xmode))
3155 info->representable_p = true;
3156 /* If this is a big endian paradoxical subreg, which uses more
3157 actual hard registers than the original register, we must
3158 return a negative offset so that we find the proper highpart
3160 if (GET_MODE_SIZE (ymode) > UNITS_PER_WORD
3161 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN)
3162 info->offset = nregs_xmode - nregs_ymode;
3165 info->nregs = nregs_ymode;
3169 /* If registers store different numbers of bits in the different
3170 modes, we cannot generally form this subreg. */
3171 if (!HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode)
3172 && !HARD_REGNO_NREGS_HAS_PADDING (xregno, ymode)
3173 && (GET_MODE_SIZE (xmode) % nregs_xmode) == 0
3174 && (GET_MODE_SIZE (ymode) % nregs_ymode) == 0)
3176 regsize_xmode = GET_MODE_SIZE (xmode) / nregs_xmode;
3177 regsize_ymode = GET_MODE_SIZE (ymode) / nregs_ymode;
3178 if (!rknown && regsize_xmode > regsize_ymode && nregs_ymode > 1)
3180 info->representable_p = false;
3182 = (GET_MODE_SIZE (ymode) + regsize_xmode - 1) / regsize_xmode;
3183 info->offset = offset / regsize_xmode;
3186 if (!rknown && regsize_ymode > regsize_xmode && nregs_xmode > 1)
3188 info->representable_p = false;
3190 = (GET_MODE_SIZE (ymode) + regsize_xmode - 1) / regsize_xmode;
3191 info->offset = offset / regsize_xmode;
3196 /* Lowpart subregs are otherwise valid. */
3197 if (!rknown && offset == subreg_lowpart_offset (ymode, xmode))
3199 info->representable_p = true;
3202 if (offset == 0 || nregs_xmode == nregs_ymode)
3205 info->nregs = nregs_ymode;
3210 /* This should always pass, otherwise we don't know how to verify
3211 the constraint. These conditions may be relaxed but
3212 subreg_regno_offset would need to be redesigned. */
3213 gcc_assert ((GET_MODE_SIZE (xmode) % GET_MODE_SIZE (ymode)) == 0);
3214 gcc_assert ((nregs_xmode % nregs_ymode) == 0);
3216 /* The XMODE value can be seen as a vector of NREGS_XMODE
3217 values. The subreg must represent a lowpart of given field.
3218 Compute what field it is. */
3219 offset_adj = offset;
3220 offset_adj -= subreg_lowpart_offset (ymode,
3221 mode_for_size (GET_MODE_BITSIZE (xmode)
3225 /* Size of ymode must not be greater than the size of xmode. */
3226 mode_multiple = GET_MODE_SIZE (xmode) / GET_MODE_SIZE (ymode);
3227 gcc_assert (mode_multiple != 0);
3229 y_offset = offset / GET_MODE_SIZE (ymode);
3230 y_offset_adj = offset_adj / GET_MODE_SIZE (ymode);
3231 nregs_multiple = nregs_xmode / nregs_ymode;
3233 gcc_assert ((offset_adj % GET_MODE_SIZE (ymode)) == 0);
3234 gcc_assert ((mode_multiple % nregs_multiple) == 0);
3238 info->representable_p = (!(y_offset_adj % (mode_multiple / nregs_multiple)));
3241 info->offset = (y_offset / (mode_multiple / nregs_multiple)) * nregs_ymode;
3242 info->nregs = nregs_ymode;
3245 /* This function returns the regno offset of a subreg expression.
3246 xregno - A regno of an inner hard subreg_reg (or what will become one).
3247 xmode - The mode of xregno.
3248 offset - The byte offset.
3249 ymode - The mode of a top level SUBREG (or what may become one).
3250 RETURN - The regno offset which would be used. */
3252 subreg_regno_offset (unsigned int xregno, enum machine_mode xmode,
3253 unsigned int offset, enum machine_mode ymode)
3255 struct subreg_info info;
3256 subreg_get_info (xregno, xmode, offset, ymode, &info);
3260 /* This function returns true when the offset is representable via
3261 subreg_offset in the given regno.
3262 xregno - A regno of an inner hard subreg_reg (or what will become one).
3263 xmode - The mode of xregno.
3264 offset - The byte offset.
3265 ymode - The mode of a top level SUBREG (or what may become one).
3266 RETURN - Whether the offset is representable. */
3268 subreg_offset_representable_p (unsigned int xregno, enum machine_mode xmode,
3269 unsigned int offset, enum machine_mode ymode)
3271 struct subreg_info info;
3272 subreg_get_info (xregno, xmode, offset, ymode, &info);
3273 return info.representable_p;
3276 /* Return the number of a YMODE register to which
3278 (subreg:YMODE (reg:XMODE XREGNO) OFFSET)
3280 can be simplified. Return -1 if the subreg can't be simplified.
3282 XREGNO is a hard register number. */
3285 simplify_subreg_regno (unsigned int xregno, enum machine_mode xmode,
3286 unsigned int offset, enum machine_mode ymode)
3288 struct subreg_info info;
3289 unsigned int yregno;
3291 #ifdef CANNOT_CHANGE_MODE_CLASS
3292 /* Give the backend a chance to disallow the mode change. */
3293 if (GET_MODE_CLASS (xmode) != MODE_COMPLEX_INT
3294 && GET_MODE_CLASS (xmode) != MODE_COMPLEX_FLOAT
3295 && REG_CANNOT_CHANGE_MODE_P (xregno, xmode, ymode))
3299 /* We shouldn't simplify stack-related registers. */
3300 if ((!reload_completed || frame_pointer_needed)
3301 && (xregno == FRAME_POINTER_REGNUM
3302 || xregno == HARD_FRAME_POINTER_REGNUM))
3305 if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3306 && xregno == ARG_POINTER_REGNUM)
3309 if (xregno == STACK_POINTER_REGNUM)
3312 /* Try to get the register offset. */
3313 subreg_get_info (xregno, xmode, offset, ymode, &info);
3314 if (!info.representable_p)
3317 /* Make sure that the offsetted register value is in range. */
3318 yregno = xregno + info.offset;
3319 if (!HARD_REGISTER_NUM_P (yregno))
3322 /* See whether (reg:YMODE YREGNO) is valid.
3324 ??? We allow invalid registers if (reg:XMODE XREGNO) is also invalid.
3325 This is a kludge to work around how float/complex arguments are passed
3326 on 32-bit SPARC and should be fixed. */
3327 if (!HARD_REGNO_MODE_OK (yregno, ymode)
3328 && HARD_REGNO_MODE_OK (xregno, xmode))
3331 return (int) yregno;
3334 /* Return the final regno that a subreg expression refers to. */
3336 subreg_regno (const_rtx x)
3339 rtx subreg = SUBREG_REG (x);
3340 int regno = REGNO (subreg);
3342 ret = regno + subreg_regno_offset (regno,
3350 /* Return the number of registers that a subreg expression refers
3353 subreg_nregs (const_rtx x)
3355 return subreg_nregs_with_regno (REGNO (SUBREG_REG (x)), x);
3358 /* Return the number of registers that a subreg REG with REGNO
3359 expression refers to. This is a copy of the rtlanal.c:subreg_nregs
3360 changed so that the regno can be passed in. */
3363 subreg_nregs_with_regno (unsigned int regno, const_rtx x)
3365 struct subreg_info info;
3366 rtx subreg = SUBREG_REG (x);
3368 subreg_get_info (regno, GET_MODE (subreg), SUBREG_BYTE (x), GET_MODE (x),
3374 struct parms_set_data
3380 /* Helper function for noticing stores to parameter registers. */
3382 parms_set (rtx x, const_rtx pat ATTRIBUTE_UNUSED, void *data)
3384 struct parms_set_data *const d = (struct parms_set_data *) data;
3385 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3386 && TEST_HARD_REG_BIT (d->regs, REGNO (x)))
3388 CLEAR_HARD_REG_BIT (d->regs, REGNO (x));
3393 /* Look backward for first parameter to be loaded.
3394 Note that loads of all parameters will not necessarily be
3395 found if CSE has eliminated some of them (e.g., an argument
3396 to the outer function is passed down as a parameter).
3397 Do not skip BOUNDARY. */
3399 find_first_parameter_load (rtx call_insn, rtx boundary)
3401 struct parms_set_data parm;
3402 rtx p, before, first_set;
3404 /* Since different machines initialize their parameter registers
3405 in different orders, assume nothing. Collect the set of all
3406 parameter registers. */
3407 CLEAR_HARD_REG_SET (parm.regs);
3409 for (p = CALL_INSN_FUNCTION_USAGE (call_insn); p; p = XEXP (p, 1))
3410 if (GET_CODE (XEXP (p, 0)) == USE
3411 && REG_P (XEXP (XEXP (p, 0), 0)))
3413 gcc_assert (REGNO (XEXP (XEXP (p, 0), 0)) < FIRST_PSEUDO_REGISTER);
3415 /* We only care about registers which can hold function
3417 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p, 0), 0))))
3420 SET_HARD_REG_BIT (parm.regs, REGNO (XEXP (XEXP (p, 0), 0)));
3424 first_set = call_insn;
3426 /* Search backward for the first set of a register in this set. */
3427 while (parm.nregs && before != boundary)
3429 before = PREV_INSN (before);
3431 /* It is possible that some loads got CSEed from one call to
3432 another. Stop in that case. */
3433 if (CALL_P (before))
3436 /* Our caller needs either ensure that we will find all sets
3437 (in case code has not been optimized yet), or take care
3438 for possible labels in a way by setting boundary to preceding
3440 if (LABEL_P (before))
3442 gcc_assert (before == boundary);
3446 if (INSN_P (before))
3448 int nregs_old = parm.nregs;
3449 note_stores (PATTERN (before), parms_set, &parm);
3450 /* If we found something that did not set a parameter reg,
3451 we're done. Do not keep going, as that might result
3452 in hoisting an insn before the setting of a pseudo
3453 that is used by the hoisted insn. */
3454 if (nregs_old != parm.nregs)
3463 /* Return true if we should avoid inserting code between INSN and preceding
3464 call instruction. */
3467 keep_with_call_p (const_rtx insn)
3471 if (INSN_P (insn) && (set = single_set (insn)) != NULL)
3473 if (REG_P (SET_DEST (set))
3474 && REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
3475 && fixed_regs[REGNO (SET_DEST (set))]
3476 && general_operand (SET_SRC (set), VOIDmode))
3478 if (REG_P (SET_SRC (set))
3479 && FUNCTION_VALUE_REGNO_P (REGNO (SET_SRC (set)))
3480 && REG_P (SET_DEST (set))
3481 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
3483 /* There may be a stack pop just after the call and before the store
3484 of the return register. Search for the actual store when deciding
3485 if we can break or not. */
3486 if (SET_DEST (set) == stack_pointer_rtx)
3488 /* This CONST_CAST is okay because next_nonnote_insn just
3489 returns its argument and we assign it to a const_rtx
3491 const_rtx i2 = next_nonnote_insn (CONST_CAST_RTX(insn));
3492 if (i2 && keep_with_call_p (i2))
3499 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3500 to non-complex jumps. That is, direct unconditional, conditional,
3501 and tablejumps, but not computed jumps or returns. It also does
3502 not apply to the fallthru case of a conditional jump. */
3505 label_is_jump_target_p (const_rtx label, const_rtx jump_insn)
3507 rtx tmp = JUMP_LABEL (jump_insn);
3512 if (tablejump_p (jump_insn, NULL, &tmp))
3514 rtvec vec = XVEC (PATTERN (tmp),
3515 GET_CODE (PATTERN (tmp)) == ADDR_DIFF_VEC);
3516 int i, veclen = GET_NUM_ELEM (vec);
3518 for (i = 0; i < veclen; ++i)
3519 if (XEXP (RTVEC_ELT (vec, i), 0) == label)
3523 if (find_reg_note (jump_insn, REG_LABEL_TARGET, label))
3530 /* Return an estimate of the cost of computing rtx X.
3531 One use is in cse, to decide which expression to keep in the hash table.
3532 Another is in rtl generation, to pick the cheapest way to multiply.
3533 Other uses like the latter are expected in the future.
3535 SPEED parameter specify whether costs optimized for speed or size should
3539 rtx_cost (rtx x, enum rtx_code outer_code ATTRIBUTE_UNUSED, bool speed)
3549 /* Compute the default costs of certain things.
3550 Note that targetm.rtx_costs can override the defaults. */
3552 code = GET_CODE (x);
3556 total = COSTS_N_INSNS (5);
3562 total = COSTS_N_INSNS (7);
3565 /* Used in combine.c as a marker. */
3569 total = COSTS_N_INSNS (1);
3579 /* If we can't tie these modes, make this expensive. The larger
3580 the mode, the more expensive it is. */
3581 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
3582 return COSTS_N_INSNS (2
3583 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
3587 if (targetm.rtx_costs (x, code, outer_code, &total, speed))
3592 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3593 which is already in total. */
3595 fmt = GET_RTX_FORMAT (code);
3596 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3598 total += rtx_cost (XEXP (x, i), code, speed);
3599 else if (fmt[i] == 'E')
3600 for (j = 0; j < XVECLEN (x, i); j++)
3601 total += rtx_cost (XVECEXP (x, i, j), code, speed);
3606 /* Return cost of address expression X.
3607 Expect that X is properly formed address reference.
3609 SPEED parameter specify whether costs optimized for speed or size should
3613 address_cost (rtx x, enum machine_mode mode, bool speed)
3615 /* We may be asked for cost of various unusual addresses, such as operands
3616 of push instruction. It is not worthwhile to complicate writing
3617 of the target hook by such cases. */
3619 if (!memory_address_p (mode, x))
3622 return targetm.address_cost (x, speed);
3625 /* If the target doesn't override, compute the cost as with arithmetic. */
3628 default_address_cost (rtx x, bool speed)
3630 return rtx_cost (x, MEM, speed);
3634 unsigned HOST_WIDE_INT
3635 nonzero_bits (const_rtx x, enum machine_mode mode)
3637 return cached_nonzero_bits (x, mode, NULL_RTX, VOIDmode, 0);
3641 num_sign_bit_copies (const_rtx x, enum machine_mode mode)
3643 return cached_num_sign_bit_copies (x, mode, NULL_RTX, VOIDmode, 0);
3646 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3647 It avoids exponential behavior in nonzero_bits1 when X has
3648 identical subexpressions on the first or the second level. */
3650 static unsigned HOST_WIDE_INT
3651 cached_nonzero_bits (const_rtx x, enum machine_mode mode, const_rtx known_x,
3652 enum machine_mode known_mode,
3653 unsigned HOST_WIDE_INT known_ret)
3655 if (x == known_x && mode == known_mode)
3658 /* Try to find identical subexpressions. If found call
3659 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3660 precomputed value for the subexpression as KNOWN_RET. */
3662 if (ARITHMETIC_P (x))
3664 rtx x0 = XEXP (x, 0);
3665 rtx x1 = XEXP (x, 1);
3667 /* Check the first level. */
3669 return nonzero_bits1 (x, mode, x0, mode,
3670 cached_nonzero_bits (x0, mode, known_x,
3671 known_mode, known_ret));
3673 /* Check the second level. */
3674 if (ARITHMETIC_P (x0)
3675 && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
3676 return nonzero_bits1 (x, mode, x1, mode,
3677 cached_nonzero_bits (x1, mode, known_x,
3678 known_mode, known_ret));
3680 if (ARITHMETIC_P (x1)
3681 && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
3682 return nonzero_bits1 (x, mode, x0, mode,
3683 cached_nonzero_bits (x0, mode, known_x,
3684 known_mode, known_ret));
3687 return nonzero_bits1 (x, mode, known_x, known_mode, known_ret);
3690 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3691 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3692 is less useful. We can't allow both, because that results in exponential
3693 run time recursion. There is a nullstone testcase that triggered
3694 this. This macro avoids accidental uses of num_sign_bit_copies. */
3695 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3697 /* Given an expression, X, compute which bits in X can be nonzero.
3698 We don't care about bits outside of those defined in MODE.
3700 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3701 an arithmetic operation, we can do better. */
3703 static unsigned HOST_WIDE_INT
3704 nonzero_bits1 (const_rtx x, enum machine_mode mode, const_rtx known_x,
3705 enum machine_mode known_mode,
3706 unsigned HOST_WIDE_INT known_ret)
3708 unsigned HOST_WIDE_INT nonzero = GET_MODE_MASK (mode);
3709 unsigned HOST_WIDE_INT inner_nz;
3711 unsigned int mode_width = GET_MODE_BITSIZE (mode);
3713 /* For floating-point and vector values, assume all bits are needed. */
3714 if (FLOAT_MODE_P (GET_MODE (x)) || FLOAT_MODE_P (mode)
3715 || VECTOR_MODE_P (GET_MODE (x)) || VECTOR_MODE_P (mode))
3718 /* If X is wider than MODE, use its mode instead. */
3719 if (GET_MODE_BITSIZE (GET_MODE (x)) > mode_width)
3721 mode = GET_MODE (x);
3722 nonzero = GET_MODE_MASK (mode);
3723 mode_width = GET_MODE_BITSIZE (mode);
3726 if (mode_width > HOST_BITS_PER_WIDE_INT)
3727 /* Our only callers in this case look for single bit values. So
3728 just return the mode mask. Those tests will then be false. */
3731 #ifndef WORD_REGISTER_OPERATIONS
3732 /* If MODE is wider than X, but both are a single word for both the host
3733 and target machines, we can compute this from which bits of the
3734 object might be nonzero in its own mode, taking into account the fact
3735 that on many CISC machines, accessing an object in a wider mode
3736 causes the high-order bits to become undefined. So they are
3737 not known to be zero. */
3739 if (GET_MODE (x) != VOIDmode && GET_MODE (x) != mode
3740 && GET_MODE_BITSIZE (GET_MODE (x)) <= BITS_PER_WORD
3741 && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT
3742 && GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (GET_MODE (x)))
3744 nonzero &= cached_nonzero_bits (x, GET_MODE (x),
3745 known_x, known_mode, known_ret);
3746 nonzero |= GET_MODE_MASK (mode) & ~GET_MODE_MASK (GET_MODE (x));
3751 code = GET_CODE (x);
3755 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3756 /* If pointers extend unsigned and this is a pointer in Pmode, say that
3757 all the bits above ptr_mode are known to be zero. */
3758 if (POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode
3760 nonzero &= GET_MODE_MASK (ptr_mode);
3763 /* Include declared information about alignment of pointers. */
3764 /* ??? We don't properly preserve REG_POINTER changes across
3765 pointer-to-integer casts, so we can't trust it except for
3766 things that we know must be pointers. See execute/960116-1.c. */
3767 if ((x == stack_pointer_rtx
3768 || x == frame_pointer_rtx
3769 || x == arg_pointer_rtx)
3770 && REGNO_POINTER_ALIGN (REGNO (x)))
3772 unsigned HOST_WIDE_INT alignment
3773 = REGNO_POINTER_ALIGN (REGNO (x)) / BITS_PER_UNIT;
3775 #ifdef PUSH_ROUNDING
3776 /* If PUSH_ROUNDING is defined, it is possible for the
3777 stack to be momentarily aligned only to that amount,
3778 so we pick the least alignment. */
3779 if (x == stack_pointer_rtx && PUSH_ARGS)
3780 alignment = MIN ((unsigned HOST_WIDE_INT) PUSH_ROUNDING (1),
3784 nonzero &= ~(alignment - 1);
3788 unsigned HOST_WIDE_INT nonzero_for_hook = nonzero;
3789 rtx new_rtx = rtl_hooks.reg_nonzero_bits (x, mode, known_x,
3790 known_mode, known_ret,
3794 nonzero_for_hook &= cached_nonzero_bits (new_rtx, mode, known_x,
3795 known_mode, known_ret);
3797 return nonzero_for_hook;
3801 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
3802 /* If X is negative in MODE, sign-extend the value. */
3803 if (INTVAL (x) > 0 && mode_width < BITS_PER_WORD
3804 && 0 != (INTVAL (x) & ((HOST_WIDE_INT) 1 << (mode_width - 1))))
3805 return (INTVAL (x) | ((HOST_WIDE_INT) (-1) << mode_width));
3811 #ifdef LOAD_EXTEND_OP
3812 /* In many, if not most, RISC machines, reading a byte from memory
3813 zeros the rest of the register. Noticing that fact saves a lot
3814 of extra zero-extends. */
3815 if (LOAD_EXTEND_OP (GET_MODE (x)) == ZERO_EXTEND)
3816 nonzero &= GET_MODE_MASK (GET_MODE (x));
3821 case UNEQ: case LTGT:
3822 case GT: case GTU: case UNGT:
3823 case LT: case LTU: case UNLT:
3824 case GE: case GEU: case UNGE:
3825 case LE: case LEU: case UNLE:
3826 case UNORDERED: case ORDERED:
3827 /* If this produces an integer result, we know which bits are set.
3828 Code here used to clear bits outside the mode of X, but that is
3830 /* Mind that MODE is the mode the caller wants to look at this
3831 operation in, and not the actual operation mode. We can wind
3832 up with (subreg:DI (gt:V4HI x y)), and we don't have anything
3833 that describes the results of a vector compare. */
3834 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
3835 && mode_width <= HOST_BITS_PER_WIDE_INT)
3836 nonzero = STORE_FLAG_VALUE;
3841 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3842 and num_sign_bit_copies. */
3843 if (num_sign_bit_copies (XEXP (x, 0), GET_MODE (x))
3844 == GET_MODE_BITSIZE (GET_MODE (x)))
3848 if (GET_MODE_SIZE (GET_MODE (x)) < mode_width)
3849 nonzero |= (GET_MODE_MASK (mode) & ~GET_MODE_MASK (GET_MODE (x)));
3854 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3855 and num_sign_bit_copies. */
3856 if (num_sign_bit_copies (XEXP (x, 0), GET_MODE (x))
3857 == GET_MODE_BITSIZE (GET_MODE (x)))
3863 nonzero &= (cached_nonzero_bits (XEXP (x, 0), mode,
3864 known_x, known_mode, known_ret)
3865 & GET_MODE_MASK (mode));
3869 nonzero &= cached_nonzero_bits (XEXP (x, 0), mode,
3870 known_x, known_mode, known_ret);
3871 if (GET_MODE (XEXP (x, 0)) != VOIDmode)
3872 nonzero &= GET_MODE_MASK (GET_MODE (XEXP (x, 0)));
3876 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
3877 Otherwise, show all the bits in the outer mode but not the inner
3879 inner_nz = cached_nonzero_bits (XEXP (x, 0), mode,
3880 known_x, known_mode, known_ret);
3881 if (GET_MODE (XEXP (x, 0)) != VOIDmode)
3883 inner_nz &= GET_MODE_MASK (GET_MODE (XEXP (x, 0)));
3885 & (((HOST_WIDE_INT) 1
3886 << (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) - 1))))
3887 inner_nz |= (GET_MODE_MASK (mode)
3888 & ~GET_MODE_MASK (GET_MODE (XEXP (x, 0))));
3891 nonzero &= inner_nz;
3895 nonzero &= cached_nonzero_bits (XEXP (x, 0), mode,
3896 known_x, known_mode, known_ret)
3897 & cached_nonzero_bits (XEXP (x, 1), mode,
3898 known_x, known_mode, known_ret);
3902 case UMIN: case UMAX: case SMIN: case SMAX:
3904 unsigned HOST_WIDE_INT nonzero0 =
3905 cached_nonzero_bits (XEXP (x, 0), mode,
3906 known_x, known_mode, known_ret);
3908 /* Don't call nonzero_bits for the second time if it cannot change
3910 if ((nonzero & nonzero0) != nonzero)
3912 | cached_nonzero_bits (XEXP (x, 1), mode,
3913 known_x, known_mode, known_ret);
3917 case PLUS: case MINUS:
3919 case DIV: case UDIV:
3920 case MOD: case UMOD:
3921 /* We can apply the rules of arithmetic to compute the number of
3922 high- and low-order zero bits of these operations. We start by
3923 computing the width (position of the highest-order nonzero bit)
3924 and the number of low-order zero bits for each value. */
3926 unsigned HOST_WIDE_INT nz0 =
3927 cached_nonzero_bits (XEXP (x, 0), mode,
3928 known_x, known_mode, known_ret);
3929 unsigned HOST_WIDE_INT nz1 =
3930 cached_nonzero_bits (XEXP (x, 1), mode,
3931 known_x, known_mode, known_ret);
3932 int sign_index = GET_MODE_BITSIZE (GET_MODE (x)) - 1;
3933 int width0 = floor_log2 (nz0) + 1;
3934 int width1 = floor_log2 (nz1) + 1;
3935 int low0 = floor_log2 (nz0 & -nz0);
3936 int low1 = floor_log2 (nz1 & -nz1);
3937 HOST_WIDE_INT op0_maybe_minusp
3938 = (nz0 & ((HOST_WIDE_INT) 1 << sign_index));
3939 HOST_WIDE_INT op1_maybe_minusp
3940 = (nz1 & ((HOST_WIDE_INT) 1 << sign_index));
3941 unsigned int result_width = mode_width;
3947 result_width = MAX (width0, width1) + 1;
3948 result_low = MIN (low0, low1);
3951 result_low = MIN (low0, low1);
3954 result_width = width0 + width1;
3955 result_low = low0 + low1;
3960 if (! op0_maybe_minusp && ! op1_maybe_minusp)
3961 result_width = width0;
3966 result_width = width0;
3971 if (! op0_maybe_minusp && ! op1_maybe_minusp)
3972 result_width = MIN (width0, width1);
3973 result_low = MIN (low0, low1);
3978 result_width = MIN (width0, width1);
3979 result_low = MIN (low0, low1);
3985 if (result_width < mode_width)
3986 nonzero &= ((HOST_WIDE_INT) 1 << result_width) - 1;
3989 nonzero &= ~(((HOST_WIDE_INT) 1 << result_low) - 1);
3991 #ifdef POINTERS_EXTEND_UNSIGNED
3992 /* If pointers extend unsigned and this is an addition or subtraction
3993 to a pointer in Pmode, all the bits above ptr_mode are known to be
3995 if (POINTERS_EXTEND_UNSIGNED > 0 && GET_MODE (x) == Pmode
3996 && (code == PLUS || code == MINUS)
3997 && REG_P (XEXP (x, 0)) && REG_POINTER (XEXP (x, 0)))
3998 nonzero &= GET_MODE_MASK (ptr_mode);
4004 if (GET_CODE (XEXP (x, 1)) == CONST_INT
4005 && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT)
4006 nonzero &= ((HOST_WIDE_INT) 1 << INTVAL (XEXP (x, 1))) - 1;
4010 /* If this is a SUBREG formed for a promoted variable that has
4011 been zero-extended, we know that at least the high-order bits
4012 are zero, though others might be too. */
4014 if (SUBREG_PROMOTED_VAR_P (x) && SUBREG_PROMOTED_UNSIGNED_P (x) > 0)
4015 nonzero = GET_MODE_MASK (GET_MODE (x))
4016 & cached_nonzero_bits (SUBREG_REG (x), GET_MODE (x),
4017 known_x, known_mode, known_ret);
4019 /* If the inner mode is a single word for both the host and target
4020 machines, we can compute this from which bits of the inner
4021 object might be nonzero. */
4022 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) <= BITS_PER_WORD
4023 && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4024 <= HOST_BITS_PER_WIDE_INT))
4026 nonzero &= cached_nonzero_bits (SUBREG_REG (x), mode,
4027 known_x, known_mode, known_ret);
4029 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
4030 /* If this is a typical RISC machine, we only have to worry
4031 about the way loads are extended. */
4032 if ((LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND
4034 & (((unsigned HOST_WIDE_INT) 1
4035 << (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) - 1))))
4037 : LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) != ZERO_EXTEND)
4038 || !MEM_P (SUBREG_REG (x)))
4041 /* On many CISC machines, accessing an object in a wider mode
4042 causes the high-order bits to become undefined. So they are
4043 not known to be zero. */
4044 if (GET_MODE_SIZE (GET_MODE (x))
4045 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4046 nonzero |= (GET_MODE_MASK (GET_MODE (x))
4047 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (x))));
4056 /* The nonzero bits are in two classes: any bits within MODE
4057 that aren't in GET_MODE (x) are always significant. The rest of the
4058 nonzero bits are those that are significant in the operand of
4059 the shift when shifted the appropriate number of bits. This
4060 shows that high-order bits are cleared by the right shift and
4061 low-order bits by left shifts. */
4062 if (GET_CODE (XEXP (x, 1)) == CONST_INT
4063 && INTVAL (XEXP (x, 1)) >= 0
4064 && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT
4065 && INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (GET_MODE (x)))
4067 enum machine_mode inner_mode = GET_MODE (x);
4068 unsigned int width = GET_MODE_BITSIZE (inner_mode);
4069 int count = INTVAL (XEXP (x, 1));
4070 unsigned HOST_WIDE_INT mode_mask = GET_MODE_MASK (inner_mode);
4071 unsigned HOST_WIDE_INT op_nonzero =
4072 cached_nonzero_bits (XEXP (x, 0), mode,
4073 known_x, known_mode, known_ret);
4074 unsigned HOST_WIDE_INT inner = op_nonzero & mode_mask;
4075 unsigned HOST_WIDE_INT outer = 0;
4077 if (mode_width > width)
4078 outer = (op_nonzero & nonzero & ~mode_mask);
4080 if (code == LSHIFTRT)
4082 else if (code == ASHIFTRT)
4086 /* If the sign bit may have been nonzero before the shift, we
4087 need to mark all the places it could have been copied to
4088 by the shift as possibly nonzero. */
4089 if (inner & ((HOST_WIDE_INT) 1 << (width - 1 - count)))
4090 inner |= (((HOST_WIDE_INT) 1 << count) - 1) << (width - count);
4092 else if (code == ASHIFT)
4095 inner = ((inner << (count % width)
4096 | (inner >> (width - (count % width)))) & mode_mask);
4098 nonzero &= (outer | inner);
4104 /* This is at most the number of bits in the mode. */
4105 nonzero = ((HOST_WIDE_INT) 2 << (floor_log2 (mode_width))) - 1;
4109 /* If CLZ has a known value at zero, then the nonzero bits are
4110 that value, plus the number of bits in the mode minus one. */
4111 if (CLZ_DEFINED_VALUE_AT_ZERO (mode, nonzero))
4112 nonzero |= ((HOST_WIDE_INT) 1 << (floor_log2 (mode_width))) - 1;
4118 /* If CTZ has a known value at zero, then the nonzero bits are
4119 that value, plus the number of bits in the mode minus one. */
4120 if (CTZ_DEFINED_VALUE_AT_ZERO (mode, nonzero))
4121 nonzero |= ((HOST_WIDE_INT) 1 << (floor_log2 (mode_width))) - 1;
4132 unsigned HOST_WIDE_INT nonzero_true =
4133 cached_nonzero_bits (XEXP (x, 1), mode,
4134 known_x, known_mode, known_ret);
4136 /* Don't call nonzero_bits for the second time if it cannot change
4138 if ((nonzero & nonzero_true) != nonzero)
4139 nonzero &= nonzero_true
4140 | cached_nonzero_bits (XEXP (x, 2), mode,
4141 known_x, known_mode, known_ret);
4152 /* See the macro definition above. */
4153 #undef cached_num_sign_bit_copies
4156 /* The function cached_num_sign_bit_copies is a wrapper around
4157 num_sign_bit_copies1. It avoids exponential behavior in
4158 num_sign_bit_copies1 when X has identical subexpressions on the
4159 first or the second level. */
4162 cached_num_sign_bit_copies (const_rtx x, enum machine_mode mode, const_rtx known_x,
4163 enum machine_mode known_mode,
4164 unsigned int known_ret)
4166 if (x == known_x && mode == known_mode)
4169 /* Try to find identical subexpressions. If found call
4170 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
4171 the precomputed value for the subexpression as KNOWN_RET. */
4173 if (ARITHMETIC_P (x))
4175 rtx x0 = XEXP (x, 0);
4176 rtx x1 = XEXP (x, 1);
4178 /* Check the first level. */
4181 num_sign_bit_copies1 (x, mode, x0, mode,
4182 cached_num_sign_bit_copies (x0, mode, known_x,
4186 /* Check the second level. */
4187 if (ARITHMETIC_P (x0)
4188 && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
4190 num_sign_bit_copies1 (x, mode, x1, mode,
4191 cached_num_sign_bit_copies (x1, mode, known_x,
4195 if (ARITHMETIC_P (x1)
4196 && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
4198 num_sign_bit_copies1 (x, mode, x0, mode,
4199 cached_num_sign_bit_copies (x0, mode, known_x,
4204 return num_sign_bit_copies1 (x, mode, known_x, known_mode, known_ret);
4207 /* Return the number of bits at the high-order end of X that are known to
4208 be equal to the sign bit. X will be used in mode MODE; if MODE is
4209 VOIDmode, X will be used in its own mode. The returned value will always
4210 be between 1 and the number of bits in MODE. */
4213 num_sign_bit_copies1 (const_rtx x, enum machine_mode mode, const_rtx known_x,
4214 enum machine_mode known_mode,
4215 unsigned int known_ret)
4217 enum rtx_code code = GET_CODE (x);
4218 unsigned int bitwidth = GET_MODE_BITSIZE (mode);
4219 int num0, num1, result;
4220 unsigned HOST_WIDE_INT nonzero;
4222 /* If we weren't given a mode, use the mode of X. If the mode is still
4223 VOIDmode, we don't know anything. Likewise if one of the modes is
4226 if (mode == VOIDmode)
4227 mode = GET_MODE (x);
4229 if (mode == VOIDmode || FLOAT_MODE_P (mode) || FLOAT_MODE_P (GET_MODE (x))
4230 || VECTOR_MODE_P (GET_MODE (x)) || VECTOR_MODE_P (mode))
4233 /* For a smaller object, just ignore the high bits. */
4234 if (bitwidth < GET_MODE_BITSIZE (GET_MODE (x)))
4236 num0 = cached_num_sign_bit_copies (x, GET_MODE (x),
4237 known_x, known_mode, known_ret);
4239 num0 - (int) (GET_MODE_BITSIZE (GET_MODE (x)) - bitwidth));
4242 if (GET_MODE (x) != VOIDmode && bitwidth > GET_MODE_BITSIZE (GET_MODE (x)))
4244 #ifndef WORD_REGISTER_OPERATIONS
4245 /* If this machine does not do all register operations on the entire
4246 register and MODE is wider than the mode of X, we can say nothing
4247 at all about the high-order bits. */
4250 /* Likewise on machines that do, if the mode of the object is smaller
4251 than a word and loads of that size don't sign extend, we can say
4252 nothing about the high order bits. */
4253 if (GET_MODE_BITSIZE (GET_MODE (x)) < BITS_PER_WORD
4254 #ifdef LOAD_EXTEND_OP
4255 && LOAD_EXTEND_OP (GET_MODE (x)) != SIGN_EXTEND
4266 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4267 /* If pointers extend signed and this is a pointer in Pmode, say that
4268 all the bits above ptr_mode are known to be sign bit copies. */
4269 if (! POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode && mode == Pmode
4271 return GET_MODE_BITSIZE (Pmode) - GET_MODE_BITSIZE (ptr_mode) + 1;
4275 unsigned int copies_for_hook = 1, copies = 1;
4276 rtx new_rtx = rtl_hooks.reg_num_sign_bit_copies (x, mode, known_x,
4277 known_mode, known_ret,
4281 copies = cached_num_sign_bit_copies (new_rtx, mode, known_x,
4282 known_mode, known_ret);
4284 if (copies > 1 || copies_for_hook > 1)
4285 return MAX (copies, copies_for_hook);
4287 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4292 #ifdef LOAD_EXTEND_OP
4293 /* Some RISC machines sign-extend all loads of smaller than a word. */
4294 if (LOAD_EXTEND_OP (GET_MODE (x)) == SIGN_EXTEND)
4295 return MAX (1, ((int) bitwidth
4296 - (int) GET_MODE_BITSIZE (GET_MODE (x)) + 1));
4301 /* If the constant is negative, take its 1's complement and remask.
4302 Then see how many zero bits we have. */
4303 nonzero = INTVAL (x) & GET_MODE_MASK (mode);
4304 if (bitwidth <= HOST_BITS_PER_WIDE_INT
4305 && (nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4306 nonzero = (~nonzero) & GET_MODE_MASK (mode);
4308 return (nonzero == 0 ? bitwidth : bitwidth - floor_log2 (nonzero) - 1);
4311 /* If this is a SUBREG for a promoted object that is sign-extended
4312 and we are looking at it in a wider mode, we know that at least the
4313 high-order bits are known to be sign bit copies. */
4315 if (SUBREG_PROMOTED_VAR_P (x) && ! SUBREG_PROMOTED_UNSIGNED_P (x))
4317 num0 = cached_num_sign_bit_copies (SUBREG_REG (x), mode,
4318 known_x, known_mode, known_ret);
4319 return MAX ((int) bitwidth
4320 - (int) GET_MODE_BITSIZE (GET_MODE (x)) + 1,
4324 /* For a smaller object, just ignore the high bits. */
4325 if (bitwidth <= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))))
4327 num0 = cached_num_sign_bit_copies (SUBREG_REG (x), VOIDmode,
4328 known_x, known_mode, known_ret);
4329 return MAX (1, (num0
4330 - (int) (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4334 #ifdef WORD_REGISTER_OPERATIONS
4335 #ifdef LOAD_EXTEND_OP
4336 /* For paradoxical SUBREGs on machines where all register operations
4337 affect the entire register, just look inside. Note that we are
4338 passing MODE to the recursive call, so the number of sign bit copies
4339 will remain relative to that mode, not the inner mode. */
4341 /* This works only if loads sign extend. Otherwise, if we get a
4342 reload for the inner part, it may be loaded from the stack, and
4343 then we lose all sign bit copies that existed before the store
4346 if ((GET_MODE_SIZE (GET_MODE (x))
4347 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4348 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND
4349 && MEM_P (SUBREG_REG (x)))
4350 return cached_num_sign_bit_copies (SUBREG_REG (x), mode,
4351 known_x, known_mode, known_ret);
4357 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
4358 return MAX (1, (int) bitwidth - INTVAL (XEXP (x, 1)));
4362 return (bitwidth - GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
4363 + cached_num_sign_bit_copies (XEXP (x, 0), VOIDmode,
4364 known_x, known_mode, known_ret));
4367 /* For a smaller object, just ignore the high bits. */
4368 num0 = cached_num_sign_bit_copies (XEXP (x, 0), VOIDmode,
4369 known_x, known_mode, known_ret);
4370 return MAX (1, (num0 - (int) (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
4374 return cached_num_sign_bit_copies (XEXP (x, 0), mode,
4375 known_x, known_mode, known_ret);
4377 case ROTATE: case ROTATERT:
4378 /* If we are rotating left by a number of bits less than the number
4379 of sign bit copies, we can just subtract that amount from the
4381 if (GET_CODE (XEXP (x, 1)) == CONST_INT
4382 && INTVAL (XEXP (x, 1)) >= 0
4383 && INTVAL (XEXP (x, 1)) < (int) bitwidth)
4385 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4386 known_x, known_mode, known_ret);
4387 return MAX (1, num0 - (code == ROTATE ? INTVAL (XEXP (x, 1))
4388 : (int) bitwidth - INTVAL (XEXP (x, 1))));
4393 /* In general, this subtracts one sign bit copy. But if the value
4394 is known to be positive, the number of sign bit copies is the
4395 same as that of the input. Finally, if the input has just one bit
4396 that might be nonzero, all the bits are copies of the sign bit. */
4397 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4398 known_x, known_mode, known_ret);
4399 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4400 return num0 > 1 ? num0 - 1 : 1;
4402 nonzero = nonzero_bits (XEXP (x, 0), mode);
4407 && (((HOST_WIDE_INT) 1 << (bitwidth - 1)) & nonzero))
4412 case IOR: case AND: case XOR:
4413 case SMIN: case SMAX: case UMIN: case UMAX:
4414 /* Logical operations will preserve the number of sign-bit copies.
4415 MIN and MAX operations always return one of the operands. */
4416 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4417 known_x, known_mode, known_ret);
4418 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4419 known_x, known_mode, known_ret);
4421 /* If num1 is clearing some of the top bits then regardless of
4422 the other term, we are guaranteed to have at least that many
4423 high-order zero bits. */
4426 && bitwidth <= HOST_BITS_PER_WIDE_INT
4427 && GET_CODE (XEXP (x, 1)) == CONST_INT
4428 && !(INTVAL (XEXP (x, 1)) & ((HOST_WIDE_INT) 1 << (bitwidth - 1))))
4431 /* Similarly for IOR when setting high-order bits. */
4434 && bitwidth <= HOST_BITS_PER_WIDE_INT
4435 && GET_CODE (XEXP (x, 1)) == CONST_INT
4436 && (INTVAL (XEXP (x, 1)) & ((HOST_WIDE_INT) 1 << (bitwidth - 1))))
4439 return MIN (num0, num1);
4441 case PLUS: case MINUS:
4442 /* For addition and subtraction, we can have a 1-bit carry. However,
4443 if we are subtracting 1 from a positive number, there will not
4444 be such a carry. Furthermore, if the positive number is known to
4445 be 0 or 1, we know the result is either -1 or 0. */
4447 if (code == PLUS && XEXP (x, 1) == constm1_rtx
4448 && bitwidth <= HOST_BITS_PER_WIDE_INT)
4450 nonzero = nonzero_bits (XEXP (x, 0), mode);
4451 if ((((HOST_WIDE_INT) 1 << (bitwidth - 1)) & nonzero) == 0)
4452 return (nonzero == 1 || nonzero == 0 ? bitwidth
4453 : bitwidth - floor_log2 (nonzero) - 1);
4456 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4457 known_x, known_mode, known_ret);
4458 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4459 known_x, known_mode, known_ret);
4460 result = MAX (1, MIN (num0, num1) - 1);
4462 #ifdef POINTERS_EXTEND_UNSIGNED
4463 /* If pointers extend signed and this is an addition or subtraction
4464 to a pointer in Pmode, all the bits above ptr_mode are known to be
4466 if (! POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode
4467 && (code == PLUS || code == MINUS)
4468 && REG_P (XEXP (x, 0)) && REG_POINTER (XEXP (x, 0)))
4469 result = MAX ((int) (GET_MODE_BITSIZE (Pmode)
4470 - GET_MODE_BITSIZE (ptr_mode) + 1),
4476 /* The number of bits of the product is the sum of the number of
4477 bits of both terms. However, unless one of the terms if known
4478 to be positive, we must allow for an additional bit since negating
4479 a negative number can remove one sign bit copy. */
4481 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4482 known_x, known_mode, known_ret);
4483 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4484 known_x, known_mode, known_ret);
4486 result = bitwidth - (bitwidth - num0) - (bitwidth - num1);
4488 && (bitwidth > HOST_BITS_PER_WIDE_INT
4489 || (((nonzero_bits (XEXP (x, 0), mode)
4490 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4491 && ((nonzero_bits (XEXP (x, 1), mode)
4492 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))))
4495 return MAX (1, result);
4498 /* The result must be <= the first operand. If the first operand
4499 has the high bit set, we know nothing about the number of sign
4501 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4503 else if ((nonzero_bits (XEXP (x, 0), mode)
4504 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4507 return cached_num_sign_bit_copies (XEXP (x, 0), mode,
4508 known_x, known_mode, known_ret);
4511 /* The result must be <= the second operand. */
4512 return cached_num_sign_bit_copies (XEXP (x, 1), mode,
4513 known_x, known_mode, known_ret);
4516 /* Similar to unsigned division, except that we have to worry about
4517 the case where the divisor is negative, in which case we have
4519 result = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4520 known_x, known_mode, known_ret);
4522 && (bitwidth > HOST_BITS_PER_WIDE_INT
4523 || (nonzero_bits (XEXP (x, 1), mode)
4524 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))
4530 result = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4531 known_x, known_mode, known_ret);
4533 && (bitwidth > HOST_BITS_PER_WIDE_INT
4534 || (nonzero_bits (XEXP (x, 1), mode)
4535 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))
4541 /* Shifts by a constant add to the number of bits equal to the
4543 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4544 known_x, known_mode, known_ret);
4545 if (GET_CODE (XEXP (x, 1)) == CONST_INT
4546 && INTVAL (XEXP (x, 1)) > 0
4547 && INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (GET_MODE (x)))
4548 num0 = MIN ((int) bitwidth, num0 + INTVAL (XEXP (x, 1)));
4553 /* Left shifts destroy copies. */
4554 if (GET_CODE (XEXP (x, 1)) != CONST_INT
4555 || INTVAL (XEXP (x, 1)) < 0
4556 || INTVAL (XEXP (x, 1)) >= (int) bitwidth
4557 || INTVAL (XEXP (x, 1)) >= GET_MODE_BITSIZE (GET_MODE (x)))
4560 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4561 known_x, known_mode, known_ret);
4562 return MAX (1, num0 - INTVAL (XEXP (x, 1)));
4565 num0 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4566 known_x, known_mode, known_ret);
4567 num1 = cached_num_sign_bit_copies (XEXP (x, 2), mode,
4568 known_x, known_mode, known_ret);
4569 return MIN (num0, num1);
4571 case EQ: case NE: case GE: case GT: case LE: case LT:
4572 case UNEQ: case LTGT: case UNGE: case UNGT: case UNLE: case UNLT:
4573 case GEU: case GTU: case LEU: case LTU:
4574 case UNORDERED: case ORDERED:
4575 /* If the constant is negative, take its 1's complement and remask.
4576 Then see how many zero bits we have. */
4577 nonzero = STORE_FLAG_VALUE;
4578 if (bitwidth <= HOST_BITS_PER_WIDE_INT
4579 && (nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4580 nonzero = (~nonzero) & GET_MODE_MASK (mode);
4582 return (nonzero == 0 ? bitwidth : bitwidth - floor_log2 (nonzero) - 1);
4588 /* If we haven't been able to figure it out by one of the above rules,
4589 see if some of the high-order bits are known to be zero. If so,
4590 count those bits and return one less than that amount. If we can't
4591 safely compute the mask for this mode, always return BITWIDTH. */
4593 bitwidth = GET_MODE_BITSIZE (mode);
4594 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4597 nonzero = nonzero_bits (x, mode);
4598 return nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))
4599 ? 1 : bitwidth - floor_log2 (nonzero) - 1;
4602 /* Calculate the rtx_cost of a single instruction. A return value of
4603 zero indicates an instruction pattern without a known cost. */
4606 insn_rtx_cost (rtx pat, bool speed)
4611 /* Extract the single set rtx from the instruction pattern.
4612 We can't use single_set since we only have the pattern. */
4613 if (GET_CODE (pat) == SET)
4615 else if (GET_CODE (pat) == PARALLEL)
4618 for (i = 0; i < XVECLEN (pat, 0); i++)
4620 rtx x = XVECEXP (pat, 0, i);
4621 if (GET_CODE (x) == SET)
4634 cost = rtx_cost (SET_SRC (set), SET, speed);
4635 return cost > 0 ? cost : COSTS_N_INSNS (1);
4638 /* Given an insn INSN and condition COND, return the condition in a
4639 canonical form to simplify testing by callers. Specifically:
4641 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4642 (2) Both operands will be machine operands; (cc0) will have been replaced.
4643 (3) If an operand is a constant, it will be the second operand.
4644 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4645 for GE, GEU, and LEU.
4647 If the condition cannot be understood, or is an inequality floating-point
4648 comparison which needs to be reversed, 0 will be returned.
4650 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4652 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4653 insn used in locating the condition was found. If a replacement test
4654 of the condition is desired, it should be placed in front of that
4655 insn and we will be sure that the inputs are still valid.
4657 If WANT_REG is nonzero, we wish the condition to be relative to that
4658 register, if possible. Therefore, do not canonicalize the condition
4659 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4660 to be a compare to a CC mode register.
4662 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4666 canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
4667 rtx want_reg, int allow_cc_mode, int valid_at_insn_p)
4674 int reverse_code = 0;
4675 enum machine_mode mode;
4676 basic_block bb = BLOCK_FOR_INSN (insn);
4678 code = GET_CODE (cond);
4679 mode = GET_MODE (cond);
4680 op0 = XEXP (cond, 0);
4681 op1 = XEXP (cond, 1);
4684 code = reversed_comparison_code (cond, insn);
4685 if (code == UNKNOWN)
4691 /* If we are comparing a register with zero, see if the register is set
4692 in the previous insn to a COMPARE or a comparison operation. Perform
4693 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4696 while ((GET_RTX_CLASS (code) == RTX_COMPARE
4697 || GET_RTX_CLASS (code) == RTX_COMM_COMPARE)
4698 && op1 == CONST0_RTX (GET_MODE (op0))
4701 /* Set nonzero when we find something of interest. */
4705 /* If comparison with cc0, import actual comparison from compare
4709 if ((prev = prev_nonnote_insn (prev)) == 0
4710 || !NONJUMP_INSN_P (prev)
4711 || (set = single_set (prev)) == 0
4712 || SET_DEST (set) != cc0_rtx)
4715 op0 = SET_SRC (set);
4716 op1 = CONST0_RTX (GET_MODE (op0));
4722 /* If this is a COMPARE, pick up the two things being compared. */
4723 if (GET_CODE (op0) == COMPARE)
4725 op1 = XEXP (op0, 1);
4726 op0 = XEXP (op0, 0);
4729 else if (!REG_P (op0))
4732 /* Go back to the previous insn. Stop if it is not an INSN. We also
4733 stop if it isn't a single set or if it has a REG_INC note because
4734 we don't want to bother dealing with it. */
4736 if ((prev = prev_nonnote_insn (prev)) == 0
4737 || !NONJUMP_INSN_P (prev)
4738 || FIND_REG_INC_NOTE (prev, NULL_RTX)
4739 /* In cfglayout mode, there do not have to be labels at the
4740 beginning of a block, or jumps at the end, so the previous
4741 conditions would not stop us when we reach bb boundary. */
4742 || BLOCK_FOR_INSN (prev) != bb)
4745 set = set_of (op0, prev);
4748 && (GET_CODE (set) != SET
4749 || !rtx_equal_p (SET_DEST (set), op0)))
4752 /* If this is setting OP0, get what it sets it to if it looks
4756 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
4757 #ifdef FLOAT_STORE_FLAG_VALUE
4758 REAL_VALUE_TYPE fsfv;
4761 /* ??? We may not combine comparisons done in a CCmode with
4762 comparisons not done in a CCmode. This is to aid targets
4763 like Alpha that have an IEEE compliant EQ instruction, and
4764 a non-IEEE compliant BEQ instruction. The use of CCmode is
4765 actually artificial, simply to prevent the combination, but
4766 should not affect other platforms.
4768 However, we must allow VOIDmode comparisons to match either
4769 CCmode or non-CCmode comparison, because some ports have
4770 modeless comparisons inside branch patterns.
4772 ??? This mode check should perhaps look more like the mode check
4773 in simplify_comparison in combine. */
4775 if ((GET_CODE (SET_SRC (set)) == COMPARE
4778 && GET_MODE_CLASS (inner_mode) == MODE_INT
4779 && (GET_MODE_BITSIZE (inner_mode)
4780 <= HOST_BITS_PER_WIDE_INT)
4781 && (STORE_FLAG_VALUE
4782 & ((HOST_WIDE_INT) 1
4783 << (GET_MODE_BITSIZE (inner_mode) - 1))))
4784 #ifdef FLOAT_STORE_FLAG_VALUE
4786 && SCALAR_FLOAT_MODE_P (inner_mode)
4787 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
4788 REAL_VALUE_NEGATIVE (fsfv)))
4791 && COMPARISON_P (SET_SRC (set))))
4792 && (((GET_MODE_CLASS (mode) == MODE_CC)
4793 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
4794 || mode == VOIDmode || inner_mode == VOIDmode))
4796 else if (((code == EQ
4798 && (GET_MODE_BITSIZE (inner_mode)
4799 <= HOST_BITS_PER_WIDE_INT)
4800 && GET_MODE_CLASS (inner_mode) == MODE_INT
4801 && (STORE_FLAG_VALUE
4802 & ((HOST_WIDE_INT) 1
4803 << (GET_MODE_BITSIZE (inner_mode) - 1))))
4804 #ifdef FLOAT_STORE_FLAG_VALUE
4806 && SCALAR_FLOAT_MODE_P (inner_mode)
4807 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
4808 REAL_VALUE_NEGATIVE (fsfv)))
4811 && COMPARISON_P (SET_SRC (set))
4812 && (((GET_MODE_CLASS (mode) == MODE_CC)
4813 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
4814 || mode == VOIDmode || inner_mode == VOIDmode))
4824 else if (reg_set_p (op0, prev))
4825 /* If this sets OP0, but not directly, we have to give up. */
4830 /* If the caller is expecting the condition to be valid at INSN,
4831 make sure X doesn't change before INSN. */
4832 if (valid_at_insn_p)
4833 if (modified_in_p (x, prev) || modified_between_p (x, prev, insn))
4835 if (COMPARISON_P (x))
4836 code = GET_CODE (x);
4839 code = reversed_comparison_code (x, prev);
4840 if (code == UNKNOWN)
4845 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
4851 /* If constant is first, put it last. */
4852 if (CONSTANT_P (op0))
4853 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
4855 /* If OP0 is the result of a comparison, we weren't able to find what
4856 was really being compared, so fail. */
4858 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
4861 /* Canonicalize any ordered comparison with integers involving equality
4862 if we can do computations in the relevant mode and we do not
4865 if (GET_MODE_CLASS (GET_MODE (op0)) != MODE_CC
4866 && GET_CODE (op1) == CONST_INT
4867 && GET_MODE (op0) != VOIDmode
4868 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
4870 HOST_WIDE_INT const_val = INTVAL (op1);
4871 unsigned HOST_WIDE_INT uconst_val = const_val;
4872 unsigned HOST_WIDE_INT max_val
4873 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
4878 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
4879 code = LT, op1 = gen_int_mode (const_val + 1, GET_MODE (op0));
4882 /* When cross-compiling, const_val might be sign-extended from
4883 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
4885 if ((HOST_WIDE_INT) (const_val & max_val)
4886 != (((HOST_WIDE_INT) 1
4887 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
4888 code = GT, op1 = gen_int_mode (const_val - 1, GET_MODE (op0));
4892 if (uconst_val < max_val)
4893 code = LTU, op1 = gen_int_mode (uconst_val + 1, GET_MODE (op0));
4897 if (uconst_val != 0)
4898 code = GTU, op1 = gen_int_mode (uconst_val - 1, GET_MODE (op0));
4906 /* Never return CC0; return zero instead. */
4910 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
4913 /* Given a jump insn JUMP, return the condition that will cause it to branch
4914 to its JUMP_LABEL. If the condition cannot be understood, or is an
4915 inequality floating-point comparison which needs to be reversed, 0 will
4918 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4919 insn used in locating the condition was found. If a replacement test
4920 of the condition is desired, it should be placed in front of that
4921 insn and we will be sure that the inputs are still valid. If EARLIEST
4922 is null, the returned condition will be valid at INSN.
4924 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
4925 compare CC mode register.
4927 VALID_AT_INSN_P is the same as for canonicalize_condition. */
4930 get_condition (rtx jump, rtx *earliest, int allow_cc_mode, int valid_at_insn_p)
4936 /* If this is not a standard conditional jump, we can't parse it. */
4938 || ! any_condjump_p (jump))
4940 set = pc_set (jump);
4942 cond = XEXP (SET_SRC (set), 0);
4944 /* If this branches to JUMP_LABEL when the condition is false, reverse
4947 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
4948 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
4950 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX,
4951 allow_cc_mode, valid_at_insn_p);
4954 /* Initialize the table NUM_SIGN_BIT_COPIES_IN_REP based on
4955 TARGET_MODE_REP_EXTENDED.
4957 Note that we assume that the property of
4958 TARGET_MODE_REP_EXTENDED(B, C) is sticky to the integral modes
4959 narrower than mode B. I.e., if A is a mode narrower than B then in
4960 order to be able to operate on it in mode B, mode A needs to
4961 satisfy the requirements set by the representation of mode B. */
4964 init_num_sign_bit_copies_in_rep (void)
4966 enum machine_mode mode, in_mode;
4968 for (in_mode = GET_CLASS_NARROWEST_MODE (MODE_INT); in_mode != VOIDmode;
4969 in_mode = GET_MODE_WIDER_MODE (mode))
4970 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != in_mode;
4971 mode = GET_MODE_WIDER_MODE (mode))
4973 enum machine_mode i;
4975 /* Currently, it is assumed that TARGET_MODE_REP_EXTENDED
4976 extends to the next widest mode. */
4977 gcc_assert (targetm.mode_rep_extended (mode, in_mode) == UNKNOWN
4978 || GET_MODE_WIDER_MODE (mode) == in_mode);
4980 /* We are in in_mode. Count how many bits outside of mode
4981 have to be copies of the sign-bit. */
4982 for (i = mode; i != in_mode; i = GET_MODE_WIDER_MODE (i))
4984 enum machine_mode wider = GET_MODE_WIDER_MODE (i);
4986 if (targetm.mode_rep_extended (i, wider) == SIGN_EXTEND
4987 /* We can only check sign-bit copies starting from the
4988 top-bit. In order to be able to check the bits we
4989 have already seen we pretend that subsequent bits
4990 have to be sign-bit copies too. */
4991 || num_sign_bit_copies_in_rep [in_mode][mode])
4992 num_sign_bit_copies_in_rep [in_mode][mode]
4993 += GET_MODE_BITSIZE (wider) - GET_MODE_BITSIZE (i);
4998 /* Suppose that truncation from the machine mode of X to MODE is not a
4999 no-op. See if there is anything special about X so that we can
5000 assume it already contains a truncated value of MODE. */
5003 truncated_to_mode (enum machine_mode mode, const_rtx x)
5005 /* This register has already been used in MODE without explicit
5007 if (REG_P (x) && rtl_hooks.reg_truncated_to_mode (mode, x))
5010 /* See if we already satisfy the requirements of MODE. If yes we
5011 can just switch to MODE. */
5012 if (num_sign_bit_copies_in_rep[GET_MODE (x)][mode]
5013 && (num_sign_bit_copies (x, GET_MODE (x))
5014 >= num_sign_bit_copies_in_rep[GET_MODE (x)][mode] + 1))
5020 /* Initialize non_rtx_starting_operands, which is used to speed up
5026 for (i = 0; i < NUM_RTX_CODE; i++)
5028 const char *format = GET_RTX_FORMAT (i);
5029 const char *first = strpbrk (format, "eEV");
5030 non_rtx_starting_operands[i] = first ? first - format : -1;
5033 init_num_sign_bit_copies_in_rep ();
5036 /* Check whether this is a constant pool constant. */
5038 constant_pool_constant_p (rtx x)
5040 x = avoid_constant_pool_reference (x);
5041 return GET_CODE (x) == CONST_DOUBLE;