1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
90 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
95 #include "coretypes.h"
97 #include "rtl-error.h"
99 #include "insn-config.h"
106 #include "addresses.h"
107 #include "hard-reg-set.h"
110 #include "function.h"
115 /* True if X is a constant that can be forced into the constant pool.
116 MODE is the mode of the operand, or VOIDmode if not known. */
117 #define CONST_POOL_OK_P(MODE, X) \
118 ((MODE) != VOIDmode \
120 && GET_CODE (X) != HIGH \
121 && !targetm.cannot_force_const_mem (MODE, X))
123 /* True if C is a non-empty register class that has too few registers
124 to be safely used as a reload target class. */
127 small_register_class_p (reg_class_t rclass)
129 return (reg_class_size [(int) rclass] == 1
130 || (reg_class_size [(int) rclass] >= 1
131 && targetm.class_likely_spilled_p (rclass)));
135 /* All reloads of the current insn are recorded here. See reload.h for
138 struct reload rld[MAX_RELOADS];
140 /* All the "earlyclobber" operands of the current insn
141 are recorded here. */
143 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
145 int reload_n_operands;
147 /* Replacing reloads.
149 If `replace_reloads' is nonzero, then as each reload is recorded
150 an entry is made for it in the table `replacements'.
151 Then later `subst_reloads' can look through that table and
152 perform all the replacements needed. */
154 /* Nonzero means record the places to replace. */
155 static int replace_reloads;
157 /* Each replacement is recorded with a structure like this. */
160 rtx *where; /* Location to store in */
161 int what; /* which reload this is for */
162 enum machine_mode mode; /* mode it must have */
165 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
167 /* Number of replacements currently recorded. */
168 static int n_replacements;
170 /* Used to track what is modified by an operand. */
173 int reg_flag; /* Nonzero if referencing a register. */
174 int safe; /* Nonzero if this can't conflict with anything. */
175 rtx base; /* Base address for MEM. */
176 HOST_WIDE_INT start; /* Starting offset or register number. */
177 HOST_WIDE_INT end; /* Ending offset or register number. */
180 #ifdef SECONDARY_MEMORY_NEEDED
182 /* Save MEMs needed to copy from one class of registers to another. One MEM
183 is used per mode, but normally only one or two modes are ever used.
185 We keep two versions, before and after register elimination. The one
186 after register elimination is record separately for each operand. This
187 is done in case the address is not valid to be sure that we separately
190 static rtx secondary_memlocs[NUM_MACHINE_MODES];
191 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
192 static int secondary_memlocs_elim_used = 0;
195 /* The instruction we are doing reloads for;
196 so we can test whether a register dies in it. */
197 static rtx this_insn;
199 /* Nonzero if this instruction is a user-specified asm with operands. */
200 static int this_insn_is_asm;
202 /* If hard_regs_live_known is nonzero,
203 we can tell which hard regs are currently live,
204 at least enough to succeed in choosing dummy reloads. */
205 static int hard_regs_live_known;
207 /* Indexed by hard reg number,
208 element is nonnegative if hard reg has been spilled.
209 This vector is passed to `find_reloads' as an argument
210 and is not changed here. */
211 static short *static_reload_reg_p;
213 /* Set to 1 in subst_reg_equivs if it changes anything. */
214 static int subst_reg_equivs_changed;
216 /* On return from push_reload, holds the reload-number for the OUT
217 operand, which can be different for that from the input operand. */
218 static int output_reloadnum;
220 /* Compare two RTX's. */
221 #define MATCHES(x, y) \
222 (x == y || (x != 0 && (REG_P (x) \
223 ? REG_P (y) && REGNO (x) == REGNO (y) \
224 : rtx_equal_p (x, y) && ! side_effects_p (x))))
226 /* Indicates if two reloads purposes are for similar enough things that we
227 can merge their reloads. */
228 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
229 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
230 || ((when1) == (when2) && (op1) == (op2)) \
231 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
232 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
233 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
234 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
235 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
237 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
238 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
239 ((when1) != (when2) \
240 || ! ((op1) == (op2) \
241 || (when1) == RELOAD_FOR_INPUT \
242 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
243 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
245 /* If we are going to reload an address, compute the reload type to
247 #define ADDR_TYPE(type) \
248 ((type) == RELOAD_FOR_INPUT_ADDRESS \
249 ? RELOAD_FOR_INPADDR_ADDRESS \
250 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
251 ? RELOAD_FOR_OUTADDR_ADDRESS \
254 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
255 enum machine_mode, enum reload_type,
256 enum insn_code *, secondary_reload_info *);
257 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
259 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
260 static void push_replacement (rtx *, int, enum machine_mode);
261 static void dup_replacements (rtx *, rtx *);
262 static void combine_reloads (void);
263 static int find_reusable_reload (rtx *, rtx, enum reg_class,
264 enum reload_type, int, int);
265 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
266 enum machine_mode, reg_class_t, int, int);
267 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
268 static struct decomposition decompose (rtx);
269 static int immune_p (rtx, rtx, struct decomposition);
270 static bool alternative_allows_const_pool_ref (rtx, const char *, int);
271 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
273 static rtx make_memloc (rtx, int);
274 static int maybe_memory_address_addr_space_p (enum machine_mode, rtx,
275 addr_space_t, rtx *);
276 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
277 int, enum reload_type, int, rtx);
278 static rtx subst_reg_equivs (rtx, rtx);
279 static rtx subst_indexed_address (rtx);
280 static void update_auto_inc_notes (rtx, int, int);
281 static int find_reloads_address_1 (enum machine_mode, rtx, int,
282 enum rtx_code, enum rtx_code, rtx *,
283 int, enum reload_type,int, rtx);
284 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
285 enum machine_mode, int,
286 enum reload_type, int);
287 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
289 static void copy_replacements_1 (rtx *, rtx *, int);
290 static int find_inc_amount (rtx, rtx);
291 static int refers_to_mem_for_reload_p (rtx);
292 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
295 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
299 push_reg_equiv_alt_mem (int regno, rtx mem)
303 for (it = reg_equiv_alt_mem_list (regno); it; it = XEXP (it, 1))
304 if (rtx_equal_p (XEXP (it, 0), mem))
307 reg_equiv_alt_mem_list (regno)
308 = alloc_EXPR_LIST (REG_EQUIV, mem,
309 reg_equiv_alt_mem_list (regno));
312 /* Determine if any secondary reloads are needed for loading (if IN_P is
313 nonzero) or storing (if IN_P is zero) X to or from a reload register of
314 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
315 are needed, push them.
317 Return the reload number of the secondary reload we made, or -1 if
318 we didn't need one. *PICODE is set to the insn_code to use if we do
319 need a secondary reload. */
322 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
323 enum reg_class reload_class,
324 enum machine_mode reload_mode, enum reload_type type,
325 enum insn_code *picode, secondary_reload_info *prev_sri)
327 enum reg_class rclass = NO_REGS;
328 enum reg_class scratch_class;
329 enum machine_mode mode = reload_mode;
330 enum insn_code icode = CODE_FOR_nothing;
331 enum insn_code t_icode = CODE_FOR_nothing;
332 enum reload_type secondary_type;
333 int s_reload, t_reload = -1;
334 const char *scratch_constraint;
336 secondary_reload_info sri;
338 if (type == RELOAD_FOR_INPUT_ADDRESS
339 || type == RELOAD_FOR_OUTPUT_ADDRESS
340 || type == RELOAD_FOR_INPADDR_ADDRESS
341 || type == RELOAD_FOR_OUTADDR_ADDRESS)
342 secondary_type = type;
344 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
346 *picode = CODE_FOR_nothing;
348 /* If X is a paradoxical SUBREG, use the inner value to determine both the
349 mode and object being reloaded. */
350 if (GET_CODE (x) == SUBREG
351 && (GET_MODE_SIZE (GET_MODE (x))
352 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
355 reload_mode = GET_MODE (x);
358 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
359 is still a pseudo-register by now, it *must* have an equivalent MEM
360 but we don't want to assume that), use that equivalent when seeing if
361 a secondary reload is needed since whether or not a reload is needed
362 might be sensitive to the form of the MEM. */
364 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
365 && reg_equiv_mem (REGNO (x)))
366 x = reg_equiv_mem (REGNO (x));
368 sri.icode = CODE_FOR_nothing;
369 sri.prev_sri = prev_sri;
370 rclass = (enum reg_class) targetm.secondary_reload (in_p, x, reload_class,
372 icode = (enum insn_code) sri.icode;
374 /* If we don't need any secondary registers, done. */
375 if (rclass == NO_REGS && icode == CODE_FOR_nothing)
378 if (rclass != NO_REGS)
379 t_reload = push_secondary_reload (in_p, x, opnum, optional, rclass,
380 reload_mode, type, &t_icode, &sri);
382 /* If we will be using an insn, the secondary reload is for a
385 if (icode != CODE_FOR_nothing)
387 /* If IN_P is nonzero, the reload register will be the output in
388 operand 0. If IN_P is zero, the reload register will be the input
389 in operand 1. Outputs should have an initial "=", which we must
392 /* ??? It would be useful to be able to handle only two, or more than
393 three, operands, but for now we can only handle the case of having
394 exactly three: output, input and one temp/scratch. */
395 gcc_assert (insn_data[(int) icode].n_operands == 3);
397 /* ??? We currently have no way to represent a reload that needs
398 an icode to reload from an intermediate tertiary reload register.
399 We should probably have a new field in struct reload to tag a
400 chain of scratch operand reloads onto. */
401 gcc_assert (rclass == NO_REGS);
403 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
404 gcc_assert (*scratch_constraint == '=');
405 scratch_constraint++;
406 if (*scratch_constraint == '&')
407 scratch_constraint++;
408 letter = *scratch_constraint;
409 scratch_class = (letter == 'r' ? GENERAL_REGS
410 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
411 scratch_constraint));
413 rclass = scratch_class;
414 mode = insn_data[(int) icode].operand[2].mode;
417 /* This case isn't valid, so fail. Reload is allowed to use the same
418 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
419 in the case of a secondary register, we actually need two different
420 registers for correct code. We fail here to prevent the possibility of
421 silently generating incorrect code later.
423 The convention is that secondary input reloads are valid only if the
424 secondary_class is different from class. If you have such a case, you
425 can not use secondary reloads, you must work around the problem some
428 Allow this when a reload_in/out pattern is being used. I.e. assume
429 that the generated code handles this case. */
431 gcc_assert (!in_p || rclass != reload_class || icode != CODE_FOR_nothing
432 || t_icode != CODE_FOR_nothing);
434 /* See if we can reuse an existing secondary reload. */
435 for (s_reload = 0; s_reload < n_reloads; s_reload++)
436 if (rld[s_reload].secondary_p
437 && (reg_class_subset_p (rclass, rld[s_reload].rclass)
438 || reg_class_subset_p (rld[s_reload].rclass, rclass))
439 && ((in_p && rld[s_reload].inmode == mode)
440 || (! in_p && rld[s_reload].outmode == mode))
441 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
442 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
443 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
444 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
445 && (small_register_class_p (rclass)
446 || targetm.small_register_classes_for_mode_p (VOIDmode))
447 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
448 opnum, rld[s_reload].opnum))
451 rld[s_reload].inmode = mode;
453 rld[s_reload].outmode = mode;
455 if (reg_class_subset_p (rclass, rld[s_reload].rclass))
456 rld[s_reload].rclass = rclass;
458 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
459 rld[s_reload].optional &= optional;
460 rld[s_reload].secondary_p = 1;
461 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
462 opnum, rld[s_reload].opnum))
463 rld[s_reload].when_needed = RELOAD_OTHER;
468 if (s_reload == n_reloads)
470 #ifdef SECONDARY_MEMORY_NEEDED
471 /* If we need a memory location to copy between the two reload regs,
472 set it up now. Note that we do the input case before making
473 the reload and the output case after. This is due to the
474 way reloads are output. */
476 if (in_p && icode == CODE_FOR_nothing
477 && SECONDARY_MEMORY_NEEDED (rclass, reload_class, mode))
479 get_secondary_mem (x, reload_mode, opnum, type);
481 /* We may have just added new reloads. Make sure we add
482 the new reload at the end. */
483 s_reload = n_reloads;
487 /* We need to make a new secondary reload for this register class. */
488 rld[s_reload].in = rld[s_reload].out = 0;
489 rld[s_reload].rclass = rclass;
491 rld[s_reload].inmode = in_p ? mode : VOIDmode;
492 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
493 rld[s_reload].reg_rtx = 0;
494 rld[s_reload].optional = optional;
495 rld[s_reload].inc = 0;
496 /* Maybe we could combine these, but it seems too tricky. */
497 rld[s_reload].nocombine = 1;
498 rld[s_reload].in_reg = 0;
499 rld[s_reload].out_reg = 0;
500 rld[s_reload].opnum = opnum;
501 rld[s_reload].when_needed = secondary_type;
502 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
503 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
504 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
505 rld[s_reload].secondary_out_icode
506 = ! in_p ? t_icode : CODE_FOR_nothing;
507 rld[s_reload].secondary_p = 1;
511 #ifdef SECONDARY_MEMORY_NEEDED
512 if (! in_p && icode == CODE_FOR_nothing
513 && SECONDARY_MEMORY_NEEDED (reload_class, rclass, mode))
514 get_secondary_mem (x, mode, opnum, type);
522 /* If a secondary reload is needed, return its class. If both an intermediate
523 register and a scratch register is needed, we return the class of the
524 intermediate register. */
526 secondary_reload_class (bool in_p, reg_class_t rclass, enum machine_mode mode,
529 enum insn_code icode;
530 secondary_reload_info sri;
532 sri.icode = CODE_FOR_nothing;
535 = (enum reg_class) targetm.secondary_reload (in_p, x, rclass, mode, &sri);
536 icode = (enum insn_code) sri.icode;
538 /* If there are no secondary reloads at all, we return NO_REGS.
539 If an intermediate register is needed, we return its class. */
540 if (icode == CODE_FOR_nothing || rclass != NO_REGS)
543 /* No intermediate register is needed, but we have a special reload
544 pattern, which we assume for now needs a scratch register. */
545 return scratch_reload_class (icode);
548 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
549 three operands, verify that operand 2 is an output operand, and return
551 ??? We'd like to be able to handle any pattern with at least 2 operands,
552 for zero or more scratch registers, but that needs more infrastructure. */
554 scratch_reload_class (enum insn_code icode)
556 const char *scratch_constraint;
558 enum reg_class rclass;
560 gcc_assert (insn_data[(int) icode].n_operands == 3);
561 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
562 gcc_assert (*scratch_constraint == '=');
563 scratch_constraint++;
564 if (*scratch_constraint == '&')
565 scratch_constraint++;
566 scratch_letter = *scratch_constraint;
567 if (scratch_letter == 'r')
569 rclass = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
571 gcc_assert (rclass != NO_REGS);
575 #ifdef SECONDARY_MEMORY_NEEDED
577 /* Return a memory location that will be used to copy X in mode MODE.
578 If we haven't already made a location for this mode in this insn,
579 call find_reloads_address on the location being returned. */
582 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
583 int opnum, enum reload_type type)
588 /* By default, if MODE is narrower than a word, widen it to a word.
589 This is required because most machines that require these memory
590 locations do not support short load and stores from all registers
591 (e.g., FP registers). */
593 #ifdef SECONDARY_MEMORY_NEEDED_MODE
594 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
596 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
597 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
600 /* If we already have made a MEM for this operand in MODE, return it. */
601 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
602 return secondary_memlocs_elim[(int) mode][opnum];
604 /* If this is the first time we've tried to get a MEM for this mode,
605 allocate a new one. `something_changed' in reload will get set
606 by noticing that the frame size has changed. */
608 if (secondary_memlocs[(int) mode] == 0)
610 #ifdef SECONDARY_MEMORY_NEEDED_RTX
611 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
613 secondary_memlocs[(int) mode]
614 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
618 /* Get a version of the address doing any eliminations needed. If that
619 didn't give us a new MEM, make a new one if it isn't valid. */
621 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
622 mem_valid = strict_memory_address_addr_space_p (mode, XEXP (loc, 0),
623 MEM_ADDR_SPACE (loc));
625 if (! mem_valid && loc == secondary_memlocs[(int) mode])
626 loc = copy_rtx (loc);
628 /* The only time the call below will do anything is if the stack
629 offset is too large. In that case IND_LEVELS doesn't matter, so we
630 can just pass a zero. Adjust the type to be the address of the
631 corresponding object. If the address was valid, save the eliminated
632 address. If it wasn't valid, we need to make a reload each time, so
637 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
638 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
641 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
645 secondary_memlocs_elim[(int) mode][opnum] = loc;
646 if (secondary_memlocs_elim_used <= (int)mode)
647 secondary_memlocs_elim_used = (int)mode + 1;
651 /* Clear any secondary memory locations we've made. */
654 clear_secondary_mem (void)
656 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
658 #endif /* SECONDARY_MEMORY_NEEDED */
661 /* Find the largest class which has at least one register valid in
662 mode INNER, and which for every such register, that register number
663 plus N is also valid in OUTER (if in range) and is cheap to move
664 into REGNO. Such a class must exist. */
666 static enum reg_class
667 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
668 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
669 unsigned int dest_regno ATTRIBUTE_UNUSED)
674 enum reg_class best_class = NO_REGS;
675 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
676 unsigned int best_size = 0;
679 for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
683 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
684 if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno))
686 if (HARD_REGNO_MODE_OK (regno, inner))
689 if (! TEST_HARD_REG_BIT (reg_class_contents[rclass], regno + n)
690 || ! HARD_REGNO_MODE_OK (regno + n, outer))
697 cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);
699 if ((reg_class_size[rclass] > best_size
700 && (best_cost < 0 || best_cost >= cost))
703 best_class = (enum reg_class) rclass;
704 best_size = reg_class_size[rclass];
705 best_cost = register_move_cost (outer, (enum reg_class) rclass,
710 gcc_assert (best_size != 0);
715 /* Return the number of a previously made reload that can be combined with
716 a new one, or n_reloads if none of the existing reloads can be used.
717 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
718 push_reload, they determine the kind of the new reload that we try to
719 combine. P_IN points to the corresponding value of IN, which can be
720 modified by this function.
721 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
724 find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
725 enum reload_type type, int opnum, int dont_share)
729 /* We can't merge two reloads if the output of either one is
732 if (earlyclobber_operand_p (out))
735 /* We can use an existing reload if the class is right
736 and at least one of IN and OUT is a match
737 and the other is at worst neutral.
738 (A zero compared against anything is neutral.)
740 For targets with small register classes, don't use existing reloads
741 unless they are for the same thing since that can cause us to need
742 more reload registers than we otherwise would. */
744 for (i = 0; i < n_reloads; i++)
745 if ((reg_class_subset_p (rclass, rld[i].rclass)
746 || reg_class_subset_p (rld[i].rclass, rclass))
747 /* If the existing reload has a register, it must fit our class. */
748 && (rld[i].reg_rtx == 0
749 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
750 true_regnum (rld[i].reg_rtx)))
751 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
752 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
753 || (out != 0 && MATCHES (rld[i].out, out)
754 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
755 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
756 && (small_register_class_p (rclass)
757 || targetm.small_register_classes_for_mode_p (VOIDmode))
758 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
761 /* Reloading a plain reg for input can match a reload to postincrement
762 that reg, since the postincrement's value is the right value.
763 Likewise, it can match a preincrement reload, since we regard
764 the preincrementation as happening before any ref in this insn
766 for (i = 0; i < n_reloads; i++)
767 if ((reg_class_subset_p (rclass, rld[i].rclass)
768 || reg_class_subset_p (rld[i].rclass, rclass))
769 /* If the existing reload has a register, it must fit our
771 && (rld[i].reg_rtx == 0
772 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
773 true_regnum (rld[i].reg_rtx)))
774 && out == 0 && rld[i].out == 0 && rld[i].in != 0
776 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
777 && MATCHES (XEXP (rld[i].in, 0), in))
778 || (REG_P (rld[i].in)
779 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
780 && MATCHES (XEXP (in, 0), rld[i].in)))
781 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
782 && (small_register_class_p (rclass)
783 || targetm.small_register_classes_for_mode_p (VOIDmode))
784 && MERGABLE_RELOADS (type, rld[i].when_needed,
785 opnum, rld[i].opnum))
787 /* Make sure reload_in ultimately has the increment,
788 not the plain register. */
796 /* Return nonzero if X is a SUBREG which will require reloading of its
797 SUBREG_REG expression. */
800 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
804 /* Only SUBREGs are problematical. */
805 if (GET_CODE (x) != SUBREG)
808 inner = SUBREG_REG (x);
810 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
811 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
814 /* If INNER is not a hard register, then INNER will not need to
817 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
820 /* If INNER is not ok for MODE, then INNER will need reloading. */
821 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
824 /* If the outer part is a word or smaller, INNER larger than a
825 word and the number of regs for INNER is not the same as the
826 number of words in INNER, then INNER will need reloading. */
827 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
829 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
830 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
831 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
834 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
835 requiring an extra reload register. The caller has already found that
836 IN contains some reference to REGNO, so check that we can produce the
837 new value in a single step. E.g. if we have
838 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
839 instruction that adds one to a register, this should succeed.
840 However, if we have something like
841 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
842 needs to be loaded into a register first, we need a separate reload
844 Such PLUS reloads are generated by find_reload_address_part.
845 The out-of-range PLUS expressions are usually introduced in the instruction
846 patterns by register elimination and substituting pseudos without a home
847 by their function-invariant equivalences. */
849 can_reload_into (rtx in, int regno, enum machine_mode mode)
853 struct recog_data save_recog_data;
855 /* For matching constraints, we often get notional input reloads where
856 we want to use the original register as the reload register. I.e.
857 technically this is a non-optional input-output reload, but IN is
858 already a valid register, and has been chosen as the reload register.
859 Speed this up, since it trivially works. */
863 /* To test MEMs properly, we'd have to take into account all the reloads
864 that are already scheduled, which can become quite complicated.
865 And since we've already handled address reloads for this MEM, it
866 should always succeed anyway. */
870 /* If we can make a simple SET insn that does the job, everything should
872 dst = gen_rtx_REG (mode, regno);
873 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
874 save_recog_data = recog_data;
875 if (recog_memoized (test_insn) >= 0)
877 extract_insn (test_insn);
878 r = constrain_operands (1);
880 recog_data = save_recog_data;
884 /* Record one reload that needs to be performed.
885 IN is an rtx saying where the data are to be found before this instruction.
886 OUT says where they must be stored after the instruction.
887 (IN is zero for data not read, and OUT is zero for data not written.)
888 INLOC and OUTLOC point to the places in the instructions where
889 IN and OUT were found.
890 If IN and OUT are both nonzero, it means the same register must be used
891 to reload both IN and OUT.
893 RCLASS is a register class required for the reloaded data.
894 INMODE is the machine mode that the instruction requires
895 for the reg that replaces IN and OUTMODE is likewise for OUT.
897 If IN is zero, then OUT's location and mode should be passed as
900 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
902 OPTIONAL nonzero means this reload does not need to be performed:
903 it can be discarded if that is more convenient.
905 OPNUM and TYPE say what the purpose of this reload is.
907 The return value is the reload-number for this reload.
909 If both IN and OUT are nonzero, in some rare cases we might
910 want to make two separate reloads. (Actually we never do this now.)
911 Therefore, the reload-number for OUT is stored in
912 output_reloadnum when we return; the return value applies to IN.
913 Usually (presently always), when IN and OUT are nonzero,
914 the two reload-numbers are equal, but the caller should be careful to
918 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
919 enum reg_class rclass, enum machine_mode inmode,
920 enum machine_mode outmode, int strict_low, int optional,
921 int opnum, enum reload_type type)
925 int dont_remove_subreg = 0;
926 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
927 int secondary_in_reload = -1, secondary_out_reload = -1;
928 enum insn_code secondary_in_icode = CODE_FOR_nothing;
929 enum insn_code secondary_out_icode = CODE_FOR_nothing;
931 /* INMODE and/or OUTMODE could be VOIDmode if no mode
932 has been specified for the operand. In that case,
933 use the operand's mode as the mode to reload. */
934 if (inmode == VOIDmode && in != 0)
935 inmode = GET_MODE (in);
936 if (outmode == VOIDmode && out != 0)
937 outmode = GET_MODE (out);
939 /* If find_reloads and friends until now missed to replace a pseudo
940 with a constant of reg_equiv_constant something went wrong
942 Note that it can't simply be done here if we missed it earlier
943 since the constant might need to be pushed into the literal pool
944 and the resulting memref would probably need further
946 if (in != 0 && REG_P (in))
948 int regno = REGNO (in);
950 gcc_assert (regno < FIRST_PSEUDO_REGISTER
951 || reg_renumber[regno] >= 0
952 || reg_equiv_constant (regno) == NULL_RTX);
955 /* reg_equiv_constant only contains constants which are obviously
956 not appropriate as destination. So if we would need to replace
957 the destination pseudo with a constant we are in real
959 if (out != 0 && REG_P (out))
961 int regno = REGNO (out);
963 gcc_assert (regno < FIRST_PSEUDO_REGISTER
964 || reg_renumber[regno] >= 0
965 || reg_equiv_constant (regno) == NULL_RTX);
968 /* If we have a read-write operand with an address side-effect,
969 change either IN or OUT so the side-effect happens only once. */
970 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
971 switch (GET_CODE (XEXP (in, 0)))
973 case POST_INC: case POST_DEC: case POST_MODIFY:
974 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
977 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
978 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
985 /* If we are reloading a (SUBREG constant ...), really reload just the
986 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
987 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
988 a pseudo and hence will become a MEM) with M1 wider than M2 and the
989 register is a pseudo, also reload the inside expression.
990 For machines that extend byte loads, do this for any SUBREG of a pseudo
991 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
992 M2 is an integral mode that gets extended when loaded.
993 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
994 either M1 is not valid for R or M2 is wider than a word but we only
995 need one word to store an M2-sized quantity in R.
996 (However, if OUT is nonzero, we need to reload the reg *and*
997 the subreg, so do nothing here, and let following statement handle it.)
999 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1000 we can't handle it here because CONST_INT does not indicate a mode.
1002 Similarly, we must reload the inside expression if we have a
1003 STRICT_LOW_PART (presumably, in == out in this case).
1005 Also reload the inner expression if it does not require a secondary
1006 reload but the SUBREG does.
1008 Finally, reload the inner expression if it is a register that is in
1009 the class whose registers cannot be referenced in a different size
1010 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1011 cannot reload just the inside since we might end up with the wrong
1012 register class. But if it is inside a STRICT_LOW_PART, we have
1013 no choice, so we hope we do get the right register class there. */
1015 if (in != 0 && GET_CODE (in) == SUBREG
1016 && (subreg_lowpart_p (in) || strict_low)
1017 #ifdef CANNOT_CHANGE_MODE_CLASS
1018 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass)
1020 && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (in))]
1021 && (CONSTANT_P (SUBREG_REG (in))
1022 || GET_CODE (SUBREG_REG (in)) == PLUS
1024 || (((REG_P (SUBREG_REG (in))
1025 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1026 || MEM_P (SUBREG_REG (in)))
1027 && ((GET_MODE_SIZE (inmode)
1028 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1029 #ifdef LOAD_EXTEND_OP
1030 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1031 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1033 && (GET_MODE_SIZE (inmode)
1034 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1035 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1036 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1038 #ifdef WORD_REGISTER_OPERATIONS
1039 || ((GET_MODE_SIZE (inmode)
1040 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1041 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1042 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1046 || (REG_P (SUBREG_REG (in))
1047 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1048 /* The case where out is nonzero
1049 is handled differently in the following statement. */
1050 && (out == 0 || subreg_lowpart_p (in))
1051 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1052 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1054 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1056 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1057 [GET_MODE (SUBREG_REG (in))]))
1058 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1059 || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS
1060 && (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)),
1063 #ifdef CANNOT_CHANGE_MODE_CLASS
1064 || (REG_P (SUBREG_REG (in))
1065 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1066 && REG_CANNOT_CHANGE_MODE_P
1067 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1071 in_subreg_loc = inloc;
1072 inloc = &SUBREG_REG (in);
1074 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1076 /* This is supposed to happen only for paradoxical subregs made by
1077 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1078 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1080 inmode = GET_MODE (in);
1083 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1084 either M1 is not valid for R or M2 is wider than a word but we only
1085 need one word to store an M2-sized quantity in R.
1087 However, we must reload the inner reg *as well as* the subreg in
1090 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1091 code above. This can happen if SUBREG_BYTE != 0. */
1093 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1095 enum reg_class in_class = rclass;
1097 if (REG_P (SUBREG_REG (in)))
1099 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1100 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1101 GET_MODE (SUBREG_REG (in)),
1104 REGNO (SUBREG_REG (in)));
1106 /* This relies on the fact that emit_reload_insns outputs the
1107 instructions for input reloads of type RELOAD_OTHER in the same
1108 order as the reloads. Thus if the outer reload is also of type
1109 RELOAD_OTHER, we are guaranteed that this inner reload will be
1110 output before the outer reload. */
1111 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1112 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1113 dont_remove_subreg = 1;
1116 /* Similarly for paradoxical and problematical SUBREGs on the output.
1117 Note that there is no reason we need worry about the previous value
1118 of SUBREG_REG (out); even if wider than out,
1119 storing in a subreg is entitled to clobber it all
1120 (except in the case of STRICT_LOW_PART,
1121 and in that case the constraint should label it input-output.) */
1122 if (out != 0 && GET_CODE (out) == SUBREG
1123 && (subreg_lowpart_p (out) || strict_low)
1124 #ifdef CANNOT_CHANGE_MODE_CLASS
1125 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass)
1127 && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (out))]
1128 && (CONSTANT_P (SUBREG_REG (out))
1130 || (((REG_P (SUBREG_REG (out))
1131 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1132 || MEM_P (SUBREG_REG (out)))
1133 && ((GET_MODE_SIZE (outmode)
1134 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1135 #ifdef WORD_REGISTER_OPERATIONS
1136 || ((GET_MODE_SIZE (outmode)
1137 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1138 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1139 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1143 || (REG_P (SUBREG_REG (out))
1144 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1145 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1146 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1148 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1150 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1151 [GET_MODE (SUBREG_REG (out))]))
1152 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1153 || (secondary_reload_class (0, rclass, outmode, out) != NO_REGS
1154 && (secondary_reload_class (0, rclass, GET_MODE (SUBREG_REG (out)),
1157 #ifdef CANNOT_CHANGE_MODE_CLASS
1158 || (REG_P (SUBREG_REG (out))
1159 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1160 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1161 GET_MODE (SUBREG_REG (out)),
1166 out_subreg_loc = outloc;
1167 outloc = &SUBREG_REG (out);
1169 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1170 gcc_assert (!MEM_P (out)
1171 || GET_MODE_SIZE (GET_MODE (out))
1172 <= GET_MODE_SIZE (outmode));
1174 outmode = GET_MODE (out);
1177 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1178 either M1 is not valid for R or M2 is wider than a word but we only
1179 need one word to store an M2-sized quantity in R.
1181 However, we must reload the inner reg *as well as* the subreg in
1182 that case. In this case, the inner reg is an in-out reload. */
1184 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1186 /* This relies on the fact that emit_reload_insns outputs the
1187 instructions for output reloads of type RELOAD_OTHER in reverse
1188 order of the reloads. Thus if the outer reload is also of type
1189 RELOAD_OTHER, we are guaranteed that this inner reload will be
1190 output after the outer reload. */
1191 dont_remove_subreg = 1;
1192 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1194 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1195 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1196 GET_MODE (SUBREG_REG (out)),
1199 REGNO (SUBREG_REG (out))),
1200 VOIDmode, VOIDmode, 0, 0,
1201 opnum, RELOAD_OTHER);
1204 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1205 if (in != 0 && out != 0 && MEM_P (out)
1206 && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1207 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1210 /* If IN is a SUBREG of a hard register, make a new REG. This
1211 simplifies some of the cases below. */
1213 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1214 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1215 && ! dont_remove_subreg)
1216 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1218 /* Similarly for OUT. */
1219 if (out != 0 && GET_CODE (out) == SUBREG
1220 && REG_P (SUBREG_REG (out))
1221 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1222 && ! dont_remove_subreg)
1223 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1225 /* Narrow down the class of register wanted if that is
1226 desirable on this machine for efficiency. */
1228 reg_class_t preferred_class = rclass;
1231 preferred_class = targetm.preferred_reload_class (in, rclass);
1233 /* Output reloads may need analogous treatment, different in detail. */
1236 = targetm.preferred_output_reload_class (out, preferred_class);
1238 /* Discard what the target said if we cannot do it. */
1239 if (preferred_class != NO_REGS
1240 || (optional && type == RELOAD_FOR_OUTPUT))
1241 rclass = (enum reg_class) preferred_class;
1244 /* Make sure we use a class that can handle the actual pseudo
1245 inside any subreg. For example, on the 386, QImode regs
1246 can appear within SImode subregs. Although GENERAL_REGS
1247 can handle SImode, QImode needs a smaller class. */
1248 #ifdef LIMIT_RELOAD_CLASS
1250 rclass = LIMIT_RELOAD_CLASS (inmode, rclass);
1251 else if (in != 0 && GET_CODE (in) == SUBREG)
1252 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), rclass);
1255 rclass = LIMIT_RELOAD_CLASS (outmode, rclass);
1256 if (out != 0 && GET_CODE (out) == SUBREG)
1257 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), rclass);
1260 /* Verify that this class is at least possible for the mode that
1262 if (this_insn_is_asm)
1264 enum machine_mode mode;
1265 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1269 if (mode == VOIDmode)
1271 error_for_asm (this_insn, "cannot reload integer constant "
1272 "operand in %<asm%>");
1277 outmode = word_mode;
1279 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1280 if (HARD_REGNO_MODE_OK (i, mode)
1281 && in_hard_reg_set_p (reg_class_contents[(int) rclass], mode, i))
1283 if (i == FIRST_PSEUDO_REGISTER)
1285 error_for_asm (this_insn, "impossible register constraint "
1287 /* Avoid further trouble with this insn. */
1288 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1289 /* We used to continue here setting class to ALL_REGS, but it triggers
1290 sanity check on i386 for:
1291 void foo(long double d)
1295 Returning zero here ought to be safe as we take care in
1296 find_reloads to not process the reloads when instruction was
1303 /* Optional output reloads are always OK even if we have no register class,
1304 since the function of these reloads is only to have spill_reg_store etc.
1305 set, so that the storing insn can be deleted later. */
1306 gcc_assert (rclass != NO_REGS
1307 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1309 i = find_reusable_reload (&in, out, rclass, type, opnum, dont_share);
1313 /* See if we need a secondary reload register to move between CLASS
1314 and IN or CLASS and OUT. Get the icode and push any required reloads
1315 needed for each of them if so. */
1319 = push_secondary_reload (1, in, opnum, optional, rclass, inmode, type,
1320 &secondary_in_icode, NULL);
1321 if (out != 0 && GET_CODE (out) != SCRATCH)
1322 secondary_out_reload
1323 = push_secondary_reload (0, out, opnum, optional, rclass, outmode,
1324 type, &secondary_out_icode, NULL);
1326 /* We found no existing reload suitable for re-use.
1327 So add an additional reload. */
1329 #ifdef SECONDARY_MEMORY_NEEDED
1330 /* If a memory location is needed for the copy, make one. */
1333 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1334 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1335 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1337 get_secondary_mem (in, inmode, opnum, type);
1343 rld[i].rclass = rclass;
1344 rld[i].inmode = inmode;
1345 rld[i].outmode = outmode;
1347 rld[i].optional = optional;
1349 rld[i].nocombine = 0;
1350 rld[i].in_reg = inloc ? *inloc : 0;
1351 rld[i].out_reg = outloc ? *outloc : 0;
1352 rld[i].opnum = opnum;
1353 rld[i].when_needed = type;
1354 rld[i].secondary_in_reload = secondary_in_reload;
1355 rld[i].secondary_out_reload = secondary_out_reload;
1356 rld[i].secondary_in_icode = secondary_in_icode;
1357 rld[i].secondary_out_icode = secondary_out_icode;
1358 rld[i].secondary_p = 0;
1362 #ifdef SECONDARY_MEMORY_NEEDED
1365 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1366 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1367 && SECONDARY_MEMORY_NEEDED (rclass,
1368 REGNO_REG_CLASS (reg_or_subregno (out)),
1370 get_secondary_mem (out, outmode, opnum, type);
1375 /* We are reusing an existing reload,
1376 but we may have additional information for it.
1377 For example, we may now have both IN and OUT
1378 while the old one may have just one of them. */
1380 /* The modes can be different. If they are, we want to reload in
1381 the larger mode, so that the value is valid for both modes. */
1382 if (inmode != VOIDmode
1383 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1384 rld[i].inmode = inmode;
1385 if (outmode != VOIDmode
1386 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1387 rld[i].outmode = outmode;
1390 rtx in_reg = inloc ? *inloc : 0;
1391 /* If we merge reloads for two distinct rtl expressions that
1392 are identical in content, there might be duplicate address
1393 reloads. Remove the extra set now, so that if we later find
1394 that we can inherit this reload, we can get rid of the
1395 address reloads altogether.
1397 Do not do this if both reloads are optional since the result
1398 would be an optional reload which could potentially leave
1399 unresolved address replacements.
1401 It is not sufficient to call transfer_replacements since
1402 choose_reload_regs will remove the replacements for address
1403 reloads of inherited reloads which results in the same
1405 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1406 && ! (rld[i].optional && optional))
1408 /* We must keep the address reload with the lower operand
1410 if (opnum > rld[i].opnum)
1412 remove_address_replacements (in);
1414 in_reg = rld[i].in_reg;
1417 remove_address_replacements (rld[i].in);
1419 /* When emitting reloads we don't necessarily look at the in-
1420 and outmode, but also directly at the operands (in and out).
1421 So we can't simply overwrite them with whatever we have found
1422 for this (to-be-merged) reload, we have to "merge" that too.
1423 Reusing another reload already verified that we deal with the
1424 same operands, just possibly in different modes. So we
1425 overwrite the operands only when the new mode is larger.
1426 See also PR33613. */
1428 || GET_MODE_SIZE (GET_MODE (in))
1429 > GET_MODE_SIZE (GET_MODE (rld[i].in)))
1433 && GET_MODE_SIZE (GET_MODE (in_reg))
1434 > GET_MODE_SIZE (GET_MODE (rld[i].in_reg))))
1435 rld[i].in_reg = in_reg;
1441 && GET_MODE_SIZE (GET_MODE (out))
1442 > GET_MODE_SIZE (GET_MODE (rld[i].out))))
1446 || GET_MODE_SIZE (GET_MODE (*outloc))
1447 > GET_MODE_SIZE (GET_MODE (rld[i].out_reg))))
1448 rld[i].out_reg = *outloc;
1450 if (reg_class_subset_p (rclass, rld[i].rclass))
1451 rld[i].rclass = rclass;
1452 rld[i].optional &= optional;
1453 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1454 opnum, rld[i].opnum))
1455 rld[i].when_needed = RELOAD_OTHER;
1456 rld[i].opnum = MIN (rld[i].opnum, opnum);
1459 /* If the ostensible rtx being reloaded differs from the rtx found
1460 in the location to substitute, this reload is not safe to combine
1461 because we cannot reliably tell whether it appears in the insn. */
1463 if (in != 0 && in != *inloc)
1464 rld[i].nocombine = 1;
1467 /* This was replaced by changes in find_reloads_address_1 and the new
1468 function inc_for_reload, which go with a new meaning of reload_inc. */
1470 /* If this is an IN/OUT reload in an insn that sets the CC,
1471 it must be for an autoincrement. It doesn't work to store
1472 the incremented value after the insn because that would clobber the CC.
1473 So we must do the increment of the value reloaded from,
1474 increment it, store it back, then decrement again. */
1475 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1479 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1480 /* If we did not find a nonzero amount-to-increment-by,
1481 that contradicts the belief that IN is being incremented
1482 in an address in this insn. */
1483 gcc_assert (rld[i].inc != 0);
1487 /* If we will replace IN and OUT with the reload-reg,
1488 record where they are located so that substitution need
1489 not do a tree walk. */
1491 if (replace_reloads)
1495 struct replacement *r = &replacements[n_replacements++];
1500 if (outloc != 0 && outloc != inloc)
1502 struct replacement *r = &replacements[n_replacements++];
1509 /* If this reload is just being introduced and it has both
1510 an incoming quantity and an outgoing quantity that are
1511 supposed to be made to match, see if either one of the two
1512 can serve as the place to reload into.
1514 If one of them is acceptable, set rld[i].reg_rtx
1517 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1519 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1522 earlyclobber_operand_p (out));
1524 /* If the outgoing register already contains the same value
1525 as the incoming one, we can dispense with loading it.
1526 The easiest way to tell the caller that is to give a phony
1527 value for the incoming operand (same as outgoing one). */
1528 if (rld[i].reg_rtx == out
1529 && (REG_P (in) || CONSTANT_P (in))
1530 && 0 != find_equiv_reg (in, this_insn, NO_REGS, REGNO (out),
1531 static_reload_reg_p, i, inmode))
1535 /* If this is an input reload and the operand contains a register that
1536 dies in this insn and is used nowhere else, see if it is the right class
1537 to be used for this reload. Use it if so. (This occurs most commonly
1538 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1539 this if it is also an output reload that mentions the register unless
1540 the output is a SUBREG that clobbers an entire register.
1542 Note that the operand might be one of the spill regs, if it is a
1543 pseudo reg and we are in a block where spilling has not taken place.
1544 But if there is no spilling in this block, that is OK.
1545 An explicitly used hard reg cannot be a spill reg. */
1547 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1551 enum machine_mode rel_mode = inmode;
1553 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1556 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1557 if (REG_NOTE_KIND (note) == REG_DEAD
1558 && REG_P (XEXP (note, 0))
1559 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1560 && reg_mentioned_p (XEXP (note, 0), in)
1561 /* Check that a former pseudo is valid; see find_dummy_reload. */
1562 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1563 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1564 ORIGINAL_REGNO (XEXP (note, 0)))
1565 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1))
1566 && ! refers_to_regno_for_reload_p (regno,
1567 end_hard_regno (rel_mode,
1569 PATTERN (this_insn), inloc)
1570 /* If this is also an output reload, IN cannot be used as
1571 the reload register if it is set in this insn unless IN
1573 && (out == 0 || in == out
1574 || ! hard_reg_set_here_p (regno,
1575 end_hard_regno (rel_mode, regno),
1576 PATTERN (this_insn)))
1577 /* ??? Why is this code so different from the previous?
1578 Is there any simple coherent way to describe the two together?
1579 What's going on here. */
1581 || (GET_CODE (in) == SUBREG
1582 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1584 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1585 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1586 /* Make sure the operand fits in the reg that dies. */
1587 && (GET_MODE_SIZE (rel_mode)
1588 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1589 && HARD_REGNO_MODE_OK (regno, inmode)
1590 && HARD_REGNO_MODE_OK (regno, outmode))
1593 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1594 hard_regno_nregs[regno][outmode]);
1596 for (offs = 0; offs < nregs; offs++)
1597 if (fixed_regs[regno + offs]
1598 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1603 && (! (refers_to_regno_for_reload_p
1604 (regno, end_hard_regno (inmode, regno), in, (rtx *) 0))
1605 || can_reload_into (in, regno, inmode)))
1607 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1614 output_reloadnum = i;
1619 /* Record an additional place we must replace a value
1620 for which we have already recorded a reload.
1621 RELOADNUM is the value returned by push_reload
1622 when the reload was recorded.
1623 This is used in insn patterns that use match_dup. */
1626 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1628 if (replace_reloads)
1630 struct replacement *r = &replacements[n_replacements++];
1631 r->what = reloadnum;
1637 /* Duplicate any replacement we have recorded to apply at
1638 location ORIG_LOC to also be performed at DUP_LOC.
1639 This is used in insn patterns that use match_dup. */
1642 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1644 int i, n = n_replacements;
1646 for (i = 0; i < n; i++)
1648 struct replacement *r = &replacements[i];
1649 if (r->where == orig_loc)
1650 push_replacement (dup_loc, r->what, r->mode);
1654 /* Transfer all replacements that used to be in reload FROM to be in
1658 transfer_replacements (int to, int from)
1662 for (i = 0; i < n_replacements; i++)
1663 if (replacements[i].what == from)
1664 replacements[i].what = to;
1667 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1668 or a subpart of it. If we have any replacements registered for IN_RTX,
1669 cancel the reloads that were supposed to load them.
1670 Return nonzero if we canceled any reloads. */
1672 remove_address_replacements (rtx in_rtx)
1675 char reload_flags[MAX_RELOADS];
1676 int something_changed = 0;
1678 memset (reload_flags, 0, sizeof reload_flags);
1679 for (i = 0, j = 0; i < n_replacements; i++)
1681 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1682 reload_flags[replacements[i].what] |= 1;
1685 replacements[j++] = replacements[i];
1686 reload_flags[replacements[i].what] |= 2;
1689 /* Note that the following store must be done before the recursive calls. */
1692 for (i = n_reloads - 1; i >= 0; i--)
1694 if (reload_flags[i] == 1)
1696 deallocate_reload_reg (i);
1697 remove_address_replacements (rld[i].in);
1699 something_changed = 1;
1702 return something_changed;
1705 /* If there is only one output reload, and it is not for an earlyclobber
1706 operand, try to combine it with a (logically unrelated) input reload
1707 to reduce the number of reload registers needed.
1709 This is safe if the input reload does not appear in
1710 the value being output-reloaded, because this implies
1711 it is not needed any more once the original insn completes.
1713 If that doesn't work, see we can use any of the registers that
1714 die in this insn as a reload register. We can if it is of the right
1715 class and does not appear in the value being output-reloaded. */
1718 combine_reloads (void)
1721 int output_reload = -1;
1722 int secondary_out = -1;
1725 /* Find the output reload; return unless there is exactly one
1726 and that one is mandatory. */
1728 for (i = 0; i < n_reloads; i++)
1729 if (rld[i].out != 0)
1731 if (output_reload >= 0)
1736 if (output_reload < 0 || rld[output_reload].optional)
1739 /* An input-output reload isn't combinable. */
1741 if (rld[output_reload].in != 0)
1744 /* If this reload is for an earlyclobber operand, we can't do anything. */
1745 if (earlyclobber_operand_p (rld[output_reload].out))
1748 /* If there is a reload for part of the address of this operand, we would
1749 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1750 its life to the point where doing this combine would not lower the
1751 number of spill registers needed. */
1752 for (i = 0; i < n_reloads; i++)
1753 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1754 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1755 && rld[i].opnum == rld[output_reload].opnum)
1758 /* Check each input reload; can we combine it? */
1760 for (i = 0; i < n_reloads; i++)
1761 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1762 /* Life span of this reload must not extend past main insn. */
1763 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1764 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1765 && rld[i].when_needed != RELOAD_OTHER
1766 && (CLASS_MAX_NREGS (rld[i].rclass, rld[i].inmode)
1767 == CLASS_MAX_NREGS (rld[output_reload].rclass,
1768 rld[output_reload].outmode))
1770 && rld[i].reg_rtx == 0
1771 #ifdef SECONDARY_MEMORY_NEEDED
1772 /* Don't combine two reloads with different secondary
1773 memory locations. */
1774 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1775 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1776 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1777 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1779 && (targetm.small_register_classes_for_mode_p (VOIDmode)
1780 ? (rld[i].rclass == rld[output_reload].rclass)
1781 : (reg_class_subset_p (rld[i].rclass,
1782 rld[output_reload].rclass)
1783 || reg_class_subset_p (rld[output_reload].rclass,
1785 && (MATCHES (rld[i].in, rld[output_reload].out)
1786 /* Args reversed because the first arg seems to be
1787 the one that we imagine being modified
1788 while the second is the one that might be affected. */
1789 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1791 /* However, if the input is a register that appears inside
1792 the output, then we also can't share.
1793 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1794 If the same reload reg is used for both reg 69 and the
1795 result to be stored in memory, then that result
1796 will clobber the address of the memory ref. */
1797 && ! (REG_P (rld[i].in)
1798 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1799 rld[output_reload].out))))
1800 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1801 rld[i].when_needed != RELOAD_FOR_INPUT)
1802 && (reg_class_size[(int) rld[i].rclass]
1803 || targetm.small_register_classes_for_mode_p (VOIDmode))
1804 /* We will allow making things slightly worse by combining an
1805 input and an output, but no worse than that. */
1806 && (rld[i].when_needed == RELOAD_FOR_INPUT
1807 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1811 /* We have found a reload to combine with! */
1812 rld[i].out = rld[output_reload].out;
1813 rld[i].out_reg = rld[output_reload].out_reg;
1814 rld[i].outmode = rld[output_reload].outmode;
1815 /* Mark the old output reload as inoperative. */
1816 rld[output_reload].out = 0;
1817 /* The combined reload is needed for the entire insn. */
1818 rld[i].when_needed = RELOAD_OTHER;
1819 /* If the output reload had a secondary reload, copy it. */
1820 if (rld[output_reload].secondary_out_reload != -1)
1822 rld[i].secondary_out_reload
1823 = rld[output_reload].secondary_out_reload;
1824 rld[i].secondary_out_icode
1825 = rld[output_reload].secondary_out_icode;
1828 #ifdef SECONDARY_MEMORY_NEEDED
1829 /* Copy any secondary MEM. */
1830 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1831 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1832 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1834 /* If required, minimize the register class. */
1835 if (reg_class_subset_p (rld[output_reload].rclass,
1837 rld[i].rclass = rld[output_reload].rclass;
1839 /* Transfer all replacements from the old reload to the combined. */
1840 for (j = 0; j < n_replacements; j++)
1841 if (replacements[j].what == output_reload)
1842 replacements[j].what = i;
1847 /* If this insn has only one operand that is modified or written (assumed
1848 to be the first), it must be the one corresponding to this reload. It
1849 is safe to use anything that dies in this insn for that output provided
1850 that it does not occur in the output (we already know it isn't an
1851 earlyclobber. If this is an asm insn, give up. */
1853 if (INSN_CODE (this_insn) == -1)
1856 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1857 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1858 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1861 /* See if some hard register that dies in this insn and is not used in
1862 the output is the right class. Only works if the register we pick
1863 up can fully hold our output reload. */
1864 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1865 if (REG_NOTE_KIND (note) == REG_DEAD
1866 && REG_P (XEXP (note, 0))
1867 && !reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1868 rld[output_reload].out)
1869 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1870 && HARD_REGNO_MODE_OK (regno, rld[output_reload].outmode)
1871 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
1873 && (hard_regno_nregs[regno][rld[output_reload].outmode]
1874 <= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))])
1875 /* Ensure that a secondary or tertiary reload for this output
1876 won't want this register. */
1877 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1878 || (!(TEST_HARD_REG_BIT
1879 (reg_class_contents[(int) rld[secondary_out].rclass], regno))
1880 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1881 || !(TEST_HARD_REG_BIT
1882 (reg_class_contents[(int) rld[secondary_out].rclass],
1884 && !fixed_regs[regno]
1885 /* Check that a former pseudo is valid; see find_dummy_reload. */
1886 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1887 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1888 ORIGINAL_REGNO (XEXP (note, 0)))
1889 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1)))
1891 rld[output_reload].reg_rtx
1892 = gen_rtx_REG (rld[output_reload].outmode, regno);
1897 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1898 See if one of IN and OUT is a register that may be used;
1899 this is desirable since a spill-register won't be needed.
1900 If so, return the register rtx that proves acceptable.
1902 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1903 RCLASS is the register class required for the reload.
1905 If FOR_REAL is >= 0, it is the number of the reload,
1906 and in some cases when it can be discovered that OUT doesn't need
1907 to be computed, clear out rld[FOR_REAL].out.
1909 If FOR_REAL is -1, this should not be done, because this call
1910 is just to see if a register can be found, not to find and install it.
1912 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1913 puts an additional constraint on being able to use IN for OUT since
1914 IN must not appear elsewhere in the insn (it is assumed that IN itself
1915 is safe from the earlyclobber). */
1918 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1919 enum machine_mode inmode, enum machine_mode outmode,
1920 reg_class_t rclass, int for_real, int earlyclobber)
1928 /* If operands exceed a word, we can't use either of them
1929 unless they have the same size. */
1930 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1931 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1932 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1935 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1936 respectively refers to a hard register. */
1938 /* Find the inside of any subregs. */
1939 while (GET_CODE (out) == SUBREG)
1941 if (REG_P (SUBREG_REG (out))
1942 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1943 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1944 GET_MODE (SUBREG_REG (out)),
1947 out = SUBREG_REG (out);
1949 while (GET_CODE (in) == SUBREG)
1951 if (REG_P (SUBREG_REG (in))
1952 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1953 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1954 GET_MODE (SUBREG_REG (in)),
1957 in = SUBREG_REG (in);
1960 /* Narrow down the reg class, the same way push_reload will;
1961 otherwise we might find a dummy now, but push_reload won't. */
1963 reg_class_t preferred_class = targetm.preferred_reload_class (in, rclass);
1964 if (preferred_class != NO_REGS)
1965 rclass = (enum reg_class) preferred_class;
1968 /* See if OUT will do. */
1970 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1972 unsigned int regno = REGNO (out) + out_offset;
1973 unsigned int nwords = hard_regno_nregs[regno][outmode];
1976 /* When we consider whether the insn uses OUT,
1977 ignore references within IN. They don't prevent us
1978 from copying IN into OUT, because those refs would
1979 move into the insn that reloads IN.
1981 However, we only ignore IN in its role as this reload.
1982 If the insn uses IN elsewhere and it contains OUT,
1983 that counts. We can't be sure it's the "same" operand
1984 so it might not go through this reload. */
1986 *inloc = const0_rtx;
1988 if (regno < FIRST_PSEUDO_REGISTER
1989 && HARD_REGNO_MODE_OK (regno, outmode)
1990 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1991 PATTERN (this_insn), outloc))
1995 for (i = 0; i < nwords; i++)
1996 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2002 if (REG_P (real_out))
2005 value = gen_rtx_REG (outmode, regno);
2012 /* Consider using IN if OUT was not acceptable
2013 or if OUT dies in this insn (like the quotient in a divmod insn).
2014 We can't use IN unless it is dies in this insn,
2015 which means we must know accurately which hard regs are live.
2016 Also, the result can't go in IN if IN is used within OUT,
2017 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2018 if (hard_regs_live_known
2020 && REGNO (in) < FIRST_PSEUDO_REGISTER
2022 || find_reg_note (this_insn, REG_UNUSED, real_out))
2023 && find_reg_note (this_insn, REG_DEAD, real_in)
2024 && !fixed_regs[REGNO (in)]
2025 && HARD_REGNO_MODE_OK (REGNO (in),
2026 /* The only case where out and real_out might
2027 have different modes is where real_out
2028 is a subreg, and in that case, out
2030 (GET_MODE (out) != VOIDmode
2031 ? GET_MODE (out) : outmode))
2032 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2033 /* However only do this if we can be sure that this input
2034 operand doesn't correspond with an uninitialized pseudo.
2035 global can assign some hardreg to it that is the same as
2036 the one assigned to a different, also live pseudo (as it
2037 can ignore the conflict). We must never introduce writes
2038 to such hardregs, as they would clobber the other live
2039 pseudo. See PR 20973. */
2040 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
2041 ORIGINAL_REGNO (in))
2042 /* Similarly, only do this if we can be sure that the death
2043 note is still valid. global can assign some hardreg to
2044 the pseudo referenced in the note and simultaneously a
2045 subword of this hardreg to a different, also live pseudo,
2046 because only another subword of the hardreg is actually
2047 used in the insn. This cannot happen if the pseudo has
2048 been assigned exactly one hardreg. See PR 33732. */
2049 && hard_regno_nregs[REGNO (in)][GET_MODE (in)] == 1)))
2051 unsigned int regno = REGNO (in) + in_offset;
2052 unsigned int nwords = hard_regno_nregs[regno][inmode];
2054 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2055 && ! hard_reg_set_here_p (regno, regno + nwords,
2056 PATTERN (this_insn))
2058 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2059 PATTERN (this_insn), inloc)))
2063 for (i = 0; i < nwords; i++)
2064 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2070 /* If we were going to use OUT as the reload reg
2071 and changed our mind, it means OUT is a dummy that
2072 dies here. So don't bother copying value to it. */
2073 if (for_real >= 0 && value == real_out)
2074 rld[for_real].out = 0;
2075 if (REG_P (real_in))
2078 value = gen_rtx_REG (inmode, regno);
2086 /* This page contains subroutines used mainly for determining
2087 whether the IN or an OUT of a reload can serve as the
2090 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2093 earlyclobber_operand_p (rtx x)
2097 for (i = 0; i < n_earlyclobbers; i++)
2098 if (reload_earlyclobbers[i] == x)
2104 /* Return 1 if expression X alters a hard reg in the range
2105 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2106 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2107 X should be the body of an instruction. */
2110 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2112 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2114 rtx op0 = SET_DEST (x);
2116 while (GET_CODE (op0) == SUBREG)
2117 op0 = SUBREG_REG (op0);
2120 unsigned int r = REGNO (op0);
2122 /* See if this reg overlaps range under consideration. */
2124 && end_hard_regno (GET_MODE (op0), r) > beg_regno)
2128 else if (GET_CODE (x) == PARALLEL)
2130 int i = XVECLEN (x, 0) - 1;
2133 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2140 /* Return 1 if ADDR is a valid memory address for mode MODE
2141 in address space AS, and check that each pseudo reg has the
2142 proper kind of hard reg. */
2145 strict_memory_address_addr_space_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2146 rtx addr, addr_space_t as)
2148 #ifdef GO_IF_LEGITIMATE_ADDRESS
2149 gcc_assert (ADDR_SPACE_GENERIC_P (as));
2150 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2156 return targetm.addr_space.legitimate_address_p (mode, addr, 1, as);
2160 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2161 if they are the same hard reg, and has special hacks for
2162 autoincrement and autodecrement.
2163 This is specifically intended for find_reloads to use
2164 in determining whether two operands match.
2165 X is the operand whose number is the lower of the two.
2167 The value is 2 if Y contains a pre-increment that matches
2168 a non-incrementing address in X. */
2170 /* ??? To be completely correct, we should arrange to pass
2171 for X the output operand and for Y the input operand.
2172 For now, we assume that the output operand has the lower number
2173 because that is natural in (SET output (... input ...)). */
2176 operands_match_p (rtx x, rtx y)
2179 RTX_CODE code = GET_CODE (x);
2185 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2186 && (REG_P (y) || (GET_CODE (y) == SUBREG
2187 && REG_P (SUBREG_REG (y)))))
2193 i = REGNO (SUBREG_REG (x));
2194 if (i >= FIRST_PSEUDO_REGISTER)
2196 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2197 GET_MODE (SUBREG_REG (x)),
2204 if (GET_CODE (y) == SUBREG)
2206 j = REGNO (SUBREG_REG (y));
2207 if (j >= FIRST_PSEUDO_REGISTER)
2209 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2210 GET_MODE (SUBREG_REG (y)),
2217 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2218 multiple hard register group of scalar integer registers, so that
2219 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2221 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2222 && SCALAR_INT_MODE_P (GET_MODE (x))
2223 && i < FIRST_PSEUDO_REGISTER)
2224 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2225 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2226 && SCALAR_INT_MODE_P (GET_MODE (y))
2227 && j < FIRST_PSEUDO_REGISTER)
2228 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2232 /* If two operands must match, because they are really a single
2233 operand of an assembler insn, then two postincrements are invalid
2234 because the assembler insn would increment only once.
2235 On the other hand, a postincrement matches ordinary indexing
2236 if the postincrement is the output operand. */
2237 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2238 return operands_match_p (XEXP (x, 0), y);
2239 /* Two preincrements are invalid
2240 because the assembler insn would increment only once.
2241 On the other hand, a preincrement matches ordinary indexing
2242 if the preincrement is the input operand.
2243 In this case, return 2, since some callers need to do special
2244 things when this happens. */
2245 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2246 || GET_CODE (y) == PRE_MODIFY)
2247 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2251 /* Now we have disposed of all the cases in which different rtx codes
2253 if (code != GET_CODE (y))
2256 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2257 if (GET_MODE (x) != GET_MODE (y))
2260 /* MEMs refering to different address space are not equivalent. */
2261 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2272 return XEXP (x, 0) == XEXP (y, 0);
2274 return XSTR (x, 0) == XSTR (y, 0);
2280 /* Compare the elements. If any pair of corresponding elements
2281 fail to match, return 0 for the whole things. */
2284 fmt = GET_RTX_FORMAT (code);
2285 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2291 if (XWINT (x, i) != XWINT (y, i))
2296 if (XINT (x, i) != XINT (y, i))
2301 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2304 /* If any subexpression returns 2,
2305 we should return 2 if we are successful. */
2314 if (XVECLEN (x, i) != XVECLEN (y, i))
2316 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2318 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2326 /* It is believed that rtx's at this level will never
2327 contain anything but integers and other rtx's,
2328 except for within LABEL_REFs and SYMBOL_REFs. */
2333 return 1 + success_2;
2336 /* Describe the range of registers or memory referenced by X.
2337 If X is a register, set REG_FLAG and put the first register
2338 number into START and the last plus one into END.
2339 If X is a memory reference, put a base address into BASE
2340 and a range of integer offsets into START and END.
2341 If X is pushing on the stack, we can assume it causes no trouble,
2342 so we set the SAFE field. */
2344 static struct decomposition
2347 struct decomposition val;
2350 memset (&val, 0, sizeof (val));
2352 switch (GET_CODE (x))
2356 rtx base = NULL_RTX, offset = 0;
2357 rtx addr = XEXP (x, 0);
2359 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2360 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2362 val.base = XEXP (addr, 0);
2363 val.start = -GET_MODE_SIZE (GET_MODE (x));
2364 val.end = GET_MODE_SIZE (GET_MODE (x));
2365 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2369 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2371 if (GET_CODE (XEXP (addr, 1)) == PLUS
2372 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2373 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2375 val.base = XEXP (addr, 0);
2376 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2377 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2378 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2383 if (GET_CODE (addr) == CONST)
2385 addr = XEXP (addr, 0);
2388 if (GET_CODE (addr) == PLUS)
2390 if (CONSTANT_P (XEXP (addr, 0)))
2392 base = XEXP (addr, 1);
2393 offset = XEXP (addr, 0);
2395 else if (CONSTANT_P (XEXP (addr, 1)))
2397 base = XEXP (addr, 0);
2398 offset = XEXP (addr, 1);
2405 offset = const0_rtx;
2407 if (GET_CODE (offset) == CONST)
2408 offset = XEXP (offset, 0);
2409 if (GET_CODE (offset) == PLUS)
2411 if (CONST_INT_P (XEXP (offset, 0)))
2413 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2414 offset = XEXP (offset, 0);
2416 else if (CONST_INT_P (XEXP (offset, 1)))
2418 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2419 offset = XEXP (offset, 1);
2423 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2424 offset = const0_rtx;
2427 else if (!CONST_INT_P (offset))
2429 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2430 offset = const0_rtx;
2433 if (all_const && GET_CODE (base) == PLUS)
2434 base = gen_rtx_CONST (GET_MODE (base), base);
2436 gcc_assert (CONST_INT_P (offset));
2438 val.start = INTVAL (offset);
2439 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2446 val.start = true_regnum (x);
2447 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2449 /* A pseudo with no hard reg. */
2450 val.start = REGNO (x);
2451 val.end = val.start + 1;
2455 val.end = end_hard_regno (GET_MODE (x), val.start);
2459 if (!REG_P (SUBREG_REG (x)))
2460 /* This could be more precise, but it's good enough. */
2461 return decompose (SUBREG_REG (x));
2463 val.start = true_regnum (x);
2464 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2465 return decompose (SUBREG_REG (x));
2468 val.end = val.start + subreg_nregs (x);
2472 /* This hasn't been assigned yet, so it can't conflict yet. */
2477 gcc_assert (CONSTANT_P (x));
2484 /* Return 1 if altering Y will not modify the value of X.
2485 Y is also described by YDATA, which should be decompose (Y). */
2488 immune_p (rtx x, rtx y, struct decomposition ydata)
2490 struct decomposition xdata;
2493 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2497 gcc_assert (MEM_P (y));
2498 /* If Y is memory and X is not, Y can't affect X. */
2502 xdata = decompose (x);
2504 if (! rtx_equal_p (xdata.base, ydata.base))
2506 /* If bases are distinct symbolic constants, there is no overlap. */
2507 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2509 /* Constants and stack slots never overlap. */
2510 if (CONSTANT_P (xdata.base)
2511 && (ydata.base == frame_pointer_rtx
2512 || ydata.base == hard_frame_pointer_rtx
2513 || ydata.base == stack_pointer_rtx))
2515 if (CONSTANT_P (ydata.base)
2516 && (xdata.base == frame_pointer_rtx
2517 || xdata.base == hard_frame_pointer_rtx
2518 || xdata.base == stack_pointer_rtx))
2520 /* If either base is variable, we don't know anything. */
2524 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2527 /* Similar, but calls decompose. */
2530 safe_from_earlyclobber (rtx op, rtx clobber)
2532 struct decomposition early_data;
2534 early_data = decompose (clobber);
2535 return immune_p (op, clobber, early_data);
2538 /* Main entry point of this file: search the body of INSN
2539 for values that need reloading and record them with push_reload.
2540 REPLACE nonzero means record also where the values occur
2541 so that subst_reloads can be used.
2543 IND_LEVELS says how many levels of indirection are supported by this
2544 machine; a value of zero means that a memory reference is not a valid
2547 LIVE_KNOWN says we have valid information about which hard
2548 regs are live at each point in the program; this is true when
2549 we are called from global_alloc but false when stupid register
2550 allocation has been done.
2552 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2553 which is nonnegative if the reg has been commandeered for reloading into.
2554 It is copied into STATIC_RELOAD_REG_P and referenced from there
2555 by various subroutines.
2557 Return TRUE if some operands need to be changed, because of swapping
2558 commutative operands, reg_equiv_address substitution, or whatever. */
2561 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2562 short *reload_reg_p)
2564 int insn_code_number;
2567 /* These start out as the constraints for the insn
2568 and they are chewed up as we consider alternatives. */
2569 const char *constraints[MAX_RECOG_OPERANDS];
2570 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2572 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2573 char pref_or_nothing[MAX_RECOG_OPERANDS];
2574 /* Nonzero for a MEM operand whose entire address needs a reload.
2575 May be -1 to indicate the entire address may or may not need a reload. */
2576 int address_reloaded[MAX_RECOG_OPERANDS];
2577 /* Nonzero for an address operand that needs to be completely reloaded.
2578 May be -1 to indicate the entire operand may or may not need a reload. */
2579 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2580 /* Value of enum reload_type to use for operand. */
2581 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2582 /* Value of enum reload_type to use within address of operand. */
2583 enum reload_type address_type[MAX_RECOG_OPERANDS];
2584 /* Save the usage of each operand. */
2585 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2586 int no_input_reloads = 0, no_output_reloads = 0;
2588 reg_class_t this_alternative[MAX_RECOG_OPERANDS];
2589 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2590 char this_alternative_win[MAX_RECOG_OPERANDS];
2591 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2592 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2593 int this_alternative_matches[MAX_RECOG_OPERANDS];
2595 reg_class_t goal_alternative[MAX_RECOG_OPERANDS];
2596 int this_alternative_number;
2597 int goal_alternative_number = 0;
2598 int operand_reloadnum[MAX_RECOG_OPERANDS];
2599 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2600 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2601 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2602 char goal_alternative_win[MAX_RECOG_OPERANDS];
2603 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2604 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2605 int goal_alternative_swapped;
2608 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2609 rtx substed_operand[MAX_RECOG_OPERANDS];
2610 rtx body = PATTERN (insn);
2611 rtx set = single_set (insn);
2612 int goal_earlyclobber = 0, this_earlyclobber;
2613 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2619 n_earlyclobbers = 0;
2620 replace_reloads = replace;
2621 hard_regs_live_known = live_known;
2622 static_reload_reg_p = reload_reg_p;
2624 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2625 neither are insns that SET cc0. Insns that use CC0 are not allowed
2626 to have any input reloads. */
2627 if (JUMP_P (insn) || CALL_P (insn))
2628 no_output_reloads = 1;
2631 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2632 no_input_reloads = 1;
2633 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2634 no_output_reloads = 1;
2637 #ifdef SECONDARY_MEMORY_NEEDED
2638 /* The eliminated forms of any secondary memory locations are per-insn, so
2639 clear them out here. */
2641 if (secondary_memlocs_elim_used)
2643 memset (secondary_memlocs_elim, 0,
2644 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2645 secondary_memlocs_elim_used = 0;
2649 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2650 is cheap to move between them. If it is not, there may not be an insn
2651 to do the copy, so we may need a reload. */
2652 if (GET_CODE (body) == SET
2653 && REG_P (SET_DEST (body))
2654 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2655 && REG_P (SET_SRC (body))
2656 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2657 && register_move_cost (GET_MODE (SET_SRC (body)),
2658 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2659 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2662 extract_insn (insn);
2664 noperands = reload_n_operands = recog_data.n_operands;
2665 n_alternatives = recog_data.n_alternatives;
2667 /* Just return "no reloads" if insn has no operands with constraints. */
2668 if (noperands == 0 || n_alternatives == 0)
2671 insn_code_number = INSN_CODE (insn);
2672 this_insn_is_asm = insn_code_number < 0;
2674 memcpy (operand_mode, recog_data.operand_mode,
2675 noperands * sizeof (enum machine_mode));
2676 memcpy (constraints, recog_data.constraints,
2677 noperands * sizeof (const char *));
2681 /* If we will need to know, later, whether some pair of operands
2682 are the same, we must compare them now and save the result.
2683 Reloading the base and index registers will clobber them
2684 and afterward they will fail to match. */
2686 for (i = 0; i < noperands; i++)
2692 substed_operand[i] = recog_data.operand[i];
2695 modified[i] = RELOAD_READ;
2697 /* Scan this operand's constraint to see if it is an output operand,
2698 an in-out operand, is commutative, or should match another. */
2702 p += CONSTRAINT_LEN (c, p);
2706 modified[i] = RELOAD_WRITE;
2709 modified[i] = RELOAD_READ_WRITE;
2713 /* The last operand should not be marked commutative. */
2714 gcc_assert (i != noperands - 1);
2716 /* We currently only support one commutative pair of
2717 operands. Some existing asm code currently uses more
2718 than one pair. Previously, that would usually work,
2719 but sometimes it would crash the compiler. We
2720 continue supporting that case as well as we can by
2721 silently ignoring all but the first pair. In the
2722 future we may handle it correctly. */
2723 if (commutative < 0)
2726 gcc_assert (this_insn_is_asm);
2729 /* Use of ISDIGIT is tempting here, but it may get expensive because
2730 of locale support we don't want. */
2731 case '0': case '1': case '2': case '3': case '4':
2732 case '5': case '6': case '7': case '8': case '9':
2734 c = strtoul (p - 1, &end, 10);
2737 operands_match[c][i]
2738 = operands_match_p (recog_data.operand[c],
2739 recog_data.operand[i]);
2741 /* An operand may not match itself. */
2742 gcc_assert (c != i);
2744 /* If C can be commuted with C+1, and C might need to match I,
2745 then C+1 might also need to match I. */
2746 if (commutative >= 0)
2748 if (c == commutative || c == commutative + 1)
2750 int other = c + (c == commutative ? 1 : -1);
2751 operands_match[other][i]
2752 = operands_match_p (recog_data.operand[other],
2753 recog_data.operand[i]);
2755 if (i == commutative || i == commutative + 1)
2757 int other = i + (i == commutative ? 1 : -1);
2758 operands_match[c][other]
2759 = operands_match_p (recog_data.operand[c],
2760 recog_data.operand[other]);
2762 /* Note that C is supposed to be less than I.
2763 No need to consider altering both C and I because in
2764 that case we would alter one into the other. */
2771 /* Examine each operand that is a memory reference or memory address
2772 and reload parts of the addresses into index registers.
2773 Also here any references to pseudo regs that didn't get hard regs
2774 but are equivalent to constants get replaced in the insn itself
2775 with those constants. Nobody will ever see them again.
2777 Finally, set up the preferred classes of each operand. */
2779 for (i = 0; i < noperands; i++)
2781 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2783 address_reloaded[i] = 0;
2784 address_operand_reloaded[i] = 0;
2785 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2786 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2789 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2790 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2793 if (*constraints[i] == 0)
2794 /* Ignore things like match_operator operands. */
2796 else if (constraints[i][0] == 'p'
2797 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2799 address_operand_reloaded[i]
2800 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2801 recog_data.operand[i],
2802 recog_data.operand_loc[i],
2803 i, operand_type[i], ind_levels, insn);
2805 /* If we now have a simple operand where we used to have a
2806 PLUS or MULT, re-recognize and try again. */
2807 if ((OBJECT_P (*recog_data.operand_loc[i])
2808 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2809 && (GET_CODE (recog_data.operand[i]) == MULT
2810 || GET_CODE (recog_data.operand[i]) == PLUS))
2812 INSN_CODE (insn) = -1;
2813 retval = find_reloads (insn, replace, ind_levels, live_known,
2818 recog_data.operand[i] = *recog_data.operand_loc[i];
2819 substed_operand[i] = recog_data.operand[i];
2821 /* Address operands are reloaded in their existing mode,
2822 no matter what is specified in the machine description. */
2823 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2825 else if (code == MEM)
2828 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2829 recog_data.operand_loc[i],
2830 XEXP (recog_data.operand[i], 0),
2831 &XEXP (recog_data.operand[i], 0),
2832 i, address_type[i], ind_levels, insn);
2833 recog_data.operand[i] = *recog_data.operand_loc[i];
2834 substed_operand[i] = recog_data.operand[i];
2836 else if (code == SUBREG)
2838 rtx reg = SUBREG_REG (recog_data.operand[i]);
2840 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2843 && &SET_DEST (set) == recog_data.operand_loc[i],
2845 &address_reloaded[i]);
2847 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2848 that didn't get a hard register, emit a USE with a REG_EQUAL
2849 note in front so that we might inherit a previous, possibly
2855 && (GET_MODE_SIZE (GET_MODE (reg))
2856 >= GET_MODE_SIZE (GET_MODE (op)))
2857 && reg_equiv_constant (REGNO (reg)) == 0)
2858 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2860 REG_EQUAL, reg_equiv_memory_loc (REGNO (reg)));
2862 substed_operand[i] = recog_data.operand[i] = op;
2864 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2865 /* We can get a PLUS as an "operand" as a result of register
2866 elimination. See eliminate_regs and gen_reload. We handle
2867 a unary operator by reloading the operand. */
2868 substed_operand[i] = recog_data.operand[i]
2869 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2870 ind_levels, 0, insn,
2871 &address_reloaded[i]);
2872 else if (code == REG)
2874 /* This is equivalent to calling find_reloads_toplev.
2875 The code is duplicated for speed.
2876 When we find a pseudo always equivalent to a constant,
2877 we replace it by the constant. We must be sure, however,
2878 that we don't try to replace it in the insn in which it
2880 int regno = REGNO (recog_data.operand[i]);
2881 if (reg_equiv_constant (regno) != 0
2882 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2884 /* Record the existing mode so that the check if constants are
2885 allowed will work when operand_mode isn't specified. */
2887 if (operand_mode[i] == VOIDmode)
2888 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2890 substed_operand[i] = recog_data.operand[i]
2891 = reg_equiv_constant (regno);
2893 if (reg_equiv_memory_loc (regno) != 0
2894 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
2895 /* We need not give a valid is_set_dest argument since the case
2896 of a constant equivalence was checked above. */
2897 substed_operand[i] = recog_data.operand[i]
2898 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2899 ind_levels, 0, insn,
2900 &address_reloaded[i]);
2902 /* If the operand is still a register (we didn't replace it with an
2903 equivalent), get the preferred class to reload it into. */
2904 code = GET_CODE (recog_data.operand[i]);
2906 = ((code == REG && REGNO (recog_data.operand[i])
2907 >= FIRST_PSEUDO_REGISTER)
2908 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2912 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2913 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2916 /* If this is simply a copy from operand 1 to operand 0, merge the
2917 preferred classes for the operands. */
2918 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2919 && recog_data.operand[1] == SET_SRC (set))
2921 preferred_class[0] = preferred_class[1]
2922 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2923 pref_or_nothing[0] |= pref_or_nothing[1];
2924 pref_or_nothing[1] |= pref_or_nothing[0];
2927 /* Now see what we need for pseudo-regs that didn't get hard regs
2928 or got the wrong kind of hard reg. For this, we must consider
2929 all the operands together against the register constraints. */
2931 best = MAX_RECOG_OPERANDS * 2 + 600;
2934 goal_alternative_swapped = 0;
2937 /* The constraints are made of several alternatives.
2938 Each operand's constraint looks like foo,bar,... with commas
2939 separating the alternatives. The first alternatives for all
2940 operands go together, the second alternatives go together, etc.
2942 First loop over alternatives. */
2944 for (this_alternative_number = 0;
2945 this_alternative_number < n_alternatives;
2946 this_alternative_number++)
2948 /* Loop over operands for one constraint alternative. */
2949 /* LOSERS counts those that don't fit this alternative
2950 and would require loading. */
2952 /* BAD is set to 1 if it some operand can't fit this alternative
2953 even after reloading. */
2955 /* REJECT is a count of how undesirable this alternative says it is
2956 if any reloading is required. If the alternative matches exactly
2957 then REJECT is ignored, but otherwise it gets this much
2958 counted against it in addition to the reloading needed. Each
2959 ? counts three times here since we want the disparaging caused by
2960 a bad register class to only count 1/3 as much. */
2963 if (!recog_data.alternative_enabled_p[this_alternative_number])
2967 for (i = 0; i < recog_data.n_operands; i++)
2968 constraints[i] = skip_alternative (constraints[i]);
2973 this_earlyclobber = 0;
2975 for (i = 0; i < noperands; i++)
2977 const char *p = constraints[i];
2982 /* 0 => this operand can be reloaded somehow for this alternative. */
2984 /* 0 => this operand can be reloaded if the alternative allows regs. */
2988 rtx operand = recog_data.operand[i];
2990 /* Nonzero means this is a MEM that must be reloaded into a reg
2991 regardless of what the constraint says. */
2992 int force_reload = 0;
2994 /* Nonzero if a constant forced into memory would be OK for this
2997 int earlyclobber = 0;
2999 /* If the predicate accepts a unary operator, it means that
3000 we need to reload the operand, but do not do this for
3001 match_operator and friends. */
3002 if (UNARY_P (operand) && *p != 0)
3003 operand = XEXP (operand, 0);
3005 /* If the operand is a SUBREG, extract
3006 the REG or MEM (or maybe even a constant) within.
3007 (Constants can occur as a result of reg_equiv_constant.) */
3009 while (GET_CODE (operand) == SUBREG)
3011 /* Offset only matters when operand is a REG and
3012 it is a hard reg. This is because it is passed
3013 to reg_fits_class_p if it is a REG and all pseudos
3014 return 0 from that function. */
3015 if (REG_P (SUBREG_REG (operand))
3016 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
3018 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand)),
3019 GET_MODE (SUBREG_REG (operand)),
3020 SUBREG_BYTE (operand),
3021 GET_MODE (operand)) < 0)
3023 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
3024 GET_MODE (SUBREG_REG (operand)),
3025 SUBREG_BYTE (operand),
3026 GET_MODE (operand));
3028 operand = SUBREG_REG (operand);
3029 /* Force reload if this is a constant or PLUS or if there may
3030 be a problem accessing OPERAND in the outer mode. */
3031 if (CONSTANT_P (operand)
3032 || GET_CODE (operand) == PLUS
3033 /* We must force a reload of paradoxical SUBREGs
3034 of a MEM because the alignment of the inner value
3035 may not be enough to do the outer reference. On
3036 big-endian machines, it may also reference outside
3039 On machines that extend byte operations and we have a
3040 SUBREG where both the inner and outer modes are no wider
3041 than a word and the inner mode is narrower, is integral,
3042 and gets extended when loaded from memory, combine.c has
3043 made assumptions about the behavior of the machine in such
3044 register access. If the data is, in fact, in memory we
3045 must always load using the size assumed to be in the
3046 register and let the insn do the different-sized
3049 This is doubly true if WORD_REGISTER_OPERATIONS. In
3050 this case eliminate_regs has left non-paradoxical
3051 subregs for push_reload to see. Make sure it does
3052 by forcing the reload.
3054 ??? When is it right at this stage to have a subreg
3055 of a mem that is _not_ to be handled specially? IMO
3056 those should have been reduced to just a mem. */
3057 || ((MEM_P (operand)
3059 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3060 #ifndef WORD_REGISTER_OPERATIONS
3061 && (((GET_MODE_BITSIZE (GET_MODE (operand))
3062 < BIGGEST_ALIGNMENT)
3063 && (GET_MODE_SIZE (operand_mode[i])
3064 > GET_MODE_SIZE (GET_MODE (operand))))
3066 #ifdef LOAD_EXTEND_OP
3067 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3068 && (GET_MODE_SIZE (GET_MODE (operand))
3070 && (GET_MODE_SIZE (operand_mode[i])
3071 > GET_MODE_SIZE (GET_MODE (operand)))
3072 && INTEGRAL_MODE_P (GET_MODE (operand))
3073 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3082 this_alternative[i] = NO_REGS;
3083 this_alternative_win[i] = 0;
3084 this_alternative_match_win[i] = 0;
3085 this_alternative_offmemok[i] = 0;
3086 this_alternative_earlyclobber[i] = 0;
3087 this_alternative_matches[i] = -1;
3089 /* An empty constraint or empty alternative
3090 allows anything which matched the pattern. */
3091 if (*p == 0 || *p == ',')
3094 /* Scan this alternative's specs for this operand;
3095 set WIN if the operand fits any letter in this alternative.
3096 Otherwise, clear BADOP if this operand could
3097 fit some letter after reloads,
3098 or set WINREG if this operand could fit after reloads
3099 provided the constraint allows some registers. */
3102 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3111 case '=': case '+': case '*':
3115 /* We only support one commutative marker, the first
3116 one. We already set commutative above. */
3128 /* Ignore rest of this alternative as far as
3129 reloading is concerned. */
3132 while (*p && *p != ',');
3136 case '0': case '1': case '2': case '3': case '4':
3137 case '5': case '6': case '7': case '8': case '9':
3138 m = strtoul (p, &end, 10);
3142 this_alternative_matches[i] = m;
3143 /* We are supposed to match a previous operand.
3144 If we do, we win if that one did.
3145 If we do not, count both of the operands as losers.
3146 (This is too conservative, since most of the time
3147 only a single reload insn will be needed to make
3148 the two operands win. As a result, this alternative
3149 may be rejected when it is actually desirable.) */
3150 if ((swapped && (m != commutative || i != commutative + 1))
3151 /* If we are matching as if two operands were swapped,
3152 also pretend that operands_match had been computed
3154 But if I is the second of those and C is the first,
3155 don't exchange them, because operands_match is valid
3156 only on one side of its diagonal. */
3158 [(m == commutative || m == commutative + 1)
3159 ? 2 * commutative + 1 - m : m]
3160 [(i == commutative || i == commutative + 1)
3161 ? 2 * commutative + 1 - i : i])
3162 : operands_match[m][i])
3164 /* If we are matching a non-offsettable address where an
3165 offsettable address was expected, then we must reject
3166 this combination, because we can't reload it. */
3167 if (this_alternative_offmemok[m]
3168 && MEM_P (recog_data.operand[m])
3169 && this_alternative[m] == NO_REGS
3170 && ! this_alternative_win[m])
3173 did_match = this_alternative_win[m];
3177 /* Operands don't match. */
3180 /* Retroactively mark the operand we had to match
3181 as a loser, if it wasn't already. */
3182 if (this_alternative_win[m])
3184 this_alternative_win[m] = 0;
3185 if (this_alternative[m] == NO_REGS)
3187 /* But count the pair only once in the total badness of
3188 this alternative, if the pair can be a dummy reload.
3189 The pointers in operand_loc are not swapped; swap
3190 them by hand if necessary. */
3191 if (swapped && i == commutative)
3192 loc1 = commutative + 1;
3193 else if (swapped && i == commutative + 1)
3197 if (swapped && m == commutative)
3198 loc2 = commutative + 1;
3199 else if (swapped && m == commutative + 1)
3204 = find_dummy_reload (recog_data.operand[i],
3205 recog_data.operand[m],
3206 recog_data.operand_loc[loc1],
3207 recog_data.operand_loc[loc2],
3208 operand_mode[i], operand_mode[m],
3209 this_alternative[m], -1,
3210 this_alternative_earlyclobber[m]);
3215 /* This can be fixed with reloads if the operand
3216 we are supposed to match can be fixed with reloads. */
3218 this_alternative[i] = this_alternative[m];
3220 /* If we have to reload this operand and some previous
3221 operand also had to match the same thing as this
3222 operand, we don't know how to do that. So reject this
3224 if (! did_match || force_reload)
3225 for (j = 0; j < i; j++)
3226 if (this_alternative_matches[j]
3227 == this_alternative_matches[i])
3232 /* All necessary reloads for an address_operand
3233 were handled in find_reloads_address. */
3234 this_alternative[i] = base_reg_class (VOIDmode, ADDRESS,
3240 case TARGET_MEM_CONSTRAINT:
3245 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3246 && reg_renumber[REGNO (operand)] < 0))
3248 if (CONST_POOL_OK_P (operand_mode[i], operand))
3255 && ! address_reloaded[i]
3256 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3257 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3263 && ! address_reloaded[i]
3264 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3265 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3269 /* Memory operand whose address is not offsettable. */
3274 && ! (ind_levels ? offsettable_memref_p (operand)
3275 : offsettable_nonstrict_memref_p (operand))
3276 /* Certain mem addresses will become offsettable
3277 after they themselves are reloaded. This is important;
3278 we don't want our own handling of unoffsettables
3279 to override the handling of reg_equiv_address. */
3280 && !(REG_P (XEXP (operand, 0))
3282 || reg_equiv_address (REGNO (XEXP (operand, 0))) != 0)))
3286 /* Memory operand whose address is offsettable. */
3290 if ((MEM_P (operand)
3291 /* If IND_LEVELS, find_reloads_address won't reload a
3292 pseudo that didn't get a hard reg, so we have to
3293 reject that case. */
3294 && ((ind_levels ? offsettable_memref_p (operand)
3295 : offsettable_nonstrict_memref_p (operand))
3296 /* A reloaded address is offsettable because it is now
3297 just a simple register indirect. */
3298 || address_reloaded[i] == 1))
3300 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3301 && reg_renumber[REGNO (operand)] < 0
3302 /* If reg_equiv_address is nonzero, we will be
3303 loading it into a register; hence it will be
3304 offsettable, but we cannot say that reg_equiv_mem
3305 is offsettable without checking. */
3306 && ((reg_equiv_mem (REGNO (operand)) != 0
3307 && offsettable_memref_p (reg_equiv_mem (REGNO (operand))))
3308 || (reg_equiv_address (REGNO (operand)) != 0))))
3310 if (CONST_POOL_OK_P (operand_mode[i], operand)
3318 /* Output operand that is stored before the need for the
3319 input operands (and their index registers) is over. */
3320 earlyclobber = 1, this_earlyclobber = 1;
3325 if (GET_CODE (operand) == CONST_DOUBLE
3326 || (GET_CODE (operand) == CONST_VECTOR
3327 && (GET_MODE_CLASS (GET_MODE (operand))
3328 == MODE_VECTOR_FLOAT)))
3334 if (GET_CODE (operand) == CONST_DOUBLE
3335 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3340 if (CONST_INT_P (operand)
3341 || (GET_CODE (operand) == CONST_DOUBLE
3342 && GET_MODE (operand) == VOIDmode))
3345 if (CONSTANT_P (operand)
3346 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3351 if (CONST_INT_P (operand)
3352 || (GET_CODE (operand) == CONST_DOUBLE
3353 && GET_MODE (operand) == VOIDmode))
3365 if (CONST_INT_P (operand)
3366 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3377 /* A PLUS is never a valid operand, but reload can make
3378 it from a register when eliminating registers. */
3379 && GET_CODE (operand) != PLUS
3380 /* A SCRATCH is not a valid operand. */
3381 && GET_CODE (operand) != SCRATCH
3382 && (! CONSTANT_P (operand)
3384 || LEGITIMATE_PIC_OPERAND_P (operand))
3385 && (GENERAL_REGS == ALL_REGS
3387 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3388 && reg_renumber[REGNO (operand)] < 0)))
3390 /* Drop through into 'r' case. */
3394 = reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3398 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3400 #ifdef EXTRA_CONSTRAINT_STR
3401 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3405 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3407 /* If the address was already reloaded,
3409 else if (MEM_P (operand)
3410 && address_reloaded[i] == 1)
3412 /* Likewise if the address will be reloaded because
3413 reg_equiv_address is nonzero. For reg_equiv_mem
3414 we have to check. */
3415 else if (REG_P (operand)
3416 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3417 && reg_renumber[REGNO (operand)] < 0
3418 && ((reg_equiv_mem (REGNO (operand)) != 0
3419 && EXTRA_CONSTRAINT_STR (reg_equiv_mem (REGNO (operand)), c, p))
3420 || (reg_equiv_address (REGNO (operand)) != 0)))
3423 /* If we didn't already win, we can reload
3424 constants via force_const_mem, and other
3425 MEMs by reloading the address like for 'o'. */
3426 if (CONST_POOL_OK_P (operand_mode[i], operand)
3433 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3435 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3438 /* If we didn't already win, we can reload
3439 the address into a base register. */
3440 this_alternative[i] = base_reg_class (VOIDmode,
3447 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3454 = (reg_class_subunion
3455 [this_alternative[i]]
3456 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3458 if (GET_MODE (operand) == BLKmode)
3462 && reg_fits_class_p (operand, this_alternative[i],
3463 offset, GET_MODE (recog_data.operand[i])))
3467 while ((p += len), c);
3471 /* If this operand could be handled with a reg,
3472 and some reg is allowed, then this operand can be handled. */
3473 if (winreg && this_alternative[i] != NO_REGS
3474 && (win || !class_only_fixed_regs[this_alternative[i]]))
3477 /* Record which operands fit this alternative. */
3478 this_alternative_earlyclobber[i] = earlyclobber;
3479 if (win && ! force_reload)
3480 this_alternative_win[i] = 1;
3481 else if (did_match && ! force_reload)
3482 this_alternative_match_win[i] = 1;
3485 int const_to_mem = 0;
3487 this_alternative_offmemok[i] = offmemok;
3491 /* Alternative loses if it has no regs for a reg operand. */
3493 && this_alternative[i] == NO_REGS
3494 && this_alternative_matches[i] < 0)
3497 /* If this is a constant that is reloaded into the desired
3498 class by copying it to memory first, count that as another
3499 reload. This is consistent with other code and is
3500 required to avoid choosing another alternative when
3501 the constant is moved into memory by this function on
3502 an early reload pass. Note that the test here is
3503 precisely the same as in the code below that calls
3505 if (CONST_POOL_OK_P (operand_mode[i], operand)
3506 && ((targetm.preferred_reload_class (operand,
3507 this_alternative[i])
3509 || no_input_reloads))
3512 if (this_alternative[i] != NO_REGS)
3516 /* Alternative loses if it requires a type of reload not
3517 permitted for this insn. We can always reload SCRATCH
3518 and objects with a REG_UNUSED note. */
3519 if (GET_CODE (operand) != SCRATCH
3520 && modified[i] != RELOAD_READ && no_output_reloads
3521 && ! find_reg_note (insn, REG_UNUSED, operand))
3523 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3527 /* If we can't reload this value at all, reject this
3528 alternative. Note that we could also lose due to
3529 LIMIT_RELOAD_CLASS, but we don't check that
3532 if (! CONSTANT_P (operand) && this_alternative[i] != NO_REGS)
3534 if (targetm.preferred_reload_class (operand, this_alternative[i])
3538 if (operand_type[i] == RELOAD_FOR_OUTPUT
3539 && (targetm.preferred_output_reload_class (operand,
3540 this_alternative[i])
3545 /* We prefer to reload pseudos over reloading other things,
3546 since such reloads may be able to be eliminated later.
3547 If we are reloading a SCRATCH, we won't be generating any
3548 insns, just using a register, so it is also preferred.
3549 So bump REJECT in other cases. Don't do this in the
3550 case where we are forcing a constant into memory and
3551 it will then win since we don't want to have a different
3552 alternative match then. */
3553 if (! (REG_P (operand)
3554 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3555 && GET_CODE (operand) != SCRATCH
3556 && ! (const_to_mem && constmemok))
3559 /* Input reloads can be inherited more often than output
3560 reloads can be removed, so penalize output reloads. */
3561 if (operand_type[i] != RELOAD_FOR_INPUT
3562 && GET_CODE (operand) != SCRATCH)
3566 /* If this operand is a pseudo register that didn't get a hard
3567 reg and this alternative accepts some register, see if the
3568 class that we want is a subset of the preferred class for this
3569 register. If not, but it intersects that class, use the
3570 preferred class instead. If it does not intersect the preferred
3571 class, show that usage of this alternative should be discouraged;
3572 it will be discouraged more still if the register is `preferred
3573 or nothing'. We do this because it increases the chance of
3574 reusing our spill register in a later insn and avoiding a pair
3575 of memory stores and loads.
3577 Don't bother with this if this alternative will accept this
3580 Don't do this for a multiword operand, since it is only a
3581 small win and has the risk of requiring more spill registers,
3582 which could cause a large loss.
3584 Don't do this if the preferred class has only one register
3585 because we might otherwise exhaust the class. */
3587 if (! win && ! did_match
3588 && this_alternative[i] != NO_REGS
3589 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3590 && reg_class_size [(int) preferred_class[i]] > 0
3591 && ! small_register_class_p (preferred_class[i]))
3593 if (! reg_class_subset_p (this_alternative[i],
3594 preferred_class[i]))
3596 /* Since we don't have a way of forming the intersection,
3597 we just do something special if the preferred class
3598 is a subset of the class we have; that's the most
3599 common case anyway. */
3600 if (reg_class_subset_p (preferred_class[i],
3601 this_alternative[i]))
3602 this_alternative[i] = preferred_class[i];
3604 reject += (2 + 2 * pref_or_nothing[i]);
3609 /* Now see if any output operands that are marked "earlyclobber"
3610 in this alternative conflict with any input operands
3611 or any memory addresses. */
3613 for (i = 0; i < noperands; i++)
3614 if (this_alternative_earlyclobber[i]
3615 && (this_alternative_win[i] || this_alternative_match_win[i]))
3617 struct decomposition early_data;
3619 early_data = decompose (recog_data.operand[i]);
3621 gcc_assert (modified[i] != RELOAD_READ);
3623 if (this_alternative[i] == NO_REGS)
3625 this_alternative_earlyclobber[i] = 0;
3626 gcc_assert (this_insn_is_asm);
3627 error_for_asm (this_insn,
3628 "%<&%> constraint used with no register class");
3631 for (j = 0; j < noperands; j++)
3632 /* Is this an input operand or a memory ref? */
3633 if ((MEM_P (recog_data.operand[j])
3634 || modified[j] != RELOAD_WRITE)
3636 /* Ignore things like match_operator operands. */
3637 && !recog_data.is_operator[j]
3638 /* Don't count an input operand that is constrained to match
3639 the early clobber operand. */
3640 && ! (this_alternative_matches[j] == i
3641 && rtx_equal_p (recog_data.operand[i],
3642 recog_data.operand[j]))
3643 /* Is it altered by storing the earlyclobber operand? */
3644 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3647 /* If the output is in a non-empty few-regs class,
3648 it's costly to reload it, so reload the input instead. */
3649 if (small_register_class_p (this_alternative[i])
3650 && (REG_P (recog_data.operand[j])
3651 || GET_CODE (recog_data.operand[j]) == SUBREG))
3654 this_alternative_win[j] = 0;
3655 this_alternative_match_win[j] = 0;
3660 /* If an earlyclobber operand conflicts with something,
3661 it must be reloaded, so request this and count the cost. */
3665 this_alternative_win[i] = 0;
3666 this_alternative_match_win[j] = 0;
3667 for (j = 0; j < noperands; j++)
3668 if (this_alternative_matches[j] == i
3669 && this_alternative_match_win[j])
3671 this_alternative_win[j] = 0;
3672 this_alternative_match_win[j] = 0;
3678 /* If one alternative accepts all the operands, no reload required,
3679 choose that alternative; don't consider the remaining ones. */
3682 /* Unswap these so that they are never swapped at `finish'. */
3683 if (commutative >= 0)
3685 recog_data.operand[commutative] = substed_operand[commutative];
3686 recog_data.operand[commutative + 1]
3687 = substed_operand[commutative + 1];
3689 for (i = 0; i < noperands; i++)
3691 goal_alternative_win[i] = this_alternative_win[i];
3692 goal_alternative_match_win[i] = this_alternative_match_win[i];
3693 goal_alternative[i] = this_alternative[i];
3694 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3695 goal_alternative_matches[i] = this_alternative_matches[i];
3696 goal_alternative_earlyclobber[i]
3697 = this_alternative_earlyclobber[i];
3699 goal_alternative_number = this_alternative_number;
3700 goal_alternative_swapped = swapped;
3701 goal_earlyclobber = this_earlyclobber;
3705 /* REJECT, set by the ! and ? constraint characters and when a register
3706 would be reloaded into a non-preferred class, discourages the use of
3707 this alternative for a reload goal. REJECT is incremented by six
3708 for each ? and two for each non-preferred class. */
3709 losers = losers * 6 + reject;
3711 /* If this alternative can be made to work by reloading,
3712 and it needs less reloading than the others checked so far,
3713 record it as the chosen goal for reloading. */
3718 for (i = 0; i < noperands; i++)
3720 goal_alternative[i] = this_alternative[i];
3721 goal_alternative_win[i] = this_alternative_win[i];
3722 goal_alternative_match_win[i]
3723 = this_alternative_match_win[i];
3724 goal_alternative_offmemok[i]
3725 = this_alternative_offmemok[i];
3726 goal_alternative_matches[i] = this_alternative_matches[i];
3727 goal_alternative_earlyclobber[i]
3728 = this_alternative_earlyclobber[i];
3730 goal_alternative_swapped = swapped;
3732 goal_alternative_number = this_alternative_number;
3733 goal_earlyclobber = this_earlyclobber;
3738 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3739 then we need to try each alternative twice,
3740 the second time matching those two operands
3741 as if we had exchanged them.
3742 To do this, really exchange them in operands.
3744 If we have just tried the alternatives the second time,
3745 return operands to normal and drop through. */
3747 if (commutative >= 0)
3752 enum reg_class tclass;
3755 recog_data.operand[commutative] = substed_operand[commutative + 1];
3756 recog_data.operand[commutative + 1] = substed_operand[commutative];
3757 /* Swap the duplicates too. */
3758 for (i = 0; i < recog_data.n_dups; i++)
3759 if (recog_data.dup_num[i] == commutative
3760 || recog_data.dup_num[i] == commutative + 1)
3761 *recog_data.dup_loc[i]
3762 = recog_data.operand[(int) recog_data.dup_num[i]];
3764 tclass = preferred_class[commutative];
3765 preferred_class[commutative] = preferred_class[commutative + 1];
3766 preferred_class[commutative + 1] = tclass;
3768 t = pref_or_nothing[commutative];
3769 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3770 pref_or_nothing[commutative + 1] = t;
3772 t = address_reloaded[commutative];
3773 address_reloaded[commutative] = address_reloaded[commutative + 1];
3774 address_reloaded[commutative + 1] = t;
3776 memcpy (constraints, recog_data.constraints,
3777 noperands * sizeof (const char *));
3782 recog_data.operand[commutative] = substed_operand[commutative];
3783 recog_data.operand[commutative + 1]
3784 = substed_operand[commutative + 1];
3785 /* Unswap the duplicates too. */
3786 for (i = 0; i < recog_data.n_dups; i++)
3787 if (recog_data.dup_num[i] == commutative
3788 || recog_data.dup_num[i] == commutative + 1)
3789 *recog_data.dup_loc[i]
3790 = recog_data.operand[(int) recog_data.dup_num[i]];
3794 /* The operands don't meet the constraints.
3795 goal_alternative describes the alternative
3796 that we could reach by reloading the fewest operands.
3797 Reload so as to fit it. */
3799 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3801 /* No alternative works with reloads?? */
3802 if (insn_code_number >= 0)
3803 fatal_insn ("unable to generate reloads for:", insn);
3804 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3805 /* Avoid further trouble with this insn. */
3806 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3811 /* Jump to `finish' from above if all operands are valid already.
3812 In that case, goal_alternative_win is all 1. */
3815 /* Right now, for any pair of operands I and J that are required to match,
3817 goal_alternative_matches[J] is I.
3818 Set up goal_alternative_matched as the inverse function:
3819 goal_alternative_matched[I] = J. */
3821 for (i = 0; i < noperands; i++)
3822 goal_alternative_matched[i] = -1;
3824 for (i = 0; i < noperands; i++)
3825 if (! goal_alternative_win[i]
3826 && goal_alternative_matches[i] >= 0)
3827 goal_alternative_matched[goal_alternative_matches[i]] = i;
3829 for (i = 0; i < noperands; i++)
3830 goal_alternative_win[i] |= goal_alternative_match_win[i];
3832 /* If the best alternative is with operands 1 and 2 swapped,
3833 consider them swapped before reporting the reloads. Update the
3834 operand numbers of any reloads already pushed. */
3836 if (goal_alternative_swapped)
3840 tem = substed_operand[commutative];
3841 substed_operand[commutative] = substed_operand[commutative + 1];
3842 substed_operand[commutative + 1] = tem;
3843 tem = recog_data.operand[commutative];
3844 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3845 recog_data.operand[commutative + 1] = tem;
3846 tem = *recog_data.operand_loc[commutative];
3847 *recog_data.operand_loc[commutative]
3848 = *recog_data.operand_loc[commutative + 1];
3849 *recog_data.operand_loc[commutative + 1] = tem;
3851 for (i = 0; i < n_reloads; i++)
3853 if (rld[i].opnum == commutative)
3854 rld[i].opnum = commutative + 1;
3855 else if (rld[i].opnum == commutative + 1)
3856 rld[i].opnum = commutative;
3860 for (i = 0; i < noperands; i++)
3862 operand_reloadnum[i] = -1;
3864 /* If this is an earlyclobber operand, we need to widen the scope.
3865 The reload must remain valid from the start of the insn being
3866 reloaded until after the operand is stored into its destination.
3867 We approximate this with RELOAD_OTHER even though we know that we
3868 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3870 One special case that is worth checking is when we have an
3871 output that is earlyclobber but isn't used past the insn (typically
3872 a SCRATCH). In this case, we only need have the reload live
3873 through the insn itself, but not for any of our input or output
3875 But we must not accidentally narrow the scope of an existing
3876 RELOAD_OTHER reload - leave these alone.
3878 In any case, anything needed to address this operand can remain
3879 however they were previously categorized. */
3881 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3883 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3884 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3887 /* Any constants that aren't allowed and can't be reloaded
3888 into registers are here changed into memory references. */
3889 for (i = 0; i < noperands; i++)
3890 if (! goal_alternative_win[i])
3892 rtx op = recog_data.operand[i];
3893 rtx subreg = NULL_RTX;
3894 rtx plus = NULL_RTX;
3895 enum machine_mode mode = operand_mode[i];
3897 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3898 push_reload so we have to let them pass here. */
3899 if (GET_CODE (op) == SUBREG)
3902 op = SUBREG_REG (op);
3903 mode = GET_MODE (op);
3906 if (GET_CODE (op) == PLUS)
3912 if (CONST_POOL_OK_P (mode, op)
3913 && ((targetm.preferred_reload_class (op, goal_alternative[i])
3915 || no_input_reloads))
3917 int this_address_reloaded;
3918 rtx tem = force_const_mem (mode, op);
3920 /* If we stripped a SUBREG or a PLUS above add it back. */
3921 if (plus != NULL_RTX)
3922 tem = gen_rtx_PLUS (mode, XEXP (plus, 0), tem);
3924 if (subreg != NULL_RTX)
3925 tem = gen_rtx_SUBREG (operand_mode[i], tem, SUBREG_BYTE (subreg));
3927 this_address_reloaded = 0;
3928 substed_operand[i] = recog_data.operand[i]
3929 = find_reloads_toplev (tem, i, address_type[i], ind_levels,
3930 0, insn, &this_address_reloaded);
3932 /* If the alternative accepts constant pool refs directly
3933 there will be no reload needed at all. */
3934 if (plus == NULL_RTX
3935 && subreg == NULL_RTX
3936 && alternative_allows_const_pool_ref (this_address_reloaded == 0
3937 ? substed_operand[i]
3939 recog_data.constraints[i],
3940 goal_alternative_number))
3941 goal_alternative_win[i] = 1;
3945 /* Record the values of the earlyclobber operands for the caller. */
3946 if (goal_earlyclobber)
3947 for (i = 0; i < noperands; i++)
3948 if (goal_alternative_earlyclobber[i])
3949 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3951 /* Now record reloads for all the operands that need them. */
3952 for (i = 0; i < noperands; i++)
3953 if (! goal_alternative_win[i])
3955 /* Operands that match previous ones have already been handled. */
3956 if (goal_alternative_matches[i] >= 0)
3958 /* Handle an operand with a nonoffsettable address
3959 appearing where an offsettable address will do
3960 by reloading the address into a base register.
3962 ??? We can also do this when the operand is a register and
3963 reg_equiv_mem is not offsettable, but this is a bit tricky,
3964 so we don't bother with it. It may not be worth doing. */
3965 else if (goal_alternative_matched[i] == -1
3966 && goal_alternative_offmemok[i]
3967 && MEM_P (recog_data.operand[i]))
3969 /* If the address to be reloaded is a VOIDmode constant,
3970 use the default address mode as mode of the reload register,
3971 as would have been done by find_reloads_address. */
3972 enum machine_mode address_mode;
3973 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3974 if (address_mode == VOIDmode)
3976 addr_space_t as = MEM_ADDR_SPACE (recog_data.operand[i]);
3977 address_mode = targetm.addr_space.address_mode (as);
3980 operand_reloadnum[i]
3981 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3982 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3983 base_reg_class (VOIDmode, MEM, SCRATCH),
3985 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3986 rld[operand_reloadnum[i]].inc
3987 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3989 /* If this operand is an output, we will have made any
3990 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3991 now we are treating part of the operand as an input, so
3992 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3994 if (modified[i] == RELOAD_WRITE)
3996 for (j = 0; j < n_reloads; j++)
3998 if (rld[j].opnum == i)
4000 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
4001 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
4002 else if (rld[j].when_needed
4003 == RELOAD_FOR_OUTADDR_ADDRESS)
4004 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
4009 else if (goal_alternative_matched[i] == -1)
4011 operand_reloadnum[i]
4012 = push_reload ((modified[i] != RELOAD_WRITE
4013 ? recog_data.operand[i] : 0),
4014 (modified[i] != RELOAD_READ
4015 ? recog_data.operand[i] : 0),
4016 (modified[i] != RELOAD_WRITE
4017 ? recog_data.operand_loc[i] : 0),
4018 (modified[i] != RELOAD_READ
4019 ? recog_data.operand_loc[i] : 0),
4020 (enum reg_class) goal_alternative[i],
4021 (modified[i] == RELOAD_WRITE
4022 ? VOIDmode : operand_mode[i]),
4023 (modified[i] == RELOAD_READ
4024 ? VOIDmode : operand_mode[i]),
4025 (insn_code_number < 0 ? 0
4026 : insn_data[insn_code_number].operand[i].strict_low),
4027 0, i, operand_type[i]);
4029 /* In a matching pair of operands, one must be input only
4030 and the other must be output only.
4031 Pass the input operand as IN and the other as OUT. */
4032 else if (modified[i] == RELOAD_READ
4033 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
4035 operand_reloadnum[i]
4036 = push_reload (recog_data.operand[i],
4037 recog_data.operand[goal_alternative_matched[i]],
4038 recog_data.operand_loc[i],
4039 recog_data.operand_loc[goal_alternative_matched[i]],
4040 (enum reg_class) goal_alternative[i],
4042 operand_mode[goal_alternative_matched[i]],
4043 0, 0, i, RELOAD_OTHER);
4044 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
4046 else if (modified[i] == RELOAD_WRITE
4047 && modified[goal_alternative_matched[i]] == RELOAD_READ)
4049 operand_reloadnum[goal_alternative_matched[i]]
4050 = push_reload (recog_data.operand[goal_alternative_matched[i]],
4051 recog_data.operand[i],
4052 recog_data.operand_loc[goal_alternative_matched[i]],
4053 recog_data.operand_loc[i],
4054 (enum reg_class) goal_alternative[i],
4055 operand_mode[goal_alternative_matched[i]],
4057 0, 0, i, RELOAD_OTHER);
4058 operand_reloadnum[i] = output_reloadnum;
4062 gcc_assert (insn_code_number < 0);
4063 error_for_asm (insn, "inconsistent operand constraints "
4065 /* Avoid further trouble with this insn. */
4066 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
4071 else if (goal_alternative_matched[i] < 0
4072 && goal_alternative_matches[i] < 0
4073 && address_operand_reloaded[i] != 1
4076 /* For each non-matching operand that's a MEM or a pseudo-register
4077 that didn't get a hard register, make an optional reload.
4078 This may get done even if the insn needs no reloads otherwise. */
4080 rtx operand = recog_data.operand[i];
4082 while (GET_CODE (operand) == SUBREG)
4083 operand = SUBREG_REG (operand);
4084 if ((MEM_P (operand)
4086 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4087 /* If this is only for an output, the optional reload would not
4088 actually cause us to use a register now, just note that
4089 something is stored here. */
4090 && (goal_alternative[i] != NO_REGS
4091 || modified[i] == RELOAD_WRITE)
4092 && ! no_input_reloads
4093 /* An optional output reload might allow to delete INSN later.
4094 We mustn't make in-out reloads on insns that are not permitted
4096 If this is an asm, we can't delete it; we must not even call
4097 push_reload for an optional output reload in this case,
4098 because we can't be sure that the constraint allows a register,
4099 and push_reload verifies the constraints for asms. */
4100 && (modified[i] == RELOAD_READ
4101 || (! no_output_reloads && ! this_insn_is_asm)))
4102 operand_reloadnum[i]
4103 = push_reload ((modified[i] != RELOAD_WRITE
4104 ? recog_data.operand[i] : 0),
4105 (modified[i] != RELOAD_READ
4106 ? recog_data.operand[i] : 0),
4107 (modified[i] != RELOAD_WRITE
4108 ? recog_data.operand_loc[i] : 0),
4109 (modified[i] != RELOAD_READ
4110 ? recog_data.operand_loc[i] : 0),
4111 (enum reg_class) goal_alternative[i],
4112 (modified[i] == RELOAD_WRITE
4113 ? VOIDmode : operand_mode[i]),
4114 (modified[i] == RELOAD_READ
4115 ? VOIDmode : operand_mode[i]),
4116 (insn_code_number < 0 ? 0
4117 : insn_data[insn_code_number].operand[i].strict_low),
4118 1, i, operand_type[i]);
4119 /* If a memory reference remains (either as a MEM or a pseudo that
4120 did not get a hard register), yet we can't make an optional
4121 reload, check if this is actually a pseudo register reference;
4122 we then need to emit a USE and/or a CLOBBER so that reload
4123 inheritance will do the right thing. */
4127 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4128 && reg_renumber [REGNO (operand)] < 0)))
4130 operand = *recog_data.operand_loc[i];
4132 while (GET_CODE (operand) == SUBREG)
4133 operand = SUBREG_REG (operand);
4134 if (REG_P (operand))
4136 if (modified[i] != RELOAD_WRITE)
4137 /* We mark the USE with QImode so that we recognize
4138 it as one that can be safely deleted at the end
4140 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4142 if (modified[i] != RELOAD_READ)
4143 emit_insn_after (gen_clobber (operand), insn);
4147 else if (goal_alternative_matches[i] >= 0
4148 && goal_alternative_win[goal_alternative_matches[i]]
4149 && modified[i] == RELOAD_READ
4150 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4151 && ! no_input_reloads && ! no_output_reloads
4154 /* Similarly, make an optional reload for a pair of matching
4155 objects that are in MEM or a pseudo that didn't get a hard reg. */
4157 rtx operand = recog_data.operand[i];
4159 while (GET_CODE (operand) == SUBREG)
4160 operand = SUBREG_REG (operand);
4161 if ((MEM_P (operand)
4163 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4164 && (goal_alternative[goal_alternative_matches[i]] != NO_REGS))
4165 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4166 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4167 recog_data.operand[i],
4168 recog_data.operand_loc[goal_alternative_matches[i]],
4169 recog_data.operand_loc[i],
4170 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4171 operand_mode[goal_alternative_matches[i]],
4173 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4176 /* Perform whatever substitutions on the operands we are supposed
4177 to make due to commutativity or replacement of registers
4178 with equivalent constants or memory slots. */
4180 for (i = 0; i < noperands; i++)
4182 /* We only do this on the last pass through reload, because it is
4183 possible for some data (like reg_equiv_address) to be changed during
4184 later passes. Moreover, we lose the opportunity to get a useful
4185 reload_{in,out}_reg when we do these replacements. */
4189 rtx substitution = substed_operand[i];
4191 *recog_data.operand_loc[i] = substitution;
4193 /* If we're replacing an operand with a LABEL_REF, we need to
4194 make sure that there's a REG_LABEL_OPERAND note attached to
4195 this instruction. */
4196 if (GET_CODE (substitution) == LABEL_REF
4197 && !find_reg_note (insn, REG_LABEL_OPERAND,
4198 XEXP (substitution, 0))
4199 /* For a JUMP_P, if it was a branch target it must have
4200 already been recorded as such. */
4202 || !label_is_jump_target_p (XEXP (substitution, 0),
4204 add_reg_note (insn, REG_LABEL_OPERAND, XEXP (substitution, 0));
4207 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4210 /* If this insn pattern contains any MATCH_DUP's, make sure that
4211 they will be substituted if the operands they match are substituted.
4212 Also do now any substitutions we already did on the operands.
4214 Don't do this if we aren't making replacements because we might be
4215 propagating things allocated by frame pointer elimination into places
4216 it doesn't expect. */
4218 if (insn_code_number >= 0 && replace)
4219 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4221 int opno = recog_data.dup_num[i];
4222 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4223 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4227 /* This loses because reloading of prior insns can invalidate the equivalence
4228 (or at least find_equiv_reg isn't smart enough to find it any more),
4229 causing this insn to need more reload regs than it needed before.
4230 It may be too late to make the reload regs available.
4231 Now this optimization is done safely in choose_reload_regs. */
4233 /* For each reload of a reg into some other class of reg,
4234 search for an existing equivalent reg (same value now) in the right class.
4235 We can use it as long as we don't need to change its contents. */
4236 for (i = 0; i < n_reloads; i++)
4237 if (rld[i].reg_rtx == 0
4239 && REG_P (rld[i].in)
4243 = find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
4244 static_reload_reg_p, 0, rld[i].inmode);
4245 /* Prevent generation of insn to load the value
4246 because the one we found already has the value. */
4248 rld[i].in = rld[i].reg_rtx;
4252 /* If we detected error and replaced asm instruction by USE, forget about the
4254 if (GET_CODE (PATTERN (insn)) == USE
4255 && CONST_INT_P (XEXP (PATTERN (insn), 0)))
4258 /* Perhaps an output reload can be combined with another
4259 to reduce needs by one. */
4260 if (!goal_earlyclobber)
4263 /* If we have a pair of reloads for parts of an address, they are reloading
4264 the same object, the operands themselves were not reloaded, and they
4265 are for two operands that are supposed to match, merge the reloads and
4266 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4268 for (i = 0; i < n_reloads; i++)
4272 for (j = i + 1; j < n_reloads; j++)
4273 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4274 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4275 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4276 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4277 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4278 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4279 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4280 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4281 && rtx_equal_p (rld[i].in, rld[j].in)
4282 && (operand_reloadnum[rld[i].opnum] < 0
4283 || rld[operand_reloadnum[rld[i].opnum]].optional)
4284 && (operand_reloadnum[rld[j].opnum] < 0
4285 || rld[operand_reloadnum[rld[j].opnum]].optional)
4286 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4287 || (goal_alternative_matches[rld[j].opnum]
4290 for (k = 0; k < n_replacements; k++)
4291 if (replacements[k].what == j)
4292 replacements[k].what = i;
4294 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4295 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4296 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4298 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4303 /* Scan all the reloads and update their type.
4304 If a reload is for the address of an operand and we didn't reload
4305 that operand, change the type. Similarly, change the operand number
4306 of a reload when two operands match. If a reload is optional, treat it
4307 as though the operand isn't reloaded.
4309 ??? This latter case is somewhat odd because if we do the optional
4310 reload, it means the object is hanging around. Thus we need only
4311 do the address reload if the optional reload was NOT done.
4313 Change secondary reloads to be the address type of their operand, not
4316 If an operand's reload is now RELOAD_OTHER, change any
4317 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4318 RELOAD_FOR_OTHER_ADDRESS. */
4320 for (i = 0; i < n_reloads; i++)
4322 if (rld[i].secondary_p
4323 && rld[i].when_needed == operand_type[rld[i].opnum])
4324 rld[i].when_needed = address_type[rld[i].opnum];
4326 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4327 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4328 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4329 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4330 && (operand_reloadnum[rld[i].opnum] < 0
4331 || rld[operand_reloadnum[rld[i].opnum]].optional))
4333 /* If we have a secondary reload to go along with this reload,
4334 change its type to RELOAD_FOR_OPADDR_ADDR. */
4336 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4337 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4338 && rld[i].secondary_in_reload != -1)
4340 int secondary_in_reload = rld[i].secondary_in_reload;
4342 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4344 /* If there's a tertiary reload we have to change it also. */
4345 if (secondary_in_reload > 0
4346 && rld[secondary_in_reload].secondary_in_reload != -1)
4347 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4348 = RELOAD_FOR_OPADDR_ADDR;
4351 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4352 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4353 && rld[i].secondary_out_reload != -1)
4355 int secondary_out_reload = rld[i].secondary_out_reload;
4357 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4359 /* If there's a tertiary reload we have to change it also. */
4360 if (secondary_out_reload
4361 && rld[secondary_out_reload].secondary_out_reload != -1)
4362 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4363 = RELOAD_FOR_OPADDR_ADDR;
4366 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4367 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4368 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4370 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4373 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4374 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4375 && operand_reloadnum[rld[i].opnum] >= 0
4376 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4378 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4380 if (goal_alternative_matches[rld[i].opnum] >= 0)
4381 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4384 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4385 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4386 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4388 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4389 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4390 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4391 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4392 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4393 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4394 This is complicated by the fact that a single operand can have more
4395 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4396 choose_reload_regs without affecting code quality, and cases that
4397 actually fail are extremely rare, so it turns out to be better to fix
4398 the problem here by not generating cases that choose_reload_regs will
4400 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4401 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4403 We can reduce the register pressure by exploiting that a
4404 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4405 does not conflict with any of them, if it is only used for the first of
4406 the RELOAD_FOR_X_ADDRESS reloads. */
4408 int first_op_addr_num = -2;
4409 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4410 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4411 int need_change = 0;
4412 /* We use last_op_addr_reload and the contents of the above arrays
4413 first as flags - -2 means no instance encountered, -1 means exactly
4414 one instance encountered.
4415 If more than one instance has been encountered, we store the reload
4416 number of the first reload of the kind in question; reload numbers
4417 are known to be non-negative. */
4418 for (i = 0; i < noperands; i++)
4419 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4420 for (i = n_reloads - 1; i >= 0; i--)
4422 switch (rld[i].when_needed)
4424 case RELOAD_FOR_OPERAND_ADDRESS:
4425 if (++first_op_addr_num >= 0)
4427 first_op_addr_num = i;
4431 case RELOAD_FOR_INPUT_ADDRESS:
4432 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4434 first_inpaddr_num[rld[i].opnum] = i;
4438 case RELOAD_FOR_OUTPUT_ADDRESS:
4439 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4441 first_outpaddr_num[rld[i].opnum] = i;
4452 for (i = 0; i < n_reloads; i++)
4455 enum reload_type type;
4457 switch (rld[i].when_needed)
4459 case RELOAD_FOR_OPADDR_ADDR:
4460 first_num = first_op_addr_num;
4461 type = RELOAD_FOR_OPERAND_ADDRESS;
4463 case RELOAD_FOR_INPADDR_ADDRESS:
4464 first_num = first_inpaddr_num[rld[i].opnum];
4465 type = RELOAD_FOR_INPUT_ADDRESS;
4467 case RELOAD_FOR_OUTADDR_ADDRESS:
4468 first_num = first_outpaddr_num[rld[i].opnum];
4469 type = RELOAD_FOR_OUTPUT_ADDRESS;
4476 else if (i > first_num)
4477 rld[i].when_needed = type;
4480 /* Check if the only TYPE reload that uses reload I is
4481 reload FIRST_NUM. */
4482 for (j = n_reloads - 1; j > first_num; j--)
4484 if (rld[j].when_needed == type
4485 && (rld[i].secondary_p
4486 ? rld[j].secondary_in_reload == i
4487 : reg_mentioned_p (rld[i].in, rld[j].in)))
4489 rld[i].when_needed = type;
4498 /* See if we have any reloads that are now allowed to be merged
4499 because we've changed when the reload is needed to
4500 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4501 check for the most common cases. */
4503 for (i = 0; i < n_reloads; i++)
4504 if (rld[i].in != 0 && rld[i].out == 0
4505 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4506 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4507 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4508 for (j = 0; j < n_reloads; j++)
4509 if (i != j && rld[j].in != 0 && rld[j].out == 0
4510 && rld[j].when_needed == rld[i].when_needed
4511 && MATCHES (rld[i].in, rld[j].in)
4512 && rld[i].rclass == rld[j].rclass
4513 && !rld[i].nocombine && !rld[j].nocombine
4514 && rld[i].reg_rtx == rld[j].reg_rtx)
4516 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4517 transfer_replacements (i, j);
4522 /* If we made any reloads for addresses, see if they violate a
4523 "no input reloads" requirement for this insn. But loads that we
4524 do after the insn (such as for output addresses) are fine. */
4525 if (no_input_reloads)
4526 for (i = 0; i < n_reloads; i++)
4527 gcc_assert (rld[i].in == 0
4528 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4529 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4532 /* Compute reload_mode and reload_nregs. */
4533 for (i = 0; i < n_reloads; i++)
4536 = (rld[i].inmode == VOIDmode
4537 || (GET_MODE_SIZE (rld[i].outmode)
4538 > GET_MODE_SIZE (rld[i].inmode)))
4539 ? rld[i].outmode : rld[i].inmode;
4541 rld[i].nregs = CLASS_MAX_NREGS (rld[i].rclass, rld[i].mode);
4544 /* Special case a simple move with an input reload and a
4545 destination of a hard reg, if the hard reg is ok, use it. */
4546 for (i = 0; i < n_reloads; i++)
4547 if (rld[i].when_needed == RELOAD_FOR_INPUT
4548 && GET_CODE (PATTERN (insn)) == SET
4549 && REG_P (SET_DEST (PATTERN (insn)))
4550 && (SET_SRC (PATTERN (insn)) == rld[i].in
4551 || SET_SRC (PATTERN (insn)) == rld[i].in_reg)
4552 && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4554 rtx dest = SET_DEST (PATTERN (insn));
4555 unsigned int regno = REGNO (dest);
4557 if (regno < FIRST_PSEUDO_REGISTER
4558 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
4559 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4561 int nr = hard_regno_nregs[regno][rld[i].mode];
4564 for (nri = 1; nri < nr; nri ++)
4565 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
4569 rld[i].reg_rtx = dest;
4576 /* Return true if alternative number ALTNUM in constraint-string
4577 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4578 MEM gives the reference if it didn't need any reloads, otherwise it
4582 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED,
4583 const char *constraint, int altnum)
4587 /* Skip alternatives before the one requested. */
4590 while (*constraint++ != ',');
4593 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4594 If one of them is present, this alternative accepts the result of
4595 passing a constant-pool reference through find_reloads_toplev.
4597 The same is true of extra memory constraints if the address
4598 was reloaded into a register. However, the target may elect
4599 to disallow the original constant address, forcing it to be
4600 reloaded into a register instead. */
4601 for (; (c = *constraint) && c != ',' && c != '#';
4602 constraint += CONSTRAINT_LEN (c, constraint))
4604 if (c == TARGET_MEM_CONSTRAINT || c == 'o')
4606 #ifdef EXTRA_CONSTRAINT_STR
4607 if (EXTRA_MEMORY_CONSTRAINT (c, constraint)
4608 && (mem == NULL || EXTRA_CONSTRAINT_STR (mem, c, constraint)))
4615 /* Scan X for memory references and scan the addresses for reloading.
4616 Also checks for references to "constant" regs that we want to eliminate
4617 and replaces them with the values they stand for.
4618 We may alter X destructively if it contains a reference to such.
4619 If X is just a constant reg, we return the equivalent value
4622 IND_LEVELS says how many levels of indirect addressing this machine
4625 OPNUM and TYPE identify the purpose of the reload.
4627 IS_SET_DEST is true if X is the destination of a SET, which is not
4628 appropriate to be replaced by a constant.
4630 INSN, if nonzero, is the insn in which we do the reload. It is used
4631 to determine if we may generate output reloads, and where to put USEs
4632 for pseudos that we have to replace with stack slots.
4634 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4635 result of find_reloads_address. */
4638 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4639 int ind_levels, int is_set_dest, rtx insn,
4640 int *address_reloaded)
4642 RTX_CODE code = GET_CODE (x);
4644 const char *fmt = GET_RTX_FORMAT (code);
4650 /* This code is duplicated for speed in find_reloads. */
4651 int regno = REGNO (x);
4652 if (reg_equiv_constant (regno) != 0 && !is_set_dest)
4653 x = reg_equiv_constant (regno);
4655 /* This creates (subreg (mem...)) which would cause an unnecessary
4656 reload of the mem. */
4657 else if (reg_equiv_mem (regno) != 0)
4658 x = reg_equiv_mem (regno);
4660 else if (reg_equiv_memory_loc (regno)
4661 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
4663 rtx mem = make_memloc (x, regno);
4664 if (reg_equiv_address (regno)
4665 || ! rtx_equal_p (mem, reg_equiv_mem (regno)))
4667 /* If this is not a toplevel operand, find_reloads doesn't see
4668 this substitution. We have to emit a USE of the pseudo so
4669 that delete_output_reload can see it. */
4670 if (replace_reloads && recog_data.operand[opnum] != x)
4671 /* We mark the USE with QImode so that we recognize it
4672 as one that can be safely deleted at the end of
4674 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4677 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4678 opnum, type, ind_levels, insn);
4679 if (!rtx_equal_p (x, mem))
4680 push_reg_equiv_alt_mem (regno, x);
4681 if (address_reloaded)
4682 *address_reloaded = i;
4691 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4692 opnum, type, ind_levels, insn);
4693 if (address_reloaded)
4694 *address_reloaded = i;
4699 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4701 /* Check for SUBREG containing a REG that's equivalent to a
4702 constant. If the constant has a known value, truncate it
4703 right now. Similarly if we are extracting a single-word of a
4704 multi-word constant. If the constant is symbolic, allow it
4705 to be substituted normally. push_reload will strip the
4706 subreg later. The constant must not be VOIDmode, because we
4707 will lose the mode of the register (this should never happen
4708 because one of the cases above should handle it). */
4710 int regno = REGNO (SUBREG_REG (x));
4713 if (regno >= FIRST_PSEUDO_REGISTER
4714 && reg_renumber[regno] < 0
4715 && reg_equiv_constant (regno) != 0)
4718 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant (regno),
4719 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4721 if (CONSTANT_P (tem)
4722 && !targetm.legitimate_constant_p (GET_MODE (x), tem))
4724 tem = force_const_mem (GET_MODE (x), tem);
4725 i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4726 &XEXP (tem, 0), opnum, type,
4728 if (address_reloaded)
4729 *address_reloaded = i;
4734 /* If the subreg contains a reg that will be converted to a mem,
4735 convert the subreg to a narrower memref now.
4736 Otherwise, we would get (subreg (mem ...) ...),
4737 which would force reload of the mem.
4739 We also need to do this if there is an equivalent MEM that is
4740 not offsettable. In that case, alter_subreg would produce an
4741 invalid address on big-endian machines.
4743 For machines that extend byte loads, we must not reload using
4744 a wider mode if we have a paradoxical SUBREG. find_reloads will
4745 force a reload in that case. So we should not do anything here. */
4747 if (regno >= FIRST_PSEUDO_REGISTER
4748 #ifdef LOAD_EXTEND_OP
4749 && (GET_MODE_SIZE (GET_MODE (x))
4750 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4752 && (reg_equiv_address (regno) != 0
4753 || (reg_equiv_mem (regno) != 0
4754 && (! strict_memory_address_addr_space_p
4755 (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0),
4756 MEM_ADDR_SPACE (reg_equiv_mem (regno)))
4757 || ! offsettable_memref_p (reg_equiv_mem (regno))
4758 || num_not_at_initial_offset))))
4759 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4760 insn, address_reloaded);
4763 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4767 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4768 ind_levels, is_set_dest, insn,
4770 /* If we have replaced a reg with it's equivalent memory loc -
4771 that can still be handled here e.g. if it's in a paradoxical
4772 subreg - we must make the change in a copy, rather than using
4773 a destructive change. This way, find_reloads can still elect
4774 not to do the change. */
4775 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4777 x = shallow_copy_rtx (x);
4780 XEXP (x, i) = new_part;
4786 /* Return a mem ref for the memory equivalent of reg REGNO.
4787 This mem ref is not shared with anything. */
4790 make_memloc (rtx ad, int regno)
4792 /* We must rerun eliminate_regs, in case the elimination
4793 offsets have changed. */
4795 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno), VOIDmode, NULL_RTX),
4798 /* If TEM might contain a pseudo, we must copy it to avoid
4799 modifying it when we do the substitution for the reload. */
4800 if (rtx_varies_p (tem, 0))
4801 tem = copy_rtx (tem);
4803 tem = replace_equiv_address_nv (reg_equiv_memory_loc (regno), tem);
4804 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4806 /* Copy the result if it's still the same as the equivalence, to avoid
4807 modifying it when we do the substitution for the reload. */
4808 if (tem == reg_equiv_memory_loc (regno))
4809 tem = copy_rtx (tem);
4813 /* Returns true if AD could be turned into a valid memory reference
4814 to mode MODE in address space AS by reloading the part pointed to
4815 by PART into a register. */
4818 maybe_memory_address_addr_space_p (enum machine_mode mode, rtx ad,
4819 addr_space_t as, rtx *part)
4823 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4826 retv = memory_address_addr_space_p (mode, ad, as);
4832 /* Record all reloads needed for handling memory address AD
4833 which appears in *LOC in a memory reference to mode MODE
4834 which itself is found in location *MEMREFLOC.
4835 Note that we take shortcuts assuming that no multi-reg machine mode
4836 occurs as part of an address.
4838 OPNUM and TYPE specify the purpose of this reload.
4840 IND_LEVELS says how many levels of indirect addressing this machine
4843 INSN, if nonzero, is the insn in which we do the reload. It is used
4844 to determine if we may generate output reloads, and where to put USEs
4845 for pseudos that we have to replace with stack slots.
4847 Value is one if this address is reloaded or replaced as a whole; it is
4848 zero if the top level of this address was not reloaded or replaced, and
4849 it is -1 if it may or may not have been reloaded or replaced.
4851 Note that there is no verification that the address will be valid after
4852 this routine does its work. Instead, we rely on the fact that the address
4853 was valid when reload started. So we need only undo things that reload
4854 could have broken. These are wrong register types, pseudos not allocated
4855 to a hard register, and frame pointer elimination. */
4858 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4859 rtx *loc, int opnum, enum reload_type type,
4860 int ind_levels, rtx insn)
4862 addr_space_t as = memrefloc? MEM_ADDR_SPACE (*memrefloc)
4863 : ADDR_SPACE_GENERIC;
4865 int removed_and = 0;
4869 /* If the address is a register, see if it is a legitimate address and
4870 reload if not. We first handle the cases where we need not reload
4871 or where we must reload in a non-standard way. */
4877 if (reg_equiv_constant (regno) != 0)
4879 find_reloads_address_part (reg_equiv_constant (regno), loc,
4880 base_reg_class (mode, MEM, SCRATCH),
4881 GET_MODE (ad), opnum, type, ind_levels);
4885 tem = reg_equiv_memory_loc (regno);
4888 if (reg_equiv_address (regno) != 0 || num_not_at_initial_offset)
4890 tem = make_memloc (ad, regno);
4891 if (! strict_memory_address_addr_space_p (GET_MODE (tem),
4893 MEM_ADDR_SPACE (tem)))
4897 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4898 &XEXP (tem, 0), opnum,
4899 ADDR_TYPE (type), ind_levels, insn);
4900 if (!rtx_equal_p (tem, orig))
4901 push_reg_equiv_alt_mem (regno, tem);
4903 /* We can avoid a reload if the register's equivalent memory
4904 expression is valid as an indirect memory address.
4905 But not all addresses are valid in a mem used as an indirect
4906 address: only reg or reg+constant. */
4909 && strict_memory_address_addr_space_p (mode, tem, as)
4910 && (REG_P (XEXP (tem, 0))
4911 || (GET_CODE (XEXP (tem, 0)) == PLUS
4912 && REG_P (XEXP (XEXP (tem, 0), 0))
4913 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4915 /* TEM is not the same as what we'll be replacing the
4916 pseudo with after reload, put a USE in front of INSN
4917 in the final reload pass. */
4919 && num_not_at_initial_offset
4920 && ! rtx_equal_p (tem, reg_equiv_mem (regno)))
4923 /* We mark the USE with QImode so that we
4924 recognize it as one that can be safely
4925 deleted at the end of reload. */
4926 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4929 /* This doesn't really count as replacing the address
4930 as a whole, since it is still a memory access. */
4938 /* The only remaining case where we can avoid a reload is if this is a
4939 hard register that is valid as a base register and which is not the
4940 subject of a CLOBBER in this insn. */
4942 else if (regno < FIRST_PSEUDO_REGISTER
4943 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4944 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4947 /* If we do not have one of the cases above, we must do the reload. */
4948 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4949 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4953 if (strict_memory_address_addr_space_p (mode, ad, as))
4955 /* The address appears valid, so reloads are not needed.
4956 But the address may contain an eliminable register.
4957 This can happen because a machine with indirect addressing
4958 may consider a pseudo register by itself a valid address even when
4959 it has failed to get a hard reg.
4960 So do a tree-walk to find and eliminate all such regs. */
4962 /* But first quickly dispose of a common case. */
4963 if (GET_CODE (ad) == PLUS
4964 && CONST_INT_P (XEXP (ad, 1))
4965 && REG_P (XEXP (ad, 0))
4966 && reg_equiv_constant (REGNO (XEXP (ad, 0))) == 0)
4969 subst_reg_equivs_changed = 0;
4970 *loc = subst_reg_equivs (ad, insn);
4972 if (! subst_reg_equivs_changed)
4975 /* Check result for validity after substitution. */
4976 if (strict_memory_address_addr_space_p (mode, ad, as))
4980 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4983 if (memrefloc && ADDR_SPACE_GENERIC_P (as))
4985 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4990 *memrefloc = copy_rtx (*memrefloc);
4991 XEXP (*memrefloc, 0) = ad;
4992 move_replacements (&ad, &XEXP (*memrefloc, 0));
4998 /* The address is not valid. We have to figure out why. First see if
4999 we have an outer AND and remove it if so. Then analyze what's inside. */
5001 if (GET_CODE (ad) == AND)
5004 loc = &XEXP (ad, 0);
5008 /* One possibility for why the address is invalid is that it is itself
5009 a MEM. This can happen when the frame pointer is being eliminated, a
5010 pseudo is not allocated to a hard register, and the offset between the
5011 frame and stack pointers is not its initial value. In that case the
5012 pseudo will have been replaced by a MEM referring to the
5016 /* First ensure that the address in this MEM is valid. Then, unless
5017 indirect addresses are valid, reload the MEM into a register. */
5019 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
5020 opnum, ADDR_TYPE (type),
5021 ind_levels == 0 ? 0 : ind_levels - 1, insn);
5023 /* If tem was changed, then we must create a new memory reference to
5024 hold it and store it back into memrefloc. */
5025 if (tem != ad && memrefloc)
5027 *memrefloc = copy_rtx (*memrefloc);
5028 copy_replacements (tem, XEXP (*memrefloc, 0));
5029 loc = &XEXP (*memrefloc, 0);
5031 loc = &XEXP (*loc, 0);
5034 /* Check similar cases as for indirect addresses as above except
5035 that we can allow pseudos and a MEM since they should have been
5036 taken care of above. */
5039 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
5040 || MEM_P (XEXP (tem, 0))
5041 || ! (REG_P (XEXP (tem, 0))
5042 || (GET_CODE (XEXP (tem, 0)) == PLUS
5043 && REG_P (XEXP (XEXP (tem, 0), 0))
5044 && CONST_INT_P (XEXP (XEXP (tem, 0), 1)))))
5046 /* Must use TEM here, not AD, since it is the one that will
5047 have any subexpressions reloaded, if needed. */
5048 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
5049 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
5052 return ! removed_and;
5058 /* If we have address of a stack slot but it's not valid because the
5059 displacement is too large, compute the sum in a register.
5060 Handle all base registers here, not just fp/ap/sp, because on some
5061 targets (namely SH) we can also get too large displacements from
5062 big-endian corrections. */
5063 else if (GET_CODE (ad) == PLUS
5064 && REG_P (XEXP (ad, 0))
5065 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
5066 && CONST_INT_P (XEXP (ad, 1))
5067 && (regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
5069 /* Similarly, if we were to reload the base register and the
5070 mem+offset address is still invalid, then we want to reload
5071 the whole address, not just the base register. */
5072 || ! maybe_memory_address_addr_space_p
5073 (mode, ad, as, &(XEXP (ad, 0)))))
5076 /* Unshare the MEM rtx so we can safely alter it. */
5079 *memrefloc = copy_rtx (*memrefloc);
5080 loc = &XEXP (*memrefloc, 0);
5082 loc = &XEXP (*loc, 0);
5085 if (double_reg_address_ok
5086 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode,
5089 /* Unshare the sum as well. */
5090 *loc = ad = copy_rtx (ad);
5092 /* Reload the displacement into an index reg.
5093 We assume the frame pointer or arg pointer is a base reg. */
5094 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
5095 INDEX_REG_CLASS, GET_MODE (ad), opnum,
5101 /* If the sum of two regs is not necessarily valid,
5102 reload the sum into a base reg.
5103 That will at least work. */
5104 find_reloads_address_part (ad, loc,
5105 base_reg_class (mode, MEM, SCRATCH),
5106 GET_MODE (ad), opnum, type, ind_levels);
5108 return ! removed_and;
5111 /* If we have an indexed stack slot, there are three possible reasons why
5112 it might be invalid: The index might need to be reloaded, the address
5113 might have been made by frame pointer elimination and hence have a
5114 constant out of range, or both reasons might apply.
5116 We can easily check for an index needing reload, but even if that is the
5117 case, we might also have an invalid constant. To avoid making the
5118 conservative assumption and requiring two reloads, we see if this address
5119 is valid when not interpreted strictly. If it is, the only problem is
5120 that the index needs a reload and find_reloads_address_1 will take care
5123 Handle all base registers here, not just fp/ap/sp, because on some
5124 targets (namely SPARC) we can also get invalid addresses from preventive
5125 subreg big-endian corrections made by find_reloads_toplev. We
5126 can also get expressions involving LO_SUM (rather than PLUS) from
5127 find_reloads_subreg_address.
5129 If we decide to do something, it must be that `double_reg_address_ok'
5130 is true. We generate a reload of the base register + constant and
5131 rework the sum so that the reload register will be added to the index.
5132 This is safe because we know the address isn't shared.
5134 We check for the base register as both the first and second operand of
5135 the innermost PLUS and/or LO_SUM. */
5137 for (op_index = 0; op_index < 2; ++op_index)
5139 rtx operand, addend;
5140 enum rtx_code inner_code;
5142 if (GET_CODE (ad) != PLUS)
5145 inner_code = GET_CODE (XEXP (ad, 0));
5146 if (!(GET_CODE (ad) == PLUS
5147 && CONST_INT_P (XEXP (ad, 1))
5148 && (inner_code == PLUS || inner_code == LO_SUM)))
5151 operand = XEXP (XEXP (ad, 0), op_index);
5152 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5155 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5157 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5159 || operand == frame_pointer_rtx
5160 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
5161 || operand == hard_frame_pointer_rtx
5163 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5164 || operand == arg_pointer_rtx
5166 || operand == stack_pointer_rtx)
5167 && ! maybe_memory_address_addr_space_p
5168 (mode, ad, as, &XEXP (XEXP (ad, 0), 1 - op_index)))
5173 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5175 /* Form the adjusted address. */
5176 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5177 ad = gen_rtx_PLUS (GET_MODE (ad),
5178 op_index == 0 ? offset_reg : addend,
5179 op_index == 0 ? addend : offset_reg);
5181 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5182 op_index == 0 ? offset_reg : addend,
5183 op_index == 0 ? addend : offset_reg);
5186 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5187 find_reloads_address_part (XEXP (ad, op_index),
5188 &XEXP (ad, op_index), cls,
5189 GET_MODE (ad), opnum, type, ind_levels);
5190 find_reloads_address_1 (mode,
5191 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5192 GET_CODE (XEXP (ad, op_index)),
5193 &XEXP (ad, 1 - op_index), opnum,
5200 /* See if address becomes valid when an eliminable register
5201 in a sum is replaced. */
5204 if (GET_CODE (ad) == PLUS)
5205 tem = subst_indexed_address (ad);
5206 if (tem != ad && strict_memory_address_addr_space_p (mode, tem, as))
5208 /* Ok, we win that way. Replace any additional eliminable
5211 subst_reg_equivs_changed = 0;
5212 tem = subst_reg_equivs (tem, insn);
5214 /* Make sure that didn't make the address invalid again. */
5216 if (! subst_reg_equivs_changed
5217 || strict_memory_address_addr_space_p (mode, tem, as))
5224 /* If constants aren't valid addresses, reload the constant address
5226 if (CONSTANT_P (ad) && ! strict_memory_address_addr_space_p (mode, ad, as))
5228 enum machine_mode address_mode = GET_MODE (ad);
5229 if (address_mode == VOIDmode)
5230 address_mode = targetm.addr_space.address_mode (as);
5232 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5233 Unshare it so we can safely alter it. */
5234 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5235 && CONSTANT_POOL_ADDRESS_P (ad))
5237 *memrefloc = copy_rtx (*memrefloc);
5238 loc = &XEXP (*memrefloc, 0);
5240 loc = &XEXP (*loc, 0);
5243 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5244 address_mode, opnum, type, ind_levels);
5245 return ! removed_and;
5248 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5252 /* Find all pseudo regs appearing in AD
5253 that are eliminable in favor of equivalent values
5254 and do not have hard regs; replace them by their equivalents.
5255 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5256 front of it for pseudos that we have to replace with stack slots. */
5259 subst_reg_equivs (rtx ad, rtx insn)
5261 RTX_CODE code = GET_CODE (ad);
5281 int regno = REGNO (ad);
5283 if (reg_equiv_constant (regno) != 0)
5285 subst_reg_equivs_changed = 1;
5286 return reg_equiv_constant (regno);
5288 if (reg_equiv_memory_loc (regno) && num_not_at_initial_offset)
5290 rtx mem = make_memloc (ad, regno);
5291 if (! rtx_equal_p (mem, reg_equiv_mem (regno)))
5293 subst_reg_equivs_changed = 1;
5294 /* We mark the USE with QImode so that we recognize it
5295 as one that can be safely deleted at the end of
5297 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5306 /* Quickly dispose of a common case. */
5307 if (XEXP (ad, 0) == frame_pointer_rtx
5308 && CONST_INT_P (XEXP (ad, 1)))
5316 fmt = GET_RTX_FORMAT (code);
5317 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5319 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5323 /* Compute the sum of X and Y, making canonicalizations assumed in an
5324 address, namely: sum constant integers, surround the sum of two
5325 constants with a CONST, put the constant as the second operand, and
5326 group the constant on the outermost sum.
5328 This routine assumes both inputs are already in canonical form. */
5331 form_sum (enum machine_mode mode, rtx x, rtx y)
5335 gcc_assert (GET_MODE (x) == mode || GET_MODE (x) == VOIDmode);
5336 gcc_assert (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode);
5338 if (CONST_INT_P (x))
5339 return plus_constant (y, INTVAL (x));
5340 else if (CONST_INT_P (y))
5341 return plus_constant (x, INTVAL (y));
5342 else if (CONSTANT_P (x))
5343 tem = x, x = y, y = tem;
5345 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5346 return form_sum (mode, XEXP (x, 0), form_sum (mode, XEXP (x, 1), y));
5348 /* Note that if the operands of Y are specified in the opposite
5349 order in the recursive calls below, infinite recursion will occur. */
5350 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5351 return form_sum (mode, form_sum (mode, x, XEXP (y, 0)), XEXP (y, 1));
5353 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5354 constant will have been placed second. */
5355 if (CONSTANT_P (x) && CONSTANT_P (y))
5357 if (GET_CODE (x) == CONST)
5359 if (GET_CODE (y) == CONST)
5362 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5365 return gen_rtx_PLUS (mode, x, y);
5368 /* If ADDR is a sum containing a pseudo register that should be
5369 replaced with a constant (from reg_equiv_constant),
5370 return the result of doing so, and also apply the associative
5371 law so that the result is more likely to be a valid address.
5372 (But it is not guaranteed to be one.)
5374 Note that at most one register is replaced, even if more are
5375 replaceable. Also, we try to put the result into a canonical form
5376 so it is more likely to be a valid address.
5378 In all other cases, return ADDR. */
5381 subst_indexed_address (rtx addr)
5383 rtx op0 = 0, op1 = 0, op2 = 0;
5387 if (GET_CODE (addr) == PLUS)
5389 /* Try to find a register to replace. */
5390 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5392 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5393 && reg_renumber[regno] < 0
5394 && reg_equiv_constant (regno) != 0)
5395 op0 = reg_equiv_constant (regno);
5396 else if (REG_P (op1)
5397 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5398 && reg_renumber[regno] < 0
5399 && reg_equiv_constant (regno) != 0)
5400 op1 = reg_equiv_constant (regno);
5401 else if (GET_CODE (op0) == PLUS
5402 && (tem = subst_indexed_address (op0)) != op0)
5404 else if (GET_CODE (op1) == PLUS
5405 && (tem = subst_indexed_address (op1)) != op1)
5410 /* Pick out up to three things to add. */
5411 if (GET_CODE (op1) == PLUS)
5412 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5413 else if (GET_CODE (op0) == PLUS)
5414 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5416 /* Compute the sum. */
5418 op1 = form_sum (GET_MODE (addr), op1, op2);
5420 op0 = form_sum (GET_MODE (addr), op0, op1);
5427 /* Update the REG_INC notes for an insn. It updates all REG_INC
5428 notes for the instruction which refer to REGNO the to refer
5429 to the reload number.
5431 INSN is the insn for which any REG_INC notes need updating.
5433 REGNO is the register number which has been reloaded.
5435 RELOADNUM is the reload number. */
5438 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5439 int reloadnum ATTRIBUTE_UNUSED)
5444 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5445 if (REG_NOTE_KIND (link) == REG_INC
5446 && (int) REGNO (XEXP (link, 0)) == regno)
5447 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5451 /* Record the pseudo registers we must reload into hard registers in a
5452 subexpression of a would-be memory address, X referring to a value
5453 in mode MODE. (This function is not called if the address we find
5456 CONTEXT = 1 means we are considering regs as index regs,
5457 = 0 means we are considering them as base regs.
5458 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5460 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5461 is the code of the index part of the address. Otherwise, pass SCRATCH
5463 OPNUM and TYPE specify the purpose of any reloads made.
5465 IND_LEVELS says how many levels of indirect addressing are
5466 supported at this point in the address.
5468 INSN, if nonzero, is the insn in which we do the reload. It is used
5469 to determine if we may generate output reloads.
5471 We return nonzero if X, as a whole, is reloaded or replaced. */
5473 /* Note that we take shortcuts assuming that no multi-reg machine mode
5474 occurs as part of an address.
5475 Also, this is not fully machine-customizable; it works for machines
5476 such as VAXen and 68000's and 32000's, but other possible machines
5477 could have addressing modes that this does not handle right.
5478 If you add push_reload calls here, you need to make sure gen_reload
5479 handles those cases gracefully. */
5482 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5483 enum rtx_code outer_code, enum rtx_code index_code,
5484 rtx *loc, int opnum, enum reload_type type,
5485 int ind_levels, rtx insn)
5487 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5489 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5490 : REGNO_OK_FOR_INDEX_P (REGNO))
5492 enum reg_class context_reg_class;
5493 RTX_CODE code = GET_CODE (x);
5496 context_reg_class = INDEX_REG_CLASS;
5498 context_reg_class = base_reg_class (mode, outer_code, index_code);
5504 rtx orig_op0 = XEXP (x, 0);
5505 rtx orig_op1 = XEXP (x, 1);
5506 RTX_CODE code0 = GET_CODE (orig_op0);
5507 RTX_CODE code1 = GET_CODE (orig_op1);
5511 if (GET_CODE (op0) == SUBREG)
5513 op0 = SUBREG_REG (op0);
5514 code0 = GET_CODE (op0);
5515 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5516 op0 = gen_rtx_REG (word_mode,
5518 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5519 GET_MODE (SUBREG_REG (orig_op0)),
5520 SUBREG_BYTE (orig_op0),
5521 GET_MODE (orig_op0))));
5524 if (GET_CODE (op1) == SUBREG)
5526 op1 = SUBREG_REG (op1);
5527 code1 = GET_CODE (op1);
5528 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5529 /* ??? Why is this given op1's mode and above for
5530 ??? op0 SUBREGs we use word_mode? */
5531 op1 = gen_rtx_REG (GET_MODE (op1),
5533 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5534 GET_MODE (SUBREG_REG (orig_op1)),
5535 SUBREG_BYTE (orig_op1),
5536 GET_MODE (orig_op1))));
5538 /* Plus in the index register may be created only as a result of
5539 register rematerialization for expression like &localvar*4. Reload it.
5540 It may be possible to combine the displacement on the outer level,
5541 but it is probably not worthwhile to do so. */
5544 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5545 opnum, ADDR_TYPE (type), ind_levels, insn);
5546 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5548 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5552 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5553 || code0 == ZERO_EXTEND || code1 == MEM)
5555 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5556 &XEXP (x, 0), opnum, type, ind_levels,
5558 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5559 &XEXP (x, 1), opnum, type, ind_levels,
5563 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5564 || code1 == ZERO_EXTEND || code0 == MEM)
5566 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5567 &XEXP (x, 0), opnum, type, ind_levels,
5569 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5570 &XEXP (x, 1), opnum, type, ind_levels,
5574 else if (code0 == CONST_INT || code0 == CONST
5575 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5576 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5577 &XEXP (x, 1), opnum, type, ind_levels,
5580 else if (code1 == CONST_INT || code1 == CONST
5581 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5582 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5583 &XEXP (x, 0), opnum, type, ind_levels,
5586 else if (code0 == REG && code1 == REG)
5588 if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5589 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5591 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5592 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5594 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5595 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5596 &XEXP (x, 1), opnum, type, ind_levels,
5598 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5599 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5600 &XEXP (x, 0), opnum, type, ind_levels,
5602 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5603 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5604 &XEXP (x, 0), opnum, type, ind_levels,
5606 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5607 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5608 &XEXP (x, 1), opnum, type, ind_levels,
5612 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5613 &XEXP (x, 0), opnum, type, ind_levels,
5615 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5616 &XEXP (x, 1), opnum, type, ind_levels,
5621 else if (code0 == REG)
5623 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5624 &XEXP (x, 0), opnum, type, ind_levels,
5626 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5627 &XEXP (x, 1), opnum, type, ind_levels,
5631 else if (code1 == REG)
5633 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5634 &XEXP (x, 1), opnum, type, ind_levels,
5636 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5637 &XEXP (x, 0), opnum, type, ind_levels,
5647 rtx op0 = XEXP (x, 0);
5648 rtx op1 = XEXP (x, 1);
5649 enum rtx_code index_code;
5653 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5656 /* Currently, we only support {PRE,POST}_MODIFY constructs
5657 where a base register is {inc,dec}remented by the contents
5658 of another register or by a constant value. Thus, these
5659 operands must match. */
5660 gcc_assert (op0 == XEXP (op1, 0));
5662 /* Require index register (or constant). Let's just handle the
5663 register case in the meantime... If the target allows
5664 auto-modify by a constant then we could try replacing a pseudo
5665 register with its equivalent constant where applicable.
5667 We also handle the case where the register was eliminated
5668 resulting in a PLUS subexpression.
5670 If we later decide to reload the whole PRE_MODIFY or
5671 POST_MODIFY, inc_for_reload might clobber the reload register
5672 before reading the index. The index register might therefore
5673 need to live longer than a TYPE reload normally would, so be
5674 conservative and class it as RELOAD_OTHER. */
5675 if ((REG_P (XEXP (op1, 1))
5676 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5677 || GET_CODE (XEXP (op1, 1)) == PLUS)
5678 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5679 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5682 gcc_assert (REG_P (XEXP (op1, 0)));
5684 regno = REGNO (XEXP (op1, 0));
5685 index_code = GET_CODE (XEXP (op1, 1));
5687 /* A register that is incremented cannot be constant! */
5688 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5689 || reg_equiv_constant (regno) == 0);
5691 /* Handle a register that is equivalent to a memory location
5692 which cannot be addressed directly. */
5693 if (reg_equiv_memory_loc (regno) != 0
5694 && (reg_equiv_address (regno) != 0
5695 || num_not_at_initial_offset))
5697 rtx tem = make_memloc (XEXP (x, 0), regno);
5699 if (reg_equiv_address (regno)
5700 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5704 /* First reload the memory location's address.
5705 We can't use ADDR_TYPE (type) here, because we need to
5706 write back the value after reading it, hence we actually
5707 need two registers. */
5708 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5709 &XEXP (tem, 0), opnum,
5713 if (!rtx_equal_p (tem, orig))
5714 push_reg_equiv_alt_mem (regno, tem);
5716 /* Then reload the memory location into a base
5718 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5720 base_reg_class (mode, code,
5722 GET_MODE (x), GET_MODE (x), 0,
5723 0, opnum, RELOAD_OTHER);
5725 update_auto_inc_notes (this_insn, regno, reloadnum);
5730 if (reg_renumber[regno] >= 0)
5731 regno = reg_renumber[regno];
5733 /* We require a base register here... */
5734 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5736 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5737 &XEXP (op1, 0), &XEXP (x, 0),
5738 base_reg_class (mode, code, index_code),
5739 GET_MODE (x), GET_MODE (x), 0, 0,
5740 opnum, RELOAD_OTHER);
5742 update_auto_inc_notes (this_insn, regno, reloadnum);
5752 if (REG_P (XEXP (x, 0)))
5754 int regno = REGNO (XEXP (x, 0));
5758 /* A register that is incremented cannot be constant! */
5759 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5760 || reg_equiv_constant (regno) == 0);
5762 /* Handle a register that is equivalent to a memory location
5763 which cannot be addressed directly. */
5764 if (reg_equiv_memory_loc (regno) != 0
5765 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5767 rtx tem = make_memloc (XEXP (x, 0), regno);
5768 if (reg_equiv_address (regno)
5769 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5773 /* First reload the memory location's address.
5774 We can't use ADDR_TYPE (type) here, because we need to
5775 write back the value after reading it, hence we actually
5776 need two registers. */
5777 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5778 &XEXP (tem, 0), opnum, type,
5780 if (!rtx_equal_p (tem, orig))
5781 push_reg_equiv_alt_mem (regno, tem);
5782 /* Put this inside a new increment-expression. */
5783 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5784 /* Proceed to reload that, as if it contained a register. */
5788 /* If we have a hard register that is ok in this incdec context,
5789 don't make a reload. If the register isn't nice enough for
5790 autoincdec, we can reload it. But, if an autoincrement of a
5791 register that we here verified as playing nice, still outside
5792 isn't "valid", it must be that no autoincrement is "valid".
5793 If that is true and something made an autoincrement anyway,
5794 this must be a special context where one is allowed.
5795 (For example, a "push" instruction.)
5796 We can't improve this address, so leave it alone. */
5798 /* Otherwise, reload the autoincrement into a suitable hard reg
5799 and record how much to increment by. */
5801 if (reg_renumber[regno] >= 0)
5802 regno = reg_renumber[regno];
5803 if (regno >= FIRST_PSEUDO_REGISTER
5804 || !REG_OK_FOR_CONTEXT (context, regno, mode, code,
5809 /* If we can output the register afterwards, do so, this
5810 saves the extra update.
5811 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5812 CALL_INSN - and it does not set CC0.
5813 But don't do this if we cannot directly address the
5814 memory location, since this will make it harder to
5815 reuse address reloads, and increases register pressure.
5816 Also don't do this if we can probably update x directly. */
5817 rtx equiv = (MEM_P (XEXP (x, 0))
5819 : reg_equiv_mem (regno));
5820 enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
5821 if (insn && NONJUMP_INSN_P (insn) && equiv
5822 && memory_operand (equiv, GET_MODE (equiv))
5824 && ! sets_cc0_p (PATTERN (insn))
5826 && ! (icode != CODE_FOR_nothing
5827 && insn_operand_matches (icode, 0, equiv)
5828 && insn_operand_matches (icode, 1, equiv)))
5830 /* We use the original pseudo for loc, so that
5831 emit_reload_insns() knows which pseudo this
5832 reload refers to and updates the pseudo rtx, not
5833 its equivalent memory location, as well as the
5834 corresponding entry in reg_last_reload_reg. */
5835 loc = &XEXP (x_orig, 0);
5838 = push_reload (x, x, loc, loc,
5840 GET_MODE (x), GET_MODE (x), 0, 0,
5841 opnum, RELOAD_OTHER);
5846 = push_reload (x, x, loc, (rtx*) 0,
5848 GET_MODE (x), GET_MODE (x), 0, 0,
5851 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5856 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5866 /* Look for parts to reload in the inner expression and reload them
5867 too, in addition to this operation. Reloading all inner parts in
5868 addition to this one shouldn't be necessary, but at this point,
5869 we don't know if we can possibly omit any part that *can* be
5870 reloaded. Targets that are better off reloading just either part
5871 (or perhaps even a different part of an outer expression), should
5872 define LEGITIMIZE_RELOAD_ADDRESS. */
5873 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5874 context, code, SCRATCH, &XEXP (x, 0), opnum,
5875 type, ind_levels, insn);
5876 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5878 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5882 /* This is probably the result of a substitution, by eliminate_regs, of
5883 an equivalent address for a pseudo that was not allocated to a hard
5884 register. Verify that the specified address is valid and reload it
5887 Since we know we are going to reload this item, don't decrement for
5888 the indirection level.
5890 Note that this is actually conservative: it would be slightly more
5891 efficient to use the value of SPILL_INDIRECT_LEVELS from
5894 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5895 opnum, ADDR_TYPE (type), ind_levels, insn);
5896 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5898 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5903 int regno = REGNO (x);
5905 if (reg_equiv_constant (regno) != 0)
5907 find_reloads_address_part (reg_equiv_constant (regno), loc,
5909 GET_MODE (x), opnum, type, ind_levels);
5913 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5914 that feeds this insn. */
5915 if (reg_equiv_mem (regno) != 0)
5917 push_reload (reg_equiv_mem (regno), NULL_RTX, loc, (rtx*) 0,
5919 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5924 if (reg_equiv_memory_loc (regno)
5925 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5927 rtx tem = make_memloc (x, regno);
5928 if (reg_equiv_address (regno) != 0
5929 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5932 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5933 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5935 if (!rtx_equal_p (x, tem))
5936 push_reg_equiv_alt_mem (regno, x);
5940 if (reg_renumber[regno] >= 0)
5941 regno = reg_renumber[regno];
5943 if (regno >= FIRST_PSEUDO_REGISTER
5944 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5947 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5949 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5953 /* If a register appearing in an address is the subject of a CLOBBER
5954 in this insn, reload it into some other register to be safe.
5955 The CLOBBER is supposed to make the register unavailable
5956 from before this insn to after it. */
5957 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5959 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5961 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5968 if (REG_P (SUBREG_REG (x)))
5970 /* If this is a SUBREG of a hard register and the resulting register
5971 is of the wrong class, reload the whole SUBREG. This avoids
5972 needless copies if SUBREG_REG is multi-word. */
5973 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5975 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5977 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5980 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5982 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5986 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5987 is larger than the class size, then reload the whole SUBREG. */
5990 enum reg_class rclass = context_reg_class;
5991 if ((unsigned) CLASS_MAX_NREGS (rclass, GET_MODE (SUBREG_REG (x)))
5992 > reg_class_size[rclass])
5994 x = find_reloads_subreg_address (x, 0, opnum,
5996 ind_levels, insn, NULL);
5997 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
5998 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
6010 const char *fmt = GET_RTX_FORMAT (code);
6013 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6016 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6018 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
6019 &XEXP (x, i), opnum, type, ind_levels, insn);
6023 #undef REG_OK_FOR_CONTEXT
6027 /* X, which is found at *LOC, is a part of an address that needs to be
6028 reloaded into a register of class RCLASS. If X is a constant, or if
6029 X is a PLUS that contains a constant, check that the constant is a
6030 legitimate operand and that we are supposed to be able to load
6031 it into the register.
6033 If not, force the constant into memory and reload the MEM instead.
6035 MODE is the mode to use, in case X is an integer constant.
6037 OPNUM and TYPE describe the purpose of any reloads made.
6039 IND_LEVELS says how many levels of indirect addressing this machine
6043 find_reloads_address_part (rtx x, rtx *loc, enum reg_class rclass,
6044 enum machine_mode mode, int opnum,
6045 enum reload_type type, int ind_levels)
6048 && (!targetm.legitimate_constant_p (mode, x)
6049 || targetm.preferred_reload_class (x, rclass) == NO_REGS))
6051 x = force_const_mem (mode, x);
6052 find_reloads_address (mode, &x, XEXP (x, 0), &XEXP (x, 0),
6053 opnum, type, ind_levels, 0);
6056 else if (GET_CODE (x) == PLUS
6057 && CONSTANT_P (XEXP (x, 1))
6058 && (!targetm.legitimate_constant_p (GET_MODE (x), XEXP (x, 1))
6059 || targetm.preferred_reload_class (XEXP (x, 1), rclass)
6064 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
6065 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
6066 find_reloads_address (mode, &XEXP (x, 1), XEXP (tem, 0), &XEXP (tem, 0),
6067 opnum, type, ind_levels, 0);
6070 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6071 mode, VOIDmode, 0, 0, opnum, type);
6074 /* X, a subreg of a pseudo, is a part of an address that needs to be
6077 If the pseudo is equivalent to a memory location that cannot be directly
6078 addressed, make the necessary address reloads.
6080 If address reloads have been necessary, or if the address is changed
6081 by register elimination, return the rtx of the memory location;
6082 otherwise, return X.
6084 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
6087 OPNUM and TYPE identify the purpose of the reload.
6089 IND_LEVELS says how many levels of indirect addressing are
6090 supported at this point in the address.
6092 INSN, if nonzero, is the insn in which we do the reload. It is used
6093 to determine where to put USEs for pseudos that we have to replace with
6097 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
6098 enum reload_type type, int ind_levels, rtx insn,
6099 int *address_reloaded)
6101 int regno = REGNO (SUBREG_REG (x));
6104 if (reg_equiv_memory_loc (regno))
6106 /* If the address is not directly addressable, or if the address is not
6107 offsettable, then it must be replaced. */
6109 && (reg_equiv_address (regno)
6110 || ! offsettable_memref_p (reg_equiv_mem (regno))))
6113 if (force_replace || num_not_at_initial_offset)
6115 rtx tem = make_memloc (SUBREG_REG (x), regno);
6117 /* If the address changes because of register elimination, then
6118 it must be replaced. */
6120 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
6122 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
6123 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6127 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6128 hold the correct (negative) byte offset. */
6129 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6130 offset = inner_size - outer_size;
6132 offset = SUBREG_BYTE (x);
6134 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6135 PUT_MODE (tem, GET_MODE (x));
6136 if (MEM_OFFSET (tem))
6137 set_mem_offset (tem, plus_constant (MEM_OFFSET (tem), offset));
6139 && INTVAL (MEM_SIZE (tem)) != (HOST_WIDE_INT) outer_size)
6140 set_mem_size (tem, GEN_INT (outer_size));
6142 /* If this was a paradoxical subreg that we replaced, the
6143 resulting memory must be sufficiently aligned to allow
6144 us to widen the mode of the memory. */
6145 if (outer_size > inner_size)
6149 base = XEXP (tem, 0);
6150 if (GET_CODE (base) == PLUS)
6152 if (CONST_INT_P (XEXP (base, 1))
6153 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6155 base = XEXP (base, 0);
6158 || (REGNO_POINTER_ALIGN (REGNO (base))
6159 < outer_size * BITS_PER_UNIT))
6163 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6164 XEXP (tem, 0), &XEXP (tem, 0),
6165 opnum, type, ind_levels, insn);
6166 /* ??? Do we need to handle nonzero offsets somehow? */
6167 if (!offset && !rtx_equal_p (tem, orig))
6168 push_reg_equiv_alt_mem (regno, tem);
6170 /* For some processors an address may be valid in the
6171 original mode but not in a smaller mode. For
6172 example, ARM accepts a scaled index register in
6173 SImode but not in HImode. Note that this is only
6174 a problem if the address in reg_equiv_mem is already
6175 invalid in the new mode; other cases would be fixed
6176 by find_reloads_address as usual.
6178 ??? We attempt to handle such cases here by doing an
6179 additional reload of the full address after the
6180 usual processing by find_reloads_address. Note that
6181 this may not work in the general case, but it seems
6182 to cover the cases where this situation currently
6183 occurs. A more general fix might be to reload the
6184 *value* instead of the address, but this would not
6185 be expected by the callers of this routine as-is.
6187 If find_reloads_address already completed replaced
6188 the address, there is nothing further to do. */
6190 && reg_equiv_mem (regno) != 0
6191 && !strict_memory_address_addr_space_p
6192 (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0),
6193 MEM_ADDR_SPACE (reg_equiv_mem (regno))))
6195 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6196 base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6197 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6201 /* If this is not a toplevel operand, find_reloads doesn't see
6202 this substitution. We have to emit a USE of the pseudo so
6203 that delete_output_reload can see it. */
6204 if (replace_reloads && recog_data.operand[opnum] != x)
6205 /* We mark the USE with QImode so that we recognize it
6206 as one that can be safely deleted at the end of
6208 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6215 if (reloaded && address_reloaded)
6216 *address_reloaded = 1;
6221 /* Substitute into the current INSN the registers into which we have reloaded
6222 the things that need reloading. The array `replacements'
6223 contains the locations of all pointers that must be changed
6224 and says what to replace them with.
6226 Return the rtx that X translates into; usually X, but modified. */
6229 subst_reloads (rtx insn)
6233 for (i = 0; i < n_replacements; i++)
6235 struct replacement *r = &replacements[i];
6236 rtx reloadreg = rld[r->what].reg_rtx;
6240 /* This checking takes a very long time on some platforms
6241 causing the gcc.c-torture/compile/limits-fnargs.c test
6242 to time out during testing. See PR 31850.
6244 Internal consistency test. Check that we don't modify
6245 anything in the equivalence arrays. Whenever something from
6246 those arrays needs to be reloaded, it must be unshared before
6247 being substituted into; the equivalence must not be modified.
6248 Otherwise, if the equivalence is used after that, it will
6249 have been modified, and the thing substituted (probably a
6250 register) is likely overwritten and not a usable equivalence. */
6253 for (check_regno = 0; check_regno < max_regno; check_regno++)
6255 #define CHECK_MODF(ARRAY) \
6256 gcc_assert (!VEC_index (reg_equivs_t, reg_equivs, check_regno).ARRAY \
6257 || !loc_mentioned_in_p (r->where, \
6258 VEC_index (reg_equivs_t, reg_equivs, check_regno).ARRAY))
6260 CHECK_MODF (equiv_constant);
6261 CHECK_MODF (equiv_memory_loc);
6262 CHECK_MODF (equiv_address);
6263 CHECK_MODF (equiv_mem);
6266 #endif /* DEBUG_RELOAD */
6268 /* If we're replacing a LABEL_REF with a register, there must
6269 already be an indication (to e.g. flow) which label this
6270 register refers to. */
6271 gcc_assert (GET_CODE (*r->where) != LABEL_REF
6273 || find_reg_note (insn,
6275 XEXP (*r->where, 0))
6276 || label_is_jump_target_p (XEXP (*r->where, 0), insn));
6278 /* Encapsulate RELOADREG so its machine mode matches what
6279 used to be there. Note that gen_lowpart_common will
6280 do the wrong thing if RELOADREG is multi-word. RELOADREG
6281 will always be a REG here. */
6282 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6283 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6285 *r->where = reloadreg;
6287 /* If reload got no reg and isn't optional, something's wrong. */
6289 gcc_assert (rld[r->what].optional);
6293 /* Make a copy of any replacements being done into X and move those
6294 copies to locations in Y, a copy of X. */
6297 copy_replacements (rtx x, rtx y)
6299 copy_replacements_1 (&x, &y, n_replacements);
6303 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6307 struct replacement *r;
6311 for (j = 0; j < orig_replacements; j++)
6312 if (replacements[j].where == px)
6314 r = &replacements[n_replacements++];
6316 r->what = replacements[j].what;
6317 r->mode = replacements[j].mode;
6322 code = GET_CODE (x);
6323 fmt = GET_RTX_FORMAT (code);
6325 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6328 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6329 else if (fmt[i] == 'E')
6330 for (j = XVECLEN (x, i); --j >= 0; )
6331 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6336 /* Change any replacements being done to *X to be done to *Y. */
6339 move_replacements (rtx *x, rtx *y)
6343 for (i = 0; i < n_replacements; i++)
6344 if (replacements[i].where == x)
6345 replacements[i].where = y;
6348 /* If LOC was scheduled to be replaced by something, return the replacement.
6349 Otherwise, return *LOC. */
6352 find_replacement (rtx *loc)
6354 struct replacement *r;
6356 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6358 rtx reloadreg = rld[r->what].reg_rtx;
6360 if (reloadreg && r->where == loc)
6362 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6363 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6367 else if (reloadreg && GET_CODE (*loc) == SUBREG
6368 && r->where == &SUBREG_REG (*loc))
6370 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6371 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6373 return simplify_gen_subreg (GET_MODE (*loc), reloadreg,
6374 GET_MODE (SUBREG_REG (*loc)),
6375 SUBREG_BYTE (*loc));
6379 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6380 what's inside and make a new rtl if so. */
6381 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6382 || GET_CODE (*loc) == MULT)
6384 rtx x = find_replacement (&XEXP (*loc, 0));
6385 rtx y = find_replacement (&XEXP (*loc, 1));
6387 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6388 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6394 /* Return nonzero if register in range [REGNO, ENDREGNO)
6395 appears either explicitly or implicitly in X
6396 other than being stored into (except for earlyclobber operands).
6398 References contained within the substructure at LOC do not count.
6399 LOC may be zero, meaning don't ignore anything.
6401 This is similar to refers_to_regno_p in rtlanal.c except that we
6402 look at equivalences for pseudos that didn't get hard registers. */
6405 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6417 code = GET_CODE (x);
6424 /* If this is a pseudo, a hard register must not have been allocated.
6425 X must therefore either be a constant or be in memory. */
6426 if (r >= FIRST_PSEUDO_REGISTER)
6428 if (reg_equiv_memory_loc (r))
6429 return refers_to_regno_for_reload_p (regno, endregno,
6430 reg_equiv_memory_loc (r),
6433 gcc_assert (reg_equiv_constant (r) || reg_equiv_invariant (r));
6437 return (endregno > r
6438 && regno < r + (r < FIRST_PSEUDO_REGISTER
6439 ? hard_regno_nregs[r][GET_MODE (x)]
6443 /* If this is a SUBREG of a hard reg, we can see exactly which
6444 registers are being modified. Otherwise, handle normally. */
6445 if (REG_P (SUBREG_REG (x))
6446 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6448 unsigned int inner_regno = subreg_regno (x);
6449 unsigned int inner_endregno
6450 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6451 ? subreg_nregs (x) : 1);
6453 return endregno > inner_regno && regno < inner_endregno;
6459 if (&SET_DEST (x) != loc
6460 /* Note setting a SUBREG counts as referring to the REG it is in for
6461 a pseudo but not for hard registers since we can
6462 treat each word individually. */
6463 && ((GET_CODE (SET_DEST (x)) == SUBREG
6464 && loc != &SUBREG_REG (SET_DEST (x))
6465 && REG_P (SUBREG_REG (SET_DEST (x)))
6466 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6467 && refers_to_regno_for_reload_p (regno, endregno,
6468 SUBREG_REG (SET_DEST (x)),
6470 /* If the output is an earlyclobber operand, this is
6472 || ((!REG_P (SET_DEST (x))
6473 || earlyclobber_operand_p (SET_DEST (x)))
6474 && refers_to_regno_for_reload_p (regno, endregno,
6475 SET_DEST (x), loc))))
6478 if (code == CLOBBER || loc == &SET_SRC (x))
6487 /* X does not match, so try its subexpressions. */
6489 fmt = GET_RTX_FORMAT (code);
6490 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6492 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6500 if (refers_to_regno_for_reload_p (regno, endregno,
6504 else if (fmt[i] == 'E')
6507 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6508 if (loc != &XVECEXP (x, i, j)
6509 && refers_to_regno_for_reload_p (regno, endregno,
6510 XVECEXP (x, i, j), loc))
6517 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6518 we check if any register number in X conflicts with the relevant register
6519 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6520 contains a MEM (we don't bother checking for memory addresses that can't
6521 conflict because we expect this to be a rare case.
6523 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6524 that we look at equivalences for pseudos that didn't get hard registers. */
6527 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6529 int regno, endregno;
6531 /* Overly conservative. */
6532 if (GET_CODE (x) == STRICT_LOW_PART
6533 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6536 /* If either argument is a constant, then modifying X can not affect IN. */
6537 if (CONSTANT_P (x) || CONSTANT_P (in))
6539 else if (GET_CODE (x) == SUBREG && MEM_P (SUBREG_REG (x)))
6540 return refers_to_mem_for_reload_p (in);
6541 else if (GET_CODE (x) == SUBREG)
6543 regno = REGNO (SUBREG_REG (x));
6544 if (regno < FIRST_PSEUDO_REGISTER)
6545 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6546 GET_MODE (SUBREG_REG (x)),
6549 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6550 ? subreg_nregs (x) : 1);
6552 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6558 /* If this is a pseudo, it must not have been assigned a hard register.
6559 Therefore, it must either be in memory or be a constant. */
6561 if (regno >= FIRST_PSEUDO_REGISTER)
6563 if (reg_equiv_memory_loc (regno))
6564 return refers_to_mem_for_reload_p (in);
6565 gcc_assert (reg_equiv_constant (regno));
6569 endregno = END_HARD_REGNO (x);
6571 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6574 return refers_to_mem_for_reload_p (in);
6575 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6576 || GET_CODE (x) == CC0)
6577 return reg_mentioned_p (x, in);
6580 gcc_assert (GET_CODE (x) == PLUS);
6582 /* We actually want to know if X is mentioned somewhere inside IN.
6583 We must not say that (plus (sp) (const_int 124)) is in
6584 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6585 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6586 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6591 else if (GET_CODE (in) == PLUS)
6592 return (rtx_equal_p (x, in)
6593 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6594 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6595 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6596 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6602 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6606 refers_to_mem_for_reload_p (rtx x)
6615 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6616 && reg_equiv_memory_loc (REGNO (x)));
6618 fmt = GET_RTX_FORMAT (GET_CODE (x));
6619 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6621 && (MEM_P (XEXP (x, i))
6622 || refers_to_mem_for_reload_p (XEXP (x, i))))
6628 /* Check the insns before INSN to see if there is a suitable register
6629 containing the same value as GOAL.
6630 If OTHER is -1, look for a register in class RCLASS.
6631 Otherwise, just see if register number OTHER shares GOAL's value.
6633 Return an rtx for the register found, or zero if none is found.
6635 If RELOAD_REG_P is (short *)1,
6636 we reject any hard reg that appears in reload_reg_rtx
6637 because such a hard reg is also needed coming into this insn.
6639 If RELOAD_REG_P is any other nonzero value,
6640 it is a vector indexed by hard reg number
6641 and we reject any hard reg whose element in the vector is nonnegative
6642 as well as any that appears in reload_reg_rtx.
6644 If GOAL is zero, then GOALREG is a register number; we look
6645 for an equivalent for that register.
6647 MODE is the machine mode of the value we want an equivalence for.
6648 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6650 This function is used by jump.c as well as in the reload pass.
6652 If GOAL is the sum of the stack pointer and a constant, we treat it
6653 as if it were a constant except that sp is required to be unchanging. */
6656 find_equiv_reg (rtx goal, rtx insn, enum reg_class rclass, int other,
6657 short *reload_reg_p, int goalreg, enum machine_mode mode)
6660 rtx goaltry, valtry, value, where;
6666 int goal_mem_addr_varies = 0;
6667 int need_stable_sp = 0;
6674 else if (REG_P (goal))
6675 regno = REGNO (goal);
6676 else if (MEM_P (goal))
6678 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6679 if (MEM_VOLATILE_P (goal))
6681 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6683 /* An address with side effects must be reexecuted. */
6698 else if (CONSTANT_P (goal))
6700 else if (GET_CODE (goal) == PLUS
6701 && XEXP (goal, 0) == stack_pointer_rtx
6702 && CONSTANT_P (XEXP (goal, 1)))
6703 goal_const = need_stable_sp = 1;
6704 else if (GET_CODE (goal) == PLUS
6705 && XEXP (goal, 0) == frame_pointer_rtx
6706 && CONSTANT_P (XEXP (goal, 1)))
6712 /* Scan insns back from INSN, looking for one that copies
6713 a value into or out of GOAL.
6714 Stop and give up if we reach a label. */
6719 if (p && DEBUG_INSN_P (p))
6722 if (p == 0 || LABEL_P (p)
6723 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6726 /* Don't reuse register contents from before a setjmp-type
6727 function call; on the second return (from the longjmp) it
6728 might have been clobbered by a later reuse. It doesn't
6729 seem worthwhile to actually go and see if it is actually
6730 reused even if that information would be readily available;
6731 just don't reuse it across the setjmp call. */
6732 if (CALL_P (p) && find_reg_note (p, REG_SETJMP, NULL_RTX))
6735 if (NONJUMP_INSN_P (p)
6736 /* If we don't want spill regs ... */
6737 && (! (reload_reg_p != 0
6738 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6739 /* ... then ignore insns introduced by reload; they aren't
6740 useful and can cause results in reload_as_needed to be
6741 different from what they were when calculating the need for
6742 spills. If we notice an input-reload insn here, we will
6743 reject it below, but it might hide a usable equivalent.
6744 That makes bad code. It may even fail: perhaps no reg was
6745 spilled for this insn because it was assumed we would find
6747 || INSN_UID (p) < reload_first_uid))
6750 pat = single_set (p);
6752 /* First check for something that sets some reg equal to GOAL. */
6755 && true_regnum (SET_SRC (pat)) == regno
6756 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6759 && true_regnum (SET_DEST (pat)) == regno
6760 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6762 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6763 /* When looking for stack pointer + const,
6764 make sure we don't use a stack adjust. */
6765 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6766 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6768 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6769 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6771 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6772 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6773 /* If we are looking for a constant,
6774 and something equivalent to that constant was copied
6775 into a reg, we can use that reg. */
6776 || (goal_const && REG_NOTES (p) != 0
6777 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6778 && ((rtx_equal_p (XEXP (tem, 0), goal)
6780 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6781 || (REG_P (SET_DEST (pat))
6782 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6783 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6784 && CONST_INT_P (goal)
6786 = operand_subword (XEXP (tem, 0), 0, 0,
6788 && rtx_equal_p (goal, goaltry)
6790 = operand_subword (SET_DEST (pat), 0, 0,
6792 && (valueno = true_regnum (valtry)) >= 0)))
6793 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6795 && REG_P (SET_DEST (pat))
6796 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6797 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6798 && CONST_INT_P (goal)
6799 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6801 && rtx_equal_p (goal, goaltry)
6803 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6804 && (valueno = true_regnum (valtry)) >= 0)))
6808 if (valueno != other)
6811 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6813 else if (!in_hard_reg_set_p (reg_class_contents[(int) rclass],
6823 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6824 (or copying VALUE into GOAL, if GOAL is also a register).
6825 Now verify that VALUE is really valid. */
6827 /* VALUENO is the register number of VALUE; a hard register. */
6829 /* Don't try to re-use something that is killed in this insn. We want
6830 to be able to trust REG_UNUSED notes. */
6831 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6834 /* If we propose to get the value from the stack pointer or if GOAL is
6835 a MEM based on the stack pointer, we need a stable SP. */
6836 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6837 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6841 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6842 if (GET_MODE (value) != mode)
6845 /* Reject VALUE if it was loaded from GOAL
6846 and is also a register that appears in the address of GOAL. */
6848 if (goal_mem && value == SET_DEST (single_set (where))
6849 && refers_to_regno_for_reload_p (valueno, end_hard_regno (mode, valueno),
6853 /* Reject registers that overlap GOAL. */
6855 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6856 nregs = hard_regno_nregs[regno][mode];
6859 valuenregs = hard_regno_nregs[valueno][mode];
6861 if (!goal_mem && !goal_const
6862 && regno + nregs > valueno && regno < valueno + valuenregs)
6865 /* Reject VALUE if it is one of the regs reserved for reloads.
6866 Reload1 knows how to reuse them anyway, and it would get
6867 confused if we allocated one without its knowledge.
6868 (Now that insns introduced by reload are ignored above,
6869 this case shouldn't happen, but I'm not positive.) */
6871 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6874 for (i = 0; i < valuenregs; ++i)
6875 if (reload_reg_p[valueno + i] >= 0)
6879 /* Reject VALUE if it is a register being used for an input reload
6880 even if it is not one of those reserved. */
6882 if (reload_reg_p != 0)
6885 for (i = 0; i < n_reloads; i++)
6886 if (rld[i].reg_rtx != 0 && rld[i].in)
6888 int regno1 = REGNO (rld[i].reg_rtx);
6889 int nregs1 = hard_regno_nregs[regno1]
6890 [GET_MODE (rld[i].reg_rtx)];
6891 if (regno1 < valueno + valuenregs
6892 && regno1 + nregs1 > valueno)
6898 /* We must treat frame pointer as varying here,
6899 since it can vary--in a nonlocal goto as generated by expand_goto. */
6900 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6902 /* Now verify that the values of GOAL and VALUE remain unaltered
6903 until INSN is reached. */
6912 /* Don't trust the conversion past a function call
6913 if either of the two is in a call-clobbered register, or memory. */
6918 if (goal_mem || need_stable_sp)
6921 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6922 for (i = 0; i < nregs; ++i)
6923 if (call_used_regs[regno + i]
6924 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6927 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6928 for (i = 0; i < valuenregs; ++i)
6929 if (call_used_regs[valueno + i]
6930 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
6938 /* Watch out for unspec_volatile, and volatile asms. */
6939 if (volatile_insn_p (pat))
6942 /* If this insn P stores in either GOAL or VALUE, return 0.
6943 If GOAL is a memory ref and this insn writes memory, return 0.
6944 If GOAL is a memory ref and its address is not constant,
6945 and this insn P changes a register used in GOAL, return 0. */
6947 if (GET_CODE (pat) == COND_EXEC)
6948 pat = COND_EXEC_CODE (pat);
6949 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6951 rtx dest = SET_DEST (pat);
6952 while (GET_CODE (dest) == SUBREG
6953 || GET_CODE (dest) == ZERO_EXTRACT
6954 || GET_CODE (dest) == STRICT_LOW_PART)
6955 dest = XEXP (dest, 0);
6958 int xregno = REGNO (dest);
6960 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6961 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6964 if (xregno < regno + nregs && xregno + xnregs > regno)
6966 if (xregno < valueno + valuenregs
6967 && xregno + xnregs > valueno)
6969 if (goal_mem_addr_varies
6970 && reg_overlap_mentioned_for_reload_p (dest, goal))
6972 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6975 else if (goal_mem && MEM_P (dest)
6976 && ! push_operand (dest, GET_MODE (dest)))
6978 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6979 && reg_equiv_memory_loc (regno) != 0)
6981 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6984 else if (GET_CODE (pat) == PARALLEL)
6987 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6989 rtx v1 = XVECEXP (pat, 0, i);
6990 if (GET_CODE (v1) == COND_EXEC)
6991 v1 = COND_EXEC_CODE (v1);
6992 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6994 rtx dest = SET_DEST (v1);
6995 while (GET_CODE (dest) == SUBREG
6996 || GET_CODE (dest) == ZERO_EXTRACT
6997 || GET_CODE (dest) == STRICT_LOW_PART)
6998 dest = XEXP (dest, 0);
7001 int xregno = REGNO (dest);
7003 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
7004 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
7007 if (xregno < regno + nregs
7008 && xregno + xnregs > regno)
7010 if (xregno < valueno + valuenregs
7011 && xregno + xnregs > valueno)
7013 if (goal_mem_addr_varies
7014 && reg_overlap_mentioned_for_reload_p (dest,
7017 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
7020 else if (goal_mem && MEM_P (dest)
7021 && ! push_operand (dest, GET_MODE (dest)))
7023 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
7024 && reg_equiv_memory_loc (regno) != 0)
7026 else if (need_stable_sp
7027 && push_operand (dest, GET_MODE (dest)))
7033 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
7037 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
7038 link = XEXP (link, 1))
7040 pat = XEXP (link, 0);
7041 if (GET_CODE (pat) == CLOBBER)
7043 rtx dest = SET_DEST (pat);
7047 int xregno = REGNO (dest);
7049 = hard_regno_nregs[xregno][GET_MODE (dest)];
7051 if (xregno < regno + nregs
7052 && xregno + xnregs > regno)
7054 else if (xregno < valueno + valuenregs
7055 && xregno + xnregs > valueno)
7057 else if (goal_mem_addr_varies
7058 && reg_overlap_mentioned_for_reload_p (dest,
7063 else if (goal_mem && MEM_P (dest)
7064 && ! push_operand (dest, GET_MODE (dest)))
7066 else if (need_stable_sp
7067 && push_operand (dest, GET_MODE (dest)))
7074 /* If this insn auto-increments or auto-decrements
7075 either regno or valueno, return 0 now.
7076 If GOAL is a memory ref and its address is not constant,
7077 and this insn P increments a register used in GOAL, return 0. */
7081 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7082 if (REG_NOTE_KIND (link) == REG_INC
7083 && REG_P (XEXP (link, 0)))
7085 int incno = REGNO (XEXP (link, 0));
7086 if (incno < regno + nregs && incno >= regno)
7088 if (incno < valueno + valuenregs && incno >= valueno)
7090 if (goal_mem_addr_varies
7091 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7101 /* Find a place where INCED appears in an increment or decrement operator
7102 within X, and return the amount INCED is incremented or decremented by.
7103 The value is always positive. */
7106 find_inc_amount (rtx x, rtx inced)
7108 enum rtx_code code = GET_CODE (x);
7114 rtx addr = XEXP (x, 0);
7115 if ((GET_CODE (addr) == PRE_DEC
7116 || GET_CODE (addr) == POST_DEC
7117 || GET_CODE (addr) == PRE_INC
7118 || GET_CODE (addr) == POST_INC)
7119 && XEXP (addr, 0) == inced)
7120 return GET_MODE_SIZE (GET_MODE (x));
7121 else if ((GET_CODE (addr) == PRE_MODIFY
7122 || GET_CODE (addr) == POST_MODIFY)
7123 && GET_CODE (XEXP (addr, 1)) == PLUS
7124 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7125 && XEXP (addr, 0) == inced
7126 && CONST_INT_P (XEXP (XEXP (addr, 1), 1)))
7128 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7129 return i < 0 ? -i : i;
7133 fmt = GET_RTX_FORMAT (code);
7134 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7138 int tem = find_inc_amount (XEXP (x, i), inced);
7145 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7147 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7157 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7158 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7162 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7169 if (! INSN_P (insn))
7172 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7173 if (REG_NOTE_KIND (link) == REG_INC)
7175 unsigned int test = (int) REGNO (XEXP (link, 0));
7176 if (test >= regno && test < endregno)
7183 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7187 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7188 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7189 REG_INC. REGNO must refer to a hard register. */
7192 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7195 unsigned int nregs, endregno;
7197 /* regno must be a hard register. */
7198 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7200 nregs = hard_regno_nregs[regno][mode];
7201 endregno = regno + nregs;
7203 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7204 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7205 && REG_P (XEXP (PATTERN (insn), 0)))
7207 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7209 return test >= regno && test < endregno;
7212 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7215 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7217 int i = XVECLEN (PATTERN (insn), 0) - 1;
7221 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7222 if ((GET_CODE (elt) == CLOBBER
7223 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7224 && REG_P (XEXP (elt, 0)))
7226 unsigned int test = REGNO (XEXP (elt, 0));
7228 if (test >= regno && test < endregno)
7232 && reg_inc_found_and_valid_p (regno, endregno, elt))
7240 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7242 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7246 if (GET_MODE (reloadreg) == mode)
7249 regno = REGNO (reloadreg);
7251 if (WORDS_BIG_ENDIAN)
7252 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7253 - (int) hard_regno_nregs[regno][mode];
7255 return gen_rtx_REG (mode, regno);
7258 static const char *const reload_when_needed_name[] =
7261 "RELOAD_FOR_OUTPUT",
7263 "RELOAD_FOR_INPUT_ADDRESS",
7264 "RELOAD_FOR_INPADDR_ADDRESS",
7265 "RELOAD_FOR_OUTPUT_ADDRESS",
7266 "RELOAD_FOR_OUTADDR_ADDRESS",
7267 "RELOAD_FOR_OPERAND_ADDRESS",
7268 "RELOAD_FOR_OPADDR_ADDR",
7270 "RELOAD_FOR_OTHER_ADDRESS"
7273 /* These functions are used to print the variables set by 'find_reloads' */
7276 debug_reload_to_stream (FILE *f)
7283 for (r = 0; r < n_reloads; r++)
7285 fprintf (f, "Reload %d: ", r);
7289 fprintf (f, "reload_in (%s) = ",
7290 GET_MODE_NAME (rld[r].inmode));
7291 print_inline_rtx (f, rld[r].in, 24);
7292 fprintf (f, "\n\t");
7295 if (rld[r].out != 0)
7297 fprintf (f, "reload_out (%s) = ",
7298 GET_MODE_NAME (rld[r].outmode));
7299 print_inline_rtx (f, rld[r].out, 24);
7300 fprintf (f, "\n\t");
7303 fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
7305 fprintf (f, "%s (opnum = %d)",
7306 reload_when_needed_name[(int) rld[r].when_needed],
7309 if (rld[r].optional)
7310 fprintf (f, ", optional");
7312 if (rld[r].nongroup)
7313 fprintf (f, ", nongroup");
7315 if (rld[r].inc != 0)
7316 fprintf (f, ", inc by %d", rld[r].inc);
7318 if (rld[r].nocombine)
7319 fprintf (f, ", can't combine");
7321 if (rld[r].secondary_p)
7322 fprintf (f, ", secondary_reload_p");
7324 if (rld[r].in_reg != 0)
7326 fprintf (f, "\n\treload_in_reg: ");
7327 print_inline_rtx (f, rld[r].in_reg, 24);
7330 if (rld[r].out_reg != 0)
7332 fprintf (f, "\n\treload_out_reg: ");
7333 print_inline_rtx (f, rld[r].out_reg, 24);
7336 if (rld[r].reg_rtx != 0)
7338 fprintf (f, "\n\treload_reg_rtx: ");
7339 print_inline_rtx (f, rld[r].reg_rtx, 24);
7343 if (rld[r].secondary_in_reload != -1)
7345 fprintf (f, "%ssecondary_in_reload = %d",
7346 prefix, rld[r].secondary_in_reload);
7350 if (rld[r].secondary_out_reload != -1)
7351 fprintf (f, "%ssecondary_out_reload = %d\n",
7352 prefix, rld[r].secondary_out_reload);
7355 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7357 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7358 insn_data[rld[r].secondary_in_icode].name);
7362 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7363 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7364 insn_data[rld[r].secondary_out_icode].name);
7373 debug_reload_to_stream (stderr);