1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
102 #ifndef REGISTER_MOVE_COST
103 #define REGISTER_MOVE_COST(x, y) 2
106 /* The variables set up by `find_reloads' are:
108 n_reloads number of distinct reloads needed; max reload # + 1
109 tables indexed by reload number
110 reload_in rtx for value to reload from
111 reload_out rtx for where to store reload-reg afterward if nec
112 (often the same as reload_in)
113 reload_reg_class enum reg_class, saying what regs to reload into
114 reload_inmode enum machine_mode; mode this operand should have
115 when reloaded, on input.
116 reload_outmode enum machine_mode; mode this operand should have
117 when reloaded, on output.
118 reload_optional char, nonzero for an optional reload.
119 Optional reloads are ignored unless the
120 value is already sitting in a register.
121 reload_inc int, positive amount to increment or decrement by if
122 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
123 Ignored otherwise (don't assume it is zero).
124 reload_in_reg rtx. A reg for which reload_in is the equivalent.
125 If reload_in is a symbol_ref which came from
126 reg_equiv_constant, then this is the pseudo
127 which has that symbol_ref as equivalent.
128 reload_reg_rtx rtx. This is the register to reload into.
129 If it is zero when `find_reloads' returns,
130 you must find a suitable register in the class
131 specified by reload_reg_class, and store here
132 an rtx for that register with mode from
133 reload_inmode or reload_outmode.
134 reload_nocombine char, nonzero if this reload shouldn't be
135 combined with another reload.
136 reload_opnum int, operand number being reloaded. This is
137 used to group related reloads and need not always
138 be equal to the actual operand number in the insn,
139 though it current will be; for in-out operands, it
140 is one of the two operand numbers.
141 reload_when_needed enum, classifies reload as needed either for
142 addressing an input reload, addressing an output,
143 for addressing a non-reloaded mem ref,
144 or for unspecified purposes (i.e., more than one
146 reload_secondary_p int, 1 if this is a secondary register for one
148 reload_secondary_in_reload
149 reload_secondary_out_reload
150 int, gives the reload number of a secondary
151 reload, when needed; otherwise -1
152 reload_secondary_in_icode
153 reload_secondary_out_icode
154 enum insn_code, if a secondary reload is required,
155 gives the INSN_CODE that uses the secondary
156 reload as a scratch register, or CODE_FOR_nothing
157 if the secondary reload register is to be an
158 intermediate register. */
161 rtx reload_in[MAX_RELOADS];
162 rtx reload_out[MAX_RELOADS];
163 enum reg_class reload_reg_class[MAX_RELOADS];
164 enum machine_mode reload_inmode[MAX_RELOADS];
165 enum machine_mode reload_outmode[MAX_RELOADS];
166 rtx reload_reg_rtx[MAX_RELOADS];
167 char reload_optional[MAX_RELOADS];
168 int reload_inc[MAX_RELOADS];
169 rtx reload_in_reg[MAX_RELOADS];
170 char reload_nocombine[MAX_RELOADS];
171 int reload_opnum[MAX_RELOADS];
172 enum reload_type reload_when_needed[MAX_RELOADS];
173 int reload_secondary_p[MAX_RELOADS];
174 int reload_secondary_in_reload[MAX_RELOADS];
175 int reload_secondary_out_reload[MAX_RELOADS];
176 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
177 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
179 /* All the "earlyclobber" operands of the current insn
180 are recorded here. */
182 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
184 int reload_n_operands;
186 /* Replacing reloads.
188 If `replace_reloads' is nonzero, then as each reload is recorded
189 an entry is made for it in the table `replacements'.
190 Then later `subst_reloads' can look through that table and
191 perform all the replacements needed. */
193 /* Nonzero means record the places to replace. */
194 static int replace_reloads;
196 /* Each replacement is recorded with a structure like this. */
199 rtx *where; /* Location to store in */
200 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
201 a SUBREG; 0 otherwise. */
202 int what; /* which reload this is for */
203 enum machine_mode mode; /* mode it must have */
206 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
208 /* Number of replacements currently recorded. */
209 static int n_replacements;
211 /* Used to track what is modified by an operand. */
214 int reg_flag; /* Nonzero if referencing a register. */
215 int safe; /* Nonzero if this can't conflict with anything. */
216 rtx base; /* Base address for MEM. */
217 HOST_WIDE_INT start; /* Starting offset or register number. */
218 HOST_WIDE_INT end; /* Ending offset or register number. */
221 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
222 (see reg_equiv_address). */
223 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
224 static int n_memlocs;
226 #ifdef SECONDARY_MEMORY_NEEDED
228 /* Save MEMs needed to copy from one class of registers to another. One MEM
229 is used per mode, but normally only one or two modes are ever used.
231 We keep two versions, before and after register elimination. The one
232 after register elimination is record separately for each operand. This
233 is done in case the address is not valid to be sure that we separately
236 static rtx secondary_memlocs[NUM_MACHINE_MODES];
237 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
240 /* The instruction we are doing reloads for;
241 so we can test whether a register dies in it. */
242 static rtx this_insn;
244 /* Nonzero if this instruction is a user-specified asm with operands. */
245 static int this_insn_is_asm;
247 /* If hard_regs_live_known is nonzero,
248 we can tell which hard regs are currently live,
249 at least enough to succeed in choosing dummy reloads. */
250 static int hard_regs_live_known;
252 /* Indexed by hard reg number,
253 element is nonegative if hard reg has been spilled.
254 This vector is passed to `find_reloads' as an argument
255 and is not changed here. */
256 static short *static_reload_reg_p;
258 /* Set to 1 in subst_reg_equivs if it changes anything. */
259 static int subst_reg_equivs_changed;
261 /* On return from push_reload, holds the reload-number for the OUT
262 operand, which can be different for that from the input operand. */
263 static int output_reloadnum;
265 /* Compare two RTX's. */
266 #define MATCHES(x, y) \
267 (x == y || (x != 0 && (GET_CODE (x) == REG \
268 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
269 : rtx_equal_p (x, y) && ! side_effects_p (x))))
271 /* Indicates if two reloads purposes are for similar enough things that we
272 can merge their reloads. */
273 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
274 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
275 || ((when1) == (when2) && (op1) == (op2)) \
276 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
277 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
278 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
279 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
280 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
282 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
283 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
284 ((when1) != (when2) \
285 || ! ((op1) == (op2) \
286 || (when1) == RELOAD_FOR_INPUT \
287 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
288 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
290 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
291 enum machine_mode, enum reload_type,
293 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
294 enum machine_mode, enum machine_mode,
295 int, int, int, enum reload_type));
296 static void push_replacement PROTO((rtx *, int, enum machine_mode));
297 static void combine_reloads PROTO((void));
298 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
299 enum machine_mode, enum machine_mode,
300 enum reg_class, int));
301 static int earlyclobber_operand_p PROTO((rtx));
302 static int hard_reg_set_here_p PROTO((int, int, rtx));
303 static struct decomposition decompose PROTO((rtx));
304 static int immune_p PROTO((rtx, rtx, struct decomposition));
305 static int alternative_allows_memconst PROTO((char *, int));
306 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
307 static rtx make_memloc PROTO((rtx, int));
308 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
309 int, enum reload_type, int));
310 static rtx subst_reg_equivs PROTO((rtx));
311 static rtx subst_indexed_address PROTO((rtx));
312 static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
313 enum reload_type,int));
314 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
315 enum machine_mode, int,
316 enum reload_type, int));
317 static int find_inc_amount PROTO((rtx, rtx));
319 #ifdef HAVE_SECONDARY_RELOADS
321 /* Determine if any secondary reloads are needed for loading (if IN_P is
322 non-zero) or storing (if IN_P is zero) X to or from a reload register of
323 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
324 are needed, push them.
326 Return the reload number of the secondary reload we made, or -1 if
327 we didn't need one. *PICODE is set to the insn_code to use if we do
328 need a secondary reload. */
331 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
337 enum reg_class reload_class;
338 enum machine_mode reload_mode;
339 enum reload_type type;
340 enum insn_code *picode;
342 enum reg_class class = NO_REGS;
343 enum machine_mode mode = reload_mode;
344 enum insn_code icode = CODE_FOR_nothing;
345 enum reg_class t_class = NO_REGS;
346 enum machine_mode t_mode = VOIDmode;
347 enum insn_code t_icode = CODE_FOR_nothing;
348 enum reload_type secondary_type;
350 int s_reload, t_reload = -1;
352 if (type == RELOAD_FOR_INPUT_ADDRESS || type == RELOAD_FOR_OUTPUT_ADDRESS)
353 secondary_type = type;
355 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
357 *picode = CODE_FOR_nothing;
359 /* If X is a paradoxical SUBREG, use the inner value to determine both the
360 mode and object being reloaded. */
361 if (GET_CODE (x) == SUBREG
362 && (GET_MODE_SIZE (GET_MODE (x))
363 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
366 reload_mode = GET_MODE (x);
369 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
370 is still a pseudo-register by now, it *must* have an equivalent MEM
371 but we don't want to assume that), use that equivalent when seeing if
372 a secondary reload is needed since whether or not a reload is needed
373 might be sensitive to the form of the MEM. */
375 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
376 && reg_equiv_mem[REGNO (x)] != 0)
377 x = reg_equiv_mem[REGNO (x)];
379 #ifdef SECONDARY_INPUT_RELOAD_CLASS
381 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
384 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
386 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
389 /* If we don't need any secondary registers, done. */
390 if (class == NO_REGS)
393 /* Get a possible insn to use. If the predicate doesn't accept X, don't
396 icode = (in_p ? reload_in_optab[(int) reload_mode]
397 : reload_out_optab[(int) reload_mode]);
399 if (icode != CODE_FOR_nothing
400 && insn_operand_predicate[(int) icode][in_p]
401 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
402 icode = CODE_FOR_nothing;
404 /* If we will be using an insn, see if it can directly handle the reload
405 register we will be using. If it can, the secondary reload is for a
406 scratch register. If it can't, we will use the secondary reload for
407 an intermediate register and require a tertiary reload for the scratch
410 if (icode != CODE_FOR_nothing)
412 /* If IN_P is non-zero, the reload register will be the output in
413 operand 0. If IN_P is zero, the reload register will be the input
414 in operand 1. Outputs should have an initial "=", which we must
417 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
418 enum reg_class insn_class
419 = (insn_letter == 'r' ? GENERAL_REGS
420 : REG_CLASS_FROM_LETTER (insn_letter));
422 if (insn_class == NO_REGS
423 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
424 /* The scratch register's constraint must start with "=&". */
425 || insn_operand_constraint[(int) icode][2][0] != '='
426 || insn_operand_constraint[(int) icode][2][1] != '&')
429 if (reg_class_subset_p (reload_class, insn_class))
430 mode = insn_operand_mode[(int) icode][2];
433 char t_letter = insn_operand_constraint[(int) icode][2][2];
435 t_mode = insn_operand_mode[(int) icode][2];
436 t_class = (t_letter == 'r' ? GENERAL_REGS
437 : REG_CLASS_FROM_LETTER (t_letter));
439 icode = CODE_FOR_nothing;
443 /* This case isn't valid, so fail. Reload is allowed to use the same
444 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
445 in the case of a secondary register, we actually need two different
446 registers for correct code. We fail here to prevent the possibility of
447 silently generating incorrect code later.
449 The convention is that secondary input reloads are valid only if the
450 secondary_class is different from class. If you have such a case, you
451 can not use secondary reloads, you must work around the problem some
454 Allow this when MODE is not reload_mode and assume that the generated
455 code handles this case (it does on the Alpha, which is the only place
456 this currently happens). */
458 if (in_p && class == reload_class && mode == reload_mode)
461 /* If we need a tertiary reload, see if we have one we can reuse or else
464 if (t_class != NO_REGS)
466 for (t_reload = 0; t_reload < n_reloads; t_reload++)
467 if (reload_secondary_p[t_reload]
468 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
469 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
470 && ((in_p && reload_inmode[t_reload] == t_mode)
471 || (! in_p && reload_outmode[t_reload] == t_mode))
472 && ((in_p && (reload_secondary_in_icode[t_reload]
473 == CODE_FOR_nothing))
474 || (! in_p &&(reload_secondary_out_icode[t_reload]
475 == CODE_FOR_nothing)))
476 && (reg_class_size[(int) t_class] == 1
477 #ifdef SMALL_REGISTER_CLASSES
481 && MERGABLE_RELOADS (secondary_type,
482 reload_when_needed[t_reload],
483 opnum, reload_opnum[t_reload]))
486 reload_inmode[t_reload] = t_mode;
488 reload_outmode[t_reload] = t_mode;
490 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
491 reload_reg_class[t_reload] = t_class;
493 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
494 reload_optional[t_reload] &= optional;
495 reload_secondary_p[t_reload] = 1;
496 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
497 opnum, reload_opnum[t_reload]))
498 reload_when_needed[t_reload] = RELOAD_OTHER;
501 if (t_reload == n_reloads)
503 /* We need to make a new tertiary reload for this register class. */
504 reload_in[t_reload] = reload_out[t_reload] = 0;
505 reload_reg_class[t_reload] = t_class;
506 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
507 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
508 reload_reg_rtx[t_reload] = 0;
509 reload_optional[t_reload] = optional;
510 reload_inc[t_reload] = 0;
511 /* Maybe we could combine these, but it seems too tricky. */
512 reload_nocombine[t_reload] = 1;
513 reload_in_reg[t_reload] = 0;
514 reload_opnum[t_reload] = opnum;
515 reload_when_needed[t_reload] = secondary_type;
516 reload_secondary_in_reload[t_reload] = -1;
517 reload_secondary_out_reload[t_reload] = -1;
518 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
519 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
520 reload_secondary_p[t_reload] = 1;
526 /* See if we can reuse an existing secondary reload. */
527 for (s_reload = 0; s_reload < n_reloads; s_reload++)
528 if (reload_secondary_p[s_reload]
529 && (reg_class_subset_p (class, reload_reg_class[s_reload])
530 || reg_class_subset_p (reload_reg_class[s_reload], class))
531 && ((in_p && reload_inmode[s_reload] == mode)
532 || (! in_p && reload_outmode[s_reload] == mode))
533 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
534 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
535 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
536 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
537 && (reg_class_size[(int) class] == 1
538 #ifdef SMALL_REGISTER_CLASSES
542 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
543 opnum, reload_opnum[s_reload]))
546 reload_inmode[s_reload] = mode;
548 reload_outmode[s_reload] = mode;
550 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
551 reload_reg_class[s_reload] = class;
553 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
554 reload_optional[s_reload] &= optional;
555 reload_secondary_p[s_reload] = 1;
556 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
557 opnum, reload_opnum[s_reload]))
558 reload_when_needed[s_reload] = RELOAD_OTHER;
561 if (s_reload == n_reloads)
563 /* We need to make a new secondary reload for this register class. */
564 reload_in[s_reload] = reload_out[s_reload] = 0;
565 reload_reg_class[s_reload] = class;
567 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
568 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
569 reload_reg_rtx[s_reload] = 0;
570 reload_optional[s_reload] = optional;
571 reload_inc[s_reload] = 0;
572 /* Maybe we could combine these, but it seems too tricky. */
573 reload_nocombine[s_reload] = 1;
574 reload_in_reg[s_reload] = 0;
575 reload_opnum[s_reload] = opnum;
576 reload_when_needed[s_reload] = secondary_type;
577 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
578 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
579 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
580 reload_secondary_out_icode[s_reload]
581 = ! in_p ? t_icode : CODE_FOR_nothing;
582 reload_secondary_p[s_reload] = 1;
586 #ifdef SECONDARY_MEMORY_NEEDED
587 /* If we need a memory location to copy between the two reload regs,
590 if (in_p && icode == CODE_FOR_nothing
591 && SECONDARY_MEMORY_NEEDED (class, reload_class, reload_mode))
592 get_secondary_mem (x, reload_mode, opnum, type);
594 if (! in_p && icode == CODE_FOR_nothing
595 && SECONDARY_MEMORY_NEEDED (reload_class, class, reload_mode))
596 get_secondary_mem (x, reload_mode, opnum, type);
603 #endif /* HAVE_SECONDARY_RELOADS */
605 #ifdef SECONDARY_MEMORY_NEEDED
607 /* Return a memory location that will be used to copy X in mode MODE.
608 If we haven't already made a location for this mode in this insn,
609 call find_reloads_address on the location being returned. */
612 get_secondary_mem (x, mode, opnum, type)
614 enum machine_mode mode;
616 enum reload_type type;
621 /* By default, if MODE is narrower than a word, widen it to a word.
622 This is required because most machines that require these memory
623 locations do not support short load and stores from all registers
624 (e.g., FP registers). */
626 #ifdef SECONDARY_MEMORY_NEEDED_MODE
627 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
629 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
630 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
633 /* If we already have made a MEM for this operand in MODE, return it. */
634 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
635 return secondary_memlocs_elim[(int) mode][opnum];
637 /* If this is the first time we've tried to get a MEM for this mode,
638 allocate a new one. `something_changed' in reload will get set
639 by noticing that the frame size has changed. */
641 if (secondary_memlocs[(int) mode] == 0)
643 #ifdef SECONDARY_MEMORY_NEEDED_RTX
644 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
646 secondary_memlocs[(int) mode]
647 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
651 /* Get a version of the address doing any eliminations needed. If that
652 didn't give us a new MEM, make a new one if it isn't valid. */
654 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
655 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
657 if (! mem_valid && loc == secondary_memlocs[(int) mode])
658 loc = copy_rtx (loc);
660 /* The only time the call below will do anything is if the stack
661 offset is too large. In that case IND_LEVELS doesn't matter, so we
662 can just pass a zero. Adjust the type to be the address of the
663 corresponding object. If the address was valid, save the eliminated
664 address. If it wasn't valid, we need to make a reload each time, so
669 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
670 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
673 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
677 secondary_memlocs_elim[(int) mode][opnum] = loc;
681 /* Clear any secondary memory locations we've made. */
684 clear_secondary_mem ()
686 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
688 #endif /* SECONDARY_MEMORY_NEEDED */
690 /* Record one reload that needs to be performed.
691 IN is an rtx saying where the data are to be found before this instruction.
692 OUT says where they must be stored after the instruction.
693 (IN is zero for data not read, and OUT is zero for data not written.)
694 INLOC and OUTLOC point to the places in the instructions where
695 IN and OUT were found.
696 If IN and OUT are both non-zero, it means the same register must be used
697 to reload both IN and OUT.
699 CLASS is a register class required for the reloaded data.
700 INMODE is the machine mode that the instruction requires
701 for the reg that replaces IN and OUTMODE is likewise for OUT.
703 If IN is zero, then OUT's location and mode should be passed as
706 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
708 OPTIONAL nonzero means this reload does not need to be performed:
709 it can be discarded if that is more convenient.
711 OPNUM and TYPE say what the purpose of this reload is.
713 The return value is the reload-number for this reload.
715 If both IN and OUT are nonzero, in some rare cases we might
716 want to make two separate reloads. (Actually we never do this now.)
717 Therefore, the reload-number for OUT is stored in
718 output_reloadnum when we return; the return value applies to IN.
719 Usually (presently always), when IN and OUT are nonzero,
720 the two reload-numbers are equal, but the caller should be careful to
724 push_reload (in, out, inloc, outloc, class,
725 inmode, outmode, strict_low, optional, opnum, type)
726 register rtx in, out;
728 enum reg_class class;
729 enum machine_mode inmode, outmode;
733 enum reload_type type;
737 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
738 int secondary_in_reload = -1, secondary_out_reload = -1;
739 enum insn_code secondary_in_icode = CODE_FOR_nothing;
740 enum insn_code secondary_out_icode = CODE_FOR_nothing;
742 /* INMODE and/or OUTMODE could be VOIDmode if no mode
743 has been specified for the operand. In that case,
744 use the operand's mode as the mode to reload. */
745 if (inmode == VOIDmode && in != 0)
746 inmode = GET_MODE (in);
747 if (outmode == VOIDmode && out != 0)
748 outmode = GET_MODE (out);
750 /* If IN is a pseudo register everywhere-equivalent to a constant, and
751 it is not in a hard register, reload straight from the constant,
752 since we want to get rid of such pseudo registers.
753 Often this is done earlier, but not always in find_reloads_address. */
754 if (in != 0 && GET_CODE (in) == REG)
756 register int regno = REGNO (in);
758 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
759 && reg_equiv_constant[regno] != 0)
760 in = reg_equiv_constant[regno];
763 /* Likewise for OUT. Of course, OUT will never be equivalent to
764 an actual constant, but it might be equivalent to a memory location
765 (in the case of a parameter). */
766 if (out != 0 && GET_CODE (out) == REG)
768 register int regno = REGNO (out);
770 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
771 && reg_equiv_constant[regno] != 0)
772 out = reg_equiv_constant[regno];
775 /* If we have a read-write operand with an address side-effect,
776 change either IN or OUT so the side-effect happens only once. */
777 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
779 if (GET_CODE (XEXP (in, 0)) == POST_INC
780 || GET_CODE (XEXP (in, 0)) == POST_DEC)
781 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
782 if (GET_CODE (XEXP (in, 0)) == PRE_INC
783 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
784 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
787 /* If we are reloading a (SUBREG constant ...), really reload just the
788 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
789 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
790 a pseudo and hence will become a MEM) with M1 wider than M2 and the
791 register is a pseudo, also reload the inside expression.
792 For machines that extend byte loads, do this for any SUBREG of a pseudo
793 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
794 M2 is an integral mode that gets extended when loaded.
795 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
796 either M1 is not valid for R or M2 is wider than a word but we only
797 need one word to store an M2-sized quantity in R.
798 (However, if OUT is nonzero, we need to reload the reg *and*
799 the subreg, so do nothing here, and let following statement handle it.)
801 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
802 we can't handle it here because CONST_INT does not indicate a mode.
804 Similarly, we must reload the inside expression if we have a
805 STRICT_LOW_PART (presumably, in == out in the cas).
807 Also reload the inner expression if it does not require a secondary
808 reload but the SUBREG does.
810 Finally, reload the inner expression if it is a register that is in
811 the class whose registers cannot be referenced in a different size
812 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
813 cannot reload just the inside since we might end up with the wrong
816 if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
817 #ifdef CLASS_CANNOT_CHANGE_SIZE
818 && class != CLASS_CANNOT_CHANGE_SIZE
820 && (CONSTANT_P (SUBREG_REG (in))
821 || GET_CODE (SUBREG_REG (in)) == PLUS
823 || (((GET_CODE (SUBREG_REG (in)) == REG
824 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
825 || GET_CODE (SUBREG_REG (in)) == MEM)
826 && ((GET_MODE_SIZE (inmode)
827 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
828 #ifdef LOAD_EXTEND_OP
829 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
830 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
832 && (GET_MODE_SIZE (inmode)
833 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
834 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
835 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
838 || (GET_CODE (SUBREG_REG (in)) == REG
839 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
840 /* The case where out is nonzero
841 is handled differently in the following statement. */
842 && (out == 0 || SUBREG_WORD (in) == 0)
843 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
844 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
846 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
848 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
849 GET_MODE (SUBREG_REG (in)))))
850 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
853 #ifdef SECONDARY_INPUT_RELOAD_CLASS
854 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
855 && (SECONDARY_INPUT_RELOAD_CLASS (class,
856 GET_MODE (SUBREG_REG (in)),
860 #ifdef CLASS_CANNOT_CHANGE_SIZE
861 || (GET_CODE (SUBREG_REG (in)) == REG
862 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
863 && (TEST_HARD_REG_BIT
864 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
865 REGNO (SUBREG_REG (in))))
866 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
867 != GET_MODE_SIZE (inmode)))
871 in_subreg_loc = inloc;
872 inloc = &SUBREG_REG (in);
874 #ifndef LOAD_EXTEND_OP
875 if (GET_CODE (in) == MEM)
876 /* This is supposed to happen only for paradoxical subregs made by
877 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
878 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
881 inmode = GET_MODE (in);
884 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
885 either M1 is not valid for R or M2 is wider than a word but we only
886 need one word to store an M2-sized quantity in R.
888 However, we must reload the inner reg *as well as* the subreg in
891 if (in != 0 && GET_CODE (in) == SUBREG
892 && GET_CODE (SUBREG_REG (in)) == REG
893 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
894 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
895 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
896 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
898 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
900 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
901 GET_MODE (SUBREG_REG (in)))))))
903 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
904 GENERAL_REGS, VOIDmode, VOIDmode, 0, 0, opnum, type);
908 /* Similarly for paradoxical and problematical SUBREGs on the output.
909 Note that there is no reason we need worry about the previous value
910 of SUBREG_REG (out); even if wider than out,
911 storing in a subreg is entitled to clobber it all
912 (except in the case of STRICT_LOW_PART,
913 and in that case the constraint should label it input-output.) */
914 if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
915 #ifdef CLASS_CANNOT_CHANGE_SIZE
916 && class != CLASS_CANNOT_CHANGE_SIZE
918 && (CONSTANT_P (SUBREG_REG (out))
920 || (((GET_CODE (SUBREG_REG (out)) == REG
921 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
922 || GET_CODE (SUBREG_REG (out)) == MEM)
923 && ((GET_MODE_SIZE (outmode)
924 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))))
925 || (GET_CODE (SUBREG_REG (out)) == REG
926 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
927 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
928 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
930 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
932 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
933 GET_MODE (SUBREG_REG (out)))))
934 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
935 + SUBREG_WORD (out)),
937 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
938 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
939 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
940 GET_MODE (SUBREG_REG (out)),
944 #ifdef CLASS_CANNOT_CHANGE_SIZE
945 || (GET_CODE (SUBREG_REG (out)) == REG
946 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
947 && (TEST_HARD_REG_BIT
948 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
949 REGNO (SUBREG_REG (out))))
950 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
951 != GET_MODE_SIZE (outmode)))
955 out_subreg_loc = outloc;
956 outloc = &SUBREG_REG (out);
958 #ifndef LOAD_EXTEND_OP
959 if (GET_CODE (out) == MEM
960 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
963 outmode = GET_MODE (out);
966 /* If IN appears in OUT, we can't share any input-only reload for IN. */
967 if (in != 0 && out != 0 && GET_CODE (out) == MEM
968 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
969 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
972 /* If IN is a SUBREG of a hard register, make a new REG. This
973 simplifies some of the cases below. */
975 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
976 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
977 in = gen_rtx (REG, GET_MODE (in),
978 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
980 /* Similarly for OUT. */
981 if (out != 0 && GET_CODE (out) == SUBREG
982 && GET_CODE (SUBREG_REG (out)) == REG
983 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
984 out = gen_rtx (REG, GET_MODE (out),
985 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
987 /* Narrow down the class of register wanted if that is
988 desirable on this machine for efficiency. */
990 class = PREFERRED_RELOAD_CLASS (in, class);
992 /* Output reloads may need analogous treatment, different in detail. */
993 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
995 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
998 /* Make sure we use a class that can handle the actual pseudo
999 inside any subreg. For example, on the 386, QImode regs
1000 can appear within SImode subregs. Although GENERAL_REGS
1001 can handle SImode, QImode needs a smaller class. */
1002 #ifdef LIMIT_RELOAD_CLASS
1004 class = LIMIT_RELOAD_CLASS (inmode, class);
1005 else if (in != 0 && GET_CODE (in) == SUBREG)
1006 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1009 class = LIMIT_RELOAD_CLASS (outmode, class);
1010 if (out != 0 && GET_CODE (out) == SUBREG)
1011 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1014 /* Verify that this class is at least possible for the mode that
1016 if (this_insn_is_asm)
1018 enum machine_mode mode;
1019 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1023 if (mode == VOIDmode)
1025 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1030 outmode = word_mode;
1032 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1033 if (HARD_REGNO_MODE_OK (i, mode)
1034 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1036 int nregs = HARD_REGNO_NREGS (i, mode);
1039 for (j = 1; j < nregs; j++)
1040 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1045 if (i == FIRST_PSEUDO_REGISTER)
1047 error_for_asm (this_insn, "impossible register constraint in `asm'");
1052 if (class == NO_REGS)
1055 /* We can use an existing reload if the class is right
1056 and at least one of IN and OUT is a match
1057 and the other is at worst neutral.
1058 (A zero compared against anything is neutral.)
1060 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1061 for the same thing since that can cause us to need more reload registers
1062 than we otherwise would. */
1064 for (i = 0; i < n_reloads; i++)
1065 if ((reg_class_subset_p (class, reload_reg_class[i])
1066 || reg_class_subset_p (reload_reg_class[i], class))
1067 /* If the existing reload has a register, it must fit our class. */
1068 && (reload_reg_rtx[i] == 0
1069 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1070 true_regnum (reload_reg_rtx[i])))
1071 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1072 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1074 (out != 0 && MATCHES (reload_out[i], out)
1075 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1076 && (reg_class_size[(int) class] == 1
1077 #ifdef SMALL_REGISTER_CLASSES
1081 && MERGABLE_RELOADS (type, reload_when_needed[i],
1082 opnum, reload_opnum[i]))
1085 /* Reloading a plain reg for input can match a reload to postincrement
1086 that reg, since the postincrement's value is the right value.
1087 Likewise, it can match a preincrement reload, since we regard
1088 the preincrementation as happening before any ref in this insn
1089 to that register. */
1091 for (i = 0; i < n_reloads; i++)
1092 if ((reg_class_subset_p (class, reload_reg_class[i])
1093 || reg_class_subset_p (reload_reg_class[i], class))
1094 /* If the existing reload has a register, it must fit our class. */
1095 && (reload_reg_rtx[i] == 0
1096 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1097 true_regnum (reload_reg_rtx[i])))
1098 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1099 && ((GET_CODE (in) == REG
1100 && (GET_CODE (reload_in[i]) == POST_INC
1101 || GET_CODE (reload_in[i]) == POST_DEC
1102 || GET_CODE (reload_in[i]) == PRE_INC
1103 || GET_CODE (reload_in[i]) == PRE_DEC)
1104 && MATCHES (XEXP (reload_in[i], 0), in))
1106 (GET_CODE (reload_in[i]) == REG
1107 && (GET_CODE (in) == POST_INC
1108 || GET_CODE (in) == POST_DEC
1109 || GET_CODE (in) == PRE_INC
1110 || GET_CODE (in) == PRE_DEC)
1111 && MATCHES (XEXP (in, 0), reload_in[i])))
1112 && (reg_class_size[(int) class] == 1
1113 #ifdef SMALL_REGISTER_CLASSES
1117 && MERGABLE_RELOADS (type, reload_when_needed[i],
1118 opnum, reload_opnum[i]))
1120 /* Make sure reload_in ultimately has the increment,
1121 not the plain register. */
1122 if (GET_CODE (in) == REG)
1129 /* See if we need a secondary reload register to move between CLASS
1130 and IN or CLASS and OUT. Get the icode and push any required reloads
1131 needed for each of them if so. */
1133 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1136 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1137 &secondary_in_icode);
1140 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1141 if (out != 0 && GET_CODE (out) != SCRATCH)
1142 secondary_out_reload
1143 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1144 type, &secondary_out_icode);
1147 /* We found no existing reload suitable for re-use.
1148 So add an additional reload. */
1152 reload_out[i] = out;
1153 reload_reg_class[i] = class;
1154 reload_inmode[i] = inmode;
1155 reload_outmode[i] = outmode;
1156 reload_reg_rtx[i] = 0;
1157 reload_optional[i] = optional;
1159 reload_nocombine[i] = 0;
1160 reload_in_reg[i] = inloc ? *inloc : 0;
1161 reload_opnum[i] = opnum;
1162 reload_when_needed[i] = type;
1163 reload_secondary_in_reload[i] = secondary_in_reload;
1164 reload_secondary_out_reload[i] = secondary_out_reload;
1165 reload_secondary_in_icode[i] = secondary_in_icode;
1166 reload_secondary_out_icode[i] = secondary_out_icode;
1167 reload_secondary_p[i] = 0;
1171 #ifdef SECONDARY_MEMORY_NEEDED
1172 /* If a memory location is needed for the copy, make one. */
1173 if (in != 0 && GET_CODE (in) == REG
1174 && REGNO (in) < FIRST_PSEUDO_REGISTER
1175 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1177 get_secondary_mem (in, inmode, opnum, type);
1179 if (out != 0 && GET_CODE (out) == REG
1180 && REGNO (out) < FIRST_PSEUDO_REGISTER
1181 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1183 get_secondary_mem (out, outmode, opnum, type);
1188 /* We are reusing an existing reload,
1189 but we may have additional information for it.
1190 For example, we may now have both IN and OUT
1191 while the old one may have just one of them. */
1193 if (inmode != VOIDmode)
1194 reload_inmode[i] = inmode;
1195 if (outmode != VOIDmode)
1196 reload_outmode[i] = outmode;
1200 reload_out[i] = out;
1201 if (reg_class_subset_p (class, reload_reg_class[i]))
1202 reload_reg_class[i] = class;
1203 reload_optional[i] &= optional;
1204 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1205 opnum, reload_opnum[i]))
1206 reload_when_needed[i] = RELOAD_OTHER;
1207 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1210 /* If the ostensible rtx being reload differs from the rtx found
1211 in the location to substitute, this reload is not safe to combine
1212 because we cannot reliably tell whether it appears in the insn. */
1214 if (in != 0 && in != *inloc)
1215 reload_nocombine[i] = 1;
1218 /* This was replaced by changes in find_reloads_address_1 and the new
1219 function inc_for_reload, which go with a new meaning of reload_inc. */
1221 /* If this is an IN/OUT reload in an insn that sets the CC,
1222 it must be for an autoincrement. It doesn't work to store
1223 the incremented value after the insn because that would clobber the CC.
1224 So we must do the increment of the value reloaded from,
1225 increment it, store it back, then decrement again. */
1226 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1230 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1231 /* If we did not find a nonzero amount-to-increment-by,
1232 that contradicts the belief that IN is being incremented
1233 in an address in this insn. */
1234 if (reload_inc[i] == 0)
1239 /* If we will replace IN and OUT with the reload-reg,
1240 record where they are located so that substitution need
1241 not do a tree walk. */
1243 if (replace_reloads)
1247 register struct replacement *r = &replacements[n_replacements++];
1249 r->subreg_loc = in_subreg_loc;
1253 if (outloc != 0 && outloc != inloc)
1255 register struct replacement *r = &replacements[n_replacements++];
1258 r->subreg_loc = out_subreg_loc;
1263 /* If this reload is just being introduced and it has both
1264 an incoming quantity and an outgoing quantity that are
1265 supposed to be made to match, see if either one of the two
1266 can serve as the place to reload into.
1268 If one of them is acceptable, set reload_reg_rtx[i]
1271 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1273 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1275 reload_reg_class[i], i);
1277 /* If the outgoing register already contains the same value
1278 as the incoming one, we can dispense with loading it.
1279 The easiest way to tell the caller that is to give a phony
1280 value for the incoming operand (same as outgoing one). */
1281 if (reload_reg_rtx[i] == out
1282 && (GET_CODE (in) == REG || CONSTANT_P (in))
1283 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1284 static_reload_reg_p, i, inmode))
1288 /* If this is an input reload and the operand contains a register that
1289 dies in this insn and is used nowhere else, see if it is the right class
1290 to be used for this reload. Use it if so. (This occurs most commonly
1291 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1292 this if it is also an output reload that mentions the register unless
1293 the output is a SUBREG that clobbers an entire register.
1295 Note that the operand might be one of the spill regs, if it is a
1296 pseudo reg and we are in a block where spilling has not taken place.
1297 But if there is no spilling in this block, that is OK.
1298 An explicitly used hard reg cannot be a spill reg. */
1300 if (reload_reg_rtx[i] == 0 && in != 0)
1305 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1306 if (REG_NOTE_KIND (note) == REG_DEAD
1307 && GET_CODE (XEXP (note, 0)) == REG
1308 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1309 && reg_mentioned_p (XEXP (note, 0), in)
1310 && ! refers_to_regno_for_reload_p (regno,
1312 + HARD_REGNO_NREGS (regno,
1314 PATTERN (this_insn), inloc)
1315 /* If this is also an output reload, IN cannot be used as
1316 the reload register if it is set in this insn unless IN
1318 && (out == 0 || in == out
1319 || ! hard_reg_set_here_p (regno,
1321 + HARD_REGNO_NREGS (regno,
1323 PATTERN (this_insn)))
1324 /* ??? Why is this code so different from the previous?
1325 Is there any simple coherent way to describe the two together?
1326 What's going on here. */
1328 || (GET_CODE (in) == SUBREG
1329 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1331 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1332 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1333 /* Make sure the operand fits in the reg that dies. */
1334 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1335 && HARD_REGNO_MODE_OK (regno, inmode)
1336 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1337 && HARD_REGNO_MODE_OK (regno, outmode)
1338 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1339 && !fixed_regs[regno])
1341 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1347 output_reloadnum = i;
1352 /* Record an additional place we must replace a value
1353 for which we have already recorded a reload.
1354 RELOADNUM is the value returned by push_reload
1355 when the reload was recorded.
1356 This is used in insn patterns that use match_dup. */
1359 push_replacement (loc, reloadnum, mode)
1362 enum machine_mode mode;
1364 if (replace_reloads)
1366 register struct replacement *r = &replacements[n_replacements++];
1367 r->what = reloadnum;
1374 /* Transfer all replacements that used to be in reload FROM to be in
1378 transfer_replacements (to, from)
1383 for (i = 0; i < n_replacements; i++)
1384 if (replacements[i].what == from)
1385 replacements[i].what = to;
1388 /* If there is only one output reload, and it is not for an earlyclobber
1389 operand, try to combine it with a (logically unrelated) input reload
1390 to reduce the number of reload registers needed.
1392 This is safe if the input reload does not appear in
1393 the value being output-reloaded, because this implies
1394 it is not needed any more once the original insn completes.
1396 If that doesn't work, see we can use any of the registers that
1397 die in this insn as a reload register. We can if it is of the right
1398 class and does not appear in the value being output-reloaded. */
1404 int output_reload = -1;
1405 int secondary_out = -1;
1408 /* Find the output reload; return unless there is exactly one
1409 and that one is mandatory. */
1411 for (i = 0; i < n_reloads; i++)
1412 if (reload_out[i] != 0)
1414 if (output_reload >= 0)
1419 if (output_reload < 0 || reload_optional[output_reload])
1422 /* An input-output reload isn't combinable. */
1424 if (reload_in[output_reload] != 0)
1427 /* If this reload is for an earlyclobber operand, we can't do anything. */
1428 if (earlyclobber_operand_p (reload_out[output_reload]))
1431 /* Check each input reload; can we combine it? */
1433 for (i = 0; i < n_reloads; i++)
1434 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1435 /* Life span of this reload must not extend past main insn. */
1436 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1437 && reload_when_needed[i] != RELOAD_OTHER
1438 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1439 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1440 reload_outmode[output_reload]))
1441 && reload_inc[i] == 0
1442 && reload_reg_rtx[i] == 0
1443 #ifdef SECONDARY_MEMORY_NEEDED
1444 /* Don't combine two reloads with different secondary
1445 memory locations. */
1446 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1447 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1448 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1449 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1451 #ifdef SMALL_REGISTER_CLASSES
1452 && reload_reg_class[i] == reload_reg_class[output_reload]
1454 && (reg_class_subset_p (reload_reg_class[i],
1455 reload_reg_class[output_reload])
1456 || reg_class_subset_p (reload_reg_class[output_reload],
1457 reload_reg_class[i]))
1459 && (MATCHES (reload_in[i], reload_out[output_reload])
1460 /* Args reversed because the first arg seems to be
1461 the one that we imagine being modified
1462 while the second is the one that might be affected. */
1463 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1465 /* However, if the input is a register that appears inside
1466 the output, then we also can't share.
1467 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1468 If the same reload reg is used for both reg 69 and the
1469 result to be stored in memory, then that result
1470 will clobber the address of the memory ref. */
1471 && ! (GET_CODE (reload_in[i]) == REG
1472 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1473 reload_out[output_reload]))))
1474 && (reg_class_size[(int) reload_reg_class[i]]
1475 #ifdef SMALL_REGISTER_CLASSES
1479 /* We will allow making things slightly worse by combining an
1480 input and an output, but no worse than that. */
1481 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1482 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1486 /* We have found a reload to combine with! */
1487 reload_out[i] = reload_out[output_reload];
1488 reload_outmode[i] = reload_outmode[output_reload];
1489 /* Mark the old output reload as inoperative. */
1490 reload_out[output_reload] = 0;
1491 /* The combined reload is needed for the entire insn. */
1492 reload_when_needed[i] = RELOAD_OTHER;
1493 /* If the output reload had a secondary reload, copy it. */
1494 if (reload_secondary_out_reload[output_reload] != -1)
1496 reload_secondary_out_reload[i]
1497 = reload_secondary_out_reload[output_reload];
1498 reload_secondary_out_icode[i]
1499 = reload_secondary_out_icode[output_reload];
1502 #ifdef SECONDARY_MEMORY_NEEDED
1503 /* Copy any secondary MEM. */
1504 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1505 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1506 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1508 /* If required, minimize the register class. */
1509 if (reg_class_subset_p (reload_reg_class[output_reload],
1510 reload_reg_class[i]))
1511 reload_reg_class[i] = reload_reg_class[output_reload];
1513 /* Transfer all replacements from the old reload to the combined. */
1514 for (j = 0; j < n_replacements; j++)
1515 if (replacements[j].what == output_reload)
1516 replacements[j].what = i;
1521 /* If this insn has only one operand that is modified or written (assumed
1522 to be the first), it must be the one corresponding to this reload. It
1523 is safe to use anything that dies in this insn for that output provided
1524 that it does not occur in the output (we already know it isn't an
1525 earlyclobber. If this is an asm insn, give up. */
1527 if (INSN_CODE (this_insn) == -1)
1530 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1531 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1532 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1535 /* See if some hard register that dies in this insn and is not used in
1536 the output is the right class. Only works if the register we pick
1537 up can fully hold our output reload. */
1538 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1539 if (REG_NOTE_KIND (note) == REG_DEAD
1540 && GET_CODE (XEXP (note, 0)) == REG
1541 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1542 reload_out[output_reload])
1543 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1544 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1545 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1546 REGNO (XEXP (note, 0)))
1547 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1548 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1549 /* Ensure that a secondary or tertiary reload for this output
1550 won't want this register. */
1551 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1552 || (! (TEST_HARD_REG_BIT
1553 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1554 REGNO (XEXP (note, 0))))
1555 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1556 || ! (TEST_HARD_REG_BIT
1557 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1558 REGNO (XEXP (note, 0)))))))
1559 && ! fixed_regs[REGNO (XEXP (note, 0))])
1561 reload_reg_rtx[output_reload] = gen_rtx (REG,
1562 reload_outmode[output_reload],
1563 REGNO (XEXP (note, 0)));
1568 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1569 See if one of IN and OUT is a register that may be used;
1570 this is desirable since a spill-register won't be needed.
1571 If so, return the register rtx that proves acceptable.
1573 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1574 CLASS is the register class required for the reload.
1576 If FOR_REAL is >= 0, it is the number of the reload,
1577 and in some cases when it can be discovered that OUT doesn't need
1578 to be computed, clear out reload_out[FOR_REAL].
1580 If FOR_REAL is -1, this should not be done, because this call
1581 is just to see if a register can be found, not to find and install it. */
1584 find_dummy_reload (real_in, real_out, inloc, outloc,
1585 inmode, outmode, class, for_real)
1586 rtx real_in, real_out;
1587 rtx *inloc, *outloc;
1588 enum machine_mode inmode, outmode;
1589 enum reg_class class;
1598 /* If operands exceed a word, we can't use either of them
1599 unless they have the same size. */
1600 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1601 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1602 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1605 /* Find the inside of any subregs. */
1606 while (GET_CODE (out) == SUBREG)
1608 out_offset = SUBREG_WORD (out);
1609 out = SUBREG_REG (out);
1611 while (GET_CODE (in) == SUBREG)
1613 in_offset = SUBREG_WORD (in);
1614 in = SUBREG_REG (in);
1617 /* Narrow down the reg class, the same way push_reload will;
1618 otherwise we might find a dummy now, but push_reload won't. */
1619 class = PREFERRED_RELOAD_CLASS (in, class);
1621 /* See if OUT will do. */
1622 if (GET_CODE (out) == REG
1623 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1625 register int regno = REGNO (out) + out_offset;
1626 int nwords = HARD_REGNO_NREGS (regno, outmode);
1629 /* When we consider whether the insn uses OUT,
1630 ignore references within IN. They don't prevent us
1631 from copying IN into OUT, because those refs would
1632 move into the insn that reloads IN.
1634 However, we only ignore IN in its role as this reload.
1635 If the insn uses IN elsewhere and it contains OUT,
1636 that counts. We can't be sure it's the "same" operand
1637 so it might not go through this reload. */
1639 *inloc = const0_rtx;
1641 if (regno < FIRST_PSEUDO_REGISTER
1642 /* A fixed reg that can overlap other regs better not be used
1643 for reloading in any way. */
1644 #ifdef OVERLAPPING_REGNO_P
1645 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1647 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1648 PATTERN (this_insn), outloc))
1651 for (i = 0; i < nwords; i++)
1652 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1658 if (GET_CODE (real_out) == REG)
1661 value = gen_rtx (REG, outmode, regno);
1668 /* Consider using IN if OUT was not acceptable
1669 or if OUT dies in this insn (like the quotient in a divmod insn).
1670 We can't use IN unless it is dies in this insn,
1671 which means we must know accurately which hard regs are live.
1672 Also, the result can't go in IN if IN is used within OUT. */
1673 if (hard_regs_live_known
1674 && GET_CODE (in) == REG
1675 && REGNO (in) < FIRST_PSEUDO_REGISTER
1677 || find_reg_note (this_insn, REG_UNUSED, real_out))
1678 && find_reg_note (this_insn, REG_DEAD, real_in)
1679 && !fixed_regs[REGNO (in)]
1680 && HARD_REGNO_MODE_OK (REGNO (in),
1681 /* The only case where out and real_out might
1682 have different modes is where real_out
1683 is a subreg, and in that case, out
1685 (GET_MODE (out) != VOIDmode
1686 ? GET_MODE (out) : outmode)))
1688 register int regno = REGNO (in) + in_offset;
1689 int nwords = HARD_REGNO_NREGS (regno, inmode);
1691 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1692 && ! hard_reg_set_here_p (regno, regno + nwords,
1693 PATTERN (this_insn)))
1696 for (i = 0; i < nwords; i++)
1697 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1703 /* If we were going to use OUT as the reload reg
1704 and changed our mind, it means OUT is a dummy that
1705 dies here. So don't bother copying value to it. */
1706 if (for_real >= 0 && value == real_out)
1707 reload_out[for_real] = 0;
1708 if (GET_CODE (real_in) == REG)
1711 value = gen_rtx (REG, inmode, regno);
1719 /* This page contains subroutines used mainly for determining
1720 whether the IN or an OUT of a reload can serve as the
1723 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1726 earlyclobber_operand_p (x)
1731 for (i = 0; i < n_earlyclobbers; i++)
1732 if (reload_earlyclobbers[i] == x)
1738 /* Return 1 if expression X alters a hard reg in the range
1739 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1740 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1741 X should be the body of an instruction. */
1744 hard_reg_set_here_p (beg_regno, end_regno, x)
1745 register int beg_regno, end_regno;
1748 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1750 register rtx op0 = SET_DEST (x);
1751 while (GET_CODE (op0) == SUBREG)
1752 op0 = SUBREG_REG (op0);
1753 if (GET_CODE (op0) == REG)
1755 register int r = REGNO (op0);
1756 /* See if this reg overlaps range under consideration. */
1758 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1762 else if (GET_CODE (x) == PARALLEL)
1764 register int i = XVECLEN (x, 0) - 1;
1766 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1773 /* Return 1 if ADDR is a valid memory address for mode MODE,
1774 and check that each pseudo reg has the proper kind of
1778 strict_memory_address_p (mode, addr)
1779 enum machine_mode mode;
1782 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1789 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1790 if they are the same hard reg, and has special hacks for
1791 autoincrement and autodecrement.
1792 This is specifically intended for find_reloads to use
1793 in determining whether two operands match.
1794 X is the operand whose number is the lower of the two.
1796 The value is 2 if Y contains a pre-increment that matches
1797 a non-incrementing address in X. */
1799 /* ??? To be completely correct, we should arrange to pass
1800 for X the output operand and for Y the input operand.
1801 For now, we assume that the output operand has the lower number
1802 because that is natural in (SET output (... input ...)). */
1805 operands_match_p (x, y)
1809 register RTX_CODE code = GET_CODE (x);
1815 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1816 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1817 && GET_CODE (SUBREG_REG (y)) == REG)))
1823 i = REGNO (SUBREG_REG (x));
1824 if (i >= FIRST_PSEUDO_REGISTER)
1826 i += SUBREG_WORD (x);
1831 if (GET_CODE (y) == SUBREG)
1833 j = REGNO (SUBREG_REG (y));
1834 if (j >= FIRST_PSEUDO_REGISTER)
1836 j += SUBREG_WORD (y);
1841 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1842 multiple hard register group, so that for example (reg:DI 0) and
1843 (reg:SI 1) will be considered the same register. */
1844 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1845 && i < FIRST_PSEUDO_REGISTER)
1846 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1847 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1848 && j < FIRST_PSEUDO_REGISTER)
1849 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1853 /* If two operands must match, because they are really a single
1854 operand of an assembler insn, then two postincrements are invalid
1855 because the assembler insn would increment only once.
1856 On the other hand, an postincrement matches ordinary indexing
1857 if the postincrement is the output operand. */
1858 if (code == POST_DEC || code == POST_INC)
1859 return operands_match_p (XEXP (x, 0), y);
1860 /* Two preincrements are invalid
1861 because the assembler insn would increment only once.
1862 On the other hand, an preincrement matches ordinary indexing
1863 if the preincrement is the input operand.
1864 In this case, return 2, since some callers need to do special
1865 things when this happens. */
1866 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1867 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1871 /* Now we have disposed of all the cases
1872 in which different rtx codes can match. */
1873 if (code != GET_CODE (y))
1875 if (code == LABEL_REF)
1876 return XEXP (x, 0) == XEXP (y, 0);
1877 if (code == SYMBOL_REF)
1878 return XSTR (x, 0) == XSTR (y, 0);
1880 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1882 if (GET_MODE (x) != GET_MODE (y))
1885 /* Compare the elements. If any pair of corresponding elements
1886 fail to match, return 0 for the whole things. */
1889 fmt = GET_RTX_FORMAT (code);
1890 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1896 if (XWINT (x, i) != XWINT (y, i))
1901 if (XINT (x, i) != XINT (y, i))
1906 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1909 /* If any subexpression returns 2,
1910 we should return 2 if we are successful. */
1918 /* It is believed that rtx's at this level will never
1919 contain anything but integers and other rtx's,
1920 except for within LABEL_REFs and SYMBOL_REFs. */
1925 return 1 + success_2;
1928 /* Return the number of times character C occurs in string S. */
1931 n_occurrences (c, s)
1941 /* Describe the range of registers or memory referenced by X.
1942 If X is a register, set REG_FLAG and put the first register
1943 number into START and the last plus one into END.
1944 If X is a memory reference, put a base address into BASE
1945 and a range of integer offsets into START and END.
1946 If X is pushing on the stack, we can assume it causes no trouble,
1947 so we set the SAFE field. */
1949 static struct decomposition
1953 struct decomposition val;
1958 if (GET_CODE (x) == MEM)
1960 rtx base, offset = 0;
1961 rtx addr = XEXP (x, 0);
1963 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1964 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1966 val.base = XEXP (addr, 0);
1967 val.start = - GET_MODE_SIZE (GET_MODE (x));
1968 val.end = GET_MODE_SIZE (GET_MODE (x));
1969 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1973 if (GET_CODE (addr) == CONST)
1975 addr = XEXP (addr, 0);
1978 if (GET_CODE (addr) == PLUS)
1980 if (CONSTANT_P (XEXP (addr, 0)))
1982 base = XEXP (addr, 1);
1983 offset = XEXP (addr, 0);
1985 else if (CONSTANT_P (XEXP (addr, 1)))
1987 base = XEXP (addr, 0);
1988 offset = XEXP (addr, 1);
1995 offset = const0_rtx;
1997 if (GET_CODE (offset) == CONST)
1998 offset = XEXP (offset, 0);
1999 if (GET_CODE (offset) == PLUS)
2001 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2003 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
2004 offset = XEXP (offset, 0);
2006 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2008 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
2009 offset = XEXP (offset, 1);
2013 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2014 offset = const0_rtx;
2017 else if (GET_CODE (offset) != CONST_INT)
2019 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2020 offset = const0_rtx;
2023 if (all_const && GET_CODE (base) == PLUS)
2024 base = gen_rtx (CONST, GET_MODE (base), base);
2026 if (GET_CODE (offset) != CONST_INT)
2029 val.start = INTVAL (offset);
2030 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2034 else if (GET_CODE (x) == REG)
2037 val.start = true_regnum (x);
2040 /* A pseudo with no hard reg. */
2041 val.start = REGNO (x);
2042 val.end = val.start + 1;
2046 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2048 else if (GET_CODE (x) == SUBREG)
2050 if (GET_CODE (SUBREG_REG (x)) != REG)
2051 /* This could be more precise, but it's good enough. */
2052 return decompose (SUBREG_REG (x));
2054 val.start = true_regnum (x);
2056 return decompose (SUBREG_REG (x));
2059 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2061 else if (CONSTANT_P (x)
2062 /* This hasn't been assigned yet, so it can't conflict yet. */
2063 || GET_CODE (x) == SCRATCH)
2070 /* Return 1 if altering Y will not modify the value of X.
2071 Y is also described by YDATA, which should be decompose (Y). */
2074 immune_p (x, y, ydata)
2076 struct decomposition ydata;
2078 struct decomposition xdata;
2081 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2085 if (GET_CODE (y) != MEM)
2087 /* If Y is memory and X is not, Y can't affect X. */
2088 if (GET_CODE (x) != MEM)
2091 xdata = decompose (x);
2093 if (! rtx_equal_p (xdata.base, ydata.base))
2095 /* If bases are distinct symbolic constants, there is no overlap. */
2096 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2098 /* Constants and stack slots never overlap. */
2099 if (CONSTANT_P (xdata.base)
2100 && (ydata.base == frame_pointer_rtx
2101 || ydata.base == hard_frame_pointer_rtx
2102 || ydata.base == stack_pointer_rtx))
2104 if (CONSTANT_P (ydata.base)
2105 && (xdata.base == frame_pointer_rtx
2106 || xdata.base == hard_frame_pointer_rtx
2107 || xdata.base == stack_pointer_rtx))
2109 /* If either base is variable, we don't know anything. */
2114 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2117 /* Similar, but calls decompose. */
2120 safe_from_earlyclobber (op, clobber)
2123 struct decomposition early_data;
2125 early_data = decompose (clobber);
2126 return immune_p (op, clobber, early_data);
2129 /* Main entry point of this file: search the body of INSN
2130 for values that need reloading and record them with push_reload.
2131 REPLACE nonzero means record also where the values occur
2132 so that subst_reloads can be used.
2134 IND_LEVELS says how many levels of indirection are supported by this
2135 machine; a value of zero means that a memory reference is not a valid
2138 LIVE_KNOWN says we have valid information about which hard
2139 regs are live at each point in the program; this is true when
2140 we are called from global_alloc but false when stupid register
2141 allocation has been done.
2143 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2144 which is nonnegative if the reg has been commandeered for reloading into.
2145 It is copied into STATIC_RELOAD_REG_P and referenced from there
2146 by various subroutines. */
2149 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2151 int replace, ind_levels;
2153 short *reload_reg_p;
2155 #ifdef REGISTER_CONSTRAINTS
2157 register int insn_code_number;
2160 /* These are the constraints for the insn. We don't change them. */
2161 char *constraints1[MAX_RECOG_OPERANDS];
2162 /* These start out as the constraints for the insn
2163 and they are chewed up as we consider alternatives. */
2164 char *constraints[MAX_RECOG_OPERANDS];
2165 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2167 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2168 char pref_or_nothing[MAX_RECOG_OPERANDS];
2169 /* Nonzero for a MEM operand whose entire address needs a reload. */
2170 int address_reloaded[MAX_RECOG_OPERANDS];
2171 /* Value of enum reload_type to use for operand. */
2172 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2173 /* Value of enum reload_type to use within address of operand. */
2174 enum reload_type address_type[MAX_RECOG_OPERANDS];
2175 /* Save the usage of each operand. */
2176 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2177 int no_input_reloads = 0, no_output_reloads = 0;
2179 int this_alternative[MAX_RECOG_OPERANDS];
2180 char this_alternative_win[MAX_RECOG_OPERANDS];
2181 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2182 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2183 int this_alternative_matches[MAX_RECOG_OPERANDS];
2185 int goal_alternative[MAX_RECOG_OPERANDS];
2186 int this_alternative_number;
2187 int goal_alternative_number;
2188 int operand_reloadnum[MAX_RECOG_OPERANDS];
2189 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2190 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2191 char goal_alternative_win[MAX_RECOG_OPERANDS];
2192 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2193 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2194 int goal_alternative_swapped;
2197 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2198 rtx substed_operand[MAX_RECOG_OPERANDS];
2199 rtx body = PATTERN (insn);
2200 rtx set = single_set (insn);
2201 int goal_earlyclobber, this_earlyclobber;
2202 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2205 this_insn_is_asm = 0; /* Tentative. */
2209 n_earlyclobbers = 0;
2210 replace_reloads = replace;
2211 hard_regs_live_known = live_known;
2212 static_reload_reg_p = reload_reg_p;
2214 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2215 neither are insns that SET cc0. Insns that use CC0 are not allowed
2216 to have any input reloads. */
2217 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2218 no_output_reloads = 1;
2221 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2222 no_input_reloads = 1;
2223 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2224 no_output_reloads = 1;
2227 #ifdef SECONDARY_MEMORY_NEEDED
2228 /* The eliminated forms of any secondary memory locations are per-insn, so
2229 clear them out here. */
2231 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2234 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2235 Make OPERANDS point to a vector of operand values.
2236 Make OPERAND_LOCS point to a vector of pointers to
2237 where the operands were found.
2238 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2239 constraint-strings for this insn.
2240 Return if the insn needs no reload processing. */
2242 switch (GET_CODE (body))
2252 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2253 is cheap to move between them. If it is not, there may not be an insn
2254 to do the copy, so we may need a reload. */
2255 if (GET_CODE (SET_DEST (body)) == REG
2256 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2257 && GET_CODE (SET_SRC (body)) == REG
2258 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2259 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2260 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2264 reload_n_operands = noperands = asm_noperands (body);
2267 /* This insn is an `asm' with operands. */
2269 insn_code_number = -1;
2270 this_insn_is_asm = 1;
2272 /* expand_asm_operands makes sure there aren't too many operands. */
2273 if (noperands > MAX_RECOG_OPERANDS)
2276 /* Now get the operand values and constraints out of the insn. */
2278 decode_asm_operands (body, recog_operand, recog_operand_loc,
2279 constraints, operand_mode);
2282 bcopy ((char *) constraints, (char *) constraints1,
2283 noperands * sizeof (char *));
2284 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2285 for (i = 1; i < noperands; i++)
2286 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2288 error_for_asm (insn, "operand constraints differ in number of alternatives");
2289 /* Avoid further trouble with this insn. */
2290 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2299 /* Ordinary insn: recognize it, get the operands via insn_extract
2300 and get the constraints. */
2302 insn_code_number = recog_memoized (insn);
2303 if (insn_code_number < 0)
2304 fatal_insn_not_found (insn);
2306 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2307 n_alternatives = insn_n_alternatives[insn_code_number];
2308 /* Just return "no reloads" if insn has no operands with constraints. */
2309 if (n_alternatives == 0)
2311 insn_extract (insn);
2312 for (i = 0; i < noperands; i++)
2314 constraints[i] = constraints1[i]
2315 = insn_operand_constraint[insn_code_number][i];
2316 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2325 /* If we will need to know, later, whether some pair of operands
2326 are the same, we must compare them now and save the result.
2327 Reloading the base and index registers will clobber them
2328 and afterward they will fail to match. */
2330 for (i = 0; i < noperands; i++)
2335 substed_operand[i] = recog_operand[i];
2338 modified[i] = RELOAD_READ;
2340 /* Scan this operand's constraint to see if it is an output operand,
2341 an in-out operand, is commutative, or should match another. */
2346 modified[i] = RELOAD_WRITE;
2348 modified[i] = RELOAD_READ_WRITE;
2351 /* The last operand should not be marked commutative. */
2352 if (i == noperands - 1)
2354 if (this_insn_is_asm)
2355 warning_for_asm (this_insn,
2356 "`%%' constraint used with last operand");
2363 else if (c >= '0' && c <= '9')
2366 operands_match[c][i]
2367 = operands_match_p (recog_operand[c], recog_operand[i]);
2369 /* An operand may not match itself. */
2372 if (this_insn_is_asm)
2373 warning_for_asm (this_insn,
2374 "operand %d has constraint %d", i, c);
2379 /* If C can be commuted with C+1, and C might need to match I,
2380 then C+1 might also need to match I. */
2381 if (commutative >= 0)
2383 if (c == commutative || c == commutative + 1)
2385 int other = c + (c == commutative ? 1 : -1);
2386 operands_match[other][i]
2387 = operands_match_p (recog_operand[other], recog_operand[i]);
2389 if (i == commutative || i == commutative + 1)
2391 int other = i + (i == commutative ? 1 : -1);
2392 operands_match[c][other]
2393 = operands_match_p (recog_operand[c], recog_operand[other]);
2395 /* Note that C is supposed to be less than I.
2396 No need to consider altering both C and I because in
2397 that case we would alter one into the other. */
2403 /* Examine each operand that is a memory reference or memory address
2404 and reload parts of the addresses into index registers.
2405 Also here any references to pseudo regs that didn't get hard regs
2406 but are equivalent to constants get replaced in the insn itself
2407 with those constants. Nobody will ever see them again.
2409 Finally, set up the preferred classes of each operand. */
2411 for (i = 0; i < noperands; i++)
2413 register RTX_CODE code = GET_CODE (recog_operand[i]);
2415 address_reloaded[i] = 0;
2416 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2417 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2420 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2421 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2424 if (*constraints[i] == 0)
2425 /* Ignore things like match_operator operands. */
2427 else if (constraints[i][0] == 'p')
2429 find_reloads_address (VOIDmode, NULL_PTR,
2430 recog_operand[i], recog_operand_loc[i],
2431 i, operand_type[i], ind_levels);
2432 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2434 else if (code == MEM)
2436 if (find_reloads_address (GET_MODE (recog_operand[i]),
2437 recog_operand_loc[i],
2438 XEXP (recog_operand[i], 0),
2439 &XEXP (recog_operand[i], 0),
2440 i, address_type[i], ind_levels))
2441 address_reloaded[i] = 1;
2442 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2444 else if (code == SUBREG)
2445 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2446 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2449 && &SET_DEST (set) == recog_operand_loc[i]);
2450 else if (code == PLUS)
2451 /* We can get a PLUS as an "operand" as a result of
2452 register elimination. See eliminate_regs and gen_reload. */
2453 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2454 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2456 else if (code == REG)
2458 /* This is equivalent to calling find_reloads_toplev.
2459 The code is duplicated for speed.
2460 When we find a pseudo always equivalent to a constant,
2461 we replace it by the constant. We must be sure, however,
2462 that we don't try to replace it in the insn in which it
2464 register int regno = REGNO (recog_operand[i]);
2465 if (reg_equiv_constant[regno] != 0
2466 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2467 substed_operand[i] = recog_operand[i]
2468 = reg_equiv_constant[regno];
2469 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2470 that feeds this insn. */
2471 if (reg_equiv_mem[regno] != 0)
2472 substed_operand[i] = recog_operand[i]
2473 = reg_equiv_mem[regno];
2475 if (reg_equiv_address[regno] != 0)
2477 /* If reg_equiv_address is not a constant address, copy it,
2478 since it may be shared. */
2479 /* We must rerun eliminate_regs, in case the elimination
2480 offsets have changed. */
2481 rtx address = XEXP (eliminate_regs (reg_equiv_memory_loc[regno],
2485 if (rtx_varies_p (address))
2486 address = copy_rtx (address);
2488 /* If this is an output operand, we must output a CLOBBER
2489 after INSN so find_equiv_reg knows REGNO is being written.
2490 Mark this insn specially, do we can put our output reloads
2493 if (modified[i] != RELOAD_READ)
2494 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2499 *recog_operand_loc[i] = recog_operand[i]
2500 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2501 RTX_UNCHANGING_P (recog_operand[i])
2502 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2503 find_reloads_address (GET_MODE (recog_operand[i]),
2504 recog_operand_loc[i],
2505 XEXP (recog_operand[i], 0),
2506 &XEXP (recog_operand[i], 0),
2507 i, address_type[i], ind_levels);
2508 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2511 /* If the operand is still a register (we didn't replace it with an
2512 equivalent), get the preferred class to reload it into. */
2513 code = GET_CODE (recog_operand[i]);
2515 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2516 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2518 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2519 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2522 /* If this is simply a copy from operand 1 to operand 0, merge the
2523 preferred classes for the operands. */
2524 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2525 && recog_operand[1] == SET_SRC (set))
2527 preferred_class[0] = preferred_class[1]
2528 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2529 pref_or_nothing[0] |= pref_or_nothing[1];
2530 pref_or_nothing[1] |= pref_or_nothing[0];
2533 /* Now see what we need for pseudo-regs that didn't get hard regs
2534 or got the wrong kind of hard reg. For this, we must consider
2535 all the operands together against the register constraints. */
2537 best = MAX_RECOG_OPERANDS + 300;
2540 goal_alternative_swapped = 0;
2543 /* The constraints are made of several alternatives.
2544 Each operand's constraint looks like foo,bar,... with commas
2545 separating the alternatives. The first alternatives for all
2546 operands go together, the second alternatives go together, etc.
2548 First loop over alternatives. */
2550 for (this_alternative_number = 0;
2551 this_alternative_number < n_alternatives;
2552 this_alternative_number++)
2554 /* Loop over operands for one constraint alternative. */
2555 /* LOSERS counts those that don't fit this alternative
2556 and would require loading. */
2558 /* BAD is set to 1 if it some operand can't fit this alternative
2559 even after reloading. */
2561 /* REJECT is a count of how undesirable this alternative says it is
2562 if any reloading is required. If the alternative matches exactly
2563 then REJECT is ignored, but otherwise it gets this much
2564 counted against it in addition to the reloading needed. Each
2565 ? counts three times here since we want the disparaging caused by
2566 a bad register class to only count 1/3 as much. */
2569 this_earlyclobber = 0;
2571 for (i = 0; i < noperands; i++)
2573 register char *p = constraints[i];
2574 register int win = 0;
2575 /* 0 => this operand can be reloaded somehow for this alternative */
2577 /* 0 => this operand can be reloaded if the alternative allows regs. */
2580 register rtx operand = recog_operand[i];
2582 /* Nonzero means this is a MEM that must be reloaded into a reg
2583 regardless of what the constraint says. */
2584 int force_reload = 0;
2586 /* Nonzero if a constant forced into memory would be OK for this
2589 int earlyclobber = 0;
2591 /* If the operand is a SUBREG, extract
2592 the REG or MEM (or maybe even a constant) within.
2593 (Constants can occur as a result of reg_equiv_constant.) */
2595 while (GET_CODE (operand) == SUBREG)
2597 offset += SUBREG_WORD (operand);
2598 operand = SUBREG_REG (operand);
2599 /* Force reload if this is a constant or PLUS or if there may may
2600 be a problem accessing OPERAND in the outer mode. */
2601 if (CONSTANT_P (operand)
2602 || GET_CODE (operand) == PLUS
2603 /* We must force a reload of paradoxical SUBREGs
2604 of a MEM because the alignment of the inner value
2605 may not be enough to do the outer reference. On
2606 big-endian machines, it may also reference outside
2609 On machines that extend byte operations and we have a
2610 SUBREG where both the inner and outer modes are no wider
2611 than a word and the inner mode is narrower, is integral,
2612 and gets extended when loaded from memory, combine.c has
2613 made assumptions about the behavior of the machine in such
2614 register access. If the data is, in fact, in memory we
2615 must always load using the size assumed to be in the
2616 register and let the insn do the different-sized
2618 || ((GET_CODE (operand) == MEM
2619 || (GET_CODE (operand)== REG
2620 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2621 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2622 < BIGGEST_ALIGNMENT)
2623 && (GET_MODE_SIZE (operand_mode[i])
2624 > GET_MODE_SIZE (GET_MODE (operand))))
2625 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2626 #ifdef LOAD_EXTEND_OP
2627 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2628 && (GET_MODE_SIZE (GET_MODE (operand))
2630 && (GET_MODE_SIZE (operand_mode[i])
2631 > GET_MODE_SIZE (GET_MODE (operand)))
2632 && INTEGRAL_MODE_P (GET_MODE (operand))
2633 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2636 /* Subreg of a hard reg which can't handle the subreg's mode
2637 or which would handle that mode in the wrong number of
2638 registers for subregging to work. */
2639 || (GET_CODE (operand) == REG
2640 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2641 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2642 && (GET_MODE_SIZE (GET_MODE (operand))
2644 && ((GET_MODE_SIZE (GET_MODE (operand))
2646 != HARD_REGNO_NREGS (REGNO (operand),
2647 GET_MODE (operand))))
2648 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2653 this_alternative[i] = (int) NO_REGS;
2654 this_alternative_win[i] = 0;
2655 this_alternative_offmemok[i] = 0;
2656 this_alternative_earlyclobber[i] = 0;
2657 this_alternative_matches[i] = -1;
2659 /* An empty constraint or empty alternative
2660 allows anything which matched the pattern. */
2661 if (*p == 0 || *p == ',')
2664 /* Scan this alternative's specs for this operand;
2665 set WIN if the operand fits any letter in this alternative.
2666 Otherwise, clear BADOP if this operand could
2667 fit some letter after reloads,
2668 or set WINREG if this operand could fit after reloads
2669 provided the constraint allows some registers. */
2671 while (*p && (c = *p++) != ',')
2680 /* The last operand should not be marked commutative. */
2681 if (i != noperands - 1)
2694 /* Ignore rest of this alternative as far as
2695 reloading is concerned. */
2696 while (*p && *p != ',') p++;
2705 this_alternative_matches[i] = c;
2706 /* We are supposed to match a previous operand.
2707 If we do, we win if that one did.
2708 If we do not, count both of the operands as losers.
2709 (This is too conservative, since most of the time
2710 only a single reload insn will be needed to make
2711 the two operands win. As a result, this alternative
2712 may be rejected when it is actually desirable.) */
2713 if ((swapped && (c != commutative || i != commutative + 1))
2714 /* If we are matching as if two operands were swapped,
2715 also pretend that operands_match had been computed
2717 But if I is the second of those and C is the first,
2718 don't exchange them, because operands_match is valid
2719 only on one side of its diagonal. */
2721 [(c == commutative || c == commutative + 1)
2722 ? 2*commutative + 1 - c : c]
2723 [(i == commutative || i == commutative + 1)
2724 ? 2*commutative + 1 - i : i])
2725 : operands_match[c][i])
2726 win = this_alternative_win[c];
2729 /* Operands don't match. */
2731 /* Retroactively mark the operand we had to match
2732 as a loser, if it wasn't already. */
2733 if (this_alternative_win[c])
2735 this_alternative_win[c] = 0;
2736 if (this_alternative[c] == (int) NO_REGS)
2738 /* But count the pair only once in the total badness of
2739 this alternative, if the pair can be a dummy reload. */
2741 = find_dummy_reload (recog_operand[i], recog_operand[c],
2742 recog_operand_loc[i], recog_operand_loc[c],
2743 operand_mode[i], operand_mode[c],
2744 this_alternative[c], -1);
2749 /* This can be fixed with reloads if the operand
2750 we are supposed to match can be fixed with reloads. */
2752 this_alternative[i] = this_alternative[c];
2754 /* If we have to reload this operand and some previous
2755 operand also had to match the same thing as this
2756 operand, we don't know how to do that. So reject this
2758 if (! win || force_reload)
2759 for (j = 0; j < i; j++)
2760 if (this_alternative_matches[j]
2761 == this_alternative_matches[i])
2767 /* All necessary reloads for an address_operand
2768 were handled in find_reloads_address. */
2769 this_alternative[i] = (int) BASE_REG_CLASS;
2776 if (GET_CODE (operand) == MEM
2777 || (GET_CODE (operand) == REG
2778 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2779 && reg_renumber[REGNO (operand)] < 0))
2781 if (CONSTANT_P (operand))
2787 if (GET_CODE (operand) == MEM
2788 && ! address_reloaded[i]
2789 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2790 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2795 if (GET_CODE (operand) == MEM
2796 && ! address_reloaded[i]
2797 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2798 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2802 /* Memory operand whose address is not offsettable. */
2806 if (GET_CODE (operand) == MEM
2807 && ! (ind_levels ? offsettable_memref_p (operand)
2808 : offsettable_nonstrict_memref_p (operand))
2809 /* Certain mem addresses will become offsettable
2810 after they themselves are reloaded. This is important;
2811 we don't want our own handling of unoffsettables
2812 to override the handling of reg_equiv_address. */
2813 && !(GET_CODE (XEXP (operand, 0)) == REG
2815 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2819 /* Memory operand whose address is offsettable. */
2823 if ((GET_CODE (operand) == MEM
2824 /* If IND_LEVELS, find_reloads_address won't reload a
2825 pseudo that didn't get a hard reg, so we have to
2826 reject that case. */
2827 && (ind_levels ? offsettable_memref_p (operand)
2828 : offsettable_nonstrict_memref_p (operand)))
2829 /* A reloaded auto-increment address is offsettable,
2830 because it is now just a simple register indirect. */
2831 || (GET_CODE (operand) == MEM
2832 && address_reloaded[i]
2833 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2834 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
2835 || GET_CODE (XEXP (operand, 0)) == POST_INC
2836 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2837 /* Certain mem addresses will become offsettable
2838 after they themselves are reloaded. This is important;
2839 we don't want our own handling of unoffsettables
2840 to override the handling of reg_equiv_address. */
2841 || (GET_CODE (operand) == MEM
2842 && GET_CODE (XEXP (operand, 0)) == REG
2844 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2845 || (GET_CODE (operand) == REG
2846 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2847 && reg_renumber[REGNO (operand)] < 0
2848 /* If reg_equiv_address is nonzero, we will be
2849 loading it into a register; hence it will be
2850 offsettable, but we cannot say that reg_equiv_mem
2851 is offsettable without checking. */
2852 && ((reg_equiv_mem[REGNO (operand)] != 0
2853 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
2854 || (reg_equiv_address[REGNO (operand)] != 0))))
2856 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2863 /* Output operand that is stored before the need for the
2864 input operands (and their index registers) is over. */
2865 earlyclobber = 1, this_earlyclobber = 1;
2869 #ifndef REAL_ARITHMETIC
2870 /* Match any floating double constant, but only if
2871 we can examine the bits of it reliably. */
2872 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2873 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2874 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2877 if (GET_CODE (operand) == CONST_DOUBLE)
2882 if (GET_CODE (operand) == CONST_DOUBLE)
2888 if (GET_CODE (operand) == CONST_DOUBLE
2889 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2894 if (GET_CODE (operand) == CONST_INT
2895 || (GET_CODE (operand) == CONST_DOUBLE
2896 && GET_MODE (operand) == VOIDmode))
2899 if (CONSTANT_P (operand)
2900 #ifdef LEGITIMATE_PIC_OPERAND_P
2901 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2908 if (GET_CODE (operand) == CONST_INT
2909 || (GET_CODE (operand) == CONST_DOUBLE
2910 && GET_MODE (operand) == VOIDmode))
2922 if (GET_CODE (operand) == CONST_INT
2923 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2933 /* A PLUS is never a valid operand, but reload can make
2934 it from a register when eliminating registers. */
2935 && GET_CODE (operand) != PLUS
2936 /* A SCRATCH is not a valid operand. */
2937 && GET_CODE (operand) != SCRATCH
2938 #ifdef LEGITIMATE_PIC_OPERAND_P
2939 && (! CONSTANT_P (operand)
2941 || LEGITIMATE_PIC_OPERAND_P (operand))
2943 && (GENERAL_REGS == ALL_REGS
2944 || GET_CODE (operand) != REG
2945 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2946 && reg_renumber[REGNO (operand)] < 0)))
2948 /* Drop through into 'r' case */
2952 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2955 #ifdef EXTRA_CONSTRAINT
2961 if (EXTRA_CONSTRAINT (operand, c))
2968 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2971 if (GET_MODE (operand) == BLKmode)
2974 if (GET_CODE (operand) == REG
2975 && reg_fits_class_p (operand, this_alternative[i],
2976 offset, GET_MODE (recog_operand[i])))
2983 /* If this operand could be handled with a reg,
2984 and some reg is allowed, then this operand can be handled. */
2985 if (winreg && this_alternative[i] != (int) NO_REGS)
2988 /* Record which operands fit this alternative. */
2989 this_alternative_earlyclobber[i] = earlyclobber;
2990 if (win && ! force_reload)
2991 this_alternative_win[i] = 1;
2994 int const_to_mem = 0;
2996 this_alternative_offmemok[i] = offmemok;
3000 /* Alternative loses if it has no regs for a reg operand. */
3001 if (GET_CODE (operand) == REG
3002 && this_alternative[i] == (int) NO_REGS
3003 && this_alternative_matches[i] < 0)
3006 /* Alternative loses if it requires a type of reload not
3007 permitted for this insn. We can always reload SCRATCH
3008 and objects with a REG_UNUSED note. */
3009 if (GET_CODE (operand) != SCRATCH
3010 && modified[i] != RELOAD_READ && no_output_reloads
3011 && ! find_reg_note (insn, REG_UNUSED, operand))
3013 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
3016 /* If this is a constant that is reloaded into the desired
3017 class by copying it to memory first, count that as another
3018 reload. This is consistent with other code and is
3019 required to avoid choosing another alternative when
3020 the constant is moved into memory by this function on
3021 an early reload pass. Note that the test here is
3022 precisely the same as in the code below that calls
3024 if (CONSTANT_P (operand)
3025 /* force_const_mem does not accept HIGH. */
3026 && GET_CODE (operand) != HIGH
3027 && (PREFERRED_RELOAD_CLASS (operand,
3028 (enum reg_class) this_alternative[i])
3030 && operand_mode[i] != VOIDmode)
3033 if (this_alternative[i] != (int) NO_REGS)
3037 /* If we can't reload this value at all, reject this
3038 alternative. Note that we could also lose due to
3039 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3042 if (! CONSTANT_P (operand)
3043 && (enum reg_class) this_alternative[i] != NO_REGS
3044 && (PREFERRED_RELOAD_CLASS (operand,
3045 (enum reg_class) this_alternative[i])
3049 /* We prefer to reload pseudos over reloading other things,
3050 since such reloads may be able to be eliminated later.
3051 If we are reloading a SCRATCH, we won't be generating any
3052 insns, just using a register, so it is also preferred.
3053 So bump REJECT in other cases. Don't do this in the
3054 case where we are forcing a constant into memory and
3055 it will then win since we don't want to have a different
3056 alternative match then. */
3057 if (! (GET_CODE (operand) == REG
3058 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3059 && GET_CODE (operand) != SCRATCH
3060 && ! (const_to_mem && constmemok))
3064 /* If this operand is a pseudo register that didn't get a hard
3065 reg and this alternative accepts some register, see if the
3066 class that we want is a subset of the preferred class for this
3067 register. If not, but it intersects that class, use the
3068 preferred class instead. If it does not intersect the preferred
3069 class, show that usage of this alternative should be discouraged;
3070 it will be discouraged more still if the register is `preferred
3071 or nothing'. We do this because it increases the chance of
3072 reusing our spill register in a later insn and avoiding a pair
3073 of memory stores and loads.
3075 Don't bother with this if this alternative will accept this
3078 Don't do this for a multiword operand, since it is only a
3079 small win and has the risk of requiring more spill registers,
3080 which could cause a large loss.
3082 Don't do this if the preferred class has only one register
3083 because we might otherwise exhaust the class. */
3086 if (! win && this_alternative[i] != (int) NO_REGS
3087 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3088 && reg_class_size[(int) preferred_class[i]] > 1)
3090 if (! reg_class_subset_p (this_alternative[i],
3091 preferred_class[i]))
3093 /* Since we don't have a way of forming the intersection,
3094 we just do something special if the preferred class
3095 is a subset of the class we have; that's the most
3096 common case anyway. */
3097 if (reg_class_subset_p (preferred_class[i],
3098 this_alternative[i]))
3099 this_alternative[i] = (int) preferred_class[i];
3101 reject += (1 + pref_or_nothing[i]);
3106 /* Now see if any output operands that are marked "earlyclobber"
3107 in this alternative conflict with any input operands
3108 or any memory addresses. */
3110 for (i = 0; i < noperands; i++)
3111 if (this_alternative_earlyclobber[i]
3112 && this_alternative_win[i])
3114 struct decomposition early_data;
3116 early_data = decompose (recog_operand[i]);
3118 if (modified[i] == RELOAD_READ)
3120 if (this_insn_is_asm)
3121 warning_for_asm (this_insn,
3122 "`&' constraint used with input operand");
3128 if (this_alternative[i] == NO_REGS)
3130 this_alternative_earlyclobber[i] = 0;
3131 if (this_insn_is_asm)
3132 error_for_asm (this_insn,
3133 "`&' constraint used with no register class");
3138 for (j = 0; j < noperands; j++)
3139 /* Is this an input operand or a memory ref? */
3140 if ((GET_CODE (recog_operand[j]) == MEM
3141 || modified[j] != RELOAD_WRITE)
3143 /* Ignore things like match_operator operands. */
3144 && *constraints1[j] != 0
3145 /* Don't count an input operand that is constrained to match
3146 the early clobber operand. */
3147 && ! (this_alternative_matches[j] == i
3148 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3149 /* Is it altered by storing the earlyclobber operand? */
3150 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3152 /* If the output is in a single-reg class,
3153 it's costly to reload it, so reload the input instead. */
3154 if (reg_class_size[this_alternative[i]] == 1
3155 && (GET_CODE (recog_operand[j]) == REG
3156 || GET_CODE (recog_operand[j]) == SUBREG))
3159 this_alternative_win[j] = 0;
3164 /* If an earlyclobber operand conflicts with something,
3165 it must be reloaded, so request this and count the cost. */
3169 this_alternative_win[i] = 0;
3170 for (j = 0; j < noperands; j++)
3171 if (this_alternative_matches[j] == i
3172 && this_alternative_win[j])
3174 this_alternative_win[j] = 0;
3180 /* If one alternative accepts all the operands, no reload required,
3181 choose that alternative; don't consider the remaining ones. */
3184 /* Unswap these so that they are never swapped at `finish'. */
3185 if (commutative >= 0)
3187 recog_operand[commutative] = substed_operand[commutative];
3188 recog_operand[commutative + 1]
3189 = substed_operand[commutative + 1];
3191 for (i = 0; i < noperands; i++)
3193 goal_alternative_win[i] = 1;
3194 goal_alternative[i] = this_alternative[i];
3195 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3196 goal_alternative_matches[i] = this_alternative_matches[i];
3197 goal_alternative_earlyclobber[i]
3198 = this_alternative_earlyclobber[i];
3200 goal_alternative_number = this_alternative_number;
3201 goal_alternative_swapped = swapped;
3202 goal_earlyclobber = this_earlyclobber;
3206 /* REJECT, set by the ! and ? constraint characters and when a register
3207 would be reloaded into a non-preferred class, discourages the use of
3208 this alternative for a reload goal. REJECT is incremented by three
3209 for each ? and one for each non-preferred class. */
3210 losers = losers * 3 + reject;
3212 /* If this alternative can be made to work by reloading,
3213 and it needs less reloading than the others checked so far,
3214 record it as the chosen goal for reloading. */
3215 if (! bad && best > losers)
3217 for (i = 0; i < noperands; i++)
3219 goal_alternative[i] = this_alternative[i];
3220 goal_alternative_win[i] = this_alternative_win[i];
3221 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3222 goal_alternative_matches[i] = this_alternative_matches[i];
3223 goal_alternative_earlyclobber[i]
3224 = this_alternative_earlyclobber[i];
3226 goal_alternative_swapped = swapped;
3228 goal_alternative_number = this_alternative_number;
3229 goal_earlyclobber = this_earlyclobber;
3233 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3234 then we need to try each alternative twice,
3235 the second time matching those two operands
3236 as if we had exchanged them.
3237 To do this, really exchange them in operands.
3239 If we have just tried the alternatives the second time,
3240 return operands to normal and drop through. */
3242 if (commutative >= 0)
3247 register enum reg_class tclass;
3250 recog_operand[commutative] = substed_operand[commutative + 1];
3251 recog_operand[commutative + 1] = substed_operand[commutative];
3253 tclass = preferred_class[commutative];
3254 preferred_class[commutative] = preferred_class[commutative + 1];
3255 preferred_class[commutative + 1] = tclass;
3257 t = pref_or_nothing[commutative];
3258 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3259 pref_or_nothing[commutative + 1] = t;
3261 bcopy ((char *) constraints1, (char *) constraints,
3262 noperands * sizeof (char *));
3267 recog_operand[commutative] = substed_operand[commutative];
3268 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3272 /* The operands don't meet the constraints.
3273 goal_alternative describes the alternative
3274 that we could reach by reloading the fewest operands.
3275 Reload so as to fit it. */
3277 if (best == MAX_RECOG_OPERANDS + 300)
3279 /* No alternative works with reloads?? */
3280 if (insn_code_number >= 0)
3282 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3283 /* Avoid further trouble with this insn. */
3284 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3289 /* Jump to `finish' from above if all operands are valid already.
3290 In that case, goal_alternative_win is all 1. */
3293 /* Right now, for any pair of operands I and J that are required to match,
3295 goal_alternative_matches[J] is I.
3296 Set up goal_alternative_matched as the inverse function:
3297 goal_alternative_matched[I] = J. */
3299 for (i = 0; i < noperands; i++)
3300 goal_alternative_matched[i] = -1;
3302 for (i = 0; i < noperands; i++)
3303 if (! goal_alternative_win[i]
3304 && goal_alternative_matches[i] >= 0)
3305 goal_alternative_matched[goal_alternative_matches[i]] = i;
3307 /* If the best alternative is with operands 1 and 2 swapped,
3308 consider them swapped before reporting the reloads. Update the
3309 operand numbers of any reloads already pushed. */
3311 if (goal_alternative_swapped)
3315 tem = substed_operand[commutative];
3316 substed_operand[commutative] = substed_operand[commutative + 1];
3317 substed_operand[commutative + 1] = tem;
3318 tem = recog_operand[commutative];
3319 recog_operand[commutative] = recog_operand[commutative + 1];
3320 recog_operand[commutative + 1] = tem;
3322 for (i = 0; i < n_reloads; i++)
3324 if (reload_opnum[i] == commutative)
3325 reload_opnum[i] = commutative + 1;
3326 else if (reload_opnum[i] == commutative + 1)
3327 reload_opnum[i] = commutative;
3331 /* Perform whatever substitutions on the operands we are supposed
3332 to make due to commutativity or replacement of registers
3333 with equivalent constants or memory slots. */
3335 for (i = 0; i < noperands; i++)
3337 *recog_operand_loc[i] = substed_operand[i];
3338 /* While we are looping on operands, initialize this. */
3339 operand_reloadnum[i] = -1;
3341 /* If this is an earlyclobber operand, we need to widen the scope.
3342 The reload must remain valid from the start of the insn being
3343 reloaded until after the operand is stored into its destination.
3344 We approximate this with RELOAD_OTHER even though we know that we
3345 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3347 One special case that is worth checking is when we have an
3348 output that is earlyclobber but isn't used past the insn (typically
3349 a SCRATCH). In this case, we only need have the reload live
3350 through the insn itself, but not for any of our input or output
3353 In any case, anything needed to address this operand can remain
3354 however they were previously categorized. */
3356 if (goal_alternative_earlyclobber[i])
3358 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3359 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3362 /* Any constants that aren't allowed and can't be reloaded
3363 into registers are here changed into memory references. */
3364 for (i = 0; i < noperands; i++)
3365 if (! goal_alternative_win[i]
3366 && CONSTANT_P (recog_operand[i])
3367 /* force_const_mem does not accept HIGH. */
3368 && GET_CODE (recog_operand[i]) != HIGH
3369 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3370 (enum reg_class) goal_alternative[i])
3372 && operand_mode[i] != VOIDmode)
3374 *recog_operand_loc[i] = recog_operand[i]
3375 = find_reloads_toplev (force_const_mem (operand_mode[i],
3377 i, address_type[i], ind_levels, 0);
3378 if (alternative_allows_memconst (constraints1[i],
3379 goal_alternative_number))
3380 goal_alternative_win[i] = 1;
3383 /* Record the values of the earlyclobber operands for the caller. */
3384 if (goal_earlyclobber)
3385 for (i = 0; i < noperands; i++)
3386 if (goal_alternative_earlyclobber[i])
3387 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3389 /* Now record reloads for all the operands that need them. */
3390 for (i = 0; i < noperands; i++)
3391 if (! goal_alternative_win[i])
3393 /* Operands that match previous ones have already been handled. */
3394 if (goal_alternative_matches[i] >= 0)
3396 /* Handle an operand with a nonoffsettable address
3397 appearing where an offsettable address will do
3398 by reloading the address into a base register.
3400 ??? We can also do this when the operand is a register and
3401 reg_equiv_mem is not offsettable, but this is a bit tricky,
3402 so we don't bother with it. It may not be worth doing. */
3403 else if (goal_alternative_matched[i] == -1
3404 && goal_alternative_offmemok[i]
3405 && GET_CODE (recog_operand[i]) == MEM)
3407 operand_reloadnum[i]
3408 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3409 &XEXP (recog_operand[i], 0), NULL_PTR,
3410 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3411 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3412 reload_inc[operand_reloadnum[i]]
3413 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3415 /* If this operand is an output, we will have made any
3416 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3417 now we are treating part of the operand as an input, so
3418 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3420 if (modified[i] == RELOAD_WRITE)
3421 for (j = 0; j < n_reloads; j++)
3422 if (reload_opnum[j] == i
3423 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3424 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3426 else if (goal_alternative_matched[i] == -1)
3427 operand_reloadnum[i] =
3428 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3429 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3430 (modified[i] != RELOAD_WRITE ?
3431 recog_operand_loc[i] : 0),
3432 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3433 (enum reg_class) goal_alternative[i],
3434 (modified[i] == RELOAD_WRITE
3435 ? VOIDmode : operand_mode[i]),
3436 (modified[i] == RELOAD_READ
3437 ? VOIDmode : operand_mode[i]),
3438 (insn_code_number < 0 ? 0
3439 : insn_operand_strict_low[insn_code_number][i]),
3440 0, i, operand_type[i]);
3441 /* In a matching pair of operands, one must be input only
3442 and the other must be output only.
3443 Pass the input operand as IN and the other as OUT. */
3444 else if (modified[i] == RELOAD_READ
3445 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3447 operand_reloadnum[i]
3448 = push_reload (recog_operand[i],
3449 recog_operand[goal_alternative_matched[i]],
3450 recog_operand_loc[i],
3451 recog_operand_loc[goal_alternative_matched[i]],
3452 (enum reg_class) goal_alternative[i],
3454 operand_mode[goal_alternative_matched[i]],
3455 0, 0, i, RELOAD_OTHER);
3456 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3458 else if (modified[i] == RELOAD_WRITE
3459 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3461 operand_reloadnum[goal_alternative_matched[i]]
3462 = push_reload (recog_operand[goal_alternative_matched[i]],
3464 recog_operand_loc[goal_alternative_matched[i]],
3465 recog_operand_loc[i],
3466 (enum reg_class) goal_alternative[i],
3467 operand_mode[goal_alternative_matched[i]],
3469 0, 0, i, RELOAD_OTHER);
3470 operand_reloadnum[i] = output_reloadnum;
3472 else if (insn_code_number >= 0)
3476 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3477 /* Avoid further trouble with this insn. */
3478 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3483 else if (goal_alternative_matched[i] < 0
3484 && goal_alternative_matches[i] < 0
3487 /* For each non-matching operand that's a MEM or a pseudo-register
3488 that didn't get a hard register, make an optional reload.
3489 This may get done even if the insn needs no reloads otherwise. */
3491 rtx operand = recog_operand[i];
3493 while (GET_CODE (operand) == SUBREG)
3494 operand = XEXP (operand, 0);
3495 if ((GET_CODE (operand) == MEM
3496 || (GET_CODE (operand) == REG
3497 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3498 && (enum reg_class) goal_alternative[i] != NO_REGS
3499 && ! no_input_reloads
3500 /* Optional output reloads don't do anything and we mustn't
3501 make in-out reloads on insns that are not permitted output
3503 && (modified[i] == RELOAD_READ
3504 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3505 operand_reloadnum[i]
3506 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3507 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3508 (modified[i] != RELOAD_WRITE
3509 ? recog_operand_loc[i] : 0),
3510 (modified[i] != RELOAD_READ
3511 ? recog_operand_loc[i] : 0),
3512 (enum reg_class) goal_alternative[i],
3513 (modified[i] == RELOAD_WRITE
3514 ? VOIDmode : operand_mode[i]),
3515 (modified[i] == RELOAD_READ
3516 ? VOIDmode : operand_mode[i]),
3517 (insn_code_number < 0 ? 0
3518 : insn_operand_strict_low[insn_code_number][i]),
3519 1, i, operand_type[i]);
3521 else if (goal_alternative_matches[i] >= 0
3522 && goal_alternative_win[goal_alternative_matches[i]]
3523 && modified[i] == RELOAD_READ
3524 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3525 && ! no_input_reloads && ! no_output_reloads
3528 /* Similarly, make an optional reload for a pair of matching
3529 objects that are in MEM or a pseudo that didn't get a hard reg. */
3531 rtx operand = recog_operand[i];
3533 while (GET_CODE (operand) == SUBREG)
3534 operand = XEXP (operand, 0);
3535 if ((GET_CODE (operand) == MEM
3536 || (GET_CODE (operand) == REG
3537 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3538 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3540 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3541 = push_reload (recog_operand[goal_alternative_matches[i]],
3543 recog_operand_loc[goal_alternative_matches[i]],
3544 recog_operand_loc[i],
3545 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3546 operand_mode[goal_alternative_matches[i]],
3548 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3551 /* If this insn pattern contains any MATCH_DUP's, make sure that
3552 they will be substituted if the operands they match are substituted.
3553 Also do now any substitutions we already did on the operands.
3555 Don't do this if we aren't making replacements because we might be
3556 propagating things allocated by frame pointer elimination into places
3557 it doesn't expect. */
3559 if (insn_code_number >= 0 && replace)
3560 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3562 int opno = recog_dup_num[i];
3563 *recog_dup_loc[i] = *recog_operand_loc[opno];
3564 if (operand_reloadnum[opno] >= 0)
3565 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3566 insn_operand_mode[insn_code_number][opno]);
3570 /* This loses because reloading of prior insns can invalidate the equivalence
3571 (or at least find_equiv_reg isn't smart enough to find it any more),
3572 causing this insn to need more reload regs than it needed before.
3573 It may be too late to make the reload regs available.
3574 Now this optimization is done safely in choose_reload_regs. */
3576 /* For each reload of a reg into some other class of reg,
3577 search for an existing equivalent reg (same value now) in the right class.
3578 We can use it as long as we don't need to change its contents. */
3579 for (i = 0; i < n_reloads; i++)
3580 if (reload_reg_rtx[i] == 0
3581 && reload_in[i] != 0
3582 && GET_CODE (reload_in[i]) == REG
3583 && reload_out[i] == 0)
3586 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3587 static_reload_reg_p, 0, reload_inmode[i]);
3588 /* Prevent generation of insn to load the value
3589 because the one we found already has the value. */
3590 if (reload_reg_rtx[i])
3591 reload_in[i] = reload_reg_rtx[i];
3595 /* Perhaps an output reload can be combined with another
3596 to reduce needs by one. */
3597 if (!goal_earlyclobber)
3600 /* If we have a pair of reloads for parts of an address, they are reloading
3601 the same object, the operands themselves were not reloaded, and they
3602 are for two operands that are supposed to match, merge the reloads and
3603 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3605 for (i = 0; i < n_reloads; i++)
3609 for (j = i + 1; j < n_reloads; j++)
3610 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3611 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3612 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3613 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3614 && rtx_equal_p (reload_in[i], reload_in[j])
3615 && (operand_reloadnum[reload_opnum[i]] < 0
3616 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3617 && (operand_reloadnum[reload_opnum[j]] < 0
3618 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3619 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3620 || (goal_alternative_matches[reload_opnum[j]]
3621 == reload_opnum[i])))
3623 for (k = 0; k < n_replacements; k++)
3624 if (replacements[k].what == j)
3625 replacements[k].what = i;
3627 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3632 /* Scan all the reloads and update their type.
3633 If a reload is for the address of an operand and we didn't reload
3634 that operand, change the type. Similarly, change the operand number
3635 of a reload when two operands match. If a reload is optional, treat it
3636 as though the operand isn't reloaded.
3638 ??? This latter case is somewhat odd because if we do the optional
3639 reload, it means the object is hanging around. Thus we need only
3640 do the address reload if the optional reload was NOT done.
3642 Change secondary reloads to be the address type of their operand, not
3645 If an operand's reload is now RELOAD_OTHER, change any
3646 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3647 RELOAD_FOR_OTHER_ADDRESS. */
3649 for (i = 0; i < n_reloads; i++)
3651 if (reload_secondary_p[i]
3652 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3653 reload_when_needed[i] = address_type[reload_opnum[i]];
3655 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3656 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3657 && (operand_reloadnum[reload_opnum[i]] < 0
3658 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3660 /* If we have a secondary reload to go along with this reload,
3661 change its type to RELOAD_FOR_OPADDR_ADDR. */
3663 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3664 && reload_secondary_in_reload[i] != -1)
3666 int secondary_in_reload = reload_secondary_in_reload[i];
3668 reload_when_needed[secondary_in_reload] =
3669 RELOAD_FOR_OPADDR_ADDR;
3671 /* If there's a tertiary reload we have to change it also. */
3672 if (secondary_in_reload > 0
3673 && reload_secondary_in_reload[secondary_in_reload] != -1)
3674 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3675 = RELOAD_FOR_OPADDR_ADDR;
3678 if (reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3679 && reload_secondary_out_reload[i] != -1)
3681 int secondary_out_reload = reload_secondary_out_reload[i];
3683 reload_when_needed[secondary_out_reload] =
3684 RELOAD_FOR_OPADDR_ADDR;
3686 /* If there's a tertiary reload we have to change it also. */
3687 if (secondary_out_reload
3688 && reload_secondary_out_reload[secondary_out_reload] != -1)
3689 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
3690 = RELOAD_FOR_OPADDR_ADDR;
3692 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3695 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3696 && operand_reloadnum[reload_opnum[i]] >= 0
3697 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3699 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3701 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3702 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3705 /* See if we have any reloads that are now allowed to be merged
3706 because we've changed when the reload is needed to
3707 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3708 check for the most common cases. */
3710 for (i = 0; i < n_reloads; i++)
3711 if (reload_in[i] != 0 && reload_out[i] == 0
3712 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3713 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3714 for (j = 0; j < n_reloads; j++)
3715 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3716 && reload_when_needed[j] == reload_when_needed[i]
3717 && MATCHES (reload_in[i], reload_in[j])
3718 && reload_reg_class[i] == reload_reg_class[j]
3719 && !reload_nocombine[i] && !reload_nocombine[j]
3720 && reload_reg_rtx[i] == reload_reg_rtx[j])
3722 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3723 transfer_replacements (i, j);
3727 #else /* no REGISTER_CONSTRAINTS */
3729 int insn_code_number;
3730 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3732 rtx body = PATTERN (insn);
3736 n_earlyclobbers = 0;
3737 replace_reloads = replace;
3740 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3741 Store the operand values in RECOG_OPERAND and the locations
3742 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3743 Return if the insn needs no reload processing. */
3745 switch (GET_CODE (body))
3756 noperands = asm_noperands (body);
3759 /* This insn is an `asm' with operands.
3760 First, find out how many operands, and allocate space. */
3762 insn_code_number = -1;
3763 /* ??? This is a bug! ???
3764 Give up and delete this insn if it has too many operands. */
3765 if (noperands > MAX_RECOG_OPERANDS)
3768 /* Now get the operand values out of the insn. */
3770 decode_asm_operands (body, recog_operand, recog_operand_loc,
3771 NULL_PTR, NULL_PTR);
3776 /* Ordinary insn: recognize it, allocate space for operands and
3777 constraints, and get them out via insn_extract. */
3779 insn_code_number = recog_memoized (insn);
3780 noperands = insn_n_operands[insn_code_number];
3781 insn_extract (insn);
3787 for (i = 0; i < noperands; i++)
3789 register RTX_CODE code = GET_CODE (recog_operand[i]);
3790 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3792 if (insn_code_number >= 0)
3793 if (insn_operand_address_p[insn_code_number][i])
3794 find_reloads_address (VOIDmode, NULL_PTR,
3795 recog_operand[i], recog_operand_loc[i],
3796 i, RELOAD_FOR_INPUT, ind_levels);
3798 /* In these cases, we can't tell if the operand is an input
3799 or an output, so be conservative. In practice it won't be
3803 find_reloads_address (GET_MODE (recog_operand[i]),
3804 recog_operand_loc[i],
3805 XEXP (recog_operand[i], 0),
3806 &XEXP (recog_operand[i], 0),
3807 i, RELOAD_OTHER, ind_levels);
3809 recog_operand[i] = *recog_operand_loc[i]
3810 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3811 ind_levels, is_set_dest);
3814 register int regno = REGNO (recog_operand[i]);
3815 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3816 recog_operand[i] = *recog_operand_loc[i]
3817 = reg_equiv_constant[regno];
3818 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3819 that feeds this insn. */
3820 if (reg_equiv_mem[regno] != 0)
3821 recog_operand[i] = *recog_operand_loc[i]
3822 = reg_equiv_mem[regno];
3827 /* Perhaps an output reload can be combined with another
3828 to reduce needs by one. */
3829 if (!goal_earlyclobber)
3831 #endif /* no REGISTER_CONSTRAINTS */
3834 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3835 accepts a memory operand with constant address. */
3838 alternative_allows_memconst (constraint, altnum)
3843 /* Skip alternatives before the one requested. */
3846 while (*constraint++ != ',');
3849 /* Scan the requested alternative for 'm' or 'o'.
3850 If one of them is present, this alternative accepts memory constants. */
3851 while ((c = *constraint++) && c != ',' && c != '#')
3852 if (c == 'm' || c == 'o')
3857 /* Scan X for memory references and scan the addresses for reloading.
3858 Also checks for references to "constant" regs that we want to eliminate
3859 and replaces them with the values they stand for.
3860 We may alter X destructively if it contains a reference to such.
3861 If X is just a constant reg, we return the equivalent value
3864 IND_LEVELS says how many levels of indirect addressing this machine
3867 OPNUM and TYPE identify the purpose of the reload.
3869 IS_SET_DEST is true if X is the destination of a SET, which is not
3870 appropriate to be replaced by a constant. */
3873 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
3876 enum reload_type type;
3880 register RTX_CODE code = GET_CODE (x);
3882 register char *fmt = GET_RTX_FORMAT (code);
3887 /* This code is duplicated for speed in find_reloads. */
3888 register int regno = REGNO (x);
3889 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3890 x = reg_equiv_constant[regno];
3892 /* This creates (subreg (mem...)) which would cause an unnecessary
3893 reload of the mem. */
3894 else if (reg_equiv_mem[regno] != 0)
3895 x = reg_equiv_mem[regno];
3897 else if (reg_equiv_address[regno] != 0)
3899 /* If reg_equiv_address varies, it may be shared, so copy it. */
3900 /* We must rerun eliminate_regs, in case the elimination
3901 offsets have changed. */
3902 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
3906 if (rtx_varies_p (addr))
3907 addr = copy_rtx (addr);
3909 x = gen_rtx (MEM, GET_MODE (x), addr);
3910 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3911 find_reloads_address (GET_MODE (x), NULL_PTR,
3913 &XEXP (x, 0), opnum, type, ind_levels);
3920 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3921 opnum, type, ind_levels);
3925 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3927 /* Check for SUBREG containing a REG that's equivalent to a constant.
3928 If the constant has a known value, truncate it right now.
3929 Similarly if we are extracting a single-word of a multi-word
3930 constant. If the constant is symbolic, allow it to be substituted
3931 normally. push_reload will strip the subreg later. If the
3932 constant is VOIDmode, abort because we will lose the mode of
3933 the register (this should never happen because one of the cases
3934 above should handle it). */
3936 register int regno = REGNO (SUBREG_REG (x));
3939 if (subreg_lowpart_p (x)
3940 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3941 && reg_equiv_constant[regno] != 0
3942 && (tem = gen_lowpart_common (GET_MODE (x),
3943 reg_equiv_constant[regno])) != 0)
3946 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3947 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3948 && reg_equiv_constant[regno] != 0
3949 && (tem = operand_subword (reg_equiv_constant[regno],
3951 GET_MODE (SUBREG_REG (x)))) != 0)
3954 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3955 && reg_equiv_constant[regno] != 0
3956 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3959 /* If the subreg contains a reg that will be converted to a mem,
3960 convert the subreg to a narrower memref now.
3961 Otherwise, we would get (subreg (mem ...) ...),
3962 which would force reload of the mem.
3964 We also need to do this if there is an equivalent MEM that is
3965 not offsettable. In that case, alter_subreg would produce an
3966 invalid address on big-endian machines.
3968 For machines that extend byte loads, we must not reload using
3969 a wider mode if we have a paradoxical SUBREG. find_reloads will
3970 force a reload in that case. So we should not do anything here. */
3972 else if (regno >= FIRST_PSEUDO_REGISTER
3973 #ifdef LOAD_EXTEND_OP
3974 && (GET_MODE_SIZE (GET_MODE (x))
3975 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3977 && (reg_equiv_address[regno] != 0
3978 || (reg_equiv_mem[regno] != 0
3979 && (! strict_memory_address_p (GET_MODE (x),
3980 XEXP (reg_equiv_mem[regno], 0))
3981 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
3983 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3984 /* We must rerun eliminate_regs, in case the elimination
3985 offsets have changed. */
3986 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
3989 if (BYTES_BIG_ENDIAN)
3992 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3993 offset += MIN (size, UNITS_PER_WORD);
3994 size = GET_MODE_SIZE (GET_MODE (x));
3995 offset -= MIN (size, UNITS_PER_WORD);
3997 addr = plus_constant (addr, offset);
3998 x = gen_rtx (MEM, GET_MODE (x), addr);
3999 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4000 find_reloads_address (GET_MODE (x), NULL_PTR,
4002 &XEXP (x, 0), opnum, type, ind_levels);
4007 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4010 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
4011 ind_levels, is_set_dest);
4016 /* Return a mem ref for the memory equivalent of reg REGNO.
4017 This mem ref is not shared with anything. */
4020 make_memloc (ad, regno)
4025 /* We must rerun eliminate_regs, in case the elimination
4026 offsets have changed. */
4027 rtx tem = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX),
4030 #if 0 /* We cannot safely reuse a memloc made here;
4031 if the pseudo appears twice, and its mem needs a reload,
4032 it gets two separate reloads assigned, but it only
4033 gets substituted with the second of them;
4034 then it can get used before that reload reg gets loaded up. */
4035 for (i = 0; i < n_memlocs; i++)
4036 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
4040 /* If TEM might contain a pseudo, we must copy it to avoid
4041 modifying it when we do the substitution for the reload. */
4042 if (rtx_varies_p (tem))
4043 tem = copy_rtx (tem);
4045 tem = gen_rtx (MEM, GET_MODE (ad), tem);
4046 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4047 memlocs[n_memlocs++] = tem;
4051 /* Record all reloads needed for handling memory address AD
4052 which appears in *LOC in a memory reference to mode MODE
4053 which itself is found in location *MEMREFLOC.
4054 Note that we take shortcuts assuming that no multi-reg machine mode
4055 occurs as part of an address.
4057 OPNUM and TYPE specify the purpose of this reload.
4059 IND_LEVELS says how many levels of indirect addressing this machine
4062 Value is nonzero if this address is reloaded or replaced as a whole.
4063 This is interesting to the caller if the address is an autoincrement.
4065 Note that there is no verification that the address will be valid after
4066 this routine does its work. Instead, we rely on the fact that the address
4067 was valid when reload started. So we need only undo things that reload
4068 could have broken. These are wrong register types, pseudos not allocated
4069 to a hard register, and frame pointer elimination. */
4072 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
4073 enum machine_mode mode;
4078 enum reload_type type;
4084 /* If the address is a register, see if it is a legitimate address and
4085 reload if not. We first handle the cases where we need not reload
4086 or where we must reload in a non-standard way. */
4088 if (GET_CODE (ad) == REG)
4092 if (reg_equiv_constant[regno] != 0
4093 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4095 *loc = ad = reg_equiv_constant[regno];
4099 else if (reg_equiv_address[regno] != 0)
4101 tem = make_memloc (ad, regno);
4102 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4103 &XEXP (tem, 0), opnum, type, ind_levels);
4104 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4105 GET_MODE (ad), VOIDmode, 0, 0,
4110 /* We can avoid a reload if the register's equivalent memory expression
4111 is valid as an indirect memory address.
4112 But not all addresses are valid in a mem used as an indirect address:
4113 only reg or reg+constant. */
4115 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
4116 && strict_memory_address_p (mode, reg_equiv_mem[regno])
4117 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
4118 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
4119 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
4120 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
4123 /* The only remaining case where we can avoid a reload is if this is a
4124 hard register that is valid as a base register and which is not the
4125 subject of a CLOBBER in this insn. */
4127 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
4128 && ! regno_clobbered_p (regno, this_insn))
4131 /* If we do not have one of the cases above, we must do the reload. */
4132 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4133 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4137 if (strict_memory_address_p (mode, ad))
4139 /* The address appears valid, so reloads are not needed.
4140 But the address may contain an eliminable register.
4141 This can happen because a machine with indirect addressing
4142 may consider a pseudo register by itself a valid address even when
4143 it has failed to get a hard reg.
4144 So do a tree-walk to find and eliminate all such regs. */
4146 /* But first quickly dispose of a common case. */
4147 if (GET_CODE (ad) == PLUS
4148 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4149 && GET_CODE (XEXP (ad, 0)) == REG
4150 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4153 subst_reg_equivs_changed = 0;
4154 *loc = subst_reg_equivs (ad);
4156 if (! subst_reg_equivs_changed)
4159 /* Check result for validity after substitution. */
4160 if (strict_memory_address_p (mode, ad))
4164 /* The address is not valid. We have to figure out why. One possibility
4165 is that it is itself a MEM. This can happen when the frame pointer is
4166 being eliminated, a pseudo is not allocated to a hard register, and the
4167 offset between the frame and stack pointers is not its initial value.
4168 In that case the pseudo will have been replaced by a MEM referring to
4169 the stack pointer. */
4170 if (GET_CODE (ad) == MEM)
4172 /* First ensure that the address in this MEM is valid. Then, unless
4173 indirect addresses are valid, reload the MEM into a register. */
4175 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4176 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
4178 /* If tem was changed, then we must create a new memory reference to
4179 hold it and store it back into memrefloc. */
4180 if (tem != ad && memrefloc)
4182 *memrefloc = copy_rtx (*memrefloc);
4183 copy_replacements (tem, XEXP (*memrefloc, 0));
4184 loc = &XEXP (*memrefloc, 0);
4187 /* Check similar cases as for indirect addresses as above except
4188 that we can allow pseudos and a MEM since they should have been
4189 taken care of above. */
4192 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4193 || GET_CODE (XEXP (tem, 0)) == MEM
4194 || ! (GET_CODE (XEXP (tem, 0)) == REG
4195 || (GET_CODE (XEXP (tem, 0)) == PLUS
4196 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4197 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4199 /* Must use TEM here, not AD, since it is the one that will
4200 have any subexpressions reloaded, if needed. */
4201 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4202 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
4210 /* If we have address of a stack slot but it's not valid
4211 (displacement is too large), compute the sum in a register. */
4212 else if (GET_CODE (ad) == PLUS
4213 && (XEXP (ad, 0) == frame_pointer_rtx
4214 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4215 || XEXP (ad, 0) == hard_frame_pointer_rtx
4217 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4218 || XEXP (ad, 0) == arg_pointer_rtx
4220 || XEXP (ad, 0) == stack_pointer_rtx)
4221 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4223 /* Unshare the MEM rtx so we can safely alter it. */
4226 *memrefloc = copy_rtx (*memrefloc);
4227 loc = &XEXP (*memrefloc, 0);
4229 if (double_reg_address_ok)
4231 /* Unshare the sum as well. */
4232 *loc = ad = copy_rtx (ad);
4233 /* Reload the displacement into an index reg.
4234 We assume the frame pointer or arg pointer is a base reg. */
4235 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4236 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4241 /* If the sum of two regs is not necessarily valid,
4242 reload the sum into a base reg.
4243 That will at least work. */
4244 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
4245 opnum, type, ind_levels);
4250 /* If we have an indexed stack slot, there are three possible reasons why
4251 it might be invalid: The index might need to be reloaded, the address
4252 might have been made by frame pointer elimination and hence have a
4253 constant out of range, or both reasons might apply.
4255 We can easily check for an index needing reload, but even if that is the
4256 case, we might also have an invalid constant. To avoid making the
4257 conservative assumption and requiring two reloads, we see if this address
4258 is valid when not interpreted strictly. If it is, the only problem is
4259 that the index needs a reload and find_reloads_address_1 will take care
4262 There is still a case when we might generate an extra reload,
4263 however. In certain cases eliminate_regs will return a MEM for a REG
4264 (see the code there for details). In those cases, memory_address_p
4265 applied to our address will return 0 so we will think that our offset
4266 must be too large. But it might indeed be valid and the only problem
4267 is that a MEM is present where a REG should be. This case should be
4268 very rare and there doesn't seem to be any way to avoid it.
4270 If we decide to do something here, it must be that
4271 `double_reg_address_ok' is true and that this address rtl was made by
4272 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4273 rework the sum so that the reload register will be added to the index.
4274 This is safe because we know the address isn't shared.
4276 We check for fp/ap/sp as both the first and second operand of the
4279 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4280 && GET_CODE (XEXP (ad, 0)) == PLUS
4281 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4282 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4283 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4285 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4286 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4288 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4289 && ! memory_address_p (mode, ad))
4291 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4292 plus_constant (XEXP (XEXP (ad, 0), 0),
4293 INTVAL (XEXP (ad, 1))),
4294 XEXP (XEXP (ad, 0), 1));
4295 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4296 GET_MODE (ad), opnum, type, ind_levels);
4297 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4302 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4303 && GET_CODE (XEXP (ad, 0)) == PLUS
4304 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4305 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4306 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4308 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4309 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4311 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4312 && ! memory_address_p (mode, ad))
4314 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4315 XEXP (XEXP (ad, 0), 0),
4316 plus_constant (XEXP (XEXP (ad, 0), 1),
4317 INTVAL (XEXP (ad, 1))));
4318 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4319 GET_MODE (ad), opnum, type, ind_levels);
4320 find_reloads_address_1 (XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, type, 0);
4325 /* See if address becomes valid when an eliminable register
4326 in a sum is replaced. */
4329 if (GET_CODE (ad) == PLUS)
4330 tem = subst_indexed_address (ad);
4331 if (tem != ad && strict_memory_address_p (mode, tem))
4333 /* Ok, we win that way. Replace any additional eliminable
4336 subst_reg_equivs_changed = 0;
4337 tem = subst_reg_equivs (tem);
4339 /* Make sure that didn't make the address invalid again. */
4341 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4348 /* If constants aren't valid addresses, reload the constant address
4350 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4352 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4353 Unshare it so we can safely alter it. */
4354 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4355 && CONSTANT_POOL_ADDRESS_P (ad))
4357 *memrefloc = copy_rtx (*memrefloc);
4358 loc = &XEXP (*memrefloc, 0);
4361 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4366 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
4369 /* Find all pseudo regs appearing in AD
4370 that are eliminable in favor of equivalent values
4371 and do not have hard regs; replace them by their equivalents. */
4374 subst_reg_equivs (ad)
4377 register RTX_CODE code = GET_CODE (ad);
4395 register int regno = REGNO (ad);
4397 if (reg_equiv_constant[regno] != 0)
4399 subst_reg_equivs_changed = 1;
4400 return reg_equiv_constant[regno];
4406 /* Quickly dispose of a common case. */
4407 if (XEXP (ad, 0) == frame_pointer_rtx
4408 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4412 fmt = GET_RTX_FORMAT (code);
4413 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4415 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4419 /* Compute the sum of X and Y, making canonicalizations assumed in an
4420 address, namely: sum constant integers, surround the sum of two
4421 constants with a CONST, put the constant as the second operand, and
4422 group the constant on the outermost sum.
4424 This routine assumes both inputs are already in canonical form. */
4431 enum machine_mode mode = GET_MODE (x);
4433 if (mode == VOIDmode)
4434 mode = GET_MODE (y);
4436 if (mode == VOIDmode)
4439 if (GET_CODE (x) == CONST_INT)
4440 return plus_constant (y, INTVAL (x));
4441 else if (GET_CODE (y) == CONST_INT)
4442 return plus_constant (x, INTVAL (y));
4443 else if (CONSTANT_P (x))
4444 tem = x, x = y, y = tem;
4446 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4447 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4449 /* Note that if the operands of Y are specified in the opposite
4450 order in the recursive calls below, infinite recursion will occur. */
4451 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4452 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4454 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4455 constant will have been placed second. */
4456 if (CONSTANT_P (x) && CONSTANT_P (y))
4458 if (GET_CODE (x) == CONST)
4460 if (GET_CODE (y) == CONST)
4463 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
4466 return gen_rtx (PLUS, mode, x, y);
4469 /* If ADDR is a sum containing a pseudo register that should be
4470 replaced with a constant (from reg_equiv_constant),
4471 return the result of doing so, and also apply the associative
4472 law so that the result is more likely to be a valid address.
4473 (But it is not guaranteed to be one.)
4475 Note that at most one register is replaced, even if more are
4476 replaceable. Also, we try to put the result into a canonical form
4477 so it is more likely to be a valid address.
4479 In all other cases, return ADDR. */
4482 subst_indexed_address (addr)
4485 rtx op0 = 0, op1 = 0, op2 = 0;
4489 if (GET_CODE (addr) == PLUS)
4491 /* Try to find a register to replace. */
4492 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4493 if (GET_CODE (op0) == REG
4494 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4495 && reg_renumber[regno] < 0
4496 && reg_equiv_constant[regno] != 0)
4497 op0 = reg_equiv_constant[regno];
4498 else if (GET_CODE (op1) == REG
4499 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4500 && reg_renumber[regno] < 0
4501 && reg_equiv_constant[regno] != 0)
4502 op1 = reg_equiv_constant[regno];
4503 else if (GET_CODE (op0) == PLUS
4504 && (tem = subst_indexed_address (op0)) != op0)
4506 else if (GET_CODE (op1) == PLUS
4507 && (tem = subst_indexed_address (op1)) != op1)
4512 /* Pick out up to three things to add. */
4513 if (GET_CODE (op1) == PLUS)
4514 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4515 else if (GET_CODE (op0) == PLUS)
4516 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4518 /* Compute the sum. */
4520 op1 = form_sum (op1, op2);
4522 op0 = form_sum (op0, op1);
4529 /* Record the pseudo registers we must reload into hard registers
4530 in a subexpression of a would-be memory address, X.
4531 (This function is not called if the address we find is strictly valid.)
4532 CONTEXT = 1 means we are considering regs as index regs,
4533 = 0 means we are considering them as base regs.
4535 OPNUM and TYPE specify the purpose of any reloads made.
4537 IND_LEVELS says how many levels of indirect addressing are
4538 supported at this point in the address.
4540 We return nonzero if X, as a whole, is reloaded or replaced. */
4542 /* Note that we take shortcuts assuming that no multi-reg machine mode
4543 occurs as part of an address.
4544 Also, this is not fully machine-customizable; it works for machines
4545 such as vaxes and 68000's and 32000's, but other possible machines
4546 could have addressing modes that this does not handle right. */
4549 find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
4554 enum reload_type type;
4557 register RTX_CODE code = GET_CODE (x);
4563 register rtx orig_op0 = XEXP (x, 0);
4564 register rtx orig_op1 = XEXP (x, 1);
4565 register RTX_CODE code0 = GET_CODE (orig_op0);
4566 register RTX_CODE code1 = GET_CODE (orig_op1);
4567 register rtx op0 = orig_op0;
4568 register rtx op1 = orig_op1;
4570 if (GET_CODE (op0) == SUBREG)
4572 op0 = SUBREG_REG (op0);
4573 code0 = GET_CODE (op0);
4574 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
4575 op0 = gen_rtx (REG, word_mode,
4576 REGNO (op0) + SUBREG_WORD (orig_op0));
4579 if (GET_CODE (op1) == SUBREG)
4581 op1 = SUBREG_REG (op1);
4582 code1 = GET_CODE (op1);
4583 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
4584 op1 = gen_rtx (REG, GET_MODE (op1),
4585 REGNO (op1) + SUBREG_WORD (orig_op1));
4588 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
4589 || code0 == ZERO_EXTEND || code1 == MEM)
4591 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4593 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4597 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
4598 || code1 == ZERO_EXTEND || code0 == MEM)
4600 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4602 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4606 else if (code0 == CONST_INT || code0 == CONST
4607 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4608 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4611 else if (code1 == CONST_INT || code1 == CONST
4612 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4613 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4616 else if (code0 == REG && code1 == REG)
4618 if (REG_OK_FOR_INDEX_P (op0)
4619 && REG_OK_FOR_BASE_P (op1))
4621 else if (REG_OK_FOR_INDEX_P (op1)
4622 && REG_OK_FOR_BASE_P (op0))
4624 else if (REG_OK_FOR_BASE_P (op1))
4625 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4627 else if (REG_OK_FOR_BASE_P (op0))
4628 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4630 else if (REG_OK_FOR_INDEX_P (op1))
4631 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4633 else if (REG_OK_FOR_INDEX_P (op0))
4634 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4638 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4640 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4645 else if (code0 == REG)
4647 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4649 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4653 else if (code1 == REG)
4655 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4657 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4668 if (GET_CODE (XEXP (x, 0)) == REG)
4670 register int regno = REGNO (XEXP (x, 0));
4674 /* A register that is incremented cannot be constant! */
4675 if (regno >= FIRST_PSEUDO_REGISTER
4676 && reg_equiv_constant[regno] != 0)
4679 /* Handle a register that is equivalent to a memory location
4680 which cannot be addressed directly. */
4681 if (reg_equiv_address[regno] != 0)
4683 rtx tem = make_memloc (XEXP (x, 0), regno);
4684 /* First reload the memory location's address. */
4685 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4686 &XEXP (tem, 0), opnum, type, ind_levels);
4687 /* Put this inside a new increment-expression. */
4688 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4689 /* Proceed to reload that, as if it contained a register. */
4692 /* If we have a hard register that is ok as an index,
4693 don't make a reload. If an autoincrement of a nice register
4694 isn't "valid", it must be that no autoincrement is "valid".
4695 If that is true and something made an autoincrement anyway,
4696 this must be a special context where one is allowed.
4697 (For example, a "push" instruction.)
4698 We can't improve this address, so leave it alone. */
4700 /* Otherwise, reload the autoincrement into a suitable hard reg
4701 and record how much to increment by. */
4703 if (reg_renumber[regno] >= 0)
4704 regno = reg_renumber[regno];
4705 if ((regno >= FIRST_PSEUDO_REGISTER
4706 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4707 : REGNO_OK_FOR_BASE_P (regno))))
4712 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4713 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4714 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4716 reload_inc[reloadnum]
4717 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4722 /* Update the REG_INC notes. */
4724 for (link = REG_NOTES (this_insn);
4725 link; link = XEXP (link, 1))
4726 if (REG_NOTE_KIND (link) == REG_INC
4727 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4728 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4734 else if (GET_CODE (XEXP (x, 0)) == MEM)
4736 /* This is probably the result of a substitution, by eliminate_regs,
4737 of an equivalent address for a pseudo that was not allocated to a
4738 hard register. Verify that the specified address is valid and
4739 reload it into a register. */
4740 rtx tem = XEXP (x, 0);
4744 /* Since we know we are going to reload this item, don't decrement
4745 for the indirection level.
4747 Note that this is actually conservative: it would be slightly
4748 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4750 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4751 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4752 opnum, type, ind_levels);
4754 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4755 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4756 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4757 reload_inc[reloadnum]
4758 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4760 link = FIND_REG_INC_NOTE (this_insn, tem);
4762 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4769 /* This is probably the result of a substitution, by eliminate_regs, of
4770 an equivalent address for a pseudo that was not allocated to a hard
4771 register. Verify that the specified address is valid and reload it
4774 Since we know we are going to reload this item, don't decrement for
4775 the indirection level.
4777 Note that this is actually conservative: it would be slightly more
4778 efficient to use the value of SPILL_INDIRECT_LEVELS from
4781 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4782 opnum, type, ind_levels);
4783 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4784 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4785 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4790 register int regno = REGNO (x);
4792 if (reg_equiv_constant[regno] != 0)
4794 find_reloads_address_part (reg_equiv_constant[regno], loc,
4795 (context ? INDEX_REG_CLASS
4797 GET_MODE (x), opnum, type, ind_levels);
4801 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4802 that feeds this insn. */
4803 if (reg_equiv_mem[regno] != 0)
4805 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4806 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4807 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4812 if (reg_equiv_address[regno] != 0)
4814 x = make_memloc (x, regno);
4815 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4816 opnum, type, ind_levels);
4819 if (reg_renumber[regno] >= 0)
4820 regno = reg_renumber[regno];
4822 if ((regno >= FIRST_PSEUDO_REGISTER
4823 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4824 : REGNO_OK_FOR_BASE_P (regno))))
4826 push_reload (x, NULL_RTX, loc, NULL_PTR,
4827 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4828 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4832 /* If a register appearing in an address is the subject of a CLOBBER
4833 in this insn, reload it into some other register to be safe.
4834 The CLOBBER is supposed to make the register unavailable
4835 from before this insn to after it. */
4836 if (regno_clobbered_p (regno, this_insn))
4838 push_reload (x, NULL_RTX, loc, NULL_PTR,
4839 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4840 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4847 if (GET_CODE (SUBREG_REG (x)) == REG)
4849 /* If this is a SUBREG of a hard register and the resulting register
4850 is of the wrong class, reload the whole SUBREG. This avoids
4851 needless copies if SUBREG_REG is multi-word. */
4852 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4854 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4856 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
4857 : REGNO_OK_FOR_BASE_P (regno)))
4859 push_reload (x, NULL_RTX, loc, NULL_PTR,
4860 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4861 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4865 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
4866 is larger than the class size, then reload the whole SUBREG. */
4869 enum reg_class class = (context
4870 ? INDEX_REG_CLASS : BASE_REG_CLASS);
4871 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
4872 > reg_class_size[class])
4874 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4875 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4884 register char *fmt = GET_RTX_FORMAT (code);
4887 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4890 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4891 opnum, type, ind_levels);
4898 /* X, which is found at *LOC, is a part of an address that needs to be
4899 reloaded into a register of class CLASS. If X is a constant, or if
4900 X is a PLUS that contains a constant, check that the constant is a
4901 legitimate operand and that we are supposed to be able to load
4902 it into the register.
4904 If not, force the constant into memory and reload the MEM instead.
4906 MODE is the mode to use, in case X is an integer constant.
4908 OPNUM and TYPE describe the purpose of any reloads made.
4910 IND_LEVELS says how many levels of indirect addressing this machine
4914 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
4917 enum reg_class class;
4918 enum machine_mode mode;
4920 enum reload_type type;
4924 && (! LEGITIMATE_CONSTANT_P (x)
4925 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4927 rtx tem = x = force_const_mem (mode, x);
4928 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4929 opnum, type, ind_levels);
4932 else if (GET_CODE (x) == PLUS
4933 && CONSTANT_P (XEXP (x, 1))
4934 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4935 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4937 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4939 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4940 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4941 opnum, type, ind_levels);
4944 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4945 mode, VOIDmode, 0, 0, opnum, type);
4948 /* Substitute into the current INSN the registers into which we have reloaded
4949 the things that need reloading. The array `replacements'
4950 says contains the locations of all pointers that must be changed
4951 and says what to replace them with.
4953 Return the rtx that X translates into; usually X, but modified. */
4960 for (i = 0; i < n_replacements; i++)
4962 register struct replacement *r = &replacements[i];
4963 register rtx reloadreg = reload_reg_rtx[r->what];
4966 /* Encapsulate RELOADREG so its machine mode matches what
4967 used to be there. Note that gen_lowpart_common will
4968 do the wrong thing if RELOADREG is multi-word. RELOADREG
4969 will always be a REG here. */
4970 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4971 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4973 /* If we are putting this into a SUBREG and RELOADREG is a
4974 SUBREG, we would be making nested SUBREGs, so we have to fix
4975 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4977 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4979 if (GET_MODE (*r->subreg_loc)
4980 == GET_MODE (SUBREG_REG (reloadreg)))
4981 *r->subreg_loc = SUBREG_REG (reloadreg);
4984 *r->where = SUBREG_REG (reloadreg);
4985 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4989 *r->where = reloadreg;
4991 /* If reload got no reg and isn't optional, something's wrong. */
4992 else if (! reload_optional[r->what])
4997 /* Make a copy of any replacements being done into X and move those copies
4998 to locations in Y, a copy of X. We only look at the highest level of
5002 copy_replacements (x, y)
5007 enum rtx_code code = GET_CODE (x);
5008 char *fmt = GET_RTX_FORMAT (code);
5009 struct replacement *r;
5011 /* We can't support X being a SUBREG because we might then need to know its
5012 location if something inside it was replaced. */
5016 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5018 for (j = 0; j < n_replacements; j++)
5020 if (replacements[j].subreg_loc == &XEXP (x, i))
5022 r = &replacements[n_replacements++];
5023 r->where = replacements[j].where;
5024 r->subreg_loc = &XEXP (y, i);
5025 r->what = replacements[j].what;
5026 r->mode = replacements[j].mode;
5028 else if (replacements[j].where == &XEXP (x, i))
5030 r = &replacements[n_replacements++];
5031 r->where = &XEXP (y, i);
5033 r->what = replacements[j].what;
5034 r->mode = replacements[j].mode;
5039 /* If LOC was scheduled to be replaced by something, return the replacement.
5040 Otherwise, return *LOC. */
5043 find_replacement (loc)
5046 struct replacement *r;
5048 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5050 rtx reloadreg = reload_reg_rtx[r->what];
5052 if (reloadreg && r->where == loc)
5054 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5055 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
5059 else if (reloadreg && r->subreg_loc == loc)
5061 /* RELOADREG must be either a REG or a SUBREG.
5063 ??? Is it actually still ever a SUBREG? If so, why? */
5065 if (GET_CODE (reloadreg) == REG)
5066 return gen_rtx (REG, GET_MODE (*loc),
5067 REGNO (reloadreg) + SUBREG_WORD (*loc));
5068 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5071 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
5072 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5079 /* Return nonzero if register in range [REGNO, ENDREGNO)
5080 appears either explicitly or implicitly in X
5081 other than being stored into (except for earlyclobber operands).
5083 References contained within the substructure at LOC do not count.
5084 LOC may be zero, meaning don't ignore anything.
5086 This is similar to refers_to_regno_p in rtlanal.c except that we
5087 look at equivalences for pseudos that didn't get hard registers. */
5090 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5091 int regno, endregno;
5096 register RTX_CODE code;
5103 code = GET_CODE (x);
5110 /* If this is a pseudo, a hard register must not have been allocated.
5111 X must therefore either be a constant or be in memory. */
5112 if (i >= FIRST_PSEUDO_REGISTER)
5114 if (reg_equiv_memory_loc[i])
5115 return refers_to_regno_for_reload_p (regno, endregno,
5116 reg_equiv_memory_loc[i],
5119 if (reg_equiv_constant[i])
5125 return (endregno > i
5126 && regno < i + (i < FIRST_PSEUDO_REGISTER
5127 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5131 /* If this is a SUBREG of a hard reg, we can see exactly which
5132 registers are being modified. Otherwise, handle normally. */
5133 if (GET_CODE (SUBREG_REG (x)) == REG
5134 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5136 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5138 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5139 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5141 return endregno > inner_regno && regno < inner_endregno;
5147 if (&SET_DEST (x) != loc
5148 /* Note setting a SUBREG counts as referring to the REG it is in for
5149 a pseudo but not for hard registers since we can
5150 treat each word individually. */
5151 && ((GET_CODE (SET_DEST (x)) == SUBREG
5152 && loc != &SUBREG_REG (SET_DEST (x))
5153 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5154 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5155 && refers_to_regno_for_reload_p (regno, endregno,
5156 SUBREG_REG (SET_DEST (x)),
5158 /* If the output is an earlyclobber operand, this is
5160 || ((GET_CODE (SET_DEST (x)) != REG
5161 || earlyclobber_operand_p (SET_DEST (x)))
5162 && refers_to_regno_for_reload_p (regno, endregno,
5163 SET_DEST (x), loc))))
5166 if (code == CLOBBER || loc == &SET_SRC (x))
5172 /* X does not match, so try its subexpressions. */
5174 fmt = GET_RTX_FORMAT (code);
5175 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5177 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5185 if (refers_to_regno_for_reload_p (regno, endregno,
5189 else if (fmt[i] == 'E')
5192 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5193 if (loc != &XVECEXP (x, i, j)
5194 && refers_to_regno_for_reload_p (regno, endregno,
5195 XVECEXP (x, i, j), loc))
5202 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5203 we check if any register number in X conflicts with the relevant register
5204 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5205 contains a MEM (we don't bother checking for memory addresses that can't
5206 conflict because we expect this to be a rare case.
5208 This function is similar to reg_overlap_mention_p in rtlanal.c except
5209 that we look at equivalences for pseudos that didn't get hard registers. */
5212 reg_overlap_mentioned_for_reload_p (x, in)
5215 int regno, endregno;
5217 if (GET_CODE (x) == SUBREG)
5219 regno = REGNO (SUBREG_REG (x));
5220 if (regno < FIRST_PSEUDO_REGISTER)
5221 regno += SUBREG_WORD (x);
5223 else if (GET_CODE (x) == REG)
5227 /* If this is a pseudo, it must not have been assigned a hard register.
5228 Therefore, it must either be in memory or be a constant. */
5230 if (regno >= FIRST_PSEUDO_REGISTER)
5232 if (reg_equiv_memory_loc[regno])
5233 return refers_to_mem_for_reload_p (in);
5234 else if (reg_equiv_constant[regno])
5239 else if (CONSTANT_P (x))
5241 else if (GET_CODE (x) == MEM)
5242 return refers_to_mem_for_reload_p (in);
5243 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5244 || GET_CODE (x) == CC0)
5245 return reg_mentioned_p (x, in);
5249 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5250 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5252 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5255 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5259 refers_to_mem_for_reload_p (x)
5265 if (GET_CODE (x) == MEM)
5268 if (GET_CODE (x) == REG)
5269 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5270 && reg_equiv_memory_loc[REGNO (x)]);
5272 fmt = GET_RTX_FORMAT (GET_CODE (x));
5273 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5275 && (GET_CODE (XEXP (x, i)) == MEM
5276 || refers_to_mem_for_reload_p (XEXP (x, i))))
5282 /* Check the insns before INSN to see if there is a suitable register
5283 containing the same value as GOAL.
5284 If OTHER is -1, look for a register in class CLASS.
5285 Otherwise, just see if register number OTHER shares GOAL's value.
5287 Return an rtx for the register found, or zero if none is found.
5289 If RELOAD_REG_P is (short *)1,
5290 we reject any hard reg that appears in reload_reg_rtx
5291 because such a hard reg is also needed coming into this insn.
5293 If RELOAD_REG_P is any other nonzero value,
5294 it is a vector indexed by hard reg number
5295 and we reject any hard reg whose element in the vector is nonnegative
5296 as well as any that appears in reload_reg_rtx.
5298 If GOAL is zero, then GOALREG is a register number; we look
5299 for an equivalent for that register.
5301 MODE is the machine mode of the value we want an equivalence for.
5302 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5304 This function is used by jump.c as well as in the reload pass.
5306 If GOAL is the sum of the stack pointer and a constant, we treat it
5307 as if it were a constant except that sp is required to be unchanging. */
5310 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5313 enum reg_class class;
5315 short *reload_reg_p;
5317 enum machine_mode mode;
5319 register rtx p = insn;
5320 rtx goaltry, valtry, value, where;
5322 register int regno = -1;
5326 int goal_mem_addr_varies = 0;
5327 int need_stable_sp = 0;
5333 else if (GET_CODE (goal) == REG)
5334 regno = REGNO (goal);
5335 else if (GET_CODE (goal) == MEM)
5337 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5338 if (MEM_VOLATILE_P (goal))
5340 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5342 /* An address with side effects must be reexecuted. */
5353 else if (CONSTANT_P (goal))
5355 else if (GET_CODE (goal) == PLUS
5356 && XEXP (goal, 0) == stack_pointer_rtx
5357 && CONSTANT_P (XEXP (goal, 1)))
5358 goal_const = need_stable_sp = 1;
5362 /* On some machines, certain regs must always be rejected
5363 because they don't behave the way ordinary registers do. */
5365 #ifdef OVERLAPPING_REGNO_P
5366 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5367 && OVERLAPPING_REGNO_P (regno))
5371 /* Scan insns back from INSN, looking for one that copies
5372 a value into or out of GOAL.
5373 Stop and give up if we reach a label. */
5378 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5380 if (GET_CODE (p) == INSN
5381 /* If we don't want spill regs ... */
5382 && (! (reload_reg_p != 0
5383 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5384 /* ... then ignore insns introduced by reload; they aren't useful
5385 and can cause results in reload_as_needed to be different
5386 from what they were when calculating the need for spills.
5387 If we notice an input-reload insn here, we will reject it below,
5388 but it might hide a usable equivalent. That makes bad code.
5389 It may even abort: perhaps no reg was spilled for this insn
5390 because it was assumed we would find that equivalent. */
5391 || INSN_UID (p) < reload_first_uid))
5394 pat = single_set (p);
5395 /* First check for something that sets some reg equal to GOAL. */
5398 && true_regnum (SET_SRC (pat)) == regno
5399 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5402 && true_regnum (SET_DEST (pat)) == regno
5403 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5405 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5406 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5408 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5409 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5411 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5412 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5413 /* If we are looking for a constant,
5414 and something equivalent to that constant was copied
5415 into a reg, we can use that reg. */
5416 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5418 && rtx_equal_p (XEXP (tem, 0), goal)
5419 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5420 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5422 && GET_CODE (SET_DEST (pat)) == REG
5423 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5424 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5425 && GET_CODE (goal) == CONST_INT
5426 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5428 && rtx_equal_p (goal, goaltry)
5429 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5431 && (valueno = true_regnum (valtry)) >= 0)
5432 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5434 && GET_CODE (SET_DEST (pat)) == REG
5435 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5436 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5437 && GET_CODE (goal) == CONST_INT
5438 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5440 && rtx_equal_p (goal, goaltry)
5442 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5443 && (valueno = true_regnum (valtry)) >= 0)))
5446 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5447 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5457 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5458 (or copying VALUE into GOAL, if GOAL is also a register).
5459 Now verify that VALUE is really valid. */
5461 /* VALUENO is the register number of VALUE; a hard register. */
5463 /* Don't try to re-use something that is killed in this insn. We want
5464 to be able to trust REG_UNUSED notes. */
5465 if (find_reg_note (where, REG_UNUSED, value))
5468 /* If we propose to get the value from the stack pointer or if GOAL is
5469 a MEM based on the stack pointer, we need a stable SP. */
5470 if (valueno == STACK_POINTER_REGNUM
5471 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5475 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5476 if (GET_MODE (value) != mode)
5479 /* Reject VALUE if it was loaded from GOAL
5480 and is also a register that appears in the address of GOAL. */
5482 if (goal_mem && value == SET_DEST (PATTERN (where))
5483 && refers_to_regno_for_reload_p (valueno,
5485 + HARD_REGNO_NREGS (valueno, mode)),
5489 /* Reject registers that overlap GOAL. */
5491 if (!goal_mem && !goal_const
5492 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5493 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5496 /* Reject VALUE if it is one of the regs reserved for reloads.
5497 Reload1 knows how to reuse them anyway, and it would get
5498 confused if we allocated one without its knowledge.
5499 (Now that insns introduced by reload are ignored above,
5500 this case shouldn't happen, but I'm not positive.) */
5502 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5503 && reload_reg_p[valueno] >= 0)
5506 /* On some machines, certain regs must always be rejected
5507 because they don't behave the way ordinary registers do. */
5509 #ifdef OVERLAPPING_REGNO_P
5510 if (OVERLAPPING_REGNO_P (valueno))
5514 nregs = HARD_REGNO_NREGS (regno, mode);
5515 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5517 /* Reject VALUE if it is a register being used for an input reload
5518 even if it is not one of those reserved. */
5520 if (reload_reg_p != 0)
5523 for (i = 0; i < n_reloads; i++)
5524 if (reload_reg_rtx[i] != 0 && reload_in[i])
5526 int regno1 = REGNO (reload_reg_rtx[i]);
5527 int nregs1 = HARD_REGNO_NREGS (regno1,
5528 GET_MODE (reload_reg_rtx[i]));
5529 if (regno1 < valueno + valuenregs
5530 && regno1 + nregs1 > valueno)
5536 /* We must treat frame pointer as varying here,
5537 since it can vary--in a nonlocal goto as generated by expand_goto. */
5538 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5540 /* Now verify that the values of GOAL and VALUE remain unaltered
5541 until INSN is reached. */
5550 /* Don't trust the conversion past a function call
5551 if either of the two is in a call-clobbered register, or memory. */
5552 if (GET_CODE (p) == CALL_INSN
5553 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5554 && call_used_regs[regno])
5556 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5557 && call_used_regs[valueno])
5563 #ifdef INSN_CLOBBERS_REGNO_P
5564 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5565 && INSN_CLOBBERS_REGNO_P (p, valueno))
5566 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5567 && INSN_CLOBBERS_REGNO_P (p, regno)))
5571 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5573 /* If this insn P stores in either GOAL or VALUE, return 0.
5574 If GOAL is a memory ref and this insn writes memory, return 0.
5575 If GOAL is a memory ref and its address is not constant,
5576 and this insn P changes a register used in GOAL, return 0. */
5579 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5581 register rtx dest = SET_DEST (pat);
5582 while (GET_CODE (dest) == SUBREG
5583 || GET_CODE (dest) == ZERO_EXTRACT
5584 || GET_CODE (dest) == SIGN_EXTRACT
5585 || GET_CODE (dest) == STRICT_LOW_PART)
5586 dest = XEXP (dest, 0);
5587 if (GET_CODE (dest) == REG)
5589 register int xregno = REGNO (dest);
5591 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5592 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5595 if (xregno < regno + nregs && xregno + xnregs > regno)
5597 if (xregno < valueno + valuenregs
5598 && xregno + xnregs > valueno)
5600 if (goal_mem_addr_varies
5601 && reg_overlap_mentioned_for_reload_p (dest, goal))
5604 else if (goal_mem && GET_CODE (dest) == MEM
5605 && ! push_operand (dest, GET_MODE (dest)))
5607 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
5608 && reg_equiv_memory_loc[regno] != 0)
5610 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5613 else if (GET_CODE (pat) == PARALLEL)
5616 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5618 register rtx v1 = XVECEXP (pat, 0, i);
5619 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5621 register rtx dest = SET_DEST (v1);
5622 while (GET_CODE (dest) == SUBREG
5623 || GET_CODE (dest) == ZERO_EXTRACT
5624 || GET_CODE (dest) == SIGN_EXTRACT
5625 || GET_CODE (dest) == STRICT_LOW_PART)
5626 dest = XEXP (dest, 0);
5627 if (GET_CODE (dest) == REG)
5629 register int xregno = REGNO (dest);
5631 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5632 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5635 if (xregno < regno + nregs
5636 && xregno + xnregs > regno)
5638 if (xregno < valueno + valuenregs
5639 && xregno + xnregs > valueno)
5641 if (goal_mem_addr_varies
5642 && reg_overlap_mentioned_for_reload_p (dest,
5646 else if (goal_mem && GET_CODE (dest) == MEM
5647 && ! push_operand (dest, GET_MODE (dest)))
5649 else if (need_stable_sp
5650 && push_operand (dest, GET_MODE (dest)))
5656 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
5660 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
5661 link = XEXP (link, 1))
5663 pat = XEXP (link, 0);
5664 if (GET_CODE (pat) == CLOBBER)
5666 register rtx dest = SET_DEST (pat);
5667 while (GET_CODE (dest) == SUBREG
5668 || GET_CODE (dest) == ZERO_EXTRACT
5669 || GET_CODE (dest) == SIGN_EXTRACT
5670 || GET_CODE (dest) == STRICT_LOW_PART)
5671 dest = XEXP (dest, 0);
5672 if (GET_CODE (dest) == REG)
5674 register int xregno = REGNO (dest);
5676 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5677 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5680 if (xregno < regno + nregs
5681 && xregno + xnregs > regno)
5683 if (xregno < valueno + valuenregs
5684 && xregno + xnregs > valueno)
5686 if (goal_mem_addr_varies
5687 && reg_overlap_mentioned_for_reload_p (dest,
5691 else if (goal_mem && GET_CODE (dest) == MEM
5692 && ! push_operand (dest, GET_MODE (dest)))
5694 else if (need_stable_sp
5695 && push_operand (dest, GET_MODE (dest)))
5702 /* If this insn auto-increments or auto-decrements
5703 either regno or valueno, return 0 now.
5704 If GOAL is a memory ref and its address is not constant,
5705 and this insn P increments a register used in GOAL, return 0. */
5709 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5710 if (REG_NOTE_KIND (link) == REG_INC
5711 && GET_CODE (XEXP (link, 0)) == REG)
5713 register int incno = REGNO (XEXP (link, 0));
5714 if (incno < regno + nregs && incno >= regno)
5716 if (incno < valueno + valuenregs && incno >= valueno)
5718 if (goal_mem_addr_varies
5719 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5729 /* Find a place where INCED appears in an increment or decrement operator
5730 within X, and return the amount INCED is incremented or decremented by.
5731 The value is always positive. */
5734 find_inc_amount (x, inced)
5737 register enum rtx_code code = GET_CODE (x);
5743 register rtx addr = XEXP (x, 0);
5744 if ((GET_CODE (addr) == PRE_DEC
5745 || GET_CODE (addr) == POST_DEC
5746 || GET_CODE (addr) == PRE_INC
5747 || GET_CODE (addr) == POST_INC)
5748 && XEXP (addr, 0) == inced)
5749 return GET_MODE_SIZE (GET_MODE (x));
5752 fmt = GET_RTX_FORMAT (code);
5753 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5757 register int tem = find_inc_amount (XEXP (x, i), inced);
5764 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5766 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5776 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5779 regno_clobbered_p (regno, insn)
5783 if (GET_CODE (PATTERN (insn)) == CLOBBER
5784 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5785 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5787 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5789 int i = XVECLEN (PATTERN (insn), 0) - 1;
5793 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5794 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5795 && REGNO (XEXP (elt, 0)) == regno)
5803 static char *reload_when_needed_name[] =
5806 "RELOAD_FOR_OUTPUT",
5808 "RELOAD_FOR_INPUT_ADDRESS",
5809 "RELOAD_FOR_OUTPUT_ADDRESS",
5810 "RELOAD_FOR_OPERAND_ADDRESS",
5811 "RELOAD_FOR_OPADDR_ADDR",
5813 "RELOAD_FOR_OTHER_ADDRESS"
5816 static char *reg_class_names[] = REG_CLASS_NAMES;
5818 /* This function is used to print the variables set by 'find_reloads' */
5825 fprintf (stderr, "\nn_reloads = %d\n", n_reloads);
5827 for (r = 0; r < n_reloads; r++)
5829 fprintf (stderr, "\nRELOAD %d\n", r);
5833 fprintf (stderr, "\nreload_in (%s) = ",
5834 GET_MODE_NAME (reload_inmode[r]));
5835 debug_rtx (reload_in[r]);
5840 fprintf (stderr, "\nreload_out (%s) = ",
5841 GET_MODE_NAME (reload_outmode[r]));
5842 debug_rtx (reload_out[r]);
5845 fprintf (stderr, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
5847 fprintf (stderr, "%s (opnum = %d)",
5848 reload_when_needed_name[(int)reload_when_needed[r]],
5851 if (reload_optional[r])
5852 fprintf (stderr, ", optional");
5855 fprintf (stderr, ", inc by %d\n", reload_inc[r]);
5857 if (reload_nocombine[r])
5858 fprintf (stderr, ", can combine", reload_nocombine[r]);
5860 if (reload_secondary_p[r])
5861 fprintf (stderr, ", secondary_reload_p");
5863 if (reload_in_reg[r])
5865 fprintf (stderr, "\nreload_in_reg:\t\t\t");
5866 debug_rtx (reload_in_reg[r]);
5869 if (reload_reg_rtx[r])
5871 fprintf (stderr, "\nreload_reg_rtx:\t\t\t");
5872 debug_rtx (reload_reg_rtx[r]);
5875 if (reload_secondary_in_reload[r] != -1)
5877 fprintf (stderr, "\nsecondary_in_reload = ");
5878 fprintf (stderr, "%d ", reload_secondary_in_reload[r]);
5881 if (reload_secondary_out_reload[r] != -1)
5883 if (reload_secondary_in_reload[r] != -1)
5884 fprintf (stderr, ", secondary_out_reload = ");
5886 fprintf (stderr, "\nsecondary_out_reload = ");
5888 fprintf (stderr, "%d", reload_secondary_out_reload[r]);
5892 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5894 fprintf (stderr, "\nsecondary_in_icode = ");
5895 fprintf (stderr, "%s", insn_name[r]);
5898 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
5900 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5901 fprintf (stderr, ", secondary_out_icode = ");
5903 fprintf (stderr, "\nsecondary_out_icode = ");
5905 fprintf (stderr, "%s ", insn_name[r]);
5907 fprintf (stderr, "\n");
5910 fprintf (stderr, "\n");