1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
90 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
95 #include "coretypes.h"
97 #include "rtl-error.h"
99 #include "insn-config.h"
106 #include "addresses.h"
107 #include "hard-reg-set.h"
110 #include "function.h"
115 /* True if X is a constant that can be forced into the constant pool.
116 MODE is the mode of the operand, or VOIDmode if not known. */
117 #define CONST_POOL_OK_P(MODE, X) \
118 ((MODE) != VOIDmode \
120 && GET_CODE (X) != HIGH \
121 && !targetm.cannot_force_const_mem (MODE, X))
123 /* True if C is a non-empty register class that has too few registers
124 to be safely used as a reload target class. */
127 small_register_class_p (reg_class_t rclass)
129 return (reg_class_size [(int) rclass] == 1
130 || (reg_class_size [(int) rclass] >= 1
131 && targetm.class_likely_spilled_p (rclass)));
135 /* All reloads of the current insn are recorded here. See reload.h for
138 struct reload rld[MAX_RELOADS];
140 /* All the "earlyclobber" operands of the current insn
141 are recorded here. */
143 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
145 int reload_n_operands;
147 /* Replacing reloads.
149 If `replace_reloads' is nonzero, then as each reload is recorded
150 an entry is made for it in the table `replacements'.
151 Then later `subst_reloads' can look through that table and
152 perform all the replacements needed. */
154 /* Nonzero means record the places to replace. */
155 static int replace_reloads;
157 /* Each replacement is recorded with a structure like this. */
160 rtx *where; /* Location to store in */
161 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
162 a SUBREG; 0 otherwise. */
163 int what; /* which reload this is for */
164 enum machine_mode mode; /* mode it must have */
167 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
169 /* Number of replacements currently recorded. */
170 static int n_replacements;
172 /* Used to track what is modified by an operand. */
175 int reg_flag; /* Nonzero if referencing a register. */
176 int safe; /* Nonzero if this can't conflict with anything. */
177 rtx base; /* Base address for MEM. */
178 HOST_WIDE_INT start; /* Starting offset or register number. */
179 HOST_WIDE_INT end; /* Ending offset or register number. */
182 #ifdef SECONDARY_MEMORY_NEEDED
184 /* Save MEMs needed to copy from one class of registers to another. One MEM
185 is used per mode, but normally only one or two modes are ever used.
187 We keep two versions, before and after register elimination. The one
188 after register elimination is record separately for each operand. This
189 is done in case the address is not valid to be sure that we separately
192 static rtx secondary_memlocs[NUM_MACHINE_MODES];
193 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
194 static int secondary_memlocs_elim_used = 0;
197 /* The instruction we are doing reloads for;
198 so we can test whether a register dies in it. */
199 static rtx this_insn;
201 /* Nonzero if this instruction is a user-specified asm with operands. */
202 static int this_insn_is_asm;
204 /* If hard_regs_live_known is nonzero,
205 we can tell which hard regs are currently live,
206 at least enough to succeed in choosing dummy reloads. */
207 static int hard_regs_live_known;
209 /* Indexed by hard reg number,
210 element is nonnegative if hard reg has been spilled.
211 This vector is passed to `find_reloads' as an argument
212 and is not changed here. */
213 static short *static_reload_reg_p;
215 /* Set to 1 in subst_reg_equivs if it changes anything. */
216 static int subst_reg_equivs_changed;
218 /* On return from push_reload, holds the reload-number for the OUT
219 operand, which can be different for that from the input operand. */
220 static int output_reloadnum;
222 /* Compare two RTX's. */
223 #define MATCHES(x, y) \
224 (x == y || (x != 0 && (REG_P (x) \
225 ? REG_P (y) && REGNO (x) == REGNO (y) \
226 : rtx_equal_p (x, y) && ! side_effects_p (x))))
228 /* Indicates if two reloads purposes are for similar enough things that we
229 can merge their reloads. */
230 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
231 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
232 || ((when1) == (when2) && (op1) == (op2)) \
233 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
234 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
235 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
236 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
237 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
239 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
240 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
241 ((when1) != (when2) \
242 || ! ((op1) == (op2) \
243 || (when1) == RELOAD_FOR_INPUT \
244 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
245 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
247 /* If we are going to reload an address, compute the reload type to
249 #define ADDR_TYPE(type) \
250 ((type) == RELOAD_FOR_INPUT_ADDRESS \
251 ? RELOAD_FOR_INPADDR_ADDRESS \
252 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
253 ? RELOAD_FOR_OUTADDR_ADDRESS \
256 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
257 enum machine_mode, enum reload_type,
258 enum insn_code *, secondary_reload_info *);
259 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
261 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
262 static void push_replacement (rtx *, int, enum machine_mode);
263 static void dup_replacements (rtx *, rtx *);
264 static void combine_reloads (void);
265 static int find_reusable_reload (rtx *, rtx, enum reg_class,
266 enum reload_type, int, int);
267 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
268 enum machine_mode, reg_class_t, int, int);
269 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
270 static struct decomposition decompose (rtx);
271 static int immune_p (rtx, rtx, struct decomposition);
272 static bool alternative_allows_const_pool_ref (rtx, const char *, int);
273 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
275 static rtx make_memloc (rtx, int);
276 static int maybe_memory_address_addr_space_p (enum machine_mode, rtx,
277 addr_space_t, rtx *);
278 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
279 int, enum reload_type, int, rtx);
280 static rtx subst_reg_equivs (rtx, rtx);
281 static rtx subst_indexed_address (rtx);
282 static void update_auto_inc_notes (rtx, int, int);
283 static int find_reloads_address_1 (enum machine_mode, rtx, int,
284 enum rtx_code, enum rtx_code, rtx *,
285 int, enum reload_type,int, rtx);
286 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
287 enum machine_mode, int,
288 enum reload_type, int);
289 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
291 static void copy_replacements_1 (rtx *, rtx *, int);
292 static int find_inc_amount (rtx, rtx);
293 static int refers_to_mem_for_reload_p (rtx);
294 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
297 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
301 push_reg_equiv_alt_mem (int regno, rtx mem)
305 for (it = reg_equiv_alt_mem_list (regno); it; it = XEXP (it, 1))
306 if (rtx_equal_p (XEXP (it, 0), mem))
309 reg_equiv_alt_mem_list (regno)
310 = alloc_EXPR_LIST (REG_EQUIV, mem,
311 reg_equiv_alt_mem_list (regno));
314 /* Determine if any secondary reloads are needed for loading (if IN_P is
315 nonzero) or storing (if IN_P is zero) X to or from a reload register of
316 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
317 are needed, push them.
319 Return the reload number of the secondary reload we made, or -1 if
320 we didn't need one. *PICODE is set to the insn_code to use if we do
321 need a secondary reload. */
324 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
325 enum reg_class reload_class,
326 enum machine_mode reload_mode, enum reload_type type,
327 enum insn_code *picode, secondary_reload_info *prev_sri)
329 enum reg_class rclass = NO_REGS;
330 enum reg_class scratch_class;
331 enum machine_mode mode = reload_mode;
332 enum insn_code icode = CODE_FOR_nothing;
333 enum insn_code t_icode = CODE_FOR_nothing;
334 enum reload_type secondary_type;
335 int s_reload, t_reload = -1;
336 const char *scratch_constraint;
338 secondary_reload_info sri;
340 if (type == RELOAD_FOR_INPUT_ADDRESS
341 || type == RELOAD_FOR_OUTPUT_ADDRESS
342 || type == RELOAD_FOR_INPADDR_ADDRESS
343 || type == RELOAD_FOR_OUTADDR_ADDRESS)
344 secondary_type = type;
346 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
348 *picode = CODE_FOR_nothing;
350 /* If X is a paradoxical SUBREG, use the inner value to determine both the
351 mode and object being reloaded. */
352 if (GET_CODE (x) == SUBREG
353 && (GET_MODE_SIZE (GET_MODE (x))
354 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
357 reload_mode = GET_MODE (x);
360 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
361 is still a pseudo-register by now, it *must* have an equivalent MEM
362 but we don't want to assume that), use that equivalent when seeing if
363 a secondary reload is needed since whether or not a reload is needed
364 might be sensitive to the form of the MEM. */
366 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
367 && reg_equiv_mem (REGNO (x)))
368 x = reg_equiv_mem (REGNO (x));
370 sri.icode = CODE_FOR_nothing;
371 sri.prev_sri = prev_sri;
372 rclass = (enum reg_class) targetm.secondary_reload (in_p, x, reload_class,
374 icode = (enum insn_code) sri.icode;
376 /* If we don't need any secondary registers, done. */
377 if (rclass == NO_REGS && icode == CODE_FOR_nothing)
380 if (rclass != NO_REGS)
381 t_reload = push_secondary_reload (in_p, x, opnum, optional, rclass,
382 reload_mode, type, &t_icode, &sri);
384 /* If we will be using an insn, the secondary reload is for a
387 if (icode != CODE_FOR_nothing)
389 /* If IN_P is nonzero, the reload register will be the output in
390 operand 0. If IN_P is zero, the reload register will be the input
391 in operand 1. Outputs should have an initial "=", which we must
394 /* ??? It would be useful to be able to handle only two, or more than
395 three, operands, but for now we can only handle the case of having
396 exactly three: output, input and one temp/scratch. */
397 gcc_assert (insn_data[(int) icode].n_operands == 3);
399 /* ??? We currently have no way to represent a reload that needs
400 an icode to reload from an intermediate tertiary reload register.
401 We should probably have a new field in struct reload to tag a
402 chain of scratch operand reloads onto. */
403 gcc_assert (rclass == NO_REGS);
405 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
406 gcc_assert (*scratch_constraint == '=');
407 scratch_constraint++;
408 if (*scratch_constraint == '&')
409 scratch_constraint++;
410 letter = *scratch_constraint;
411 scratch_class = (letter == 'r' ? GENERAL_REGS
412 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
413 scratch_constraint));
415 rclass = scratch_class;
416 mode = insn_data[(int) icode].operand[2].mode;
419 /* This case isn't valid, so fail. Reload is allowed to use the same
420 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
421 in the case of a secondary register, we actually need two different
422 registers for correct code. We fail here to prevent the possibility of
423 silently generating incorrect code later.
425 The convention is that secondary input reloads are valid only if the
426 secondary_class is different from class. If you have such a case, you
427 can not use secondary reloads, you must work around the problem some
430 Allow this when a reload_in/out pattern is being used. I.e. assume
431 that the generated code handles this case. */
433 gcc_assert (!in_p || rclass != reload_class || icode != CODE_FOR_nothing
434 || t_icode != CODE_FOR_nothing);
436 /* See if we can reuse an existing secondary reload. */
437 for (s_reload = 0; s_reload < n_reloads; s_reload++)
438 if (rld[s_reload].secondary_p
439 && (reg_class_subset_p (rclass, rld[s_reload].rclass)
440 || reg_class_subset_p (rld[s_reload].rclass, rclass))
441 && ((in_p && rld[s_reload].inmode == mode)
442 || (! in_p && rld[s_reload].outmode == mode))
443 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
444 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
445 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
446 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
447 && (small_register_class_p (rclass)
448 || targetm.small_register_classes_for_mode_p (VOIDmode))
449 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
450 opnum, rld[s_reload].opnum))
453 rld[s_reload].inmode = mode;
455 rld[s_reload].outmode = mode;
457 if (reg_class_subset_p (rclass, rld[s_reload].rclass))
458 rld[s_reload].rclass = rclass;
460 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
461 rld[s_reload].optional &= optional;
462 rld[s_reload].secondary_p = 1;
463 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
464 opnum, rld[s_reload].opnum))
465 rld[s_reload].when_needed = RELOAD_OTHER;
470 if (s_reload == n_reloads)
472 #ifdef SECONDARY_MEMORY_NEEDED
473 /* If we need a memory location to copy between the two reload regs,
474 set it up now. Note that we do the input case before making
475 the reload and the output case after. This is due to the
476 way reloads are output. */
478 if (in_p && icode == CODE_FOR_nothing
479 && SECONDARY_MEMORY_NEEDED (rclass, reload_class, mode))
481 get_secondary_mem (x, reload_mode, opnum, type);
483 /* We may have just added new reloads. Make sure we add
484 the new reload at the end. */
485 s_reload = n_reloads;
489 /* We need to make a new secondary reload for this register class. */
490 rld[s_reload].in = rld[s_reload].out = 0;
491 rld[s_reload].rclass = rclass;
493 rld[s_reload].inmode = in_p ? mode : VOIDmode;
494 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
495 rld[s_reload].reg_rtx = 0;
496 rld[s_reload].optional = optional;
497 rld[s_reload].inc = 0;
498 /* Maybe we could combine these, but it seems too tricky. */
499 rld[s_reload].nocombine = 1;
500 rld[s_reload].in_reg = 0;
501 rld[s_reload].out_reg = 0;
502 rld[s_reload].opnum = opnum;
503 rld[s_reload].when_needed = secondary_type;
504 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
505 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
506 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
507 rld[s_reload].secondary_out_icode
508 = ! in_p ? t_icode : CODE_FOR_nothing;
509 rld[s_reload].secondary_p = 1;
513 #ifdef SECONDARY_MEMORY_NEEDED
514 if (! in_p && icode == CODE_FOR_nothing
515 && SECONDARY_MEMORY_NEEDED (reload_class, rclass, mode))
516 get_secondary_mem (x, mode, opnum, type);
524 /* If a secondary reload is needed, return its class. If both an intermediate
525 register and a scratch register is needed, we return the class of the
526 intermediate register. */
528 secondary_reload_class (bool in_p, reg_class_t rclass, enum machine_mode mode,
531 enum insn_code icode;
532 secondary_reload_info sri;
534 sri.icode = CODE_FOR_nothing;
537 = (enum reg_class) targetm.secondary_reload (in_p, x, rclass, mode, &sri);
538 icode = (enum insn_code) sri.icode;
540 /* If there are no secondary reloads at all, we return NO_REGS.
541 If an intermediate register is needed, we return its class. */
542 if (icode == CODE_FOR_nothing || rclass != NO_REGS)
545 /* No intermediate register is needed, but we have a special reload
546 pattern, which we assume for now needs a scratch register. */
547 return scratch_reload_class (icode);
550 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
551 three operands, verify that operand 2 is an output operand, and return
553 ??? We'd like to be able to handle any pattern with at least 2 operands,
554 for zero or more scratch registers, but that needs more infrastructure. */
556 scratch_reload_class (enum insn_code icode)
558 const char *scratch_constraint;
560 enum reg_class rclass;
562 gcc_assert (insn_data[(int) icode].n_operands == 3);
563 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
564 gcc_assert (*scratch_constraint == '=');
565 scratch_constraint++;
566 if (*scratch_constraint == '&')
567 scratch_constraint++;
568 scratch_letter = *scratch_constraint;
569 if (scratch_letter == 'r')
571 rclass = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
573 gcc_assert (rclass != NO_REGS);
577 #ifdef SECONDARY_MEMORY_NEEDED
579 /* Return a memory location that will be used to copy X in mode MODE.
580 If we haven't already made a location for this mode in this insn,
581 call find_reloads_address on the location being returned. */
584 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
585 int opnum, enum reload_type type)
590 /* By default, if MODE is narrower than a word, widen it to a word.
591 This is required because most machines that require these memory
592 locations do not support short load and stores from all registers
593 (e.g., FP registers). */
595 #ifdef SECONDARY_MEMORY_NEEDED_MODE
596 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
598 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
599 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
602 /* If we already have made a MEM for this operand in MODE, return it. */
603 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
604 return secondary_memlocs_elim[(int) mode][opnum];
606 /* If this is the first time we've tried to get a MEM for this mode,
607 allocate a new one. `something_changed' in reload will get set
608 by noticing that the frame size has changed. */
610 if (secondary_memlocs[(int) mode] == 0)
612 #ifdef SECONDARY_MEMORY_NEEDED_RTX
613 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
615 secondary_memlocs[(int) mode]
616 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
620 /* Get a version of the address doing any eliminations needed. If that
621 didn't give us a new MEM, make a new one if it isn't valid. */
623 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
624 mem_valid = strict_memory_address_addr_space_p (mode, XEXP (loc, 0),
625 MEM_ADDR_SPACE (loc));
627 if (! mem_valid && loc == secondary_memlocs[(int) mode])
628 loc = copy_rtx (loc);
630 /* The only time the call below will do anything is if the stack
631 offset is too large. In that case IND_LEVELS doesn't matter, so we
632 can just pass a zero. Adjust the type to be the address of the
633 corresponding object. If the address was valid, save the eliminated
634 address. If it wasn't valid, we need to make a reload each time, so
639 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
640 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
643 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
647 secondary_memlocs_elim[(int) mode][opnum] = loc;
648 if (secondary_memlocs_elim_used <= (int)mode)
649 secondary_memlocs_elim_used = (int)mode + 1;
653 /* Clear any secondary memory locations we've made. */
656 clear_secondary_mem (void)
658 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
660 #endif /* SECONDARY_MEMORY_NEEDED */
663 /* Find the largest class which has at least one register valid in
664 mode INNER, and which for every such register, that register number
665 plus N is also valid in OUTER (if in range) and is cheap to move
666 into REGNO. Such a class must exist. */
668 static enum reg_class
669 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
670 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
671 unsigned int dest_regno ATTRIBUTE_UNUSED)
676 enum reg_class best_class = NO_REGS;
677 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
678 unsigned int best_size = 0;
681 for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
685 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
686 if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno))
688 if (HARD_REGNO_MODE_OK (regno, inner))
691 if (! TEST_HARD_REG_BIT (reg_class_contents[rclass], regno + n)
692 || ! HARD_REGNO_MODE_OK (regno + n, outer))
699 cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);
701 if ((reg_class_size[rclass] > best_size
702 && (best_cost < 0 || best_cost >= cost))
705 best_class = (enum reg_class) rclass;
706 best_size = reg_class_size[rclass];
707 best_cost = register_move_cost (outer, (enum reg_class) rclass,
712 gcc_assert (best_size != 0);
717 /* Return the number of a previously made reload that can be combined with
718 a new one, or n_reloads if none of the existing reloads can be used.
719 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
720 push_reload, they determine the kind of the new reload that we try to
721 combine. P_IN points to the corresponding value of IN, which can be
722 modified by this function.
723 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
726 find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
727 enum reload_type type, int opnum, int dont_share)
731 /* We can't merge two reloads if the output of either one is
734 if (earlyclobber_operand_p (out))
737 /* We can use an existing reload if the class is right
738 and at least one of IN and OUT is a match
739 and the other is at worst neutral.
740 (A zero compared against anything is neutral.)
742 For targets with small register classes, don't use existing reloads
743 unless they are for the same thing since that can cause us to need
744 more reload registers than we otherwise would. */
746 for (i = 0; i < n_reloads; i++)
747 if ((reg_class_subset_p (rclass, rld[i].rclass)
748 || reg_class_subset_p (rld[i].rclass, rclass))
749 /* If the existing reload has a register, it must fit our class. */
750 && (rld[i].reg_rtx == 0
751 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
752 true_regnum (rld[i].reg_rtx)))
753 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
754 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
755 || (out != 0 && MATCHES (rld[i].out, out)
756 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
757 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
758 && (small_register_class_p (rclass)
759 || targetm.small_register_classes_for_mode_p (VOIDmode))
760 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
763 /* Reloading a plain reg for input can match a reload to postincrement
764 that reg, since the postincrement's value is the right value.
765 Likewise, it can match a preincrement reload, since we regard
766 the preincrementation as happening before any ref in this insn
768 for (i = 0; i < n_reloads; i++)
769 if ((reg_class_subset_p (rclass, rld[i].rclass)
770 || reg_class_subset_p (rld[i].rclass, rclass))
771 /* If the existing reload has a register, it must fit our
773 && (rld[i].reg_rtx == 0
774 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
775 true_regnum (rld[i].reg_rtx)))
776 && out == 0 && rld[i].out == 0 && rld[i].in != 0
778 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
779 && MATCHES (XEXP (rld[i].in, 0), in))
780 || (REG_P (rld[i].in)
781 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
782 && MATCHES (XEXP (in, 0), rld[i].in)))
783 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
784 && (small_register_class_p (rclass)
785 || targetm.small_register_classes_for_mode_p (VOIDmode))
786 && MERGABLE_RELOADS (type, rld[i].when_needed,
787 opnum, rld[i].opnum))
789 /* Make sure reload_in ultimately has the increment,
790 not the plain register. */
798 /* Return nonzero if X is a SUBREG which will require reloading of its
799 SUBREG_REG expression. */
802 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
806 /* Only SUBREGs are problematical. */
807 if (GET_CODE (x) != SUBREG)
810 inner = SUBREG_REG (x);
812 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
813 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
816 /* If INNER is not a hard register, then INNER will not need to
819 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
822 /* If INNER is not ok for MODE, then INNER will need reloading. */
823 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
826 /* If the outer part is a word or smaller, INNER larger than a
827 word and the number of regs for INNER is not the same as the
828 number of words in INNER, then INNER will need reloading. */
829 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
831 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
832 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
833 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
836 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
837 requiring an extra reload register. The caller has already found that
838 IN contains some reference to REGNO, so check that we can produce the
839 new value in a single step. E.g. if we have
840 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
841 instruction that adds one to a register, this should succeed.
842 However, if we have something like
843 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
844 needs to be loaded into a register first, we need a separate reload
846 Such PLUS reloads are generated by find_reload_address_part.
847 The out-of-range PLUS expressions are usually introduced in the instruction
848 patterns by register elimination and substituting pseudos without a home
849 by their function-invariant equivalences. */
851 can_reload_into (rtx in, int regno, enum machine_mode mode)
855 struct recog_data save_recog_data;
857 /* For matching constraints, we often get notional input reloads where
858 we want to use the original register as the reload register. I.e.
859 technically this is a non-optional input-output reload, but IN is
860 already a valid register, and has been chosen as the reload register.
861 Speed this up, since it trivially works. */
865 /* To test MEMs properly, we'd have to take into account all the reloads
866 that are already scheduled, which can become quite complicated.
867 And since we've already handled address reloads for this MEM, it
868 should always succeed anyway. */
872 /* If we can make a simple SET insn that does the job, everything should
874 dst = gen_rtx_REG (mode, regno);
875 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
876 save_recog_data = recog_data;
877 if (recog_memoized (test_insn) >= 0)
879 extract_insn (test_insn);
880 r = constrain_operands (1);
882 recog_data = save_recog_data;
886 /* Record one reload that needs to be performed.
887 IN is an rtx saying where the data are to be found before this instruction.
888 OUT says where they must be stored after the instruction.
889 (IN is zero for data not read, and OUT is zero for data not written.)
890 INLOC and OUTLOC point to the places in the instructions where
891 IN and OUT were found.
892 If IN and OUT are both nonzero, it means the same register must be used
893 to reload both IN and OUT.
895 RCLASS is a register class required for the reloaded data.
896 INMODE is the machine mode that the instruction requires
897 for the reg that replaces IN and OUTMODE is likewise for OUT.
899 If IN is zero, then OUT's location and mode should be passed as
902 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
904 OPTIONAL nonzero means this reload does not need to be performed:
905 it can be discarded if that is more convenient.
907 OPNUM and TYPE say what the purpose of this reload is.
909 The return value is the reload-number for this reload.
911 If both IN and OUT are nonzero, in some rare cases we might
912 want to make two separate reloads. (Actually we never do this now.)
913 Therefore, the reload-number for OUT is stored in
914 output_reloadnum when we return; the return value applies to IN.
915 Usually (presently always), when IN and OUT are nonzero,
916 the two reload-numbers are equal, but the caller should be careful to
920 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
921 enum reg_class rclass, enum machine_mode inmode,
922 enum machine_mode outmode, int strict_low, int optional,
923 int opnum, enum reload_type type)
927 int dont_remove_subreg = 0;
928 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
929 int secondary_in_reload = -1, secondary_out_reload = -1;
930 enum insn_code secondary_in_icode = CODE_FOR_nothing;
931 enum insn_code secondary_out_icode = CODE_FOR_nothing;
933 /* INMODE and/or OUTMODE could be VOIDmode if no mode
934 has been specified for the operand. In that case,
935 use the operand's mode as the mode to reload. */
936 if (inmode == VOIDmode && in != 0)
937 inmode = GET_MODE (in);
938 if (outmode == VOIDmode && out != 0)
939 outmode = GET_MODE (out);
941 /* If find_reloads and friends until now missed to replace a pseudo
942 with a constant of reg_equiv_constant something went wrong
944 Note that it can't simply be done here if we missed it earlier
945 since the constant might need to be pushed into the literal pool
946 and the resulting memref would probably need further
948 if (in != 0 && REG_P (in))
950 int regno = REGNO (in);
952 gcc_assert (regno < FIRST_PSEUDO_REGISTER
953 || reg_renumber[regno] >= 0
954 || reg_equiv_constant (regno) == NULL_RTX);
957 /* reg_equiv_constant only contains constants which are obviously
958 not appropriate as destination. So if we would need to replace
959 the destination pseudo with a constant we are in real
961 if (out != 0 && REG_P (out))
963 int regno = REGNO (out);
965 gcc_assert (regno < FIRST_PSEUDO_REGISTER
966 || reg_renumber[regno] >= 0
967 || reg_equiv_constant (regno) == NULL_RTX);
970 /* If we have a read-write operand with an address side-effect,
971 change either IN or OUT so the side-effect happens only once. */
972 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
973 switch (GET_CODE (XEXP (in, 0)))
975 case POST_INC: case POST_DEC: case POST_MODIFY:
976 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
979 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
980 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
987 /* If we are reloading a (SUBREG constant ...), really reload just the
988 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
989 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
990 a pseudo and hence will become a MEM) with M1 wider than M2 and the
991 register is a pseudo, also reload the inside expression.
992 For machines that extend byte loads, do this for any SUBREG of a pseudo
993 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
994 M2 is an integral mode that gets extended when loaded.
995 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
996 either M1 is not valid for R or M2 is wider than a word but we only
997 need one word to store an M2-sized quantity in R.
998 (However, if OUT is nonzero, we need to reload the reg *and*
999 the subreg, so do nothing here, and let following statement handle it.)
1001 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1002 we can't handle it here because CONST_INT does not indicate a mode.
1004 Similarly, we must reload the inside expression if we have a
1005 STRICT_LOW_PART (presumably, in == out in this case).
1007 Also reload the inner expression if it does not require a secondary
1008 reload but the SUBREG does.
1010 Finally, reload the inner expression if it is a register that is in
1011 the class whose registers cannot be referenced in a different size
1012 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1013 cannot reload just the inside since we might end up with the wrong
1014 register class. But if it is inside a STRICT_LOW_PART, we have
1015 no choice, so we hope we do get the right register class there. */
1017 if (in != 0 && GET_CODE (in) == SUBREG
1018 && (subreg_lowpart_p (in) || strict_low)
1019 #ifdef CANNOT_CHANGE_MODE_CLASS
1020 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass)
1022 && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (in))]
1023 && (CONSTANT_P (SUBREG_REG (in))
1024 || GET_CODE (SUBREG_REG (in)) == PLUS
1026 || (((REG_P (SUBREG_REG (in))
1027 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1028 || MEM_P (SUBREG_REG (in)))
1029 && ((GET_MODE_SIZE (inmode)
1030 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1031 #ifdef LOAD_EXTEND_OP
1032 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1033 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1035 && (GET_MODE_SIZE (inmode)
1036 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1037 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1038 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1040 #ifdef WORD_REGISTER_OPERATIONS
1041 || ((GET_MODE_SIZE (inmode)
1042 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1043 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1044 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1048 || (REG_P (SUBREG_REG (in))
1049 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1050 /* The case where out is nonzero
1051 is handled differently in the following statement. */
1052 && (out == 0 || subreg_lowpart_p (in))
1053 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1054 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1056 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1058 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1059 [GET_MODE (SUBREG_REG (in))]))
1060 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1061 || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS
1062 && (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)),
1065 #ifdef CANNOT_CHANGE_MODE_CLASS
1066 || (REG_P (SUBREG_REG (in))
1067 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1068 && REG_CANNOT_CHANGE_MODE_P
1069 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1073 in_subreg_loc = inloc;
1074 inloc = &SUBREG_REG (in);
1076 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1078 /* This is supposed to happen only for paradoxical subregs made by
1079 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1080 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1082 inmode = GET_MODE (in);
1085 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1086 either M1 is not valid for R or M2 is wider than a word but we only
1087 need one word to store an M2-sized quantity in R.
1089 However, we must reload the inner reg *as well as* the subreg in
1092 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1093 code above. This can happen if SUBREG_BYTE != 0. */
1095 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1097 enum reg_class in_class = rclass;
1099 if (REG_P (SUBREG_REG (in)))
1101 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1102 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1103 GET_MODE (SUBREG_REG (in)),
1106 REGNO (SUBREG_REG (in)));
1108 /* This relies on the fact that emit_reload_insns outputs the
1109 instructions for input reloads of type RELOAD_OTHER in the same
1110 order as the reloads. Thus if the outer reload is also of type
1111 RELOAD_OTHER, we are guaranteed that this inner reload will be
1112 output before the outer reload. */
1113 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1114 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1115 dont_remove_subreg = 1;
1118 /* Similarly for paradoxical and problematical SUBREGs on the output.
1119 Note that there is no reason we need worry about the previous value
1120 of SUBREG_REG (out); even if wider than out,
1121 storing in a subreg is entitled to clobber it all
1122 (except in the case of STRICT_LOW_PART,
1123 and in that case the constraint should label it input-output.) */
1124 if (out != 0 && GET_CODE (out) == SUBREG
1125 && (subreg_lowpart_p (out) || strict_low)
1126 #ifdef CANNOT_CHANGE_MODE_CLASS
1127 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass)
1129 && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (out))]
1130 && (CONSTANT_P (SUBREG_REG (out))
1132 || (((REG_P (SUBREG_REG (out))
1133 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1134 || MEM_P (SUBREG_REG (out)))
1135 && ((GET_MODE_SIZE (outmode)
1136 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1137 #ifdef WORD_REGISTER_OPERATIONS
1138 || ((GET_MODE_SIZE (outmode)
1139 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1140 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1141 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1145 || (REG_P (SUBREG_REG (out))
1146 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1147 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1148 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1150 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1152 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1153 [GET_MODE (SUBREG_REG (out))]))
1154 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1155 || (secondary_reload_class (0, rclass, outmode, out) != NO_REGS
1156 && (secondary_reload_class (0, rclass, GET_MODE (SUBREG_REG (out)),
1159 #ifdef CANNOT_CHANGE_MODE_CLASS
1160 || (REG_P (SUBREG_REG (out))
1161 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1162 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1163 GET_MODE (SUBREG_REG (out)),
1168 out_subreg_loc = outloc;
1169 outloc = &SUBREG_REG (out);
1171 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1172 gcc_assert (!MEM_P (out)
1173 || GET_MODE_SIZE (GET_MODE (out))
1174 <= GET_MODE_SIZE (outmode));
1176 outmode = GET_MODE (out);
1179 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1180 either M1 is not valid for R or M2 is wider than a word but we only
1181 need one word to store an M2-sized quantity in R.
1183 However, we must reload the inner reg *as well as* the subreg in
1184 that case. In this case, the inner reg is an in-out reload. */
1186 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1188 /* This relies on the fact that emit_reload_insns outputs the
1189 instructions for output reloads of type RELOAD_OTHER in reverse
1190 order of the reloads. Thus if the outer reload is also of type
1191 RELOAD_OTHER, we are guaranteed that this inner reload will be
1192 output after the outer reload. */
1193 dont_remove_subreg = 1;
1194 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1196 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1197 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1198 GET_MODE (SUBREG_REG (out)),
1201 REGNO (SUBREG_REG (out))),
1202 VOIDmode, VOIDmode, 0, 0,
1203 opnum, RELOAD_OTHER);
1206 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1207 if (in != 0 && out != 0 && MEM_P (out)
1208 && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1209 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1212 /* If IN is a SUBREG of a hard register, make a new REG. This
1213 simplifies some of the cases below. */
1215 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1216 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1217 && ! dont_remove_subreg)
1218 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1220 /* Similarly for OUT. */
1221 if (out != 0 && GET_CODE (out) == SUBREG
1222 && REG_P (SUBREG_REG (out))
1223 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1224 && ! dont_remove_subreg)
1225 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1227 /* Narrow down the class of register wanted if that is
1228 desirable on this machine for efficiency. */
1230 reg_class_t preferred_class = rclass;
1233 preferred_class = targetm.preferred_reload_class (in, rclass);
1235 /* Output reloads may need analogous treatment, different in detail. */
1238 = targetm.preferred_output_reload_class (out, preferred_class);
1240 /* Discard what the target said if we cannot do it. */
1241 if (preferred_class != NO_REGS
1242 || (optional && type == RELOAD_FOR_OUTPUT))
1243 rclass = (enum reg_class) preferred_class;
1246 /* Make sure we use a class that can handle the actual pseudo
1247 inside any subreg. For example, on the 386, QImode regs
1248 can appear within SImode subregs. Although GENERAL_REGS
1249 can handle SImode, QImode needs a smaller class. */
1250 #ifdef LIMIT_RELOAD_CLASS
1252 rclass = LIMIT_RELOAD_CLASS (inmode, rclass);
1253 else if (in != 0 && GET_CODE (in) == SUBREG)
1254 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), rclass);
1257 rclass = LIMIT_RELOAD_CLASS (outmode, rclass);
1258 if (out != 0 && GET_CODE (out) == SUBREG)
1259 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), rclass);
1262 /* Verify that this class is at least possible for the mode that
1264 if (this_insn_is_asm)
1266 enum machine_mode mode;
1267 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1271 if (mode == VOIDmode)
1273 error_for_asm (this_insn, "cannot reload integer constant "
1274 "operand in %<asm%>");
1279 outmode = word_mode;
1281 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1282 if (HARD_REGNO_MODE_OK (i, mode)
1283 && in_hard_reg_set_p (reg_class_contents[(int) rclass], mode, i))
1285 if (i == FIRST_PSEUDO_REGISTER)
1287 error_for_asm (this_insn, "impossible register constraint "
1289 /* Avoid further trouble with this insn. */
1290 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1291 /* We used to continue here setting class to ALL_REGS, but it triggers
1292 sanity check on i386 for:
1293 void foo(long double d)
1297 Returning zero here ought to be safe as we take care in
1298 find_reloads to not process the reloads when instruction was
1305 /* Optional output reloads are always OK even if we have no register class,
1306 since the function of these reloads is only to have spill_reg_store etc.
1307 set, so that the storing insn can be deleted later. */
1308 gcc_assert (rclass != NO_REGS
1309 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1311 i = find_reusable_reload (&in, out, rclass, type, opnum, dont_share);
1315 /* See if we need a secondary reload register to move between CLASS
1316 and IN or CLASS and OUT. Get the icode and push any required reloads
1317 needed for each of them if so. */
1321 = push_secondary_reload (1, in, opnum, optional, rclass, inmode, type,
1322 &secondary_in_icode, NULL);
1323 if (out != 0 && GET_CODE (out) != SCRATCH)
1324 secondary_out_reload
1325 = push_secondary_reload (0, out, opnum, optional, rclass, outmode,
1326 type, &secondary_out_icode, NULL);
1328 /* We found no existing reload suitable for re-use.
1329 So add an additional reload. */
1331 #ifdef SECONDARY_MEMORY_NEEDED
1332 /* If a memory location is needed for the copy, make one. */
1335 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1336 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1337 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1339 get_secondary_mem (in, inmode, opnum, type);
1345 rld[i].rclass = rclass;
1346 rld[i].inmode = inmode;
1347 rld[i].outmode = outmode;
1349 rld[i].optional = optional;
1351 rld[i].nocombine = 0;
1352 rld[i].in_reg = inloc ? *inloc : 0;
1353 rld[i].out_reg = outloc ? *outloc : 0;
1354 rld[i].opnum = opnum;
1355 rld[i].when_needed = type;
1356 rld[i].secondary_in_reload = secondary_in_reload;
1357 rld[i].secondary_out_reload = secondary_out_reload;
1358 rld[i].secondary_in_icode = secondary_in_icode;
1359 rld[i].secondary_out_icode = secondary_out_icode;
1360 rld[i].secondary_p = 0;
1364 #ifdef SECONDARY_MEMORY_NEEDED
1367 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1368 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1369 && SECONDARY_MEMORY_NEEDED (rclass,
1370 REGNO_REG_CLASS (reg_or_subregno (out)),
1372 get_secondary_mem (out, outmode, opnum, type);
1377 /* We are reusing an existing reload,
1378 but we may have additional information for it.
1379 For example, we may now have both IN and OUT
1380 while the old one may have just one of them. */
1382 /* The modes can be different. If they are, we want to reload in
1383 the larger mode, so that the value is valid for both modes. */
1384 if (inmode != VOIDmode
1385 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1386 rld[i].inmode = inmode;
1387 if (outmode != VOIDmode
1388 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1389 rld[i].outmode = outmode;
1392 rtx in_reg = inloc ? *inloc : 0;
1393 /* If we merge reloads for two distinct rtl expressions that
1394 are identical in content, there might be duplicate address
1395 reloads. Remove the extra set now, so that if we later find
1396 that we can inherit this reload, we can get rid of the
1397 address reloads altogether.
1399 Do not do this if both reloads are optional since the result
1400 would be an optional reload which could potentially leave
1401 unresolved address replacements.
1403 It is not sufficient to call transfer_replacements since
1404 choose_reload_regs will remove the replacements for address
1405 reloads of inherited reloads which results in the same
1407 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1408 && ! (rld[i].optional && optional))
1410 /* We must keep the address reload with the lower operand
1412 if (opnum > rld[i].opnum)
1414 remove_address_replacements (in);
1416 in_reg = rld[i].in_reg;
1419 remove_address_replacements (rld[i].in);
1421 /* When emitting reloads we don't necessarily look at the in-
1422 and outmode, but also directly at the operands (in and out).
1423 So we can't simply overwrite them with whatever we have found
1424 for this (to-be-merged) reload, we have to "merge" that too.
1425 Reusing another reload already verified that we deal with the
1426 same operands, just possibly in different modes. So we
1427 overwrite the operands only when the new mode is larger.
1428 See also PR33613. */
1430 || GET_MODE_SIZE (GET_MODE (in))
1431 > GET_MODE_SIZE (GET_MODE (rld[i].in)))
1435 && GET_MODE_SIZE (GET_MODE (in_reg))
1436 > GET_MODE_SIZE (GET_MODE (rld[i].in_reg))))
1437 rld[i].in_reg = in_reg;
1443 && GET_MODE_SIZE (GET_MODE (out))
1444 > GET_MODE_SIZE (GET_MODE (rld[i].out))))
1448 || GET_MODE_SIZE (GET_MODE (*outloc))
1449 > GET_MODE_SIZE (GET_MODE (rld[i].out_reg))))
1450 rld[i].out_reg = *outloc;
1452 if (reg_class_subset_p (rclass, rld[i].rclass))
1453 rld[i].rclass = rclass;
1454 rld[i].optional &= optional;
1455 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1456 opnum, rld[i].opnum))
1457 rld[i].when_needed = RELOAD_OTHER;
1458 rld[i].opnum = MIN (rld[i].opnum, opnum);
1461 /* If the ostensible rtx being reloaded differs from the rtx found
1462 in the location to substitute, this reload is not safe to combine
1463 because we cannot reliably tell whether it appears in the insn. */
1465 if (in != 0 && in != *inloc)
1466 rld[i].nocombine = 1;
1469 /* This was replaced by changes in find_reloads_address_1 and the new
1470 function inc_for_reload, which go with a new meaning of reload_inc. */
1472 /* If this is an IN/OUT reload in an insn that sets the CC,
1473 it must be for an autoincrement. It doesn't work to store
1474 the incremented value after the insn because that would clobber the CC.
1475 So we must do the increment of the value reloaded from,
1476 increment it, store it back, then decrement again. */
1477 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1481 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1482 /* If we did not find a nonzero amount-to-increment-by,
1483 that contradicts the belief that IN is being incremented
1484 in an address in this insn. */
1485 gcc_assert (rld[i].inc != 0);
1489 /* If we will replace IN and OUT with the reload-reg,
1490 record where they are located so that substitution need
1491 not do a tree walk. */
1493 if (replace_reloads)
1497 struct replacement *r = &replacements[n_replacements++];
1499 r->subreg_loc = in_subreg_loc;
1503 if (outloc != 0 && outloc != inloc)
1505 struct replacement *r = &replacements[n_replacements++];
1508 r->subreg_loc = out_subreg_loc;
1513 /* If this reload is just being introduced and it has both
1514 an incoming quantity and an outgoing quantity that are
1515 supposed to be made to match, see if either one of the two
1516 can serve as the place to reload into.
1518 If one of them is acceptable, set rld[i].reg_rtx
1521 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1523 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1526 earlyclobber_operand_p (out));
1528 /* If the outgoing register already contains the same value
1529 as the incoming one, we can dispense with loading it.
1530 The easiest way to tell the caller that is to give a phony
1531 value for the incoming operand (same as outgoing one). */
1532 if (rld[i].reg_rtx == out
1533 && (REG_P (in) || CONSTANT_P (in))
1534 && 0 != find_equiv_reg (in, this_insn, NO_REGS, REGNO (out),
1535 static_reload_reg_p, i, inmode))
1539 /* If this is an input reload and the operand contains a register that
1540 dies in this insn and is used nowhere else, see if it is the right class
1541 to be used for this reload. Use it if so. (This occurs most commonly
1542 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1543 this if it is also an output reload that mentions the register unless
1544 the output is a SUBREG that clobbers an entire register.
1546 Note that the operand might be one of the spill regs, if it is a
1547 pseudo reg and we are in a block where spilling has not taken place.
1548 But if there is no spilling in this block, that is OK.
1549 An explicitly used hard reg cannot be a spill reg. */
1551 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1555 enum machine_mode rel_mode = inmode;
1557 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1560 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1561 if (REG_NOTE_KIND (note) == REG_DEAD
1562 && REG_P (XEXP (note, 0))
1563 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1564 && reg_mentioned_p (XEXP (note, 0), in)
1565 /* Check that a former pseudo is valid; see find_dummy_reload. */
1566 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1567 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1568 ORIGINAL_REGNO (XEXP (note, 0)))
1569 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1))
1570 && ! refers_to_regno_for_reload_p (regno,
1571 end_hard_regno (rel_mode,
1573 PATTERN (this_insn), inloc)
1574 /* If this is also an output reload, IN cannot be used as
1575 the reload register if it is set in this insn unless IN
1577 && (out == 0 || in == out
1578 || ! hard_reg_set_here_p (regno,
1579 end_hard_regno (rel_mode, regno),
1580 PATTERN (this_insn)))
1581 /* ??? Why is this code so different from the previous?
1582 Is there any simple coherent way to describe the two together?
1583 What's going on here. */
1585 || (GET_CODE (in) == SUBREG
1586 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1588 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1589 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1590 /* Make sure the operand fits in the reg that dies. */
1591 && (GET_MODE_SIZE (rel_mode)
1592 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1593 && HARD_REGNO_MODE_OK (regno, inmode)
1594 && HARD_REGNO_MODE_OK (regno, outmode))
1597 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1598 hard_regno_nregs[regno][outmode]);
1600 for (offs = 0; offs < nregs; offs++)
1601 if (fixed_regs[regno + offs]
1602 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1607 && (! (refers_to_regno_for_reload_p
1608 (regno, end_hard_regno (inmode, regno), in, (rtx *) 0))
1609 || can_reload_into (in, regno, inmode)))
1611 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1618 output_reloadnum = i;
1623 /* Record an additional place we must replace a value
1624 for which we have already recorded a reload.
1625 RELOADNUM is the value returned by push_reload
1626 when the reload was recorded.
1627 This is used in insn patterns that use match_dup. */
1630 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1632 if (replace_reloads)
1634 struct replacement *r = &replacements[n_replacements++];
1635 r->what = reloadnum;
1642 /* Duplicate any replacement we have recorded to apply at
1643 location ORIG_LOC to also be performed at DUP_LOC.
1644 This is used in insn patterns that use match_dup. */
1647 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1649 int i, n = n_replacements;
1651 for (i = 0; i < n; i++)
1653 struct replacement *r = &replacements[i];
1654 if (r->where == orig_loc)
1655 push_replacement (dup_loc, r->what, r->mode);
1659 /* Transfer all replacements that used to be in reload FROM to be in
1663 transfer_replacements (int to, int from)
1667 for (i = 0; i < n_replacements; i++)
1668 if (replacements[i].what == from)
1669 replacements[i].what = to;
1672 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1673 or a subpart of it. If we have any replacements registered for IN_RTX,
1674 cancel the reloads that were supposed to load them.
1675 Return nonzero if we canceled any reloads. */
1677 remove_address_replacements (rtx in_rtx)
1680 char reload_flags[MAX_RELOADS];
1681 int something_changed = 0;
1683 memset (reload_flags, 0, sizeof reload_flags);
1684 for (i = 0, j = 0; i < n_replacements; i++)
1686 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1687 reload_flags[replacements[i].what] |= 1;
1690 replacements[j++] = replacements[i];
1691 reload_flags[replacements[i].what] |= 2;
1694 /* Note that the following store must be done before the recursive calls. */
1697 for (i = n_reloads - 1; i >= 0; i--)
1699 if (reload_flags[i] == 1)
1701 deallocate_reload_reg (i);
1702 remove_address_replacements (rld[i].in);
1704 something_changed = 1;
1707 return something_changed;
1710 /* If there is only one output reload, and it is not for an earlyclobber
1711 operand, try to combine it with a (logically unrelated) input reload
1712 to reduce the number of reload registers needed.
1714 This is safe if the input reload does not appear in
1715 the value being output-reloaded, because this implies
1716 it is not needed any more once the original insn completes.
1718 If that doesn't work, see we can use any of the registers that
1719 die in this insn as a reload register. We can if it is of the right
1720 class and does not appear in the value being output-reloaded. */
1723 combine_reloads (void)
1726 int output_reload = -1;
1727 int secondary_out = -1;
1730 /* Find the output reload; return unless there is exactly one
1731 and that one is mandatory. */
1733 for (i = 0; i < n_reloads; i++)
1734 if (rld[i].out != 0)
1736 if (output_reload >= 0)
1741 if (output_reload < 0 || rld[output_reload].optional)
1744 /* An input-output reload isn't combinable. */
1746 if (rld[output_reload].in != 0)
1749 /* If this reload is for an earlyclobber operand, we can't do anything. */
1750 if (earlyclobber_operand_p (rld[output_reload].out))
1753 /* If there is a reload for part of the address of this operand, we would
1754 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1755 its life to the point where doing this combine would not lower the
1756 number of spill registers needed. */
1757 for (i = 0; i < n_reloads; i++)
1758 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1759 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1760 && rld[i].opnum == rld[output_reload].opnum)
1763 /* Check each input reload; can we combine it? */
1765 for (i = 0; i < n_reloads; i++)
1766 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1767 /* Life span of this reload must not extend past main insn. */
1768 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1769 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1770 && rld[i].when_needed != RELOAD_OTHER
1771 && (CLASS_MAX_NREGS (rld[i].rclass, rld[i].inmode)
1772 == CLASS_MAX_NREGS (rld[output_reload].rclass,
1773 rld[output_reload].outmode))
1775 && rld[i].reg_rtx == 0
1776 #ifdef SECONDARY_MEMORY_NEEDED
1777 /* Don't combine two reloads with different secondary
1778 memory locations. */
1779 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1780 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1781 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1782 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1784 && (targetm.small_register_classes_for_mode_p (VOIDmode)
1785 ? (rld[i].rclass == rld[output_reload].rclass)
1786 : (reg_class_subset_p (rld[i].rclass,
1787 rld[output_reload].rclass)
1788 || reg_class_subset_p (rld[output_reload].rclass,
1790 && (MATCHES (rld[i].in, rld[output_reload].out)
1791 /* Args reversed because the first arg seems to be
1792 the one that we imagine being modified
1793 while the second is the one that might be affected. */
1794 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1796 /* However, if the input is a register that appears inside
1797 the output, then we also can't share.
1798 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1799 If the same reload reg is used for both reg 69 and the
1800 result to be stored in memory, then that result
1801 will clobber the address of the memory ref. */
1802 && ! (REG_P (rld[i].in)
1803 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1804 rld[output_reload].out))))
1805 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1806 rld[i].when_needed != RELOAD_FOR_INPUT)
1807 && (reg_class_size[(int) rld[i].rclass]
1808 || targetm.small_register_classes_for_mode_p (VOIDmode))
1809 /* We will allow making things slightly worse by combining an
1810 input and an output, but no worse than that. */
1811 && (rld[i].when_needed == RELOAD_FOR_INPUT
1812 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1816 /* We have found a reload to combine with! */
1817 rld[i].out = rld[output_reload].out;
1818 rld[i].out_reg = rld[output_reload].out_reg;
1819 rld[i].outmode = rld[output_reload].outmode;
1820 /* Mark the old output reload as inoperative. */
1821 rld[output_reload].out = 0;
1822 /* The combined reload is needed for the entire insn. */
1823 rld[i].when_needed = RELOAD_OTHER;
1824 /* If the output reload had a secondary reload, copy it. */
1825 if (rld[output_reload].secondary_out_reload != -1)
1827 rld[i].secondary_out_reload
1828 = rld[output_reload].secondary_out_reload;
1829 rld[i].secondary_out_icode
1830 = rld[output_reload].secondary_out_icode;
1833 #ifdef SECONDARY_MEMORY_NEEDED
1834 /* Copy any secondary MEM. */
1835 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1836 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1837 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1839 /* If required, minimize the register class. */
1840 if (reg_class_subset_p (rld[output_reload].rclass,
1842 rld[i].rclass = rld[output_reload].rclass;
1844 /* Transfer all replacements from the old reload to the combined. */
1845 for (j = 0; j < n_replacements; j++)
1846 if (replacements[j].what == output_reload)
1847 replacements[j].what = i;
1852 /* If this insn has only one operand that is modified or written (assumed
1853 to be the first), it must be the one corresponding to this reload. It
1854 is safe to use anything that dies in this insn for that output provided
1855 that it does not occur in the output (we already know it isn't an
1856 earlyclobber. If this is an asm insn, give up. */
1858 if (INSN_CODE (this_insn) == -1)
1861 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1862 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1863 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1866 /* See if some hard register that dies in this insn and is not used in
1867 the output is the right class. Only works if the register we pick
1868 up can fully hold our output reload. */
1869 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1870 if (REG_NOTE_KIND (note) == REG_DEAD
1871 && REG_P (XEXP (note, 0))
1872 && !reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1873 rld[output_reload].out)
1874 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1875 && HARD_REGNO_MODE_OK (regno, rld[output_reload].outmode)
1876 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
1878 && (hard_regno_nregs[regno][rld[output_reload].outmode]
1879 <= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))])
1880 /* Ensure that a secondary or tertiary reload for this output
1881 won't want this register. */
1882 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1883 || (!(TEST_HARD_REG_BIT
1884 (reg_class_contents[(int) rld[secondary_out].rclass], regno))
1885 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1886 || !(TEST_HARD_REG_BIT
1887 (reg_class_contents[(int) rld[secondary_out].rclass],
1889 && !fixed_regs[regno]
1890 /* Check that a former pseudo is valid; see find_dummy_reload. */
1891 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1892 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1893 ORIGINAL_REGNO (XEXP (note, 0)))
1894 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1)))
1896 rld[output_reload].reg_rtx
1897 = gen_rtx_REG (rld[output_reload].outmode, regno);
1902 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1903 See if one of IN and OUT is a register that may be used;
1904 this is desirable since a spill-register won't be needed.
1905 If so, return the register rtx that proves acceptable.
1907 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1908 RCLASS is the register class required for the reload.
1910 If FOR_REAL is >= 0, it is the number of the reload,
1911 and in some cases when it can be discovered that OUT doesn't need
1912 to be computed, clear out rld[FOR_REAL].out.
1914 If FOR_REAL is -1, this should not be done, because this call
1915 is just to see if a register can be found, not to find and install it.
1917 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1918 puts an additional constraint on being able to use IN for OUT since
1919 IN must not appear elsewhere in the insn (it is assumed that IN itself
1920 is safe from the earlyclobber). */
1923 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1924 enum machine_mode inmode, enum machine_mode outmode,
1925 reg_class_t rclass, int for_real, int earlyclobber)
1933 /* If operands exceed a word, we can't use either of them
1934 unless they have the same size. */
1935 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1936 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1937 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1940 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1941 respectively refers to a hard register. */
1943 /* Find the inside of any subregs. */
1944 while (GET_CODE (out) == SUBREG)
1946 if (REG_P (SUBREG_REG (out))
1947 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1948 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1949 GET_MODE (SUBREG_REG (out)),
1952 out = SUBREG_REG (out);
1954 while (GET_CODE (in) == SUBREG)
1956 if (REG_P (SUBREG_REG (in))
1957 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1958 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1959 GET_MODE (SUBREG_REG (in)),
1962 in = SUBREG_REG (in);
1965 /* Narrow down the reg class, the same way push_reload will;
1966 otherwise we might find a dummy now, but push_reload won't. */
1968 reg_class_t preferred_class = targetm.preferred_reload_class (in, rclass);
1969 if (preferred_class != NO_REGS)
1970 rclass = (enum reg_class) preferred_class;
1973 /* See if OUT will do. */
1975 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1977 unsigned int regno = REGNO (out) + out_offset;
1978 unsigned int nwords = hard_regno_nregs[regno][outmode];
1981 /* When we consider whether the insn uses OUT,
1982 ignore references within IN. They don't prevent us
1983 from copying IN into OUT, because those refs would
1984 move into the insn that reloads IN.
1986 However, we only ignore IN in its role as this reload.
1987 If the insn uses IN elsewhere and it contains OUT,
1988 that counts. We can't be sure it's the "same" operand
1989 so it might not go through this reload. */
1991 *inloc = const0_rtx;
1993 if (regno < FIRST_PSEUDO_REGISTER
1994 && HARD_REGNO_MODE_OK (regno, outmode)
1995 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1996 PATTERN (this_insn), outloc))
2000 for (i = 0; i < nwords; i++)
2001 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2007 if (REG_P (real_out))
2010 value = gen_rtx_REG (outmode, regno);
2017 /* Consider using IN if OUT was not acceptable
2018 or if OUT dies in this insn (like the quotient in a divmod insn).
2019 We can't use IN unless it is dies in this insn,
2020 which means we must know accurately which hard regs are live.
2021 Also, the result can't go in IN if IN is used within OUT,
2022 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2023 if (hard_regs_live_known
2025 && REGNO (in) < FIRST_PSEUDO_REGISTER
2027 || find_reg_note (this_insn, REG_UNUSED, real_out))
2028 && find_reg_note (this_insn, REG_DEAD, real_in)
2029 && !fixed_regs[REGNO (in)]
2030 && HARD_REGNO_MODE_OK (REGNO (in),
2031 /* The only case where out and real_out might
2032 have different modes is where real_out
2033 is a subreg, and in that case, out
2035 (GET_MODE (out) != VOIDmode
2036 ? GET_MODE (out) : outmode))
2037 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2038 /* However only do this if we can be sure that this input
2039 operand doesn't correspond with an uninitialized pseudo.
2040 global can assign some hardreg to it that is the same as
2041 the one assigned to a different, also live pseudo (as it
2042 can ignore the conflict). We must never introduce writes
2043 to such hardregs, as they would clobber the other live
2044 pseudo. See PR 20973. */
2045 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
2046 ORIGINAL_REGNO (in))
2047 /* Similarly, only do this if we can be sure that the death
2048 note is still valid. global can assign some hardreg to
2049 the pseudo referenced in the note and simultaneously a
2050 subword of this hardreg to a different, also live pseudo,
2051 because only another subword of the hardreg is actually
2052 used in the insn. This cannot happen if the pseudo has
2053 been assigned exactly one hardreg. See PR 33732. */
2054 && hard_regno_nregs[REGNO (in)][GET_MODE (in)] == 1)))
2056 unsigned int regno = REGNO (in) + in_offset;
2057 unsigned int nwords = hard_regno_nregs[regno][inmode];
2059 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2060 && ! hard_reg_set_here_p (regno, regno + nwords,
2061 PATTERN (this_insn))
2063 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2064 PATTERN (this_insn), inloc)))
2068 for (i = 0; i < nwords; i++)
2069 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2075 /* If we were going to use OUT as the reload reg
2076 and changed our mind, it means OUT is a dummy that
2077 dies here. So don't bother copying value to it. */
2078 if (for_real >= 0 && value == real_out)
2079 rld[for_real].out = 0;
2080 if (REG_P (real_in))
2083 value = gen_rtx_REG (inmode, regno);
2091 /* This page contains subroutines used mainly for determining
2092 whether the IN or an OUT of a reload can serve as the
2095 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2098 earlyclobber_operand_p (rtx x)
2102 for (i = 0; i < n_earlyclobbers; i++)
2103 if (reload_earlyclobbers[i] == x)
2109 /* Return 1 if expression X alters a hard reg in the range
2110 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2111 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2112 X should be the body of an instruction. */
2115 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2117 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2119 rtx op0 = SET_DEST (x);
2121 while (GET_CODE (op0) == SUBREG)
2122 op0 = SUBREG_REG (op0);
2125 unsigned int r = REGNO (op0);
2127 /* See if this reg overlaps range under consideration. */
2129 && end_hard_regno (GET_MODE (op0), r) > beg_regno)
2133 else if (GET_CODE (x) == PARALLEL)
2135 int i = XVECLEN (x, 0) - 1;
2138 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2145 /* Return 1 if ADDR is a valid memory address for mode MODE
2146 in address space AS, and check that each pseudo reg has the
2147 proper kind of hard reg. */
2150 strict_memory_address_addr_space_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2151 rtx addr, addr_space_t as)
2153 #ifdef GO_IF_LEGITIMATE_ADDRESS
2154 gcc_assert (ADDR_SPACE_GENERIC_P (as));
2155 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2161 return targetm.addr_space.legitimate_address_p (mode, addr, 1, as);
2165 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2166 if they are the same hard reg, and has special hacks for
2167 autoincrement and autodecrement.
2168 This is specifically intended for find_reloads to use
2169 in determining whether two operands match.
2170 X is the operand whose number is the lower of the two.
2172 The value is 2 if Y contains a pre-increment that matches
2173 a non-incrementing address in X. */
2175 /* ??? To be completely correct, we should arrange to pass
2176 for X the output operand and for Y the input operand.
2177 For now, we assume that the output operand has the lower number
2178 because that is natural in (SET output (... input ...)). */
2181 operands_match_p (rtx x, rtx y)
2184 RTX_CODE code = GET_CODE (x);
2190 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2191 && (REG_P (y) || (GET_CODE (y) == SUBREG
2192 && REG_P (SUBREG_REG (y)))))
2198 i = REGNO (SUBREG_REG (x));
2199 if (i >= FIRST_PSEUDO_REGISTER)
2201 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2202 GET_MODE (SUBREG_REG (x)),
2209 if (GET_CODE (y) == SUBREG)
2211 j = REGNO (SUBREG_REG (y));
2212 if (j >= FIRST_PSEUDO_REGISTER)
2214 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2215 GET_MODE (SUBREG_REG (y)),
2222 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2223 multiple hard register group of scalar integer registers, so that
2224 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2226 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2227 && SCALAR_INT_MODE_P (GET_MODE (x))
2228 && i < FIRST_PSEUDO_REGISTER)
2229 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2230 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2231 && SCALAR_INT_MODE_P (GET_MODE (y))
2232 && j < FIRST_PSEUDO_REGISTER)
2233 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2237 /* If two operands must match, because they are really a single
2238 operand of an assembler insn, then two postincrements are invalid
2239 because the assembler insn would increment only once.
2240 On the other hand, a postincrement matches ordinary indexing
2241 if the postincrement is the output operand. */
2242 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2243 return operands_match_p (XEXP (x, 0), y);
2244 /* Two preincrements are invalid
2245 because the assembler insn would increment only once.
2246 On the other hand, a preincrement matches ordinary indexing
2247 if the preincrement is the input operand.
2248 In this case, return 2, since some callers need to do special
2249 things when this happens. */
2250 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2251 || GET_CODE (y) == PRE_MODIFY)
2252 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2256 /* Now we have disposed of all the cases in which different rtx codes
2258 if (code != GET_CODE (y))
2261 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2262 if (GET_MODE (x) != GET_MODE (y))
2265 /* MEMs refering to different address space are not equivalent. */
2266 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2277 return XEXP (x, 0) == XEXP (y, 0);
2279 return XSTR (x, 0) == XSTR (y, 0);
2285 /* Compare the elements. If any pair of corresponding elements
2286 fail to match, return 0 for the whole things. */
2289 fmt = GET_RTX_FORMAT (code);
2290 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2296 if (XWINT (x, i) != XWINT (y, i))
2301 if (XINT (x, i) != XINT (y, i))
2306 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2309 /* If any subexpression returns 2,
2310 we should return 2 if we are successful. */
2319 if (XVECLEN (x, i) != XVECLEN (y, i))
2321 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2323 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2331 /* It is believed that rtx's at this level will never
2332 contain anything but integers and other rtx's,
2333 except for within LABEL_REFs and SYMBOL_REFs. */
2338 return 1 + success_2;
2341 /* Describe the range of registers or memory referenced by X.
2342 If X is a register, set REG_FLAG and put the first register
2343 number into START and the last plus one into END.
2344 If X is a memory reference, put a base address into BASE
2345 and a range of integer offsets into START and END.
2346 If X is pushing on the stack, we can assume it causes no trouble,
2347 so we set the SAFE field. */
2349 static struct decomposition
2352 struct decomposition val;
2355 memset (&val, 0, sizeof (val));
2357 switch (GET_CODE (x))
2361 rtx base = NULL_RTX, offset = 0;
2362 rtx addr = XEXP (x, 0);
2364 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2365 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2367 val.base = XEXP (addr, 0);
2368 val.start = -GET_MODE_SIZE (GET_MODE (x));
2369 val.end = GET_MODE_SIZE (GET_MODE (x));
2370 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2374 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2376 if (GET_CODE (XEXP (addr, 1)) == PLUS
2377 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2378 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2380 val.base = XEXP (addr, 0);
2381 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2382 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2383 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2388 if (GET_CODE (addr) == CONST)
2390 addr = XEXP (addr, 0);
2393 if (GET_CODE (addr) == PLUS)
2395 if (CONSTANT_P (XEXP (addr, 0)))
2397 base = XEXP (addr, 1);
2398 offset = XEXP (addr, 0);
2400 else if (CONSTANT_P (XEXP (addr, 1)))
2402 base = XEXP (addr, 0);
2403 offset = XEXP (addr, 1);
2410 offset = const0_rtx;
2412 if (GET_CODE (offset) == CONST)
2413 offset = XEXP (offset, 0);
2414 if (GET_CODE (offset) == PLUS)
2416 if (CONST_INT_P (XEXP (offset, 0)))
2418 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2419 offset = XEXP (offset, 0);
2421 else if (CONST_INT_P (XEXP (offset, 1)))
2423 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2424 offset = XEXP (offset, 1);
2428 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2429 offset = const0_rtx;
2432 else if (!CONST_INT_P (offset))
2434 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2435 offset = const0_rtx;
2438 if (all_const && GET_CODE (base) == PLUS)
2439 base = gen_rtx_CONST (GET_MODE (base), base);
2441 gcc_assert (CONST_INT_P (offset));
2443 val.start = INTVAL (offset);
2444 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2451 val.start = true_regnum (x);
2452 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2454 /* A pseudo with no hard reg. */
2455 val.start = REGNO (x);
2456 val.end = val.start + 1;
2460 val.end = end_hard_regno (GET_MODE (x), val.start);
2464 if (!REG_P (SUBREG_REG (x)))
2465 /* This could be more precise, but it's good enough. */
2466 return decompose (SUBREG_REG (x));
2468 val.start = true_regnum (x);
2469 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2470 return decompose (SUBREG_REG (x));
2473 val.end = val.start + subreg_nregs (x);
2477 /* This hasn't been assigned yet, so it can't conflict yet. */
2482 gcc_assert (CONSTANT_P (x));
2489 /* Return 1 if altering Y will not modify the value of X.
2490 Y is also described by YDATA, which should be decompose (Y). */
2493 immune_p (rtx x, rtx y, struct decomposition ydata)
2495 struct decomposition xdata;
2498 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2502 gcc_assert (MEM_P (y));
2503 /* If Y is memory and X is not, Y can't affect X. */
2507 xdata = decompose (x);
2509 if (! rtx_equal_p (xdata.base, ydata.base))
2511 /* If bases are distinct symbolic constants, there is no overlap. */
2512 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2514 /* Constants and stack slots never overlap. */
2515 if (CONSTANT_P (xdata.base)
2516 && (ydata.base == frame_pointer_rtx
2517 || ydata.base == hard_frame_pointer_rtx
2518 || ydata.base == stack_pointer_rtx))
2520 if (CONSTANT_P (ydata.base)
2521 && (xdata.base == frame_pointer_rtx
2522 || xdata.base == hard_frame_pointer_rtx
2523 || xdata.base == stack_pointer_rtx))
2525 /* If either base is variable, we don't know anything. */
2529 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2532 /* Similar, but calls decompose. */
2535 safe_from_earlyclobber (rtx op, rtx clobber)
2537 struct decomposition early_data;
2539 early_data = decompose (clobber);
2540 return immune_p (op, clobber, early_data);
2543 /* Main entry point of this file: search the body of INSN
2544 for values that need reloading and record them with push_reload.
2545 REPLACE nonzero means record also where the values occur
2546 so that subst_reloads can be used.
2548 IND_LEVELS says how many levels of indirection are supported by this
2549 machine; a value of zero means that a memory reference is not a valid
2552 LIVE_KNOWN says we have valid information about which hard
2553 regs are live at each point in the program; this is true when
2554 we are called from global_alloc but false when stupid register
2555 allocation has been done.
2557 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2558 which is nonnegative if the reg has been commandeered for reloading into.
2559 It is copied into STATIC_RELOAD_REG_P and referenced from there
2560 by various subroutines.
2562 Return TRUE if some operands need to be changed, because of swapping
2563 commutative operands, reg_equiv_address substitution, or whatever. */
2566 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2567 short *reload_reg_p)
2569 int insn_code_number;
2572 /* These start out as the constraints for the insn
2573 and they are chewed up as we consider alternatives. */
2574 const char *constraints[MAX_RECOG_OPERANDS];
2575 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2577 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2578 char pref_or_nothing[MAX_RECOG_OPERANDS];
2579 /* Nonzero for a MEM operand whose entire address needs a reload.
2580 May be -1 to indicate the entire address may or may not need a reload. */
2581 int address_reloaded[MAX_RECOG_OPERANDS];
2582 /* Nonzero for an address operand that needs to be completely reloaded.
2583 May be -1 to indicate the entire operand may or may not need a reload. */
2584 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2585 /* Value of enum reload_type to use for operand. */
2586 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2587 /* Value of enum reload_type to use within address of operand. */
2588 enum reload_type address_type[MAX_RECOG_OPERANDS];
2589 /* Save the usage of each operand. */
2590 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2591 int no_input_reloads = 0, no_output_reloads = 0;
2593 reg_class_t this_alternative[MAX_RECOG_OPERANDS];
2594 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2595 char this_alternative_win[MAX_RECOG_OPERANDS];
2596 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2597 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2598 int this_alternative_matches[MAX_RECOG_OPERANDS];
2600 reg_class_t goal_alternative[MAX_RECOG_OPERANDS];
2601 int this_alternative_number;
2602 int goal_alternative_number = 0;
2603 int operand_reloadnum[MAX_RECOG_OPERANDS];
2604 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2605 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2606 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2607 char goal_alternative_win[MAX_RECOG_OPERANDS];
2608 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2609 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2610 int goal_alternative_swapped;
2613 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2614 rtx substed_operand[MAX_RECOG_OPERANDS];
2615 rtx body = PATTERN (insn);
2616 rtx set = single_set (insn);
2617 int goal_earlyclobber = 0, this_earlyclobber;
2618 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2624 n_earlyclobbers = 0;
2625 replace_reloads = replace;
2626 hard_regs_live_known = live_known;
2627 static_reload_reg_p = reload_reg_p;
2629 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2630 neither are insns that SET cc0. Insns that use CC0 are not allowed
2631 to have any input reloads. */
2632 if (JUMP_P (insn) || CALL_P (insn))
2633 no_output_reloads = 1;
2636 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2637 no_input_reloads = 1;
2638 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2639 no_output_reloads = 1;
2642 #ifdef SECONDARY_MEMORY_NEEDED
2643 /* The eliminated forms of any secondary memory locations are per-insn, so
2644 clear them out here. */
2646 if (secondary_memlocs_elim_used)
2648 memset (secondary_memlocs_elim, 0,
2649 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2650 secondary_memlocs_elim_used = 0;
2654 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2655 is cheap to move between them. If it is not, there may not be an insn
2656 to do the copy, so we may need a reload. */
2657 if (GET_CODE (body) == SET
2658 && REG_P (SET_DEST (body))
2659 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2660 && REG_P (SET_SRC (body))
2661 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2662 && register_move_cost (GET_MODE (SET_SRC (body)),
2663 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2664 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2667 extract_insn (insn);
2669 noperands = reload_n_operands = recog_data.n_operands;
2670 n_alternatives = recog_data.n_alternatives;
2672 /* Just return "no reloads" if insn has no operands with constraints. */
2673 if (noperands == 0 || n_alternatives == 0)
2676 insn_code_number = INSN_CODE (insn);
2677 this_insn_is_asm = insn_code_number < 0;
2679 memcpy (operand_mode, recog_data.operand_mode,
2680 noperands * sizeof (enum machine_mode));
2681 memcpy (constraints, recog_data.constraints,
2682 noperands * sizeof (const char *));
2686 /* If we will need to know, later, whether some pair of operands
2687 are the same, we must compare them now and save the result.
2688 Reloading the base and index registers will clobber them
2689 and afterward they will fail to match. */
2691 for (i = 0; i < noperands; i++)
2697 substed_operand[i] = recog_data.operand[i];
2700 modified[i] = RELOAD_READ;
2702 /* Scan this operand's constraint to see if it is an output operand,
2703 an in-out operand, is commutative, or should match another. */
2707 p += CONSTRAINT_LEN (c, p);
2711 modified[i] = RELOAD_WRITE;
2714 modified[i] = RELOAD_READ_WRITE;
2718 /* The last operand should not be marked commutative. */
2719 gcc_assert (i != noperands - 1);
2721 /* We currently only support one commutative pair of
2722 operands. Some existing asm code currently uses more
2723 than one pair. Previously, that would usually work,
2724 but sometimes it would crash the compiler. We
2725 continue supporting that case as well as we can by
2726 silently ignoring all but the first pair. In the
2727 future we may handle it correctly. */
2728 if (commutative < 0)
2731 gcc_assert (this_insn_is_asm);
2734 /* Use of ISDIGIT is tempting here, but it may get expensive because
2735 of locale support we don't want. */
2736 case '0': case '1': case '2': case '3': case '4':
2737 case '5': case '6': case '7': case '8': case '9':
2739 c = strtoul (p - 1, &end, 10);
2742 operands_match[c][i]
2743 = operands_match_p (recog_data.operand[c],
2744 recog_data.operand[i]);
2746 /* An operand may not match itself. */
2747 gcc_assert (c != i);
2749 /* If C can be commuted with C+1, and C might need to match I,
2750 then C+1 might also need to match I. */
2751 if (commutative >= 0)
2753 if (c == commutative || c == commutative + 1)
2755 int other = c + (c == commutative ? 1 : -1);
2756 operands_match[other][i]
2757 = operands_match_p (recog_data.operand[other],
2758 recog_data.operand[i]);
2760 if (i == commutative || i == commutative + 1)
2762 int other = i + (i == commutative ? 1 : -1);
2763 operands_match[c][other]
2764 = operands_match_p (recog_data.operand[c],
2765 recog_data.operand[other]);
2767 /* Note that C is supposed to be less than I.
2768 No need to consider altering both C and I because in
2769 that case we would alter one into the other. */
2776 /* Examine each operand that is a memory reference or memory address
2777 and reload parts of the addresses into index registers.
2778 Also here any references to pseudo regs that didn't get hard regs
2779 but are equivalent to constants get replaced in the insn itself
2780 with those constants. Nobody will ever see them again.
2782 Finally, set up the preferred classes of each operand. */
2784 for (i = 0; i < noperands; i++)
2786 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2788 address_reloaded[i] = 0;
2789 address_operand_reloaded[i] = 0;
2790 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2791 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2794 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2795 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2798 if (*constraints[i] == 0)
2799 /* Ignore things like match_operator operands. */
2801 else if (constraints[i][0] == 'p'
2802 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2804 address_operand_reloaded[i]
2805 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2806 recog_data.operand[i],
2807 recog_data.operand_loc[i],
2808 i, operand_type[i], ind_levels, insn);
2810 /* If we now have a simple operand where we used to have a
2811 PLUS or MULT, re-recognize and try again. */
2812 if ((OBJECT_P (*recog_data.operand_loc[i])
2813 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2814 && (GET_CODE (recog_data.operand[i]) == MULT
2815 || GET_CODE (recog_data.operand[i]) == PLUS))
2817 INSN_CODE (insn) = -1;
2818 retval = find_reloads (insn, replace, ind_levels, live_known,
2823 recog_data.operand[i] = *recog_data.operand_loc[i];
2824 substed_operand[i] = recog_data.operand[i];
2826 /* Address operands are reloaded in their existing mode,
2827 no matter what is specified in the machine description. */
2828 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2830 else if (code == MEM)
2833 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2834 recog_data.operand_loc[i],
2835 XEXP (recog_data.operand[i], 0),
2836 &XEXP (recog_data.operand[i], 0),
2837 i, address_type[i], ind_levels, insn);
2838 recog_data.operand[i] = *recog_data.operand_loc[i];
2839 substed_operand[i] = recog_data.operand[i];
2841 else if (code == SUBREG)
2843 rtx reg = SUBREG_REG (recog_data.operand[i]);
2845 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2848 && &SET_DEST (set) == recog_data.operand_loc[i],
2850 &address_reloaded[i]);
2852 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2853 that didn't get a hard register, emit a USE with a REG_EQUAL
2854 note in front so that we might inherit a previous, possibly
2860 && (GET_MODE_SIZE (GET_MODE (reg))
2861 >= GET_MODE_SIZE (GET_MODE (op)))
2862 && reg_equiv_constant (REGNO (reg)) == 0)
2863 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2865 REG_EQUAL, reg_equiv_memory_loc (REGNO (reg)));
2867 substed_operand[i] = recog_data.operand[i] = op;
2869 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2870 /* We can get a PLUS as an "operand" as a result of register
2871 elimination. See eliminate_regs and gen_reload. We handle
2872 a unary operator by reloading the operand. */
2873 substed_operand[i] = recog_data.operand[i]
2874 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2875 ind_levels, 0, insn,
2876 &address_reloaded[i]);
2877 else if (code == REG)
2879 /* This is equivalent to calling find_reloads_toplev.
2880 The code is duplicated for speed.
2881 When we find a pseudo always equivalent to a constant,
2882 we replace it by the constant. We must be sure, however,
2883 that we don't try to replace it in the insn in which it
2885 int regno = REGNO (recog_data.operand[i]);
2886 if (reg_equiv_constant (regno) != 0
2887 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2889 /* Record the existing mode so that the check if constants are
2890 allowed will work when operand_mode isn't specified. */
2892 if (operand_mode[i] == VOIDmode)
2893 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2895 substed_operand[i] = recog_data.operand[i]
2896 = reg_equiv_constant (regno);
2898 if (reg_equiv_memory_loc (regno) != 0
2899 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
2900 /* We need not give a valid is_set_dest argument since the case
2901 of a constant equivalence was checked above. */
2902 substed_operand[i] = recog_data.operand[i]
2903 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2904 ind_levels, 0, insn,
2905 &address_reloaded[i]);
2907 /* If the operand is still a register (we didn't replace it with an
2908 equivalent), get the preferred class to reload it into. */
2909 code = GET_CODE (recog_data.operand[i]);
2911 = ((code == REG && REGNO (recog_data.operand[i])
2912 >= FIRST_PSEUDO_REGISTER)
2913 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2917 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2918 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2921 /* If this is simply a copy from operand 1 to operand 0, merge the
2922 preferred classes for the operands. */
2923 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2924 && recog_data.operand[1] == SET_SRC (set))
2926 preferred_class[0] = preferred_class[1]
2927 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2928 pref_or_nothing[0] |= pref_or_nothing[1];
2929 pref_or_nothing[1] |= pref_or_nothing[0];
2932 /* Now see what we need for pseudo-regs that didn't get hard regs
2933 or got the wrong kind of hard reg. For this, we must consider
2934 all the operands together against the register constraints. */
2936 best = MAX_RECOG_OPERANDS * 2 + 600;
2939 goal_alternative_swapped = 0;
2942 /* The constraints are made of several alternatives.
2943 Each operand's constraint looks like foo,bar,... with commas
2944 separating the alternatives. The first alternatives for all
2945 operands go together, the second alternatives go together, etc.
2947 First loop over alternatives. */
2949 for (this_alternative_number = 0;
2950 this_alternative_number < n_alternatives;
2951 this_alternative_number++)
2953 /* Loop over operands for one constraint alternative. */
2954 /* LOSERS counts those that don't fit this alternative
2955 and would require loading. */
2957 /* BAD is set to 1 if it some operand can't fit this alternative
2958 even after reloading. */
2960 /* REJECT is a count of how undesirable this alternative says it is
2961 if any reloading is required. If the alternative matches exactly
2962 then REJECT is ignored, but otherwise it gets this much
2963 counted against it in addition to the reloading needed. Each
2964 ? counts three times here since we want the disparaging caused by
2965 a bad register class to only count 1/3 as much. */
2968 if (!recog_data.alternative_enabled_p[this_alternative_number])
2972 for (i = 0; i < recog_data.n_operands; i++)
2973 constraints[i] = skip_alternative (constraints[i]);
2978 this_earlyclobber = 0;
2980 for (i = 0; i < noperands; i++)
2982 const char *p = constraints[i];
2987 /* 0 => this operand can be reloaded somehow for this alternative. */
2989 /* 0 => this operand can be reloaded if the alternative allows regs. */
2993 rtx operand = recog_data.operand[i];
2995 /* Nonzero means this is a MEM that must be reloaded into a reg
2996 regardless of what the constraint says. */
2997 int force_reload = 0;
2999 /* Nonzero if a constant forced into memory would be OK for this
3002 int earlyclobber = 0;
3004 /* If the predicate accepts a unary operator, it means that
3005 we need to reload the operand, but do not do this for
3006 match_operator and friends. */
3007 if (UNARY_P (operand) && *p != 0)
3008 operand = XEXP (operand, 0);
3010 /* If the operand is a SUBREG, extract
3011 the REG or MEM (or maybe even a constant) within.
3012 (Constants can occur as a result of reg_equiv_constant.) */
3014 while (GET_CODE (operand) == SUBREG)
3016 /* Offset only matters when operand is a REG and
3017 it is a hard reg. This is because it is passed
3018 to reg_fits_class_p if it is a REG and all pseudos
3019 return 0 from that function. */
3020 if (REG_P (SUBREG_REG (operand))
3021 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
3023 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand)),
3024 GET_MODE (SUBREG_REG (operand)),
3025 SUBREG_BYTE (operand),
3026 GET_MODE (operand)) < 0)
3028 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
3029 GET_MODE (SUBREG_REG (operand)),
3030 SUBREG_BYTE (operand),
3031 GET_MODE (operand));
3033 operand = SUBREG_REG (operand);
3034 /* Force reload if this is a constant or PLUS or if there may
3035 be a problem accessing OPERAND in the outer mode. */
3036 if (CONSTANT_P (operand)
3037 || GET_CODE (operand) == PLUS
3038 /* We must force a reload of paradoxical SUBREGs
3039 of a MEM because the alignment of the inner value
3040 may not be enough to do the outer reference. On
3041 big-endian machines, it may also reference outside
3044 On machines that extend byte operations and we have a
3045 SUBREG where both the inner and outer modes are no wider
3046 than a word and the inner mode is narrower, is integral,
3047 and gets extended when loaded from memory, combine.c has
3048 made assumptions about the behavior of the machine in such
3049 register access. If the data is, in fact, in memory we
3050 must always load using the size assumed to be in the
3051 register and let the insn do the different-sized
3054 This is doubly true if WORD_REGISTER_OPERATIONS. In
3055 this case eliminate_regs has left non-paradoxical
3056 subregs for push_reload to see. Make sure it does
3057 by forcing the reload.
3059 ??? When is it right at this stage to have a subreg
3060 of a mem that is _not_ to be handled specially? IMO
3061 those should have been reduced to just a mem. */
3062 || ((MEM_P (operand)
3064 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3065 #ifndef WORD_REGISTER_OPERATIONS
3066 && (((GET_MODE_BITSIZE (GET_MODE (operand))
3067 < BIGGEST_ALIGNMENT)
3068 && (GET_MODE_SIZE (operand_mode[i])
3069 > GET_MODE_SIZE (GET_MODE (operand))))
3071 #ifdef LOAD_EXTEND_OP
3072 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3073 && (GET_MODE_SIZE (GET_MODE (operand))
3075 && (GET_MODE_SIZE (operand_mode[i])
3076 > GET_MODE_SIZE (GET_MODE (operand)))
3077 && INTEGRAL_MODE_P (GET_MODE (operand))
3078 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3087 this_alternative[i] = NO_REGS;
3088 this_alternative_win[i] = 0;
3089 this_alternative_match_win[i] = 0;
3090 this_alternative_offmemok[i] = 0;
3091 this_alternative_earlyclobber[i] = 0;
3092 this_alternative_matches[i] = -1;
3094 /* An empty constraint or empty alternative
3095 allows anything which matched the pattern. */
3096 if (*p == 0 || *p == ',')
3099 /* Scan this alternative's specs for this operand;
3100 set WIN if the operand fits any letter in this alternative.
3101 Otherwise, clear BADOP if this operand could
3102 fit some letter after reloads,
3103 or set WINREG if this operand could fit after reloads
3104 provided the constraint allows some registers. */
3107 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3116 case '=': case '+': case '*':
3120 /* We only support one commutative marker, the first
3121 one. We already set commutative above. */
3133 /* Ignore rest of this alternative as far as
3134 reloading is concerned. */
3137 while (*p && *p != ',');
3141 case '0': case '1': case '2': case '3': case '4':
3142 case '5': case '6': case '7': case '8': case '9':
3143 m = strtoul (p, &end, 10);
3147 this_alternative_matches[i] = m;
3148 /* We are supposed to match a previous operand.
3149 If we do, we win if that one did.
3150 If we do not, count both of the operands as losers.
3151 (This is too conservative, since most of the time
3152 only a single reload insn will be needed to make
3153 the two operands win. As a result, this alternative
3154 may be rejected when it is actually desirable.) */
3155 if ((swapped && (m != commutative || i != commutative + 1))
3156 /* If we are matching as if two operands were swapped,
3157 also pretend that operands_match had been computed
3159 But if I is the second of those and C is the first,
3160 don't exchange them, because operands_match is valid
3161 only on one side of its diagonal. */
3163 [(m == commutative || m == commutative + 1)
3164 ? 2 * commutative + 1 - m : m]
3165 [(i == commutative || i == commutative + 1)
3166 ? 2 * commutative + 1 - i : i])
3167 : operands_match[m][i])
3169 /* If we are matching a non-offsettable address where an
3170 offsettable address was expected, then we must reject
3171 this combination, because we can't reload it. */
3172 if (this_alternative_offmemok[m]
3173 && MEM_P (recog_data.operand[m])
3174 && this_alternative[m] == NO_REGS
3175 && ! this_alternative_win[m])
3178 did_match = this_alternative_win[m];
3182 /* Operands don't match. */
3185 /* Retroactively mark the operand we had to match
3186 as a loser, if it wasn't already. */
3187 if (this_alternative_win[m])
3189 this_alternative_win[m] = 0;
3190 if (this_alternative[m] == NO_REGS)
3192 /* But count the pair only once in the total badness of
3193 this alternative, if the pair can be a dummy reload.
3194 The pointers in operand_loc are not swapped; swap
3195 them by hand if necessary. */
3196 if (swapped && i == commutative)
3197 loc1 = commutative + 1;
3198 else if (swapped && i == commutative + 1)
3202 if (swapped && m == commutative)
3203 loc2 = commutative + 1;
3204 else if (swapped && m == commutative + 1)
3209 = find_dummy_reload (recog_data.operand[i],
3210 recog_data.operand[m],
3211 recog_data.operand_loc[loc1],
3212 recog_data.operand_loc[loc2],
3213 operand_mode[i], operand_mode[m],
3214 this_alternative[m], -1,
3215 this_alternative_earlyclobber[m]);
3220 /* This can be fixed with reloads if the operand
3221 we are supposed to match can be fixed with reloads. */
3223 this_alternative[i] = this_alternative[m];
3225 /* If we have to reload this operand and some previous
3226 operand also had to match the same thing as this
3227 operand, we don't know how to do that. So reject this
3229 if (! did_match || force_reload)
3230 for (j = 0; j < i; j++)
3231 if (this_alternative_matches[j]
3232 == this_alternative_matches[i])
3237 /* All necessary reloads for an address_operand
3238 were handled in find_reloads_address. */
3239 this_alternative[i] = base_reg_class (VOIDmode, ADDRESS,
3245 case TARGET_MEM_CONSTRAINT:
3250 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3251 && reg_renumber[REGNO (operand)] < 0))
3253 if (CONST_POOL_OK_P (operand_mode[i], operand))
3260 && ! address_reloaded[i]
3261 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3262 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3268 && ! address_reloaded[i]
3269 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3270 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3274 /* Memory operand whose address is not offsettable. */
3279 && ! (ind_levels ? offsettable_memref_p (operand)
3280 : offsettable_nonstrict_memref_p (operand))
3281 /* Certain mem addresses will become offsettable
3282 after they themselves are reloaded. This is important;
3283 we don't want our own handling of unoffsettables
3284 to override the handling of reg_equiv_address. */
3285 && !(REG_P (XEXP (operand, 0))
3287 || reg_equiv_address (REGNO (XEXP (operand, 0))) != 0)))
3291 /* Memory operand whose address is offsettable. */
3295 if ((MEM_P (operand)
3296 /* If IND_LEVELS, find_reloads_address won't reload a
3297 pseudo that didn't get a hard reg, so we have to
3298 reject that case. */
3299 && ((ind_levels ? offsettable_memref_p (operand)
3300 : offsettable_nonstrict_memref_p (operand))
3301 /* A reloaded address is offsettable because it is now
3302 just a simple register indirect. */
3303 || address_reloaded[i] == 1))
3305 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3306 && reg_renumber[REGNO (operand)] < 0
3307 /* If reg_equiv_address is nonzero, we will be
3308 loading it into a register; hence it will be
3309 offsettable, but we cannot say that reg_equiv_mem
3310 is offsettable without checking. */
3311 && ((reg_equiv_mem (REGNO (operand)) != 0
3312 && offsettable_memref_p (reg_equiv_mem (REGNO (operand))))
3313 || (reg_equiv_address (REGNO (operand)) != 0))))
3315 if (CONST_POOL_OK_P (operand_mode[i], operand)
3323 /* Output operand that is stored before the need for the
3324 input operands (and their index registers) is over. */
3325 earlyclobber = 1, this_earlyclobber = 1;
3330 if (GET_CODE (operand) == CONST_DOUBLE
3331 || (GET_CODE (operand) == CONST_VECTOR
3332 && (GET_MODE_CLASS (GET_MODE (operand))
3333 == MODE_VECTOR_FLOAT)))
3339 if (GET_CODE (operand) == CONST_DOUBLE
3340 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3345 if (CONST_INT_P (operand)
3346 || (GET_CODE (operand) == CONST_DOUBLE
3347 && GET_MODE (operand) == VOIDmode))
3350 if (CONSTANT_P (operand)
3351 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3356 if (CONST_INT_P (operand)
3357 || (GET_CODE (operand) == CONST_DOUBLE
3358 && GET_MODE (operand) == VOIDmode))
3370 if (CONST_INT_P (operand)
3371 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3382 /* A PLUS is never a valid operand, but reload can make
3383 it from a register when eliminating registers. */
3384 && GET_CODE (operand) != PLUS
3385 /* A SCRATCH is not a valid operand. */
3386 && GET_CODE (operand) != SCRATCH
3387 && (! CONSTANT_P (operand)
3389 || LEGITIMATE_PIC_OPERAND_P (operand))
3390 && (GENERAL_REGS == ALL_REGS
3392 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3393 && reg_renumber[REGNO (operand)] < 0)))
3395 /* Drop through into 'r' case. */
3399 = reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3403 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3405 #ifdef EXTRA_CONSTRAINT_STR
3406 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3410 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3412 /* If the address was already reloaded,
3414 else if (MEM_P (operand)
3415 && address_reloaded[i] == 1)
3417 /* Likewise if the address will be reloaded because
3418 reg_equiv_address is nonzero. For reg_equiv_mem
3419 we have to check. */
3420 else if (REG_P (operand)
3421 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3422 && reg_renumber[REGNO (operand)] < 0
3423 && ((reg_equiv_mem (REGNO (operand)) != 0
3424 && EXTRA_CONSTRAINT_STR (reg_equiv_mem (REGNO (operand)), c, p))
3425 || (reg_equiv_address (REGNO (operand)) != 0)))
3428 /* If we didn't already win, we can reload
3429 constants via force_const_mem, and other
3430 MEMs by reloading the address like for 'o'. */
3431 if (CONST_POOL_OK_P (operand_mode[i], operand)
3438 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3440 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3443 /* If we didn't already win, we can reload
3444 the address into a base register. */
3445 this_alternative[i] = base_reg_class (VOIDmode,
3452 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3459 = (reg_class_subunion
3460 [this_alternative[i]]
3461 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3463 if (GET_MODE (operand) == BLKmode)
3467 && reg_fits_class_p (operand, this_alternative[i],
3468 offset, GET_MODE (recog_data.operand[i])))
3472 while ((p += len), c);
3476 /* If this operand could be handled with a reg,
3477 and some reg is allowed, then this operand can be handled. */
3478 if (winreg && this_alternative[i] != NO_REGS
3479 && (win || !class_only_fixed_regs[this_alternative[i]]))
3482 /* Record which operands fit this alternative. */
3483 this_alternative_earlyclobber[i] = earlyclobber;
3484 if (win && ! force_reload)
3485 this_alternative_win[i] = 1;
3486 else if (did_match && ! force_reload)
3487 this_alternative_match_win[i] = 1;
3490 int const_to_mem = 0;
3492 this_alternative_offmemok[i] = offmemok;
3496 /* Alternative loses if it has no regs for a reg operand. */
3498 && this_alternative[i] == NO_REGS
3499 && this_alternative_matches[i] < 0)
3502 /* If this is a constant that is reloaded into the desired
3503 class by copying it to memory first, count that as another
3504 reload. This is consistent with other code and is
3505 required to avoid choosing another alternative when
3506 the constant is moved into memory by this function on
3507 an early reload pass. Note that the test here is
3508 precisely the same as in the code below that calls
3510 if (CONST_POOL_OK_P (operand_mode[i], operand)
3511 && ((targetm.preferred_reload_class (operand,
3512 this_alternative[i])
3514 || no_input_reloads))
3517 if (this_alternative[i] != NO_REGS)
3521 /* Alternative loses if it requires a type of reload not
3522 permitted for this insn. We can always reload SCRATCH
3523 and objects with a REG_UNUSED note. */
3524 if (GET_CODE (operand) != SCRATCH
3525 && modified[i] != RELOAD_READ && no_output_reloads
3526 && ! find_reg_note (insn, REG_UNUSED, operand))
3528 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3532 /* If we can't reload this value at all, reject this
3533 alternative. Note that we could also lose due to
3534 LIMIT_RELOAD_CLASS, but we don't check that
3537 if (! CONSTANT_P (operand) && this_alternative[i] != NO_REGS)
3539 if (targetm.preferred_reload_class (operand, this_alternative[i])
3543 if (operand_type[i] == RELOAD_FOR_OUTPUT
3544 && (targetm.preferred_output_reload_class (operand,
3545 this_alternative[i])
3550 /* We prefer to reload pseudos over reloading other things,
3551 since such reloads may be able to be eliminated later.
3552 If we are reloading a SCRATCH, we won't be generating any
3553 insns, just using a register, so it is also preferred.
3554 So bump REJECT in other cases. Don't do this in the
3555 case where we are forcing a constant into memory and
3556 it will then win since we don't want to have a different
3557 alternative match then. */
3558 if (! (REG_P (operand)
3559 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3560 && GET_CODE (operand) != SCRATCH
3561 && ! (const_to_mem && constmemok))
3564 /* Input reloads can be inherited more often than output
3565 reloads can be removed, so penalize output reloads. */
3566 if (operand_type[i] != RELOAD_FOR_INPUT
3567 && GET_CODE (operand) != SCRATCH)
3571 /* If this operand is a pseudo register that didn't get a hard
3572 reg and this alternative accepts some register, see if the
3573 class that we want is a subset of the preferred class for this
3574 register. If not, but it intersects that class, use the
3575 preferred class instead. If it does not intersect the preferred
3576 class, show that usage of this alternative should be discouraged;
3577 it will be discouraged more still if the register is `preferred
3578 or nothing'. We do this because it increases the chance of
3579 reusing our spill register in a later insn and avoiding a pair
3580 of memory stores and loads.
3582 Don't bother with this if this alternative will accept this
3585 Don't do this for a multiword operand, since it is only a
3586 small win and has the risk of requiring more spill registers,
3587 which could cause a large loss.
3589 Don't do this if the preferred class has only one register
3590 because we might otherwise exhaust the class. */
3592 if (! win && ! did_match
3593 && this_alternative[i] != NO_REGS
3594 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3595 && reg_class_size [(int) preferred_class[i]] > 0
3596 && ! small_register_class_p (preferred_class[i]))
3598 if (! reg_class_subset_p (this_alternative[i],
3599 preferred_class[i]))
3601 /* Since we don't have a way of forming the intersection,
3602 we just do something special if the preferred class
3603 is a subset of the class we have; that's the most
3604 common case anyway. */
3605 if (reg_class_subset_p (preferred_class[i],
3606 this_alternative[i]))
3607 this_alternative[i] = preferred_class[i];
3609 reject += (2 + 2 * pref_or_nothing[i]);
3614 /* Now see if any output operands that are marked "earlyclobber"
3615 in this alternative conflict with any input operands
3616 or any memory addresses. */
3618 for (i = 0; i < noperands; i++)
3619 if (this_alternative_earlyclobber[i]
3620 && (this_alternative_win[i] || this_alternative_match_win[i]))
3622 struct decomposition early_data;
3624 early_data = decompose (recog_data.operand[i]);
3626 gcc_assert (modified[i] != RELOAD_READ);
3628 if (this_alternative[i] == NO_REGS)
3630 this_alternative_earlyclobber[i] = 0;
3631 gcc_assert (this_insn_is_asm);
3632 error_for_asm (this_insn,
3633 "%<&%> constraint used with no register class");
3636 for (j = 0; j < noperands; j++)
3637 /* Is this an input operand or a memory ref? */
3638 if ((MEM_P (recog_data.operand[j])
3639 || modified[j] != RELOAD_WRITE)
3641 /* Ignore things like match_operator operands. */
3642 && !recog_data.is_operator[j]
3643 /* Don't count an input operand that is constrained to match
3644 the early clobber operand. */
3645 && ! (this_alternative_matches[j] == i
3646 && rtx_equal_p (recog_data.operand[i],
3647 recog_data.operand[j]))
3648 /* Is it altered by storing the earlyclobber operand? */
3649 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3652 /* If the output is in a non-empty few-regs class,
3653 it's costly to reload it, so reload the input instead. */
3654 if (small_register_class_p (this_alternative[i])
3655 && (REG_P (recog_data.operand[j])
3656 || GET_CODE (recog_data.operand[j]) == SUBREG))
3659 this_alternative_win[j] = 0;
3660 this_alternative_match_win[j] = 0;
3665 /* If an earlyclobber operand conflicts with something,
3666 it must be reloaded, so request this and count the cost. */
3670 this_alternative_win[i] = 0;
3671 this_alternative_match_win[j] = 0;
3672 for (j = 0; j < noperands; j++)
3673 if (this_alternative_matches[j] == i
3674 && this_alternative_match_win[j])
3676 this_alternative_win[j] = 0;
3677 this_alternative_match_win[j] = 0;
3683 /* If one alternative accepts all the operands, no reload required,
3684 choose that alternative; don't consider the remaining ones. */
3687 /* Unswap these so that they are never swapped at `finish'. */
3688 if (commutative >= 0)
3690 recog_data.operand[commutative] = substed_operand[commutative];
3691 recog_data.operand[commutative + 1]
3692 = substed_operand[commutative + 1];
3694 for (i = 0; i < noperands; i++)
3696 goal_alternative_win[i] = this_alternative_win[i];
3697 goal_alternative_match_win[i] = this_alternative_match_win[i];
3698 goal_alternative[i] = this_alternative[i];
3699 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3700 goal_alternative_matches[i] = this_alternative_matches[i];
3701 goal_alternative_earlyclobber[i]
3702 = this_alternative_earlyclobber[i];
3704 goal_alternative_number = this_alternative_number;
3705 goal_alternative_swapped = swapped;
3706 goal_earlyclobber = this_earlyclobber;
3710 /* REJECT, set by the ! and ? constraint characters and when a register
3711 would be reloaded into a non-preferred class, discourages the use of
3712 this alternative for a reload goal. REJECT is incremented by six
3713 for each ? and two for each non-preferred class. */
3714 losers = losers * 6 + reject;
3716 /* If this alternative can be made to work by reloading,
3717 and it needs less reloading than the others checked so far,
3718 record it as the chosen goal for reloading. */
3723 for (i = 0; i < noperands; i++)
3725 goal_alternative[i] = this_alternative[i];
3726 goal_alternative_win[i] = this_alternative_win[i];
3727 goal_alternative_match_win[i]
3728 = this_alternative_match_win[i];
3729 goal_alternative_offmemok[i]
3730 = this_alternative_offmemok[i];
3731 goal_alternative_matches[i] = this_alternative_matches[i];
3732 goal_alternative_earlyclobber[i]
3733 = this_alternative_earlyclobber[i];
3735 goal_alternative_swapped = swapped;
3737 goal_alternative_number = this_alternative_number;
3738 goal_earlyclobber = this_earlyclobber;
3743 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3744 then we need to try each alternative twice,
3745 the second time matching those two operands
3746 as if we had exchanged them.
3747 To do this, really exchange them in operands.
3749 If we have just tried the alternatives the second time,
3750 return operands to normal and drop through. */
3752 if (commutative >= 0)
3757 enum reg_class tclass;
3760 recog_data.operand[commutative] = substed_operand[commutative + 1];
3761 recog_data.operand[commutative + 1] = substed_operand[commutative];
3762 /* Swap the duplicates too. */
3763 for (i = 0; i < recog_data.n_dups; i++)
3764 if (recog_data.dup_num[i] == commutative
3765 || recog_data.dup_num[i] == commutative + 1)
3766 *recog_data.dup_loc[i]
3767 = recog_data.operand[(int) recog_data.dup_num[i]];
3769 tclass = preferred_class[commutative];
3770 preferred_class[commutative] = preferred_class[commutative + 1];
3771 preferred_class[commutative + 1] = tclass;
3773 t = pref_or_nothing[commutative];
3774 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3775 pref_or_nothing[commutative + 1] = t;
3777 t = address_reloaded[commutative];
3778 address_reloaded[commutative] = address_reloaded[commutative + 1];
3779 address_reloaded[commutative + 1] = t;
3781 memcpy (constraints, recog_data.constraints,
3782 noperands * sizeof (const char *));
3787 recog_data.operand[commutative] = substed_operand[commutative];
3788 recog_data.operand[commutative + 1]
3789 = substed_operand[commutative + 1];
3790 /* Unswap the duplicates too. */
3791 for (i = 0; i < recog_data.n_dups; i++)
3792 if (recog_data.dup_num[i] == commutative
3793 || recog_data.dup_num[i] == commutative + 1)
3794 *recog_data.dup_loc[i]
3795 = recog_data.operand[(int) recog_data.dup_num[i]];
3799 /* The operands don't meet the constraints.
3800 goal_alternative describes the alternative
3801 that we could reach by reloading the fewest operands.
3802 Reload so as to fit it. */
3804 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3806 /* No alternative works with reloads?? */
3807 if (insn_code_number >= 0)
3808 fatal_insn ("unable to generate reloads for:", insn);
3809 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3810 /* Avoid further trouble with this insn. */
3811 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3816 /* Jump to `finish' from above if all operands are valid already.
3817 In that case, goal_alternative_win is all 1. */
3820 /* Right now, for any pair of operands I and J that are required to match,
3822 goal_alternative_matches[J] is I.
3823 Set up goal_alternative_matched as the inverse function:
3824 goal_alternative_matched[I] = J. */
3826 for (i = 0; i < noperands; i++)
3827 goal_alternative_matched[i] = -1;
3829 for (i = 0; i < noperands; i++)
3830 if (! goal_alternative_win[i]
3831 && goal_alternative_matches[i] >= 0)
3832 goal_alternative_matched[goal_alternative_matches[i]] = i;
3834 for (i = 0; i < noperands; i++)
3835 goal_alternative_win[i] |= goal_alternative_match_win[i];
3837 /* If the best alternative is with operands 1 and 2 swapped,
3838 consider them swapped before reporting the reloads. Update the
3839 operand numbers of any reloads already pushed. */
3841 if (goal_alternative_swapped)
3845 tem = substed_operand[commutative];
3846 substed_operand[commutative] = substed_operand[commutative + 1];
3847 substed_operand[commutative + 1] = tem;
3848 tem = recog_data.operand[commutative];
3849 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3850 recog_data.operand[commutative + 1] = tem;
3851 tem = *recog_data.operand_loc[commutative];
3852 *recog_data.operand_loc[commutative]
3853 = *recog_data.operand_loc[commutative + 1];
3854 *recog_data.operand_loc[commutative + 1] = tem;
3856 for (i = 0; i < n_reloads; i++)
3858 if (rld[i].opnum == commutative)
3859 rld[i].opnum = commutative + 1;
3860 else if (rld[i].opnum == commutative + 1)
3861 rld[i].opnum = commutative;
3865 for (i = 0; i < noperands; i++)
3867 operand_reloadnum[i] = -1;
3869 /* If this is an earlyclobber operand, we need to widen the scope.
3870 The reload must remain valid from the start of the insn being
3871 reloaded until after the operand is stored into its destination.
3872 We approximate this with RELOAD_OTHER even though we know that we
3873 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3875 One special case that is worth checking is when we have an
3876 output that is earlyclobber but isn't used past the insn (typically
3877 a SCRATCH). In this case, we only need have the reload live
3878 through the insn itself, but not for any of our input or output
3880 But we must not accidentally narrow the scope of an existing
3881 RELOAD_OTHER reload - leave these alone.
3883 In any case, anything needed to address this operand can remain
3884 however they were previously categorized. */
3886 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3888 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3889 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3892 /* Any constants that aren't allowed and can't be reloaded
3893 into registers are here changed into memory references. */
3894 for (i = 0; i < noperands; i++)
3895 if (! goal_alternative_win[i])
3897 rtx op = recog_data.operand[i];
3898 rtx subreg = NULL_RTX;
3899 rtx plus = NULL_RTX;
3900 enum machine_mode mode = operand_mode[i];
3902 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3903 push_reload so we have to let them pass here. */
3904 if (GET_CODE (op) == SUBREG)
3907 op = SUBREG_REG (op);
3908 mode = GET_MODE (op);
3911 if (GET_CODE (op) == PLUS)
3917 if (CONST_POOL_OK_P (mode, op)
3918 && ((targetm.preferred_reload_class (op, goal_alternative[i])
3920 || no_input_reloads))
3922 int this_address_reloaded;
3923 rtx tem = force_const_mem (mode, op);
3925 /* If we stripped a SUBREG or a PLUS above add it back. */
3926 if (plus != NULL_RTX)
3927 tem = gen_rtx_PLUS (mode, XEXP (plus, 0), tem);
3929 if (subreg != NULL_RTX)
3930 tem = gen_rtx_SUBREG (operand_mode[i], tem, SUBREG_BYTE (subreg));
3932 this_address_reloaded = 0;
3933 substed_operand[i] = recog_data.operand[i]
3934 = find_reloads_toplev (tem, i, address_type[i], ind_levels,
3935 0, insn, &this_address_reloaded);
3937 /* If the alternative accepts constant pool refs directly
3938 there will be no reload needed at all. */
3939 if (plus == NULL_RTX
3940 && subreg == NULL_RTX
3941 && alternative_allows_const_pool_ref (this_address_reloaded == 0
3942 ? substed_operand[i]
3944 recog_data.constraints[i],
3945 goal_alternative_number))
3946 goal_alternative_win[i] = 1;
3950 /* Record the values of the earlyclobber operands for the caller. */
3951 if (goal_earlyclobber)
3952 for (i = 0; i < noperands; i++)
3953 if (goal_alternative_earlyclobber[i])
3954 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3956 /* Now record reloads for all the operands that need them. */
3957 for (i = 0; i < noperands; i++)
3958 if (! goal_alternative_win[i])
3960 /* Operands that match previous ones have already been handled. */
3961 if (goal_alternative_matches[i] >= 0)
3963 /* Handle an operand with a nonoffsettable address
3964 appearing where an offsettable address will do
3965 by reloading the address into a base register.
3967 ??? We can also do this when the operand is a register and
3968 reg_equiv_mem is not offsettable, but this is a bit tricky,
3969 so we don't bother with it. It may not be worth doing. */
3970 else if (goal_alternative_matched[i] == -1
3971 && goal_alternative_offmemok[i]
3972 && MEM_P (recog_data.operand[i]))
3974 /* If the address to be reloaded is a VOIDmode constant,
3975 use the default address mode as mode of the reload register,
3976 as would have been done by find_reloads_address. */
3977 enum machine_mode address_mode;
3978 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3979 if (address_mode == VOIDmode)
3981 addr_space_t as = MEM_ADDR_SPACE (recog_data.operand[i]);
3982 address_mode = targetm.addr_space.address_mode (as);
3985 operand_reloadnum[i]
3986 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3987 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3988 base_reg_class (VOIDmode, MEM, SCRATCH),
3990 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3991 rld[operand_reloadnum[i]].inc
3992 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3994 /* If this operand is an output, we will have made any
3995 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3996 now we are treating part of the operand as an input, so
3997 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3999 if (modified[i] == RELOAD_WRITE)
4001 for (j = 0; j < n_reloads; j++)
4003 if (rld[j].opnum == i)
4005 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
4006 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
4007 else if (rld[j].when_needed
4008 == RELOAD_FOR_OUTADDR_ADDRESS)
4009 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
4014 else if (goal_alternative_matched[i] == -1)
4016 operand_reloadnum[i]
4017 = push_reload ((modified[i] != RELOAD_WRITE
4018 ? recog_data.operand[i] : 0),
4019 (modified[i] != RELOAD_READ
4020 ? recog_data.operand[i] : 0),
4021 (modified[i] != RELOAD_WRITE
4022 ? recog_data.operand_loc[i] : 0),
4023 (modified[i] != RELOAD_READ
4024 ? recog_data.operand_loc[i] : 0),
4025 (enum reg_class) goal_alternative[i],
4026 (modified[i] == RELOAD_WRITE
4027 ? VOIDmode : operand_mode[i]),
4028 (modified[i] == RELOAD_READ
4029 ? VOIDmode : operand_mode[i]),
4030 (insn_code_number < 0 ? 0
4031 : insn_data[insn_code_number].operand[i].strict_low),
4032 0, i, operand_type[i]);
4034 /* In a matching pair of operands, one must be input only
4035 and the other must be output only.
4036 Pass the input operand as IN and the other as OUT. */
4037 else if (modified[i] == RELOAD_READ
4038 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
4040 operand_reloadnum[i]
4041 = push_reload (recog_data.operand[i],
4042 recog_data.operand[goal_alternative_matched[i]],
4043 recog_data.operand_loc[i],
4044 recog_data.operand_loc[goal_alternative_matched[i]],
4045 (enum reg_class) goal_alternative[i],
4047 operand_mode[goal_alternative_matched[i]],
4048 0, 0, i, RELOAD_OTHER);
4049 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
4051 else if (modified[i] == RELOAD_WRITE
4052 && modified[goal_alternative_matched[i]] == RELOAD_READ)
4054 operand_reloadnum[goal_alternative_matched[i]]
4055 = push_reload (recog_data.operand[goal_alternative_matched[i]],
4056 recog_data.operand[i],
4057 recog_data.operand_loc[goal_alternative_matched[i]],
4058 recog_data.operand_loc[i],
4059 (enum reg_class) goal_alternative[i],
4060 operand_mode[goal_alternative_matched[i]],
4062 0, 0, i, RELOAD_OTHER);
4063 operand_reloadnum[i] = output_reloadnum;
4067 gcc_assert (insn_code_number < 0);
4068 error_for_asm (insn, "inconsistent operand constraints "
4070 /* Avoid further trouble with this insn. */
4071 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
4076 else if (goal_alternative_matched[i] < 0
4077 && goal_alternative_matches[i] < 0
4078 && address_operand_reloaded[i] != 1
4081 /* For each non-matching operand that's a MEM or a pseudo-register
4082 that didn't get a hard register, make an optional reload.
4083 This may get done even if the insn needs no reloads otherwise. */
4085 rtx operand = recog_data.operand[i];
4087 while (GET_CODE (operand) == SUBREG)
4088 operand = SUBREG_REG (operand);
4089 if ((MEM_P (operand)
4091 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4092 /* If this is only for an output, the optional reload would not
4093 actually cause us to use a register now, just note that
4094 something is stored here. */
4095 && (goal_alternative[i] != NO_REGS
4096 || modified[i] == RELOAD_WRITE)
4097 && ! no_input_reloads
4098 /* An optional output reload might allow to delete INSN later.
4099 We mustn't make in-out reloads on insns that are not permitted
4101 If this is an asm, we can't delete it; we must not even call
4102 push_reload for an optional output reload in this case,
4103 because we can't be sure that the constraint allows a register,
4104 and push_reload verifies the constraints for asms. */
4105 && (modified[i] == RELOAD_READ
4106 || (! no_output_reloads && ! this_insn_is_asm)))
4107 operand_reloadnum[i]
4108 = push_reload ((modified[i] != RELOAD_WRITE
4109 ? recog_data.operand[i] : 0),
4110 (modified[i] != RELOAD_READ
4111 ? recog_data.operand[i] : 0),
4112 (modified[i] != RELOAD_WRITE
4113 ? recog_data.operand_loc[i] : 0),
4114 (modified[i] != RELOAD_READ
4115 ? recog_data.operand_loc[i] : 0),
4116 (enum reg_class) goal_alternative[i],
4117 (modified[i] == RELOAD_WRITE
4118 ? VOIDmode : operand_mode[i]),
4119 (modified[i] == RELOAD_READ
4120 ? VOIDmode : operand_mode[i]),
4121 (insn_code_number < 0 ? 0
4122 : insn_data[insn_code_number].operand[i].strict_low),
4123 1, i, operand_type[i]);
4124 /* If a memory reference remains (either as a MEM or a pseudo that
4125 did not get a hard register), yet we can't make an optional
4126 reload, check if this is actually a pseudo register reference;
4127 we then need to emit a USE and/or a CLOBBER so that reload
4128 inheritance will do the right thing. */
4132 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4133 && reg_renumber [REGNO (operand)] < 0)))
4135 operand = *recog_data.operand_loc[i];
4137 while (GET_CODE (operand) == SUBREG)
4138 operand = SUBREG_REG (operand);
4139 if (REG_P (operand))
4141 if (modified[i] != RELOAD_WRITE)
4142 /* We mark the USE with QImode so that we recognize
4143 it as one that can be safely deleted at the end
4145 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4147 if (modified[i] != RELOAD_READ)
4148 emit_insn_after (gen_clobber (operand), insn);
4152 else if (goal_alternative_matches[i] >= 0
4153 && goal_alternative_win[goal_alternative_matches[i]]
4154 && modified[i] == RELOAD_READ
4155 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4156 && ! no_input_reloads && ! no_output_reloads
4159 /* Similarly, make an optional reload for a pair of matching
4160 objects that are in MEM or a pseudo that didn't get a hard reg. */
4162 rtx operand = recog_data.operand[i];
4164 while (GET_CODE (operand) == SUBREG)
4165 operand = SUBREG_REG (operand);
4166 if ((MEM_P (operand)
4168 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4169 && (goal_alternative[goal_alternative_matches[i]] != NO_REGS))
4170 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4171 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4172 recog_data.operand[i],
4173 recog_data.operand_loc[goal_alternative_matches[i]],
4174 recog_data.operand_loc[i],
4175 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4176 operand_mode[goal_alternative_matches[i]],
4178 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4181 /* Perform whatever substitutions on the operands we are supposed
4182 to make due to commutativity or replacement of registers
4183 with equivalent constants or memory slots. */
4185 for (i = 0; i < noperands; i++)
4187 /* We only do this on the last pass through reload, because it is
4188 possible for some data (like reg_equiv_address) to be changed during
4189 later passes. Moreover, we lose the opportunity to get a useful
4190 reload_{in,out}_reg when we do these replacements. */
4194 rtx substitution = substed_operand[i];
4196 *recog_data.operand_loc[i] = substitution;
4198 /* If we're replacing an operand with a LABEL_REF, we need to
4199 make sure that there's a REG_LABEL_OPERAND note attached to
4200 this instruction. */
4201 if (GET_CODE (substitution) == LABEL_REF
4202 && !find_reg_note (insn, REG_LABEL_OPERAND,
4203 XEXP (substitution, 0))
4204 /* For a JUMP_P, if it was a branch target it must have
4205 already been recorded as such. */
4207 || !label_is_jump_target_p (XEXP (substitution, 0),
4209 add_reg_note (insn, REG_LABEL_OPERAND, XEXP (substitution, 0));
4212 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4215 /* If this insn pattern contains any MATCH_DUP's, make sure that
4216 they will be substituted if the operands they match are substituted.
4217 Also do now any substitutions we already did on the operands.
4219 Don't do this if we aren't making replacements because we might be
4220 propagating things allocated by frame pointer elimination into places
4221 it doesn't expect. */
4223 if (insn_code_number >= 0 && replace)
4224 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4226 int opno = recog_data.dup_num[i];
4227 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4228 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4232 /* This loses because reloading of prior insns can invalidate the equivalence
4233 (or at least find_equiv_reg isn't smart enough to find it any more),
4234 causing this insn to need more reload regs than it needed before.
4235 It may be too late to make the reload regs available.
4236 Now this optimization is done safely in choose_reload_regs. */
4238 /* For each reload of a reg into some other class of reg,
4239 search for an existing equivalent reg (same value now) in the right class.
4240 We can use it as long as we don't need to change its contents. */
4241 for (i = 0; i < n_reloads; i++)
4242 if (rld[i].reg_rtx == 0
4244 && REG_P (rld[i].in)
4248 = find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
4249 static_reload_reg_p, 0, rld[i].inmode);
4250 /* Prevent generation of insn to load the value
4251 because the one we found already has the value. */
4253 rld[i].in = rld[i].reg_rtx;
4257 /* If we detected error and replaced asm instruction by USE, forget about the
4259 if (GET_CODE (PATTERN (insn)) == USE
4260 && CONST_INT_P (XEXP (PATTERN (insn), 0)))
4263 /* Perhaps an output reload can be combined with another
4264 to reduce needs by one. */
4265 if (!goal_earlyclobber)
4268 /* If we have a pair of reloads for parts of an address, they are reloading
4269 the same object, the operands themselves were not reloaded, and they
4270 are for two operands that are supposed to match, merge the reloads and
4271 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4273 for (i = 0; i < n_reloads; i++)
4277 for (j = i + 1; j < n_reloads; j++)
4278 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4279 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4280 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4281 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4282 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4283 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4284 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4285 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4286 && rtx_equal_p (rld[i].in, rld[j].in)
4287 && (operand_reloadnum[rld[i].opnum] < 0
4288 || rld[operand_reloadnum[rld[i].opnum]].optional)
4289 && (operand_reloadnum[rld[j].opnum] < 0
4290 || rld[operand_reloadnum[rld[j].opnum]].optional)
4291 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4292 || (goal_alternative_matches[rld[j].opnum]
4295 for (k = 0; k < n_replacements; k++)
4296 if (replacements[k].what == j)
4297 replacements[k].what = i;
4299 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4300 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4301 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4303 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4308 /* Scan all the reloads and update their type.
4309 If a reload is for the address of an operand and we didn't reload
4310 that operand, change the type. Similarly, change the operand number
4311 of a reload when two operands match. If a reload is optional, treat it
4312 as though the operand isn't reloaded.
4314 ??? This latter case is somewhat odd because if we do the optional
4315 reload, it means the object is hanging around. Thus we need only
4316 do the address reload if the optional reload was NOT done.
4318 Change secondary reloads to be the address type of their operand, not
4321 If an operand's reload is now RELOAD_OTHER, change any
4322 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4323 RELOAD_FOR_OTHER_ADDRESS. */
4325 for (i = 0; i < n_reloads; i++)
4327 if (rld[i].secondary_p
4328 && rld[i].when_needed == operand_type[rld[i].opnum])
4329 rld[i].when_needed = address_type[rld[i].opnum];
4331 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4332 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4333 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4334 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4335 && (operand_reloadnum[rld[i].opnum] < 0
4336 || rld[operand_reloadnum[rld[i].opnum]].optional))
4338 /* If we have a secondary reload to go along with this reload,
4339 change its type to RELOAD_FOR_OPADDR_ADDR. */
4341 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4342 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4343 && rld[i].secondary_in_reload != -1)
4345 int secondary_in_reload = rld[i].secondary_in_reload;
4347 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4349 /* If there's a tertiary reload we have to change it also. */
4350 if (secondary_in_reload > 0
4351 && rld[secondary_in_reload].secondary_in_reload != -1)
4352 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4353 = RELOAD_FOR_OPADDR_ADDR;
4356 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4357 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4358 && rld[i].secondary_out_reload != -1)
4360 int secondary_out_reload = rld[i].secondary_out_reload;
4362 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4364 /* If there's a tertiary reload we have to change it also. */
4365 if (secondary_out_reload
4366 && rld[secondary_out_reload].secondary_out_reload != -1)
4367 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4368 = RELOAD_FOR_OPADDR_ADDR;
4371 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4372 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4373 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4375 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4378 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4379 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4380 && operand_reloadnum[rld[i].opnum] >= 0
4381 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4383 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4385 if (goal_alternative_matches[rld[i].opnum] >= 0)
4386 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4389 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4390 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4391 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4393 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4394 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4395 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4396 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4397 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4398 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4399 This is complicated by the fact that a single operand can have more
4400 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4401 choose_reload_regs without affecting code quality, and cases that
4402 actually fail are extremely rare, so it turns out to be better to fix
4403 the problem here by not generating cases that choose_reload_regs will
4405 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4406 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4408 We can reduce the register pressure by exploiting that a
4409 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4410 does not conflict with any of them, if it is only used for the first of
4411 the RELOAD_FOR_X_ADDRESS reloads. */
4413 int first_op_addr_num = -2;
4414 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4415 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4416 int need_change = 0;
4417 /* We use last_op_addr_reload and the contents of the above arrays
4418 first as flags - -2 means no instance encountered, -1 means exactly
4419 one instance encountered.
4420 If more than one instance has been encountered, we store the reload
4421 number of the first reload of the kind in question; reload numbers
4422 are known to be non-negative. */
4423 for (i = 0; i < noperands; i++)
4424 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4425 for (i = n_reloads - 1; i >= 0; i--)
4427 switch (rld[i].when_needed)
4429 case RELOAD_FOR_OPERAND_ADDRESS:
4430 if (++first_op_addr_num >= 0)
4432 first_op_addr_num = i;
4436 case RELOAD_FOR_INPUT_ADDRESS:
4437 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4439 first_inpaddr_num[rld[i].opnum] = i;
4443 case RELOAD_FOR_OUTPUT_ADDRESS:
4444 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4446 first_outpaddr_num[rld[i].opnum] = i;
4457 for (i = 0; i < n_reloads; i++)
4460 enum reload_type type;
4462 switch (rld[i].when_needed)
4464 case RELOAD_FOR_OPADDR_ADDR:
4465 first_num = first_op_addr_num;
4466 type = RELOAD_FOR_OPERAND_ADDRESS;
4468 case RELOAD_FOR_INPADDR_ADDRESS:
4469 first_num = first_inpaddr_num[rld[i].opnum];
4470 type = RELOAD_FOR_INPUT_ADDRESS;
4472 case RELOAD_FOR_OUTADDR_ADDRESS:
4473 first_num = first_outpaddr_num[rld[i].opnum];
4474 type = RELOAD_FOR_OUTPUT_ADDRESS;
4481 else if (i > first_num)
4482 rld[i].when_needed = type;
4485 /* Check if the only TYPE reload that uses reload I is
4486 reload FIRST_NUM. */
4487 for (j = n_reloads - 1; j > first_num; j--)
4489 if (rld[j].when_needed == type
4490 && (rld[i].secondary_p
4491 ? rld[j].secondary_in_reload == i
4492 : reg_mentioned_p (rld[i].in, rld[j].in)))
4494 rld[i].when_needed = type;
4503 /* See if we have any reloads that are now allowed to be merged
4504 because we've changed when the reload is needed to
4505 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4506 check for the most common cases. */
4508 for (i = 0; i < n_reloads; i++)
4509 if (rld[i].in != 0 && rld[i].out == 0
4510 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4511 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4512 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4513 for (j = 0; j < n_reloads; j++)
4514 if (i != j && rld[j].in != 0 && rld[j].out == 0
4515 && rld[j].when_needed == rld[i].when_needed
4516 && MATCHES (rld[i].in, rld[j].in)
4517 && rld[i].rclass == rld[j].rclass
4518 && !rld[i].nocombine && !rld[j].nocombine
4519 && rld[i].reg_rtx == rld[j].reg_rtx)
4521 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4522 transfer_replacements (i, j);
4527 /* If we made any reloads for addresses, see if they violate a
4528 "no input reloads" requirement for this insn. But loads that we
4529 do after the insn (such as for output addresses) are fine. */
4530 if (no_input_reloads)
4531 for (i = 0; i < n_reloads; i++)
4532 gcc_assert (rld[i].in == 0
4533 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4534 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4537 /* Compute reload_mode and reload_nregs. */
4538 for (i = 0; i < n_reloads; i++)
4541 = (rld[i].inmode == VOIDmode
4542 || (GET_MODE_SIZE (rld[i].outmode)
4543 > GET_MODE_SIZE (rld[i].inmode)))
4544 ? rld[i].outmode : rld[i].inmode;
4546 rld[i].nregs = CLASS_MAX_NREGS (rld[i].rclass, rld[i].mode);
4549 /* Special case a simple move with an input reload and a
4550 destination of a hard reg, if the hard reg is ok, use it. */
4551 for (i = 0; i < n_reloads; i++)
4552 if (rld[i].when_needed == RELOAD_FOR_INPUT
4553 && GET_CODE (PATTERN (insn)) == SET
4554 && REG_P (SET_DEST (PATTERN (insn)))
4555 && (SET_SRC (PATTERN (insn)) == rld[i].in
4556 || SET_SRC (PATTERN (insn)) == rld[i].in_reg)
4557 && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4559 rtx dest = SET_DEST (PATTERN (insn));
4560 unsigned int regno = REGNO (dest);
4562 if (regno < FIRST_PSEUDO_REGISTER
4563 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
4564 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4566 int nr = hard_regno_nregs[regno][rld[i].mode];
4569 for (nri = 1; nri < nr; nri ++)
4570 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
4574 rld[i].reg_rtx = dest;
4581 /* Return true if alternative number ALTNUM in constraint-string
4582 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4583 MEM gives the reference if it didn't need any reloads, otherwise it
4587 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED,
4588 const char *constraint, int altnum)
4592 /* Skip alternatives before the one requested. */
4595 while (*constraint++ != ',');
4598 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4599 If one of them is present, this alternative accepts the result of
4600 passing a constant-pool reference through find_reloads_toplev.
4602 The same is true of extra memory constraints if the address
4603 was reloaded into a register. However, the target may elect
4604 to disallow the original constant address, forcing it to be
4605 reloaded into a register instead. */
4606 for (; (c = *constraint) && c != ',' && c != '#';
4607 constraint += CONSTRAINT_LEN (c, constraint))
4609 if (c == TARGET_MEM_CONSTRAINT || c == 'o')
4611 #ifdef EXTRA_CONSTRAINT_STR
4612 if (EXTRA_MEMORY_CONSTRAINT (c, constraint)
4613 && (mem == NULL || EXTRA_CONSTRAINT_STR (mem, c, constraint)))
4620 /* Scan X for memory references and scan the addresses for reloading.
4621 Also checks for references to "constant" regs that we want to eliminate
4622 and replaces them with the values they stand for.
4623 We may alter X destructively if it contains a reference to such.
4624 If X is just a constant reg, we return the equivalent value
4627 IND_LEVELS says how many levels of indirect addressing this machine
4630 OPNUM and TYPE identify the purpose of the reload.
4632 IS_SET_DEST is true if X is the destination of a SET, which is not
4633 appropriate to be replaced by a constant.
4635 INSN, if nonzero, is the insn in which we do the reload. It is used
4636 to determine if we may generate output reloads, and where to put USEs
4637 for pseudos that we have to replace with stack slots.
4639 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4640 result of find_reloads_address. */
4643 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4644 int ind_levels, int is_set_dest, rtx insn,
4645 int *address_reloaded)
4647 RTX_CODE code = GET_CODE (x);
4649 const char *fmt = GET_RTX_FORMAT (code);
4655 /* This code is duplicated for speed in find_reloads. */
4656 int regno = REGNO (x);
4657 if (reg_equiv_constant (regno) != 0 && !is_set_dest)
4658 x = reg_equiv_constant (regno);
4660 /* This creates (subreg (mem...)) which would cause an unnecessary
4661 reload of the mem. */
4662 else if (reg_equiv_mem (regno) != 0)
4663 x = reg_equiv_mem (regno);
4665 else if (reg_equiv_memory_loc (regno)
4666 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
4668 rtx mem = make_memloc (x, regno);
4669 if (reg_equiv_address (regno)
4670 || ! rtx_equal_p (mem, reg_equiv_mem (regno)))
4672 /* If this is not a toplevel operand, find_reloads doesn't see
4673 this substitution. We have to emit a USE of the pseudo so
4674 that delete_output_reload can see it. */
4675 if (replace_reloads && recog_data.operand[opnum] != x)
4676 /* We mark the USE with QImode so that we recognize it
4677 as one that can be safely deleted at the end of
4679 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4682 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4683 opnum, type, ind_levels, insn);
4684 if (!rtx_equal_p (x, mem))
4685 push_reg_equiv_alt_mem (regno, x);
4686 if (address_reloaded)
4687 *address_reloaded = i;
4696 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4697 opnum, type, ind_levels, insn);
4698 if (address_reloaded)
4699 *address_reloaded = i;
4704 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4706 /* Check for SUBREG containing a REG that's equivalent to a
4707 constant. If the constant has a known value, truncate it
4708 right now. Similarly if we are extracting a single-word of a
4709 multi-word constant. If the constant is symbolic, allow it
4710 to be substituted normally. push_reload will strip the
4711 subreg later. The constant must not be VOIDmode, because we
4712 will lose the mode of the register (this should never happen
4713 because one of the cases above should handle it). */
4715 int regno = REGNO (SUBREG_REG (x));
4718 if (regno >= FIRST_PSEUDO_REGISTER
4719 && reg_renumber[regno] < 0
4720 && reg_equiv_constant (regno) != 0)
4723 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant (regno),
4724 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4726 if (CONSTANT_P (tem)
4727 && !targetm.legitimate_constant_p (GET_MODE (x), tem))
4729 tem = force_const_mem (GET_MODE (x), tem);
4730 i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4731 &XEXP (tem, 0), opnum, type,
4733 if (address_reloaded)
4734 *address_reloaded = i;
4739 /* If the subreg contains a reg that will be converted to a mem,
4740 convert the subreg to a narrower memref now.
4741 Otherwise, we would get (subreg (mem ...) ...),
4742 which would force reload of the mem.
4744 We also need to do this if there is an equivalent MEM that is
4745 not offsettable. In that case, alter_subreg would produce an
4746 invalid address on big-endian machines.
4748 For machines that extend byte loads, we must not reload using
4749 a wider mode if we have a paradoxical SUBREG. find_reloads will
4750 force a reload in that case. So we should not do anything here. */
4752 if (regno >= FIRST_PSEUDO_REGISTER
4753 #ifdef LOAD_EXTEND_OP
4754 && (GET_MODE_SIZE (GET_MODE (x))
4755 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4757 && (reg_equiv_address (regno) != 0
4758 || (reg_equiv_mem (regno) != 0
4759 && (! strict_memory_address_addr_space_p
4760 (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0),
4761 MEM_ADDR_SPACE (reg_equiv_mem (regno)))
4762 || ! offsettable_memref_p (reg_equiv_mem (regno))
4763 || num_not_at_initial_offset))))
4764 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4765 insn, address_reloaded);
4768 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4772 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4773 ind_levels, is_set_dest, insn,
4775 /* If we have replaced a reg with it's equivalent memory loc -
4776 that can still be handled here e.g. if it's in a paradoxical
4777 subreg - we must make the change in a copy, rather than using
4778 a destructive change. This way, find_reloads can still elect
4779 not to do the change. */
4780 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4782 x = shallow_copy_rtx (x);
4785 XEXP (x, i) = new_part;
4791 /* Return a mem ref for the memory equivalent of reg REGNO.
4792 This mem ref is not shared with anything. */
4795 make_memloc (rtx ad, int regno)
4797 /* We must rerun eliminate_regs, in case the elimination
4798 offsets have changed. */
4800 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno), VOIDmode, NULL_RTX),
4803 /* If TEM might contain a pseudo, we must copy it to avoid
4804 modifying it when we do the substitution for the reload. */
4805 if (rtx_varies_p (tem, 0))
4806 tem = copy_rtx (tem);
4808 tem = replace_equiv_address_nv (reg_equiv_memory_loc (regno), tem);
4809 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4811 /* Copy the result if it's still the same as the equivalence, to avoid
4812 modifying it when we do the substitution for the reload. */
4813 if (tem == reg_equiv_memory_loc (regno))
4814 tem = copy_rtx (tem);
4818 /* Returns true if AD could be turned into a valid memory reference
4819 to mode MODE in address space AS by reloading the part pointed to
4820 by PART into a register. */
4823 maybe_memory_address_addr_space_p (enum machine_mode mode, rtx ad,
4824 addr_space_t as, rtx *part)
4828 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4831 retv = memory_address_addr_space_p (mode, ad, as);
4837 /* Record all reloads needed for handling memory address AD
4838 which appears in *LOC in a memory reference to mode MODE
4839 which itself is found in location *MEMREFLOC.
4840 Note that we take shortcuts assuming that no multi-reg machine mode
4841 occurs as part of an address.
4843 OPNUM and TYPE specify the purpose of this reload.
4845 IND_LEVELS says how many levels of indirect addressing this machine
4848 INSN, if nonzero, is the insn in which we do the reload. It is used
4849 to determine if we may generate output reloads, and where to put USEs
4850 for pseudos that we have to replace with stack slots.
4852 Value is one if this address is reloaded or replaced as a whole; it is
4853 zero if the top level of this address was not reloaded or replaced, and
4854 it is -1 if it may or may not have been reloaded or replaced.
4856 Note that there is no verification that the address will be valid after
4857 this routine does its work. Instead, we rely on the fact that the address
4858 was valid when reload started. So we need only undo things that reload
4859 could have broken. These are wrong register types, pseudos not allocated
4860 to a hard register, and frame pointer elimination. */
4863 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4864 rtx *loc, int opnum, enum reload_type type,
4865 int ind_levels, rtx insn)
4867 addr_space_t as = memrefloc? MEM_ADDR_SPACE (*memrefloc)
4868 : ADDR_SPACE_GENERIC;
4870 int removed_and = 0;
4874 /* If the address is a register, see if it is a legitimate address and
4875 reload if not. We first handle the cases where we need not reload
4876 or where we must reload in a non-standard way. */
4882 if (reg_equiv_constant (regno) != 0)
4884 find_reloads_address_part (reg_equiv_constant (regno), loc,
4885 base_reg_class (mode, MEM, SCRATCH),
4886 GET_MODE (ad), opnum, type, ind_levels);
4890 tem = reg_equiv_memory_loc (regno);
4893 if (reg_equiv_address (regno) != 0 || num_not_at_initial_offset)
4895 tem = make_memloc (ad, regno);
4896 if (! strict_memory_address_addr_space_p (GET_MODE (tem),
4898 MEM_ADDR_SPACE (tem)))
4902 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4903 &XEXP (tem, 0), opnum,
4904 ADDR_TYPE (type), ind_levels, insn);
4905 if (!rtx_equal_p (tem, orig))
4906 push_reg_equiv_alt_mem (regno, tem);
4908 /* We can avoid a reload if the register's equivalent memory
4909 expression is valid as an indirect memory address.
4910 But not all addresses are valid in a mem used as an indirect
4911 address: only reg or reg+constant. */
4914 && strict_memory_address_addr_space_p (mode, tem, as)
4915 && (REG_P (XEXP (tem, 0))
4916 || (GET_CODE (XEXP (tem, 0)) == PLUS
4917 && REG_P (XEXP (XEXP (tem, 0), 0))
4918 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4920 /* TEM is not the same as what we'll be replacing the
4921 pseudo with after reload, put a USE in front of INSN
4922 in the final reload pass. */
4924 && num_not_at_initial_offset
4925 && ! rtx_equal_p (tem, reg_equiv_mem (regno)))
4928 /* We mark the USE with QImode so that we
4929 recognize it as one that can be safely
4930 deleted at the end of reload. */
4931 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4934 /* This doesn't really count as replacing the address
4935 as a whole, since it is still a memory access. */
4943 /* The only remaining case where we can avoid a reload is if this is a
4944 hard register that is valid as a base register and which is not the
4945 subject of a CLOBBER in this insn. */
4947 else if (regno < FIRST_PSEUDO_REGISTER
4948 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4949 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4952 /* If we do not have one of the cases above, we must do the reload. */
4953 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4954 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4958 if (strict_memory_address_addr_space_p (mode, ad, as))
4960 /* The address appears valid, so reloads are not needed.
4961 But the address may contain an eliminable register.
4962 This can happen because a machine with indirect addressing
4963 may consider a pseudo register by itself a valid address even when
4964 it has failed to get a hard reg.
4965 So do a tree-walk to find and eliminate all such regs. */
4967 /* But first quickly dispose of a common case. */
4968 if (GET_CODE (ad) == PLUS
4969 && CONST_INT_P (XEXP (ad, 1))
4970 && REG_P (XEXP (ad, 0))
4971 && reg_equiv_constant (REGNO (XEXP (ad, 0))) == 0)
4974 subst_reg_equivs_changed = 0;
4975 *loc = subst_reg_equivs (ad, insn);
4977 if (! subst_reg_equivs_changed)
4980 /* Check result for validity after substitution. */
4981 if (strict_memory_address_addr_space_p (mode, ad, as))
4985 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4988 if (memrefloc && ADDR_SPACE_GENERIC_P (as))
4990 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4995 *memrefloc = copy_rtx (*memrefloc);
4996 XEXP (*memrefloc, 0) = ad;
4997 move_replacements (&ad, &XEXP (*memrefloc, 0));
5003 /* The address is not valid. We have to figure out why. First see if
5004 we have an outer AND and remove it if so. Then analyze what's inside. */
5006 if (GET_CODE (ad) == AND)
5009 loc = &XEXP (ad, 0);
5013 /* One possibility for why the address is invalid is that it is itself
5014 a MEM. This can happen when the frame pointer is being eliminated, a
5015 pseudo is not allocated to a hard register, and the offset between the
5016 frame and stack pointers is not its initial value. In that case the
5017 pseudo will have been replaced by a MEM referring to the
5021 /* First ensure that the address in this MEM is valid. Then, unless
5022 indirect addresses are valid, reload the MEM into a register. */
5024 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
5025 opnum, ADDR_TYPE (type),
5026 ind_levels == 0 ? 0 : ind_levels - 1, insn);
5028 /* If tem was changed, then we must create a new memory reference to
5029 hold it and store it back into memrefloc. */
5030 if (tem != ad && memrefloc)
5032 *memrefloc = copy_rtx (*memrefloc);
5033 copy_replacements (tem, XEXP (*memrefloc, 0));
5034 loc = &XEXP (*memrefloc, 0);
5036 loc = &XEXP (*loc, 0);
5039 /* Check similar cases as for indirect addresses as above except
5040 that we can allow pseudos and a MEM since they should have been
5041 taken care of above. */
5044 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
5045 || MEM_P (XEXP (tem, 0))
5046 || ! (REG_P (XEXP (tem, 0))
5047 || (GET_CODE (XEXP (tem, 0)) == PLUS
5048 && REG_P (XEXP (XEXP (tem, 0), 0))
5049 && CONST_INT_P (XEXP (XEXP (tem, 0), 1)))))
5051 /* Must use TEM here, not AD, since it is the one that will
5052 have any subexpressions reloaded, if needed. */
5053 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
5054 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
5057 return ! removed_and;
5063 /* If we have address of a stack slot but it's not valid because the
5064 displacement is too large, compute the sum in a register.
5065 Handle all base registers here, not just fp/ap/sp, because on some
5066 targets (namely SH) we can also get too large displacements from
5067 big-endian corrections. */
5068 else if (GET_CODE (ad) == PLUS
5069 && REG_P (XEXP (ad, 0))
5070 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
5071 && CONST_INT_P (XEXP (ad, 1))
5072 && (regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
5074 /* Similarly, if we were to reload the base register and the
5075 mem+offset address is still invalid, then we want to reload
5076 the whole address, not just the base register. */
5077 || ! maybe_memory_address_addr_space_p
5078 (mode, ad, as, &(XEXP (ad, 0)))))
5081 /* Unshare the MEM rtx so we can safely alter it. */
5084 *memrefloc = copy_rtx (*memrefloc);
5085 loc = &XEXP (*memrefloc, 0);
5087 loc = &XEXP (*loc, 0);
5090 if (double_reg_address_ok
5091 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode,
5094 /* Unshare the sum as well. */
5095 *loc = ad = copy_rtx (ad);
5097 /* Reload the displacement into an index reg.
5098 We assume the frame pointer or arg pointer is a base reg. */
5099 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
5100 INDEX_REG_CLASS, GET_MODE (ad), opnum,
5106 /* If the sum of two regs is not necessarily valid,
5107 reload the sum into a base reg.
5108 That will at least work. */
5109 find_reloads_address_part (ad, loc,
5110 base_reg_class (mode, MEM, SCRATCH),
5111 GET_MODE (ad), opnum, type, ind_levels);
5113 return ! removed_and;
5116 /* If we have an indexed stack slot, there are three possible reasons why
5117 it might be invalid: The index might need to be reloaded, the address
5118 might have been made by frame pointer elimination and hence have a
5119 constant out of range, or both reasons might apply.
5121 We can easily check for an index needing reload, but even if that is the
5122 case, we might also have an invalid constant. To avoid making the
5123 conservative assumption and requiring two reloads, we see if this address
5124 is valid when not interpreted strictly. If it is, the only problem is
5125 that the index needs a reload and find_reloads_address_1 will take care
5128 Handle all base registers here, not just fp/ap/sp, because on some
5129 targets (namely SPARC) we can also get invalid addresses from preventive
5130 subreg big-endian corrections made by find_reloads_toplev. We
5131 can also get expressions involving LO_SUM (rather than PLUS) from
5132 find_reloads_subreg_address.
5134 If we decide to do something, it must be that `double_reg_address_ok'
5135 is true. We generate a reload of the base register + constant and
5136 rework the sum so that the reload register will be added to the index.
5137 This is safe because we know the address isn't shared.
5139 We check for the base register as both the first and second operand of
5140 the innermost PLUS and/or LO_SUM. */
5142 for (op_index = 0; op_index < 2; ++op_index)
5144 rtx operand, addend;
5145 enum rtx_code inner_code;
5147 if (GET_CODE (ad) != PLUS)
5150 inner_code = GET_CODE (XEXP (ad, 0));
5151 if (!(GET_CODE (ad) == PLUS
5152 && CONST_INT_P (XEXP (ad, 1))
5153 && (inner_code == PLUS || inner_code == LO_SUM)))
5156 operand = XEXP (XEXP (ad, 0), op_index);
5157 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5160 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5162 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5164 || operand == frame_pointer_rtx
5165 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
5166 || operand == hard_frame_pointer_rtx
5168 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5169 || operand == arg_pointer_rtx
5171 || operand == stack_pointer_rtx)
5172 && ! maybe_memory_address_addr_space_p
5173 (mode, ad, as, &XEXP (XEXP (ad, 0), 1 - op_index)))
5178 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5180 /* Form the adjusted address. */
5181 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5182 ad = gen_rtx_PLUS (GET_MODE (ad),
5183 op_index == 0 ? offset_reg : addend,
5184 op_index == 0 ? addend : offset_reg);
5186 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5187 op_index == 0 ? offset_reg : addend,
5188 op_index == 0 ? addend : offset_reg);
5191 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5192 find_reloads_address_part (XEXP (ad, op_index),
5193 &XEXP (ad, op_index), cls,
5194 GET_MODE (ad), opnum, type, ind_levels);
5195 find_reloads_address_1 (mode,
5196 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5197 GET_CODE (XEXP (ad, op_index)),
5198 &XEXP (ad, 1 - op_index), opnum,
5205 /* See if address becomes valid when an eliminable register
5206 in a sum is replaced. */
5209 if (GET_CODE (ad) == PLUS)
5210 tem = subst_indexed_address (ad);
5211 if (tem != ad && strict_memory_address_addr_space_p (mode, tem, as))
5213 /* Ok, we win that way. Replace any additional eliminable
5216 subst_reg_equivs_changed = 0;
5217 tem = subst_reg_equivs (tem, insn);
5219 /* Make sure that didn't make the address invalid again. */
5221 if (! subst_reg_equivs_changed
5222 || strict_memory_address_addr_space_p (mode, tem, as))
5229 /* If constants aren't valid addresses, reload the constant address
5231 if (CONSTANT_P (ad) && ! strict_memory_address_addr_space_p (mode, ad, as))
5233 enum machine_mode address_mode = GET_MODE (ad);
5234 if (address_mode == VOIDmode)
5235 address_mode = targetm.addr_space.address_mode (as);
5237 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5238 Unshare it so we can safely alter it. */
5239 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5240 && CONSTANT_POOL_ADDRESS_P (ad))
5242 *memrefloc = copy_rtx (*memrefloc);
5243 loc = &XEXP (*memrefloc, 0);
5245 loc = &XEXP (*loc, 0);
5248 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5249 address_mode, opnum, type, ind_levels);
5250 return ! removed_and;
5253 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5257 /* Find all pseudo regs appearing in AD
5258 that are eliminable in favor of equivalent values
5259 and do not have hard regs; replace them by their equivalents.
5260 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5261 front of it for pseudos that we have to replace with stack slots. */
5264 subst_reg_equivs (rtx ad, rtx insn)
5266 RTX_CODE code = GET_CODE (ad);
5286 int regno = REGNO (ad);
5288 if (reg_equiv_constant (regno) != 0)
5290 subst_reg_equivs_changed = 1;
5291 return reg_equiv_constant (regno);
5293 if (reg_equiv_memory_loc (regno) && num_not_at_initial_offset)
5295 rtx mem = make_memloc (ad, regno);
5296 if (! rtx_equal_p (mem, reg_equiv_mem (regno)))
5298 subst_reg_equivs_changed = 1;
5299 /* We mark the USE with QImode so that we recognize it
5300 as one that can be safely deleted at the end of
5302 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5311 /* Quickly dispose of a common case. */
5312 if (XEXP (ad, 0) == frame_pointer_rtx
5313 && CONST_INT_P (XEXP (ad, 1)))
5321 fmt = GET_RTX_FORMAT (code);
5322 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5324 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5328 /* Compute the sum of X and Y, making canonicalizations assumed in an
5329 address, namely: sum constant integers, surround the sum of two
5330 constants with a CONST, put the constant as the second operand, and
5331 group the constant on the outermost sum.
5333 This routine assumes both inputs are already in canonical form. */
5336 form_sum (enum machine_mode mode, rtx x, rtx y)
5340 gcc_assert (GET_MODE (x) == mode || GET_MODE (x) == VOIDmode);
5341 gcc_assert (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode);
5343 if (CONST_INT_P (x))
5344 return plus_constant (y, INTVAL (x));
5345 else if (CONST_INT_P (y))
5346 return plus_constant (x, INTVAL (y));
5347 else if (CONSTANT_P (x))
5348 tem = x, x = y, y = tem;
5350 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5351 return form_sum (mode, XEXP (x, 0), form_sum (mode, XEXP (x, 1), y));
5353 /* Note that if the operands of Y are specified in the opposite
5354 order in the recursive calls below, infinite recursion will occur. */
5355 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5356 return form_sum (mode, form_sum (mode, x, XEXP (y, 0)), XEXP (y, 1));
5358 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5359 constant will have been placed second. */
5360 if (CONSTANT_P (x) && CONSTANT_P (y))
5362 if (GET_CODE (x) == CONST)
5364 if (GET_CODE (y) == CONST)
5367 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5370 return gen_rtx_PLUS (mode, x, y);
5373 /* If ADDR is a sum containing a pseudo register that should be
5374 replaced with a constant (from reg_equiv_constant),
5375 return the result of doing so, and also apply the associative
5376 law so that the result is more likely to be a valid address.
5377 (But it is not guaranteed to be one.)
5379 Note that at most one register is replaced, even if more are
5380 replaceable. Also, we try to put the result into a canonical form
5381 so it is more likely to be a valid address.
5383 In all other cases, return ADDR. */
5386 subst_indexed_address (rtx addr)
5388 rtx op0 = 0, op1 = 0, op2 = 0;
5392 if (GET_CODE (addr) == PLUS)
5394 /* Try to find a register to replace. */
5395 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5397 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5398 && reg_renumber[regno] < 0
5399 && reg_equiv_constant (regno) != 0)
5400 op0 = reg_equiv_constant (regno);
5401 else if (REG_P (op1)
5402 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5403 && reg_renumber[regno] < 0
5404 && reg_equiv_constant (regno) != 0)
5405 op1 = reg_equiv_constant (regno);
5406 else if (GET_CODE (op0) == PLUS
5407 && (tem = subst_indexed_address (op0)) != op0)
5409 else if (GET_CODE (op1) == PLUS
5410 && (tem = subst_indexed_address (op1)) != op1)
5415 /* Pick out up to three things to add. */
5416 if (GET_CODE (op1) == PLUS)
5417 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5418 else if (GET_CODE (op0) == PLUS)
5419 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5421 /* Compute the sum. */
5423 op1 = form_sum (GET_MODE (addr), op1, op2);
5425 op0 = form_sum (GET_MODE (addr), op0, op1);
5432 /* Update the REG_INC notes for an insn. It updates all REG_INC
5433 notes for the instruction which refer to REGNO the to refer
5434 to the reload number.
5436 INSN is the insn for which any REG_INC notes need updating.
5438 REGNO is the register number which has been reloaded.
5440 RELOADNUM is the reload number. */
5443 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5444 int reloadnum ATTRIBUTE_UNUSED)
5449 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5450 if (REG_NOTE_KIND (link) == REG_INC
5451 && (int) REGNO (XEXP (link, 0)) == regno)
5452 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5456 /* Record the pseudo registers we must reload into hard registers in a
5457 subexpression of a would-be memory address, X referring to a value
5458 in mode MODE. (This function is not called if the address we find
5461 CONTEXT = 1 means we are considering regs as index regs,
5462 = 0 means we are considering them as base regs.
5463 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5465 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5466 is the code of the index part of the address. Otherwise, pass SCRATCH
5468 OPNUM and TYPE specify the purpose of any reloads made.
5470 IND_LEVELS says how many levels of indirect addressing are
5471 supported at this point in the address.
5473 INSN, if nonzero, is the insn in which we do the reload. It is used
5474 to determine if we may generate output reloads.
5476 We return nonzero if X, as a whole, is reloaded or replaced. */
5478 /* Note that we take shortcuts assuming that no multi-reg machine mode
5479 occurs as part of an address.
5480 Also, this is not fully machine-customizable; it works for machines
5481 such as VAXen and 68000's and 32000's, but other possible machines
5482 could have addressing modes that this does not handle right.
5483 If you add push_reload calls here, you need to make sure gen_reload
5484 handles those cases gracefully. */
5487 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5488 enum rtx_code outer_code, enum rtx_code index_code,
5489 rtx *loc, int opnum, enum reload_type type,
5490 int ind_levels, rtx insn)
5492 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5494 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5495 : REGNO_OK_FOR_INDEX_P (REGNO))
5497 enum reg_class context_reg_class;
5498 RTX_CODE code = GET_CODE (x);
5501 context_reg_class = INDEX_REG_CLASS;
5503 context_reg_class = base_reg_class (mode, outer_code, index_code);
5509 rtx orig_op0 = XEXP (x, 0);
5510 rtx orig_op1 = XEXP (x, 1);
5511 RTX_CODE code0 = GET_CODE (orig_op0);
5512 RTX_CODE code1 = GET_CODE (orig_op1);
5516 if (GET_CODE (op0) == SUBREG)
5518 op0 = SUBREG_REG (op0);
5519 code0 = GET_CODE (op0);
5520 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5521 op0 = gen_rtx_REG (word_mode,
5523 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5524 GET_MODE (SUBREG_REG (orig_op0)),
5525 SUBREG_BYTE (orig_op0),
5526 GET_MODE (orig_op0))));
5529 if (GET_CODE (op1) == SUBREG)
5531 op1 = SUBREG_REG (op1);
5532 code1 = GET_CODE (op1);
5533 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5534 /* ??? Why is this given op1's mode and above for
5535 ??? op0 SUBREGs we use word_mode? */
5536 op1 = gen_rtx_REG (GET_MODE (op1),
5538 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5539 GET_MODE (SUBREG_REG (orig_op1)),
5540 SUBREG_BYTE (orig_op1),
5541 GET_MODE (orig_op1))));
5543 /* Plus in the index register may be created only as a result of
5544 register rematerialization for expression like &localvar*4. Reload it.
5545 It may be possible to combine the displacement on the outer level,
5546 but it is probably not worthwhile to do so. */
5549 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5550 opnum, ADDR_TYPE (type), ind_levels, insn);
5551 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5553 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5557 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5558 || code0 == ZERO_EXTEND || code1 == MEM)
5560 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5561 &XEXP (x, 0), opnum, type, ind_levels,
5563 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5564 &XEXP (x, 1), opnum, type, ind_levels,
5568 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5569 || code1 == ZERO_EXTEND || code0 == MEM)
5571 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5572 &XEXP (x, 0), opnum, type, ind_levels,
5574 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5575 &XEXP (x, 1), opnum, type, ind_levels,
5579 else if (code0 == CONST_INT || code0 == CONST
5580 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5581 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5582 &XEXP (x, 1), opnum, type, ind_levels,
5585 else if (code1 == CONST_INT || code1 == CONST
5586 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5587 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5588 &XEXP (x, 0), opnum, type, ind_levels,
5591 else if (code0 == REG && code1 == REG)
5593 if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5594 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5596 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5597 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5599 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5600 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5601 &XEXP (x, 1), opnum, type, ind_levels,
5603 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5604 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5605 &XEXP (x, 0), opnum, type, ind_levels,
5607 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5608 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5609 &XEXP (x, 0), opnum, type, ind_levels,
5611 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5612 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5613 &XEXP (x, 1), opnum, type, ind_levels,
5617 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5618 &XEXP (x, 0), opnum, type, ind_levels,
5620 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5621 &XEXP (x, 1), opnum, type, ind_levels,
5626 else if (code0 == REG)
5628 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5629 &XEXP (x, 0), opnum, type, ind_levels,
5631 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5632 &XEXP (x, 1), opnum, type, ind_levels,
5636 else if (code1 == REG)
5638 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5639 &XEXP (x, 1), opnum, type, ind_levels,
5641 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5642 &XEXP (x, 0), opnum, type, ind_levels,
5652 rtx op0 = XEXP (x, 0);
5653 rtx op1 = XEXP (x, 1);
5654 enum rtx_code index_code;
5658 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5661 /* Currently, we only support {PRE,POST}_MODIFY constructs
5662 where a base register is {inc,dec}remented by the contents
5663 of another register or by a constant value. Thus, these
5664 operands must match. */
5665 gcc_assert (op0 == XEXP (op1, 0));
5667 /* Require index register (or constant). Let's just handle the
5668 register case in the meantime... If the target allows
5669 auto-modify by a constant then we could try replacing a pseudo
5670 register with its equivalent constant where applicable.
5672 We also handle the case where the register was eliminated
5673 resulting in a PLUS subexpression.
5675 If we later decide to reload the whole PRE_MODIFY or
5676 POST_MODIFY, inc_for_reload might clobber the reload register
5677 before reading the index. The index register might therefore
5678 need to live longer than a TYPE reload normally would, so be
5679 conservative and class it as RELOAD_OTHER. */
5680 if ((REG_P (XEXP (op1, 1))
5681 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5682 || GET_CODE (XEXP (op1, 1)) == PLUS)
5683 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5684 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5687 gcc_assert (REG_P (XEXP (op1, 0)));
5689 regno = REGNO (XEXP (op1, 0));
5690 index_code = GET_CODE (XEXP (op1, 1));
5692 /* A register that is incremented cannot be constant! */
5693 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5694 || reg_equiv_constant (regno) == 0);
5696 /* Handle a register that is equivalent to a memory location
5697 which cannot be addressed directly. */
5698 if (reg_equiv_memory_loc (regno) != 0
5699 && (reg_equiv_address (regno) != 0
5700 || num_not_at_initial_offset))
5702 rtx tem = make_memloc (XEXP (x, 0), regno);
5704 if (reg_equiv_address (regno)
5705 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5709 /* First reload the memory location's address.
5710 We can't use ADDR_TYPE (type) here, because we need to
5711 write back the value after reading it, hence we actually
5712 need two registers. */
5713 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5714 &XEXP (tem, 0), opnum,
5718 if (!rtx_equal_p (tem, orig))
5719 push_reg_equiv_alt_mem (regno, tem);
5721 /* Then reload the memory location into a base
5723 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5725 base_reg_class (mode, code,
5727 GET_MODE (x), GET_MODE (x), 0,
5728 0, opnum, RELOAD_OTHER);
5730 update_auto_inc_notes (this_insn, regno, reloadnum);
5735 if (reg_renumber[regno] >= 0)
5736 regno = reg_renumber[regno];
5738 /* We require a base register here... */
5739 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5741 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5742 &XEXP (op1, 0), &XEXP (x, 0),
5743 base_reg_class (mode, code, index_code),
5744 GET_MODE (x), GET_MODE (x), 0, 0,
5745 opnum, RELOAD_OTHER);
5747 update_auto_inc_notes (this_insn, regno, reloadnum);
5757 if (REG_P (XEXP (x, 0)))
5759 int regno = REGNO (XEXP (x, 0));
5763 /* A register that is incremented cannot be constant! */
5764 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5765 || reg_equiv_constant (regno) == 0);
5767 /* Handle a register that is equivalent to a memory location
5768 which cannot be addressed directly. */
5769 if (reg_equiv_memory_loc (regno) != 0
5770 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5772 rtx tem = make_memloc (XEXP (x, 0), regno);
5773 if (reg_equiv_address (regno)
5774 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5778 /* First reload the memory location's address.
5779 We can't use ADDR_TYPE (type) here, because we need to
5780 write back the value after reading it, hence we actually
5781 need two registers. */
5782 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5783 &XEXP (tem, 0), opnum, type,
5785 if (!rtx_equal_p (tem, orig))
5786 push_reg_equiv_alt_mem (regno, tem);
5787 /* Put this inside a new increment-expression. */
5788 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5789 /* Proceed to reload that, as if it contained a register. */
5793 /* If we have a hard register that is ok in this incdec context,
5794 don't make a reload. If the register isn't nice enough for
5795 autoincdec, we can reload it. But, if an autoincrement of a
5796 register that we here verified as playing nice, still outside
5797 isn't "valid", it must be that no autoincrement is "valid".
5798 If that is true and something made an autoincrement anyway,
5799 this must be a special context where one is allowed.
5800 (For example, a "push" instruction.)
5801 We can't improve this address, so leave it alone. */
5803 /* Otherwise, reload the autoincrement into a suitable hard reg
5804 and record how much to increment by. */
5806 if (reg_renumber[regno] >= 0)
5807 regno = reg_renumber[regno];
5808 if (regno >= FIRST_PSEUDO_REGISTER
5809 || !REG_OK_FOR_CONTEXT (context, regno, mode, code,
5814 /* If we can output the register afterwards, do so, this
5815 saves the extra update.
5816 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5817 CALL_INSN - and it does not set CC0.
5818 But don't do this if we cannot directly address the
5819 memory location, since this will make it harder to
5820 reuse address reloads, and increases register pressure.
5821 Also don't do this if we can probably update x directly. */
5822 rtx equiv = (MEM_P (XEXP (x, 0))
5824 : reg_equiv_mem (regno));
5825 enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
5826 if (insn && NONJUMP_INSN_P (insn) && equiv
5827 && memory_operand (equiv, GET_MODE (equiv))
5829 && ! sets_cc0_p (PATTERN (insn))
5831 && ! (icode != CODE_FOR_nothing
5832 && insn_operand_matches (icode, 0, equiv)
5833 && insn_operand_matches (icode, 1, equiv)))
5835 /* We use the original pseudo for loc, so that
5836 emit_reload_insns() knows which pseudo this
5837 reload refers to and updates the pseudo rtx, not
5838 its equivalent memory location, as well as the
5839 corresponding entry in reg_last_reload_reg. */
5840 loc = &XEXP (x_orig, 0);
5843 = push_reload (x, x, loc, loc,
5845 GET_MODE (x), GET_MODE (x), 0, 0,
5846 opnum, RELOAD_OTHER);
5851 = push_reload (x, x, loc, (rtx*) 0,
5853 GET_MODE (x), GET_MODE (x), 0, 0,
5856 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5861 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5871 /* Look for parts to reload in the inner expression and reload them
5872 too, in addition to this operation. Reloading all inner parts in
5873 addition to this one shouldn't be necessary, but at this point,
5874 we don't know if we can possibly omit any part that *can* be
5875 reloaded. Targets that are better off reloading just either part
5876 (or perhaps even a different part of an outer expression), should
5877 define LEGITIMIZE_RELOAD_ADDRESS. */
5878 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5879 context, code, SCRATCH, &XEXP (x, 0), opnum,
5880 type, ind_levels, insn);
5881 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5883 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5887 /* This is probably the result of a substitution, by eliminate_regs, of
5888 an equivalent address for a pseudo that was not allocated to a hard
5889 register. Verify that the specified address is valid and reload it
5892 Since we know we are going to reload this item, don't decrement for
5893 the indirection level.
5895 Note that this is actually conservative: it would be slightly more
5896 efficient to use the value of SPILL_INDIRECT_LEVELS from
5899 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5900 opnum, ADDR_TYPE (type), ind_levels, insn);
5901 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5903 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5908 int regno = REGNO (x);
5910 if (reg_equiv_constant (regno) != 0)
5912 find_reloads_address_part (reg_equiv_constant (regno), loc,
5914 GET_MODE (x), opnum, type, ind_levels);
5918 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5919 that feeds this insn. */
5920 if (reg_equiv_mem (regno) != 0)
5922 push_reload (reg_equiv_mem (regno), NULL_RTX, loc, (rtx*) 0,
5924 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5929 if (reg_equiv_memory_loc (regno)
5930 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5932 rtx tem = make_memloc (x, regno);
5933 if (reg_equiv_address (regno) != 0
5934 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5937 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5938 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5940 if (!rtx_equal_p (x, tem))
5941 push_reg_equiv_alt_mem (regno, x);
5945 if (reg_renumber[regno] >= 0)
5946 regno = reg_renumber[regno];
5948 if (regno >= FIRST_PSEUDO_REGISTER
5949 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5952 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5954 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5958 /* If a register appearing in an address is the subject of a CLOBBER
5959 in this insn, reload it into some other register to be safe.
5960 The CLOBBER is supposed to make the register unavailable
5961 from before this insn to after it. */
5962 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5964 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5966 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5973 if (REG_P (SUBREG_REG (x)))
5975 /* If this is a SUBREG of a hard register and the resulting register
5976 is of the wrong class, reload the whole SUBREG. This avoids
5977 needless copies if SUBREG_REG is multi-word. */
5978 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5980 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5982 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5985 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5987 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5991 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5992 is larger than the class size, then reload the whole SUBREG. */
5995 enum reg_class rclass = context_reg_class;
5996 if ((unsigned) CLASS_MAX_NREGS (rclass, GET_MODE (SUBREG_REG (x)))
5997 > reg_class_size[rclass])
5999 x = find_reloads_subreg_address (x, 0, opnum,
6001 ind_levels, insn, NULL);
6002 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6003 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
6015 const char *fmt = GET_RTX_FORMAT (code);
6018 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6021 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6023 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
6024 &XEXP (x, i), opnum, type, ind_levels, insn);
6028 #undef REG_OK_FOR_CONTEXT
6032 /* X, which is found at *LOC, is a part of an address that needs to be
6033 reloaded into a register of class RCLASS. If X is a constant, or if
6034 X is a PLUS that contains a constant, check that the constant is a
6035 legitimate operand and that we are supposed to be able to load
6036 it into the register.
6038 If not, force the constant into memory and reload the MEM instead.
6040 MODE is the mode to use, in case X is an integer constant.
6042 OPNUM and TYPE describe the purpose of any reloads made.
6044 IND_LEVELS says how many levels of indirect addressing this machine
6048 find_reloads_address_part (rtx x, rtx *loc, enum reg_class rclass,
6049 enum machine_mode mode, int opnum,
6050 enum reload_type type, int ind_levels)
6053 && (!targetm.legitimate_constant_p (mode, x)
6054 || targetm.preferred_reload_class (x, rclass) == NO_REGS))
6056 x = force_const_mem (mode, x);
6057 find_reloads_address (mode, &x, XEXP (x, 0), &XEXP (x, 0),
6058 opnum, type, ind_levels, 0);
6061 else if (GET_CODE (x) == PLUS
6062 && CONSTANT_P (XEXP (x, 1))
6063 && (!targetm.legitimate_constant_p (GET_MODE (x), XEXP (x, 1))
6064 || targetm.preferred_reload_class (XEXP (x, 1), rclass)
6069 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
6070 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
6071 find_reloads_address (mode, &XEXP (x, 1), XEXP (tem, 0), &XEXP (tem, 0),
6072 opnum, type, ind_levels, 0);
6075 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6076 mode, VOIDmode, 0, 0, opnum, type);
6079 /* X, a subreg of a pseudo, is a part of an address that needs to be
6082 If the pseudo is equivalent to a memory location that cannot be directly
6083 addressed, make the necessary address reloads.
6085 If address reloads have been necessary, or if the address is changed
6086 by register elimination, return the rtx of the memory location;
6087 otherwise, return X.
6089 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
6092 OPNUM and TYPE identify the purpose of the reload.
6094 IND_LEVELS says how many levels of indirect addressing are
6095 supported at this point in the address.
6097 INSN, if nonzero, is the insn in which we do the reload. It is used
6098 to determine where to put USEs for pseudos that we have to replace with
6102 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
6103 enum reload_type type, int ind_levels, rtx insn,
6104 int *address_reloaded)
6106 int regno = REGNO (SUBREG_REG (x));
6109 if (reg_equiv_memory_loc (regno))
6111 /* If the address is not directly addressable, or if the address is not
6112 offsettable, then it must be replaced. */
6114 && (reg_equiv_address (regno)
6115 || ! offsettable_memref_p (reg_equiv_mem (regno))))
6118 if (force_replace || num_not_at_initial_offset)
6120 rtx tem = make_memloc (SUBREG_REG (x), regno);
6122 /* If the address changes because of register elimination, then
6123 it must be replaced. */
6125 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
6127 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
6128 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6132 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6133 hold the correct (negative) byte offset. */
6134 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6135 offset = inner_size - outer_size;
6137 offset = SUBREG_BYTE (x);
6139 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6140 PUT_MODE (tem, GET_MODE (x));
6141 if (MEM_OFFSET (tem))
6142 set_mem_offset (tem, plus_constant (MEM_OFFSET (tem), offset));
6144 && INTVAL (MEM_SIZE (tem)) != (HOST_WIDE_INT) outer_size)
6145 set_mem_size (tem, GEN_INT (outer_size));
6147 /* If this was a paradoxical subreg that we replaced, the
6148 resulting memory must be sufficiently aligned to allow
6149 us to widen the mode of the memory. */
6150 if (outer_size > inner_size)
6154 base = XEXP (tem, 0);
6155 if (GET_CODE (base) == PLUS)
6157 if (CONST_INT_P (XEXP (base, 1))
6158 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6160 base = XEXP (base, 0);
6163 || (REGNO_POINTER_ALIGN (REGNO (base))
6164 < outer_size * BITS_PER_UNIT))
6168 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6169 XEXP (tem, 0), &XEXP (tem, 0),
6170 opnum, type, ind_levels, insn);
6171 /* ??? Do we need to handle nonzero offsets somehow? */
6172 if (!offset && !rtx_equal_p (tem, orig))
6173 push_reg_equiv_alt_mem (regno, tem);
6175 /* For some processors an address may be valid in the
6176 original mode but not in a smaller mode. For
6177 example, ARM accepts a scaled index register in
6178 SImode but not in HImode. Note that this is only
6179 a problem if the address in reg_equiv_mem is already
6180 invalid in the new mode; other cases would be fixed
6181 by find_reloads_address as usual.
6183 ??? We attempt to handle such cases here by doing an
6184 additional reload of the full address after the
6185 usual processing by find_reloads_address. Note that
6186 this may not work in the general case, but it seems
6187 to cover the cases where this situation currently
6188 occurs. A more general fix might be to reload the
6189 *value* instead of the address, but this would not
6190 be expected by the callers of this routine as-is.
6192 If find_reloads_address already completed replaced
6193 the address, there is nothing further to do. */
6195 && reg_equiv_mem (regno) != 0
6196 && !strict_memory_address_addr_space_p
6197 (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0),
6198 MEM_ADDR_SPACE (reg_equiv_mem (regno))))
6200 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6201 base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6202 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6206 /* If this is not a toplevel operand, find_reloads doesn't see
6207 this substitution. We have to emit a USE of the pseudo so
6208 that delete_output_reload can see it. */
6209 if (replace_reloads && recog_data.operand[opnum] != x)
6210 /* We mark the USE with QImode so that we recognize it
6211 as one that can be safely deleted at the end of
6213 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6220 if (reloaded && address_reloaded)
6221 *address_reloaded = 1;
6226 /* Substitute into the current INSN the registers into which we have reloaded
6227 the things that need reloading. The array `replacements'
6228 contains the locations of all pointers that must be changed
6229 and says what to replace them with.
6231 Return the rtx that X translates into; usually X, but modified. */
6234 subst_reloads (rtx insn)
6238 for (i = 0; i < n_replacements; i++)
6240 struct replacement *r = &replacements[i];
6241 rtx reloadreg = rld[r->what].reg_rtx;
6245 /* This checking takes a very long time on some platforms
6246 causing the gcc.c-torture/compile/limits-fnargs.c test
6247 to time out during testing. See PR 31850.
6249 Internal consistency test. Check that we don't modify
6250 anything in the equivalence arrays. Whenever something from
6251 those arrays needs to be reloaded, it must be unshared before
6252 being substituted into; the equivalence must not be modified.
6253 Otherwise, if the equivalence is used after that, it will
6254 have been modified, and the thing substituted (probably a
6255 register) is likely overwritten and not a usable equivalence. */
6258 for (check_regno = 0; check_regno < max_regno; check_regno++)
6260 #define CHECK_MODF(ARRAY) \
6261 gcc_assert (!VEC_index (reg_equivs_t, reg_equivs, check_regno).ARRAY \
6262 || !loc_mentioned_in_p (r->where, \
6263 VEC_index (reg_equivs_t, reg_equivs, check_regno).ARRAY))
6265 CHECK_MODF (equiv_constant);
6266 CHECK_MODF (equiv_memory_loc);
6267 CHECK_MODF (equiv_address);
6268 CHECK_MODF (equiv_mem);
6271 #endif /* DEBUG_RELOAD */
6273 /* If we're replacing a LABEL_REF with a register, there must
6274 already be an indication (to e.g. flow) which label this
6275 register refers to. */
6276 gcc_assert (GET_CODE (*r->where) != LABEL_REF
6278 || find_reg_note (insn,
6280 XEXP (*r->where, 0))
6281 || label_is_jump_target_p (XEXP (*r->where, 0), insn));
6283 /* Encapsulate RELOADREG so its machine mode matches what
6284 used to be there. Note that gen_lowpart_common will
6285 do the wrong thing if RELOADREG is multi-word. RELOADREG
6286 will always be a REG here. */
6287 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6288 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6290 /* If we are putting this into a SUBREG and RELOADREG is a
6291 SUBREG, we would be making nested SUBREGs, so we have to fix
6292 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6294 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6296 if (GET_MODE (*r->subreg_loc)
6297 == GET_MODE (SUBREG_REG (reloadreg)))
6298 *r->subreg_loc = SUBREG_REG (reloadreg);
6302 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6304 /* When working with SUBREGs the rule is that the byte
6305 offset must be a multiple of the SUBREG's mode. */
6306 final_offset = (final_offset /
6307 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6308 final_offset = (final_offset *
6309 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6311 *r->where = SUBREG_REG (reloadreg);
6312 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6316 *r->where = reloadreg;
6318 /* If reload got no reg and isn't optional, something's wrong. */
6320 gcc_assert (rld[r->what].optional);
6324 /* Make a copy of any replacements being done into X and move those
6325 copies to locations in Y, a copy of X. */
6328 copy_replacements (rtx x, rtx y)
6330 /* We can't support X being a SUBREG because we might then need to know its
6331 location if something inside it was replaced. */
6332 gcc_assert (GET_CODE (x) != SUBREG);
6334 copy_replacements_1 (&x, &y, n_replacements);
6338 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6342 struct replacement *r;
6346 for (j = 0; j < orig_replacements; j++)
6348 if (replacements[j].subreg_loc == px)
6350 r = &replacements[n_replacements++];
6351 r->where = replacements[j].where;
6353 r->what = replacements[j].what;
6354 r->mode = replacements[j].mode;
6356 else if (replacements[j].where == px)
6358 r = &replacements[n_replacements++];
6361 r->what = replacements[j].what;
6362 r->mode = replacements[j].mode;
6368 code = GET_CODE (x);
6369 fmt = GET_RTX_FORMAT (code);
6371 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6374 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6375 else if (fmt[i] == 'E')
6376 for (j = XVECLEN (x, i); --j >= 0; )
6377 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6382 /* Change any replacements being done to *X to be done to *Y. */
6385 move_replacements (rtx *x, rtx *y)
6389 for (i = 0; i < n_replacements; i++)
6390 if (replacements[i].subreg_loc == x)
6391 replacements[i].subreg_loc = y;
6392 else if (replacements[i].where == x)
6394 replacements[i].where = y;
6395 replacements[i].subreg_loc = 0;
6399 /* If LOC was scheduled to be replaced by something, return the replacement.
6400 Otherwise, return *LOC. */
6403 find_replacement (rtx *loc)
6405 struct replacement *r;
6407 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6409 rtx reloadreg = rld[r->what].reg_rtx;
6411 if (reloadreg && r->where == loc)
6413 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6414 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6418 else if (reloadreg && r->subreg_loc == loc)
6420 /* RELOADREG must be either a REG or a SUBREG.
6422 ??? Is it actually still ever a SUBREG? If so, why? */
6424 if (REG_P (reloadreg))
6425 return gen_rtx_REG (GET_MODE (*loc),
6426 (REGNO (reloadreg) +
6427 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6428 GET_MODE (SUBREG_REG (*loc)),
6431 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6435 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6437 /* When working with SUBREGs the rule is that the byte
6438 offset must be a multiple of the SUBREG's mode. */
6439 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6440 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6441 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6447 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6448 what's inside and make a new rtl if so. */
6449 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6450 || GET_CODE (*loc) == MULT)
6452 rtx x = find_replacement (&XEXP (*loc, 0));
6453 rtx y = find_replacement (&XEXP (*loc, 1));
6455 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6456 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6462 /* Return nonzero if register in range [REGNO, ENDREGNO)
6463 appears either explicitly or implicitly in X
6464 other than being stored into (except for earlyclobber operands).
6466 References contained within the substructure at LOC do not count.
6467 LOC may be zero, meaning don't ignore anything.
6469 This is similar to refers_to_regno_p in rtlanal.c except that we
6470 look at equivalences for pseudos that didn't get hard registers. */
6473 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6485 code = GET_CODE (x);
6492 /* If this is a pseudo, a hard register must not have been allocated.
6493 X must therefore either be a constant or be in memory. */
6494 if (r >= FIRST_PSEUDO_REGISTER)
6496 if (reg_equiv_memory_loc (r))
6497 return refers_to_regno_for_reload_p (regno, endregno,
6498 reg_equiv_memory_loc (r),
6501 gcc_assert (reg_equiv_constant (r) || reg_equiv_invariant (r));
6505 return (endregno > r
6506 && regno < r + (r < FIRST_PSEUDO_REGISTER
6507 ? hard_regno_nregs[r][GET_MODE (x)]
6511 /* If this is a SUBREG of a hard reg, we can see exactly which
6512 registers are being modified. Otherwise, handle normally. */
6513 if (REG_P (SUBREG_REG (x))
6514 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6516 unsigned int inner_regno = subreg_regno (x);
6517 unsigned int inner_endregno
6518 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6519 ? subreg_nregs (x) : 1);
6521 return endregno > inner_regno && regno < inner_endregno;
6527 if (&SET_DEST (x) != loc
6528 /* Note setting a SUBREG counts as referring to the REG it is in for
6529 a pseudo but not for hard registers since we can
6530 treat each word individually. */
6531 && ((GET_CODE (SET_DEST (x)) == SUBREG
6532 && loc != &SUBREG_REG (SET_DEST (x))
6533 && REG_P (SUBREG_REG (SET_DEST (x)))
6534 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6535 && refers_to_regno_for_reload_p (regno, endregno,
6536 SUBREG_REG (SET_DEST (x)),
6538 /* If the output is an earlyclobber operand, this is
6540 || ((!REG_P (SET_DEST (x))
6541 || earlyclobber_operand_p (SET_DEST (x)))
6542 && refers_to_regno_for_reload_p (regno, endregno,
6543 SET_DEST (x), loc))))
6546 if (code == CLOBBER || loc == &SET_SRC (x))
6555 /* X does not match, so try its subexpressions. */
6557 fmt = GET_RTX_FORMAT (code);
6558 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6560 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6568 if (refers_to_regno_for_reload_p (regno, endregno,
6572 else if (fmt[i] == 'E')
6575 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6576 if (loc != &XVECEXP (x, i, j)
6577 && refers_to_regno_for_reload_p (regno, endregno,
6578 XVECEXP (x, i, j), loc))
6585 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6586 we check if any register number in X conflicts with the relevant register
6587 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6588 contains a MEM (we don't bother checking for memory addresses that can't
6589 conflict because we expect this to be a rare case.
6591 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6592 that we look at equivalences for pseudos that didn't get hard registers. */
6595 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6597 int regno, endregno;
6599 /* Overly conservative. */
6600 if (GET_CODE (x) == STRICT_LOW_PART
6601 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6604 /* If either argument is a constant, then modifying X can not affect IN. */
6605 if (CONSTANT_P (x) || CONSTANT_P (in))
6607 else if (GET_CODE (x) == SUBREG && MEM_P (SUBREG_REG (x)))
6608 return refers_to_mem_for_reload_p (in);
6609 else if (GET_CODE (x) == SUBREG)
6611 regno = REGNO (SUBREG_REG (x));
6612 if (regno < FIRST_PSEUDO_REGISTER)
6613 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6614 GET_MODE (SUBREG_REG (x)),
6617 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6618 ? subreg_nregs (x) : 1);
6620 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6626 /* If this is a pseudo, it must not have been assigned a hard register.
6627 Therefore, it must either be in memory or be a constant. */
6629 if (regno >= FIRST_PSEUDO_REGISTER)
6631 if (reg_equiv_memory_loc (regno))
6632 return refers_to_mem_for_reload_p (in);
6633 gcc_assert (reg_equiv_constant (regno));
6637 endregno = END_HARD_REGNO (x);
6639 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6642 return refers_to_mem_for_reload_p (in);
6643 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6644 || GET_CODE (x) == CC0)
6645 return reg_mentioned_p (x, in);
6648 gcc_assert (GET_CODE (x) == PLUS);
6650 /* We actually want to know if X is mentioned somewhere inside IN.
6651 We must not say that (plus (sp) (const_int 124)) is in
6652 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6653 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6654 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6659 else if (GET_CODE (in) == PLUS)
6660 return (rtx_equal_p (x, in)
6661 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6662 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6663 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6664 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6670 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6674 refers_to_mem_for_reload_p (rtx x)
6683 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6684 && reg_equiv_memory_loc (REGNO (x)));
6686 fmt = GET_RTX_FORMAT (GET_CODE (x));
6687 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6689 && (MEM_P (XEXP (x, i))
6690 || refers_to_mem_for_reload_p (XEXP (x, i))))
6696 /* Check the insns before INSN to see if there is a suitable register
6697 containing the same value as GOAL.
6698 If OTHER is -1, look for a register in class RCLASS.
6699 Otherwise, just see if register number OTHER shares GOAL's value.
6701 Return an rtx for the register found, or zero if none is found.
6703 If RELOAD_REG_P is (short *)1,
6704 we reject any hard reg that appears in reload_reg_rtx
6705 because such a hard reg is also needed coming into this insn.
6707 If RELOAD_REG_P is any other nonzero value,
6708 it is a vector indexed by hard reg number
6709 and we reject any hard reg whose element in the vector is nonnegative
6710 as well as any that appears in reload_reg_rtx.
6712 If GOAL is zero, then GOALREG is a register number; we look
6713 for an equivalent for that register.
6715 MODE is the machine mode of the value we want an equivalence for.
6716 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6718 This function is used by jump.c as well as in the reload pass.
6720 If GOAL is the sum of the stack pointer and a constant, we treat it
6721 as if it were a constant except that sp is required to be unchanging. */
6724 find_equiv_reg (rtx goal, rtx insn, enum reg_class rclass, int other,
6725 short *reload_reg_p, int goalreg, enum machine_mode mode)
6728 rtx goaltry, valtry, value, where;
6734 int goal_mem_addr_varies = 0;
6735 int need_stable_sp = 0;
6742 else if (REG_P (goal))
6743 regno = REGNO (goal);
6744 else if (MEM_P (goal))
6746 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6747 if (MEM_VOLATILE_P (goal))
6749 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6751 /* An address with side effects must be reexecuted. */
6766 else if (CONSTANT_P (goal))
6768 else if (GET_CODE (goal) == PLUS
6769 && XEXP (goal, 0) == stack_pointer_rtx
6770 && CONSTANT_P (XEXP (goal, 1)))
6771 goal_const = need_stable_sp = 1;
6772 else if (GET_CODE (goal) == PLUS
6773 && XEXP (goal, 0) == frame_pointer_rtx
6774 && CONSTANT_P (XEXP (goal, 1)))
6780 /* Scan insns back from INSN, looking for one that copies
6781 a value into or out of GOAL.
6782 Stop and give up if we reach a label. */
6787 if (p && DEBUG_INSN_P (p))
6790 if (p == 0 || LABEL_P (p)
6791 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6794 /* Don't reuse register contents from before a setjmp-type
6795 function call; on the second return (from the longjmp) it
6796 might have been clobbered by a later reuse. It doesn't
6797 seem worthwhile to actually go and see if it is actually
6798 reused even if that information would be readily available;
6799 just don't reuse it across the setjmp call. */
6800 if (CALL_P (p) && find_reg_note (p, REG_SETJMP, NULL_RTX))
6803 if (NONJUMP_INSN_P (p)
6804 /* If we don't want spill regs ... */
6805 && (! (reload_reg_p != 0
6806 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6807 /* ... then ignore insns introduced by reload; they aren't
6808 useful and can cause results in reload_as_needed to be
6809 different from what they were when calculating the need for
6810 spills. If we notice an input-reload insn here, we will
6811 reject it below, but it might hide a usable equivalent.
6812 That makes bad code. It may even fail: perhaps no reg was
6813 spilled for this insn because it was assumed we would find
6815 || INSN_UID (p) < reload_first_uid))
6818 pat = single_set (p);
6820 /* First check for something that sets some reg equal to GOAL. */
6823 && true_regnum (SET_SRC (pat)) == regno
6824 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6827 && true_regnum (SET_DEST (pat)) == regno
6828 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6830 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6831 /* When looking for stack pointer + const,
6832 make sure we don't use a stack adjust. */
6833 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6834 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6836 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6837 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6839 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6840 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6841 /* If we are looking for a constant,
6842 and something equivalent to that constant was copied
6843 into a reg, we can use that reg. */
6844 || (goal_const && REG_NOTES (p) != 0
6845 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6846 && ((rtx_equal_p (XEXP (tem, 0), goal)
6848 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6849 || (REG_P (SET_DEST (pat))
6850 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6851 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6852 && CONST_INT_P (goal)
6854 = operand_subword (XEXP (tem, 0), 0, 0,
6856 && rtx_equal_p (goal, goaltry)
6858 = operand_subword (SET_DEST (pat), 0, 0,
6860 && (valueno = true_regnum (valtry)) >= 0)))
6861 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6863 && REG_P (SET_DEST (pat))
6864 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6865 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6866 && CONST_INT_P (goal)
6867 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6869 && rtx_equal_p (goal, goaltry)
6871 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6872 && (valueno = true_regnum (valtry)) >= 0)))
6876 if (valueno != other)
6879 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6881 else if (!in_hard_reg_set_p (reg_class_contents[(int) rclass],
6891 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6892 (or copying VALUE into GOAL, if GOAL is also a register).
6893 Now verify that VALUE is really valid. */
6895 /* VALUENO is the register number of VALUE; a hard register. */
6897 /* Don't try to re-use something that is killed in this insn. We want
6898 to be able to trust REG_UNUSED notes. */
6899 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6902 /* If we propose to get the value from the stack pointer or if GOAL is
6903 a MEM based on the stack pointer, we need a stable SP. */
6904 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6905 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6909 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6910 if (GET_MODE (value) != mode)
6913 /* Reject VALUE if it was loaded from GOAL
6914 and is also a register that appears in the address of GOAL. */
6916 if (goal_mem && value == SET_DEST (single_set (where))
6917 && refers_to_regno_for_reload_p (valueno, end_hard_regno (mode, valueno),
6921 /* Reject registers that overlap GOAL. */
6923 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6924 nregs = hard_regno_nregs[regno][mode];
6927 valuenregs = hard_regno_nregs[valueno][mode];
6929 if (!goal_mem && !goal_const
6930 && regno + nregs > valueno && regno < valueno + valuenregs)
6933 /* Reject VALUE if it is one of the regs reserved for reloads.
6934 Reload1 knows how to reuse them anyway, and it would get
6935 confused if we allocated one without its knowledge.
6936 (Now that insns introduced by reload are ignored above,
6937 this case shouldn't happen, but I'm not positive.) */
6939 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6942 for (i = 0; i < valuenregs; ++i)
6943 if (reload_reg_p[valueno + i] >= 0)
6947 /* Reject VALUE if it is a register being used for an input reload
6948 even if it is not one of those reserved. */
6950 if (reload_reg_p != 0)
6953 for (i = 0; i < n_reloads; i++)
6954 if (rld[i].reg_rtx != 0 && rld[i].in)
6956 int regno1 = REGNO (rld[i].reg_rtx);
6957 int nregs1 = hard_regno_nregs[regno1]
6958 [GET_MODE (rld[i].reg_rtx)];
6959 if (regno1 < valueno + valuenregs
6960 && regno1 + nregs1 > valueno)
6966 /* We must treat frame pointer as varying here,
6967 since it can vary--in a nonlocal goto as generated by expand_goto. */
6968 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6970 /* Now verify that the values of GOAL and VALUE remain unaltered
6971 until INSN is reached. */
6980 /* Don't trust the conversion past a function call
6981 if either of the two is in a call-clobbered register, or memory. */
6986 if (goal_mem || need_stable_sp)
6989 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6990 for (i = 0; i < nregs; ++i)
6991 if (call_used_regs[regno + i]
6992 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6995 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6996 for (i = 0; i < valuenregs; ++i)
6997 if (call_used_regs[valueno + i]
6998 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
7006 /* Watch out for unspec_volatile, and volatile asms. */
7007 if (volatile_insn_p (pat))
7010 /* If this insn P stores in either GOAL or VALUE, return 0.
7011 If GOAL is a memory ref and this insn writes memory, return 0.
7012 If GOAL is a memory ref and its address is not constant,
7013 and this insn P changes a register used in GOAL, return 0. */
7015 if (GET_CODE (pat) == COND_EXEC)
7016 pat = COND_EXEC_CODE (pat);
7017 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
7019 rtx dest = SET_DEST (pat);
7020 while (GET_CODE (dest) == SUBREG
7021 || GET_CODE (dest) == ZERO_EXTRACT
7022 || GET_CODE (dest) == STRICT_LOW_PART)
7023 dest = XEXP (dest, 0);
7026 int xregno = REGNO (dest);
7028 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
7029 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
7032 if (xregno < regno + nregs && xregno + xnregs > regno)
7034 if (xregno < valueno + valuenregs
7035 && xregno + xnregs > valueno)
7037 if (goal_mem_addr_varies
7038 && reg_overlap_mentioned_for_reload_p (dest, goal))
7040 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
7043 else if (goal_mem && MEM_P (dest)
7044 && ! push_operand (dest, GET_MODE (dest)))
7046 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
7047 && reg_equiv_memory_loc (regno) != 0)
7049 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
7052 else if (GET_CODE (pat) == PARALLEL)
7055 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
7057 rtx v1 = XVECEXP (pat, 0, i);
7058 if (GET_CODE (v1) == COND_EXEC)
7059 v1 = COND_EXEC_CODE (v1);
7060 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
7062 rtx dest = SET_DEST (v1);
7063 while (GET_CODE (dest) == SUBREG
7064 || GET_CODE (dest) == ZERO_EXTRACT
7065 || GET_CODE (dest) == STRICT_LOW_PART)
7066 dest = XEXP (dest, 0);
7069 int xregno = REGNO (dest);
7071 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
7072 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
7075 if (xregno < regno + nregs
7076 && xregno + xnregs > regno)
7078 if (xregno < valueno + valuenregs
7079 && xregno + xnregs > valueno)
7081 if (goal_mem_addr_varies
7082 && reg_overlap_mentioned_for_reload_p (dest,
7085 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
7088 else if (goal_mem && MEM_P (dest)
7089 && ! push_operand (dest, GET_MODE (dest)))
7091 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
7092 && reg_equiv_memory_loc (regno) != 0)
7094 else if (need_stable_sp
7095 && push_operand (dest, GET_MODE (dest)))
7101 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
7105 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
7106 link = XEXP (link, 1))
7108 pat = XEXP (link, 0);
7109 if (GET_CODE (pat) == CLOBBER)
7111 rtx dest = SET_DEST (pat);
7115 int xregno = REGNO (dest);
7117 = hard_regno_nregs[xregno][GET_MODE (dest)];
7119 if (xregno < regno + nregs
7120 && xregno + xnregs > regno)
7122 else if (xregno < valueno + valuenregs
7123 && xregno + xnregs > valueno)
7125 else if (goal_mem_addr_varies
7126 && reg_overlap_mentioned_for_reload_p (dest,
7131 else if (goal_mem && MEM_P (dest)
7132 && ! push_operand (dest, GET_MODE (dest)))
7134 else if (need_stable_sp
7135 && push_operand (dest, GET_MODE (dest)))
7142 /* If this insn auto-increments or auto-decrements
7143 either regno or valueno, return 0 now.
7144 If GOAL is a memory ref and its address is not constant,
7145 and this insn P increments a register used in GOAL, return 0. */
7149 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7150 if (REG_NOTE_KIND (link) == REG_INC
7151 && REG_P (XEXP (link, 0)))
7153 int incno = REGNO (XEXP (link, 0));
7154 if (incno < regno + nregs && incno >= regno)
7156 if (incno < valueno + valuenregs && incno >= valueno)
7158 if (goal_mem_addr_varies
7159 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7169 /* Find a place where INCED appears in an increment or decrement operator
7170 within X, and return the amount INCED is incremented or decremented by.
7171 The value is always positive. */
7174 find_inc_amount (rtx x, rtx inced)
7176 enum rtx_code code = GET_CODE (x);
7182 rtx addr = XEXP (x, 0);
7183 if ((GET_CODE (addr) == PRE_DEC
7184 || GET_CODE (addr) == POST_DEC
7185 || GET_CODE (addr) == PRE_INC
7186 || GET_CODE (addr) == POST_INC)
7187 && XEXP (addr, 0) == inced)
7188 return GET_MODE_SIZE (GET_MODE (x));
7189 else if ((GET_CODE (addr) == PRE_MODIFY
7190 || GET_CODE (addr) == POST_MODIFY)
7191 && GET_CODE (XEXP (addr, 1)) == PLUS
7192 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7193 && XEXP (addr, 0) == inced
7194 && CONST_INT_P (XEXP (XEXP (addr, 1), 1)))
7196 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7197 return i < 0 ? -i : i;
7201 fmt = GET_RTX_FORMAT (code);
7202 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7206 int tem = find_inc_amount (XEXP (x, i), inced);
7213 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7215 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7225 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7226 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7230 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7237 if (! INSN_P (insn))
7240 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7241 if (REG_NOTE_KIND (link) == REG_INC)
7243 unsigned int test = (int) REGNO (XEXP (link, 0));
7244 if (test >= regno && test < endregno)
7251 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7255 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7256 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7257 REG_INC. REGNO must refer to a hard register. */
7260 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7263 unsigned int nregs, endregno;
7265 /* regno must be a hard register. */
7266 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7268 nregs = hard_regno_nregs[regno][mode];
7269 endregno = regno + nregs;
7271 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7272 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7273 && REG_P (XEXP (PATTERN (insn), 0)))
7275 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7277 return test >= regno && test < endregno;
7280 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7283 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7285 int i = XVECLEN (PATTERN (insn), 0) - 1;
7289 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7290 if ((GET_CODE (elt) == CLOBBER
7291 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7292 && REG_P (XEXP (elt, 0)))
7294 unsigned int test = REGNO (XEXP (elt, 0));
7296 if (test >= regno && test < endregno)
7300 && reg_inc_found_and_valid_p (regno, endregno, elt))
7308 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7310 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7314 if (GET_MODE (reloadreg) == mode)
7317 regno = REGNO (reloadreg);
7319 if (WORDS_BIG_ENDIAN)
7320 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7321 - (int) hard_regno_nregs[regno][mode];
7323 return gen_rtx_REG (mode, regno);
7326 static const char *const reload_when_needed_name[] =
7329 "RELOAD_FOR_OUTPUT",
7331 "RELOAD_FOR_INPUT_ADDRESS",
7332 "RELOAD_FOR_INPADDR_ADDRESS",
7333 "RELOAD_FOR_OUTPUT_ADDRESS",
7334 "RELOAD_FOR_OUTADDR_ADDRESS",
7335 "RELOAD_FOR_OPERAND_ADDRESS",
7336 "RELOAD_FOR_OPADDR_ADDR",
7338 "RELOAD_FOR_OTHER_ADDRESS"
7341 /* These functions are used to print the variables set by 'find_reloads' */
7344 debug_reload_to_stream (FILE *f)
7351 for (r = 0; r < n_reloads; r++)
7353 fprintf (f, "Reload %d: ", r);
7357 fprintf (f, "reload_in (%s) = ",
7358 GET_MODE_NAME (rld[r].inmode));
7359 print_inline_rtx (f, rld[r].in, 24);
7360 fprintf (f, "\n\t");
7363 if (rld[r].out != 0)
7365 fprintf (f, "reload_out (%s) = ",
7366 GET_MODE_NAME (rld[r].outmode));
7367 print_inline_rtx (f, rld[r].out, 24);
7368 fprintf (f, "\n\t");
7371 fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
7373 fprintf (f, "%s (opnum = %d)",
7374 reload_when_needed_name[(int) rld[r].when_needed],
7377 if (rld[r].optional)
7378 fprintf (f, ", optional");
7380 if (rld[r].nongroup)
7381 fprintf (f, ", nongroup");
7383 if (rld[r].inc != 0)
7384 fprintf (f, ", inc by %d", rld[r].inc);
7386 if (rld[r].nocombine)
7387 fprintf (f, ", can't combine");
7389 if (rld[r].secondary_p)
7390 fprintf (f, ", secondary_reload_p");
7392 if (rld[r].in_reg != 0)
7394 fprintf (f, "\n\treload_in_reg: ");
7395 print_inline_rtx (f, rld[r].in_reg, 24);
7398 if (rld[r].out_reg != 0)
7400 fprintf (f, "\n\treload_out_reg: ");
7401 print_inline_rtx (f, rld[r].out_reg, 24);
7404 if (rld[r].reg_rtx != 0)
7406 fprintf (f, "\n\treload_reg_rtx: ");
7407 print_inline_rtx (f, rld[r].reg_rtx, 24);
7411 if (rld[r].secondary_in_reload != -1)
7413 fprintf (f, "%ssecondary_in_reload = %d",
7414 prefix, rld[r].secondary_in_reload);
7418 if (rld[r].secondary_out_reload != -1)
7419 fprintf (f, "%ssecondary_out_reload = %d\n",
7420 prefix, rld[r].secondary_out_reload);
7423 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7425 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7426 insn_data[rld[r].secondary_in_icode].name);
7430 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7431 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7432 insn_data[rld[r].secondary_out_icode].name);
7441 debug_reload_to_stream (stderr);