1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_strict_low char; currently always zero; used to mean that this
117 reload is inside a STRICT_LOW_PART, but we don't
118 need to know this anymore.
119 reload_optional char, nonzero for an optional reload.
120 Optional reloads are ignored unless the
121 value is already sitting in a register.
122 reload_inc int, positive amount to increment or decrement by if
123 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
124 Ignored otherwise (don't assume it is zero).
125 reload_in_reg rtx. A reg for which reload_in is the equivalent.
126 If reload_in is a symbol_ref which came from
127 reg_equiv_constant, then this is the pseudo
128 which has that symbol_ref as equivalent.
129 reload_reg_rtx rtx. This is the register to reload into.
130 If it is zero when `find_reloads' returns,
131 you must find a suitable register in the class
132 specified by reload_reg_class, and store here
133 an rtx for that register with mode from
134 reload_inmode or reload_outmode.
135 reload_nocombine char, nonzero if this reload shouldn't be
136 combined with another reload.
137 reload_needed_for rtx, operand this reload is needed for address of.
138 0 means it isn't needed for addressing.
139 reload_needed_for_multiple
140 int, 1 if this reload needed for more than one thing.
141 reload_when_needed enum, classifies reload as needed either for
142 addressing an input reload, addressing an output,
143 for addressing a non-reloaded mem ref,
144 or for unspecified purposes (i.e., more than one
146 reload_secondary_reload int, gives the reload number of a secondary
147 reload, when needed; otherwise -1
148 reload_secondary_p int, 1 if this is a secondary register for one
150 reload_secondary_icode enum insn_code, if a secondary reload is required,
151 gives the INSN_CODE that uses the secondary
152 reload as a scratch register, or CODE_FOR_nothing
153 if the secondary reload register is to be an
154 intermediate register. */
157 rtx reload_in[MAX_RELOADS];
158 rtx reload_out[MAX_RELOADS];
159 enum reg_class reload_reg_class[MAX_RELOADS];
160 enum machine_mode reload_inmode[MAX_RELOADS];
161 enum machine_mode reload_outmode[MAX_RELOADS];
162 char reload_strict_low[MAX_RELOADS];
163 rtx reload_reg_rtx[MAX_RELOADS];
164 char reload_optional[MAX_RELOADS];
165 int reload_inc[MAX_RELOADS];
166 rtx reload_in_reg[MAX_RELOADS];
167 char reload_nocombine[MAX_RELOADS];
168 int reload_needed_for_multiple[MAX_RELOADS];
169 rtx reload_needed_for[MAX_RELOADS];
170 enum reload_when_needed reload_when_needed[MAX_RELOADS];
171 int reload_secondary_reload[MAX_RELOADS];
172 int reload_secondary_p[MAX_RELOADS];
173 enum insn_code reload_secondary_icode[MAX_RELOADS];
175 /* All the "earlyclobber" operands of the current insn
176 are recorded here. */
178 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
180 /* Replacing reloads.
182 If `replace_reloads' is nonzero, then as each reload is recorded
183 an entry is made for it in the table `replacements'.
184 Then later `subst_reloads' can look through that table and
185 perform all the replacements needed. */
187 /* Nonzero means record the places to replace. */
188 static int replace_reloads;
190 /* Each replacement is recorded with a structure like this. */
193 rtx *where; /* Location to store in */
194 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
195 a SUBREG; 0 otherwise. */
196 int what; /* which reload this is for */
197 enum machine_mode mode; /* mode it must have */
200 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
202 /* Number of replacements currently recorded. */
203 static int n_replacements;
205 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
206 (see reg_equiv_address). */
207 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
208 static int n_memlocs;
210 /* The instruction we are doing reloads for;
211 so we can test whether a register dies in it. */
212 static rtx this_insn;
214 /* Nonzero if this instruction is a user-specified asm with operands. */
215 static int this_insn_is_asm;
217 /* If hard_regs_live_known is nonzero,
218 we can tell which hard regs are currently live,
219 at least enough to succeed in choosing dummy reloads. */
220 static int hard_regs_live_known;
222 /* Indexed by hard reg number,
223 element is nonegative if hard reg has been spilled.
224 This vector is passed to `find_reloads' as an argument
225 and is not changed here. */
226 static short *static_reload_reg_p;
228 /* Set to 1 in subst_reg_equivs if it changes anything. */
229 static int subst_reg_equivs_changed;
231 /* On return from push_reload, holds the reload-number for the OUT
232 operand, which can be different for that from the input operand. */
233 static int output_reloadnum;
235 static int alternative_allows_memconst ();
236 static rtx find_dummy_reload ();
237 static rtx find_reloads_toplev ();
238 static int find_reloads_address ();
239 static int find_reloads_address_1 ();
240 static void find_reloads_address_part ();
241 static int hard_reg_set_here_p ();
242 /* static rtx forget_volatility (); */
243 static rtx subst_reg_equivs ();
244 static rtx subst_indexed_address ();
245 rtx find_equiv_reg ();
246 static int find_inc_amount ();
248 #ifdef HAVE_SECONDARY_RELOADS
250 /* Determine if any secondary reloads are needed for loading (if IN_P is
251 non-zero) or storing (if IN_P is zero) X to or from a reload register of
252 register class RELOAD_CLASS in mode RELOAD_MODE.
254 Return the register class of a secondary reload register, or NO_REGS if
255 none. *PMODE is set to the mode that the register is required in.
256 If the reload register is needed as a scratch register instead of an
257 intermediate register, *PICODE is set to the insn_code of the insn to be
258 used to load or store the primary reload register; otherwise *PICODE
259 is set to CODE_FOR_nothing.
261 In some cases (such as storing MQ into an external memory location on
262 the RT), both an intermediate register and a scratch register. In that
263 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
264 register is returned, and the *PTERTIARY_... variables are set to describe
265 the scratch register. */
267 static enum reg_class
268 find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
269 ptertiary_class, ptertiary_icode, ptertiary_mode)
271 enum reg_class reload_class;
272 enum machine_mode reload_mode;
274 enum insn_code *picode;
275 enum machine_mode *pmode;
276 enum reg_class *ptertiary_class;
277 enum insn_code *ptertiary_icode;
278 enum machine_mode *ptertiary_mode;
280 enum reg_class class = NO_REGS;
281 enum machine_mode mode = reload_mode;
282 enum insn_code icode = CODE_FOR_nothing;
283 enum reg_class t_class = NO_REGS;
284 enum machine_mode t_mode = VOIDmode;
285 enum insn_code t_icode = CODE_FOR_nothing;
287 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
288 is still a pseudo-register by now, it *must* have an equivalent MEM
289 but we don't want to assume that), use that equivalent when seeing if
290 a secondary reload is needed since whether or not a reload is needed
291 might be sensitive to the form of the MEM. */
293 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
294 && reg_equiv_mem[REGNO (x)] != 0)
295 x = reg_equiv_mem[REGNO (x)];
297 #ifdef SECONDARY_INPUT_RELOAD_CLASS
299 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
302 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
304 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
307 /* If we don't need any secondary registers, go away; the rest of the
308 values won't be used. */
309 if (class == NO_REGS)
312 /* Get a possible insn to use. If the predicate doesn't accept X, don't
315 icode = (in_p ? reload_in_optab[(int) reload_mode]
316 : reload_out_optab[(int) reload_mode]);
318 if (icode != CODE_FOR_nothing
319 && insn_operand_predicate[(int) icode][in_p]
320 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
321 icode = CODE_FOR_nothing;
323 /* If we will be using an insn, see if it can directly handle the reload
324 register we will be using. If it can, the secondary reload is for a
325 scratch register. If it can't, we will use the secondary reload for
326 an intermediate register and require a tertiary reload for the scratch
329 if (icode != CODE_FOR_nothing)
331 /* If IN_P is non-zero, the reload register will be the output in
332 operand 0. If IN_P is zero, the reload register will be the input
333 in operand 1. Outputs should have an initial "=", which we must
336 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
337 enum reg_class insn_class
338 = (insn_letter == 'r' ? GENERAL_REGS
339 : REG_CLASS_FROM_LETTER (insn_letter));
341 if (insn_class == NO_REGS
342 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
343 /* The scratch register's constraint must start with "=&". */
344 || insn_operand_constraint[(int) icode][2][0] != '='
345 || insn_operand_constraint[(int) icode][2][1] != '&')
348 if (reg_class_subset_p (reload_class, insn_class))
349 mode = insn_operand_mode[(int) icode][2];
352 char t_letter = insn_operand_constraint[(int) icode][2][2];
354 t_mode = insn_operand_mode[(int) icode][2];
355 t_class = (t_letter == 'r' ? GENERAL_REGS
356 : REG_CLASS_FROM_LETTER (t_letter));
358 icode = CODE_FOR_nothing;
364 *ptertiary_class = t_class;
365 *ptertiary_mode = t_mode;
366 *ptertiary_icode = t_icode;
370 #endif /* HAVE_SECONDARY_RELOADS */
372 /* Record one (sometimes two) reload that needs to be performed.
373 IN is an rtx saying where the data are to be found before this instruction.
374 OUT says where they must be stored after the instruction.
375 (IN is zero for data not read, and OUT is zero for data not written.)
376 INLOC and OUTLOC point to the places in the instructions where
377 IN and OUT were found.
378 CLASS is a register class required for the reloaded data.
379 INMODE is the machine mode that the instruction requires
380 for the reg that replaces IN and OUTMODE is likewise for OUT.
382 If IN is zero, then OUT's location and mode should be passed as
385 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
387 OPTIONAL nonzero means this reload does not need to be performed:
388 it can be discarded if that is more convenient.
390 The return value is the reload-number for this reload.
392 If both IN and OUT are nonzero, in some rare cases we might
393 want to make two separate reloads. (Actually we never do this now.)
394 Therefore, the reload-number for OUT is stored in
395 output_reloadnum when we return; the return value applies to IN.
396 Usually (presently always), when IN and OUT are nonzero,
397 the two reload-numbers are equal, but the caller should be careful to
401 push_reload (in, out, inloc, outloc, class,
402 inmode, outmode, strict_low, optional, needed_for)
403 register rtx in, out;
405 enum reg_class class;
406 enum machine_mode inmode, outmode;
413 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
414 int secondary_reload = -1;
415 enum insn_code secondary_icode = CODE_FOR_nothing;
417 /* Compare two RTX's. */
418 #define MATCHES(x, y) \
419 (x == y || (x != 0 && (GET_CODE (x) == REG \
420 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
421 : rtx_equal_p (x, y) && ! side_effects_p (x))))
423 /* INMODE and/or OUTMODE could be VOIDmode if no mode
424 has been specified for the operand. In that case,
425 use the operand's mode as the mode to reload. */
426 if (inmode == VOIDmode && in != 0)
427 inmode = GET_MODE (in);
428 if (outmode == VOIDmode && out != 0)
429 outmode = GET_MODE (out);
431 /* If IN is a pseudo register everywhere-equivalent to a constant, and
432 it is not in a hard register, reload straight from the constant,
433 since we want to get rid of such pseudo registers.
434 Often this is done earlier, but not always in find_reloads_address. */
435 if (in != 0 && GET_CODE (in) == REG)
437 register int regno = REGNO (in);
439 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
440 && reg_equiv_constant[regno] != 0)
441 in = reg_equiv_constant[regno];
444 /* Likewise for OUT. Of course, OUT will never be equivalent to
445 an actual constant, but it might be equivalent to a memory location
446 (in the case of a parameter). */
447 if (out != 0 && GET_CODE (out) == REG)
449 register int regno = REGNO (out);
451 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
452 && reg_equiv_constant[regno] != 0)
453 out = reg_equiv_constant[regno];
456 /* If we have a read-write operand with an address side-effect,
457 change either IN or OUT so the side-effect happens only once. */
458 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
460 if (GET_CODE (XEXP (in, 0)) == POST_INC
461 || GET_CODE (XEXP (in, 0)) == POST_DEC)
462 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
463 if (GET_CODE (XEXP (in, 0)) == PRE_INC
464 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
465 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
468 /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
469 really reload just the inside expression in its own mode.
470 If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
471 register is a pseudo, this will become the same as the above case.
472 Do the same for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
473 either M1 is not valid for R or M2 is wider than a word but we only
474 need one word to store an M2-sized quantity in R.
475 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
476 we can't handle it here because CONST_INT does not indicate a mode.
478 Similarly, we must reload the inside expression if we have a
479 STRICT_LOW_PART (presumably, in == out in the cas). */
481 if (in != 0 && GET_CODE (in) == SUBREG
482 && (GET_CODE (SUBREG_REG (in)) != REG
484 || (GET_CODE (SUBREG_REG (in)) == REG
485 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER
486 && (GET_MODE_SIZE (inmode)
487 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))))
488 || (GET_CODE (SUBREG_REG (in)) == REG
489 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
490 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
491 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
492 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
494 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
496 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
497 GET_MODE (SUBREG_REG (in)))))))))
499 in_subreg_loc = inloc;
500 inloc = &SUBREG_REG (in);
502 if (GET_CODE (in) == MEM)
503 /* This is supposed to happen only for paradoxical subregs made by
504 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
505 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
507 inmode = GET_MODE (in);
510 /* Similarly for paradoxical and problematical SUBREGs on the output.
511 Note that there is no reason we need worry about the previous value
512 of SUBREG_REG (out); even if wider than out,
513 storing in a subreg is entitled to clobber it all
514 (except in the case of STRICT_LOW_PART,
515 and in that case the constraint should label it input-output.) */
516 if (out != 0 && GET_CODE (out) == SUBREG
517 && (GET_CODE (SUBREG_REG (out)) != REG
519 || (GET_CODE (SUBREG_REG (out)) == REG
520 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER
521 && (GET_MODE_SIZE (outmode)
522 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))))
523 || (GET_CODE (SUBREG_REG (out)) == REG
524 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
525 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)), outmode)
526 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
527 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
529 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
531 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
532 GET_MODE (SUBREG_REG (out)))))))))
534 out_subreg_loc = outloc;
535 outloc = &SUBREG_REG (out);
537 if (GET_CODE (out) == MEM
538 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
540 outmode = GET_MODE (out);
543 /* That's all we use STRICT_LOW for, so clear it. At some point,
544 we may want to get rid of reload_strict_low. */
547 /* If IN appears in OUT, we can't share any input-only reload for IN. */
548 if (in != 0 && out != 0 && GET_CODE (out) == MEM
549 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
550 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
553 /* Narrow down the class of register wanted if that is
554 desirable on this machine for efficiency. */
556 class = PREFERRED_RELOAD_CLASS (in, class);
558 /* Make sure we use a class that can handle the actual pseudo
559 inside any subreg. For example, on the 386, QImode regs
560 can appear within SImode subregs. Although GENERAL_REGS
561 can handle SImode, QImode needs a smaller class. */
562 #ifdef LIMIT_RELOAD_CLASS
564 class = LIMIT_RELOAD_CLASS (inmode, class);
565 else if (in != 0 && GET_CODE (in) == SUBREG)
566 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
569 class = LIMIT_RELOAD_CLASS (outmode, class);
570 if (out != 0 && GET_CODE (out) == SUBREG)
571 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
574 if (class == NO_REGS)
577 /* Verify that this class is at least possible for the mode that
579 if (this_insn_is_asm)
581 enum machine_mode mode;
582 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
586 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
587 if (HARD_REGNO_MODE_OK (i, mode)
588 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
590 int nregs = HARD_REGNO_NREGS (i, mode);
593 for (j = 1; j < nregs; j++)
594 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
599 if (i == FIRST_PSEUDO_REGISTER)
601 error_for_asm (this_insn, "impossible register constraint in `asm'");
606 /* We can use an existing reload if the class is right
607 and at least one of IN and OUT is a match
608 and the other is at worst neutral.
609 (A zero compared against anything is neutral.) */
610 for (i = 0; i < n_reloads; i++)
611 if ((reg_class_subset_p (class, reload_reg_class[i])
612 || reg_class_subset_p (reload_reg_class[i], class))
613 && reload_strict_low[i] == strict_low
614 /* If the existing reload has a register, it must fit our class. */
615 && (reload_reg_rtx[i] == 0
616 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
617 true_regnum (reload_reg_rtx[i])))
618 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
619 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
621 (out != 0 && MATCHES (reload_out[i], out)
622 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))))
625 /* Reloading a plain reg for input can match a reload to postincrement
626 that reg, since the postincrement's value is the right value.
627 Likewise, it can match a preincrement reload, since we regard
628 the preincrementation as happening before any ref in this insn
631 for (i = 0; i < n_reloads; i++)
632 if ((reg_class_subset_p (class, reload_reg_class[i])
633 || reg_class_subset_p (reload_reg_class[i], class))
634 /* If the existing reload has a register, it must fit our class. */
635 && (reload_reg_rtx[i] == 0
636 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
637 true_regnum (reload_reg_rtx[i])))
638 && reload_strict_low[i] == strict_low
639 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
640 && ((GET_CODE (in) == REG
641 && (GET_CODE (reload_in[i]) == POST_INC
642 || GET_CODE (reload_in[i]) == POST_DEC
643 || GET_CODE (reload_in[i]) == PRE_INC
644 || GET_CODE (reload_in[i]) == PRE_DEC)
645 && MATCHES (XEXP (reload_in[i], 0), in))
647 (GET_CODE (reload_in[i]) == REG
648 && (GET_CODE (in) == POST_INC
649 || GET_CODE (in) == POST_DEC
650 || GET_CODE (in) == PRE_INC
651 || GET_CODE (in) == PRE_DEC)
652 && MATCHES (XEXP (in, 0), reload_in[i]))))
654 /* Make sure reload_in ultimately has the increment,
655 not the plain register. */
656 if (GET_CODE (in) == REG)
663 #ifdef HAVE_SECONDARY_RELOADS
664 enum reg_class secondary_class = NO_REGS;
665 enum reg_class secondary_out_class = NO_REGS;
666 enum machine_mode secondary_mode = inmode;
667 enum machine_mode secondary_out_mode = outmode;
668 enum insn_code secondary_icode;
669 enum insn_code secondary_out_icode = CODE_FOR_nothing;
670 enum reg_class tertiary_class = NO_REGS;
671 enum reg_class tertiary_out_class = NO_REGS;
672 enum machine_mode tertiary_mode;
673 enum machine_mode tertiary_out_mode;
674 enum insn_code tertiary_icode;
675 enum insn_code tertiary_out_icode = CODE_FOR_nothing;
676 int tertiary_reload = -1;
678 /* See if we need a secondary reload register to move between
679 CLASS and IN or CLASS and OUT. Get the modes and icodes to
680 use for each of them if so. */
682 #ifdef SECONDARY_INPUT_RELOAD_CLASS
685 = find_secondary_reload (in, class, inmode, 1, &secondary_icode,
686 &secondary_mode, &tertiary_class,
687 &tertiary_icode, &tertiary_mode);
690 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
691 if (out != 0 && GET_CODE (out) != SCRATCH)
693 = find_secondary_reload (out, class, outmode, 0,
694 &secondary_out_icode, &secondary_out_mode,
695 &tertiary_out_class, &tertiary_out_icode,
699 /* We can only record one secondary and one tertiary reload. If both
700 IN and OUT need secondary reloads, we can only make an in-out
701 reload if neither need an insn and if the classes are compatible. */
703 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
704 && reg_class_subset_p (secondary_out_class, secondary_class))
705 secondary_class = secondary_out_class;
707 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
708 && (! reg_class_subset_p (secondary_class, secondary_out_class)
709 || secondary_icode != CODE_FOR_nothing
710 || secondary_out_icode != CODE_FOR_nothing))
712 push_reload (0, out, 0, outloc, class, VOIDmode, outmode,
713 strict_low, optional, needed_for);
719 /* If we need a secondary reload for OUT but not IN, copy the
721 if (secondary_class == NO_REGS && secondary_out_class != NO_REGS)
723 secondary_class = secondary_out_class;
724 secondary_icode = secondary_out_icode;
725 tertiary_class = tertiary_out_class;
726 tertiary_icode = tertiary_out_icode;
727 tertiary_mode = tertiary_out_mode;
730 if (secondary_class != NO_REGS)
732 /* If we need a tertiary reload, see if we have one we can reuse
735 if (tertiary_class != NO_REGS)
737 for (tertiary_reload = 0; tertiary_reload < n_reloads;
739 if (reload_secondary_p[tertiary_reload]
740 && (reg_class_subset_p (tertiary_class,
741 reload_reg_class[tertiary_reload])
742 || reg_class_subset_p (reload_reg_class[tertiary_reload],
744 && ((reload_inmode[tertiary_reload] == tertiary_mode)
745 || reload_inmode[tertiary_reload] == VOIDmode)
746 && ((reload_outmode[tertiary_reload] == tertiary_mode)
747 || reload_outmode[tertiary_reload] == VOIDmode)
748 && (reload_secondary_icode[tertiary_reload]
749 == CODE_FOR_nothing))
752 if (tertiary_mode != VOIDmode)
753 reload_inmode[tertiary_reload] = tertiary_mode;
754 if (tertiary_out_mode != VOIDmode)
755 reload_outmode[tertiary_reload] = tertiary_mode;
756 if (reg_class_subset_p (tertiary_class,
757 reload_reg_class[tertiary_reload]))
758 reload_reg_class[tertiary_reload] = tertiary_class;
759 if (reload_needed_for[tertiary_reload] != needed_for)
760 reload_needed_for_multiple[tertiary_reload] = 1;
761 reload_optional[tertiary_reload] &= optional;
762 reload_secondary_p[tertiary_reload] = 1;
765 if (tertiary_reload == n_reloads)
767 /* We need to make a new tertiary reload for this register
769 reload_in[tertiary_reload] = reload_out[tertiary_reload] = 0;
770 reload_reg_class[tertiary_reload] = tertiary_class;
771 reload_inmode[tertiary_reload] = tertiary_mode;
772 reload_outmode[tertiary_reload] = tertiary_mode;
773 reload_reg_rtx[tertiary_reload] = 0;
774 reload_optional[tertiary_reload] = optional;
775 reload_inc[tertiary_reload] = 0;
776 reload_strict_low[tertiary_reload] = 0;
777 /* Maybe we could combine these, but it seems too tricky. */
778 reload_nocombine[tertiary_reload] = 1;
779 reload_in_reg[tertiary_reload] = 0;
780 reload_needed_for[tertiary_reload] = needed_for;
781 reload_needed_for_multiple[tertiary_reload] = 0;
782 reload_secondary_reload[tertiary_reload] = -1;
783 reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
784 reload_secondary_p[tertiary_reload] = 1;
791 /* See if we can reuse an existing secondary reload. */
792 for (secondary_reload = 0; secondary_reload < n_reloads;
794 if (reload_secondary_p[secondary_reload]
795 && (reg_class_subset_p (secondary_class,
796 reload_reg_class[secondary_reload])
797 || reg_class_subset_p (reload_reg_class[secondary_reload],
799 && ((reload_inmode[secondary_reload] == secondary_mode)
800 || reload_inmode[secondary_reload] == VOIDmode)
801 && ((reload_outmode[secondary_reload] == secondary_out_mode)
802 || reload_outmode[secondary_reload] == VOIDmode)
803 && reload_secondary_reload[secondary_reload] == tertiary_reload
804 && reload_secondary_icode[secondary_reload] == tertiary_icode)
806 if (secondary_mode != VOIDmode)
807 reload_inmode[secondary_reload] = secondary_mode;
808 if (secondary_out_mode != VOIDmode)
809 reload_outmode[secondary_reload] = secondary_out_mode;
810 if (reg_class_subset_p (secondary_class,
811 reload_reg_class[secondary_reload]))
812 reload_reg_class[secondary_reload] = secondary_class;
813 if (reload_needed_for[secondary_reload] != needed_for)
814 reload_needed_for_multiple[secondary_reload] = 1;
815 reload_optional[secondary_reload] &= optional;
816 reload_secondary_p[secondary_reload] = 1;
819 if (secondary_reload == n_reloads)
821 /* We need to make a new secondary reload for this register
823 reload_in[secondary_reload] = reload_out[secondary_reload] = 0;
824 reload_reg_class[secondary_reload] = secondary_class;
825 reload_inmode[secondary_reload] = secondary_mode;
826 reload_outmode[secondary_reload] = secondary_out_mode;
827 reload_reg_rtx[secondary_reload] = 0;
828 reload_optional[secondary_reload] = optional;
829 reload_inc[secondary_reload] = 0;
830 reload_strict_low[secondary_reload] = 0;
831 /* Maybe we could combine these, but it seems too tricky. */
832 reload_nocombine[secondary_reload] = 1;
833 reload_in_reg[secondary_reload] = 0;
834 reload_needed_for[secondary_reload] = needed_for;
835 reload_needed_for_multiple[secondary_reload] = 0;
836 reload_secondary_reload[secondary_reload] = tertiary_reload;
837 reload_secondary_icode[secondary_reload] = tertiary_icode;
838 reload_secondary_p[secondary_reload] = 1;
846 /* We found no existing reload suitable for re-use.
847 So add an additional reload. */
851 reload_reg_class[i] = class;
852 reload_inmode[i] = inmode;
853 reload_outmode[i] = outmode;
854 reload_reg_rtx[i] = 0;
855 reload_optional[i] = optional;
857 reload_strict_low[i] = strict_low;
858 reload_nocombine[i] = 0;
859 reload_in_reg[i] = inloc ? *inloc : 0;
860 reload_needed_for[i] = needed_for;
861 reload_needed_for_multiple[i] = 0;
862 reload_secondary_reload[i] = secondary_reload;
863 reload_secondary_icode[i] = secondary_icode;
864 reload_secondary_p[i] = 0;
870 /* We are reusing an existing reload,
871 but we may have additional information for it.
872 For example, we may now have both IN and OUT
873 while the old one may have just one of them. */
875 if (inmode != VOIDmode)
876 reload_inmode[i] = inmode;
877 if (outmode != VOIDmode)
878 reload_outmode[i] = outmode;
883 if (reg_class_subset_p (class, reload_reg_class[i]))
884 reload_reg_class[i] = class;
885 reload_optional[i] &= optional;
886 if (reload_needed_for[i] != needed_for)
887 reload_needed_for_multiple[i] = 1;
890 /* If the ostensible rtx being reload differs from the rtx found
891 in the location to substitute, this reload is not safe to combine
892 because we cannot reliably tell whether it appears in the insn. */
894 if (in != 0 && in != *inloc)
895 reload_nocombine[i] = 1;
898 /* This was replaced by changes in find_reloads_address_1 and the new
899 function inc_for_reload, which go with a new meaning of reload_inc. */
901 /* If this is an IN/OUT reload in an insn that sets the CC,
902 it must be for an autoincrement. It doesn't work to store
903 the incremented value after the insn because that would clobber the CC.
904 So we must do the increment of the value reloaded from,
905 increment it, store it back, then decrement again. */
906 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
910 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
911 /* If we did not find a nonzero amount-to-increment-by,
912 that contradicts the belief that IN is being incremented
913 in an address in this insn. */
914 if (reload_inc[i] == 0)
919 /* If we will replace IN and OUT with the reload-reg,
920 record where they are located so that substitution need
921 not do a tree walk. */
927 register struct replacement *r = &replacements[n_replacements++];
929 r->subreg_loc = in_subreg_loc;
933 if (outloc != 0 && outloc != inloc)
935 register struct replacement *r = &replacements[n_replacements++];
938 r->subreg_loc = out_subreg_loc;
943 /* If this reload is just being introduced and it has both
944 an incoming quantity and an outgoing quantity that are
945 supposed to be made to match, see if either one of the two
946 can serve as the place to reload into.
948 If one of them is acceptable, set reload_reg_rtx[i]
951 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
953 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
954 reload_reg_class[i], i);
956 /* If the outgoing register already contains the same value
957 as the incoming one, we can dispense with loading it.
958 The easiest way to tell the caller that is to give a phony
959 value for the incoming operand (same as outgoing one). */
960 if (reload_reg_rtx[i] == out
961 && (GET_CODE (in) == REG || CONSTANT_P (in))
962 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
963 static_reload_reg_p, i, inmode))
967 /* If this is an input reload and the operand contains a register that
968 dies in this insn and is used nowhere else, see if it is the right class
969 to be used for this reload. Use it if so. (This occurs most commonly
970 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
971 this if it is also an output reload that mentions the register unless
972 the output is a SUBREG that clobbers an entire register.
974 Note that the operand might be one of the spill regs, if it is a
975 pseudo reg and we are in a block where spilling has not taken place.
976 But if there is no spilling in this block, that is OK.
977 An explicitly used hard reg cannot be a spill reg. */
979 if (reload_reg_rtx[i] == 0 && in != 0)
984 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
985 if (REG_NOTE_KIND (note) == REG_DEAD
986 && GET_CODE (XEXP (note, 0)) == REG
987 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
988 && reg_mentioned_p (XEXP (note, 0), in)
989 && ! refers_to_regno_for_reload_p (regno,
991 + HARD_REGNO_NREGS (regno,
993 PATTERN (this_insn), inloc)
995 || (GET_CODE (in) == SUBREG
996 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
998 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
999 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1000 /* Make sure the operand fits in the reg that dies. */
1001 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1002 && HARD_REGNO_MODE_OK (regno, inmode)
1003 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1004 && HARD_REGNO_MODE_OK (regno, outmode)
1005 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1006 && !fixed_regs[regno])
1008 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1014 output_reloadnum = i;
1019 /* Record an additional place we must replace a value
1020 for which we have already recorded a reload.
1021 RELOADNUM is the value returned by push_reload
1022 when the reload was recorded.
1023 This is used in insn patterns that use match_dup. */
1026 push_replacement (loc, reloadnum, mode)
1029 enum machine_mode mode;
1031 if (replace_reloads)
1033 register struct replacement *r = &replacements[n_replacements++];
1034 r->what = reloadnum;
1041 /* If there is only one output reload, and it is not for an earlyclobber
1042 operand, try to combine it with a (logically unrelated) input reload
1043 to reduce the number of reload registers needed.
1045 This is safe if the input reload does not appear in
1046 the value being output-reloaded, because this implies
1047 it is not needed any more once the original insn completes.
1049 If that doesn't work, see we can use any of the registers that
1050 die in this insn as a reload register. We can if it is of the right
1051 class and does not appear in the value being output-reloaded. */
1057 int output_reload = -1;
1060 /* Find the output reload; return unless there is exactly one
1061 and that one is mandatory. */
1063 for (i = 0; i < n_reloads; i++)
1064 if (reload_out[i] != 0)
1066 if (output_reload >= 0)
1071 if (output_reload < 0 || reload_optional[output_reload])
1074 /* An input-output reload isn't combinable. */
1076 if (reload_in[output_reload] != 0)
1079 /* If this reload is for an earlyclobber operand, we can't do anything. */
1081 for (i = 0; i < n_earlyclobbers; i++)
1082 if (reload_out[output_reload] == reload_earlyclobbers[i])
1085 /* Check each input reload; can we combine it? */
1087 for (i = 0; i < n_reloads; i++)
1088 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1089 /* Life span of this reload must not extend past main insn. */
1090 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_RELOAD_ADDRESS
1091 && reload_inmode[i] == reload_outmode[output_reload]
1092 && reload_inc[i] == 0
1093 && reload_reg_rtx[i] == 0
1094 && reload_strict_low[i] == 0
1095 /* Don't combine two reloads with different secondary reloads. */
1096 && (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
1097 || reload_secondary_reload[i] == -1
1098 || reload_secondary_reload[output_reload] == -1)
1099 && (reg_class_subset_p (reload_reg_class[i],
1100 reload_reg_class[output_reload])
1101 || reg_class_subset_p (reload_reg_class[output_reload],
1102 reload_reg_class[i]))
1103 && (MATCHES (reload_in[i], reload_out[output_reload])
1104 /* Args reversed because the first arg seems to be
1105 the one that we imagine being modified
1106 while the second is the one that might be affected. */
1107 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1109 /* However, if the input is a register that appears inside
1110 the output, then we also can't share.
1111 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1112 If the same reload reg is used for both reg 69 and the
1113 result to be stored in memory, then that result
1114 will clobber the address of the memory ref. */
1115 && ! (GET_CODE (reload_in[i]) == REG
1116 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1117 reload_out[output_reload])))))
1121 /* We have found a reload to combine with! */
1122 reload_out[i] = reload_out[output_reload];
1123 reload_outmode[i] = reload_outmode[output_reload];
1124 /* Mark the old output reload as inoperative. */
1125 reload_out[output_reload] = 0;
1126 /* The combined reload is needed for the entire insn. */
1127 reload_needed_for_multiple[i] = 1;
1128 reload_when_needed[i] = RELOAD_OTHER;
1129 /* If the output reload had a secondary reload, copy it. */
1130 if (reload_secondary_reload[output_reload] != -1)
1131 reload_secondary_reload[i] = reload_secondary_reload[output_reload];
1132 /* If required, minimize the register class. */
1133 if (reg_class_subset_p (reload_reg_class[output_reload],
1134 reload_reg_class[i]))
1135 reload_reg_class[i] = reload_reg_class[output_reload];
1137 /* Transfer all replacements from the old reload to the combined. */
1138 for (j = 0; j < n_replacements; j++)
1139 if (replacements[j].what == output_reload)
1140 replacements[j].what = i;
1145 /* If this insn has only one operand that is modified or written (assumed
1146 to be the first), it must be the one corresponding to this reload. It
1147 is safe to use anything that dies in this insn for that output provided
1148 that it does not occur in the output (we already know it isn't an
1149 earlyclobber. If this is an asm insn, give up. */
1151 if (INSN_CODE (this_insn) == -1)
1154 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1155 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1156 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1159 /* See if some hard register that dies in this insn and is not used in
1160 the output is the right class. Only works if the register we pick
1161 up can fully hold our output reload. */
1162 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1163 if (REG_NOTE_KIND (note) == REG_DEAD
1164 && GET_CODE (XEXP (note, 0)) == REG
1165 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1166 reload_out[output_reload])
1167 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1168 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1169 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1170 REGNO (XEXP (note, 0)))
1171 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1172 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1173 && ! fixed_regs[REGNO (XEXP (note, 0))])
1175 reload_reg_rtx[output_reload] = gen_rtx (REG,
1176 reload_outmode[output_reload],
1177 REGNO (XEXP (note, 0)));
1182 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1183 See if one of IN and OUT is a register that may be used;
1184 this is desirable since a spill-register won't be needed.
1185 If so, return the register rtx that proves acceptable.
1187 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1188 CLASS is the register class required for the reload.
1190 If FOR_REAL is >= 0, it is the number of the reload,
1191 and in some cases when it can be discovered that OUT doesn't need
1192 to be computed, clear out reload_out[FOR_REAL].
1194 If FOR_REAL is -1, this should not be done, because this call
1195 is just to see if a register can be found, not to find and install it. */
1198 find_dummy_reload (real_in, real_out, inloc, outloc, class, for_real)
1199 rtx real_in, real_out;
1200 rtx *inloc, *outloc;
1201 enum reg_class class;
1210 /* If operands exceed a word, we can't use either of them
1211 unless they have the same size. */
1212 if (GET_MODE_SIZE (GET_MODE (real_out)) != GET_MODE_SIZE (GET_MODE (real_in))
1213 && (GET_MODE_SIZE (GET_MODE (real_out)) > UNITS_PER_WORD
1214 || GET_MODE_SIZE (GET_MODE (real_in)) > UNITS_PER_WORD))
1217 /* Find the inside of any subregs. */
1218 while (GET_CODE (out) == SUBREG)
1220 out_offset = SUBREG_WORD (out);
1221 out = SUBREG_REG (out);
1223 while (GET_CODE (in) == SUBREG)
1225 in_offset = SUBREG_WORD (in);
1226 in = SUBREG_REG (in);
1229 /* Narrow down the reg class, the same way push_reload will;
1230 otherwise we might find a dummy now, but push_reload won't. */
1231 class = PREFERRED_RELOAD_CLASS (in, class);
1233 /* See if OUT will do. */
1234 if (GET_CODE (out) == REG
1235 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1237 register int regno = REGNO (out) + out_offset;
1238 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_out));
1240 /* When we consider whether the insn uses OUT,
1241 ignore references within IN. They don't prevent us
1242 from copying IN into OUT, because those refs would
1243 move into the insn that reloads IN.
1245 However, we only ignore IN in its role as this reload.
1246 If the insn uses IN elsewhere and it contains OUT,
1247 that counts. We can't be sure it's the "same" operand
1248 so it might not go through this reload. */
1249 *inloc = const0_rtx;
1251 if (regno < FIRST_PSEUDO_REGISTER
1252 /* A fixed reg that can overlap other regs better not be used
1253 for reloading in any way. */
1254 #ifdef OVERLAPPING_REGNO_P
1255 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1257 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1258 PATTERN (this_insn), outloc))
1261 for (i = 0; i < nwords; i++)
1262 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1268 if (GET_CODE (real_out) == REG)
1271 value = gen_rtx (REG, GET_MODE (real_out), regno);
1278 /* Consider using IN if OUT was not acceptable
1279 or if OUT dies in this insn (like the quotient in a divmod insn).
1280 We can't use IN unless it is dies in this insn,
1281 which means we must know accurately which hard regs are live.
1282 Also, the result can't go in IN if IN is used within OUT. */
1283 if (hard_regs_live_known
1284 && GET_CODE (in) == REG
1285 && REGNO (in) < FIRST_PSEUDO_REGISTER
1287 || find_reg_note (this_insn, REG_UNUSED, real_out))
1288 && find_reg_note (this_insn, REG_DEAD, real_in)
1289 && !fixed_regs[REGNO (in)]
1290 && HARD_REGNO_MODE_OK (REGNO (in), GET_MODE (out)))
1292 register int regno = REGNO (in) + in_offset;
1293 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_in));
1295 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, 0)
1296 && ! hard_reg_set_here_p (regno, regno + nwords,
1297 PATTERN (this_insn)))
1300 for (i = 0; i < nwords; i++)
1301 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1307 /* If we were going to use OUT as the reload reg
1308 and changed our mind, it means OUT is a dummy that
1309 dies here. So don't bother copying value to it. */
1310 if (for_real >= 0 && value == real_out)
1311 reload_out[for_real] = 0;
1312 if (GET_CODE (real_in) == REG)
1315 value = gen_rtx (REG, GET_MODE (real_in), regno);
1323 /* This page contains subroutines used mainly for determining
1324 whether the IN or an OUT of a reload can serve as the
1327 /* Return 1 if expression X alters a hard reg in the range
1328 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1329 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1330 X should be the body of an instruction. */
1333 hard_reg_set_here_p (beg_regno, end_regno, x)
1334 register int beg_regno, end_regno;
1337 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1339 register rtx op0 = SET_DEST (x);
1340 while (GET_CODE (op0) == SUBREG)
1341 op0 = SUBREG_REG (op0);
1342 if (GET_CODE (op0) == REG)
1344 register int r = REGNO (op0);
1345 /* See if this reg overlaps range under consideration. */
1347 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1351 else if (GET_CODE (x) == PARALLEL)
1353 register int i = XVECLEN (x, 0) - 1;
1355 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1362 /* Return 1 if ADDR is a valid memory address for mode MODE,
1363 and check that each pseudo reg has the proper kind of
1367 strict_memory_address_p (mode, addr)
1368 enum machine_mode mode;
1371 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1379 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1380 if they are the same hard reg, and has special hacks for
1381 autoincrement and autodecrement.
1382 This is specifically intended for find_reloads to use
1383 in determining whether two operands match.
1384 X is the operand whose number is the lower of the two.
1386 The value is 2 if Y contains a pre-increment that matches
1387 a non-incrementing address in X. */
1389 /* ??? To be completely correct, we should arrange to pass
1390 for X the output operand and for Y the input operand.
1391 For now, we assume that the output operand has the lower number
1392 because that is natural in (SET output (... input ...)). */
1395 operands_match_p (x, y)
1399 register RTX_CODE code = GET_CODE (x);
1405 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1406 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1407 && GET_CODE (SUBREG_REG (y)) == REG)))
1413 i = REGNO (SUBREG_REG (x));
1414 if (i >= FIRST_PSEUDO_REGISTER)
1416 i += SUBREG_WORD (x);
1421 if (GET_CODE (y) == SUBREG)
1423 j = REGNO (SUBREG_REG (y));
1424 if (j >= FIRST_PSEUDO_REGISTER)
1426 j += SUBREG_WORD (y);
1433 /* If two operands must match, because they are really a single
1434 operand of an assembler insn, then two postincrements are invalid
1435 because the assembler insn would increment only once.
1436 On the other hand, an postincrement matches ordinary indexing
1437 if the postincrement is the output operand. */
1438 if (code == POST_DEC || code == POST_INC)
1439 return operands_match_p (XEXP (x, 0), y);
1440 /* Two preincrements are invalid
1441 because the assembler insn would increment only once.
1442 On the other hand, an preincrement matches ordinary indexing
1443 if the preincrement is the input operand.
1444 In this case, return 2, since some callers need to do special
1445 things when this happens. */
1446 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1447 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1451 /* Now we have disposed of all the cases
1452 in which different rtx codes can match. */
1453 if (code != GET_CODE (y))
1455 if (code == LABEL_REF)
1456 return XEXP (x, 0) == XEXP (y, 0);
1457 if (code == SYMBOL_REF)
1458 return XSTR (x, 0) == XSTR (y, 0);
1460 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1462 if (GET_MODE (x) != GET_MODE (y))
1465 /* Compare the elements. If any pair of corresponding elements
1466 fail to match, return 0 for the whole things. */
1469 fmt = GET_RTX_FORMAT (code);
1470 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1476 if (XINT (x, i) != XINT (y, i))
1481 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1484 /* If any subexpression returns 2,
1485 we should return 2 if we are successful. */
1493 /* It is believed that rtx's at this level will never
1494 contain anything but integers and other rtx's,
1495 except for within LABEL_REFs and SYMBOL_REFs. */
1500 return 1 + success_2;
1503 /* Return the number of times character C occurs in string S. */
1506 n_occurrences (c, s)
1516 struct decomposition
1525 /* Describe the range of registers or memory referenced by X.
1526 If X is a register, set REG_FLAG and put the first register
1527 number into START and the last plus one into END.
1528 If X is a memory reference, put a base address into BASE
1529 and a range of integer offsets into START and END.
1530 If X is pushing on the stack, we can assume it causes no trouble,
1531 so we set the SAFE field. */
1533 static struct decomposition
1537 struct decomposition val;
1542 if (GET_CODE (x) == MEM)
1544 rtx base, offset = 0;
1545 rtx addr = XEXP (x, 0);
1547 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1548 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1550 val.base = XEXP (addr, 0);
1551 val.start = - GET_MODE_SIZE (GET_MODE (x));
1552 val.end = GET_MODE_SIZE (GET_MODE (x));
1553 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1557 if (GET_CODE (addr) == CONST)
1559 addr = XEXP (addr, 0);
1562 if (GET_CODE (addr) == PLUS)
1564 if (CONSTANT_P (XEXP (addr, 0)))
1566 base = XEXP (addr, 1);
1567 offset = XEXP (addr, 0);
1569 else if (CONSTANT_P (XEXP (addr, 1)))
1571 base = XEXP (addr, 0);
1572 offset = XEXP (addr, 1);
1579 offset = const0_rtx;
1581 if (GET_CODE (offset) == CONST)
1582 offset = XEXP (offset, 0);
1583 if (GET_CODE (offset) == PLUS)
1585 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
1587 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
1588 offset = XEXP (offset, 0);
1590 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
1592 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
1593 offset = XEXP (offset, 1);
1597 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1598 offset = const0_rtx;
1601 else if (GET_CODE (offset) != CONST_INT)
1603 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1604 offset = const0_rtx;
1607 if (all_const && GET_CODE (base) == PLUS)
1608 base = gen_rtx (CONST, GET_MODE (base), base);
1610 if (GET_CODE (offset) != CONST_INT)
1613 val.start = INTVAL (offset);
1614 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
1618 else if (GET_CODE (x) == REG)
1621 val.start = true_regnum (x);
1624 /* A pseudo with no hard reg. */
1625 val.start = REGNO (x);
1626 val.end = val.start + 1;
1630 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1632 else if (GET_CODE (x) == SUBREG)
1634 if (GET_CODE (SUBREG_REG (x)) != REG)
1635 /* This could be more precise, but it's good enough. */
1636 return decompose (SUBREG_REG (x));
1638 val.start = true_regnum (x);
1640 return decompose (SUBREG_REG (x));
1643 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1645 else if (CONSTANT_P (x)
1646 /* This hasn't been assigned yet, so it can't conflict yet. */
1647 || GET_CODE (x) == SCRATCH)
1654 /* Return 1 if altering Y will not modify the value of X.
1655 Y is also described by YDATA, which should be decompose (Y). */
1658 immune_p (x, y, ydata)
1660 struct decomposition ydata;
1662 struct decomposition xdata;
1665 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, 0);
1669 if (GET_CODE (y) != MEM)
1671 /* If Y is memory and X is not, Y can't affect X. */
1672 if (GET_CODE (x) != MEM)
1675 xdata = decompose (x);
1677 if (! rtx_equal_p (xdata.base, ydata.base))
1679 /* If bases are distinct symbolic constants, there is no overlap. */
1680 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
1682 /* Constants and stack slots never overlap. */
1683 if (CONSTANT_P (xdata.base)
1684 && (ydata.base == frame_pointer_rtx
1685 || ydata.base == stack_pointer_rtx))
1687 if (CONSTANT_P (ydata.base)
1688 && (xdata.base == frame_pointer_rtx
1689 || xdata.base == stack_pointer_rtx))
1691 /* If either base is variable, we don't know anything. */
1696 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
1699 /* Similiar, but calls decompose. */
1702 safe_from_earlyclobber (op, clobber)
1705 struct decomposition early_data;
1707 early_data = decompose (clobber);
1708 return immune_p (op, clobber, early_data);
1711 /* Main entry point of this file: search the body of INSN
1712 for values that need reloading and record them with push_reload.
1713 REPLACE nonzero means record also where the values occur
1714 so that subst_reloads can be used.
1716 IND_LEVELS says how many levels of indirection are supported by this
1717 machine; a value of zero means that a memory reference is not a valid
1720 LIVE_KNOWN says we have valid information about which hard
1721 regs are live at each point in the program; this is true when
1722 we are called from global_alloc but false when stupid register
1723 allocation has been done.
1725 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
1726 which is nonnegative if the reg has been commandeered for reloading into.
1727 It is copied into STATIC_RELOAD_REG_P and referenced from there
1728 by various subroutines. */
1731 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
1733 int replace, ind_levels;
1735 short *reload_reg_p;
1737 rtx non_reloaded_operands[MAX_RECOG_OPERANDS];
1738 int n_non_reloaded_operands = 0;
1739 #ifdef REGISTER_CONSTRAINTS
1741 enum reload_modified { RELOAD_NOTHING, RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE };
1743 register int insn_code_number;
1746 /* These are the constraints for the insn. We don't change them. */
1747 char *constraints1[MAX_RECOG_OPERANDS];
1748 /* These start out as the constraints for the insn
1749 and they are chewed up as we consider alternatives. */
1750 char *constraints[MAX_RECOG_OPERANDS];
1751 /* These are the preferred classes for an operand, or NO_REGS if it isn't
1753 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
1754 char pref_or_nothing[MAX_RECOG_OPERANDS];
1755 /* Nonzero for a MEM operand whose entire address needs a reload. */
1756 int address_reloaded[MAX_RECOG_OPERANDS];
1757 int no_input_reloads = 0, no_output_reloads = 0;
1759 int this_alternative[MAX_RECOG_OPERANDS];
1760 char this_alternative_win[MAX_RECOG_OPERANDS];
1761 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
1762 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
1763 int this_alternative_matches[MAX_RECOG_OPERANDS];
1765 int goal_alternative[MAX_RECOG_OPERANDS];
1766 int this_alternative_number;
1767 int goal_alternative_number;
1768 int operand_reloadnum[MAX_RECOG_OPERANDS];
1769 int goal_alternative_matches[MAX_RECOG_OPERANDS];
1770 int goal_alternative_matched[MAX_RECOG_OPERANDS];
1771 char goal_alternative_win[MAX_RECOG_OPERANDS];
1772 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
1773 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
1774 int goal_alternative_swapped;
1775 enum reload_modified modified[MAX_RECOG_OPERANDS];
1778 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
1779 rtx substed_operand[MAX_RECOG_OPERANDS];
1780 rtx body = PATTERN (insn);
1781 rtx set = single_set (insn);
1782 int goal_earlyclobber, this_earlyclobber;
1783 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
1786 this_insn_is_asm = 0; /* Tentative. */
1790 n_earlyclobbers = 0;
1791 replace_reloads = replace;
1792 hard_regs_live_known = live_known;
1793 static_reload_reg_p = reload_reg_p;
1795 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
1796 neither are insns that SET cc0. Insns that use CC0 are not allowed
1797 to have any input reloads. */
1798 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
1799 no_output_reloads = 1;
1802 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
1803 no_input_reloads = 1;
1804 if (reg_set_p (cc0_rtx, PATTERN (insn)))
1805 no_output_reloads = 1;
1808 /* Find what kind of insn this is. NOPERANDS gets number of operands.
1809 Make OPERANDS point to a vector of operand values.
1810 Make OPERAND_LOCS point to a vector of pointers to
1811 where the operands were found.
1812 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
1813 constraint-strings for this insn.
1814 Return if the insn needs no reload processing. */
1816 switch (GET_CODE (body))
1826 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
1827 is cheap to move between them. If it is not, there may not be an insn
1828 to do the copy, so we may need a reload. */
1829 if (GET_CODE (SET_DEST (body)) == REG
1830 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
1831 && GET_CODE (SET_SRC (body)) == REG
1832 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
1833 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
1834 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
1838 noperands = asm_noperands (body);
1841 /* This insn is an `asm' with operands. */
1843 insn_code_number = -1;
1844 this_insn_is_asm = 1;
1846 /* expand_asm_operands makes sure there aren't too many operands. */
1847 if (noperands > MAX_RECOG_OPERANDS)
1850 /* Now get the operand values and constraints out of the insn. */
1852 decode_asm_operands (body, recog_operand, recog_operand_loc,
1853 constraints, operand_mode);
1856 bcopy (constraints, constraints1, noperands * sizeof (char *));
1857 n_alternatives = n_occurrences (',', constraints[0]) + 1;
1858 for (i = 1; i < noperands; i++)
1859 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
1861 error_for_asm (insn, "operand constraints differ in number of alternatives");
1862 /* Avoid further trouble with this insn. */
1863 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
1872 /* Ordinary insn: recognize it, get the operands via insn_extract
1873 and get the constraints. */
1875 insn_code_number = recog_memoized (insn);
1876 if (insn_code_number < 0)
1877 fatal_insn_not_found (insn);
1879 noperands = insn_n_operands[insn_code_number];
1880 n_alternatives = insn_n_alternatives[insn_code_number];
1881 /* Just return "no reloads" if insn has no operands with constraints. */
1882 if (n_alternatives == 0)
1884 insn_extract (insn);
1885 for (i = 0; i < noperands; i++)
1887 constraints[i] = constraints1[i]
1888 = insn_operand_constraint[insn_code_number][i];
1889 operand_mode[i] = insn_operand_mode[insn_code_number][i];
1898 /* If we will need to know, later, whether some pair of operands
1899 are the same, we must compare them now and save the result.
1900 Reloading the base and index registers will clobber them
1901 and afterward they will fail to match. */
1903 for (i = 0; i < noperands; i++)
1908 substed_operand[i] = recog_operand[i];
1911 /* Scan this operand's constraint to see if it should match another. */
1916 /* The last operand should not be marked commutative. */
1917 if (i == noperands - 1)
1919 if (this_insn_is_asm)
1920 warning_for_asm (this_insn,
1921 "`%' constraint used with last operand");
1928 else if (c >= '0' && c <= '9')
1931 operands_match[c][i]
1932 = operands_match_p (recog_operand[c], recog_operand[i]);
1933 /* If C can be commuted with C+1, and C might need to match I,
1934 then C+1 might also need to match I. */
1935 if (commutative >= 0)
1937 if (c == commutative || c == commutative + 1)
1939 int other = c + (c == commutative ? 1 : -1);
1940 operands_match[other][i]
1941 = operands_match_p (recog_operand[other], recog_operand[i]);
1943 if (i == commutative || i == commutative + 1)
1945 int other = i + (i == commutative ? 1 : -1);
1946 operands_match[c][other]
1947 = operands_match_p (recog_operand[c], recog_operand[other]);
1949 /* Note that C is supposed to be less than I.
1950 No need to consider altering both C and I
1951 because in that case we would alter one into the other. */
1956 /* Examine each operand that is a memory reference or memory address
1957 and reload parts of the addresses into index registers.
1958 While we are at it, initialize the array `modified'.
1959 Also here any references to pseudo regs that didn't get hard regs
1960 but are equivalent to constants get replaced in the insn itself
1961 with those constants. Nobody will ever see them again.
1963 Finally, set up the preferred classes of each operand. */
1965 for (i = 0; i < noperands; i++)
1967 register RTX_CODE code = GET_CODE (recog_operand[i]);
1968 modified[i] = RELOAD_READ;
1969 address_reloaded[i] = 0;
1971 if (constraints[i][0] == 'p')
1973 find_reloads_address (VOIDmode, 0,
1974 recog_operand[i], recog_operand_loc[i],
1975 recog_operand[i], ind_levels);
1976 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
1978 else if (code == MEM)
1980 if (find_reloads_address (GET_MODE (recog_operand[i]),
1981 recog_operand_loc[i],
1982 XEXP (recog_operand[i], 0),
1983 &XEXP (recog_operand[i], 0),
1984 recog_operand[i], ind_levels))
1985 address_reloaded[i] = 1;
1986 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
1988 else if (code == SUBREG)
1989 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
1990 = find_reloads_toplev (recog_operand[i], ind_levels,
1992 && &SET_DEST (set) == recog_operand_loc[i]);
1993 else if (code == REG)
1995 /* This is equivalent to calling find_reloads_toplev.
1996 The code is duplicated for speed.
1997 When we find a pseudo always equivalent to a constant,
1998 we replace it by the constant. We must be sure, however,
1999 that we don't try to replace it in the insn in which it
2001 register int regno = REGNO (recog_operand[i]);
2002 if (reg_equiv_constant[regno] != 0
2003 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2004 substed_operand[i] = recog_operand[i]
2005 = reg_equiv_constant[regno];
2006 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2007 that feeds this insn. */
2008 if (reg_equiv_mem[regno] != 0)
2009 substed_operand[i] = recog_operand[i]
2010 = reg_equiv_mem[regno];
2012 if (reg_equiv_address[regno] != 0)
2014 /* If reg_equiv_address is not a constant address, copy it,
2015 since it may be shared. */
2016 rtx address = reg_equiv_address[regno];
2018 if (rtx_varies_p (address))
2019 address = copy_rtx (address);
2021 /* If this is an output operand, we must output a CLOBBER
2022 after INSN so find_equiv_reg knows REGNO is being written. */
2023 if (constraints[i][0] == '='
2024 || constraints[i][0] == '+')
2025 emit_insn_after (gen_rtx (CLOBBER, VOIDmode, recog_operand[i]),
2028 *recog_operand_loc[i] = recog_operand[i]
2029 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2030 RTX_UNCHANGING_P (recog_operand[i])
2031 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2032 find_reloads_address (GET_MODE (recog_operand[i]),
2033 recog_operand_loc[i],
2034 XEXP (recog_operand[i], 0),
2035 &XEXP (recog_operand[i], 0),
2036 recog_operand[i], ind_levels);
2037 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2040 /* If the operand is still a register (we didn't replace it with an
2041 equivalent), get the preferred class to reload it into. */
2042 code = GET_CODE (recog_operand[i]);
2044 = ((code == REG && REGNO (recog_operand[i]) > FIRST_PSEUDO_REGISTER)
2045 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2047 = (code == REG && REGNO (recog_operand[i]) > FIRST_PSEUDO_REGISTER
2048 && reg_preferred_or_nothing (REGNO (recog_operand[i])));
2051 /* If this is simply a copy from operand 1 to operand 0, merge the
2052 preferred classes for the operands. */
2053 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2054 && recog_operand[1] == SET_SRC (set))
2056 preferred_class[0] = preferred_class[1]
2057 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2058 pref_or_nothing[0] |= pref_or_nothing[1];
2059 pref_or_nothing[1] |= pref_or_nothing[0];
2062 /* Now see what we need for pseudo-regs that didn't get hard regs
2063 or got the wrong kind of hard reg. For this, we must consider
2064 all the operands together against the register constraints. */
2066 best = MAX_RECOG_OPERANDS + 300;
2069 goal_alternative_swapped = 0;
2072 /* The constraints are made of several alternatives.
2073 Each operand's constraint looks like foo,bar,... with commas
2074 separating the alternatives. The first alternatives for all
2075 operands go together, the second alternatives go together, etc.
2077 First loop over alternatives. */
2079 for (this_alternative_number = 0;
2080 this_alternative_number < n_alternatives;
2081 this_alternative_number++)
2083 /* Loop over operands for one constraint alternative. */
2084 /* LOSERS counts those that don't fit this alternative
2085 and would require loading. */
2087 /* BAD is set to 1 if it some operand can't fit this alternative
2088 even after reloading. */
2090 /* REJECT is a count of how undesirable this alternative says it is
2091 if any reloading is required. If the alternative matches exactly
2092 then REJECT is ignored, but otherwise it gets this much
2093 counted against it in addition to the reloading needed. Each
2094 ? counts three times here since we want the disparaging caused by
2095 a bad register class to only count 1/3 as much. */
2098 this_earlyclobber = 0;
2100 for (i = 0; i < noperands; i++)
2102 register char *p = constraints[i];
2103 register int win = 0;
2104 /* 0 => this operand can be reloaded somehow for this alternative */
2106 /* 0 => this operand can be reloaded if the alternative allows regs. */
2109 register rtx operand = recog_operand[i];
2111 /* Nonzero means this is a MEM that must be reloaded into a reg
2112 regardless of what the constraint says. */
2113 int force_reload = 0;
2115 int earlyclobber = 0;
2117 /* If the operand is a SUBREG, extract
2118 the REG or MEM (or maybe even a constant) within.
2119 (Constants can occur as a result of reg_equiv_constant.) */
2121 while (GET_CODE (operand) == SUBREG)
2123 offset += SUBREG_WORD (operand);
2124 operand = SUBREG_REG (operand);
2125 /* Force reload if this is not a register or if there may may
2126 be a problem accessing the register in the outer mode. */
2127 if (GET_CODE (operand) != REG
2128 #ifdef BYTE_LOADS_ZERO_EXTEND
2129 /* Nonparadoxical subreg of a pseudoreg.
2130 Don't to load the full width if on this machine
2131 we expected the fetch to zero-extend. */
2132 || ((GET_MODE_SIZE (operand_mode[i])
2133 > GET_MODE_SIZE (GET_MODE (operand)))
2134 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
2135 #endif /* BYTE_LOADS_ZERO_EXTEND */
2136 /* Subreg of a hard reg which can't handle the subreg's mode
2137 or which would handle that mode in the wrong number of
2138 registers for subregging to work. */
2139 || (REGNO (operand) < FIRST_PSEUDO_REGISTER
2140 && (! HARD_REGNO_MODE_OK (REGNO (operand),
2142 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2143 && (GET_MODE_SIZE (GET_MODE (operand))
2145 && ((GET_MODE_SIZE (GET_MODE (operand))
2147 != HARD_REGNO_NREGS (REGNO (operand),
2148 GET_MODE (operand)))))))
2152 this_alternative[i] = (int) NO_REGS;
2153 this_alternative_win[i] = 0;
2154 this_alternative_offmemok[i] = 0;
2155 this_alternative_earlyclobber[i] = 0;
2156 this_alternative_matches[i] = -1;
2158 /* An empty constraint or empty alternative
2159 allows anything which matched the pattern. */
2160 if (*p == 0 || *p == ',')
2163 /* Scan this alternative's specs for this operand;
2164 set WIN if the operand fits any letter in this alternative.
2165 Otherwise, clear BADOP if this operand could
2166 fit some letter after reloads,
2167 or set WINREG if this operand could fit after reloads
2168 provided the constraint allows some registers. */
2170 while (*p && (c = *p++) != ',')
2174 modified[i] = RELOAD_WRITE;
2178 modified[i] = RELOAD_READ_WRITE;
2197 /* Ignore rest of this alternative as far as
2198 reloading is concerned. */
2199 while (*p && *p != ',') p++;
2208 this_alternative_matches[i] = c;
2209 /* We are supposed to match a previous operand.
2210 If we do, we win if that one did.
2211 If we do not, count both of the operands as losers.
2212 (This is too conservative, since most of the time
2213 only a single reload insn will be needed to make
2214 the two operands win. As a result, this alternative
2215 may be rejected when it is actually desirable.) */
2216 if ((swapped && (c != commutative || i != commutative + 1))
2217 /* If we are matching as if two operands were swapped,
2218 also pretend that operands_match had been computed
2220 But if I is the second of those and C is the first,
2221 don't exchange them, because operands_match is valid
2222 only on one side of its diagonal. */
2224 [(c == commutative || c == commutative + 1)
2225 ? 2*commutative + 1 - c : c]
2226 [(i == commutative || i == commutative + 1)
2227 ? 2*commutative + 1 - i : i])
2228 : operands_match[c][i])
2229 win = this_alternative_win[c];
2232 /* Operands don't match. */
2234 /* Retroactively mark the operand we had to match
2235 as a loser, if it wasn't already. */
2236 if (this_alternative_win[c])
2238 this_alternative_win[c] = 0;
2239 if (this_alternative[c] == (int) NO_REGS)
2241 /* But count the pair only once in the total badness of
2242 this alternative, if the pair can be a dummy reload. */
2244 = find_dummy_reload (recog_operand[i], recog_operand[c],
2245 recog_operand_loc[i], recog_operand_loc[c],
2246 this_alternative[c], -1);
2251 /* This can be fixed with reloads if the operand
2252 we are supposed to match can be fixed with reloads. */
2254 this_alternative[i] = this_alternative[c];
2258 /* All necessary reloads for an address_operand
2259 were handled in find_reloads_address. */
2260 this_alternative[i] = (int) ALL_REGS;
2267 if (GET_CODE (operand) == MEM
2268 || (GET_CODE (operand) == REG
2269 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2270 && reg_renumber[REGNO (operand)] < 0))
2272 if (CONSTANT_P (operand))
2277 if (GET_CODE (operand) == MEM
2278 && ! address_reloaded[i]
2279 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2280 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2285 if (GET_CODE (operand) == MEM
2286 && ! address_reloaded[i]
2287 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2288 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2292 /* Memory operand whose address is not offsettable. */
2296 if (GET_CODE (operand) == MEM
2297 && ! (ind_levels ? offsettable_memref_p (operand)
2298 : offsettable_nonstrict_memref_p (operand))
2299 /* Certain mem addresses will become offsettable
2300 after they themselves are reloaded. This is important;
2301 we don't want our own handling of unoffsettables
2302 to override the handling of reg_equiv_address. */
2303 && !(GET_CODE (XEXP (operand, 0)) == REG
2305 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2309 /* Memory operand whose address is offsettable. */
2313 if ((GET_CODE (operand) == MEM
2314 /* If IND_LEVELS, find_reloads_address won't reload a
2315 pseudo that didn't get a hard reg, so we have to
2316 reject that case. */
2317 && (ind_levels ? offsettable_memref_p (operand)
2318 : offsettable_nonstrict_memref_p (operand)))
2319 /* Certain mem addresses will become offsettable
2320 after they themselves are reloaded. This is important;
2321 we don't want our own handling of unoffsettables
2322 to override the handling of reg_equiv_address. */
2323 || (GET_CODE (operand) == MEM
2324 && GET_CODE (XEXP (operand, 0)) == REG
2326 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2327 || (GET_CODE (operand) == REG
2328 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2329 && reg_renumber[REGNO (operand)] < 0))
2331 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2337 /* Output operand that is stored before the need for the
2338 input operands (and their index registers) is over. */
2339 earlyclobber = 1, this_earlyclobber = 1;
2343 /* Match any floating double constant, but only if
2344 we can examine the bits of it reliably. */
2345 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2346 || HOST_BITS_PER_INT != BITS_PER_WORD)
2347 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2349 if (GET_CODE (operand) == CONST_DOUBLE)
2354 if (GET_CODE (operand) == CONST_DOUBLE)
2360 if (GET_CODE (operand) == CONST_DOUBLE
2361 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2366 if (GET_CODE (operand) == CONST_INT
2367 || (GET_CODE (operand) == CONST_DOUBLE
2368 && GET_MODE (operand) == VOIDmode))
2371 if (CONSTANT_P (operand)
2372 #ifdef LEGITIMATE_PIC_OPERAND_P
2373 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2380 if (GET_CODE (operand) == CONST_INT
2381 || (GET_CODE (operand) == CONST_DOUBLE
2382 && GET_MODE (operand) == VOIDmode))
2394 if (GET_CODE (operand) == CONST_INT
2395 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2405 /* A PLUS is never a valid operand, but reload can make
2406 it from a register when eliminating registers. */
2407 && GET_CODE (operand) != PLUS
2408 /* A SCRATCH is not a valid operand. */
2409 && GET_CODE (operand) != SCRATCH
2410 #ifdef LEGITIMATE_PIC_OPERAND_P
2411 && (! CONSTANT_P (operand)
2413 || LEGITIMATE_PIC_OPERAND_P (operand))
2415 && (GENERAL_REGS == ALL_REGS
2416 || GET_CODE (operand) != REG
2417 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2418 && reg_renumber[REGNO (operand)] < 0)))
2420 /* Drop through into 'r' case */
2424 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2427 #ifdef EXTRA_CONSTRAINT
2433 if (EXTRA_CONSTRAINT (operand, c))
2440 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2443 if (GET_MODE (operand) == BLKmode)
2446 if (GET_CODE (operand) == REG
2447 && reg_fits_class_p (operand, this_alternative[i],
2448 offset, GET_MODE (recog_operand[i])))
2455 /* If this operand could be handled with a reg,
2456 and some reg is allowed, then this operand can be handled. */
2457 if (winreg && this_alternative[i] != (int) NO_REGS)
2460 /* Record which operands fit this alternative. */
2461 this_alternative_earlyclobber[i] = earlyclobber;
2462 if (win && ! force_reload)
2463 this_alternative_win[i] = 1;
2466 this_alternative_offmemok[i] = offmemok;
2470 /* Alternative loses if it has no regs for a reg operand. */
2471 if (GET_CODE (operand) == REG
2472 && this_alternative[i] == (int) NO_REGS
2473 && this_alternative_matches[i] < 0)
2476 /* Alternative loses if it requires a type of reload not
2477 permitted for this insn. We can always reload SCRATCH
2478 and objects with a REG_UNUSED note. */
2479 if (GET_CODE (operand) != SCRATCH && modified[i] != RELOAD_READ
2480 && no_output_reloads
2481 && ! find_reg_note (insn, REG_UNUSED, operand))
2483 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2486 /* We prefer to reload pseudos over reloading other things,
2487 since such reloads may be able to be eliminated later.
2488 If we are reloading a SCRATCH, we won't be generating any
2489 insns, just using a register, so it is also preferred.
2490 So bump REJECT in other cases. */
2491 if (GET_CODE (operand) != REG && GET_CODE (operand) != SCRATCH)
2495 /* If this operand is a pseudo register that didn't get a hard
2496 reg and this alternative accepts some register, see if the
2497 class that we want is a subset of the preferred class for this
2498 register. If not, but it intersects that class, use the
2499 preferred class instead. If it does not intersect the preferred
2500 class, show that usage of this alternative should be discouraged;
2501 it will be discouraged more still if the register is `preferred
2502 or nothing'. We do this because it increases the chance of
2503 reusing our spill register in a later insn and avoiding a pair
2504 of memory stores and loads.
2506 Don't bother with this if this alternative will accept this
2509 Don't do this if the preferred class has only one register
2510 because we might otherwise exhaust the class. */
2513 if (! win && this_alternative[i] != (int) NO_REGS
2514 && reg_class_size[(int) preferred_class[i]] > 1)
2516 if (! reg_class_subset_p (this_alternative[i],
2517 preferred_class[i]))
2519 /* Since we don't have a way of forming the intersection,
2520 we just do something special if the preferred class
2521 is a subset of the class we have; that's the most
2522 common case anyway. */
2523 if (reg_class_subset_p (preferred_class[i],
2524 this_alternative[i]))
2525 this_alternative[i] = (int) preferred_class[i];
2527 reject += (1 + pref_or_nothing[i]);
2532 /* Now see if any output operands that are marked "earlyclobber"
2533 in this alternative conflict with any input operands
2534 or any memory addresses. */
2536 for (i = 0; i < noperands; i++)
2537 if (this_alternative_earlyclobber[i]
2538 && this_alternative_win[i])
2540 struct decomposition early_data;
2543 early_data = decompose (recog_operand[i]);
2545 if (modified[i] == RELOAD_READ)
2547 if (this_insn_is_asm)
2548 warning_for_asm (this_insn,
2549 "`&' constraint used with input operand");
2555 if (this_alternative[i] == NO_REGS)
2557 this_alternative_earlyclobber[i] = 0;
2558 if (this_insn_is_asm)
2559 error_for_asm (this_insn,
2560 "`&' constraint used with no register class");
2565 for (j = 0; j < noperands; j++)
2566 /* Is this an input operand or a memory ref? */
2567 if ((GET_CODE (recog_operand[j]) == MEM
2568 || modified[j] != RELOAD_WRITE)
2570 /* Ignore things like match_operator operands. */
2571 && *constraints1[j] != 0
2572 /* Don't count an input operand that is constrained to match
2573 the early clobber operand. */
2574 && ! (this_alternative_matches[j] == i
2575 && rtx_equal_p (recog_operand[i], recog_operand[j]))
2576 /* Is it altered by storing the earlyclobber operand? */
2577 && !immune_p (recog_operand[j], recog_operand[i], early_data))
2579 /* If the output is in a single-reg class,
2580 it's costly to reload it, so reload the input instead. */
2581 if (reg_class_size[this_alternative[i]] == 1
2582 && (GET_CODE (recog_operand[j]) == REG
2583 || GET_CODE (recog_operand[j]) == SUBREG))
2586 this_alternative_win[j] = 0;
2591 /* If an earlyclobber operand conflicts with something,
2592 it must be reloaded, so request this and count the cost. */
2596 this_alternative_win[i] = 0;
2597 for (j = 0; j < noperands; j++)
2598 if (this_alternative_matches[j] == i
2599 && this_alternative_win[j])
2601 this_alternative_win[j] = 0;
2607 /* If one alternative accepts all the operands, no reload required,
2608 choose that alternative; don't consider the remaining ones. */
2611 /* Unswap these so that they are never swapped at `finish'. */
2612 if (commutative >= 0)
2614 recog_operand[commutative] = substed_operand[commutative];
2615 recog_operand[commutative + 1]
2616 = substed_operand[commutative + 1];
2618 for (i = 0; i < noperands; i++)
2620 goal_alternative_win[i] = 1;
2621 goal_alternative[i] = this_alternative[i];
2622 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
2623 goal_alternative_matches[i] = this_alternative_matches[i];
2624 goal_alternative_earlyclobber[i]
2625 = this_alternative_earlyclobber[i];
2627 goal_alternative_number = this_alternative_number;
2628 goal_alternative_swapped = swapped;
2629 goal_earlyclobber = this_earlyclobber;
2633 /* REJECT, set by the ! and ? constraint characters and when a register
2634 would be reloaded into a non-preferred class, discourages the use of
2635 this alternative for a reload goal. REJECT is incremented by three
2636 for each ? and one for each non-preferred class. */
2637 losers = losers * 3 + reject;
2639 /* If this alternative can be made to work by reloading,
2640 and it needs less reloading than the others checked so far,
2641 record it as the chosen goal for reloading. */
2642 if (! bad && best > losers)
2644 for (i = 0; i < noperands; i++)
2646 goal_alternative[i] = this_alternative[i];
2647 goal_alternative_win[i] = this_alternative_win[i];
2648 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
2649 goal_alternative_matches[i] = this_alternative_matches[i];
2650 goal_alternative_earlyclobber[i]
2651 = this_alternative_earlyclobber[i];
2653 goal_alternative_swapped = swapped;
2655 goal_alternative_number = this_alternative_number;
2656 goal_earlyclobber = this_earlyclobber;
2660 /* If insn is commutative (it's safe to exchange a certain pair of operands)
2661 then we need to try each alternative twice,
2662 the second time matching those two operands
2663 as if we had exchanged them.
2664 To do this, really exchange them in operands.
2666 If we have just tried the alternatives the second time,
2667 return operands to normal and drop through. */
2669 if (commutative >= 0)
2674 register enum reg_class tclass;
2677 recog_operand[commutative] = substed_operand[commutative + 1];
2678 recog_operand[commutative + 1] = substed_operand[commutative];
2680 tclass = preferred_class[commutative];
2681 preferred_class[commutative] = preferred_class[commutative + 1];
2682 preferred_class[commutative + 1] = tclass;
2684 t = pref_or_nothing[commutative];
2685 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
2686 pref_or_nothing[commutative + 1] = t;
2688 bcopy (constraints1, constraints, noperands * sizeof (char *));
2693 recog_operand[commutative] = substed_operand[commutative];
2694 recog_operand[commutative + 1] = substed_operand[commutative + 1];
2698 /* The operands don't meet the constraints.
2699 goal_alternative describes the alternative
2700 that we could reach by reloading the fewest operands.
2701 Reload so as to fit it. */
2703 if (best == MAX_RECOG_OPERANDS + 300)
2705 /* No alternative works with reloads?? */
2706 if (insn_code_number >= 0)
2708 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
2709 /* Avoid further trouble with this insn. */
2710 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2715 /* Jump to `finish' from above if all operands are valid already.
2716 In that case, goal_alternative_win is all 1. */
2719 /* Right now, for any pair of operands I and J that are required to match,
2721 goal_alternative_matches[J] is I.
2722 Set up goal_alternative_matched as the inverse function:
2723 goal_alternative_matched[I] = J. */
2725 for (i = 0; i < noperands; i++)
2726 goal_alternative_matched[i] = -1;
2728 for (i = 0; i < noperands; i++)
2729 if (! goal_alternative_win[i]
2730 && goal_alternative_matches[i] >= 0)
2731 goal_alternative_matched[goal_alternative_matches[i]] = i;
2733 /* If the best alternative is with operands 1 and 2 swapped,
2734 consider them swapped before reporting the reloads. */
2736 if (goal_alternative_swapped)
2740 tem = substed_operand[commutative];
2741 substed_operand[commutative] = substed_operand[commutative + 1];
2742 substed_operand[commutative + 1] = tem;
2743 tem = recog_operand[commutative];
2744 recog_operand[commutative] = recog_operand[commutative + 1];
2745 recog_operand[commutative + 1] = tem;
2748 /* Perform whatever substitutions on the operands we are supposed
2749 to make due to commutativity or replacement of registers
2750 with equivalent constants or memory slots. */
2752 for (i = 0; i < noperands; i++)
2754 *recog_operand_loc[i] = substed_operand[i];
2755 /* While we are looping on operands, initialize this. */
2756 operand_reloadnum[i] = -1;
2759 /* Any constants that aren't allowed and can't be reloaded
2760 into registers are here changed into memory references. */
2761 for (i = 0; i < noperands; i++)
2762 if (! goal_alternative_win[i]
2763 && CONSTANT_P (recog_operand[i])
2764 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
2765 (enum reg_class) goal_alternative[i])
2767 && operand_mode[i] != VOIDmode)
2769 *recog_operand_loc[i] = recog_operand[i]
2770 = find_reloads_toplev (force_const_mem (operand_mode[i],
2773 if (alternative_allows_memconst (constraints1[i],
2774 goal_alternative_number))
2775 goal_alternative_win[i] = 1;
2778 /* Now record reloads for all the operands that need them. */
2779 for (i = 0; i < noperands; i++)
2780 if (! goal_alternative_win[i])
2782 /* Operands that match previous ones have already been handled. */
2783 if (goal_alternative_matches[i] >= 0)
2785 /* Handle an operand with a nonoffsettable address
2786 appearing where an offsettable address will do
2787 by reloading the address into a base register. */
2788 else if (goal_alternative_matched[i] == -1
2789 && goal_alternative_offmemok[i]
2790 && GET_CODE (recog_operand[i]) == MEM)
2792 operand_reloadnum[i]
2793 = push_reload (XEXP (recog_operand[i], 0), 0,
2794 &XEXP (recog_operand[i], 0), 0,
2795 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
2797 reload_inc[operand_reloadnum[i]]
2798 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
2800 else if (goal_alternative_matched[i] == -1)
2801 operand_reloadnum[i] =
2802 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
2803 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
2804 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
2805 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
2806 (enum reg_class) goal_alternative[i],
2807 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
2808 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
2809 (insn_code_number < 0 ? 0
2810 : insn_operand_strict_low[insn_code_number][i]),
2812 /* In a matching pair of operands, one must be input only
2813 and the other must be output only.
2814 Pass the input operand as IN and the other as OUT. */
2815 else if (modified[i] == RELOAD_READ
2816 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
2818 operand_reloadnum[i]
2819 = push_reload (recog_operand[i],
2820 recog_operand[goal_alternative_matched[i]],
2821 recog_operand_loc[i],
2822 recog_operand_loc[goal_alternative_matched[i]],
2823 (enum reg_class) goal_alternative[i],
2825 operand_mode[goal_alternative_matched[i]],
2827 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
2829 else if (modified[i] == RELOAD_WRITE
2830 && modified[goal_alternative_matched[i]] == RELOAD_READ)
2832 operand_reloadnum[goal_alternative_matched[i]]
2833 = push_reload (recog_operand[goal_alternative_matched[i]],
2835 recog_operand_loc[goal_alternative_matched[i]],
2836 recog_operand_loc[i],
2837 (enum reg_class) goal_alternative[i],
2838 operand_mode[goal_alternative_matched[i]],
2841 operand_reloadnum[i] = output_reloadnum;
2843 else if (insn_code_number >= 0)
2847 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
2848 /* Avoid further trouble with this insn. */
2849 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2854 else if (goal_alternative_matched[i] < 0
2855 && goal_alternative_matches[i] < 0
2858 rtx operand = recog_operand[i];
2859 /* For each non-matching operand that's a pseudo-register
2860 that didn't get a hard register, make an optional reload.
2861 This may get done even if the insn needs no reloads otherwise. */
2862 /* (It would be safe to make an optional reload for a matching pair
2863 of operands, but we don't bother yet.) */
2864 while (GET_CODE (operand) == SUBREG)
2865 operand = XEXP (operand, 0);
2866 if (GET_CODE (operand) == REG
2867 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2868 && reg_renumber[REGNO (operand)] < 0
2869 && (enum reg_class) goal_alternative[i] != NO_REGS
2870 /* Don't make optional output reloads for jump insns
2871 (such as aobjeq on the vax). */
2872 && (modified[i] == RELOAD_READ
2873 || GET_CODE (insn) != JUMP_INSN))
2874 operand_reloadnum[i]
2875 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
2876 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
2877 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
2878 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
2879 (enum reg_class) goal_alternative[i],
2880 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
2881 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
2882 (insn_code_number < 0 ? 0
2883 : insn_operand_strict_low[insn_code_number][i]),
2885 /* Make an optional reload for an explicit mem ref. */
2886 else if (GET_CODE (operand) == MEM
2887 && (enum reg_class) goal_alternative[i] != NO_REGS
2888 /* Don't make optional output reloads for jump insns
2889 (such as aobjeq on the vax). */
2890 && (modified[i] == RELOAD_READ
2891 || GET_CODE (insn) != JUMP_INSN))
2892 operand_reloadnum[i]
2893 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
2894 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
2895 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
2896 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
2897 (enum reg_class) goal_alternative[i],
2898 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
2899 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
2900 (insn_code_number < 0 ? 0
2901 : insn_operand_strict_low[insn_code_number][i]),
2904 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
2906 else if (goal_alternative_matched[i] < 0
2907 && goal_alternative_matches[i] < 0)
2908 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
2910 /* Record the values of the earlyclobber operands for the caller. */
2911 if (goal_earlyclobber)
2912 for (i = 0; i < noperands; i++)
2913 if (goal_alternative_earlyclobber[i])
2914 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
2916 /* If this insn pattern contains any MATCH_DUP's, make sure that
2917 they will be substituted if the operands they match are substituted.
2918 Also do now any substitutions we already did on the operands.
2920 Don't do this if we aren't making replacements because we might be
2921 propagating things allocated by frame pointer elimination into places
2922 it doesn't expect. */
2924 if (insn_code_number >= 0 && replace)
2925 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
2927 int opno = recog_dup_num[i];
2928 *recog_dup_loc[i] = *recog_operand_loc[opno];
2929 if (operand_reloadnum[opno] >= 0)
2930 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
2931 insn_operand_mode[insn_code_number][opno]);
2935 /* This loses because reloading of prior insns can invalidate the equivalence
2936 (or at least find_equiv_reg isn't smart enough to find it any more),
2937 causing this insn to need more reload regs than it needed before.
2938 It may be too late to make the reload regs available.
2939 Now this optimization is done safely in choose_reload_regs. */
2941 /* For each reload of a reg into some other class of reg,
2942 search for an existing equivalent reg (same value now) in the right class.
2943 We can use it as long as we don't need to change its contents. */
2944 for (i = 0; i < n_reloads; i++)
2945 if (reload_reg_rtx[i] == 0
2946 && reload_in[i] != 0
2947 && GET_CODE (reload_in[i]) == REG
2948 && reload_out[i] == 0)
2951 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
2952 static_reload_reg_p, 0, reload_inmode[i]);
2953 /* Prevent generation of insn to load the value
2954 because the one we found already has the value. */
2955 if (reload_reg_rtx[i])
2956 reload_in[i] = reload_reg_rtx[i];
2960 #else /* no REGISTER_CONSTRAINTS */
2962 int insn_code_number;
2963 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
2965 rtx body = PATTERN (insn);
2969 n_earlyclobbers = 0;
2970 replace_reloads = replace;
2973 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2974 Store the operand values in RECOG_OPERAND and the locations
2975 of the words in the insn that point to them in RECOG_OPERAND_LOC.
2976 Return if the insn needs no reload processing. */
2978 switch (GET_CODE (body))
2989 noperands = asm_noperands (body);
2992 /* This insn is an `asm' with operands.
2993 First, find out how many operands, and allocate space. */
2995 insn_code_number = -1;
2996 /* ??? This is a bug! ???
2997 Give up and delete this insn if it has too many operands. */
2998 if (noperands > MAX_RECOG_OPERANDS)
3001 /* Now get the operand values out of the insn. */
3003 decode_asm_operands (body, recog_operand, recog_operand_loc, 0, 0);
3008 /* Ordinary insn: recognize it, allocate space for operands and
3009 constraints, and get them out via insn_extract. */
3011 insn_code_number = recog_memoized (insn);
3012 noperands = insn_n_operands[insn_code_number];
3013 insn_extract (insn);
3019 for (i = 0; i < noperands; i++)
3021 register RTX_CODE code = GET_CODE (recog_operand[i]);
3022 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3024 if (insn_code_number >= 0)
3025 if (insn_operand_address_p[insn_code_number][i])
3026 find_reloads_address (VOIDmode, 0,
3027 recog_operand[i], recog_operand_loc[i],
3028 recog_operand[i], ind_levels);
3030 find_reloads_address (GET_MODE (recog_operand[i]),
3031 recog_operand_loc[i],
3032 XEXP (recog_operand[i], 0),
3033 &XEXP (recog_operand[i], 0),
3034 recog_operand[i], ind_levels);
3036 recog_operand[i] = *recog_operand_loc[i]
3037 = find_reloads_toplev (recog_operand[i], ind_levels, is_set_dest);
3040 register int regno = REGNO (recog_operand[i]);
3041 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3042 recog_operand[i] = *recog_operand_loc[i]
3043 = reg_equiv_constant[regno];
3044 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3045 that feeds this insn. */
3046 if (reg_equiv_mem[regno] != 0)
3047 recog_operand[i] = *recog_operand_loc[i]
3048 = reg_equiv_mem[regno];
3051 /* All operands are non-reloaded. */
3052 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3054 #endif /* no REGISTER_CONSTRAINTS */
3056 /* Determine which part of the insn each reload is needed for,
3057 based on which operand the reload is needed for.
3058 Reloads of entire operands are classified as RELOAD_OTHER.
3059 So are reloads for which a unique purpose is not known. */
3061 for (i = 0; i < n_reloads; i++)
3063 reload_when_needed[i] = RELOAD_OTHER;
3065 if (reload_needed_for[i] != 0 && ! reload_needed_for_multiple[i])
3068 int output_address = 0;
3069 int input_address = 0;
3070 int operand_address = 0;
3072 /* This reload is needed only for the address of something.
3073 Determine whether it is needed for addressing an operand
3074 being reloaded for input, whether it is needed for an
3075 operand being reloaded for output, and whether it is needed
3076 for addressing an operand that won't really be reloaded.
3078 Note that we know that this reload is needed in only one address,
3079 but we have not yet checked for the case where that same address
3080 is used in both input and output reloads.
3081 The following code detects this case. */
3083 for (j = 0; j < n_reloads; j++)
3084 if (reload_needed_for[i] == reload_in[j]
3085 || reload_needed_for[i] == reload_out[j])
3087 if (reload_optional[j])
3088 operand_address = 1;
3091 if (reload_needed_for[i] == reload_in[j])
3093 if (reload_needed_for[i] == reload_out[j])
3097 /* Don't ignore memrefs without optional reloads. */
3098 for (j = 0; j < n_non_reloaded_operands; j++)
3099 if (reload_needed_for[i] == non_reloaded_operands[j])
3100 operand_address = 1;
3102 /* If it is needed for only one of those, record which one. */
3104 if (input_address && ! output_address && ! operand_address)
3105 reload_when_needed[i] = RELOAD_FOR_INPUT_RELOAD_ADDRESS;
3106 if (output_address && ! input_address && ! operand_address)
3107 reload_when_needed[i] = RELOAD_FOR_OUTPUT_RELOAD_ADDRESS;
3108 if (operand_address && ! input_address && ! output_address)
3109 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3111 /* Indicate those RELOAD_OTHER reloads which, though they have
3112 0 for reload_output, still cannot overlap an output reload. */
3114 if (output_address && reload_when_needed[i] == RELOAD_OTHER)
3115 reload_needed_for_multiple[i] = 1;
3119 /* Perhaps an output reload can be combined with another
3120 to reduce needs by one. */
3121 if (!goal_earlyclobber)
3125 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3126 accepts a memory operand with constant address. */
3129 alternative_allows_memconst (constraint, altnum)
3134 /* Skip alternatives before the one requested. */
3137 while (*constraint++ != ',');
3140 /* Scan the requested alternative for 'm' or 'o'.
3141 If one of them is present, this alternative accepts memory constants. */
3142 while ((c = *constraint++) && c != ',' && c != '#')
3143 if (c == 'm' || c == 'o')
3148 /* Scan X for memory references and scan the addresses for reloading.
3149 Also checks for references to "constant" regs that we want to eliminate
3150 and replaces them with the values they stand for.
3151 We may alter X destructively if it contains a reference to such.
3152 If X is just a constant reg, we return the equivalent value
3155 IND_LEVELS says how many levels of indirect addressing this machine
3158 IS_SET_DEST is true if X is the destination of a SET, which is not
3159 appropriate to be replaced by a constant. */
3162 find_reloads_toplev (x, ind_levels, is_set_dest)
3167 register RTX_CODE code = GET_CODE (x);
3169 register char *fmt = GET_RTX_FORMAT (code);
3174 /* This code is duplicated for speed in find_reloads. */
3175 register int regno = REGNO (x);
3176 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3177 x = reg_equiv_constant[regno];
3179 /* This creates (subreg (mem...)) which would cause an unnecessary
3180 reload of the mem. */
3181 else if (reg_equiv_mem[regno] != 0)
3182 x = reg_equiv_mem[regno];
3184 else if (reg_equiv_address[regno] != 0)
3186 /* If reg_equiv_address varies, it may be shared, so copy it. */
3187 rtx addr = reg_equiv_address[regno];
3189 if (rtx_varies_p (addr))
3190 addr = copy_rtx (addr);
3192 x = gen_rtx (MEM, GET_MODE (x), addr);
3193 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3194 find_reloads_address (GET_MODE (x), 0,
3196 &XEXP (x, 0), x, ind_levels);
3203 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3208 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3210 /* Check for SUBREG containing a REG that's equivalent to a constant.
3211 If the constant has a known value, truncate it right now.
3212 Similarly if we are extracting a single-word of a multi-word
3213 constant. If the constant is symbolic, allow it to be substituted
3214 normally. push_reload will strip the subreg later. If the
3215 constant is VOIDmode, abort because we will lose the mode of
3216 the register (this should never happen because one of the cases
3217 above should handle it). */
3219 register int regno = REGNO (SUBREG_REG (x));
3222 if (subreg_lowpart_p (x)
3223 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3224 && reg_equiv_constant[regno] != 0
3225 && (tem = gen_lowpart_common (GET_MODE (x),
3226 reg_equiv_constant[regno])) != 0)
3229 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3230 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3231 && reg_equiv_constant[regno] != 0
3232 && (tem = operand_subword (reg_equiv_constant[regno],
3234 GET_MODE (SUBREG_REG (x)))) != 0)
3237 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3238 && reg_equiv_constant[regno] != 0
3239 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3242 /* If the subreg contains a reg that will be converted to a mem,
3243 convert the subreg to a narrower memref now.
3244 Otherwise, we would get (subreg (mem ...) ...),
3245 which would force reload of the mem.
3247 We also need to do this if there is an equivalent MEM that is
3248 not offsettable. In that case, alter_subreg would produce an
3249 invalid address on big-endian machines.
3251 For machines that zero-extend byte loads, we must not reload using
3252 a wider mode if we have a paradoxical SUBREG. find_reloads will
3253 force a reload in that case. So we should not do anything here. */
3255 else if (regno >= FIRST_PSEUDO_REGISTER
3256 #ifdef BYTE_LOADS_ZERO_EXTEND
3257 && (GET_MODE_SIZE (GET_MODE (x))
3258 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3260 && (reg_equiv_address[regno] != 0
3261 || (reg_equiv_mem[regno] != 0
3262 && ! offsettable_memref_p (reg_equiv_mem[regno]))))
3264 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3265 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3266 : XEXP (reg_equiv_mem[regno], 0));
3267 #if BYTES_BIG_ENDIAN
3269 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3270 offset += MIN (size, UNITS_PER_WORD);
3271 size = GET_MODE_SIZE (GET_MODE (x));
3272 offset -= MIN (size, UNITS_PER_WORD);
3274 addr = plus_constant (addr, offset);
3275 x = gen_rtx (MEM, GET_MODE (x), addr);
3276 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3277 find_reloads_address (GET_MODE (x), 0,
3279 &XEXP (x, 0), x, ind_levels);
3284 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3287 XEXP (x, i) = find_reloads_toplev (XEXP (x, i),
3288 ind_levels, is_set_dest);
3294 make_memloc (ad, regno)
3299 rtx tem = reg_equiv_address[regno];
3300 for (i = 0; i < n_memlocs; i++)
3301 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
3304 /* If TEM might contain a pseudo, we must copy it to avoid
3305 modifying it when we do the substitution for the reload. */
3306 if (rtx_varies_p (tem))
3307 tem = copy_rtx (tem);
3309 tem = gen_rtx (MEM, GET_MODE (ad), tem);
3310 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3311 memlocs[n_memlocs++] = tem;
3315 /* Record all reloads needed for handling memory address AD
3316 which appears in *LOC in a memory reference to mode MODE
3317 which itself is found in location *MEMREFLOC.
3318 Note that we take shortcuts assuming that no multi-reg machine mode
3319 occurs as part of an address.
3321 OPERAND is the operand of the insn within which this address appears.
3323 IND_LEVELS says how many levels of indirect addressing this machine
3326 Value is nonzero if this address is reloaded or replaced as a whole.
3327 This is interesting to the caller if the address is an autoincrement.
3329 Note that there is no verification that the address will be valid after
3330 this routine does its work. Instead, we rely on the fact that the address
3331 was valid when reload started. So we need only undo things that reload
3332 could have broken. These are wrong register types, pseudos not allocated
3333 to a hard register, and frame pointer elimination. */
3336 find_reloads_address (mode, memrefloc, ad, loc, operand, ind_levels)
3337 enum machine_mode mode;
3347 /* If the address is a register, see if it is a legitimate address and
3348 reload if not. We first handle the cases where we need not reload
3349 or where we must reload in a non-standard way. */
3351 if (GET_CODE (ad) == REG)
3355 if (reg_equiv_constant[regno] != 0
3356 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
3358 *loc = ad = reg_equiv_constant[regno];
3362 else if (reg_equiv_address[regno] != 0)
3364 tem = make_memloc (ad, regno);
3365 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
3366 &XEXP (tem, 0), operand, ind_levels);
3367 push_reload (tem, 0, loc, 0, BASE_REG_CLASS,
3368 GET_MODE (ad), VOIDmode, 0, 0,
3373 else if (reg_equiv_mem[regno] != 0)
3375 tem = XEXP (reg_equiv_mem[regno], 0);
3377 /* If we can't indirect any more, a pseudo must be reloaded.
3378 If the pseudo's address in its MEM is a SYMBOL_REF, it
3379 must be reloaded unless indirect_symref_ok. Otherwise, it
3380 can be reloaded if the address is REG or REG + CONST_INT. */
3383 && ! (GET_CODE (tem) == SYMBOL_REF && ! indirect_symref_ok)
3384 && ((GET_CODE (tem) == REG
3385 && REGNO (tem) < FIRST_PSEUDO_REGISTER)
3386 || (GET_CODE (tem) == PLUS
3387 && GET_CODE (XEXP (tem, 0)) == REG
3388 && REGNO (XEXP (tem, 0)) < FIRST_PSEUDO_REGISTER
3389 && GET_CODE (XEXP (tem, 1)) == CONST_INT)))
3393 /* The only remaining case where we can avoid a reload is if this is a
3394 hard register that is valid as a base register and which is not the
3395 subject of a CLOBBER in this insn. */
3397 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
3398 && ! regno_clobbered_p (regno, this_insn))
3401 /* If we do not have one of the cases above, we must do the reload. */
3402 push_reload (ad, 0, loc, 0, BASE_REG_CLASS,
3403 GET_MODE (ad), VOIDmode, 0, 0, operand);
3407 if (strict_memory_address_p (mode, ad))
3409 /* The address appears valid, so reloads are not needed.
3410 But the address may contain an eliminable register.
3411 This can happen because a machine with indirect addressing
3412 may consider a pseudo register by itself a valid address even when
3413 it has failed to get a hard reg.
3414 So do a tree-walk to find and eliminate all such regs. */
3416 /* But first quickly dispose of a common case. */
3417 if (GET_CODE (ad) == PLUS
3418 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3419 && GET_CODE (XEXP (ad, 0)) == REG
3420 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
3423 subst_reg_equivs_changed = 0;
3424 *loc = subst_reg_equivs (ad);
3426 if (! subst_reg_equivs_changed)
3429 /* Check result for validity after substitution. */
3430 if (strict_memory_address_p (mode, ad))
3434 /* The address is not valid. We have to figure out why. One possibility
3435 is that it is itself a MEM. This can happen when the frame pointer is
3436 being eliminated, a pseudo is not allocated to a hard register, and the
3437 offset between the frame and stack pointers is not its initial value.
3438 In that case the pseudo will have been replaced by a MEM referring to
3439 the stack pointer. */
3440 if (GET_CODE (ad) == MEM)
3442 /* First ensure that the address in this MEM is valid. Then, unless
3443 indirect addresses are valid, reload the MEM into a register. */
3445 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
3446 operand, ind_levels == 0 ? 0 : ind_levels - 1);
3447 /* Check similar cases as for indirect addresses as above except
3448 that we can allow pseudos and a MEM since they should have been
3449 taken care of above. */
3452 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
3453 || GET_CODE (XEXP (tem, 0)) == MEM
3454 || ! (GET_CODE (XEXP (tem, 0)) == REG
3455 || (GET_CODE (XEXP (tem, 0)) == PLUS
3456 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
3457 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
3459 /* Must use TEM here, not AD, since it is the one that will
3460 have any subexpressions reloaded, if needed. */
3461 push_reload (tem, 0, loc, 0,
3462 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
3470 /* If we have address of a stack slot but it's not valid
3471 (displacement is too large), compute the sum in a register. */
3472 else if (GET_CODE (ad) == PLUS
3473 && (XEXP (ad, 0) == frame_pointer_rtx
3474 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3475 || XEXP (ad, 0) == arg_pointer_rtx
3477 || XEXP (ad, 0) == stack_pointer_rtx)
3478 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3480 /* Unshare the MEM rtx so we can safely alter it. */
3483 rtx oldref = *memrefloc;
3484 *memrefloc = copy_rtx (*memrefloc);
3485 loc = &XEXP (*memrefloc, 0);
3486 if (operand == oldref)
3487 operand = *memrefloc;
3489 if (double_reg_address_ok)
3491 /* Unshare the sum as well. */
3492 *loc = ad = copy_rtx (ad);
3493 /* Reload the displacement into an index reg.
3494 We assume the frame pointer or arg pointer is a base reg. */
3495 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
3496 INDEX_REG_CLASS, GET_MODE (ad), operand,
3501 /* If the sum of two regs is not necessarily valid,
3502 reload the sum into a base reg.
3503 That will at least work. */
3504 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
3505 operand, ind_levels);
3510 /* If we have an indexed stack slot, there are three possible reasons why
3511 it might be invalid: The index might need to be reloaded, the address
3512 might have been made by frame pointer elimination and hence have a
3513 constant out of range, or both reasons might apply.
3515 We can easily check for an index needing reload, but even if that is the
3516 case, we might also have an invalid constant. To avoid making the
3517 conservative assumption and requiring two reloads, we see if this address
3518 is valid when not interpreted strictly. If it is, the only problem is
3519 that the index needs a reload and find_reloads_address_1 will take care
3522 There is still a case when we might generate an extra reload,
3523 however. In certain cases eliminate_regs will return a MEM for a REG
3524 (see the code there for details). In those cases, memory_address_p
3525 applied to our address will return 0 so we will think that our offset
3526 must be too large. But it might indeed be valid and the only problem
3527 is that a MEM is present where a REG should be. This case should be
3528 very rare and there doesn't seem to be any way to avoid it.
3530 If we decide to do something here, it must be that
3531 `double_reg_address_ok' is true and that this address rtl was made by
3532 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
3533 rework the sum so that the reload register will be added to the index.
3534 This is safe because we know the address isn't shared.
3536 We check for fp/ap/sp as both the first and second operand of the
3539 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
3540 && GET_CODE (XEXP (ad, 0)) == PLUS
3541 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
3542 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3543 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
3545 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
3546 && ! memory_address_p (mode, ad))
3548 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
3549 plus_constant (XEXP (XEXP (ad, 0), 0),
3550 INTVAL (XEXP (ad, 1))),
3551 XEXP (XEXP (ad, 0), 1));
3552 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
3553 GET_MODE (ad), operand, ind_levels);
3554 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
3559 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
3560 && GET_CODE (XEXP (ad, 0)) == PLUS
3561 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
3562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3563 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
3565 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
3566 && ! memory_address_p (mode, ad))
3568 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
3569 plus_constant (XEXP (XEXP (ad, 0), 1),
3570 INTVAL (XEXP (ad, 1))),
3571 XEXP (XEXP (ad, 0), 0));
3572 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
3573 GET_MODE (ad), operand, ind_levels);
3574 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
3579 /* See if address becomes valid when an eliminable register
3580 in a sum is replaced. */
3583 if (GET_CODE (ad) == PLUS)
3584 tem = subst_indexed_address (ad);
3585 if (tem != ad && strict_memory_address_p (mode, tem))
3587 /* Ok, we win that way. Replace any additional eliminable
3590 subst_reg_equivs_changed = 0;
3591 tem = subst_reg_equivs (tem);
3593 /* Make sure that didn't make the address invalid again. */
3595 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
3602 /* If constants aren't valid addresses, reload the constant address
3604 if (CONSTANT_ADDRESS_P (ad) && ! strict_memory_address_p (mode, ad))
3606 /* If AD is in address in the constant pool, the MEM rtx may be shared.
3607 Unshare it so we can safely alter it. */
3608 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
3609 && CONSTANT_POOL_ADDRESS_P (ad))
3611 rtx oldref = *memrefloc;
3612 *memrefloc = copy_rtx (*memrefloc);
3613 loc = &XEXP (*memrefloc, 0);
3614 if (operand == oldref)
3615 operand = *memrefloc;
3618 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, operand,
3623 return find_reloads_address_1 (ad, 0, loc, operand, ind_levels);
3626 /* Find all pseudo regs appearing in AD
3627 that are eliminable in favor of equivalent values
3628 and do not have hard regs; replace them by their equivalents. */
3631 subst_reg_equivs (ad)
3634 register RTX_CODE code = GET_CODE (ad);
3652 register int regno = REGNO (ad);
3654 if (reg_equiv_constant[regno] != 0)
3656 subst_reg_equivs_changed = 1;
3657 return reg_equiv_constant[regno];
3663 /* Quickly dispose of a common case. */
3664 if (XEXP (ad, 0) == frame_pointer_rtx
3665 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3669 fmt = GET_RTX_FORMAT (code);
3670 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3672 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
3676 /* Compute the sum of X and Y, making canonicalizations assumed in an
3677 address, namely: sum constant integers, surround the sum of two
3678 constants with a CONST, put the constant as the second operand, and
3679 group the constant on the outermost sum.
3681 This routine assumes both inputs are already in canonical form. */
3689 if (GET_CODE (x) == CONST_INT)
3690 return plus_constant (y, INTVAL (x));
3691 else if (GET_CODE (y) == CONST_INT)
3692 return plus_constant (x, INTVAL (y));
3693 else if (CONSTANT_P (x))
3694 tem = x, x = y, y = tem;
3696 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
3697 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
3699 /* Note that if the operands of Y are specified in the opposite
3700 order in the recursive calls below, infinite recursion will occur. */
3701 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
3702 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
3704 /* If both constant, encapsulate sum. Otherwise, just form sum. A
3705 constant will have been placed second. */
3706 if (CONSTANT_P (x) && CONSTANT_P (y))
3708 if (GET_CODE (x) == CONST)
3710 if (GET_CODE (y) == CONST)
3713 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, Pmode, x, y));
3716 return gen_rtx (PLUS, Pmode, x, y);
3719 /* If ADDR is a sum containing a pseudo register that should be
3720 replaced with a constant (from reg_equiv_constant),
3721 return the result of doing so, and also apply the associative
3722 law so that the result is more likely to be a valid address.
3723 (But it is not guaranteed to be one.)
3725 Note that at most one register is replaced, even if more are
3726 replaceable. Also, we try to put the result into a canonical form
3727 so it is more likely to be a valid address.
3729 In all other cases, return ADDR. */
3732 subst_indexed_address (addr)
3735 rtx op0 = 0, op1 = 0, op2 = 0;
3739 if (GET_CODE (addr) == PLUS)
3741 /* Try to find a register to replace. */
3742 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
3743 if (GET_CODE (op0) == REG
3744 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
3745 && reg_renumber[regno] < 0
3746 && reg_equiv_constant[regno] != 0)
3747 op0 = reg_equiv_constant[regno];
3748 else if (GET_CODE (op1) == REG
3749 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
3750 && reg_renumber[regno] < 0
3751 && reg_equiv_constant[regno] != 0)
3752 op1 = reg_equiv_constant[regno];
3753 else if (GET_CODE (op0) == PLUS
3754 && (tem = subst_indexed_address (op0)) != op0)
3756 else if (GET_CODE (op1) == PLUS
3757 && (tem = subst_indexed_address (op1)) != op1)
3762 /* Pick out up to three things to add. */
3763 if (GET_CODE (op1) == PLUS)
3764 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
3765 else if (GET_CODE (op0) == PLUS)
3766 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
3768 /* Compute the sum. */
3770 op1 = form_sum (op1, op2);
3772 op0 = form_sum (op0, op1);
3779 /* Record the pseudo registers we must reload into hard registers
3780 in a subexpression of a would-be memory address, X.
3781 (This function is not called if the address we find is strictly valid.)
3782 CONTEXT = 1 means we are considering regs as index regs,
3783 = 0 means we are considering them as base regs.
3785 OPERAND is the operand of the insn within which this address appears.
3787 IND_LEVELS says how many levels of indirect addressing are
3788 supported at this point in the address.
3790 We return nonzero if X, as a whole, is reloaded or replaced. */
3792 /* Note that we take shortcuts assuming that no multi-reg machine mode
3793 occurs as part of an address.
3794 Also, this is not fully machine-customizable; it works for machines
3795 such as vaxes and 68000's and 32000's, but other possible machines
3796 could have addressing modes that this does not handle right. */
3799 find_reloads_address_1 (x, context, loc, operand, ind_levels)
3806 register RTX_CODE code = GET_CODE (x);
3810 register rtx op0 = XEXP (x, 0);
3811 register rtx op1 = XEXP (x, 1);
3812 register RTX_CODE code0 = GET_CODE (op0);
3813 register RTX_CODE code1 = GET_CODE (op1);
3814 if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
3816 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
3817 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
3819 else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
3821 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
3822 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
3824 else if (code0 == CONST_INT || code0 == CONST
3825 || code0 == SYMBOL_REF || code0 == LABEL_REF)
3827 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
3829 else if (code1 == CONST_INT || code1 == CONST
3830 || code1 == SYMBOL_REF || code1 == LABEL_REF)
3832 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
3834 else if (code0 == REG && code1 == REG)
3836 if (REG_OK_FOR_INDEX_P (op0)
3837 && REG_OK_FOR_BASE_P (op1))
3839 else if (REG_OK_FOR_INDEX_P (op1)
3840 && REG_OK_FOR_BASE_P (op0))
3842 else if (REG_OK_FOR_BASE_P (op1))
3843 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
3844 else if (REG_OK_FOR_BASE_P (op0))
3845 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
3846 else if (REG_OK_FOR_INDEX_P (op1))
3847 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
3848 else if (REG_OK_FOR_INDEX_P (op0))
3849 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
3852 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand,
3854 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand,
3858 else if (code0 == REG)
3860 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
3861 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
3863 else if (code1 == REG)
3865 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
3866 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
3869 else if (code == POST_INC || code == POST_DEC
3870 || code == PRE_INC || code == PRE_DEC)
3872 if (GET_CODE (XEXP (x, 0)) == REG)
3874 register int regno = REGNO (XEXP (x, 0));
3878 /* A register that is incremented cannot be constant! */
3879 if (regno >= FIRST_PSEUDO_REGISTER
3880 && reg_equiv_constant[regno] != 0)
3883 /* Handle a register that is equivalent to a memory location
3884 which cannot be addressed directly. */
3885 if (reg_equiv_address[regno] != 0)
3887 rtx tem = make_memloc (XEXP (x, 0), regno);
3888 /* First reload the memory location's address. */
3889 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
3890 &XEXP (tem, 0), operand, ind_levels);
3891 /* Put this inside a new increment-expression. */
3892 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
3893 /* Proceed to reload that, as if it contained a register. */
3896 /* If we have a hard register that is ok as an index,
3897 don't make a reload. If an autoincrement of a nice register
3898 isn't "valid", it must be that no autoincrement is "valid".
3899 If that is true and something made an autoincrement anyway,
3900 this must be a special context where one is allowed.
3901 (For example, a "push" instruction.)
3902 We can't improve this address, so leave it alone. */
3904 /* Otherwise, reload the autoincrement into a suitable hard reg
3905 and record how much to increment by. */
3907 if (reg_renumber[regno] >= 0)
3908 regno = reg_renumber[regno];
3909 if ((regno >= FIRST_PSEUDO_REGISTER
3910 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
3911 : REGNO_OK_FOR_BASE_P (regno))))
3916 = push_reload (x, 0, loc, 0,
3917 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
3918 GET_MODE (x), GET_MODE (x), VOIDmode, 0, operand);
3919 reload_inc[reloadnum]
3920 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
3925 /* Update the REG_INC notes. */
3927 for (link = REG_NOTES (this_insn);
3928 link; link = XEXP (link, 1))
3929 if (REG_NOTE_KIND (link) == REG_INC
3930 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
3931 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
3936 else if (GET_CODE (XEXP (x, 0)) == MEM)
3938 /* This is probably the result of a substitution, by eliminate_regs,
3939 of an equivalent address for a pseudo that was not allocated to a
3940 hard register. Verify that the specified address is valid and
3941 reload it into a register. */
3942 rtx tem = XEXP (x, 0);
3946 /* Since we know we are going to reload this item, don't decrement
3947 for the indirection level.
3949 Note that this is actually conservative: it would be slightly
3950 more efficient to use the value of SPILL_INDIRECT_LEVELS from
3952 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
3953 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
3954 operand, ind_levels);
3956 reloadnum = push_reload (x, 0, loc, 0,
3957 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
3958 GET_MODE (x), VOIDmode, 0, 0, operand);
3959 reload_inc[reloadnum]
3960 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
3962 link = FIND_REG_INC_NOTE (this_insn, tem);
3964 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
3969 else if (code == MEM)
3971 /* This is probably the result of a substitution, by eliminate_regs,
3972 of an equivalent address for a pseudo that was not allocated to a
3973 hard register. Verify that the specified address is valid and reload
3976 Since we know we are going to reload this item, don't decrement
3977 for the indirection level.
3979 Note that this is actually conservative: it would be slightly more
3980 efficient to use the value of SPILL_INDIRECT_LEVELS from
3983 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
3984 operand, ind_levels);
3986 push_reload (*loc, 0, loc, 0,
3987 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
3988 GET_MODE (x), VOIDmode, 0, 0, operand);
3991 else if (code == REG)
3993 register int regno = REGNO (x);
3995 if (reg_equiv_constant[regno] != 0)
3997 push_reload (reg_equiv_constant[regno], 0, loc, 0,
3998 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
3999 GET_MODE (x), VOIDmode, 0, 0, operand);
4003 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4004 that feeds this insn. */
4005 if (reg_equiv_mem[regno] != 0)
4007 push_reload (reg_equiv_mem[regno], 0, loc, 0,
4008 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4009 GET_MODE (x), VOIDmode, 0, 0, operand);
4013 if (reg_equiv_address[regno] != 0)
4015 x = make_memloc (x, regno);
4016 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4017 operand, ind_levels);
4020 if (reg_renumber[regno] >= 0)
4021 regno = reg_renumber[regno];
4022 if ((regno >= FIRST_PSEUDO_REGISTER
4023 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4024 : REGNO_OK_FOR_BASE_P (regno))))
4026 push_reload (x, 0, loc, 0,
4027 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4028 GET_MODE (x), VOIDmode, 0, 0, operand);
4032 /* If a register appearing in an address is the subject of a CLOBBER
4033 in this insn, reload it into some other register to be safe.
4034 The CLOBBER is supposed to make the register unavailable
4035 from before this insn to after it. */
4036 if (regno_clobbered_p (regno, this_insn))
4038 push_reload (x, 0, loc, 0,
4039 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4040 GET_MODE (x), VOIDmode, 0, 0, operand);
4046 register char *fmt = GET_RTX_FORMAT (code);
4048 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4051 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4052 operand, ind_levels);
4059 /* X, which is found at *LOC, is a part of an address that needs to be
4060 reloaded into a register of class CLASS. If X is a constant, or if
4061 X is a PLUS that contains a constant, check that the constant is a
4062 legitimate operand and that we are supposed to be able to load
4063 it into the register.
4065 If not, force the constant into memory and reload the MEM instead.
4067 MODE is the mode to use, in case X is an integer constant.
4069 NEEDED_FOR says which operand this reload is needed for.
4071 IND_LEVELS says how many levels of indirect addressing this machine
4075 find_reloads_address_part (x, loc, class, mode, needed_for, ind_levels)
4078 enum reg_class class;
4079 enum machine_mode mode;
4084 && (! LEGITIMATE_CONSTANT_P (x)
4085 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4087 rtx tem = x = force_const_mem (mode, x);
4088 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4089 needed_for, ind_levels);
4092 else if (GET_CODE (x) == PLUS
4093 && CONSTANT_P (XEXP (x, 1))
4094 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4095 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4097 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4099 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4100 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4101 needed_for, ind_levels);
4104 push_reload (x, 0, loc, 0, class, mode, VOIDmode, 0, 0, needed_for);
4107 /* Substitute into X the registers into which we have reloaded
4108 the things that need reloading. The array `replacements'
4109 says contains the locations of all pointers that must be changed
4110 and says what to replace them with.
4112 Return the rtx that X translates into; usually X, but modified. */
4119 for (i = 0; i < n_replacements; i++)
4121 register struct replacement *r = &replacements[i];
4122 register rtx reloadreg = reload_reg_rtx[r->what];
4125 /* Encapsulate RELOADREG so its machine mode matches what
4126 used to be there. */
4127 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4128 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4130 /* If we are putting this into a SUBREG and RELOADREG is a
4131 SUBREG, we would be making nested SUBREGs, so we have to fix
4132 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4134 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4136 if (GET_MODE (*r->subreg_loc)
4137 == GET_MODE (SUBREG_REG (reloadreg)))
4138 *r->subreg_loc = SUBREG_REG (reloadreg);
4141 *r->where = SUBREG_REG (reloadreg);
4142 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4146 *r->where = reloadreg;
4148 /* If reload got no reg and isn't optional, something's wrong. */
4149 else if (! reload_optional[r->what])
4154 /* Make a copy of any replacements being done into X and move those copies
4155 to locations in Y, a copy of X. We only look at the highest level of
4159 copy_replacements (x, y)
4164 enum rtx_code code = GET_CODE (x);
4165 char *fmt = GET_RTX_FORMAT (code);
4166 struct replacement *r;
4168 /* We can't support X being a SUBREG because we might then need to know its
4169 location if something inside it was replaced. */
4173 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4175 for (j = 0; j < n_replacements; j++)
4177 if (replacements[j].subreg_loc == &XEXP (x, i))
4179 r = &replacements[n_replacements++];
4180 r->where = replacements[j].where;
4181 r->subreg_loc = &XEXP (y, i);
4182 r->what = replacements[j].what;
4183 r->mode = replacements[j].mode;
4185 else if (replacements[j].where == &XEXP (x, i))
4187 r = &replacements[n_replacements++];
4188 r->where = &XEXP (y, i);
4190 r->what = replacements[j].what;
4191 r->mode = replacements[j].mode;
4196 /* If LOC was scheduled to be replaced by something, return the replacement.
4197 Otherwise, return *LOC. */
4200 find_replacement (loc)
4203 struct replacement *r;
4205 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4207 rtx reloadreg = reload_reg_rtx[r->what];
4209 if (reloadreg && r->where == loc)
4211 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
4212 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4216 else if (reloadreg && r->subreg_loc == loc)
4218 /* RELOADREG must be either a REG or a SUBREG.
4220 ??? Is it actually still ever a SUBREG? If so, why? */
4222 if (GET_CODE (reloadreg) == REG)
4223 return gen_rtx (REG, GET_MODE (*loc),
4224 REGNO (reloadreg) + SUBREG_WORD (*loc));
4225 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
4228 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
4229 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
4236 /* Return nonzero if register in range [REGNO, ENDREGNO)
4237 appears either explicitly or implicitly in X
4238 other than being stored into.
4240 References contained within the substructure at LOC do not count.
4241 LOC may be zero, meaning don't ignore anything.
4243 This is similar to refers_to_regno_p in rtlanal.c except that we
4244 look at equivalences for pseudos that didn't get hard registers. */
4247 refers_to_regno_for_reload_p (regno, endregno, x, loc)
4248 int regno, endregno;
4253 register RTX_CODE code;
4260 code = GET_CODE (x);
4267 /* If this is a pseudo, a hard register must not have been allocated.
4268 X must therefore either be a constant or be in memory. */
4269 if (i >= FIRST_PSEUDO_REGISTER)
4271 if (reg_equiv_memory_loc[i])
4272 return refers_to_regno_for_reload_p (regno, endregno,
4273 reg_equiv_memory_loc[i], 0);
4275 if (reg_equiv_constant[i])
4281 return (endregno > i
4282 && regno < i + (i < FIRST_PSEUDO_REGISTER
4283 ? HARD_REGNO_NREGS (i, GET_MODE (x))
4287 /* If this is a SUBREG of a hard reg, we can see exactly which
4288 registers are being modified. Otherwise, handle normally. */
4289 if (GET_CODE (SUBREG_REG (x)) == REG
4290 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4292 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4294 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
4295 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4297 return endregno > inner_regno && regno < inner_endregno;
4303 if (&SET_DEST (x) != loc
4304 /* Note setting a SUBREG counts as referring to the REG it is in for
4305 a pseudo but not for hard registers since we can
4306 treat each word individually. */
4307 && ((GET_CODE (SET_DEST (x)) == SUBREG
4308 && loc != &SUBREG_REG (SET_DEST (x))
4309 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
4310 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
4311 && refers_to_regno_for_reload_p (regno, endregno,
4312 SUBREG_REG (SET_DEST (x)),
4314 || (GET_CODE (SET_DEST (x)) != REG
4315 && refers_to_regno_for_reload_p (regno, endregno,
4316 SET_DEST (x), loc))))
4319 if (code == CLOBBER || loc == &SET_SRC (x))
4325 /* X does not match, so try its subexpressions. */
4327 fmt = GET_RTX_FORMAT (code);
4328 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4330 if (fmt[i] == 'e' && loc != &XEXP (x, i))
4338 if (refers_to_regno_for_reload_p (regno, endregno,
4342 else if (fmt[i] == 'E')
4345 for (j = XVECLEN (x, i) - 1; j >=0; j--)
4346 if (loc != &XVECEXP (x, i, j)
4347 && refers_to_regno_for_reload_p (regno, endregno,
4348 XVECEXP (x, i, j), loc))
4355 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4356 we check if any register number in X conflicts with the relevant register
4357 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4358 contains a MEM (we don't bother checking for memory addresses that can't
4359 conflict because we expect this to be a rare case.
4361 This function is similar to reg_overlap_mention_p in rtlanal.c except
4362 that we look at equivalences for pseudos that didn't get hard registers. */
4365 reg_overlap_mentioned_for_reload_p (x, in)
4368 int regno, endregno;
4370 if (GET_CODE (x) == SUBREG)
4372 regno = REGNO (SUBREG_REG (x));
4373 if (regno < FIRST_PSEUDO_REGISTER)
4374 regno += SUBREG_WORD (x);
4376 else if (GET_CODE (x) == REG)
4380 /* If this is a pseudo, it must not have been assigned a hard register.
4381 Therefore, it must either be in memory or be a constant. */
4383 if (regno >= FIRST_PSEUDO_REGISTER)
4385 if (reg_equiv_memory_loc[regno])
4386 return refers_to_mem_for_reload_p (in);
4387 else if (reg_equiv_constant[regno])
4392 else if (CONSTANT_P (x))
4394 else if (GET_CODE (x) == MEM)
4395 return refers_to_mem_for_reload_p (in);
4396 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
4397 || GET_CODE (x) == CC0)
4398 return reg_mentioned_p (x, in);
4402 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
4403 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4405 return refers_to_regno_for_reload_p (regno, endregno, in, 0);
4408 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
4412 refers_to_mem_for_reload_p (x)
4418 if (GET_CODE (x) == MEM)
4421 if (GET_CODE (x) == REG)
4422 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
4423 && reg_equiv_memory_loc[REGNO (x)]);
4425 fmt = GET_RTX_FORMAT (GET_CODE (x));
4426 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4428 && (GET_CODE (XEXP (x, i)) == MEM
4429 || refers_to_mem_for_reload_p (XEXP (x, i))))
4437 /* [[This function is currently obsolete, now that volatility
4438 is represented by a special bit `volatil' so VOLATILE is never used;
4439 and UNCHANGING has never been brought into use.]]
4441 Alter X by eliminating all VOLATILE and UNCHANGING expressions.
4442 Each of them is replaced by its operand.
4443 Thus, (PLUS (VOLATILE (MEM (REG 5))) (CONST_INT 4))
4444 becomes (PLUS (MEM (REG 5)) (CONST_INT 4)).
4446 If X is itself a VOLATILE expression,
4447 we return the expression that should replace it
4448 but we do not modify X. */
4451 forget_volatility (x)
4454 enum rtx_code code = GET_CODE (x);
4457 register rtx value = 0;
4476 fmt = GET_RTX_FORMAT (code);
4477 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4480 XEXP (x, i) = forget_volatility (XEXP (x, i));
4484 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4485 XVECEXP (x, i, j) = forget_volatility (XVECEXP (x, i, j));
4494 /* Check the insns before INSN to see if there is a suitable register
4495 containing the same value as GOAL.
4496 If OTHER is -1, look for a register in class CLASS.
4497 Otherwise, just see if register number OTHER shares GOAL's value.
4499 Return an rtx for the register found, or zero if none is found.
4501 If RELOAD_REG_P is (short *)1,
4502 we reject any hard reg that appears in reload_reg_rtx
4503 because such a hard reg is also needed coming into this insn.
4505 If RELOAD_REG_P is any other nonzero value,
4506 it is a vector indexed by hard reg number
4507 and we reject any hard reg whose element in the vector is nonnegative
4508 as well as any that appears in reload_reg_rtx.
4510 If GOAL is zero, then GOALREG is a register number; we look
4511 for an equivalent for that register.
4513 MODE is the machine mode of the value we want an equivalence for.
4514 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
4516 This function is used by jump.c as well as in the reload pass.
4518 If GOAL is the sum of the stack pointer and a constant, we treat it
4519 as if it were a constant except that sp is required to be unchanging. */
4522 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
4525 enum reg_class class;
4527 short *reload_reg_p;
4529 enum machine_mode mode;
4531 register rtx p = insn;
4532 rtx valtry, value, where;
4534 register int regno = -1;
4538 int goal_mem_addr_varies = 0;
4539 int need_stable_sp = 0;
4545 else if (GET_CODE (goal) == REG)
4546 regno = REGNO (goal);
4547 else if (GET_CODE (goal) == MEM)
4549 enum rtx_code code = GET_CODE (XEXP (goal, 0));
4550 if (MEM_VOLATILE_P (goal))
4552 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
4554 /* An address with side effects must be reexecuted. */
4565 else if (CONSTANT_P (goal))
4567 else if (GET_CODE (goal) == PLUS
4568 && XEXP (goal, 0) == stack_pointer_rtx
4569 && CONSTANT_P (XEXP (goal, 1)))
4570 goal_const = need_stable_sp = 1;
4574 /* On some machines, certain regs must always be rejected
4575 because they don't behave the way ordinary registers do. */
4577 #ifdef OVERLAPPING_REGNO_P
4578 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4579 && OVERLAPPING_REGNO_P (regno))
4583 /* Scan insns back from INSN, looking for one that copies
4584 a value into or out of GOAL.
4585 Stop and give up if we reach a label. */
4590 if (p == 0 || GET_CODE (p) == CODE_LABEL)
4592 if (GET_CODE (p) == INSN
4593 /* If we don't want spill regs ... */
4594 && (! (reload_reg_p != 0 && reload_reg_p != (short *)1)
4595 /* ... then ignore insns introduced by reload; they aren't useful
4596 and can cause results in reload_as_needed to be different
4597 from what they were when calculating the need for spills.
4598 If we notice an input-reload insn here, we will reject it below,
4599 but it might hide a usable equivalent. That makes bad code.
4600 It may even abort: perhaps no reg was spilled for this insn
4601 because it was assumed we would find that equivalent. */
4602 || INSN_UID (p) < reload_first_uid))
4605 pat = single_set (p);
4606 /* First check for something that sets some reg equal to GOAL. */
4609 && true_regnum (SET_SRC (pat)) == regno
4610 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4613 && true_regnum (SET_DEST (pat)) == regno
4614 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
4616 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
4617 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4619 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
4620 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
4622 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
4623 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
4624 /* If we are looking for a constant,
4625 and something equivalent to that constant was copied
4626 into a reg, we can use that reg. */
4627 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 0))
4628 && rtx_equal_p (XEXP (tem, 0), goal)
4629 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4630 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 0))
4631 && GET_CODE (SET_DEST (pat)) == REG
4632 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
4633 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
4634 && GET_CODE (goal) == CONST_INT
4635 && INTVAL (goal) == CONST_DOUBLE_LOW (XEXP (tem, 0))
4636 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
4638 && (valueno = true_regnum (valtry)) >= 0)
4639 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 0))
4640 && GET_CODE (SET_DEST (pat)) == REG
4641 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
4642 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
4643 && GET_CODE (goal) == CONST_INT
4644 && INTVAL (goal) == CONST_DOUBLE_HIGH (XEXP (tem, 0))
4646 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
4647 && (valueno = true_regnum (valtry)) >= 0)))
4650 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
4651 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
4661 /* We found a previous insn copying GOAL into a suitable other reg VALUE
4662 (or copying VALUE into GOAL, if GOAL is also a register).
4663 Now verify that VALUE is really valid. */
4665 /* VALUENO is the register number of VALUE; a hard register. */
4667 /* Don't try to re-use something that is killed in this insn. We want
4668 to be able to trust REG_UNUSED notes. */
4669 if (find_reg_note (where, REG_UNUSED, value))
4672 /* If we propose to get the value from the stack pointer or if GOAL is
4673 a MEM based on the stack pointer, we need a stable SP. */
4674 if (valueno == STACK_POINTER_REGNUM
4675 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
4679 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
4680 if (GET_MODE (value) != mode)
4683 /* Reject VALUE if it was loaded from GOAL
4684 and is also a register that appears in the address of GOAL. */
4686 if (goal_mem && value == SET_DEST (PATTERN (where))
4687 && refers_to_regno_for_reload_p (valueno,
4689 + HARD_REGNO_NREGS (valueno, mode)),
4693 /* Reject registers that overlap GOAL. */
4695 if (!goal_mem && !goal_const
4696 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
4697 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
4700 /* Reject VALUE if it is one of the regs reserved for reloads.
4701 Reload1 knows how to reuse them anyway, and it would get
4702 confused if we allocated one without its knowledge.
4703 (Now that insns introduced by reload are ignored above,
4704 this case shouldn't happen, but I'm not positive.) */
4706 if (reload_reg_p != 0 && reload_reg_p != (short *)1
4707 && reload_reg_p[valueno] >= 0)
4710 /* On some machines, certain regs must always be rejected
4711 because they don't behave the way ordinary registers do. */
4713 #ifdef OVERLAPPING_REGNO_P
4714 if (OVERLAPPING_REGNO_P (valueno))
4718 nregs = HARD_REGNO_NREGS (regno, mode);
4719 valuenregs = HARD_REGNO_NREGS (valueno, mode);
4721 /* Reject VALUE if it is a register being used for an input reload
4722 even if it is not one of those reserved. */
4724 if (reload_reg_p != 0)
4727 for (i = 0; i < n_reloads; i++)
4728 if (reload_reg_rtx[i] != 0 && reload_in[i])
4730 int regno1 = REGNO (reload_reg_rtx[i]);
4731 int nregs1 = HARD_REGNO_NREGS (regno1,
4732 GET_MODE (reload_reg_rtx[i]));
4733 if (regno1 < valueno + valuenregs
4734 && regno1 + nregs1 > valueno)
4740 goal_mem_addr_varies = rtx_addr_varies_p (goal);
4742 /* Now verify that the values of GOAL and VALUE remain unaltered
4743 until INSN is reached. */
4752 /* Don't trust the conversion past a function call
4753 if either of the two is in a call-clobbered register, or memory. */
4754 if (GET_CODE (p) == CALL_INSN
4755 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4756 && call_used_regs[regno])
4758 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
4759 && call_used_regs[valueno])
4765 #ifdef INSN_CLOBBERS_REGNO_P
4766 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
4767 && INSN_CLOBBERS_REGNO_P (p, valueno))
4768 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4769 && INSN_CLOBBERS_REGNO_P (p, regno)))
4773 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
4775 /* If this insn P stores in either GOAL or VALUE, return 0.
4776 If GOAL is a memory ref and this insn writes memory, return 0.
4777 If GOAL is a memory ref and its address is not constant,
4778 and this insn P changes a register used in GOAL, return 0. */
4781 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
4783 register rtx dest = SET_DEST (pat);
4784 while (GET_CODE (dest) == SUBREG
4785 || GET_CODE (dest) == ZERO_EXTRACT
4786 || GET_CODE (dest) == SIGN_EXTRACT
4787 || GET_CODE (dest) == STRICT_LOW_PART)
4788 dest = XEXP (dest, 0);
4789 if (GET_CODE (dest) == REG)
4791 register int xregno = REGNO (dest);
4793 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
4794 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
4797 if (xregno < regno + nregs && xregno + xnregs > regno)
4799 if (xregno < valueno + valuenregs
4800 && xregno + xnregs > valueno)
4802 if (goal_mem_addr_varies
4803 && reg_overlap_mentioned_for_reload_p (dest, goal))
4806 else if (goal_mem && GET_CODE (dest) == MEM
4807 && ! push_operand (dest, GET_MODE (dest)))
4809 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
4812 else if (GET_CODE (pat) == PARALLEL)
4815 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
4817 register rtx v1 = XVECEXP (pat, 0, i);
4818 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
4820 register rtx dest = SET_DEST (v1);
4821 while (GET_CODE (dest) == SUBREG
4822 || GET_CODE (dest) == ZERO_EXTRACT
4823 || GET_CODE (dest) == SIGN_EXTRACT
4824 || GET_CODE (dest) == STRICT_LOW_PART)
4825 dest = XEXP (dest, 0);
4826 if (GET_CODE (dest) == REG)
4828 register int xregno = REGNO (dest);
4830 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
4831 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
4834 if (xregno < regno + nregs
4835 && xregno + xnregs > regno)
4837 if (xregno < valueno + valuenregs
4838 && xregno + xnregs > valueno)
4840 if (goal_mem_addr_varies
4841 && reg_overlap_mentioned_for_reload_p (dest,
4845 else if (goal_mem && GET_CODE (dest) == MEM
4846 && ! push_operand (dest, GET_MODE (dest)))
4848 else if (need_stable_sp
4849 && push_operand (dest, GET_MODE (dest)))
4856 /* If this insn auto-increments or auto-decrements
4857 either regno or valueno, return 0 now.
4858 If GOAL is a memory ref and its address is not constant,
4859 and this insn P increments a register used in GOAL, return 0. */
4863 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
4864 if (REG_NOTE_KIND (link) == REG_INC
4865 && GET_CODE (XEXP (link, 0)) == REG)
4867 register int incno = REGNO (XEXP (link, 0));
4868 if (incno < regno + nregs && incno >= regno)
4870 if (incno < valueno + valuenregs && incno >= valueno)
4872 if (goal_mem_addr_varies
4873 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
4883 /* Find a place where INCED appears in an increment or decrement operator
4884 within X, and return the amount INCED is incremented or decremented by.
4885 The value is always positive. */
4888 find_inc_amount (x, inced)
4891 register enum rtx_code code = GET_CODE (x);
4897 register rtx addr = XEXP (x, 0);
4898 if ((GET_CODE (addr) == PRE_DEC
4899 || GET_CODE (addr) == POST_DEC
4900 || GET_CODE (addr) == PRE_INC
4901 || GET_CODE (addr) == POST_INC)
4902 && XEXP (addr, 0) == inced)
4903 return GET_MODE_SIZE (GET_MODE (x));
4906 fmt = GET_RTX_FORMAT (code);
4907 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4911 register int tem = find_inc_amount (XEXP (x, i), inced);
4918 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4920 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
4930 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
4933 regno_clobbered_p (regno, insn)
4937 if (GET_CODE (PATTERN (insn)) == CLOBBER
4938 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
4939 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
4941 if (GET_CODE (PATTERN (insn)) == PARALLEL)
4943 int i = XVECLEN (PATTERN (insn), 0) - 1;
4947 rtx elt = XVECEXP (PATTERN (insn), 0, i);
4948 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
4949 && REGNO (XEXP (elt, 0)) == regno)