1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
102 #ifndef REGISTER_MOVE_COST
103 #define REGISTER_MOVE_COST(x, y) 2
106 /* The variables set up by `find_reloads' are:
108 n_reloads number of distinct reloads needed; max reload # + 1
109 tables indexed by reload number
110 reload_in rtx for value to reload from
111 reload_out rtx for where to store reload-reg afterward if nec
112 (often the same as reload_in)
113 reload_reg_class enum reg_class, saying what regs to reload into
114 reload_inmode enum machine_mode; mode this operand should have
115 when reloaded, on input.
116 reload_outmode enum machine_mode; mode this operand should have
117 when reloaded, on output.
118 reload_optional char, nonzero for an optional reload.
119 Optional reloads are ignored unless the
120 value is already sitting in a register.
121 reload_inc int, positive amount to increment or decrement by if
122 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
123 Ignored otherwise (don't assume it is zero).
124 reload_in_reg rtx. A reg for which reload_in is the equivalent.
125 If reload_in is a symbol_ref which came from
126 reg_equiv_constant, then this is the pseudo
127 which has that symbol_ref as equivalent.
128 reload_reg_rtx rtx. This is the register to reload into.
129 If it is zero when `find_reloads' returns,
130 you must find a suitable register in the class
131 specified by reload_reg_class, and store here
132 an rtx for that register with mode from
133 reload_inmode or reload_outmode.
134 reload_nocombine char, nonzero if this reload shouldn't be
135 combined with another reload.
136 reload_opnum int, operand number being reloaded. This is
137 used to group related reloads and need not always
138 be equal to the actual operand number in the insn,
139 though it current will be; for in-out operands, it
140 is one of the two operand numbers.
141 reload_when_needed enum, classifies reload as needed either for
142 addressing an input reload, addressing an output,
143 for addressing a non-reloaded mem ref,
144 or for unspecified purposes (i.e., more than one
146 reload_secondary_p int, 1 if this is a secondary register for one
148 reload_secondary_in_reload
149 reload_secondary_out_reload
150 int, gives the reload number of a secondary
151 reload, when needed; otherwise -1
152 reload_secondary_in_icode
153 reload_secondary_out_icode
154 enum insn_code, if a secondary reload is required,
155 gives the INSN_CODE that uses the secondary
156 reload as a scratch register, or CODE_FOR_nothing
157 if the secondary reload register is to be an
158 intermediate register. */
161 rtx reload_in[MAX_RELOADS];
162 rtx reload_out[MAX_RELOADS];
163 enum reg_class reload_reg_class[MAX_RELOADS];
164 enum machine_mode reload_inmode[MAX_RELOADS];
165 enum machine_mode reload_outmode[MAX_RELOADS];
166 rtx reload_reg_rtx[MAX_RELOADS];
167 char reload_optional[MAX_RELOADS];
168 int reload_inc[MAX_RELOADS];
169 rtx reload_in_reg[MAX_RELOADS];
170 char reload_nocombine[MAX_RELOADS];
171 int reload_opnum[MAX_RELOADS];
172 enum reload_type reload_when_needed[MAX_RELOADS];
173 int reload_secondary_p[MAX_RELOADS];
174 int reload_secondary_in_reload[MAX_RELOADS];
175 int reload_secondary_out_reload[MAX_RELOADS];
176 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
177 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
179 /* All the "earlyclobber" operands of the current insn
180 are recorded here. */
182 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
184 int reload_n_operands;
186 /* Replacing reloads.
188 If `replace_reloads' is nonzero, then as each reload is recorded
189 an entry is made for it in the table `replacements'.
190 Then later `subst_reloads' can look through that table and
191 perform all the replacements needed. */
193 /* Nonzero means record the places to replace. */
194 static int replace_reloads;
196 /* Each replacement is recorded with a structure like this. */
199 rtx *where; /* Location to store in */
200 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
201 a SUBREG; 0 otherwise. */
202 int what; /* which reload this is for */
203 enum machine_mode mode; /* mode it must have */
206 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
208 /* Number of replacements currently recorded. */
209 static int n_replacements;
211 /* Used to track what is modified by an operand. */
214 int reg_flag; /* Nonzero if referencing a register. */
215 int safe; /* Nonzero if this can't conflict with anything. */
216 rtx base; /* Base address for MEM. */
217 HOST_WIDE_INT start; /* Starting offset or register number. */
218 HOST_WIDE_INT end; /* Ending offset or register number. */
221 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
222 (see reg_equiv_address). */
223 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
224 static int n_memlocs;
226 #ifdef SECONDARY_MEMORY_NEEDED
228 /* Save MEMs needed to copy from one class of registers to another. One MEM
229 is used per mode, but normally only one or two modes are ever used.
231 We keep two versions, before and after register elimination. The one
232 after register elimination is record separately for each operand. This
233 is done in case the address is not valid to be sure that we separately
236 static rtx secondary_memlocs[NUM_MACHINE_MODES];
237 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
240 /* The instruction we are doing reloads for;
241 so we can test whether a register dies in it. */
242 static rtx this_insn;
244 /* Nonzero if this instruction is a user-specified asm with operands. */
245 static int this_insn_is_asm;
247 /* If hard_regs_live_known is nonzero,
248 we can tell which hard regs are currently live,
249 at least enough to succeed in choosing dummy reloads. */
250 static int hard_regs_live_known;
252 /* Indexed by hard reg number,
253 element is nonegative if hard reg has been spilled.
254 This vector is passed to `find_reloads' as an argument
255 and is not changed here. */
256 static short *static_reload_reg_p;
258 /* Set to 1 in subst_reg_equivs if it changes anything. */
259 static int subst_reg_equivs_changed;
261 /* On return from push_reload, holds the reload-number for the OUT
262 operand, which can be different for that from the input operand. */
263 static int output_reloadnum;
265 /* Compare two RTX's. */
266 #define MATCHES(x, y) \
267 (x == y || (x != 0 && (GET_CODE (x) == REG \
268 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
269 : rtx_equal_p (x, y) && ! side_effects_p (x))))
271 /* Indicates if two reloads purposes are for similar enough things that we
272 can merge their reloads. */
273 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
274 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
275 || ((when1) == (when2) && (op1) == (op2)) \
276 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
277 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
278 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
279 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
280 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
282 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
283 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
284 ((when1) != (when2) \
285 || ! ((op1) == (op2) \
286 || (when1) == RELOAD_FOR_INPUT \
287 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
288 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
290 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
291 enum machine_mode, enum reload_type,
293 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
294 enum machine_mode, enum machine_mode,
295 int, int, int, enum reload_type));
296 static void push_replacement PROTO((rtx *, int, enum machine_mode));
297 static void combine_reloads PROTO((void));
298 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
299 enum machine_mode, enum machine_mode,
300 enum reg_class, int));
301 static int earlyclobber_operand_p PROTO((rtx));
302 static int hard_reg_set_here_p PROTO((int, int, rtx));
303 static struct decomposition decompose PROTO((rtx));
304 static int immune_p PROTO((rtx, rtx, struct decomposition));
305 static int alternative_allows_memconst PROTO((char *, int));
306 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
307 static rtx make_memloc PROTO((rtx, int));
308 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
309 int, enum reload_type, int));
310 static rtx subst_reg_equivs PROTO((rtx));
311 static rtx subst_indexed_address PROTO((rtx));
312 static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
313 enum reload_type,int));
314 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
315 enum machine_mode, int,
316 enum reload_type, int));
317 static int find_inc_amount PROTO((rtx, rtx));
319 #ifdef HAVE_SECONDARY_RELOADS
321 /* Determine if any secondary reloads are needed for loading (if IN_P is
322 non-zero) or storing (if IN_P is zero) X to or from a reload register of
323 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
324 are needed, push them.
326 Return the reload number of the secondary reload we made, or -1 if
327 we didn't need one. *PICODE is set to the insn_code to use if we do
328 need a secondary reload. */
331 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
337 enum reg_class reload_class;
338 enum machine_mode reload_mode;
339 enum reload_type type;
340 enum insn_code *picode;
342 enum reg_class class = NO_REGS;
343 enum machine_mode mode = reload_mode;
344 enum insn_code icode = CODE_FOR_nothing;
345 enum reg_class t_class = NO_REGS;
346 enum machine_mode t_mode = VOIDmode;
347 enum insn_code t_icode = CODE_FOR_nothing;
348 enum reload_type secondary_type;
350 int s_reload, t_reload = -1;
352 if (type == RELOAD_FOR_INPUT_ADDRESS || type == RELOAD_FOR_OUTPUT_ADDRESS)
353 secondary_type = type;
355 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
357 *picode = CODE_FOR_nothing;
359 /* If X is a paradoxical SUBREG, use the inner value to determine both the
360 mode and object being reloaded. */
361 if (GET_CODE (x) == SUBREG
362 && (GET_MODE_SIZE (GET_MODE (x))
363 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
366 reload_mode = GET_MODE (x);
369 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
370 is still a pseudo-register by now, it *must* have an equivalent MEM
371 but we don't want to assume that), use that equivalent when seeing if
372 a secondary reload is needed since whether or not a reload is needed
373 might be sensitive to the form of the MEM. */
375 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
376 && reg_equiv_mem[REGNO (x)] != 0)
377 x = reg_equiv_mem[REGNO (x)];
379 #ifdef SECONDARY_INPUT_RELOAD_CLASS
381 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
384 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
386 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
389 /* If we don't need any secondary registers, done. */
390 if (class == NO_REGS)
393 /* Get a possible insn to use. If the predicate doesn't accept X, don't
396 icode = (in_p ? reload_in_optab[(int) reload_mode]
397 : reload_out_optab[(int) reload_mode]);
399 if (icode != CODE_FOR_nothing
400 && insn_operand_predicate[(int) icode][in_p]
401 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
402 icode = CODE_FOR_nothing;
404 /* If we will be using an insn, see if it can directly handle the reload
405 register we will be using. If it can, the secondary reload is for a
406 scratch register. If it can't, we will use the secondary reload for
407 an intermediate register and require a tertiary reload for the scratch
410 if (icode != CODE_FOR_nothing)
412 /* If IN_P is non-zero, the reload register will be the output in
413 operand 0. If IN_P is zero, the reload register will be the input
414 in operand 1. Outputs should have an initial "=", which we must
417 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
418 enum reg_class insn_class
419 = (insn_letter == 'r' ? GENERAL_REGS
420 : REG_CLASS_FROM_LETTER (insn_letter));
422 if (insn_class == NO_REGS
423 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
424 /* The scratch register's constraint must start with "=&". */
425 || insn_operand_constraint[(int) icode][2][0] != '='
426 || insn_operand_constraint[(int) icode][2][1] != '&')
429 if (reg_class_subset_p (reload_class, insn_class))
430 mode = insn_operand_mode[(int) icode][2];
433 char t_letter = insn_operand_constraint[(int) icode][2][2];
435 t_mode = insn_operand_mode[(int) icode][2];
436 t_class = (t_letter == 'r' ? GENERAL_REGS
437 : REG_CLASS_FROM_LETTER (t_letter));
439 icode = CODE_FOR_nothing;
443 /* This case isn't valid, so fail. Reload is allowed to use the same
444 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
445 in the case of a secondary register, we actually need two different
446 registers for correct code. We fail here to prevent the possibility of
447 silently generating incorrect code later.
449 The convention is that secondary input reloads are valid only if the
450 secondary_class is different from class. If you have such a case, you
451 can not use secondary reloads, you must work around the problem some
454 Allow this when MODE is not reload_mode and assume that the generated
455 code handles this case (it does on the Alpha, which is the only place
456 this currently happens). */
458 if (in_p && class == reload_class && mode == reload_mode)
461 /* If we need a tertiary reload, see if we have one we can reuse or else
464 if (t_class != NO_REGS)
466 for (t_reload = 0; t_reload < n_reloads; t_reload++)
467 if (reload_secondary_p[t_reload]
468 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
469 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
470 && ((in_p && reload_inmode[t_reload] == t_mode)
471 || (! in_p && reload_outmode[t_reload] == t_mode))
472 && ((in_p && (reload_secondary_in_icode[t_reload]
473 == CODE_FOR_nothing))
474 || (! in_p &&(reload_secondary_out_icode[t_reload]
475 == CODE_FOR_nothing)))
476 && (reg_class_size[(int) t_class] == 1
477 #ifdef SMALL_REGISTER_CLASSES
481 && MERGABLE_RELOADS (secondary_type,
482 reload_when_needed[t_reload],
483 opnum, reload_opnum[t_reload]))
486 reload_inmode[t_reload] = t_mode;
488 reload_outmode[t_reload] = t_mode;
490 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
491 reload_reg_class[t_reload] = t_class;
493 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
494 reload_optional[t_reload] &= optional;
495 reload_secondary_p[t_reload] = 1;
496 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
497 opnum, reload_opnum[t_reload]))
498 reload_when_needed[t_reload] = RELOAD_OTHER;
501 if (t_reload == n_reloads)
503 /* We need to make a new tertiary reload for this register class. */
504 reload_in[t_reload] = reload_out[t_reload] = 0;
505 reload_reg_class[t_reload] = t_class;
506 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
507 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
508 reload_reg_rtx[t_reload] = 0;
509 reload_optional[t_reload] = optional;
510 reload_inc[t_reload] = 0;
511 /* Maybe we could combine these, but it seems too tricky. */
512 reload_nocombine[t_reload] = 1;
513 reload_in_reg[t_reload] = 0;
514 reload_opnum[t_reload] = opnum;
515 reload_when_needed[t_reload] = secondary_type;
516 reload_secondary_in_reload[t_reload] = -1;
517 reload_secondary_out_reload[t_reload] = -1;
518 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
519 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
520 reload_secondary_p[t_reload] = 1;
526 /* See if we can reuse an existing secondary reload. */
527 for (s_reload = 0; s_reload < n_reloads; s_reload++)
528 if (reload_secondary_p[s_reload]
529 && (reg_class_subset_p (class, reload_reg_class[s_reload])
530 || reg_class_subset_p (reload_reg_class[s_reload], class))
531 && ((in_p && reload_inmode[s_reload] == mode)
532 || (! in_p && reload_outmode[s_reload] == mode))
533 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
534 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
535 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
536 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
537 && (reg_class_size[(int) class] == 1
538 #ifdef SMALL_REGISTER_CLASSES
542 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
543 opnum, reload_opnum[s_reload]))
546 reload_inmode[s_reload] = mode;
548 reload_outmode[s_reload] = mode;
550 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
551 reload_reg_class[s_reload] = class;
553 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
554 reload_optional[s_reload] &= optional;
555 reload_secondary_p[s_reload] = 1;
556 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
557 opnum, reload_opnum[s_reload]))
558 reload_when_needed[s_reload] = RELOAD_OTHER;
561 if (s_reload == n_reloads)
563 /* We need to make a new secondary reload for this register class. */
564 reload_in[s_reload] = reload_out[s_reload] = 0;
565 reload_reg_class[s_reload] = class;
567 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
568 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
569 reload_reg_rtx[s_reload] = 0;
570 reload_optional[s_reload] = optional;
571 reload_inc[s_reload] = 0;
572 /* Maybe we could combine these, but it seems too tricky. */
573 reload_nocombine[s_reload] = 1;
574 reload_in_reg[s_reload] = 0;
575 reload_opnum[s_reload] = opnum;
576 reload_when_needed[s_reload] = secondary_type;
577 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
578 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
579 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
580 reload_secondary_out_icode[s_reload]
581 = ! in_p ? t_icode : CODE_FOR_nothing;
582 reload_secondary_p[s_reload] = 1;
586 #ifdef SECONDARY_MEMORY_NEEDED
587 /* If we need a memory location to copy between the two reload regs,
590 if (in_p && icode == CODE_FOR_nothing
591 && SECONDARY_MEMORY_NEEDED (class, reload_class, reload_mode))
592 get_secondary_mem (x, reload_mode, opnum, type);
594 if (! in_p && icode == CODE_FOR_nothing
595 && SECONDARY_MEMORY_NEEDED (reload_class, class, reload_mode))
596 get_secondary_mem (x, reload_mode, opnum, type);
603 #endif /* HAVE_SECONDARY_RELOADS */
605 #ifdef SECONDARY_MEMORY_NEEDED
607 /* Return a memory location that will be used to copy X in mode MODE.
608 If we haven't already made a location for this mode in this insn,
609 call find_reloads_address on the location being returned. */
612 get_secondary_mem (x, mode, opnum, type)
614 enum machine_mode mode;
616 enum reload_type type;
621 /* By default, if MODE is narrower than a word, widen it to a word.
622 This is required because most machines that require these memory
623 locations do not support short load and stores from all registers
624 (e.g., FP registers). */
626 #ifdef SECONDARY_MEMORY_NEEDED_MODE
627 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
629 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
630 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
633 /* If we already have made a MEM for this operand in MODE, return it. */
634 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
635 return secondary_memlocs_elim[(int) mode][opnum];
637 /* If this is the first time we've tried to get a MEM for this mode,
638 allocate a new one. `something_changed' in reload will get set
639 by noticing that the frame size has changed. */
641 if (secondary_memlocs[(int) mode] == 0)
643 #ifdef SECONDARY_MEMORY_NEEDED_RTX
644 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
646 secondary_memlocs[(int) mode]
647 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
651 /* Get a version of the address doing any eliminations needed. If that
652 didn't give us a new MEM, make a new one if it isn't valid. */
654 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
655 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
657 if (! mem_valid && loc == secondary_memlocs[(int) mode])
658 loc = copy_rtx (loc);
660 /* The only time the call below will do anything is if the stack
661 offset is too large. In that case IND_LEVELS doesn't matter, so we
662 can just pass a zero. Adjust the type to be the address of the
663 corresponding object. If the address was valid, save the eliminated
664 address. If it wasn't valid, we need to make a reload each time, so
669 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
670 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
673 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
677 secondary_memlocs_elim[(int) mode][opnum] = loc;
681 /* Clear any secondary memory locations we've made. */
684 clear_secondary_mem ()
686 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
688 #endif /* SECONDARY_MEMORY_NEEDED */
690 /* Record one reload that needs to be performed.
691 IN is an rtx saying where the data are to be found before this instruction.
692 OUT says where they must be stored after the instruction.
693 (IN is zero for data not read, and OUT is zero for data not written.)
694 INLOC and OUTLOC point to the places in the instructions where
695 IN and OUT were found.
696 If IN and OUT are both non-zero, it means the same register must be used
697 to reload both IN and OUT.
699 CLASS is a register class required for the reloaded data.
700 INMODE is the machine mode that the instruction requires
701 for the reg that replaces IN and OUTMODE is likewise for OUT.
703 If IN is zero, then OUT's location and mode should be passed as
706 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
708 OPTIONAL nonzero means this reload does not need to be performed:
709 it can be discarded if that is more convenient.
711 OPNUM and TYPE say what the purpose of this reload is.
713 The return value is the reload-number for this reload.
715 If both IN and OUT are nonzero, in some rare cases we might
716 want to make two separate reloads. (Actually we never do this now.)
717 Therefore, the reload-number for OUT is stored in
718 output_reloadnum when we return; the return value applies to IN.
719 Usually (presently always), when IN and OUT are nonzero,
720 the two reload-numbers are equal, but the caller should be careful to
724 push_reload (in, out, inloc, outloc, class,
725 inmode, outmode, strict_low, optional, opnum, type)
726 register rtx in, out;
728 enum reg_class class;
729 enum machine_mode inmode, outmode;
733 enum reload_type type;
737 int dont_remove_subreg = 0;
738 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
739 int secondary_in_reload = -1, secondary_out_reload = -1;
740 enum insn_code secondary_in_icode = CODE_FOR_nothing;
741 enum insn_code secondary_out_icode = CODE_FOR_nothing;
743 /* INMODE and/or OUTMODE could be VOIDmode if no mode
744 has been specified for the operand. In that case,
745 use the operand's mode as the mode to reload. */
746 if (inmode == VOIDmode && in != 0)
747 inmode = GET_MODE (in);
748 if (outmode == VOIDmode && out != 0)
749 outmode = GET_MODE (out);
751 /* If IN is a pseudo register everywhere-equivalent to a constant, and
752 it is not in a hard register, reload straight from the constant,
753 since we want to get rid of such pseudo registers.
754 Often this is done earlier, but not always in find_reloads_address. */
755 if (in != 0 && GET_CODE (in) == REG)
757 register int regno = REGNO (in);
759 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
760 && reg_equiv_constant[regno] != 0)
761 in = reg_equiv_constant[regno];
764 /* Likewise for OUT. Of course, OUT will never be equivalent to
765 an actual constant, but it might be equivalent to a memory location
766 (in the case of a parameter). */
767 if (out != 0 && GET_CODE (out) == REG)
769 register int regno = REGNO (out);
771 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
772 && reg_equiv_constant[regno] != 0)
773 out = reg_equiv_constant[regno];
776 /* If we have a read-write operand with an address side-effect,
777 change either IN or OUT so the side-effect happens only once. */
778 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
780 if (GET_CODE (XEXP (in, 0)) == POST_INC
781 || GET_CODE (XEXP (in, 0)) == POST_DEC)
782 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
783 if (GET_CODE (XEXP (in, 0)) == PRE_INC
784 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
785 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
788 /* If we are reloading a (SUBREG constant ...), really reload just the
789 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
790 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
791 a pseudo and hence will become a MEM) with M1 wider than M2 and the
792 register is a pseudo, also reload the inside expression.
793 For machines that extend byte loads, do this for any SUBREG of a pseudo
794 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
795 M2 is an integral mode that gets extended when loaded.
796 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
797 either M1 is not valid for R or M2 is wider than a word but we only
798 need one word to store an M2-sized quantity in R.
799 (However, if OUT is nonzero, we need to reload the reg *and*
800 the subreg, so do nothing here, and let following statement handle it.)
802 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
803 we can't handle it here because CONST_INT does not indicate a mode.
805 Similarly, we must reload the inside expression if we have a
806 STRICT_LOW_PART (presumably, in == out in the cas).
808 Also reload the inner expression if it does not require a secondary
809 reload but the SUBREG does.
811 Finally, reload the inner expression if it is a register that is in
812 the class whose registers cannot be referenced in a different size
813 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
814 cannot reload just the inside since we might end up with the wrong
817 if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
818 #ifdef CLASS_CANNOT_CHANGE_SIZE
819 && class != CLASS_CANNOT_CHANGE_SIZE
821 && (CONSTANT_P (SUBREG_REG (in))
822 || GET_CODE (SUBREG_REG (in)) == PLUS
824 || (((GET_CODE (SUBREG_REG (in)) == REG
825 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
826 || GET_CODE (SUBREG_REG (in)) == MEM)
827 && ((GET_MODE_SIZE (inmode)
828 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
829 #ifdef LOAD_EXTEND_OP
830 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
831 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
833 && (GET_MODE_SIZE (inmode)
834 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
835 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
836 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
839 || (GET_CODE (SUBREG_REG (in)) == REG
840 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
841 /* The case where out is nonzero
842 is handled differently in the following statement. */
843 && (out == 0 || SUBREG_WORD (in) == 0)
844 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
845 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
847 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
849 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
850 GET_MODE (SUBREG_REG (in)))))
851 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
854 #ifdef SECONDARY_INPUT_RELOAD_CLASS
855 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
856 && (SECONDARY_INPUT_RELOAD_CLASS (class,
857 GET_MODE (SUBREG_REG (in)),
861 #ifdef CLASS_CANNOT_CHANGE_SIZE
862 || (GET_CODE (SUBREG_REG (in)) == REG
863 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
864 && (TEST_HARD_REG_BIT
865 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
866 REGNO (SUBREG_REG (in))))
867 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
868 != GET_MODE_SIZE (inmode)))
872 in_subreg_loc = inloc;
873 inloc = &SUBREG_REG (in);
875 #ifndef LOAD_EXTEND_OP
876 if (GET_CODE (in) == MEM)
877 /* This is supposed to happen only for paradoxical subregs made by
878 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
879 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
882 inmode = GET_MODE (in);
885 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
886 either M1 is not valid for R or M2 is wider than a word but we only
887 need one word to store an M2-sized quantity in R.
889 However, we must reload the inner reg *as well as* the subreg in
892 if (in != 0 && GET_CODE (in) == SUBREG
893 && GET_CODE (SUBREG_REG (in)) == REG
894 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
895 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
896 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
897 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
899 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
901 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
902 GET_MODE (SUBREG_REG (in)))))))
904 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
905 GENERAL_REGS, VOIDmode, VOIDmode, 0, 0, opnum, type);
906 dont_remove_subreg = 1;
910 /* Similarly for paradoxical and problematical SUBREGs on the output.
911 Note that there is no reason we need worry about the previous value
912 of SUBREG_REG (out); even if wider than out,
913 storing in a subreg is entitled to clobber it all
914 (except in the case of STRICT_LOW_PART,
915 and in that case the constraint should label it input-output.) */
916 if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
917 #ifdef CLASS_CANNOT_CHANGE_SIZE
918 && class != CLASS_CANNOT_CHANGE_SIZE
920 && (CONSTANT_P (SUBREG_REG (out))
922 || (((GET_CODE (SUBREG_REG (out)) == REG
923 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
924 || GET_CODE (SUBREG_REG (out)) == MEM)
925 && ((GET_MODE_SIZE (outmode)
926 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))))
927 || (GET_CODE (SUBREG_REG (out)) == REG
928 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
929 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
930 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
932 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
934 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
935 GET_MODE (SUBREG_REG (out)))))
936 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
937 + SUBREG_WORD (out)),
939 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
940 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
941 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
942 GET_MODE (SUBREG_REG (out)),
946 #ifdef CLASS_CANNOT_CHANGE_SIZE
947 || (GET_CODE (SUBREG_REG (out)) == REG
948 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
949 && (TEST_HARD_REG_BIT
950 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
951 REGNO (SUBREG_REG (out))))
952 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
953 != GET_MODE_SIZE (outmode)))
957 out_subreg_loc = outloc;
958 outloc = &SUBREG_REG (out);
960 #ifndef LOAD_EXTEND_OP
961 if (GET_CODE (out) == MEM
962 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
965 outmode = GET_MODE (out);
968 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
969 either M1 is not valid for R or M2 is wider than a word but we only
970 need one word to store an M2-sized quantity in R.
972 However, we must reload the inner reg *as well as* the subreg in
973 that case. In this case, the inner reg is an in-out reload. */
975 if (out != 0 && GET_CODE (out) == SUBREG
976 && GET_CODE (SUBREG_REG (out)) == REG
977 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
978 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)), outmode)
979 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
980 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
982 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
984 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
985 GET_MODE (SUBREG_REG (out)))))))
987 if (type == RELOAD_OTHER)
990 dont_remove_subreg = 1;
991 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
992 &SUBREG_REG (out), ALL_REGS, VOIDmode, VOIDmode, 0, 0,
993 opnum, RELOAD_OTHER);
997 /* If IN appears in OUT, we can't share any input-only reload for IN. */
998 if (in != 0 && out != 0 && GET_CODE (out) == MEM
999 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1000 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1003 /* If IN is a SUBREG of a hard register, make a new REG. This
1004 simplifies some of the cases below. */
1006 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1007 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1008 && ! dont_remove_subreg)
1009 in = gen_rtx (REG, GET_MODE (in),
1010 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1012 /* Similarly for OUT. */
1013 if (out != 0 && GET_CODE (out) == SUBREG
1014 && GET_CODE (SUBREG_REG (out)) == REG
1015 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1016 && ! dont_remove_subreg)
1017 out = gen_rtx (REG, GET_MODE (out),
1018 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1020 /* Narrow down the class of register wanted if that is
1021 desirable on this machine for efficiency. */
1023 class = PREFERRED_RELOAD_CLASS (in, class);
1025 /* Output reloads may need analogous treatment, different in detail. */
1026 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1028 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1031 /* Make sure we use a class that can handle the actual pseudo
1032 inside any subreg. For example, on the 386, QImode regs
1033 can appear within SImode subregs. Although GENERAL_REGS
1034 can handle SImode, QImode needs a smaller class. */
1035 #ifdef LIMIT_RELOAD_CLASS
1037 class = LIMIT_RELOAD_CLASS (inmode, class);
1038 else if (in != 0 && GET_CODE (in) == SUBREG)
1039 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1042 class = LIMIT_RELOAD_CLASS (outmode, class);
1043 if (out != 0 && GET_CODE (out) == SUBREG)
1044 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1047 /* Verify that this class is at least possible for the mode that
1049 if (this_insn_is_asm)
1051 enum machine_mode mode;
1052 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1056 if (mode == VOIDmode)
1058 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1063 outmode = word_mode;
1065 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1066 if (HARD_REGNO_MODE_OK (i, mode)
1067 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1069 int nregs = HARD_REGNO_NREGS (i, mode);
1072 for (j = 1; j < nregs; j++)
1073 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1078 if (i == FIRST_PSEUDO_REGISTER)
1080 error_for_asm (this_insn, "impossible register constraint in `asm'");
1085 if (class == NO_REGS)
1088 /* We can use an existing reload if the class is right
1089 and at least one of IN and OUT is a match
1090 and the other is at worst neutral.
1091 (A zero compared against anything is neutral.)
1093 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1094 for the same thing since that can cause us to need more reload registers
1095 than we otherwise would. */
1097 for (i = 0; i < n_reloads; i++)
1098 if ((reg_class_subset_p (class, reload_reg_class[i])
1099 || reg_class_subset_p (reload_reg_class[i], class))
1100 /* If the existing reload has a register, it must fit our class. */
1101 && (reload_reg_rtx[i] == 0
1102 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1103 true_regnum (reload_reg_rtx[i])))
1104 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1105 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1107 (out != 0 && MATCHES (reload_out[i], out)
1108 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1109 && (reg_class_size[(int) class] == 1
1110 #ifdef SMALL_REGISTER_CLASSES
1114 && MERGABLE_RELOADS (type, reload_when_needed[i],
1115 opnum, reload_opnum[i]))
1118 /* Reloading a plain reg for input can match a reload to postincrement
1119 that reg, since the postincrement's value is the right value.
1120 Likewise, it can match a preincrement reload, since we regard
1121 the preincrementation as happening before any ref in this insn
1122 to that register. */
1124 for (i = 0; i < n_reloads; i++)
1125 if ((reg_class_subset_p (class, reload_reg_class[i])
1126 || reg_class_subset_p (reload_reg_class[i], class))
1127 /* If the existing reload has a register, it must fit our class. */
1128 && (reload_reg_rtx[i] == 0
1129 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1130 true_regnum (reload_reg_rtx[i])))
1131 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1132 && ((GET_CODE (in) == REG
1133 && (GET_CODE (reload_in[i]) == POST_INC
1134 || GET_CODE (reload_in[i]) == POST_DEC
1135 || GET_CODE (reload_in[i]) == PRE_INC
1136 || GET_CODE (reload_in[i]) == PRE_DEC)
1137 && MATCHES (XEXP (reload_in[i], 0), in))
1139 (GET_CODE (reload_in[i]) == REG
1140 && (GET_CODE (in) == POST_INC
1141 || GET_CODE (in) == POST_DEC
1142 || GET_CODE (in) == PRE_INC
1143 || GET_CODE (in) == PRE_DEC)
1144 && MATCHES (XEXP (in, 0), reload_in[i])))
1145 && (reg_class_size[(int) class] == 1
1146 #ifdef SMALL_REGISTER_CLASSES
1150 && MERGABLE_RELOADS (type, reload_when_needed[i],
1151 opnum, reload_opnum[i]))
1153 /* Make sure reload_in ultimately has the increment,
1154 not the plain register. */
1155 if (GET_CODE (in) == REG)
1162 /* See if we need a secondary reload register to move between CLASS
1163 and IN or CLASS and OUT. Get the icode and push any required reloads
1164 needed for each of them if so. */
1166 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1169 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1170 &secondary_in_icode);
1173 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1174 if (out != 0 && GET_CODE (out) != SCRATCH)
1175 secondary_out_reload
1176 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1177 type, &secondary_out_icode);
1180 /* We found no existing reload suitable for re-use.
1181 So add an additional reload. */
1185 reload_out[i] = out;
1186 reload_reg_class[i] = class;
1187 reload_inmode[i] = inmode;
1188 reload_outmode[i] = outmode;
1189 reload_reg_rtx[i] = 0;
1190 reload_optional[i] = optional;
1192 reload_nocombine[i] = 0;
1193 reload_in_reg[i] = inloc ? *inloc : 0;
1194 reload_opnum[i] = opnum;
1195 reload_when_needed[i] = type;
1196 reload_secondary_in_reload[i] = secondary_in_reload;
1197 reload_secondary_out_reload[i] = secondary_out_reload;
1198 reload_secondary_in_icode[i] = secondary_in_icode;
1199 reload_secondary_out_icode[i] = secondary_out_icode;
1200 reload_secondary_p[i] = 0;
1204 #ifdef SECONDARY_MEMORY_NEEDED
1205 /* If a memory location is needed for the copy, make one. */
1206 if (in != 0 && GET_CODE (in) == REG
1207 && REGNO (in) < FIRST_PSEUDO_REGISTER
1208 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1210 get_secondary_mem (in, inmode, opnum, type);
1212 if (out != 0 && GET_CODE (out) == REG
1213 && REGNO (out) < FIRST_PSEUDO_REGISTER
1214 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1216 get_secondary_mem (out, outmode, opnum, type);
1221 /* We are reusing an existing reload,
1222 but we may have additional information for it.
1223 For example, we may now have both IN and OUT
1224 while the old one may have just one of them. */
1226 if (inmode != VOIDmode)
1227 reload_inmode[i] = inmode;
1228 if (outmode != VOIDmode)
1229 reload_outmode[i] = outmode;
1233 reload_out[i] = out;
1234 if (reg_class_subset_p (class, reload_reg_class[i]))
1235 reload_reg_class[i] = class;
1236 reload_optional[i] &= optional;
1237 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1238 opnum, reload_opnum[i]))
1239 reload_when_needed[i] = RELOAD_OTHER;
1240 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1243 /* If the ostensible rtx being reload differs from the rtx found
1244 in the location to substitute, this reload is not safe to combine
1245 because we cannot reliably tell whether it appears in the insn. */
1247 if (in != 0 && in != *inloc)
1248 reload_nocombine[i] = 1;
1251 /* This was replaced by changes in find_reloads_address_1 and the new
1252 function inc_for_reload, which go with a new meaning of reload_inc. */
1254 /* If this is an IN/OUT reload in an insn that sets the CC,
1255 it must be for an autoincrement. It doesn't work to store
1256 the incremented value after the insn because that would clobber the CC.
1257 So we must do the increment of the value reloaded from,
1258 increment it, store it back, then decrement again. */
1259 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1263 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1264 /* If we did not find a nonzero amount-to-increment-by,
1265 that contradicts the belief that IN is being incremented
1266 in an address in this insn. */
1267 if (reload_inc[i] == 0)
1272 /* If we will replace IN and OUT with the reload-reg,
1273 record where they are located so that substitution need
1274 not do a tree walk. */
1276 if (replace_reloads)
1280 register struct replacement *r = &replacements[n_replacements++];
1282 r->subreg_loc = in_subreg_loc;
1286 if (outloc != 0 && outloc != inloc)
1288 register struct replacement *r = &replacements[n_replacements++];
1291 r->subreg_loc = out_subreg_loc;
1296 /* If this reload is just being introduced and it has both
1297 an incoming quantity and an outgoing quantity that are
1298 supposed to be made to match, see if either one of the two
1299 can serve as the place to reload into.
1301 If one of them is acceptable, set reload_reg_rtx[i]
1304 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1306 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1308 reload_reg_class[i], i);
1310 /* If the outgoing register already contains the same value
1311 as the incoming one, we can dispense with loading it.
1312 The easiest way to tell the caller that is to give a phony
1313 value for the incoming operand (same as outgoing one). */
1314 if (reload_reg_rtx[i] == out
1315 && (GET_CODE (in) == REG || CONSTANT_P (in))
1316 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1317 static_reload_reg_p, i, inmode))
1321 /* If this is an input reload and the operand contains a register that
1322 dies in this insn and is used nowhere else, see if it is the right class
1323 to be used for this reload. Use it if so. (This occurs most commonly
1324 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1325 this if it is also an output reload that mentions the register unless
1326 the output is a SUBREG that clobbers an entire register.
1328 Note that the operand might be one of the spill regs, if it is a
1329 pseudo reg and we are in a block where spilling has not taken place.
1330 But if there is no spilling in this block, that is OK.
1331 An explicitly used hard reg cannot be a spill reg. */
1333 if (reload_reg_rtx[i] == 0 && in != 0)
1338 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1339 if (REG_NOTE_KIND (note) == REG_DEAD
1340 && GET_CODE (XEXP (note, 0)) == REG
1341 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1342 && reg_mentioned_p (XEXP (note, 0), in)
1343 && ! refers_to_regno_for_reload_p (regno,
1345 + HARD_REGNO_NREGS (regno,
1347 PATTERN (this_insn), inloc)
1348 /* If this is also an output reload, IN cannot be used as
1349 the reload register if it is set in this insn unless IN
1351 && (out == 0 || in == out
1352 || ! hard_reg_set_here_p (regno,
1354 + HARD_REGNO_NREGS (regno,
1356 PATTERN (this_insn)))
1357 /* ??? Why is this code so different from the previous?
1358 Is there any simple coherent way to describe the two together?
1359 What's going on here. */
1361 || (GET_CODE (in) == SUBREG
1362 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1364 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1365 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1366 /* Make sure the operand fits in the reg that dies. */
1367 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1368 && HARD_REGNO_MODE_OK (regno, inmode)
1369 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1370 && HARD_REGNO_MODE_OK (regno, outmode)
1371 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1372 && !fixed_regs[regno])
1374 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1380 output_reloadnum = i;
1385 /* Record an additional place we must replace a value
1386 for which we have already recorded a reload.
1387 RELOADNUM is the value returned by push_reload
1388 when the reload was recorded.
1389 This is used in insn patterns that use match_dup. */
1392 push_replacement (loc, reloadnum, mode)
1395 enum machine_mode mode;
1397 if (replace_reloads)
1399 register struct replacement *r = &replacements[n_replacements++];
1400 r->what = reloadnum;
1407 /* Transfer all replacements that used to be in reload FROM to be in
1411 transfer_replacements (to, from)
1416 for (i = 0; i < n_replacements; i++)
1417 if (replacements[i].what == from)
1418 replacements[i].what = to;
1421 /* If there is only one output reload, and it is not for an earlyclobber
1422 operand, try to combine it with a (logically unrelated) input reload
1423 to reduce the number of reload registers needed.
1425 This is safe if the input reload does not appear in
1426 the value being output-reloaded, because this implies
1427 it is not needed any more once the original insn completes.
1429 If that doesn't work, see we can use any of the registers that
1430 die in this insn as a reload register. We can if it is of the right
1431 class and does not appear in the value being output-reloaded. */
1437 int output_reload = -1;
1438 int secondary_out = -1;
1441 /* Find the output reload; return unless there is exactly one
1442 and that one is mandatory. */
1444 for (i = 0; i < n_reloads; i++)
1445 if (reload_out[i] != 0)
1447 if (output_reload >= 0)
1452 if (output_reload < 0 || reload_optional[output_reload])
1455 /* An input-output reload isn't combinable. */
1457 if (reload_in[output_reload] != 0)
1460 /* If this reload is for an earlyclobber operand, we can't do anything. */
1461 if (earlyclobber_operand_p (reload_out[output_reload]))
1464 /* Check each input reload; can we combine it? */
1466 for (i = 0; i < n_reloads; i++)
1467 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1468 /* Life span of this reload must not extend past main insn. */
1469 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1470 && reload_when_needed[i] != RELOAD_OTHER
1471 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1472 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1473 reload_outmode[output_reload]))
1474 && reload_inc[i] == 0
1475 && reload_reg_rtx[i] == 0
1476 #ifdef SECONDARY_MEMORY_NEEDED
1477 /* Don't combine two reloads with different secondary
1478 memory locations. */
1479 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1480 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1481 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1482 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1484 #ifdef SMALL_REGISTER_CLASSES
1485 && reload_reg_class[i] == reload_reg_class[output_reload]
1487 && (reg_class_subset_p (reload_reg_class[i],
1488 reload_reg_class[output_reload])
1489 || reg_class_subset_p (reload_reg_class[output_reload],
1490 reload_reg_class[i]))
1492 && (MATCHES (reload_in[i], reload_out[output_reload])
1493 /* Args reversed because the first arg seems to be
1494 the one that we imagine being modified
1495 while the second is the one that might be affected. */
1496 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1498 /* However, if the input is a register that appears inside
1499 the output, then we also can't share.
1500 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1501 If the same reload reg is used for both reg 69 and the
1502 result to be stored in memory, then that result
1503 will clobber the address of the memory ref. */
1504 && ! (GET_CODE (reload_in[i]) == REG
1505 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1506 reload_out[output_reload]))))
1507 && (reg_class_size[(int) reload_reg_class[i]]
1508 #ifdef SMALL_REGISTER_CLASSES
1512 /* We will allow making things slightly worse by combining an
1513 input and an output, but no worse than that. */
1514 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1515 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1519 /* We have found a reload to combine with! */
1520 reload_out[i] = reload_out[output_reload];
1521 reload_outmode[i] = reload_outmode[output_reload];
1522 /* Mark the old output reload as inoperative. */
1523 reload_out[output_reload] = 0;
1524 /* The combined reload is needed for the entire insn. */
1525 reload_when_needed[i] = RELOAD_OTHER;
1526 /* If the output reload had a secondary reload, copy it. */
1527 if (reload_secondary_out_reload[output_reload] != -1)
1529 reload_secondary_out_reload[i]
1530 = reload_secondary_out_reload[output_reload];
1531 reload_secondary_out_icode[i]
1532 = reload_secondary_out_icode[output_reload];
1535 #ifdef SECONDARY_MEMORY_NEEDED
1536 /* Copy any secondary MEM. */
1537 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1538 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1539 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1541 /* If required, minimize the register class. */
1542 if (reg_class_subset_p (reload_reg_class[output_reload],
1543 reload_reg_class[i]))
1544 reload_reg_class[i] = reload_reg_class[output_reload];
1546 /* Transfer all replacements from the old reload to the combined. */
1547 for (j = 0; j < n_replacements; j++)
1548 if (replacements[j].what == output_reload)
1549 replacements[j].what = i;
1554 /* If this insn has only one operand that is modified or written (assumed
1555 to be the first), it must be the one corresponding to this reload. It
1556 is safe to use anything that dies in this insn for that output provided
1557 that it does not occur in the output (we already know it isn't an
1558 earlyclobber. If this is an asm insn, give up. */
1560 if (INSN_CODE (this_insn) == -1)
1563 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1564 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1565 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1568 /* See if some hard register that dies in this insn and is not used in
1569 the output is the right class. Only works if the register we pick
1570 up can fully hold our output reload. */
1571 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1572 if (REG_NOTE_KIND (note) == REG_DEAD
1573 && GET_CODE (XEXP (note, 0)) == REG
1574 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1575 reload_out[output_reload])
1576 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1577 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1578 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1579 REGNO (XEXP (note, 0)))
1580 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1581 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1582 /* Ensure that a secondary or tertiary reload for this output
1583 won't want this register. */
1584 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1585 || (! (TEST_HARD_REG_BIT
1586 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1587 REGNO (XEXP (note, 0))))
1588 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1589 || ! (TEST_HARD_REG_BIT
1590 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1591 REGNO (XEXP (note, 0)))))))
1592 && ! fixed_regs[REGNO (XEXP (note, 0))])
1594 reload_reg_rtx[output_reload] = gen_rtx (REG,
1595 reload_outmode[output_reload],
1596 REGNO (XEXP (note, 0)));
1601 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1602 See if one of IN and OUT is a register that may be used;
1603 this is desirable since a spill-register won't be needed.
1604 If so, return the register rtx that proves acceptable.
1606 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1607 CLASS is the register class required for the reload.
1609 If FOR_REAL is >= 0, it is the number of the reload,
1610 and in some cases when it can be discovered that OUT doesn't need
1611 to be computed, clear out reload_out[FOR_REAL].
1613 If FOR_REAL is -1, this should not be done, because this call
1614 is just to see if a register can be found, not to find and install it. */
1617 find_dummy_reload (real_in, real_out, inloc, outloc,
1618 inmode, outmode, class, for_real)
1619 rtx real_in, real_out;
1620 rtx *inloc, *outloc;
1621 enum machine_mode inmode, outmode;
1622 enum reg_class class;
1631 /* If operands exceed a word, we can't use either of them
1632 unless they have the same size. */
1633 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1634 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1635 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1638 /* Find the inside of any subregs. */
1639 while (GET_CODE (out) == SUBREG)
1641 out_offset = SUBREG_WORD (out);
1642 out = SUBREG_REG (out);
1644 while (GET_CODE (in) == SUBREG)
1646 in_offset = SUBREG_WORD (in);
1647 in = SUBREG_REG (in);
1650 /* Narrow down the reg class, the same way push_reload will;
1651 otherwise we might find a dummy now, but push_reload won't. */
1652 class = PREFERRED_RELOAD_CLASS (in, class);
1654 /* See if OUT will do. */
1655 if (GET_CODE (out) == REG
1656 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1658 register int regno = REGNO (out) + out_offset;
1659 int nwords = HARD_REGNO_NREGS (regno, outmode);
1662 /* When we consider whether the insn uses OUT,
1663 ignore references within IN. They don't prevent us
1664 from copying IN into OUT, because those refs would
1665 move into the insn that reloads IN.
1667 However, we only ignore IN in its role as this reload.
1668 If the insn uses IN elsewhere and it contains OUT,
1669 that counts. We can't be sure it's the "same" operand
1670 so it might not go through this reload. */
1672 *inloc = const0_rtx;
1674 if (regno < FIRST_PSEUDO_REGISTER
1675 /* A fixed reg that can overlap other regs better not be used
1676 for reloading in any way. */
1677 #ifdef OVERLAPPING_REGNO_P
1678 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1680 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1681 PATTERN (this_insn), outloc))
1684 for (i = 0; i < nwords; i++)
1685 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1691 if (GET_CODE (real_out) == REG)
1694 value = gen_rtx (REG, outmode, regno);
1701 /* Consider using IN if OUT was not acceptable
1702 or if OUT dies in this insn (like the quotient in a divmod insn).
1703 We can't use IN unless it is dies in this insn,
1704 which means we must know accurately which hard regs are live.
1705 Also, the result can't go in IN if IN is used within OUT. */
1706 if (hard_regs_live_known
1707 && GET_CODE (in) == REG
1708 && REGNO (in) < FIRST_PSEUDO_REGISTER
1710 || find_reg_note (this_insn, REG_UNUSED, real_out))
1711 && find_reg_note (this_insn, REG_DEAD, real_in)
1712 && !fixed_regs[REGNO (in)]
1713 && HARD_REGNO_MODE_OK (REGNO (in),
1714 /* The only case where out and real_out might
1715 have different modes is where real_out
1716 is a subreg, and in that case, out
1718 (GET_MODE (out) != VOIDmode
1719 ? GET_MODE (out) : outmode)))
1721 register int regno = REGNO (in) + in_offset;
1722 int nwords = HARD_REGNO_NREGS (regno, inmode);
1724 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1725 && ! hard_reg_set_here_p (regno, regno + nwords,
1726 PATTERN (this_insn)))
1729 for (i = 0; i < nwords; i++)
1730 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1736 /* If we were going to use OUT as the reload reg
1737 and changed our mind, it means OUT is a dummy that
1738 dies here. So don't bother copying value to it. */
1739 if (for_real >= 0 && value == real_out)
1740 reload_out[for_real] = 0;
1741 if (GET_CODE (real_in) == REG)
1744 value = gen_rtx (REG, inmode, regno);
1752 /* This page contains subroutines used mainly for determining
1753 whether the IN or an OUT of a reload can serve as the
1756 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1759 earlyclobber_operand_p (x)
1764 for (i = 0; i < n_earlyclobbers; i++)
1765 if (reload_earlyclobbers[i] == x)
1771 /* Return 1 if expression X alters a hard reg in the range
1772 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1773 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1774 X should be the body of an instruction. */
1777 hard_reg_set_here_p (beg_regno, end_regno, x)
1778 register int beg_regno, end_regno;
1781 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1783 register rtx op0 = SET_DEST (x);
1784 while (GET_CODE (op0) == SUBREG)
1785 op0 = SUBREG_REG (op0);
1786 if (GET_CODE (op0) == REG)
1788 register int r = REGNO (op0);
1789 /* See if this reg overlaps range under consideration. */
1791 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1795 else if (GET_CODE (x) == PARALLEL)
1797 register int i = XVECLEN (x, 0) - 1;
1799 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1806 /* Return 1 if ADDR is a valid memory address for mode MODE,
1807 and check that each pseudo reg has the proper kind of
1811 strict_memory_address_p (mode, addr)
1812 enum machine_mode mode;
1815 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1822 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1823 if they are the same hard reg, and has special hacks for
1824 autoincrement and autodecrement.
1825 This is specifically intended for find_reloads to use
1826 in determining whether two operands match.
1827 X is the operand whose number is the lower of the two.
1829 The value is 2 if Y contains a pre-increment that matches
1830 a non-incrementing address in X. */
1832 /* ??? To be completely correct, we should arrange to pass
1833 for X the output operand and for Y the input operand.
1834 For now, we assume that the output operand has the lower number
1835 because that is natural in (SET output (... input ...)). */
1838 operands_match_p (x, y)
1842 register RTX_CODE code = GET_CODE (x);
1848 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1849 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1850 && GET_CODE (SUBREG_REG (y)) == REG)))
1856 i = REGNO (SUBREG_REG (x));
1857 if (i >= FIRST_PSEUDO_REGISTER)
1859 i += SUBREG_WORD (x);
1864 if (GET_CODE (y) == SUBREG)
1866 j = REGNO (SUBREG_REG (y));
1867 if (j >= FIRST_PSEUDO_REGISTER)
1869 j += SUBREG_WORD (y);
1874 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1875 multiple hard register group, so that for example (reg:DI 0) and
1876 (reg:SI 1) will be considered the same register. */
1877 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1878 && i < FIRST_PSEUDO_REGISTER)
1879 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1880 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1881 && j < FIRST_PSEUDO_REGISTER)
1882 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1886 /* If two operands must match, because they are really a single
1887 operand of an assembler insn, then two postincrements are invalid
1888 because the assembler insn would increment only once.
1889 On the other hand, an postincrement matches ordinary indexing
1890 if the postincrement is the output operand. */
1891 if (code == POST_DEC || code == POST_INC)
1892 return operands_match_p (XEXP (x, 0), y);
1893 /* Two preincrements are invalid
1894 because the assembler insn would increment only once.
1895 On the other hand, an preincrement matches ordinary indexing
1896 if the preincrement is the input operand.
1897 In this case, return 2, since some callers need to do special
1898 things when this happens. */
1899 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1900 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1904 /* Now we have disposed of all the cases
1905 in which different rtx codes can match. */
1906 if (code != GET_CODE (y))
1908 if (code == LABEL_REF)
1909 return XEXP (x, 0) == XEXP (y, 0);
1910 if (code == SYMBOL_REF)
1911 return XSTR (x, 0) == XSTR (y, 0);
1913 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1915 if (GET_MODE (x) != GET_MODE (y))
1918 /* Compare the elements. If any pair of corresponding elements
1919 fail to match, return 0 for the whole things. */
1922 fmt = GET_RTX_FORMAT (code);
1923 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1929 if (XWINT (x, i) != XWINT (y, i))
1934 if (XINT (x, i) != XINT (y, i))
1939 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1942 /* If any subexpression returns 2,
1943 we should return 2 if we are successful. */
1951 /* It is believed that rtx's at this level will never
1952 contain anything but integers and other rtx's,
1953 except for within LABEL_REFs and SYMBOL_REFs. */
1958 return 1 + success_2;
1961 /* Return the number of times character C occurs in string S. */
1964 n_occurrences (c, s)
1974 /* Describe the range of registers or memory referenced by X.
1975 If X is a register, set REG_FLAG and put the first register
1976 number into START and the last plus one into END.
1977 If X is a memory reference, put a base address into BASE
1978 and a range of integer offsets into START and END.
1979 If X is pushing on the stack, we can assume it causes no trouble,
1980 so we set the SAFE field. */
1982 static struct decomposition
1986 struct decomposition val;
1991 if (GET_CODE (x) == MEM)
1993 rtx base, offset = 0;
1994 rtx addr = XEXP (x, 0);
1996 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1997 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1999 val.base = XEXP (addr, 0);
2000 val.start = - GET_MODE_SIZE (GET_MODE (x));
2001 val.end = GET_MODE_SIZE (GET_MODE (x));
2002 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2006 if (GET_CODE (addr) == CONST)
2008 addr = XEXP (addr, 0);
2011 if (GET_CODE (addr) == PLUS)
2013 if (CONSTANT_P (XEXP (addr, 0)))
2015 base = XEXP (addr, 1);
2016 offset = XEXP (addr, 0);
2018 else if (CONSTANT_P (XEXP (addr, 1)))
2020 base = XEXP (addr, 0);
2021 offset = XEXP (addr, 1);
2028 offset = const0_rtx;
2030 if (GET_CODE (offset) == CONST)
2031 offset = XEXP (offset, 0);
2032 if (GET_CODE (offset) == PLUS)
2034 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2036 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
2037 offset = XEXP (offset, 0);
2039 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2041 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
2042 offset = XEXP (offset, 1);
2046 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2047 offset = const0_rtx;
2050 else if (GET_CODE (offset) != CONST_INT)
2052 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2053 offset = const0_rtx;
2056 if (all_const && GET_CODE (base) == PLUS)
2057 base = gen_rtx (CONST, GET_MODE (base), base);
2059 if (GET_CODE (offset) != CONST_INT)
2062 val.start = INTVAL (offset);
2063 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2067 else if (GET_CODE (x) == REG)
2070 val.start = true_regnum (x);
2073 /* A pseudo with no hard reg. */
2074 val.start = REGNO (x);
2075 val.end = val.start + 1;
2079 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2081 else if (GET_CODE (x) == SUBREG)
2083 if (GET_CODE (SUBREG_REG (x)) != REG)
2084 /* This could be more precise, but it's good enough. */
2085 return decompose (SUBREG_REG (x));
2087 val.start = true_regnum (x);
2089 return decompose (SUBREG_REG (x));
2092 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2094 else if (CONSTANT_P (x)
2095 /* This hasn't been assigned yet, so it can't conflict yet. */
2096 || GET_CODE (x) == SCRATCH)
2103 /* Return 1 if altering Y will not modify the value of X.
2104 Y is also described by YDATA, which should be decompose (Y). */
2107 immune_p (x, y, ydata)
2109 struct decomposition ydata;
2111 struct decomposition xdata;
2114 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2118 if (GET_CODE (y) != MEM)
2120 /* If Y is memory and X is not, Y can't affect X. */
2121 if (GET_CODE (x) != MEM)
2124 xdata = decompose (x);
2126 if (! rtx_equal_p (xdata.base, ydata.base))
2128 /* If bases are distinct symbolic constants, there is no overlap. */
2129 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2131 /* Constants and stack slots never overlap. */
2132 if (CONSTANT_P (xdata.base)
2133 && (ydata.base == frame_pointer_rtx
2134 || ydata.base == hard_frame_pointer_rtx
2135 || ydata.base == stack_pointer_rtx))
2137 if (CONSTANT_P (ydata.base)
2138 && (xdata.base == frame_pointer_rtx
2139 || xdata.base == hard_frame_pointer_rtx
2140 || xdata.base == stack_pointer_rtx))
2142 /* If either base is variable, we don't know anything. */
2147 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2150 /* Similar, but calls decompose. */
2153 safe_from_earlyclobber (op, clobber)
2156 struct decomposition early_data;
2158 early_data = decompose (clobber);
2159 return immune_p (op, clobber, early_data);
2162 /* Main entry point of this file: search the body of INSN
2163 for values that need reloading and record them with push_reload.
2164 REPLACE nonzero means record also where the values occur
2165 so that subst_reloads can be used.
2167 IND_LEVELS says how many levels of indirection are supported by this
2168 machine; a value of zero means that a memory reference is not a valid
2171 LIVE_KNOWN says we have valid information about which hard
2172 regs are live at each point in the program; this is true when
2173 we are called from global_alloc but false when stupid register
2174 allocation has been done.
2176 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2177 which is nonnegative if the reg has been commandeered for reloading into.
2178 It is copied into STATIC_RELOAD_REG_P and referenced from there
2179 by various subroutines. */
2182 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2184 int replace, ind_levels;
2186 short *reload_reg_p;
2188 #ifdef REGISTER_CONSTRAINTS
2190 register int insn_code_number;
2193 /* These are the constraints for the insn. We don't change them. */
2194 char *constraints1[MAX_RECOG_OPERANDS];
2195 /* These start out as the constraints for the insn
2196 and they are chewed up as we consider alternatives. */
2197 char *constraints[MAX_RECOG_OPERANDS];
2198 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2200 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2201 char pref_or_nothing[MAX_RECOG_OPERANDS];
2202 /* Nonzero for a MEM operand whose entire address needs a reload. */
2203 int address_reloaded[MAX_RECOG_OPERANDS];
2204 /* Value of enum reload_type to use for operand. */
2205 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2206 /* Value of enum reload_type to use within address of operand. */
2207 enum reload_type address_type[MAX_RECOG_OPERANDS];
2208 /* Save the usage of each operand. */
2209 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2210 int no_input_reloads = 0, no_output_reloads = 0;
2212 int this_alternative[MAX_RECOG_OPERANDS];
2213 char this_alternative_win[MAX_RECOG_OPERANDS];
2214 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2215 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2216 int this_alternative_matches[MAX_RECOG_OPERANDS];
2218 int goal_alternative[MAX_RECOG_OPERANDS];
2219 int this_alternative_number;
2220 int goal_alternative_number;
2221 int operand_reloadnum[MAX_RECOG_OPERANDS];
2222 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2223 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2224 char goal_alternative_win[MAX_RECOG_OPERANDS];
2225 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2226 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2227 int goal_alternative_swapped;
2230 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2231 rtx substed_operand[MAX_RECOG_OPERANDS];
2232 rtx body = PATTERN (insn);
2233 rtx set = single_set (insn);
2234 int goal_earlyclobber, this_earlyclobber;
2235 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2238 this_insn_is_asm = 0; /* Tentative. */
2242 n_earlyclobbers = 0;
2243 replace_reloads = replace;
2244 hard_regs_live_known = live_known;
2245 static_reload_reg_p = reload_reg_p;
2247 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2248 neither are insns that SET cc0. Insns that use CC0 are not allowed
2249 to have any input reloads. */
2250 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2251 no_output_reloads = 1;
2254 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2255 no_input_reloads = 1;
2256 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2257 no_output_reloads = 1;
2260 #ifdef SECONDARY_MEMORY_NEEDED
2261 /* The eliminated forms of any secondary memory locations are per-insn, so
2262 clear them out here. */
2264 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2267 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2268 Make OPERANDS point to a vector of operand values.
2269 Make OPERAND_LOCS point to a vector of pointers to
2270 where the operands were found.
2271 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2272 constraint-strings for this insn.
2273 Return if the insn needs no reload processing. */
2275 switch (GET_CODE (body))
2285 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2286 is cheap to move between them. If it is not, there may not be an insn
2287 to do the copy, so we may need a reload. */
2288 if (GET_CODE (SET_DEST (body)) == REG
2289 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2290 && GET_CODE (SET_SRC (body)) == REG
2291 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2292 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2293 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2297 reload_n_operands = noperands = asm_noperands (body);
2300 /* This insn is an `asm' with operands. */
2302 insn_code_number = -1;
2303 this_insn_is_asm = 1;
2305 /* expand_asm_operands makes sure there aren't too many operands. */
2306 if (noperands > MAX_RECOG_OPERANDS)
2309 /* Now get the operand values and constraints out of the insn. */
2311 decode_asm_operands (body, recog_operand, recog_operand_loc,
2312 constraints, operand_mode);
2315 bcopy ((char *) constraints, (char *) constraints1,
2316 noperands * sizeof (char *));
2317 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2318 for (i = 1; i < noperands; i++)
2319 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2321 error_for_asm (insn, "operand constraints differ in number of alternatives");
2322 /* Avoid further trouble with this insn. */
2323 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2332 /* Ordinary insn: recognize it, get the operands via insn_extract
2333 and get the constraints. */
2335 insn_code_number = recog_memoized (insn);
2336 if (insn_code_number < 0)
2337 fatal_insn_not_found (insn);
2339 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2340 n_alternatives = insn_n_alternatives[insn_code_number];
2341 /* Just return "no reloads" if insn has no operands with constraints. */
2342 if (n_alternatives == 0)
2344 insn_extract (insn);
2345 for (i = 0; i < noperands; i++)
2347 constraints[i] = constraints1[i]
2348 = insn_operand_constraint[insn_code_number][i];
2349 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2358 /* If we will need to know, later, whether some pair of operands
2359 are the same, we must compare them now and save the result.
2360 Reloading the base and index registers will clobber them
2361 and afterward they will fail to match. */
2363 for (i = 0; i < noperands; i++)
2368 substed_operand[i] = recog_operand[i];
2371 modified[i] = RELOAD_READ;
2373 /* Scan this operand's constraint to see if it is an output operand,
2374 an in-out operand, is commutative, or should match another. */
2379 modified[i] = RELOAD_WRITE;
2381 modified[i] = RELOAD_READ_WRITE;
2384 /* The last operand should not be marked commutative. */
2385 if (i == noperands - 1)
2387 if (this_insn_is_asm)
2388 warning_for_asm (this_insn,
2389 "`%%' constraint used with last operand");
2396 else if (c >= '0' && c <= '9')
2399 operands_match[c][i]
2400 = operands_match_p (recog_operand[c], recog_operand[i]);
2402 /* An operand may not match itself. */
2405 if (this_insn_is_asm)
2406 warning_for_asm (this_insn,
2407 "operand %d has constraint %d", i, c);
2412 /* If C can be commuted with C+1, and C might need to match I,
2413 then C+1 might also need to match I. */
2414 if (commutative >= 0)
2416 if (c == commutative || c == commutative + 1)
2418 int other = c + (c == commutative ? 1 : -1);
2419 operands_match[other][i]
2420 = operands_match_p (recog_operand[other], recog_operand[i]);
2422 if (i == commutative || i == commutative + 1)
2424 int other = i + (i == commutative ? 1 : -1);
2425 operands_match[c][other]
2426 = operands_match_p (recog_operand[c], recog_operand[other]);
2428 /* Note that C is supposed to be less than I.
2429 No need to consider altering both C and I because in
2430 that case we would alter one into the other. */
2436 /* Examine each operand that is a memory reference or memory address
2437 and reload parts of the addresses into index registers.
2438 Also here any references to pseudo regs that didn't get hard regs
2439 but are equivalent to constants get replaced in the insn itself
2440 with those constants. Nobody will ever see them again.
2442 Finally, set up the preferred classes of each operand. */
2444 for (i = 0; i < noperands; i++)
2446 register RTX_CODE code = GET_CODE (recog_operand[i]);
2448 address_reloaded[i] = 0;
2449 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2450 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2453 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2454 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2457 if (*constraints[i] == 0)
2458 /* Ignore things like match_operator operands. */
2460 else if (constraints[i][0] == 'p')
2462 find_reloads_address (VOIDmode, NULL_PTR,
2463 recog_operand[i], recog_operand_loc[i],
2464 i, operand_type[i], ind_levels);
2465 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2467 else if (code == MEM)
2469 if (find_reloads_address (GET_MODE (recog_operand[i]),
2470 recog_operand_loc[i],
2471 XEXP (recog_operand[i], 0),
2472 &XEXP (recog_operand[i], 0),
2473 i, address_type[i], ind_levels))
2474 address_reloaded[i] = 1;
2475 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2477 else if (code == SUBREG)
2478 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2479 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2482 && &SET_DEST (set) == recog_operand_loc[i]);
2483 else if (code == PLUS)
2484 /* We can get a PLUS as an "operand" as a result of
2485 register elimination. See eliminate_regs and gen_reload. */
2486 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2487 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2489 else if (code == REG)
2491 /* This is equivalent to calling find_reloads_toplev.
2492 The code is duplicated for speed.
2493 When we find a pseudo always equivalent to a constant,
2494 we replace it by the constant. We must be sure, however,
2495 that we don't try to replace it in the insn in which it
2497 register int regno = REGNO (recog_operand[i]);
2498 if (reg_equiv_constant[regno] != 0
2499 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2500 substed_operand[i] = recog_operand[i]
2501 = reg_equiv_constant[regno];
2502 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2503 that feeds this insn. */
2504 if (reg_equiv_mem[regno] != 0)
2505 substed_operand[i] = recog_operand[i]
2506 = reg_equiv_mem[regno];
2508 if (reg_equiv_address[regno] != 0)
2510 /* If reg_equiv_address is not a constant address, copy it,
2511 since it may be shared. */
2512 /* We must rerun eliminate_regs, in case the elimination
2513 offsets have changed. */
2514 rtx address = XEXP (eliminate_regs (reg_equiv_memory_loc[regno],
2518 if (rtx_varies_p (address))
2519 address = copy_rtx (address);
2521 /* If this is an output operand, we must output a CLOBBER
2522 after INSN so find_equiv_reg knows REGNO is being written.
2523 Mark this insn specially, do we can put our output reloads
2526 if (modified[i] != RELOAD_READ)
2527 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2532 *recog_operand_loc[i] = recog_operand[i]
2533 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2534 RTX_UNCHANGING_P (recog_operand[i])
2535 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2536 find_reloads_address (GET_MODE (recog_operand[i]),
2537 recog_operand_loc[i],
2538 XEXP (recog_operand[i], 0),
2539 &XEXP (recog_operand[i], 0),
2540 i, address_type[i], ind_levels);
2541 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2544 /* If the operand is still a register (we didn't replace it with an
2545 equivalent), get the preferred class to reload it into. */
2546 code = GET_CODE (recog_operand[i]);
2548 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2549 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2551 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2552 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2555 /* If this is simply a copy from operand 1 to operand 0, merge the
2556 preferred classes for the operands. */
2557 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2558 && recog_operand[1] == SET_SRC (set))
2560 preferred_class[0] = preferred_class[1]
2561 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2562 pref_or_nothing[0] |= pref_or_nothing[1];
2563 pref_or_nothing[1] |= pref_or_nothing[0];
2566 /* Now see what we need for pseudo-regs that didn't get hard regs
2567 or got the wrong kind of hard reg. For this, we must consider
2568 all the operands together against the register constraints. */
2570 best = MAX_RECOG_OPERANDS + 300;
2573 goal_alternative_swapped = 0;
2576 /* The constraints are made of several alternatives.
2577 Each operand's constraint looks like foo,bar,... with commas
2578 separating the alternatives. The first alternatives for all
2579 operands go together, the second alternatives go together, etc.
2581 First loop over alternatives. */
2583 for (this_alternative_number = 0;
2584 this_alternative_number < n_alternatives;
2585 this_alternative_number++)
2587 /* Loop over operands for one constraint alternative. */
2588 /* LOSERS counts those that don't fit this alternative
2589 and would require loading. */
2591 /* BAD is set to 1 if it some operand can't fit this alternative
2592 even after reloading. */
2594 /* REJECT is a count of how undesirable this alternative says it is
2595 if any reloading is required. If the alternative matches exactly
2596 then REJECT is ignored, but otherwise it gets this much
2597 counted against it in addition to the reloading needed. Each
2598 ? counts three times here since we want the disparaging caused by
2599 a bad register class to only count 1/3 as much. */
2602 this_earlyclobber = 0;
2604 for (i = 0; i < noperands; i++)
2606 register char *p = constraints[i];
2607 register int win = 0;
2608 /* 0 => this operand can be reloaded somehow for this alternative */
2610 /* 0 => this operand can be reloaded if the alternative allows regs. */
2613 register rtx operand = recog_operand[i];
2615 /* Nonzero means this is a MEM that must be reloaded into a reg
2616 regardless of what the constraint says. */
2617 int force_reload = 0;
2619 /* Nonzero if a constant forced into memory would be OK for this
2622 int earlyclobber = 0;
2624 /* If the operand is a SUBREG, extract
2625 the REG or MEM (or maybe even a constant) within.
2626 (Constants can occur as a result of reg_equiv_constant.) */
2628 while (GET_CODE (operand) == SUBREG)
2630 offset += SUBREG_WORD (operand);
2631 operand = SUBREG_REG (operand);
2632 /* Force reload if this is a constant or PLUS or if there may may
2633 be a problem accessing OPERAND in the outer mode. */
2634 if (CONSTANT_P (operand)
2635 || GET_CODE (operand) == PLUS
2636 /* We must force a reload of paradoxical SUBREGs
2637 of a MEM because the alignment of the inner value
2638 may not be enough to do the outer reference. On
2639 big-endian machines, it may also reference outside
2642 On machines that extend byte operations and we have a
2643 SUBREG where both the inner and outer modes are no wider
2644 than a word and the inner mode is narrower, is integral,
2645 and gets extended when loaded from memory, combine.c has
2646 made assumptions about the behavior of the machine in such
2647 register access. If the data is, in fact, in memory we
2648 must always load using the size assumed to be in the
2649 register and let the insn do the different-sized
2651 || ((GET_CODE (operand) == MEM
2652 || (GET_CODE (operand)== REG
2653 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2654 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2655 < BIGGEST_ALIGNMENT)
2656 && (GET_MODE_SIZE (operand_mode[i])
2657 > GET_MODE_SIZE (GET_MODE (operand))))
2658 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2659 #ifdef LOAD_EXTEND_OP
2660 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2661 && (GET_MODE_SIZE (GET_MODE (operand))
2663 && (GET_MODE_SIZE (operand_mode[i])
2664 > GET_MODE_SIZE (GET_MODE (operand)))
2665 && INTEGRAL_MODE_P (GET_MODE (operand))
2666 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2669 /* Subreg of a hard reg which can't handle the subreg's mode
2670 or which would handle that mode in the wrong number of
2671 registers for subregging to work. */
2672 || (GET_CODE (operand) == REG
2673 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2674 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2675 && (GET_MODE_SIZE (GET_MODE (operand))
2677 && ((GET_MODE_SIZE (GET_MODE (operand))
2679 != HARD_REGNO_NREGS (REGNO (operand),
2680 GET_MODE (operand))))
2681 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2686 this_alternative[i] = (int) NO_REGS;
2687 this_alternative_win[i] = 0;
2688 this_alternative_offmemok[i] = 0;
2689 this_alternative_earlyclobber[i] = 0;
2690 this_alternative_matches[i] = -1;
2692 /* An empty constraint or empty alternative
2693 allows anything which matched the pattern. */
2694 if (*p == 0 || *p == ',')
2697 /* Scan this alternative's specs for this operand;
2698 set WIN if the operand fits any letter in this alternative.
2699 Otherwise, clear BADOP if this operand could
2700 fit some letter after reloads,
2701 or set WINREG if this operand could fit after reloads
2702 provided the constraint allows some registers. */
2704 while (*p && (c = *p++) != ',')
2713 /* The last operand should not be marked commutative. */
2714 if (i != noperands - 1)
2727 /* Ignore rest of this alternative as far as
2728 reloading is concerned. */
2729 while (*p && *p != ',') p++;
2738 this_alternative_matches[i] = c;
2739 /* We are supposed to match a previous operand.
2740 If we do, we win if that one did.
2741 If we do not, count both of the operands as losers.
2742 (This is too conservative, since most of the time
2743 only a single reload insn will be needed to make
2744 the two operands win. As a result, this alternative
2745 may be rejected when it is actually desirable.) */
2746 if ((swapped && (c != commutative || i != commutative + 1))
2747 /* If we are matching as if two operands were swapped,
2748 also pretend that operands_match had been computed
2750 But if I is the second of those and C is the first,
2751 don't exchange them, because operands_match is valid
2752 only on one side of its diagonal. */
2754 [(c == commutative || c == commutative + 1)
2755 ? 2*commutative + 1 - c : c]
2756 [(i == commutative || i == commutative + 1)
2757 ? 2*commutative + 1 - i : i])
2758 : operands_match[c][i])
2759 win = this_alternative_win[c];
2762 /* Operands don't match. */
2764 /* Retroactively mark the operand we had to match
2765 as a loser, if it wasn't already. */
2766 if (this_alternative_win[c])
2768 this_alternative_win[c] = 0;
2769 if (this_alternative[c] == (int) NO_REGS)
2771 /* But count the pair only once in the total badness of
2772 this alternative, if the pair can be a dummy reload. */
2774 = find_dummy_reload (recog_operand[i], recog_operand[c],
2775 recog_operand_loc[i], recog_operand_loc[c],
2776 operand_mode[i], operand_mode[c],
2777 this_alternative[c], -1);
2782 /* This can be fixed with reloads if the operand
2783 we are supposed to match can be fixed with reloads. */
2785 this_alternative[i] = this_alternative[c];
2787 /* If we have to reload this operand and some previous
2788 operand also had to match the same thing as this
2789 operand, we don't know how to do that. So reject this
2791 if (! win || force_reload)
2792 for (j = 0; j < i; j++)
2793 if (this_alternative_matches[j]
2794 == this_alternative_matches[i])
2800 /* All necessary reloads for an address_operand
2801 were handled in find_reloads_address. */
2802 this_alternative[i] = (int) BASE_REG_CLASS;
2809 if (GET_CODE (operand) == MEM
2810 || (GET_CODE (operand) == REG
2811 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2812 && reg_renumber[REGNO (operand)] < 0))
2814 if (CONSTANT_P (operand))
2820 if (GET_CODE (operand) == MEM
2821 && ! address_reloaded[i]
2822 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2823 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2828 if (GET_CODE (operand) == MEM
2829 && ! address_reloaded[i]
2830 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2831 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2835 /* Memory operand whose address is not offsettable. */
2839 if (GET_CODE (operand) == MEM
2840 && ! (ind_levels ? offsettable_memref_p (operand)
2841 : offsettable_nonstrict_memref_p (operand))
2842 /* Certain mem addresses will become offsettable
2843 after they themselves are reloaded. This is important;
2844 we don't want our own handling of unoffsettables
2845 to override the handling of reg_equiv_address. */
2846 && !(GET_CODE (XEXP (operand, 0)) == REG
2848 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2852 /* Memory operand whose address is offsettable. */
2856 if ((GET_CODE (operand) == MEM
2857 /* If IND_LEVELS, find_reloads_address won't reload a
2858 pseudo that didn't get a hard reg, so we have to
2859 reject that case. */
2860 && (ind_levels ? offsettable_memref_p (operand)
2861 : offsettable_nonstrict_memref_p (operand)))
2862 /* A reloaded auto-increment address is offsettable,
2863 because it is now just a simple register indirect. */
2864 || (GET_CODE (operand) == MEM
2865 && address_reloaded[i]
2866 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2867 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
2868 || GET_CODE (XEXP (operand, 0)) == POST_INC
2869 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2870 /* Certain mem addresses will become offsettable
2871 after they themselves are reloaded. This is important;
2872 we don't want our own handling of unoffsettables
2873 to override the handling of reg_equiv_address. */
2874 || (GET_CODE (operand) == MEM
2875 && GET_CODE (XEXP (operand, 0)) == REG
2877 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2878 || (GET_CODE (operand) == REG
2879 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2880 && reg_renumber[REGNO (operand)] < 0
2881 /* If reg_equiv_address is nonzero, we will be
2882 loading it into a register; hence it will be
2883 offsettable, but we cannot say that reg_equiv_mem
2884 is offsettable without checking. */
2885 && ((reg_equiv_mem[REGNO (operand)] != 0
2886 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
2887 || (reg_equiv_address[REGNO (operand)] != 0))))
2889 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2896 /* Output operand that is stored before the need for the
2897 input operands (and their index registers) is over. */
2898 earlyclobber = 1, this_earlyclobber = 1;
2902 #ifndef REAL_ARITHMETIC
2903 /* Match any floating double constant, but only if
2904 we can examine the bits of it reliably. */
2905 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2906 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2907 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2910 if (GET_CODE (operand) == CONST_DOUBLE)
2915 if (GET_CODE (operand) == CONST_DOUBLE)
2921 if (GET_CODE (operand) == CONST_DOUBLE
2922 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2927 if (GET_CODE (operand) == CONST_INT
2928 || (GET_CODE (operand) == CONST_DOUBLE
2929 && GET_MODE (operand) == VOIDmode))
2932 if (CONSTANT_P (operand)
2933 #ifdef LEGITIMATE_PIC_OPERAND_P
2934 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2941 if (GET_CODE (operand) == CONST_INT
2942 || (GET_CODE (operand) == CONST_DOUBLE
2943 && GET_MODE (operand) == VOIDmode))
2955 if (GET_CODE (operand) == CONST_INT
2956 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2966 /* A PLUS is never a valid operand, but reload can make
2967 it from a register when eliminating registers. */
2968 && GET_CODE (operand) != PLUS
2969 /* A SCRATCH is not a valid operand. */
2970 && GET_CODE (operand) != SCRATCH
2971 #ifdef LEGITIMATE_PIC_OPERAND_P
2972 && (! CONSTANT_P (operand)
2974 || LEGITIMATE_PIC_OPERAND_P (operand))
2976 && (GENERAL_REGS == ALL_REGS
2977 || GET_CODE (operand) != REG
2978 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2979 && reg_renumber[REGNO (operand)] < 0)))
2981 /* Drop through into 'r' case */
2985 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2988 #ifdef EXTRA_CONSTRAINT
2994 if (EXTRA_CONSTRAINT (operand, c))
3001 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3004 if (GET_MODE (operand) == BLKmode)
3007 if (GET_CODE (operand) == REG
3008 && reg_fits_class_p (operand, this_alternative[i],
3009 offset, GET_MODE (recog_operand[i])))
3016 /* If this operand could be handled with a reg,
3017 and some reg is allowed, then this operand can be handled. */
3018 if (winreg && this_alternative[i] != (int) NO_REGS)
3021 /* Record which operands fit this alternative. */
3022 this_alternative_earlyclobber[i] = earlyclobber;
3023 if (win && ! force_reload)
3024 this_alternative_win[i] = 1;
3027 int const_to_mem = 0;
3029 this_alternative_offmemok[i] = offmemok;
3033 /* Alternative loses if it has no regs for a reg operand. */
3034 if (GET_CODE (operand) == REG
3035 && this_alternative[i] == (int) NO_REGS
3036 && this_alternative_matches[i] < 0)
3039 /* Alternative loses if it requires a type of reload not
3040 permitted for this insn. We can always reload SCRATCH
3041 and objects with a REG_UNUSED note. */
3042 if (GET_CODE (operand) != SCRATCH
3043 && modified[i] != RELOAD_READ && no_output_reloads
3044 && ! find_reg_note (insn, REG_UNUSED, operand))
3046 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
3049 /* If this is a constant that is reloaded into the desired
3050 class by copying it to memory first, count that as another
3051 reload. This is consistent with other code and is
3052 required to avoid choosing another alternative when
3053 the constant is moved into memory by this function on
3054 an early reload pass. Note that the test here is
3055 precisely the same as in the code below that calls
3057 if (CONSTANT_P (operand)
3058 /* force_const_mem does not accept HIGH. */
3059 && GET_CODE (operand) != HIGH
3060 && (PREFERRED_RELOAD_CLASS (operand,
3061 (enum reg_class) this_alternative[i])
3063 && operand_mode[i] != VOIDmode)
3066 if (this_alternative[i] != (int) NO_REGS)
3070 /* If we can't reload this value at all, reject this
3071 alternative. Note that we could also lose due to
3072 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3075 if (! CONSTANT_P (operand)
3076 && (enum reg_class) this_alternative[i] != NO_REGS
3077 && (PREFERRED_RELOAD_CLASS (operand,
3078 (enum reg_class) this_alternative[i])
3082 /* We prefer to reload pseudos over reloading other things,
3083 since such reloads may be able to be eliminated later.
3084 If we are reloading a SCRATCH, we won't be generating any
3085 insns, just using a register, so it is also preferred.
3086 So bump REJECT in other cases. Don't do this in the
3087 case where we are forcing a constant into memory and
3088 it will then win since we don't want to have a different
3089 alternative match then. */
3090 if (! (GET_CODE (operand) == REG
3091 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3092 && GET_CODE (operand) != SCRATCH
3093 && ! (const_to_mem && constmemok))
3097 /* If this operand is a pseudo register that didn't get a hard
3098 reg and this alternative accepts some register, see if the
3099 class that we want is a subset of the preferred class for this
3100 register. If not, but it intersects that class, use the
3101 preferred class instead. If it does not intersect the preferred
3102 class, show that usage of this alternative should be discouraged;
3103 it will be discouraged more still if the register is `preferred
3104 or nothing'. We do this because it increases the chance of
3105 reusing our spill register in a later insn and avoiding a pair
3106 of memory stores and loads.
3108 Don't bother with this if this alternative will accept this
3111 Don't do this for a multiword operand, since it is only a
3112 small win and has the risk of requiring more spill registers,
3113 which could cause a large loss.
3115 Don't do this if the preferred class has only one register
3116 because we might otherwise exhaust the class. */
3119 if (! win && this_alternative[i] != (int) NO_REGS
3120 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3121 && reg_class_size[(int) preferred_class[i]] > 1)
3123 if (! reg_class_subset_p (this_alternative[i],
3124 preferred_class[i]))
3126 /* Since we don't have a way of forming the intersection,
3127 we just do something special if the preferred class
3128 is a subset of the class we have; that's the most
3129 common case anyway. */
3130 if (reg_class_subset_p (preferred_class[i],
3131 this_alternative[i]))
3132 this_alternative[i] = (int) preferred_class[i];
3134 reject += (1 + pref_or_nothing[i]);
3139 /* Now see if any output operands that are marked "earlyclobber"
3140 in this alternative conflict with any input operands
3141 or any memory addresses. */
3143 for (i = 0; i < noperands; i++)
3144 if (this_alternative_earlyclobber[i]
3145 && this_alternative_win[i])
3147 struct decomposition early_data;
3149 early_data = decompose (recog_operand[i]);
3151 if (modified[i] == RELOAD_READ)
3153 if (this_insn_is_asm)
3154 warning_for_asm (this_insn,
3155 "`&' constraint used with input operand");
3161 if (this_alternative[i] == NO_REGS)
3163 this_alternative_earlyclobber[i] = 0;
3164 if (this_insn_is_asm)
3165 error_for_asm (this_insn,
3166 "`&' constraint used with no register class");
3171 for (j = 0; j < noperands; j++)
3172 /* Is this an input operand or a memory ref? */
3173 if ((GET_CODE (recog_operand[j]) == MEM
3174 || modified[j] != RELOAD_WRITE)
3176 /* Ignore things like match_operator operands. */
3177 && *constraints1[j] != 0
3178 /* Don't count an input operand that is constrained to match
3179 the early clobber operand. */
3180 && ! (this_alternative_matches[j] == i
3181 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3182 /* Is it altered by storing the earlyclobber operand? */
3183 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3185 /* If the output is in a single-reg class,
3186 it's costly to reload it, so reload the input instead. */
3187 if (reg_class_size[this_alternative[i]] == 1
3188 && (GET_CODE (recog_operand[j]) == REG
3189 || GET_CODE (recog_operand[j]) == SUBREG))
3192 this_alternative_win[j] = 0;
3197 /* If an earlyclobber operand conflicts with something,
3198 it must be reloaded, so request this and count the cost. */
3202 this_alternative_win[i] = 0;
3203 for (j = 0; j < noperands; j++)
3204 if (this_alternative_matches[j] == i
3205 && this_alternative_win[j])
3207 this_alternative_win[j] = 0;
3213 /* If one alternative accepts all the operands, no reload required,
3214 choose that alternative; don't consider the remaining ones. */
3217 /* Unswap these so that they are never swapped at `finish'. */
3218 if (commutative >= 0)
3220 recog_operand[commutative] = substed_operand[commutative];
3221 recog_operand[commutative + 1]
3222 = substed_operand[commutative + 1];
3224 for (i = 0; i < noperands; i++)
3226 goal_alternative_win[i] = 1;
3227 goal_alternative[i] = this_alternative[i];
3228 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3229 goal_alternative_matches[i] = this_alternative_matches[i];
3230 goal_alternative_earlyclobber[i]
3231 = this_alternative_earlyclobber[i];
3233 goal_alternative_number = this_alternative_number;
3234 goal_alternative_swapped = swapped;
3235 goal_earlyclobber = this_earlyclobber;
3239 /* REJECT, set by the ! and ? constraint characters and when a register
3240 would be reloaded into a non-preferred class, discourages the use of
3241 this alternative for a reload goal. REJECT is incremented by three
3242 for each ? and one for each non-preferred class. */
3243 losers = losers * 3 + reject;
3245 /* If this alternative can be made to work by reloading,
3246 and it needs less reloading than the others checked so far,
3247 record it as the chosen goal for reloading. */
3248 if (! bad && best > losers)
3250 for (i = 0; i < noperands; i++)
3252 goal_alternative[i] = this_alternative[i];
3253 goal_alternative_win[i] = this_alternative_win[i];
3254 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3255 goal_alternative_matches[i] = this_alternative_matches[i];
3256 goal_alternative_earlyclobber[i]
3257 = this_alternative_earlyclobber[i];
3259 goal_alternative_swapped = swapped;
3261 goal_alternative_number = this_alternative_number;
3262 goal_earlyclobber = this_earlyclobber;
3266 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3267 then we need to try each alternative twice,
3268 the second time matching those two operands
3269 as if we had exchanged them.
3270 To do this, really exchange them in operands.
3272 If we have just tried the alternatives the second time,
3273 return operands to normal and drop through. */
3275 if (commutative >= 0)
3280 register enum reg_class tclass;
3283 recog_operand[commutative] = substed_operand[commutative + 1];
3284 recog_operand[commutative + 1] = substed_operand[commutative];
3286 tclass = preferred_class[commutative];
3287 preferred_class[commutative] = preferred_class[commutative + 1];
3288 preferred_class[commutative + 1] = tclass;
3290 t = pref_or_nothing[commutative];
3291 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3292 pref_or_nothing[commutative + 1] = t;
3294 bcopy ((char *) constraints1, (char *) constraints,
3295 noperands * sizeof (char *));
3300 recog_operand[commutative] = substed_operand[commutative];
3301 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3305 /* The operands don't meet the constraints.
3306 goal_alternative describes the alternative
3307 that we could reach by reloading the fewest operands.
3308 Reload so as to fit it. */
3310 if (best == MAX_RECOG_OPERANDS + 300)
3312 /* No alternative works with reloads?? */
3313 if (insn_code_number >= 0)
3315 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3316 /* Avoid further trouble with this insn. */
3317 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3322 /* Jump to `finish' from above if all operands are valid already.
3323 In that case, goal_alternative_win is all 1. */
3326 /* Right now, for any pair of operands I and J that are required to match,
3328 goal_alternative_matches[J] is I.
3329 Set up goal_alternative_matched as the inverse function:
3330 goal_alternative_matched[I] = J. */
3332 for (i = 0; i < noperands; i++)
3333 goal_alternative_matched[i] = -1;
3335 for (i = 0; i < noperands; i++)
3336 if (! goal_alternative_win[i]
3337 && goal_alternative_matches[i] >= 0)
3338 goal_alternative_matched[goal_alternative_matches[i]] = i;
3340 /* If the best alternative is with operands 1 and 2 swapped,
3341 consider them swapped before reporting the reloads. Update the
3342 operand numbers of any reloads already pushed. */
3344 if (goal_alternative_swapped)
3348 tem = substed_operand[commutative];
3349 substed_operand[commutative] = substed_operand[commutative + 1];
3350 substed_operand[commutative + 1] = tem;
3351 tem = recog_operand[commutative];
3352 recog_operand[commutative] = recog_operand[commutative + 1];
3353 recog_operand[commutative + 1] = tem;
3355 for (i = 0; i < n_reloads; i++)
3357 if (reload_opnum[i] == commutative)
3358 reload_opnum[i] = commutative + 1;
3359 else if (reload_opnum[i] == commutative + 1)
3360 reload_opnum[i] = commutative;
3364 /* Perform whatever substitutions on the operands we are supposed
3365 to make due to commutativity or replacement of registers
3366 with equivalent constants or memory slots. */
3368 for (i = 0; i < noperands; i++)
3370 *recog_operand_loc[i] = substed_operand[i];
3371 /* While we are looping on operands, initialize this. */
3372 operand_reloadnum[i] = -1;
3374 /* If this is an earlyclobber operand, we need to widen the scope.
3375 The reload must remain valid from the start of the insn being
3376 reloaded until after the operand is stored into its destination.
3377 We approximate this with RELOAD_OTHER even though we know that we
3378 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3380 One special case that is worth checking is when we have an
3381 output that is earlyclobber but isn't used past the insn (typically
3382 a SCRATCH). In this case, we only need have the reload live
3383 through the insn itself, but not for any of our input or output
3386 In any case, anything needed to address this operand can remain
3387 however they were previously categorized. */
3389 if (goal_alternative_earlyclobber[i])
3391 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3392 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3395 /* Any constants that aren't allowed and can't be reloaded
3396 into registers are here changed into memory references. */
3397 for (i = 0; i < noperands; i++)
3398 if (! goal_alternative_win[i]
3399 && CONSTANT_P (recog_operand[i])
3400 /* force_const_mem does not accept HIGH. */
3401 && GET_CODE (recog_operand[i]) != HIGH
3402 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3403 (enum reg_class) goal_alternative[i])
3405 && operand_mode[i] != VOIDmode)
3407 *recog_operand_loc[i] = recog_operand[i]
3408 = find_reloads_toplev (force_const_mem (operand_mode[i],
3410 i, address_type[i], ind_levels, 0);
3411 if (alternative_allows_memconst (constraints1[i],
3412 goal_alternative_number))
3413 goal_alternative_win[i] = 1;
3416 /* Record the values of the earlyclobber operands for the caller. */
3417 if (goal_earlyclobber)
3418 for (i = 0; i < noperands; i++)
3419 if (goal_alternative_earlyclobber[i])
3420 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3422 /* Now record reloads for all the operands that need them. */
3423 for (i = 0; i < noperands; i++)
3424 if (! goal_alternative_win[i])
3426 /* Operands that match previous ones have already been handled. */
3427 if (goal_alternative_matches[i] >= 0)
3429 /* Handle an operand with a nonoffsettable address
3430 appearing where an offsettable address will do
3431 by reloading the address into a base register.
3433 ??? We can also do this when the operand is a register and
3434 reg_equiv_mem is not offsettable, but this is a bit tricky,
3435 so we don't bother with it. It may not be worth doing. */
3436 else if (goal_alternative_matched[i] == -1
3437 && goal_alternative_offmemok[i]
3438 && GET_CODE (recog_operand[i]) == MEM)
3440 operand_reloadnum[i]
3441 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3442 &XEXP (recog_operand[i], 0), NULL_PTR,
3443 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3444 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3445 reload_inc[operand_reloadnum[i]]
3446 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3448 /* If this operand is an output, we will have made any
3449 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3450 now we are treating part of the operand as an input, so
3451 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3453 if (modified[i] == RELOAD_WRITE)
3454 for (j = 0; j < n_reloads; j++)
3455 if (reload_opnum[j] == i
3456 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3457 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3459 else if (goal_alternative_matched[i] == -1)
3460 operand_reloadnum[i] =
3461 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3462 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3463 (modified[i] != RELOAD_WRITE ?
3464 recog_operand_loc[i] : 0),
3465 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3466 (enum reg_class) goal_alternative[i],
3467 (modified[i] == RELOAD_WRITE
3468 ? VOIDmode : operand_mode[i]),
3469 (modified[i] == RELOAD_READ
3470 ? VOIDmode : operand_mode[i]),
3471 (insn_code_number < 0 ? 0
3472 : insn_operand_strict_low[insn_code_number][i]),
3473 0, i, operand_type[i]);
3474 /* In a matching pair of operands, one must be input only
3475 and the other must be output only.
3476 Pass the input operand as IN and the other as OUT. */
3477 else if (modified[i] == RELOAD_READ
3478 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3480 operand_reloadnum[i]
3481 = push_reload (recog_operand[i],
3482 recog_operand[goal_alternative_matched[i]],
3483 recog_operand_loc[i],
3484 recog_operand_loc[goal_alternative_matched[i]],
3485 (enum reg_class) goal_alternative[i],
3487 operand_mode[goal_alternative_matched[i]],
3488 0, 0, i, RELOAD_OTHER);
3489 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3491 else if (modified[i] == RELOAD_WRITE
3492 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3494 operand_reloadnum[goal_alternative_matched[i]]
3495 = push_reload (recog_operand[goal_alternative_matched[i]],
3497 recog_operand_loc[goal_alternative_matched[i]],
3498 recog_operand_loc[i],
3499 (enum reg_class) goal_alternative[i],
3500 operand_mode[goal_alternative_matched[i]],
3502 0, 0, i, RELOAD_OTHER);
3503 operand_reloadnum[i] = output_reloadnum;
3505 else if (insn_code_number >= 0)
3509 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3510 /* Avoid further trouble with this insn. */
3511 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3516 else if (goal_alternative_matched[i] < 0
3517 && goal_alternative_matches[i] < 0
3520 /* For each non-matching operand that's a MEM or a pseudo-register
3521 that didn't get a hard register, make an optional reload.
3522 This may get done even if the insn needs no reloads otherwise. */
3524 rtx operand = recog_operand[i];
3526 while (GET_CODE (operand) == SUBREG)
3527 operand = XEXP (operand, 0);
3528 if ((GET_CODE (operand) == MEM
3529 || (GET_CODE (operand) == REG
3530 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3531 && (enum reg_class) goal_alternative[i] != NO_REGS
3532 && ! no_input_reloads
3533 /* Optional output reloads don't do anything and we mustn't
3534 make in-out reloads on insns that are not permitted output
3536 && (modified[i] == RELOAD_READ
3537 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3538 operand_reloadnum[i]
3539 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3540 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3541 (modified[i] != RELOAD_WRITE
3542 ? recog_operand_loc[i] : 0),
3543 (modified[i] != RELOAD_READ
3544 ? recog_operand_loc[i] : 0),
3545 (enum reg_class) goal_alternative[i],
3546 (modified[i] == RELOAD_WRITE
3547 ? VOIDmode : operand_mode[i]),
3548 (modified[i] == RELOAD_READ
3549 ? VOIDmode : operand_mode[i]),
3550 (insn_code_number < 0 ? 0
3551 : insn_operand_strict_low[insn_code_number][i]),
3552 1, i, operand_type[i]);
3554 else if (goal_alternative_matches[i] >= 0
3555 && goal_alternative_win[goal_alternative_matches[i]]
3556 && modified[i] == RELOAD_READ
3557 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3558 && ! no_input_reloads && ! no_output_reloads
3561 /* Similarly, make an optional reload for a pair of matching
3562 objects that are in MEM or a pseudo that didn't get a hard reg. */
3564 rtx operand = recog_operand[i];
3566 while (GET_CODE (operand) == SUBREG)
3567 operand = XEXP (operand, 0);
3568 if ((GET_CODE (operand) == MEM
3569 || (GET_CODE (operand) == REG
3570 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3571 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3573 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3574 = push_reload (recog_operand[goal_alternative_matches[i]],
3576 recog_operand_loc[goal_alternative_matches[i]],
3577 recog_operand_loc[i],
3578 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3579 operand_mode[goal_alternative_matches[i]],
3581 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3584 /* If this insn pattern contains any MATCH_DUP's, make sure that
3585 they will be substituted if the operands they match are substituted.
3586 Also do now any substitutions we already did on the operands.
3588 Don't do this if we aren't making replacements because we might be
3589 propagating things allocated by frame pointer elimination into places
3590 it doesn't expect. */
3592 if (insn_code_number >= 0 && replace)
3593 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3595 int opno = recog_dup_num[i];
3596 *recog_dup_loc[i] = *recog_operand_loc[opno];
3597 if (operand_reloadnum[opno] >= 0)
3598 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3599 insn_operand_mode[insn_code_number][opno]);
3603 /* This loses because reloading of prior insns can invalidate the equivalence
3604 (or at least find_equiv_reg isn't smart enough to find it any more),
3605 causing this insn to need more reload regs than it needed before.
3606 It may be too late to make the reload regs available.
3607 Now this optimization is done safely in choose_reload_regs. */
3609 /* For each reload of a reg into some other class of reg,
3610 search for an existing equivalent reg (same value now) in the right class.
3611 We can use it as long as we don't need to change its contents. */
3612 for (i = 0; i < n_reloads; i++)
3613 if (reload_reg_rtx[i] == 0
3614 && reload_in[i] != 0
3615 && GET_CODE (reload_in[i]) == REG
3616 && reload_out[i] == 0)
3619 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3620 static_reload_reg_p, 0, reload_inmode[i]);
3621 /* Prevent generation of insn to load the value
3622 because the one we found already has the value. */
3623 if (reload_reg_rtx[i])
3624 reload_in[i] = reload_reg_rtx[i];
3628 /* Perhaps an output reload can be combined with another
3629 to reduce needs by one. */
3630 if (!goal_earlyclobber)
3633 /* If we have a pair of reloads for parts of an address, they are reloading
3634 the same object, the operands themselves were not reloaded, and they
3635 are for two operands that are supposed to match, merge the reloads and
3636 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3638 for (i = 0; i < n_reloads; i++)
3642 for (j = i + 1; j < n_reloads; j++)
3643 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3644 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3645 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3646 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3647 && rtx_equal_p (reload_in[i], reload_in[j])
3648 && (operand_reloadnum[reload_opnum[i]] < 0
3649 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3650 && (operand_reloadnum[reload_opnum[j]] < 0
3651 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3652 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3653 || (goal_alternative_matches[reload_opnum[j]]
3654 == reload_opnum[i])))
3656 for (k = 0; k < n_replacements; k++)
3657 if (replacements[k].what == j)
3658 replacements[k].what = i;
3660 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3665 /* Scan all the reloads and update their type.
3666 If a reload is for the address of an operand and we didn't reload
3667 that operand, change the type. Similarly, change the operand number
3668 of a reload when two operands match. If a reload is optional, treat it
3669 as though the operand isn't reloaded.
3671 ??? This latter case is somewhat odd because if we do the optional
3672 reload, it means the object is hanging around. Thus we need only
3673 do the address reload if the optional reload was NOT done.
3675 Change secondary reloads to be the address type of their operand, not
3678 If an operand's reload is now RELOAD_OTHER, change any
3679 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3680 RELOAD_FOR_OTHER_ADDRESS. */
3682 for (i = 0; i < n_reloads; i++)
3684 if (reload_secondary_p[i]
3685 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3686 reload_when_needed[i] = address_type[reload_opnum[i]];
3688 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3689 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3690 && (operand_reloadnum[reload_opnum[i]] < 0
3691 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3693 /* If we have a secondary reload to go along with this reload,
3694 change its type to RELOAD_FOR_OPADDR_ADDR. */
3696 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3697 && reload_secondary_in_reload[i] != -1)
3699 int secondary_in_reload = reload_secondary_in_reload[i];
3701 reload_when_needed[secondary_in_reload] =
3702 RELOAD_FOR_OPADDR_ADDR;
3704 /* If there's a tertiary reload we have to change it also. */
3705 if (secondary_in_reload > 0
3706 && reload_secondary_in_reload[secondary_in_reload] != -1)
3707 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3708 = RELOAD_FOR_OPADDR_ADDR;
3711 if (reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3712 && reload_secondary_out_reload[i] != -1)
3714 int secondary_out_reload = reload_secondary_out_reload[i];
3716 reload_when_needed[secondary_out_reload] =
3717 RELOAD_FOR_OPADDR_ADDR;
3719 /* If there's a tertiary reload we have to change it also. */
3720 if (secondary_out_reload
3721 && reload_secondary_out_reload[secondary_out_reload] != -1)
3722 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
3723 = RELOAD_FOR_OPADDR_ADDR;
3725 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3728 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3729 && operand_reloadnum[reload_opnum[i]] >= 0
3730 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3732 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3734 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3735 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3738 /* See if we have any reloads that are now allowed to be merged
3739 because we've changed when the reload is needed to
3740 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3741 check for the most common cases. */
3743 for (i = 0; i < n_reloads; i++)
3744 if (reload_in[i] != 0 && reload_out[i] == 0
3745 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3746 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3747 for (j = 0; j < n_reloads; j++)
3748 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3749 && reload_when_needed[j] == reload_when_needed[i]
3750 && MATCHES (reload_in[i], reload_in[j])
3751 && reload_reg_class[i] == reload_reg_class[j]
3752 && !reload_nocombine[i] && !reload_nocombine[j]
3753 && reload_reg_rtx[i] == reload_reg_rtx[j])
3755 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3756 transfer_replacements (i, j);
3760 #else /* no REGISTER_CONSTRAINTS */
3762 int insn_code_number;
3763 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3765 rtx body = PATTERN (insn);
3769 n_earlyclobbers = 0;
3770 replace_reloads = replace;
3773 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3774 Store the operand values in RECOG_OPERAND and the locations
3775 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3776 Return if the insn needs no reload processing. */
3778 switch (GET_CODE (body))
3789 noperands = asm_noperands (body);
3792 /* This insn is an `asm' with operands.
3793 First, find out how many operands, and allocate space. */
3795 insn_code_number = -1;
3796 /* ??? This is a bug! ???
3797 Give up and delete this insn if it has too many operands. */
3798 if (noperands > MAX_RECOG_OPERANDS)
3801 /* Now get the operand values out of the insn. */
3803 decode_asm_operands (body, recog_operand, recog_operand_loc,
3804 NULL_PTR, NULL_PTR);
3809 /* Ordinary insn: recognize it, allocate space for operands and
3810 constraints, and get them out via insn_extract. */
3812 insn_code_number = recog_memoized (insn);
3813 noperands = insn_n_operands[insn_code_number];
3814 insn_extract (insn);
3820 for (i = 0; i < noperands; i++)
3822 register RTX_CODE code = GET_CODE (recog_operand[i]);
3823 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3825 if (insn_code_number >= 0)
3826 if (insn_operand_address_p[insn_code_number][i])
3827 find_reloads_address (VOIDmode, NULL_PTR,
3828 recog_operand[i], recog_operand_loc[i],
3829 i, RELOAD_FOR_INPUT, ind_levels);
3831 /* In these cases, we can't tell if the operand is an input
3832 or an output, so be conservative. In practice it won't be
3836 find_reloads_address (GET_MODE (recog_operand[i]),
3837 recog_operand_loc[i],
3838 XEXP (recog_operand[i], 0),
3839 &XEXP (recog_operand[i], 0),
3840 i, RELOAD_OTHER, ind_levels);
3842 recog_operand[i] = *recog_operand_loc[i]
3843 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3844 ind_levels, is_set_dest);
3847 register int regno = REGNO (recog_operand[i]);
3848 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3849 recog_operand[i] = *recog_operand_loc[i]
3850 = reg_equiv_constant[regno];
3851 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3852 that feeds this insn. */
3853 if (reg_equiv_mem[regno] != 0)
3854 recog_operand[i] = *recog_operand_loc[i]
3855 = reg_equiv_mem[regno];
3860 /* Perhaps an output reload can be combined with another
3861 to reduce needs by one. */
3862 if (!goal_earlyclobber)
3864 #endif /* no REGISTER_CONSTRAINTS */
3867 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3868 accepts a memory operand with constant address. */
3871 alternative_allows_memconst (constraint, altnum)
3876 /* Skip alternatives before the one requested. */
3879 while (*constraint++ != ',');
3882 /* Scan the requested alternative for 'm' or 'o'.
3883 If one of them is present, this alternative accepts memory constants. */
3884 while ((c = *constraint++) && c != ',' && c != '#')
3885 if (c == 'm' || c == 'o')
3890 /* Scan X for memory references and scan the addresses for reloading.
3891 Also checks for references to "constant" regs that we want to eliminate
3892 and replaces them with the values they stand for.
3893 We may alter X destructively if it contains a reference to such.
3894 If X is just a constant reg, we return the equivalent value
3897 IND_LEVELS says how many levels of indirect addressing this machine
3900 OPNUM and TYPE identify the purpose of the reload.
3902 IS_SET_DEST is true if X is the destination of a SET, which is not
3903 appropriate to be replaced by a constant. */
3906 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
3909 enum reload_type type;
3913 register RTX_CODE code = GET_CODE (x);
3915 register char *fmt = GET_RTX_FORMAT (code);
3920 /* This code is duplicated for speed in find_reloads. */
3921 register int regno = REGNO (x);
3922 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3923 x = reg_equiv_constant[regno];
3925 /* This creates (subreg (mem...)) which would cause an unnecessary
3926 reload of the mem. */
3927 else if (reg_equiv_mem[regno] != 0)
3928 x = reg_equiv_mem[regno];
3930 else if (reg_equiv_address[regno] != 0)
3932 /* If reg_equiv_address varies, it may be shared, so copy it. */
3933 /* We must rerun eliminate_regs, in case the elimination
3934 offsets have changed. */
3935 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
3939 if (rtx_varies_p (addr))
3940 addr = copy_rtx (addr);
3942 x = gen_rtx (MEM, GET_MODE (x), addr);
3943 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3944 find_reloads_address (GET_MODE (x), NULL_PTR,
3946 &XEXP (x, 0), opnum, type, ind_levels);
3953 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3954 opnum, type, ind_levels);
3958 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3960 /* Check for SUBREG containing a REG that's equivalent to a constant.
3961 If the constant has a known value, truncate it right now.
3962 Similarly if we are extracting a single-word of a multi-word
3963 constant. If the constant is symbolic, allow it to be substituted
3964 normally. push_reload will strip the subreg later. If the
3965 constant is VOIDmode, abort because we will lose the mode of
3966 the register (this should never happen because one of the cases
3967 above should handle it). */
3969 register int regno = REGNO (SUBREG_REG (x));
3972 if (subreg_lowpart_p (x)
3973 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3974 && reg_equiv_constant[regno] != 0
3975 && (tem = gen_lowpart_common (GET_MODE (x),
3976 reg_equiv_constant[regno])) != 0)
3979 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3980 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3981 && reg_equiv_constant[regno] != 0
3982 && (tem = operand_subword (reg_equiv_constant[regno],
3984 GET_MODE (SUBREG_REG (x)))) != 0)
3987 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3988 && reg_equiv_constant[regno] != 0
3989 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3992 /* If the subreg contains a reg that will be converted to a mem,
3993 convert the subreg to a narrower memref now.
3994 Otherwise, we would get (subreg (mem ...) ...),
3995 which would force reload of the mem.
3997 We also need to do this if there is an equivalent MEM that is
3998 not offsettable. In that case, alter_subreg would produce an
3999 invalid address on big-endian machines.
4001 For machines that extend byte loads, we must not reload using
4002 a wider mode if we have a paradoxical SUBREG. find_reloads will
4003 force a reload in that case. So we should not do anything here. */
4005 else if (regno >= FIRST_PSEUDO_REGISTER
4006 #ifdef LOAD_EXTEND_OP
4007 && (GET_MODE_SIZE (GET_MODE (x))
4008 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4010 && (reg_equiv_address[regno] != 0
4011 || (reg_equiv_mem[regno] != 0
4012 && (! strict_memory_address_p (GET_MODE (x),
4013 XEXP (reg_equiv_mem[regno], 0))
4014 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
4016 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
4017 /* We must rerun eliminate_regs, in case the elimination
4018 offsets have changed. */
4019 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4022 if (BYTES_BIG_ENDIAN)
4025 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
4026 offset += MIN (size, UNITS_PER_WORD);
4027 size = GET_MODE_SIZE (GET_MODE (x));
4028 offset -= MIN (size, UNITS_PER_WORD);
4030 addr = plus_constant (addr, offset);
4031 x = gen_rtx (MEM, GET_MODE (x), addr);
4032 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4033 find_reloads_address (GET_MODE (x), NULL_PTR,
4035 &XEXP (x, 0), opnum, type, ind_levels);
4040 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4043 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
4044 ind_levels, is_set_dest);
4049 /* Return a mem ref for the memory equivalent of reg REGNO.
4050 This mem ref is not shared with anything. */
4053 make_memloc (ad, regno)
4058 /* We must rerun eliminate_regs, in case the elimination
4059 offsets have changed. */
4060 rtx tem = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX),
4063 #if 0 /* We cannot safely reuse a memloc made here;
4064 if the pseudo appears twice, and its mem needs a reload,
4065 it gets two separate reloads assigned, but it only
4066 gets substituted with the second of them;
4067 then it can get used before that reload reg gets loaded up. */
4068 for (i = 0; i < n_memlocs; i++)
4069 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
4073 /* If TEM might contain a pseudo, we must copy it to avoid
4074 modifying it when we do the substitution for the reload. */
4075 if (rtx_varies_p (tem))
4076 tem = copy_rtx (tem);
4078 tem = gen_rtx (MEM, GET_MODE (ad), tem);
4079 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4080 memlocs[n_memlocs++] = tem;
4084 /* Record all reloads needed for handling memory address AD
4085 which appears in *LOC in a memory reference to mode MODE
4086 which itself is found in location *MEMREFLOC.
4087 Note that we take shortcuts assuming that no multi-reg machine mode
4088 occurs as part of an address.
4090 OPNUM and TYPE specify the purpose of this reload.
4092 IND_LEVELS says how many levels of indirect addressing this machine
4095 Value is nonzero if this address is reloaded or replaced as a whole.
4096 This is interesting to the caller if the address is an autoincrement.
4098 Note that there is no verification that the address will be valid after
4099 this routine does its work. Instead, we rely on the fact that the address
4100 was valid when reload started. So we need only undo things that reload
4101 could have broken. These are wrong register types, pseudos not allocated
4102 to a hard register, and frame pointer elimination. */
4105 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
4106 enum machine_mode mode;
4111 enum reload_type type;
4117 /* If the address is a register, see if it is a legitimate address and
4118 reload if not. We first handle the cases where we need not reload
4119 or where we must reload in a non-standard way. */
4121 if (GET_CODE (ad) == REG)
4125 if (reg_equiv_constant[regno] != 0
4126 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4128 *loc = ad = reg_equiv_constant[regno];
4132 else if (reg_equiv_address[regno] != 0)
4134 tem = make_memloc (ad, regno);
4135 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4136 &XEXP (tem, 0), opnum, type, ind_levels);
4137 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4138 GET_MODE (ad), VOIDmode, 0, 0,
4143 /* We can avoid a reload if the register's equivalent memory expression
4144 is valid as an indirect memory address.
4145 But not all addresses are valid in a mem used as an indirect address:
4146 only reg or reg+constant. */
4148 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
4149 && strict_memory_address_p (mode, reg_equiv_mem[regno])
4150 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
4151 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
4152 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
4153 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
4156 /* The only remaining case where we can avoid a reload is if this is a
4157 hard register that is valid as a base register and which is not the
4158 subject of a CLOBBER in this insn. */
4160 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
4161 && ! regno_clobbered_p (regno, this_insn))
4164 /* If we do not have one of the cases above, we must do the reload. */
4165 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4166 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4170 if (strict_memory_address_p (mode, ad))
4172 /* The address appears valid, so reloads are not needed.
4173 But the address may contain an eliminable register.
4174 This can happen because a machine with indirect addressing
4175 may consider a pseudo register by itself a valid address even when
4176 it has failed to get a hard reg.
4177 So do a tree-walk to find and eliminate all such regs. */
4179 /* But first quickly dispose of a common case. */
4180 if (GET_CODE (ad) == PLUS
4181 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4182 && GET_CODE (XEXP (ad, 0)) == REG
4183 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4186 subst_reg_equivs_changed = 0;
4187 *loc = subst_reg_equivs (ad);
4189 if (! subst_reg_equivs_changed)
4192 /* Check result for validity after substitution. */
4193 if (strict_memory_address_p (mode, ad))
4197 /* The address is not valid. We have to figure out why. One possibility
4198 is that it is itself a MEM. This can happen when the frame pointer is
4199 being eliminated, a pseudo is not allocated to a hard register, and the
4200 offset between the frame and stack pointers is not its initial value.
4201 In that case the pseudo will have been replaced by a MEM referring to
4202 the stack pointer. */
4203 if (GET_CODE (ad) == MEM)
4205 /* First ensure that the address in this MEM is valid. Then, unless
4206 indirect addresses are valid, reload the MEM into a register. */
4208 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4209 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
4211 /* If tem was changed, then we must create a new memory reference to
4212 hold it and store it back into memrefloc. */
4213 if (tem != ad && memrefloc)
4215 *memrefloc = copy_rtx (*memrefloc);
4216 copy_replacements (tem, XEXP (*memrefloc, 0));
4217 loc = &XEXP (*memrefloc, 0);
4220 /* Check similar cases as for indirect addresses as above except
4221 that we can allow pseudos and a MEM since they should have been
4222 taken care of above. */
4225 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4226 || GET_CODE (XEXP (tem, 0)) == MEM
4227 || ! (GET_CODE (XEXP (tem, 0)) == REG
4228 || (GET_CODE (XEXP (tem, 0)) == PLUS
4229 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4230 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4232 /* Must use TEM here, not AD, since it is the one that will
4233 have any subexpressions reloaded, if needed. */
4234 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4235 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
4243 /* If we have address of a stack slot but it's not valid because the
4244 displacement is too large, compute the sum in a register.
4245 Handle all base registers here, not just fp/ap/sp, because on some
4246 targets (namely SH) we can also get too large displacements from
4247 big-endian corrections. */
4248 else if (GET_CODE (ad) == PLUS
4249 && GET_CODE (XEXP (ad, 0)) == REG
4250 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4251 && REG_OK_FOR_BASE_P (XEXP (ad, 0))
4252 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4254 /* Unshare the MEM rtx so we can safely alter it. */
4257 *memrefloc = copy_rtx (*memrefloc);
4258 loc = &XEXP (*memrefloc, 0);
4260 if (double_reg_address_ok)
4262 /* Unshare the sum as well. */
4263 *loc = ad = copy_rtx (ad);
4264 /* Reload the displacement into an index reg.
4265 We assume the frame pointer or arg pointer is a base reg. */
4266 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4267 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4272 /* If the sum of two regs is not necessarily valid,
4273 reload the sum into a base reg.
4274 That will at least work. */
4275 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
4276 opnum, type, ind_levels);
4281 /* If we have an indexed stack slot, there are three possible reasons why
4282 it might be invalid: The index might need to be reloaded, the address
4283 might have been made by frame pointer elimination and hence have a
4284 constant out of range, or both reasons might apply.
4286 We can easily check for an index needing reload, but even if that is the
4287 case, we might also have an invalid constant. To avoid making the
4288 conservative assumption and requiring two reloads, we see if this address
4289 is valid when not interpreted strictly. If it is, the only problem is
4290 that the index needs a reload and find_reloads_address_1 will take care
4293 There is still a case when we might generate an extra reload,
4294 however. In certain cases eliminate_regs will return a MEM for a REG
4295 (see the code there for details). In those cases, memory_address_p
4296 applied to our address will return 0 so we will think that our offset
4297 must be too large. But it might indeed be valid and the only problem
4298 is that a MEM is present where a REG should be. This case should be
4299 very rare and there doesn't seem to be any way to avoid it.
4301 If we decide to do something here, it must be that
4302 `double_reg_address_ok' is true and that this address rtl was made by
4303 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4304 rework the sum so that the reload register will be added to the index.
4305 This is safe because we know the address isn't shared.
4307 We check for fp/ap/sp as both the first and second operand of the
4310 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4311 && GET_CODE (XEXP (ad, 0)) == PLUS
4312 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4313 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4314 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4316 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4317 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4319 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4320 && ! memory_address_p (mode, ad))
4322 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4323 plus_constant (XEXP (XEXP (ad, 0), 0),
4324 INTVAL (XEXP (ad, 1))),
4325 XEXP (XEXP (ad, 0), 1));
4326 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4327 GET_MODE (ad), opnum, type, ind_levels);
4328 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4333 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4334 && GET_CODE (XEXP (ad, 0)) == PLUS
4335 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4336 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4337 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4339 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4340 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4342 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4343 && ! memory_address_p (mode, ad))
4345 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4346 XEXP (XEXP (ad, 0), 0),
4347 plus_constant (XEXP (XEXP (ad, 0), 1),
4348 INTVAL (XEXP (ad, 1))));
4349 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4350 GET_MODE (ad), opnum, type, ind_levels);
4351 find_reloads_address_1 (XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, type, 0);
4356 /* See if address becomes valid when an eliminable register
4357 in a sum is replaced. */
4360 if (GET_CODE (ad) == PLUS)
4361 tem = subst_indexed_address (ad);
4362 if (tem != ad && strict_memory_address_p (mode, tem))
4364 /* Ok, we win that way. Replace any additional eliminable
4367 subst_reg_equivs_changed = 0;
4368 tem = subst_reg_equivs (tem);
4370 /* Make sure that didn't make the address invalid again. */
4372 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4379 /* If constants aren't valid addresses, reload the constant address
4381 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4383 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4384 Unshare it so we can safely alter it. */
4385 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4386 && CONSTANT_POOL_ADDRESS_P (ad))
4388 *memrefloc = copy_rtx (*memrefloc);
4389 loc = &XEXP (*memrefloc, 0);
4392 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4397 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
4400 /* Find all pseudo regs appearing in AD
4401 that are eliminable in favor of equivalent values
4402 and do not have hard regs; replace them by their equivalents. */
4405 subst_reg_equivs (ad)
4408 register RTX_CODE code = GET_CODE (ad);
4426 register int regno = REGNO (ad);
4428 if (reg_equiv_constant[regno] != 0)
4430 subst_reg_equivs_changed = 1;
4431 return reg_equiv_constant[regno];
4437 /* Quickly dispose of a common case. */
4438 if (XEXP (ad, 0) == frame_pointer_rtx
4439 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4443 fmt = GET_RTX_FORMAT (code);
4444 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4446 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4450 /* Compute the sum of X and Y, making canonicalizations assumed in an
4451 address, namely: sum constant integers, surround the sum of two
4452 constants with a CONST, put the constant as the second operand, and
4453 group the constant on the outermost sum.
4455 This routine assumes both inputs are already in canonical form. */
4462 enum machine_mode mode = GET_MODE (x);
4464 if (mode == VOIDmode)
4465 mode = GET_MODE (y);
4467 if (mode == VOIDmode)
4470 if (GET_CODE (x) == CONST_INT)
4471 return plus_constant (y, INTVAL (x));
4472 else if (GET_CODE (y) == CONST_INT)
4473 return plus_constant (x, INTVAL (y));
4474 else if (CONSTANT_P (x))
4475 tem = x, x = y, y = tem;
4477 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4478 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4480 /* Note that if the operands of Y are specified in the opposite
4481 order in the recursive calls below, infinite recursion will occur. */
4482 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4483 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4485 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4486 constant will have been placed second. */
4487 if (CONSTANT_P (x) && CONSTANT_P (y))
4489 if (GET_CODE (x) == CONST)
4491 if (GET_CODE (y) == CONST)
4494 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
4497 return gen_rtx (PLUS, mode, x, y);
4500 /* If ADDR is a sum containing a pseudo register that should be
4501 replaced with a constant (from reg_equiv_constant),
4502 return the result of doing so, and also apply the associative
4503 law so that the result is more likely to be a valid address.
4504 (But it is not guaranteed to be one.)
4506 Note that at most one register is replaced, even if more are
4507 replaceable. Also, we try to put the result into a canonical form
4508 so it is more likely to be a valid address.
4510 In all other cases, return ADDR. */
4513 subst_indexed_address (addr)
4516 rtx op0 = 0, op1 = 0, op2 = 0;
4520 if (GET_CODE (addr) == PLUS)
4522 /* Try to find a register to replace. */
4523 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4524 if (GET_CODE (op0) == REG
4525 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4526 && reg_renumber[regno] < 0
4527 && reg_equiv_constant[regno] != 0)
4528 op0 = reg_equiv_constant[regno];
4529 else if (GET_CODE (op1) == REG
4530 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4531 && reg_renumber[regno] < 0
4532 && reg_equiv_constant[regno] != 0)
4533 op1 = reg_equiv_constant[regno];
4534 else if (GET_CODE (op0) == PLUS
4535 && (tem = subst_indexed_address (op0)) != op0)
4537 else if (GET_CODE (op1) == PLUS
4538 && (tem = subst_indexed_address (op1)) != op1)
4543 /* Pick out up to three things to add. */
4544 if (GET_CODE (op1) == PLUS)
4545 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4546 else if (GET_CODE (op0) == PLUS)
4547 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4549 /* Compute the sum. */
4551 op1 = form_sum (op1, op2);
4553 op0 = form_sum (op0, op1);
4560 /* Record the pseudo registers we must reload into hard registers
4561 in a subexpression of a would-be memory address, X.
4562 (This function is not called if the address we find is strictly valid.)
4563 CONTEXT = 1 means we are considering regs as index regs,
4564 = 0 means we are considering them as base regs.
4566 OPNUM and TYPE specify the purpose of any reloads made.
4568 IND_LEVELS says how many levels of indirect addressing are
4569 supported at this point in the address.
4571 We return nonzero if X, as a whole, is reloaded or replaced. */
4573 /* Note that we take shortcuts assuming that no multi-reg machine mode
4574 occurs as part of an address.
4575 Also, this is not fully machine-customizable; it works for machines
4576 such as vaxes and 68000's and 32000's, but other possible machines
4577 could have addressing modes that this does not handle right. */
4580 find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
4585 enum reload_type type;
4588 register RTX_CODE code = GET_CODE (x);
4594 register rtx orig_op0 = XEXP (x, 0);
4595 register rtx orig_op1 = XEXP (x, 1);
4596 register RTX_CODE code0 = GET_CODE (orig_op0);
4597 register RTX_CODE code1 = GET_CODE (orig_op1);
4598 register rtx op0 = orig_op0;
4599 register rtx op1 = orig_op1;
4601 if (GET_CODE (op0) == SUBREG)
4603 op0 = SUBREG_REG (op0);
4604 code0 = GET_CODE (op0);
4605 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
4606 op0 = gen_rtx (REG, word_mode,
4607 REGNO (op0) + SUBREG_WORD (orig_op0));
4610 if (GET_CODE (op1) == SUBREG)
4612 op1 = SUBREG_REG (op1);
4613 code1 = GET_CODE (op1);
4614 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
4615 op1 = gen_rtx (REG, GET_MODE (op1),
4616 REGNO (op1) + SUBREG_WORD (orig_op1));
4619 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
4620 || code0 == ZERO_EXTEND || code1 == MEM)
4622 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4624 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4628 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
4629 || code1 == ZERO_EXTEND || code0 == MEM)
4631 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4633 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4637 else if (code0 == CONST_INT || code0 == CONST
4638 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4639 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4642 else if (code1 == CONST_INT || code1 == CONST
4643 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4644 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4647 else if (code0 == REG && code1 == REG)
4649 if (REG_OK_FOR_INDEX_P (op0)
4650 && REG_OK_FOR_BASE_P (op1))
4652 else if (REG_OK_FOR_INDEX_P (op1)
4653 && REG_OK_FOR_BASE_P (op0))
4655 else if (REG_OK_FOR_BASE_P (op1))
4656 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4658 else if (REG_OK_FOR_BASE_P (op0))
4659 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4661 else if (REG_OK_FOR_INDEX_P (op1))
4662 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4664 else if (REG_OK_FOR_INDEX_P (op0))
4665 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4669 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4671 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4676 else if (code0 == REG)
4678 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4680 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4684 else if (code1 == REG)
4686 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4688 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4699 if (GET_CODE (XEXP (x, 0)) == REG)
4701 register int regno = REGNO (XEXP (x, 0));
4705 /* A register that is incremented cannot be constant! */
4706 if (regno >= FIRST_PSEUDO_REGISTER
4707 && reg_equiv_constant[regno] != 0)
4710 /* Handle a register that is equivalent to a memory location
4711 which cannot be addressed directly. */
4712 if (reg_equiv_address[regno] != 0)
4714 rtx tem = make_memloc (XEXP (x, 0), regno);
4715 /* First reload the memory location's address. */
4716 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4717 &XEXP (tem, 0), opnum, type, ind_levels);
4718 /* Put this inside a new increment-expression. */
4719 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4720 /* Proceed to reload that, as if it contained a register. */
4723 /* If we have a hard register that is ok as an index,
4724 don't make a reload. If an autoincrement of a nice register
4725 isn't "valid", it must be that no autoincrement is "valid".
4726 If that is true and something made an autoincrement anyway,
4727 this must be a special context where one is allowed.
4728 (For example, a "push" instruction.)
4729 We can't improve this address, so leave it alone. */
4731 /* Otherwise, reload the autoincrement into a suitable hard reg
4732 and record how much to increment by. */
4734 if (reg_renumber[regno] >= 0)
4735 regno = reg_renumber[regno];
4736 if ((regno >= FIRST_PSEUDO_REGISTER
4737 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4738 : REGNO_OK_FOR_BASE_P (regno))))
4743 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4744 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4745 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4747 reload_inc[reloadnum]
4748 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4753 /* Update the REG_INC notes. */
4755 for (link = REG_NOTES (this_insn);
4756 link; link = XEXP (link, 1))
4757 if (REG_NOTE_KIND (link) == REG_INC
4758 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4759 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4765 else if (GET_CODE (XEXP (x, 0)) == MEM)
4767 /* This is probably the result of a substitution, by eliminate_regs,
4768 of an equivalent address for a pseudo that was not allocated to a
4769 hard register. Verify that the specified address is valid and
4770 reload it into a register. */
4771 rtx tem = XEXP (x, 0);
4775 /* Since we know we are going to reload this item, don't decrement
4776 for the indirection level.
4778 Note that this is actually conservative: it would be slightly
4779 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4781 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4782 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4783 opnum, type, ind_levels);
4785 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4786 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4787 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4788 reload_inc[reloadnum]
4789 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4791 link = FIND_REG_INC_NOTE (this_insn, tem);
4793 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4800 /* This is probably the result of a substitution, by eliminate_regs, of
4801 an equivalent address for a pseudo that was not allocated to a hard
4802 register. Verify that the specified address is valid and reload it
4805 Since we know we are going to reload this item, don't decrement for
4806 the indirection level.
4808 Note that this is actually conservative: it would be slightly more
4809 efficient to use the value of SPILL_INDIRECT_LEVELS from
4812 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4813 opnum, type, ind_levels);
4814 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4815 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4816 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4821 register int regno = REGNO (x);
4823 if (reg_equiv_constant[regno] != 0)
4825 find_reloads_address_part (reg_equiv_constant[regno], loc,
4826 (context ? INDEX_REG_CLASS
4828 GET_MODE (x), opnum, type, ind_levels);
4832 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4833 that feeds this insn. */
4834 if (reg_equiv_mem[regno] != 0)
4836 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4837 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4838 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4843 if (reg_equiv_address[regno] != 0)
4845 x = make_memloc (x, regno);
4846 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4847 opnum, type, ind_levels);
4850 if (reg_renumber[regno] >= 0)
4851 regno = reg_renumber[regno];
4853 if ((regno >= FIRST_PSEUDO_REGISTER
4854 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4855 : REGNO_OK_FOR_BASE_P (regno))))
4857 push_reload (x, NULL_RTX, loc, NULL_PTR,
4858 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4859 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4863 /* If a register appearing in an address is the subject of a CLOBBER
4864 in this insn, reload it into some other register to be safe.
4865 The CLOBBER is supposed to make the register unavailable
4866 from before this insn to after it. */
4867 if (regno_clobbered_p (regno, this_insn))
4869 push_reload (x, NULL_RTX, loc, NULL_PTR,
4870 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4871 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4878 if (GET_CODE (SUBREG_REG (x)) == REG)
4880 /* If this is a SUBREG of a hard register and the resulting register
4881 is of the wrong class, reload the whole SUBREG. This avoids
4882 needless copies if SUBREG_REG is multi-word. */
4883 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4885 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4887 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
4888 : REGNO_OK_FOR_BASE_P (regno)))
4890 push_reload (x, NULL_RTX, loc, NULL_PTR,
4891 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4892 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4896 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
4897 is larger than the class size, then reload the whole SUBREG. */
4900 enum reg_class class = (context
4901 ? INDEX_REG_CLASS : BASE_REG_CLASS);
4902 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
4903 > reg_class_size[class])
4905 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4906 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4915 register char *fmt = GET_RTX_FORMAT (code);
4918 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4921 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4922 opnum, type, ind_levels);
4929 /* X, which is found at *LOC, is a part of an address that needs to be
4930 reloaded into a register of class CLASS. If X is a constant, or if
4931 X is a PLUS that contains a constant, check that the constant is a
4932 legitimate operand and that we are supposed to be able to load
4933 it into the register.
4935 If not, force the constant into memory and reload the MEM instead.
4937 MODE is the mode to use, in case X is an integer constant.
4939 OPNUM and TYPE describe the purpose of any reloads made.
4941 IND_LEVELS says how many levels of indirect addressing this machine
4945 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
4948 enum reg_class class;
4949 enum machine_mode mode;
4951 enum reload_type type;
4955 && (! LEGITIMATE_CONSTANT_P (x)
4956 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4958 rtx tem = x = force_const_mem (mode, x);
4959 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4960 opnum, type, ind_levels);
4963 else if (GET_CODE (x) == PLUS
4964 && CONSTANT_P (XEXP (x, 1))
4965 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4966 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4968 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4970 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4971 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4972 opnum, type, ind_levels);
4975 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4976 mode, VOIDmode, 0, 0, opnum, type);
4979 /* Substitute into the current INSN the registers into which we have reloaded
4980 the things that need reloading. The array `replacements'
4981 says contains the locations of all pointers that must be changed
4982 and says what to replace them with.
4984 Return the rtx that X translates into; usually X, but modified. */
4991 for (i = 0; i < n_replacements; i++)
4993 register struct replacement *r = &replacements[i];
4994 register rtx reloadreg = reload_reg_rtx[r->what];
4997 /* Encapsulate RELOADREG so its machine mode matches what
4998 used to be there. Note that gen_lowpart_common will
4999 do the wrong thing if RELOADREG is multi-word. RELOADREG
5000 will always be a REG here. */
5001 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5002 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
5004 /* If we are putting this into a SUBREG and RELOADREG is a
5005 SUBREG, we would be making nested SUBREGs, so we have to fix
5006 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5008 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5010 if (GET_MODE (*r->subreg_loc)
5011 == GET_MODE (SUBREG_REG (reloadreg)))
5012 *r->subreg_loc = SUBREG_REG (reloadreg);
5015 *r->where = SUBREG_REG (reloadreg);
5016 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5020 *r->where = reloadreg;
5022 /* If reload got no reg and isn't optional, something's wrong. */
5023 else if (! reload_optional[r->what])
5028 /* Make a copy of any replacements being done into X and move those copies
5029 to locations in Y, a copy of X. We only look at the highest level of
5033 copy_replacements (x, y)
5038 enum rtx_code code = GET_CODE (x);
5039 char *fmt = GET_RTX_FORMAT (code);
5040 struct replacement *r;
5042 /* We can't support X being a SUBREG because we might then need to know its
5043 location if something inside it was replaced. */
5047 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5049 for (j = 0; j < n_replacements; j++)
5051 if (replacements[j].subreg_loc == &XEXP (x, i))
5053 r = &replacements[n_replacements++];
5054 r->where = replacements[j].where;
5055 r->subreg_loc = &XEXP (y, i);
5056 r->what = replacements[j].what;
5057 r->mode = replacements[j].mode;
5059 else if (replacements[j].where == &XEXP (x, i))
5061 r = &replacements[n_replacements++];
5062 r->where = &XEXP (y, i);
5064 r->what = replacements[j].what;
5065 r->mode = replacements[j].mode;
5070 /* If LOC was scheduled to be replaced by something, return the replacement.
5071 Otherwise, return *LOC. */
5074 find_replacement (loc)
5077 struct replacement *r;
5079 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5081 rtx reloadreg = reload_reg_rtx[r->what];
5083 if (reloadreg && r->where == loc)
5085 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5086 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
5090 else if (reloadreg && r->subreg_loc == loc)
5092 /* RELOADREG must be either a REG or a SUBREG.
5094 ??? Is it actually still ever a SUBREG? If so, why? */
5096 if (GET_CODE (reloadreg) == REG)
5097 return gen_rtx (REG, GET_MODE (*loc),
5098 REGNO (reloadreg) + SUBREG_WORD (*loc));
5099 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5102 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
5103 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5110 /* Return nonzero if register in range [REGNO, ENDREGNO)
5111 appears either explicitly or implicitly in X
5112 other than being stored into (except for earlyclobber operands).
5114 References contained within the substructure at LOC do not count.
5115 LOC may be zero, meaning don't ignore anything.
5117 This is similar to refers_to_regno_p in rtlanal.c except that we
5118 look at equivalences for pseudos that didn't get hard registers. */
5121 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5122 int regno, endregno;
5127 register RTX_CODE code;
5134 code = GET_CODE (x);
5141 /* If this is a pseudo, a hard register must not have been allocated.
5142 X must therefore either be a constant or be in memory. */
5143 if (i >= FIRST_PSEUDO_REGISTER)
5145 if (reg_equiv_memory_loc[i])
5146 return refers_to_regno_for_reload_p (regno, endregno,
5147 reg_equiv_memory_loc[i],
5150 if (reg_equiv_constant[i])
5156 return (endregno > i
5157 && regno < i + (i < FIRST_PSEUDO_REGISTER
5158 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5162 /* If this is a SUBREG of a hard reg, we can see exactly which
5163 registers are being modified. Otherwise, handle normally. */
5164 if (GET_CODE (SUBREG_REG (x)) == REG
5165 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5167 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5169 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5170 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5172 return endregno > inner_regno && regno < inner_endregno;
5178 if (&SET_DEST (x) != loc
5179 /* Note setting a SUBREG counts as referring to the REG it is in for
5180 a pseudo but not for hard registers since we can
5181 treat each word individually. */
5182 && ((GET_CODE (SET_DEST (x)) == SUBREG
5183 && loc != &SUBREG_REG (SET_DEST (x))
5184 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5185 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5186 && refers_to_regno_for_reload_p (regno, endregno,
5187 SUBREG_REG (SET_DEST (x)),
5189 /* If the output is an earlyclobber operand, this is
5191 || ((GET_CODE (SET_DEST (x)) != REG
5192 || earlyclobber_operand_p (SET_DEST (x)))
5193 && refers_to_regno_for_reload_p (regno, endregno,
5194 SET_DEST (x), loc))))
5197 if (code == CLOBBER || loc == &SET_SRC (x))
5203 /* X does not match, so try its subexpressions. */
5205 fmt = GET_RTX_FORMAT (code);
5206 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5208 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5216 if (refers_to_regno_for_reload_p (regno, endregno,
5220 else if (fmt[i] == 'E')
5223 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5224 if (loc != &XVECEXP (x, i, j)
5225 && refers_to_regno_for_reload_p (regno, endregno,
5226 XVECEXP (x, i, j), loc))
5233 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5234 we check if any register number in X conflicts with the relevant register
5235 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5236 contains a MEM (we don't bother checking for memory addresses that can't
5237 conflict because we expect this to be a rare case.
5239 This function is similar to reg_overlap_mention_p in rtlanal.c except
5240 that we look at equivalences for pseudos that didn't get hard registers. */
5243 reg_overlap_mentioned_for_reload_p (x, in)
5246 int regno, endregno;
5248 if (GET_CODE (x) == SUBREG)
5250 regno = REGNO (SUBREG_REG (x));
5251 if (regno < FIRST_PSEUDO_REGISTER)
5252 regno += SUBREG_WORD (x);
5254 else if (GET_CODE (x) == REG)
5258 /* If this is a pseudo, it must not have been assigned a hard register.
5259 Therefore, it must either be in memory or be a constant. */
5261 if (regno >= FIRST_PSEUDO_REGISTER)
5263 if (reg_equiv_memory_loc[regno])
5264 return refers_to_mem_for_reload_p (in);
5265 else if (reg_equiv_constant[regno])
5270 else if (CONSTANT_P (x))
5272 else if (GET_CODE (x) == MEM)
5273 return refers_to_mem_for_reload_p (in);
5274 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5275 || GET_CODE (x) == CC0)
5276 return reg_mentioned_p (x, in);
5280 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5281 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5283 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5286 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5290 refers_to_mem_for_reload_p (x)
5296 if (GET_CODE (x) == MEM)
5299 if (GET_CODE (x) == REG)
5300 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5301 && reg_equiv_memory_loc[REGNO (x)]);
5303 fmt = GET_RTX_FORMAT (GET_CODE (x));
5304 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5306 && (GET_CODE (XEXP (x, i)) == MEM
5307 || refers_to_mem_for_reload_p (XEXP (x, i))))
5313 /* Check the insns before INSN to see if there is a suitable register
5314 containing the same value as GOAL.
5315 If OTHER is -1, look for a register in class CLASS.
5316 Otherwise, just see if register number OTHER shares GOAL's value.
5318 Return an rtx for the register found, or zero if none is found.
5320 If RELOAD_REG_P is (short *)1,
5321 we reject any hard reg that appears in reload_reg_rtx
5322 because such a hard reg is also needed coming into this insn.
5324 If RELOAD_REG_P is any other nonzero value,
5325 it is a vector indexed by hard reg number
5326 and we reject any hard reg whose element in the vector is nonnegative
5327 as well as any that appears in reload_reg_rtx.
5329 If GOAL is zero, then GOALREG is a register number; we look
5330 for an equivalent for that register.
5332 MODE is the machine mode of the value we want an equivalence for.
5333 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5335 This function is used by jump.c as well as in the reload pass.
5337 If GOAL is the sum of the stack pointer and a constant, we treat it
5338 as if it were a constant except that sp is required to be unchanging. */
5341 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5344 enum reg_class class;
5346 short *reload_reg_p;
5348 enum machine_mode mode;
5350 register rtx p = insn;
5351 rtx goaltry, valtry, value, where;
5353 register int regno = -1;
5357 int goal_mem_addr_varies = 0;
5358 int need_stable_sp = 0;
5364 else if (GET_CODE (goal) == REG)
5365 regno = REGNO (goal);
5366 else if (GET_CODE (goal) == MEM)
5368 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5369 if (MEM_VOLATILE_P (goal))
5371 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5373 /* An address with side effects must be reexecuted. */
5384 else if (CONSTANT_P (goal))
5386 else if (GET_CODE (goal) == PLUS
5387 && XEXP (goal, 0) == stack_pointer_rtx
5388 && CONSTANT_P (XEXP (goal, 1)))
5389 goal_const = need_stable_sp = 1;
5393 /* On some machines, certain regs must always be rejected
5394 because they don't behave the way ordinary registers do. */
5396 #ifdef OVERLAPPING_REGNO_P
5397 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5398 && OVERLAPPING_REGNO_P (regno))
5402 /* Scan insns back from INSN, looking for one that copies
5403 a value into or out of GOAL.
5404 Stop and give up if we reach a label. */
5409 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5411 if (GET_CODE (p) == INSN
5412 /* If we don't want spill regs ... */
5413 && (! (reload_reg_p != 0
5414 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5415 /* ... then ignore insns introduced by reload; they aren't useful
5416 and can cause results in reload_as_needed to be different
5417 from what they were when calculating the need for spills.
5418 If we notice an input-reload insn here, we will reject it below,
5419 but it might hide a usable equivalent. That makes bad code.
5420 It may even abort: perhaps no reg was spilled for this insn
5421 because it was assumed we would find that equivalent. */
5422 || INSN_UID (p) < reload_first_uid))
5425 pat = single_set (p);
5426 /* First check for something that sets some reg equal to GOAL. */
5429 && true_regnum (SET_SRC (pat)) == regno
5430 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5433 && true_regnum (SET_DEST (pat)) == regno
5434 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5436 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5437 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5439 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5440 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5442 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5443 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5444 /* If we are looking for a constant,
5445 and something equivalent to that constant was copied
5446 into a reg, we can use that reg. */
5447 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5449 && rtx_equal_p (XEXP (tem, 0), goal)
5450 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5451 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5453 && GET_CODE (SET_DEST (pat)) == REG
5454 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5455 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5456 && GET_CODE (goal) == CONST_INT
5457 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5459 && rtx_equal_p (goal, goaltry)
5460 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5462 && (valueno = true_regnum (valtry)) >= 0)
5463 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5465 && GET_CODE (SET_DEST (pat)) == REG
5466 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5467 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5468 && GET_CODE (goal) == CONST_INT
5469 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5471 && rtx_equal_p (goal, goaltry)
5473 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5474 && (valueno = true_regnum (valtry)) >= 0)))
5477 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5478 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5488 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5489 (or copying VALUE into GOAL, if GOAL is also a register).
5490 Now verify that VALUE is really valid. */
5492 /* VALUENO is the register number of VALUE; a hard register. */
5494 /* Don't try to re-use something that is killed in this insn. We want
5495 to be able to trust REG_UNUSED notes. */
5496 if (find_reg_note (where, REG_UNUSED, value))
5499 /* If we propose to get the value from the stack pointer or if GOAL is
5500 a MEM based on the stack pointer, we need a stable SP. */
5501 if (valueno == STACK_POINTER_REGNUM
5502 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5506 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5507 if (GET_MODE (value) != mode)
5510 /* Reject VALUE if it was loaded from GOAL
5511 and is also a register that appears in the address of GOAL. */
5513 if (goal_mem && value == SET_DEST (PATTERN (where))
5514 && refers_to_regno_for_reload_p (valueno,
5516 + HARD_REGNO_NREGS (valueno, mode)),
5520 /* Reject registers that overlap GOAL. */
5522 if (!goal_mem && !goal_const
5523 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5524 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5527 /* Reject VALUE if it is one of the regs reserved for reloads.
5528 Reload1 knows how to reuse them anyway, and it would get
5529 confused if we allocated one without its knowledge.
5530 (Now that insns introduced by reload are ignored above,
5531 this case shouldn't happen, but I'm not positive.) */
5533 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5534 && reload_reg_p[valueno] >= 0)
5537 /* On some machines, certain regs must always be rejected
5538 because they don't behave the way ordinary registers do. */
5540 #ifdef OVERLAPPING_REGNO_P
5541 if (OVERLAPPING_REGNO_P (valueno))
5545 nregs = HARD_REGNO_NREGS (regno, mode);
5546 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5548 /* Reject VALUE if it is a register being used for an input reload
5549 even if it is not one of those reserved. */
5551 if (reload_reg_p != 0)
5554 for (i = 0; i < n_reloads; i++)
5555 if (reload_reg_rtx[i] != 0 && reload_in[i])
5557 int regno1 = REGNO (reload_reg_rtx[i]);
5558 int nregs1 = HARD_REGNO_NREGS (regno1,
5559 GET_MODE (reload_reg_rtx[i]));
5560 if (regno1 < valueno + valuenregs
5561 && regno1 + nregs1 > valueno)
5567 /* We must treat frame pointer as varying here,
5568 since it can vary--in a nonlocal goto as generated by expand_goto. */
5569 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5571 /* Now verify that the values of GOAL and VALUE remain unaltered
5572 until INSN is reached. */
5581 /* Don't trust the conversion past a function call
5582 if either of the two is in a call-clobbered register, or memory. */
5583 if (GET_CODE (p) == CALL_INSN
5584 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5585 && call_used_regs[regno])
5587 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5588 && call_used_regs[valueno])
5594 #ifdef NON_SAVING_SETJMP
5595 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
5596 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
5600 #ifdef INSN_CLOBBERS_REGNO_P
5601 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5602 && INSN_CLOBBERS_REGNO_P (p, valueno))
5603 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5604 && INSN_CLOBBERS_REGNO_P (p, regno)))
5608 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5610 /* If this insn P stores in either GOAL or VALUE, return 0.
5611 If GOAL is a memory ref and this insn writes memory, return 0.
5612 If GOAL is a memory ref and its address is not constant,
5613 and this insn P changes a register used in GOAL, return 0. */
5616 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5618 register rtx dest = SET_DEST (pat);
5619 while (GET_CODE (dest) == SUBREG
5620 || GET_CODE (dest) == ZERO_EXTRACT
5621 || GET_CODE (dest) == SIGN_EXTRACT
5622 || GET_CODE (dest) == STRICT_LOW_PART)
5623 dest = XEXP (dest, 0);
5624 if (GET_CODE (dest) == REG)
5626 register int xregno = REGNO (dest);
5628 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5629 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5632 if (xregno < regno + nregs && xregno + xnregs > regno)
5634 if (xregno < valueno + valuenregs
5635 && xregno + xnregs > valueno)
5637 if (goal_mem_addr_varies
5638 && reg_overlap_mentioned_for_reload_p (dest, goal))
5641 else if (goal_mem && GET_CODE (dest) == MEM
5642 && ! push_operand (dest, GET_MODE (dest)))
5644 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
5645 && reg_equiv_memory_loc[regno] != 0)
5647 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5650 else if (GET_CODE (pat) == PARALLEL)
5653 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5655 register rtx v1 = XVECEXP (pat, 0, i);
5656 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5658 register rtx dest = SET_DEST (v1);
5659 while (GET_CODE (dest) == SUBREG
5660 || GET_CODE (dest) == ZERO_EXTRACT
5661 || GET_CODE (dest) == SIGN_EXTRACT
5662 || GET_CODE (dest) == STRICT_LOW_PART)
5663 dest = XEXP (dest, 0);
5664 if (GET_CODE (dest) == REG)
5666 register int xregno = REGNO (dest);
5668 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5669 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5672 if (xregno < regno + nregs
5673 && xregno + xnregs > regno)
5675 if (xregno < valueno + valuenregs
5676 && xregno + xnregs > valueno)
5678 if (goal_mem_addr_varies
5679 && reg_overlap_mentioned_for_reload_p (dest,
5683 else if (goal_mem && GET_CODE (dest) == MEM
5684 && ! push_operand (dest, GET_MODE (dest)))
5686 else if (need_stable_sp
5687 && push_operand (dest, GET_MODE (dest)))
5693 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
5697 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
5698 link = XEXP (link, 1))
5700 pat = XEXP (link, 0);
5701 if (GET_CODE (pat) == CLOBBER)
5703 register rtx dest = SET_DEST (pat);
5704 while (GET_CODE (dest) == SUBREG
5705 || GET_CODE (dest) == ZERO_EXTRACT
5706 || GET_CODE (dest) == SIGN_EXTRACT
5707 || GET_CODE (dest) == STRICT_LOW_PART)
5708 dest = XEXP (dest, 0);
5709 if (GET_CODE (dest) == REG)
5711 register int xregno = REGNO (dest);
5713 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5714 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5717 if (xregno < regno + nregs
5718 && xregno + xnregs > regno)
5720 if (xregno < valueno + valuenregs
5721 && xregno + xnregs > valueno)
5723 if (goal_mem_addr_varies
5724 && reg_overlap_mentioned_for_reload_p (dest,
5728 else if (goal_mem && GET_CODE (dest) == MEM
5729 && ! push_operand (dest, GET_MODE (dest)))
5731 else if (need_stable_sp
5732 && push_operand (dest, GET_MODE (dest)))
5739 /* If this insn auto-increments or auto-decrements
5740 either regno or valueno, return 0 now.
5741 If GOAL is a memory ref and its address is not constant,
5742 and this insn P increments a register used in GOAL, return 0. */
5746 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5747 if (REG_NOTE_KIND (link) == REG_INC
5748 && GET_CODE (XEXP (link, 0)) == REG)
5750 register int incno = REGNO (XEXP (link, 0));
5751 if (incno < regno + nregs && incno >= regno)
5753 if (incno < valueno + valuenregs && incno >= valueno)
5755 if (goal_mem_addr_varies
5756 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5766 /* Find a place where INCED appears in an increment or decrement operator
5767 within X, and return the amount INCED is incremented or decremented by.
5768 The value is always positive. */
5771 find_inc_amount (x, inced)
5774 register enum rtx_code code = GET_CODE (x);
5780 register rtx addr = XEXP (x, 0);
5781 if ((GET_CODE (addr) == PRE_DEC
5782 || GET_CODE (addr) == POST_DEC
5783 || GET_CODE (addr) == PRE_INC
5784 || GET_CODE (addr) == POST_INC)
5785 && XEXP (addr, 0) == inced)
5786 return GET_MODE_SIZE (GET_MODE (x));
5789 fmt = GET_RTX_FORMAT (code);
5790 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5794 register int tem = find_inc_amount (XEXP (x, i), inced);
5801 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5803 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5813 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5816 regno_clobbered_p (regno, insn)
5820 if (GET_CODE (PATTERN (insn)) == CLOBBER
5821 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5822 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5824 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5826 int i = XVECLEN (PATTERN (insn), 0) - 1;
5830 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5831 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5832 && REGNO (XEXP (elt, 0)) == regno)
5840 static char *reload_when_needed_name[] =
5843 "RELOAD_FOR_OUTPUT",
5845 "RELOAD_FOR_INPUT_ADDRESS",
5846 "RELOAD_FOR_OUTPUT_ADDRESS",
5847 "RELOAD_FOR_OPERAND_ADDRESS",
5848 "RELOAD_FOR_OPADDR_ADDR",
5850 "RELOAD_FOR_OTHER_ADDRESS"
5853 static char *reg_class_names[] = REG_CLASS_NAMES;
5855 /* This function is used to print the variables set by 'find_reloads' */
5862 fprintf (stderr, "\nn_reloads = %d\n", n_reloads);
5864 for (r = 0; r < n_reloads; r++)
5866 fprintf (stderr, "\nRELOAD %d\n", r);
5870 fprintf (stderr, "\nreload_in (%s) = ",
5871 GET_MODE_NAME (reload_inmode[r]));
5872 debug_rtx (reload_in[r]);
5877 fprintf (stderr, "\nreload_out (%s) = ",
5878 GET_MODE_NAME (reload_outmode[r]));
5879 debug_rtx (reload_out[r]);
5882 fprintf (stderr, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
5884 fprintf (stderr, "%s (opnum = %d)",
5885 reload_when_needed_name[(int)reload_when_needed[r]],
5888 if (reload_optional[r])
5889 fprintf (stderr, ", optional");
5892 fprintf (stderr, ", inc by %d\n", reload_inc[r]);
5894 if (reload_nocombine[r])
5895 fprintf (stderr, ", can combine", reload_nocombine[r]);
5897 if (reload_secondary_p[r])
5898 fprintf (stderr, ", secondary_reload_p");
5900 if (reload_in_reg[r])
5902 fprintf (stderr, "\nreload_in_reg:\t\t\t");
5903 debug_rtx (reload_in_reg[r]);
5906 if (reload_reg_rtx[r])
5908 fprintf (stderr, "\nreload_reg_rtx:\t\t\t");
5909 debug_rtx (reload_reg_rtx[r]);
5912 if (reload_secondary_in_reload[r] != -1)
5914 fprintf (stderr, "\nsecondary_in_reload = ");
5915 fprintf (stderr, "%d ", reload_secondary_in_reload[r]);
5918 if (reload_secondary_out_reload[r] != -1)
5920 if (reload_secondary_in_reload[r] != -1)
5921 fprintf (stderr, ", secondary_out_reload = ");
5923 fprintf (stderr, "\nsecondary_out_reload = ");
5925 fprintf (stderr, "%d", reload_secondary_out_reload[r]);
5929 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5931 fprintf (stderr, "\nsecondary_in_icode = ");
5932 fprintf (stderr, "%s", insn_name[r]);
5935 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
5937 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5938 fprintf (stderr, ", secondary_out_icode = ");
5940 fprintf (stderr, "\nsecondary_out_icode = ");
5942 fprintf (stderr, "%s ", insn_name[r]);
5944 fprintf (stderr, "\n");
5947 fprintf (stderr, "\n");