1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_reload int, gives the reload number of a secondary
145 reload, when needed; otherwise -1
146 reload_secondary_p int, 1 if this is a secondary register for one
148 reload_secondary_icode enum insn_code, if a secondary reload is required,
149 gives the INSN_CODE that uses the secondary
150 reload as a scratch register, or CODE_FOR_nothing
151 if the secondary reload register is to be an
152 intermediate register. */
155 rtx reload_in[MAX_RELOADS];
156 rtx reload_out[MAX_RELOADS];
157 enum reg_class reload_reg_class[MAX_RELOADS];
158 enum machine_mode reload_inmode[MAX_RELOADS];
159 enum machine_mode reload_outmode[MAX_RELOADS];
160 rtx reload_reg_rtx[MAX_RELOADS];
161 char reload_optional[MAX_RELOADS];
162 int reload_inc[MAX_RELOADS];
163 rtx reload_in_reg[MAX_RELOADS];
164 char reload_nocombine[MAX_RELOADS];
165 int reload_opnum[MAX_RELOADS];
166 enum reload_type reload_when_needed[MAX_RELOADS];
167 int reload_secondary_reload[MAX_RELOADS];
168 int reload_secondary_p[MAX_RELOADS];
169 enum insn_code reload_secondary_icode[MAX_RELOADS];
171 /* All the "earlyclobber" operands of the current insn
172 are recorded here. */
174 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
176 int reload_n_operands;
178 /* Replacing reloads.
180 If `replace_reloads' is nonzero, then as each reload is recorded
181 an entry is made for it in the table `replacements'.
182 Then later `subst_reloads' can look through that table and
183 perform all the replacements needed. */
185 /* Nonzero means record the places to replace. */
186 static int replace_reloads;
188 /* Each replacement is recorded with a structure like this. */
191 rtx *where; /* Location to store in */
192 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
193 a SUBREG; 0 otherwise. */
194 int what; /* which reload this is for */
195 enum machine_mode mode; /* mode it must have */
198 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
200 /* Number of replacements currently recorded. */
201 static int n_replacements;
203 /* Used to track what is modified by an operand. */
206 int reg_flag; /* Nonzero if referencing a register. */
207 int safe; /* Nonzero if this can't conflict with anything. */
208 rtx base; /* Base adddress for MEM. */
209 HOST_WIDE_INT start; /* Starting offset or register number. */
210 HOST_WIDE_INT end; /* Endinf offset or register number. */
213 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
214 (see reg_equiv_address). */
215 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
216 static int n_memlocs;
218 #ifdef SECONDARY_MEMORY_NEEDED
220 /* Save MEMs needed to copy from one class of registers to another. One MEM
221 is used per mode, but normally only one or two modes are ever used.
223 We keep two versions, before and after register elimination. The one
224 after register elimination is record separately for each operand. This
225 is done in case the address is not valid to be sure that we separately
228 static rtx secondary_memlocs[NUM_MACHINE_MODES];
229 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
232 /* The instruction we are doing reloads for;
233 so we can test whether a register dies in it. */
234 static rtx this_insn;
236 /* Nonzero if this instruction is a user-specified asm with operands. */
237 static int this_insn_is_asm;
239 /* If hard_regs_live_known is nonzero,
240 we can tell which hard regs are currently live,
241 at least enough to succeed in choosing dummy reloads. */
242 static int hard_regs_live_known;
244 /* Indexed by hard reg number,
245 element is nonegative if hard reg has been spilled.
246 This vector is passed to `find_reloads' as an argument
247 and is not changed here. */
248 static short *static_reload_reg_p;
250 /* Set to 1 in subst_reg_equivs if it changes anything. */
251 static int subst_reg_equivs_changed;
253 /* On return from push_reload, holds the reload-number for the OUT
254 operand, which can be different for that from the input operand. */
255 static int output_reloadnum;
257 static enum reg_class find_secondary_reload PROTO((rtx, enum reg_class,
258 enum machine_mode, int,
263 enum machine_mode *));
264 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
265 enum machine_mode, enum machine_mode,
266 int, int, int, enum reload_type));
267 static void push_replacement PROTO((rtx *, int, enum machine_mode));
268 static void combine_reloads PROTO((void));
269 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
270 enum machine_mode, enum machine_mode,
271 enum reg_class, int));
272 static int earlyclobber_operand_p PROTO((rtx));
273 static int hard_reg_set_here_p PROTO((int, int, rtx));
274 static struct decomposition decompose PROTO((rtx));
275 static int immune_p PROTO((rtx, rtx, struct decomposition));
276 static int alternative_allows_memconst PROTO((char *, int));
277 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
278 static rtx make_memloc PROTO((rtx, int));
279 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
280 int, enum reload_type, int));
281 static rtx subst_reg_equivs PROTO((rtx));
282 static rtx subst_indexed_address PROTO((rtx));
283 static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
284 enum reload_type,int));
285 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
286 enum machine_mode, int,
287 enum reload_type, int));
288 static int find_inc_amount PROTO((rtx, rtx));
290 #ifdef HAVE_SECONDARY_RELOADS
292 /* Determine if any secondary reloads are needed for loading (if IN_P is
293 non-zero) or storing (if IN_P is zero) X to or from a reload register of
294 register class RELOAD_CLASS in mode RELOAD_MODE.
296 Return the register class of a secondary reload register, or NO_REGS if
297 none. *PMODE is set to the mode that the register is required in.
298 If the reload register is needed as a scratch register instead of an
299 intermediate register, *PICODE is set to the insn_code of the insn to be
300 used to load or store the primary reload register; otherwise *PICODE
301 is set to CODE_FOR_nothing.
303 In some cases (such as storing MQ into an external memory location on
304 the RT), both an intermediate register and a scratch register. In that
305 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
306 register is returned, and the *PTERTIARY_... variables are set to describe
307 the scratch register. */
309 static enum reg_class
310 find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
311 ptertiary_class, ptertiary_icode, ptertiary_mode)
313 enum reg_class reload_class;
314 enum machine_mode reload_mode;
316 enum insn_code *picode;
317 enum machine_mode *pmode;
318 enum reg_class *ptertiary_class;
319 enum insn_code *ptertiary_icode;
320 enum machine_mode *ptertiary_mode;
322 enum reg_class class = NO_REGS;
323 enum machine_mode mode = reload_mode;
324 enum insn_code icode = CODE_FOR_nothing;
325 enum reg_class t_class = NO_REGS;
326 enum machine_mode t_mode = VOIDmode;
327 enum insn_code t_icode = CODE_FOR_nothing;
329 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
330 is still a pseudo-register by now, it *must* have an equivalent MEM
331 but we don't want to assume that), use that equivalent when seeing if
332 a secondary reload is needed since whether or not a reload is needed
333 might be sensitive to the form of the MEM. */
335 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
336 && reg_equiv_mem[REGNO (x)] != 0)
337 x = reg_equiv_mem[REGNO (x)];
339 #ifdef SECONDARY_INPUT_RELOAD_CLASS
341 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
344 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
346 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
349 /* If we don't need any secondary registers, go away; the rest of the
350 values won't be used. */
351 if (class == NO_REGS)
354 /* Get a possible insn to use. If the predicate doesn't accept X, don't
357 icode = (in_p ? reload_in_optab[(int) reload_mode]
358 : reload_out_optab[(int) reload_mode]);
360 if (icode != CODE_FOR_nothing
361 && insn_operand_predicate[(int) icode][in_p]
362 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
363 icode = CODE_FOR_nothing;
365 /* If we will be using an insn, see if it can directly handle the reload
366 register we will be using. If it can, the secondary reload is for a
367 scratch register. If it can't, we will use the secondary reload for
368 an intermediate register and require a tertiary reload for the scratch
371 if (icode != CODE_FOR_nothing)
373 /* If IN_P is non-zero, the reload register will be the output in
374 operand 0. If IN_P is zero, the reload register will be the input
375 in operand 1. Outputs should have an initial "=", which we must
378 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
379 enum reg_class insn_class
380 = (insn_letter == 'r' ? GENERAL_REGS
381 : REG_CLASS_FROM_LETTER (insn_letter));
383 if (insn_class == NO_REGS
384 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
385 /* The scratch register's constraint must start with "=&". */
386 || insn_operand_constraint[(int) icode][2][0] != '='
387 || insn_operand_constraint[(int) icode][2][1] != '&')
390 if (reg_class_subset_p (reload_class, insn_class))
391 mode = insn_operand_mode[(int) icode][2];
394 char t_letter = insn_operand_constraint[(int) icode][2][2];
396 t_mode = insn_operand_mode[(int) icode][2];
397 t_class = (t_letter == 'r' ? GENERAL_REGS
398 : REG_CLASS_FROM_LETTER (t_letter));
400 icode = CODE_FOR_nothing;
406 *ptertiary_class = t_class;
407 *ptertiary_mode = t_mode;
408 *ptertiary_icode = t_icode;
412 #endif /* HAVE_SECONDARY_RELOADS */
414 #ifdef SECONDARY_MEMORY_NEEDED
416 /* Return a memory location that will be used to copy X in mode MODE.
417 If we haven't already made a location for this mode in this insn,
418 call find_reloads_address on the location being returned. */
421 get_secondary_mem (x, mode, opnum, type)
423 enum machine_mode mode;
425 enum reload_type type;
430 /* If MODE is narrower than a word, widen it. This is required because
431 most machines that require these memory locations do not support
432 short load and stores from all registers (e.g., FP registers). We could
433 possibly conditionalize this, but we lose nothing by doing the wider
436 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
437 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
439 /* If we already have made a MEM for this operand in MODE, return it. */
440 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
441 return secondary_memlocs_elim[(int) mode][opnum];
443 /* If this is the first time we've tried to get a MEM for this mode,
444 allocate a new one. `something_changed' in reload will get set
445 by noticing that the frame size has changed. */
447 if (secondary_memlocs[(int) mode] == 0)
449 #ifdef SECONDARY_MEMORY_NEEDED_RTX
450 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
452 secondary_memlocs[(int) mode]
453 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
457 /* Get a version of the address doing any eliminations needed. If that
458 didn't give us a new MEM, make a new one if it isn't valid. */
460 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
461 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
463 if (! mem_valid && loc == secondary_memlocs[(int) mode])
464 loc = copy_rtx (loc);
466 /* The only time the call below will do anything is if the stack
467 offset is too large. In that case IND_LEVELS doesn't matter, so we
468 can just pass a zero. Adjust the type to be the address of the
469 corresponding object. If the address was valid, save the eliminated
470 address. If it wasn't valid, we need to make a reload each time, so
475 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
476 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
479 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
483 secondary_memlocs_elim[(int) mode][opnum] = loc;
487 /* Clear any secondary memory locations we've made. */
490 clear_secondary_mem ()
492 bzero (secondary_memlocs, sizeof secondary_memlocs);
494 #endif /* SECONDARY_MEMORY_NEEDED */
496 /* Record one reload that needs to be performed.
497 IN is an rtx saying where the data are to be found before this instruction.
498 OUT says where they must be stored after the instruction.
499 (IN is zero for data not read, and OUT is zero for data not written.)
500 INLOC and OUTLOC point to the places in the instructions where
501 IN and OUT were found.
502 If IN and OUT are both non-zero, it means the same register must be used
503 to reload both IN and OUT.
505 CLASS is a register class required for the reloaded data.
506 INMODE is the machine mode that the instruction requires
507 for the reg that replaces IN and OUTMODE is likewise for OUT.
509 If IN is zero, then OUT's location and mode should be passed as
512 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
514 OPTIONAL nonzero means this reload does not need to be performed:
515 it can be discarded if that is more convenient.
517 OPNUM and TYPE say what the purpose of this reload is.
519 The return value is the reload-number for this reload.
521 If both IN and OUT are nonzero, in some rare cases we might
522 want to make two separate reloads. (Actually we never do this now.)
523 Therefore, the reload-number for OUT is stored in
524 output_reloadnum when we return; the return value applies to IN.
525 Usually (presently always), when IN and OUT are nonzero,
526 the two reload-numbers are equal, but the caller should be careful to
530 push_reload (in, out, inloc, outloc, class,
531 inmode, outmode, strict_low, optional, opnum, type)
532 register rtx in, out;
534 enum reg_class class;
535 enum machine_mode inmode, outmode;
539 enum reload_type type;
543 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
544 int secondary_reload = -1;
545 enum insn_code secondary_icode = CODE_FOR_nothing;
547 /* Compare two RTX's. */
548 #define MATCHES(x, y) \
549 (x == y || (x != 0 && (GET_CODE (x) == REG \
550 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
551 : rtx_equal_p (x, y) && ! side_effects_p (x))))
553 /* Indicates if two reloads purposes are for similar enough things that we
554 can merge their reloads. */
555 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
556 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
557 || ((when1) == (when2) && (op1) == (op2)) \
558 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
559 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
560 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
561 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
562 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
564 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
565 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
566 ((when1) != (when2) \
567 || ! ((op1) == (op2) \
568 || (when1) == RELOAD_FOR_INPUT \
569 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
570 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
572 /* INMODE and/or OUTMODE could be VOIDmode if no mode
573 has been specified for the operand. In that case,
574 use the operand's mode as the mode to reload. */
575 if (inmode == VOIDmode && in != 0)
576 inmode = GET_MODE (in);
577 if (outmode == VOIDmode && out != 0)
578 outmode = GET_MODE (out);
580 /* If IN is a pseudo register everywhere-equivalent to a constant, and
581 it is not in a hard register, reload straight from the constant,
582 since we want to get rid of such pseudo registers.
583 Often this is done earlier, but not always in find_reloads_address. */
584 if (in != 0 && GET_CODE (in) == REG)
586 register int regno = REGNO (in);
588 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
589 && reg_equiv_constant[regno] != 0)
590 in = reg_equiv_constant[regno];
593 /* Likewise for OUT. Of course, OUT will never be equivalent to
594 an actual constant, but it might be equivalent to a memory location
595 (in the case of a parameter). */
596 if (out != 0 && GET_CODE (out) == REG)
598 register int regno = REGNO (out);
600 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
601 && reg_equiv_constant[regno] != 0)
602 out = reg_equiv_constant[regno];
605 /* If we have a read-write operand with an address side-effect,
606 change either IN or OUT so the side-effect happens only once. */
607 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
609 if (GET_CODE (XEXP (in, 0)) == POST_INC
610 || GET_CODE (XEXP (in, 0)) == POST_DEC)
611 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
612 if (GET_CODE (XEXP (in, 0)) == PRE_INC
613 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
614 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
617 /* If we are reloading a (SUBREG constant ...), really reload just the
618 inside expression in its own mode.
619 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
620 a pseudo and hence will become a MEM) with M1 wider than M2 and the
621 register is a pseudo, also reload the inside expression.
622 For machines that extend byte loads, do this for any SUBREG of a pseudo
623 where both M1 and M2 are a word or smaller unless they are the same
625 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
626 either M1 is not valid for R or M2 is wider than a word but we only
627 need one word to store an M2-sized quantity in R.
628 (However, if OUT is nonzero, we need to reload the reg *and*
629 the subreg, so do nothing here, and let following statement handle it.)
631 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
632 we can't handle it here because CONST_INT does not indicate a mode.
634 Similarly, we must reload the inside expression if we have a
635 STRICT_LOW_PART (presumably, in == out in the cas).
637 Also reload the inner expression if it does not require a secondary
638 reload but the SUBREG does. */
640 if (in != 0 && GET_CODE (in) == SUBREG
641 && (CONSTANT_P (SUBREG_REG (in))
643 || (((GET_CODE (SUBREG_REG (in)) == REG
644 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
645 || GET_CODE (SUBREG_REG (in)) == MEM)
646 #ifdef LOAD_EXTEND_OP
647 && GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
648 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) <= UNITS_PER_WORD
649 && (GET_MODE_SIZE (inmode)
650 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
652 && (GET_MODE_SIZE (inmode)
653 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
656 || (GET_CODE (SUBREG_REG (in)) == REG
657 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
658 /* The case where out is nonzero
659 is handled differently in the following statement. */
660 && (out == 0 || SUBREG_WORD (in) == 0)
661 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
662 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
664 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
666 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
667 GET_MODE (SUBREG_REG (in)))))
668 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
671 #ifdef SECONDARY_INPUT_RELOAD_CLASS
672 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
673 && (SECONDARY_INPUT_RELOAD_CLASS (class,
674 GET_MODE (SUBREG_REG (in)),
680 in_subreg_loc = inloc;
681 inloc = &SUBREG_REG (in);
683 #ifndef LOAD_EXTEND_OP
684 if (GET_CODE (in) == MEM)
685 /* This is supposed to happen only for paradoxical subregs made by
686 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
687 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
690 inmode = GET_MODE (in);
693 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
694 either M1 is not valid for R or M2 is wider than a word but we only
695 need one word to store an M2-sized quantity in R.
697 However, we must reload the inner reg *as well as* the subreg in
700 if (in != 0 && GET_CODE (in) == SUBREG
701 && GET_CODE (SUBREG_REG (in)) == REG
702 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
703 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
704 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
705 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
707 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
709 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
710 GET_MODE (SUBREG_REG (in)))))))
712 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
713 GENERAL_REGS, VOIDmode, VOIDmode, 0, 0, opnum, type);
717 /* Similarly for paradoxical and problematical SUBREGs on the output.
718 Note that there is no reason we need worry about the previous value
719 of SUBREG_REG (out); even if wider than out,
720 storing in a subreg is entitled to clobber it all
721 (except in the case of STRICT_LOW_PART,
722 and in that case the constraint should label it input-output.) */
723 if (out != 0 && GET_CODE (out) == SUBREG
724 && (CONSTANT_P (SUBREG_REG (out))
726 || (((GET_CODE (SUBREG_REG (out)) == REG
727 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
728 || GET_CODE (SUBREG_REG (out)) == MEM)
729 #ifdef LOAD_EXTEND_OP
730 && GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
731 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) <= UNITS_PER_WORD
732 && (GET_MODE_SIZE (outmode)
733 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
735 && (GET_MODE_SIZE (outmode)
736 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
739 || (GET_CODE (SUBREG_REG (out)) == REG
740 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
741 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
742 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
744 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
746 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
747 GET_MODE (SUBREG_REG (out)))))
748 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
749 + SUBREG_WORD (out)),
751 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
752 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
753 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
754 GET_MODE (SUBREG_REG (out)),
760 out_subreg_loc = outloc;
761 outloc = &SUBREG_REG (out);
763 #ifndef LOAD_EXTEND_OP
764 if (GET_CODE (out) == MEM
765 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
768 outmode = GET_MODE (out);
771 /* If IN appears in OUT, we can't share any input-only reload for IN. */
772 if (in != 0 && out != 0 && GET_CODE (out) == MEM
773 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
774 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
777 /* If IN is a SUBREG of a hard register, make a new REG. This
778 simplifies some of the cases below. */
780 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
781 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
782 in = gen_rtx (REG, GET_MODE (in),
783 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
785 /* Similarly for OUT. */
786 if (out != 0 && GET_CODE (out) == SUBREG
787 && GET_CODE (SUBREG_REG (out)) == REG
788 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
789 out = gen_rtx (REG, GET_MODE (out),
790 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
792 /* Narrow down the class of register wanted if that is
793 desirable on this machine for efficiency. */
795 class = PREFERRED_RELOAD_CLASS (in, class);
797 /* Output reloads may need analogous treatment, different in detail. */
798 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
800 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
803 /* Make sure we use a class that can handle the actual pseudo
804 inside any subreg. For example, on the 386, QImode regs
805 can appear within SImode subregs. Although GENERAL_REGS
806 can handle SImode, QImode needs a smaller class. */
807 #ifdef LIMIT_RELOAD_CLASS
809 class = LIMIT_RELOAD_CLASS (inmode, class);
810 else if (in != 0 && GET_CODE (in) == SUBREG)
811 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
814 class = LIMIT_RELOAD_CLASS (outmode, class);
815 if (out != 0 && GET_CODE (out) == SUBREG)
816 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
819 /* Verify that this class is at least possible for the mode that
821 if (this_insn_is_asm)
823 enum machine_mode mode;
824 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
828 if (mode == VOIDmode)
830 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
837 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
838 if (HARD_REGNO_MODE_OK (i, mode)
839 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
841 int nregs = HARD_REGNO_NREGS (i, mode);
844 for (j = 1; j < nregs; j++)
845 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
850 if (i == FIRST_PSEUDO_REGISTER)
852 error_for_asm (this_insn, "impossible register constraint in `asm'");
857 if (class == NO_REGS)
860 /* We can use an existing reload if the class is right
861 and at least one of IN and OUT is a match
862 and the other is at worst neutral.
863 (A zero compared against anything is neutral.)
865 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
866 for the same thing since that can cause us to need more reload registers
867 than we otherwise would. */
869 for (i = 0; i < n_reloads; i++)
870 if ((reg_class_subset_p (class, reload_reg_class[i])
871 || reg_class_subset_p (reload_reg_class[i], class))
872 /* If the existing reload has a register, it must fit our class. */
873 && (reload_reg_rtx[i] == 0
874 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
875 true_regnum (reload_reg_rtx[i])))
876 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
877 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
879 (out != 0 && MATCHES (reload_out[i], out)
880 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
881 && (reg_class_size[(int) class] == 1
882 #ifdef SMALL_REGISTER_CLASSES
886 && MERGABLE_RELOADS (type, reload_when_needed[i],
887 opnum, reload_opnum[i]))
890 /* Reloading a plain reg for input can match a reload to postincrement
891 that reg, since the postincrement's value is the right value.
892 Likewise, it can match a preincrement reload, since we regard
893 the preincrementation as happening before any ref in this insn
896 for (i = 0; i < n_reloads; i++)
897 if ((reg_class_subset_p (class, reload_reg_class[i])
898 || reg_class_subset_p (reload_reg_class[i], class))
899 /* If the existing reload has a register, it must fit our class. */
900 && (reload_reg_rtx[i] == 0
901 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
902 true_regnum (reload_reg_rtx[i])))
903 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
904 && ((GET_CODE (in) == REG
905 && (GET_CODE (reload_in[i]) == POST_INC
906 || GET_CODE (reload_in[i]) == POST_DEC
907 || GET_CODE (reload_in[i]) == PRE_INC
908 || GET_CODE (reload_in[i]) == PRE_DEC)
909 && MATCHES (XEXP (reload_in[i], 0), in))
911 (GET_CODE (reload_in[i]) == REG
912 && (GET_CODE (in) == POST_INC
913 || GET_CODE (in) == POST_DEC
914 || GET_CODE (in) == PRE_INC
915 || GET_CODE (in) == PRE_DEC)
916 && MATCHES (XEXP (in, 0), reload_in[i])))
917 && (reg_class_size[(int) class] == 1
918 #ifdef SMALL_REGISTER_CLASSES
922 && MERGABLE_RELOADS (type, reload_when_needed[i],
923 opnum, reload_opnum[i]))
925 /* Make sure reload_in ultimately has the increment,
926 not the plain register. */
927 if (GET_CODE (in) == REG)
934 #ifdef HAVE_SECONDARY_RELOADS
935 enum reg_class secondary_class = NO_REGS;
936 enum reg_class secondary_out_class = NO_REGS;
937 enum machine_mode secondary_mode = inmode;
938 enum machine_mode secondary_out_mode = outmode;
939 enum insn_code secondary_icode;
940 enum insn_code secondary_out_icode = CODE_FOR_nothing;
941 enum reg_class tertiary_class = NO_REGS;
942 enum reg_class tertiary_out_class = NO_REGS;
943 enum machine_mode tertiary_mode;
944 enum machine_mode tertiary_out_mode;
945 enum insn_code tertiary_icode;
946 enum insn_code tertiary_out_icode = CODE_FOR_nothing;
947 int tertiary_reload = -1;
949 /* See if we need a secondary reload register to move between
950 CLASS and IN or CLASS and OUT. Get the modes and icodes to
951 use for each of them if so. */
953 #ifdef SECONDARY_INPUT_RELOAD_CLASS
956 = find_secondary_reload (in, class, inmode, 1, &secondary_icode,
957 &secondary_mode, &tertiary_class,
958 &tertiary_icode, &tertiary_mode);
961 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
962 if (out != 0 && GET_CODE (out) != SCRATCH)
964 = find_secondary_reload (out, class, outmode, 0,
965 &secondary_out_icode, &secondary_out_mode,
966 &tertiary_out_class, &tertiary_out_icode,
970 /* We can only record one secondary and one tertiary reload. If both
971 IN and OUT need secondary reloads, we can only make an in-out
972 reload if neither need an insn and if the classes are compatible.
973 If they aren't, all we can do is abort since making two separate
974 reloads is invalid. */
976 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
977 && reg_class_subset_p (secondary_out_class, secondary_class))
978 secondary_class = secondary_out_class;
980 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
981 && (! reg_class_subset_p (secondary_class, secondary_out_class)
982 || secondary_icode != CODE_FOR_nothing
983 || secondary_out_icode != CODE_FOR_nothing))
986 /* If we need a secondary reload for OUT but not IN, copy the
988 if (secondary_class == NO_REGS && secondary_out_class != NO_REGS)
990 secondary_class = secondary_out_class;
991 secondary_icode = secondary_out_icode;
992 tertiary_class = tertiary_out_class;
993 tertiary_icode = tertiary_out_icode;
994 tertiary_mode = tertiary_out_mode;
997 if (secondary_class != NO_REGS)
999 /* Secondary reloads don't conflict as badly as the primary object
1000 being reload. Specifically, we can always treat them as
1001 being for an input or output address and hence allowed to be
1002 reused in the same manner such address components could be
1003 reused. This is used as the reload_type for our secondary
1006 enum reload_type secondary_type
1007 = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
1008 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
1011 /* This case isn't valid, so fail. Reload is allowed to use the
1012 same register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT
1013 reloads, but in the case of a secondary register, we actually
1014 need two different registers for correct code. We fail here
1015 to prevent the possibility of silently generating incorrect code
1018 The convention is that secondary input reloads are valid only if
1019 the secondary_class is different from class. If you have such
1020 a case, you can not use secondary reloads, you must work around
1021 the problem some other way. */
1023 if (type == RELOAD_FOR_INPUT && secondary_class == class)
1026 /* If we need a tertiary reload, see if we have one we can reuse
1027 or else make one. */
1029 if (tertiary_class != NO_REGS)
1031 for (tertiary_reload = 0; tertiary_reload < n_reloads;
1033 if (reload_secondary_p[tertiary_reload]
1034 && (reg_class_subset_p (tertiary_class,
1035 reload_reg_class[tertiary_reload])
1036 || reg_class_subset_p (reload_reg_class[tertiary_reload],
1038 && ((reload_inmode[tertiary_reload] == tertiary_mode)
1039 || reload_inmode[tertiary_reload] == VOIDmode)
1040 && ((reload_outmode[tertiary_reload] == tertiary_mode)
1041 || reload_outmode[tertiary_reload] == VOIDmode)
1042 && (reload_secondary_icode[tertiary_reload]
1043 == CODE_FOR_nothing)
1044 && (reg_class_size[(int) tertiary_class] == 1
1045 #ifdef SMALL_REGISTER_CLASSES
1049 && MERGABLE_RELOADS (secondary_type,
1050 reload_when_needed[tertiary_reload],
1051 opnum, reload_opnum[tertiary_reload]))
1053 if (tertiary_mode != VOIDmode)
1054 reload_inmode[tertiary_reload] = tertiary_mode;
1055 if (tertiary_out_mode != VOIDmode)
1056 reload_outmode[tertiary_reload] = tertiary_mode;
1057 if (reg_class_subset_p (tertiary_class,
1058 reload_reg_class[tertiary_reload]))
1059 reload_reg_class[tertiary_reload] = tertiary_class;
1060 if (MERGE_TO_OTHER (secondary_type,
1061 reload_when_needed[tertiary_reload],
1063 reload_opnum[tertiary_reload]))
1064 reload_when_needed[tertiary_reload] = RELOAD_OTHER;
1065 reload_opnum[tertiary_reload]
1066 = MIN (reload_opnum[tertiary_reload], opnum);
1067 reload_optional[tertiary_reload] &= optional;
1068 reload_secondary_p[tertiary_reload] = 1;
1071 if (tertiary_reload == n_reloads)
1073 /* We need to make a new tertiary reload for this register
1075 reload_in[tertiary_reload] = reload_out[tertiary_reload] = 0;
1076 reload_reg_class[tertiary_reload] = tertiary_class;
1077 reload_inmode[tertiary_reload] = tertiary_mode;
1078 reload_outmode[tertiary_reload] = tertiary_mode;
1079 reload_reg_rtx[tertiary_reload] = 0;
1080 reload_optional[tertiary_reload] = optional;
1081 reload_inc[tertiary_reload] = 0;
1082 /* Maybe we could combine these, but it seems too tricky. */
1083 reload_nocombine[tertiary_reload] = 1;
1084 reload_in_reg[tertiary_reload] = 0;
1085 reload_opnum[tertiary_reload] = opnum;
1086 reload_when_needed[tertiary_reload] = secondary_type;
1087 reload_secondary_reload[tertiary_reload] = -1;
1088 reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
1089 reload_secondary_p[tertiary_reload] = 1;
1096 /* See if we can reuse an existing secondary reload. */
1097 for (secondary_reload = 0; secondary_reload < n_reloads;
1099 if (reload_secondary_p[secondary_reload]
1100 && (reg_class_subset_p (secondary_class,
1101 reload_reg_class[secondary_reload])
1102 || reg_class_subset_p (reload_reg_class[secondary_reload],
1104 && ((reload_inmode[secondary_reload] == secondary_mode)
1105 || reload_inmode[secondary_reload] == VOIDmode)
1106 && ((reload_outmode[secondary_reload] == secondary_out_mode)
1107 || reload_outmode[secondary_reload] == VOIDmode)
1108 && reload_secondary_reload[secondary_reload] == tertiary_reload
1109 && reload_secondary_icode[secondary_reload] == tertiary_icode
1110 && (reg_class_size[(int) secondary_class] == 1
1111 #ifdef SMALL_REGISTER_CLASSES
1115 && MERGABLE_RELOADS (secondary_type,
1116 reload_when_needed[secondary_reload],
1117 opnum, reload_opnum[secondary_reload]))
1119 if (secondary_mode != VOIDmode)
1120 reload_inmode[secondary_reload] = secondary_mode;
1121 if (secondary_out_mode != VOIDmode)
1122 reload_outmode[secondary_reload] = secondary_out_mode;
1123 if (reg_class_subset_p (secondary_class,
1124 reload_reg_class[secondary_reload]))
1125 reload_reg_class[secondary_reload] = secondary_class;
1126 if (MERGE_TO_OTHER (secondary_type,
1127 reload_when_needed[secondary_reload],
1128 opnum, reload_opnum[secondary_reload]))
1129 reload_when_needed[secondary_reload] = RELOAD_OTHER;
1130 reload_opnum[secondary_reload]
1131 = MIN (reload_opnum[secondary_reload], opnum);
1132 reload_optional[secondary_reload] &= optional;
1133 reload_secondary_p[secondary_reload] = 1;
1136 if (secondary_reload == n_reloads)
1138 /* We need to make a new secondary reload for this register
1140 reload_in[secondary_reload] = reload_out[secondary_reload] = 0;
1141 reload_reg_class[secondary_reload] = secondary_class;
1142 reload_inmode[secondary_reload] = secondary_mode;
1143 reload_outmode[secondary_reload] = secondary_out_mode;
1144 reload_reg_rtx[secondary_reload] = 0;
1145 reload_optional[secondary_reload] = optional;
1146 reload_inc[secondary_reload] = 0;
1147 /* Maybe we could combine these, but it seems too tricky. */
1148 reload_nocombine[secondary_reload] = 1;
1149 reload_in_reg[secondary_reload] = 0;
1150 reload_opnum[secondary_reload] = opnum;
1151 reload_when_needed[secondary_reload] = secondary_type;
1152 reload_secondary_reload[secondary_reload] = tertiary_reload;
1153 reload_secondary_icode[secondary_reload] = tertiary_icode;
1154 reload_secondary_p[secondary_reload] = 1;
1159 #ifdef SECONDARY_MEMORY_NEEDED
1160 /* If we need a memory location to copy between the two
1161 reload regs, set it up now. */
1163 if (in != 0 && secondary_icode == CODE_FOR_nothing
1164 && SECONDARY_MEMORY_NEEDED (secondary_class, class, inmode))
1165 get_secondary_mem (in, inmode, opnum, type);
1167 if (out != 0 && secondary_icode == CODE_FOR_nothing
1168 && SECONDARY_MEMORY_NEEDED (class, secondary_class, outmode))
1169 get_secondary_mem (out, outmode, opnum, type);
1175 /* We found no existing reload suitable for re-use.
1176 So add an additional reload. */
1179 reload_out[i] = out;
1180 reload_reg_class[i] = class;
1181 reload_inmode[i] = inmode;
1182 reload_outmode[i] = outmode;
1183 reload_reg_rtx[i] = 0;
1184 reload_optional[i] = optional;
1186 reload_nocombine[i] = 0;
1187 reload_in_reg[i] = inloc ? *inloc : 0;
1188 reload_opnum[i] = opnum;
1189 reload_when_needed[i] = type;
1190 reload_secondary_reload[i] = secondary_reload;
1191 reload_secondary_icode[i] = secondary_icode;
1192 reload_secondary_p[i] = 0;
1196 #ifdef SECONDARY_MEMORY_NEEDED
1197 /* If a memory location is needed for the copy, make one. */
1198 if (in != 0 && GET_CODE (in) == REG
1199 && REGNO (in) < FIRST_PSEUDO_REGISTER
1200 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1202 get_secondary_mem (in, inmode, opnum, type);
1204 if (out != 0 && GET_CODE (out) == REG
1205 && REGNO (out) < FIRST_PSEUDO_REGISTER
1206 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1208 get_secondary_mem (out, outmode, opnum, type);
1213 /* We are reusing an existing reload,
1214 but we may have additional information for it.
1215 For example, we may now have both IN and OUT
1216 while the old one may have just one of them. */
1218 if (inmode != VOIDmode)
1219 reload_inmode[i] = inmode;
1220 if (outmode != VOIDmode)
1221 reload_outmode[i] = outmode;
1225 reload_out[i] = out;
1226 if (reg_class_subset_p (class, reload_reg_class[i]))
1227 reload_reg_class[i] = class;
1228 reload_optional[i] &= optional;
1229 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1230 opnum, reload_opnum[i]))
1231 reload_when_needed[i] = RELOAD_OTHER;
1232 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1235 /* If the ostensible rtx being reload differs from the rtx found
1236 in the location to substitute, this reload is not safe to combine
1237 because we cannot reliably tell whether it appears in the insn. */
1239 if (in != 0 && in != *inloc)
1240 reload_nocombine[i] = 1;
1243 /* This was replaced by changes in find_reloads_address_1 and the new
1244 function inc_for_reload, which go with a new meaning of reload_inc. */
1246 /* If this is an IN/OUT reload in an insn that sets the CC,
1247 it must be for an autoincrement. It doesn't work to store
1248 the incremented value after the insn because that would clobber the CC.
1249 So we must do the increment of the value reloaded from,
1250 increment it, store it back, then decrement again. */
1251 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1255 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1256 /* If we did not find a nonzero amount-to-increment-by,
1257 that contradicts the belief that IN is being incremented
1258 in an address in this insn. */
1259 if (reload_inc[i] == 0)
1264 /* If we will replace IN and OUT with the reload-reg,
1265 record where they are located so that substitution need
1266 not do a tree walk. */
1268 if (replace_reloads)
1272 register struct replacement *r = &replacements[n_replacements++];
1274 r->subreg_loc = in_subreg_loc;
1278 if (outloc != 0 && outloc != inloc)
1280 register struct replacement *r = &replacements[n_replacements++];
1283 r->subreg_loc = out_subreg_loc;
1288 /* If this reload is just being introduced and it has both
1289 an incoming quantity and an outgoing quantity that are
1290 supposed to be made to match, see if either one of the two
1291 can serve as the place to reload into.
1293 If one of them is acceptable, set reload_reg_rtx[i]
1296 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1298 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1300 reload_reg_class[i], i);
1302 /* If the outgoing register already contains the same value
1303 as the incoming one, we can dispense with loading it.
1304 The easiest way to tell the caller that is to give a phony
1305 value for the incoming operand (same as outgoing one). */
1306 if (reload_reg_rtx[i] == out
1307 && (GET_CODE (in) == REG || CONSTANT_P (in))
1308 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1309 static_reload_reg_p, i, inmode))
1313 /* If this is an input reload and the operand contains a register that
1314 dies in this insn and is used nowhere else, see if it is the right class
1315 to be used for this reload. Use it if so. (This occurs most commonly
1316 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1317 this if it is also an output reload that mentions the register unless
1318 the output is a SUBREG that clobbers an entire register.
1320 Note that the operand might be one of the spill regs, if it is a
1321 pseudo reg and we are in a block where spilling has not taken place.
1322 But if there is no spilling in this block, that is OK.
1323 An explicitly used hard reg cannot be a spill reg. */
1325 if (reload_reg_rtx[i] == 0 && in != 0)
1330 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1331 if (REG_NOTE_KIND (note) == REG_DEAD
1332 && GET_CODE (XEXP (note, 0)) == REG
1333 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1334 && reg_mentioned_p (XEXP (note, 0), in)
1335 && ! refers_to_regno_for_reload_p (regno,
1337 + HARD_REGNO_NREGS (regno,
1339 PATTERN (this_insn), inloc)
1340 /* If this is also an output reload, IN cannot be used as
1341 the reload register if it is set in this insn unless IN
1343 && (out == 0 || in == out
1344 || ! hard_reg_set_here_p (regno,
1346 + HARD_REGNO_NREGS (regno,
1348 PATTERN (this_insn)))
1349 /* ??? Why is this code so different from the previous?
1350 Is there any simple coherent way to describe the two together?
1351 What's going on here. */
1353 || (GET_CODE (in) == SUBREG
1354 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1356 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1357 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1358 /* Make sure the operand fits in the reg that dies. */
1359 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1360 && HARD_REGNO_MODE_OK (regno, inmode)
1361 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1362 && HARD_REGNO_MODE_OK (regno, outmode)
1363 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1364 && !fixed_regs[regno])
1366 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1372 output_reloadnum = i;
1377 /* Record an additional place we must replace a value
1378 for which we have already recorded a reload.
1379 RELOADNUM is the value returned by push_reload
1380 when the reload was recorded.
1381 This is used in insn patterns that use match_dup. */
1384 push_replacement (loc, reloadnum, mode)
1387 enum machine_mode mode;
1389 if (replace_reloads)
1391 register struct replacement *r = &replacements[n_replacements++];
1392 r->what = reloadnum;
1399 /* Transfer all replacements that used to be in reload FROM to be in
1403 transfer_replacements (to, from)
1408 for (i = 0; i < n_replacements; i++)
1409 if (replacements[i].what == from)
1410 replacements[i].what = to;
1413 /* If there is only one output reload, and it is not for an earlyclobber
1414 operand, try to combine it with a (logically unrelated) input reload
1415 to reduce the number of reload registers needed.
1417 This is safe if the input reload does not appear in
1418 the value being output-reloaded, because this implies
1419 it is not needed any more once the original insn completes.
1421 If that doesn't work, see we can use any of the registers that
1422 die in this insn as a reload register. We can if it is of the right
1423 class and does not appear in the value being output-reloaded. */
1429 int output_reload = -1;
1432 /* Find the output reload; return unless there is exactly one
1433 and that one is mandatory. */
1435 for (i = 0; i < n_reloads; i++)
1436 if (reload_out[i] != 0)
1438 if (output_reload >= 0)
1443 if (output_reload < 0 || reload_optional[output_reload])
1446 /* An input-output reload isn't combinable. */
1448 if (reload_in[output_reload] != 0)
1451 /* If this reload is for an earlyclobber operand, we can't do anything. */
1452 if (earlyclobber_operand_p (reload_out[output_reload]))
1455 /* Check each input reload; can we combine it? */
1457 for (i = 0; i < n_reloads; i++)
1458 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1459 /* Life span of this reload must not extend past main insn. */
1460 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1461 && reload_when_needed[i] != RELOAD_OTHER
1462 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1463 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1464 reload_outmode[output_reload]))
1465 && reload_inc[i] == 0
1466 && reload_reg_rtx[i] == 0
1467 /* Don't combine two reloads with different secondary reloads. */
1468 && (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
1469 || reload_secondary_reload[i] == -1
1470 || reload_secondary_reload[output_reload] == -1)
1471 #ifdef SECONDARY_MEMORY_NEEDED
1472 /* Likewise for different secondary memory locations. */
1473 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1474 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1475 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1476 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1478 #ifdef SMALL_REGISTER_CLASSES
1479 && reload_reg_class[i] == reload_reg_class[output_reload]
1481 && (reg_class_subset_p (reload_reg_class[i],
1482 reload_reg_class[output_reload])
1483 || reg_class_subset_p (reload_reg_class[output_reload],
1484 reload_reg_class[i]))
1486 && (MATCHES (reload_in[i], reload_out[output_reload])
1487 /* Args reversed because the first arg seems to be
1488 the one that we imagine being modified
1489 while the second is the one that might be affected. */
1490 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1492 /* However, if the input is a register that appears inside
1493 the output, then we also can't share.
1494 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1495 If the same reload reg is used for both reg 69 and the
1496 result to be stored in memory, then that result
1497 will clobber the address of the memory ref. */
1498 && ! (GET_CODE (reload_in[i]) == REG
1499 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1500 reload_out[output_reload]))))
1501 && (reg_class_size[(int) reload_reg_class[i]]
1502 #ifdef SMALL_REGISTER_CLASSES
1506 /* We will allow making things slightly worse by combining an
1507 input and an output, but no worse than that. */
1508 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1509 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1513 /* We have found a reload to combine with! */
1514 reload_out[i] = reload_out[output_reload];
1515 reload_outmode[i] = reload_outmode[output_reload];
1516 /* Mark the old output reload as inoperative. */
1517 reload_out[output_reload] = 0;
1518 /* The combined reload is needed for the entire insn. */
1519 reload_when_needed[i] = RELOAD_OTHER;
1520 /* If the output reload had a secondary reload, copy it. */
1521 if (reload_secondary_reload[output_reload] != -1)
1522 reload_secondary_reload[i] = reload_secondary_reload[output_reload];
1523 #ifdef SECONDARY_MEMORY_NEEDED
1524 /* Copy any secondary MEM. */
1525 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1526 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1527 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1529 /* If required, minimize the register class. */
1530 if (reg_class_subset_p (reload_reg_class[output_reload],
1531 reload_reg_class[i]))
1532 reload_reg_class[i] = reload_reg_class[output_reload];
1534 /* Transfer all replacements from the old reload to the combined. */
1535 for (j = 0; j < n_replacements; j++)
1536 if (replacements[j].what == output_reload)
1537 replacements[j].what = i;
1542 /* If this insn has only one operand that is modified or written (assumed
1543 to be the first), it must be the one corresponding to this reload. It
1544 is safe to use anything that dies in this insn for that output provided
1545 that it does not occur in the output (we already know it isn't an
1546 earlyclobber. If this is an asm insn, give up. */
1548 if (INSN_CODE (this_insn) == -1)
1551 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1552 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1553 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1556 /* See if some hard register that dies in this insn and is not used in
1557 the output is the right class. Only works if the register we pick
1558 up can fully hold our output reload. */
1559 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1560 if (REG_NOTE_KIND (note) == REG_DEAD
1561 && GET_CODE (XEXP (note, 0)) == REG
1562 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1563 reload_out[output_reload])
1564 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1565 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1566 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1567 REGNO (XEXP (note, 0)))
1568 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1569 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1570 && ! fixed_regs[REGNO (XEXP (note, 0))])
1572 reload_reg_rtx[output_reload] = gen_rtx (REG,
1573 reload_outmode[output_reload],
1574 REGNO (XEXP (note, 0)));
1579 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1580 See if one of IN and OUT is a register that may be used;
1581 this is desirable since a spill-register won't be needed.
1582 If so, return the register rtx that proves acceptable.
1584 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1585 CLASS is the register class required for the reload.
1587 If FOR_REAL is >= 0, it is the number of the reload,
1588 and in some cases when it can be discovered that OUT doesn't need
1589 to be computed, clear out reload_out[FOR_REAL].
1591 If FOR_REAL is -1, this should not be done, because this call
1592 is just to see if a register can be found, not to find and install it. */
1595 find_dummy_reload (real_in, real_out, inloc, outloc,
1596 inmode, outmode, class, for_real)
1597 rtx real_in, real_out;
1598 rtx *inloc, *outloc;
1599 enum machine_mode inmode, outmode;
1600 enum reg_class class;
1609 /* If operands exceed a word, we can't use either of them
1610 unless they have the same size. */
1611 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1612 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1613 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1616 /* Find the inside of any subregs. */
1617 while (GET_CODE (out) == SUBREG)
1619 out_offset = SUBREG_WORD (out);
1620 out = SUBREG_REG (out);
1622 while (GET_CODE (in) == SUBREG)
1624 in_offset = SUBREG_WORD (in);
1625 in = SUBREG_REG (in);
1628 /* Narrow down the reg class, the same way push_reload will;
1629 otherwise we might find a dummy now, but push_reload won't. */
1630 class = PREFERRED_RELOAD_CLASS (in, class);
1632 /* See if OUT will do. */
1633 if (GET_CODE (out) == REG
1634 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1636 register int regno = REGNO (out) + out_offset;
1637 int nwords = HARD_REGNO_NREGS (regno, outmode);
1640 /* When we consider whether the insn uses OUT,
1641 ignore references within IN. They don't prevent us
1642 from copying IN into OUT, because those refs would
1643 move into the insn that reloads IN.
1645 However, we only ignore IN in its role as this reload.
1646 If the insn uses IN elsewhere and it contains OUT,
1647 that counts. We can't be sure it's the "same" operand
1648 so it might not go through this reload. */
1650 *inloc = const0_rtx;
1652 if (regno < FIRST_PSEUDO_REGISTER
1653 /* A fixed reg that can overlap other regs better not be used
1654 for reloading in any way. */
1655 #ifdef OVERLAPPING_REGNO_P
1656 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1658 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1659 PATTERN (this_insn), outloc))
1662 for (i = 0; i < nwords; i++)
1663 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1669 if (GET_CODE (real_out) == REG)
1672 value = gen_rtx (REG, outmode, regno);
1679 /* Consider using IN if OUT was not acceptable
1680 or if OUT dies in this insn (like the quotient in a divmod insn).
1681 We can't use IN unless it is dies in this insn,
1682 which means we must know accurately which hard regs are live.
1683 Also, the result can't go in IN if IN is used within OUT. */
1684 if (hard_regs_live_known
1685 && GET_CODE (in) == REG
1686 && REGNO (in) < FIRST_PSEUDO_REGISTER
1688 || find_reg_note (this_insn, REG_UNUSED, real_out))
1689 && find_reg_note (this_insn, REG_DEAD, real_in)
1690 && !fixed_regs[REGNO (in)]
1691 && HARD_REGNO_MODE_OK (REGNO (in),
1692 /* The only case where out and real_out might
1693 have different modes is where real_out
1694 is a subreg, and in that case, out
1696 (GET_MODE (out) != VOIDmode
1697 ? GET_MODE (out) : outmode)))
1699 register int regno = REGNO (in) + in_offset;
1700 int nwords = HARD_REGNO_NREGS (regno, inmode);
1702 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1703 && ! hard_reg_set_here_p (regno, regno + nwords,
1704 PATTERN (this_insn)))
1707 for (i = 0; i < nwords; i++)
1708 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1714 /* If we were going to use OUT as the reload reg
1715 and changed our mind, it means OUT is a dummy that
1716 dies here. So don't bother copying value to it. */
1717 if (for_real >= 0 && value == real_out)
1718 reload_out[for_real] = 0;
1719 if (GET_CODE (real_in) == REG)
1722 value = gen_rtx (REG, inmode, regno);
1730 /* This page contains subroutines used mainly for determining
1731 whether the IN or an OUT of a reload can serve as the
1734 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1737 earlyclobber_operand_p (x)
1742 for (i = 0; i < n_earlyclobbers; i++)
1743 if (reload_earlyclobbers[i] == x)
1749 /* Return 1 if expression X alters a hard reg in the range
1750 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1751 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1752 X should be the body of an instruction. */
1755 hard_reg_set_here_p (beg_regno, end_regno, x)
1756 register int beg_regno, end_regno;
1759 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1761 register rtx op0 = SET_DEST (x);
1762 while (GET_CODE (op0) == SUBREG)
1763 op0 = SUBREG_REG (op0);
1764 if (GET_CODE (op0) == REG)
1766 register int r = REGNO (op0);
1767 /* See if this reg overlaps range under consideration. */
1769 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1773 else if (GET_CODE (x) == PARALLEL)
1775 register int i = XVECLEN (x, 0) - 1;
1777 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1784 /* Return 1 if ADDR is a valid memory address for mode MODE,
1785 and check that each pseudo reg has the proper kind of
1789 strict_memory_address_p (mode, addr)
1790 enum machine_mode mode;
1793 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1800 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1801 if they are the same hard reg, and has special hacks for
1802 autoincrement and autodecrement.
1803 This is specifically intended for find_reloads to use
1804 in determining whether two operands match.
1805 X is the operand whose number is the lower of the two.
1807 The value is 2 if Y contains a pre-increment that matches
1808 a non-incrementing address in X. */
1810 /* ??? To be completely correct, we should arrange to pass
1811 for X the output operand and for Y the input operand.
1812 For now, we assume that the output operand has the lower number
1813 because that is natural in (SET output (... input ...)). */
1816 operands_match_p (x, y)
1820 register RTX_CODE code = GET_CODE (x);
1826 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1827 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1828 && GET_CODE (SUBREG_REG (y)) == REG)))
1834 i = REGNO (SUBREG_REG (x));
1835 if (i >= FIRST_PSEUDO_REGISTER)
1837 i += SUBREG_WORD (x);
1842 if (GET_CODE (y) == SUBREG)
1844 j = REGNO (SUBREG_REG (y));
1845 if (j >= FIRST_PSEUDO_REGISTER)
1847 j += SUBREG_WORD (y);
1852 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1853 multiple hard register group, so that for example (reg:DI 0) and
1854 (reg:SI 1) will be considered the same register. */
1855 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1856 && i < FIRST_PSEUDO_REGISTER)
1857 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1858 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1859 && j < FIRST_PSEUDO_REGISTER)
1860 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1864 /* If two operands must match, because they are really a single
1865 operand of an assembler insn, then two postincrements are invalid
1866 because the assembler insn would increment only once.
1867 On the other hand, an postincrement matches ordinary indexing
1868 if the postincrement is the output operand. */
1869 if (code == POST_DEC || code == POST_INC)
1870 return operands_match_p (XEXP (x, 0), y);
1871 /* Two preincrements are invalid
1872 because the assembler insn would increment only once.
1873 On the other hand, an preincrement matches ordinary indexing
1874 if the preincrement is the input operand.
1875 In this case, return 2, since some callers need to do special
1876 things when this happens. */
1877 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1878 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1882 /* Now we have disposed of all the cases
1883 in which different rtx codes can match. */
1884 if (code != GET_CODE (y))
1886 if (code == LABEL_REF)
1887 return XEXP (x, 0) == XEXP (y, 0);
1888 if (code == SYMBOL_REF)
1889 return XSTR (x, 0) == XSTR (y, 0);
1891 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1893 if (GET_MODE (x) != GET_MODE (y))
1896 /* Compare the elements. If any pair of corresponding elements
1897 fail to match, return 0 for the whole things. */
1900 fmt = GET_RTX_FORMAT (code);
1901 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1907 if (XWINT (x, i) != XWINT (y, i))
1912 if (XINT (x, i) != XINT (y, i))
1917 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1920 /* If any subexpression returns 2,
1921 we should return 2 if we are successful. */
1929 /* It is believed that rtx's at this level will never
1930 contain anything but integers and other rtx's,
1931 except for within LABEL_REFs and SYMBOL_REFs. */
1936 return 1 + success_2;
1939 /* Return the number of times character C occurs in string S. */
1942 n_occurrences (c, s)
1952 /* Describe the range of registers or memory referenced by X.
1953 If X is a register, set REG_FLAG and put the first register
1954 number into START and the last plus one into END.
1955 If X is a memory reference, put a base address into BASE
1956 and a range of integer offsets into START and END.
1957 If X is pushing on the stack, we can assume it causes no trouble,
1958 so we set the SAFE field. */
1960 static struct decomposition
1964 struct decomposition val;
1969 if (GET_CODE (x) == MEM)
1971 rtx base, offset = 0;
1972 rtx addr = XEXP (x, 0);
1974 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1975 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1977 val.base = XEXP (addr, 0);
1978 val.start = - GET_MODE_SIZE (GET_MODE (x));
1979 val.end = GET_MODE_SIZE (GET_MODE (x));
1980 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1984 if (GET_CODE (addr) == CONST)
1986 addr = XEXP (addr, 0);
1989 if (GET_CODE (addr) == PLUS)
1991 if (CONSTANT_P (XEXP (addr, 0)))
1993 base = XEXP (addr, 1);
1994 offset = XEXP (addr, 0);
1996 else if (CONSTANT_P (XEXP (addr, 1)))
1998 base = XEXP (addr, 0);
1999 offset = XEXP (addr, 1);
2006 offset = const0_rtx;
2008 if (GET_CODE (offset) == CONST)
2009 offset = XEXP (offset, 0);
2010 if (GET_CODE (offset) == PLUS)
2012 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2014 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
2015 offset = XEXP (offset, 0);
2017 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2019 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
2020 offset = XEXP (offset, 1);
2024 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2025 offset = const0_rtx;
2028 else if (GET_CODE (offset) != CONST_INT)
2030 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2031 offset = const0_rtx;
2034 if (all_const && GET_CODE (base) == PLUS)
2035 base = gen_rtx (CONST, GET_MODE (base), base);
2037 if (GET_CODE (offset) != CONST_INT)
2040 val.start = INTVAL (offset);
2041 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2045 else if (GET_CODE (x) == REG)
2048 val.start = true_regnum (x);
2051 /* A pseudo with no hard reg. */
2052 val.start = REGNO (x);
2053 val.end = val.start + 1;
2057 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2059 else if (GET_CODE (x) == SUBREG)
2061 if (GET_CODE (SUBREG_REG (x)) != REG)
2062 /* This could be more precise, but it's good enough. */
2063 return decompose (SUBREG_REG (x));
2065 val.start = true_regnum (x);
2067 return decompose (SUBREG_REG (x));
2070 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2072 else if (CONSTANT_P (x)
2073 /* This hasn't been assigned yet, so it can't conflict yet. */
2074 || GET_CODE (x) == SCRATCH)
2081 /* Return 1 if altering Y will not modify the value of X.
2082 Y is also described by YDATA, which should be decompose (Y). */
2085 immune_p (x, y, ydata)
2087 struct decomposition ydata;
2089 struct decomposition xdata;
2092 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2096 if (GET_CODE (y) != MEM)
2098 /* If Y is memory and X is not, Y can't affect X. */
2099 if (GET_CODE (x) != MEM)
2102 xdata = decompose (x);
2104 if (! rtx_equal_p (xdata.base, ydata.base))
2106 /* If bases are distinct symbolic constants, there is no overlap. */
2107 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2109 /* Constants and stack slots never overlap. */
2110 if (CONSTANT_P (xdata.base)
2111 && (ydata.base == frame_pointer_rtx
2112 || ydata.base == hard_frame_pointer_rtx
2113 || ydata.base == stack_pointer_rtx))
2115 if (CONSTANT_P (ydata.base)
2116 && (xdata.base == frame_pointer_rtx
2117 || xdata.base == hard_frame_pointer_rtx
2118 || xdata.base == stack_pointer_rtx))
2120 /* If either base is variable, we don't know anything. */
2125 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2128 /* Similar, but calls decompose. */
2131 safe_from_earlyclobber (op, clobber)
2134 struct decomposition early_data;
2136 early_data = decompose (clobber);
2137 return immune_p (op, clobber, early_data);
2140 /* Main entry point of this file: search the body of INSN
2141 for values that need reloading and record them with push_reload.
2142 REPLACE nonzero means record also where the values occur
2143 so that subst_reloads can be used.
2145 IND_LEVELS says how many levels of indirection are supported by this
2146 machine; a value of zero means that a memory reference is not a valid
2149 LIVE_KNOWN says we have valid information about which hard
2150 regs are live at each point in the program; this is true when
2151 we are called from global_alloc but false when stupid register
2152 allocation has been done.
2154 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2155 which is nonnegative if the reg has been commandeered for reloading into.
2156 It is copied into STATIC_RELOAD_REG_P and referenced from there
2157 by various subroutines. */
2160 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2162 int replace, ind_levels;
2164 short *reload_reg_p;
2166 #ifdef REGISTER_CONSTRAINTS
2168 register int insn_code_number;
2171 /* These are the constraints for the insn. We don't change them. */
2172 char *constraints1[MAX_RECOG_OPERANDS];
2173 /* These start out as the constraints for the insn
2174 and they are chewed up as we consider alternatives. */
2175 char *constraints[MAX_RECOG_OPERANDS];
2176 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2178 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2179 char pref_or_nothing[MAX_RECOG_OPERANDS];
2180 /* Nonzero for a MEM operand whose entire address needs a reload. */
2181 int address_reloaded[MAX_RECOG_OPERANDS];
2182 /* Value of enum reload_type to use for operand. */
2183 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2184 /* Value of enum reload_type to use within address of operand. */
2185 enum reload_type address_type[MAX_RECOG_OPERANDS];
2186 /* Save the usage of each operand. */
2187 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2188 int no_input_reloads = 0, no_output_reloads = 0;
2190 int this_alternative[MAX_RECOG_OPERANDS];
2191 char this_alternative_win[MAX_RECOG_OPERANDS];
2192 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2193 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2194 int this_alternative_matches[MAX_RECOG_OPERANDS];
2196 int goal_alternative[MAX_RECOG_OPERANDS];
2197 int this_alternative_number;
2198 int goal_alternative_number;
2199 int operand_reloadnum[MAX_RECOG_OPERANDS];
2200 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2201 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2202 char goal_alternative_win[MAX_RECOG_OPERANDS];
2203 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2204 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2205 int goal_alternative_swapped;
2208 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2209 rtx substed_operand[MAX_RECOG_OPERANDS];
2210 rtx body = PATTERN (insn);
2211 rtx set = single_set (insn);
2212 int goal_earlyclobber, this_earlyclobber;
2213 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2216 this_insn_is_asm = 0; /* Tentative. */
2220 n_earlyclobbers = 0;
2221 replace_reloads = replace;
2222 hard_regs_live_known = live_known;
2223 static_reload_reg_p = reload_reg_p;
2225 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2226 neither are insns that SET cc0. Insns that use CC0 are not allowed
2227 to have any input reloads. */
2228 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2229 no_output_reloads = 1;
2232 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2233 no_input_reloads = 1;
2234 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2235 no_output_reloads = 1;
2238 #ifdef SECONDARY_MEMORY_NEEDED
2239 /* The eliminated forms of any secondary memory locations are per-insn, so
2240 clear them out here. */
2242 bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2245 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2246 Make OPERANDS point to a vector of operand values.
2247 Make OPERAND_LOCS point to a vector of pointers to
2248 where the operands were found.
2249 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2250 constraint-strings for this insn.
2251 Return if the insn needs no reload processing. */
2253 switch (GET_CODE (body))
2263 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2264 is cheap to move between them. If it is not, there may not be an insn
2265 to do the copy, so we may need a reload. */
2266 if (GET_CODE (SET_DEST (body)) == REG
2267 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2268 && GET_CODE (SET_SRC (body)) == REG
2269 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2270 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2271 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2275 reload_n_operands = noperands = asm_noperands (body);
2278 /* This insn is an `asm' with operands. */
2280 insn_code_number = -1;
2281 this_insn_is_asm = 1;
2283 /* expand_asm_operands makes sure there aren't too many operands. */
2284 if (noperands > MAX_RECOG_OPERANDS)
2287 /* Now get the operand values and constraints out of the insn. */
2289 decode_asm_operands (body, recog_operand, recog_operand_loc,
2290 constraints, operand_mode);
2293 bcopy (constraints, constraints1, noperands * sizeof (char *));
2294 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2295 for (i = 1; i < noperands; i++)
2296 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2298 error_for_asm (insn, "operand constraints differ in number of alternatives");
2299 /* Avoid further trouble with this insn. */
2300 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2309 /* Ordinary insn: recognize it, get the operands via insn_extract
2310 and get the constraints. */
2312 insn_code_number = recog_memoized (insn);
2313 if (insn_code_number < 0)
2314 fatal_insn_not_found (insn);
2316 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2317 n_alternatives = insn_n_alternatives[insn_code_number];
2318 /* Just return "no reloads" if insn has no operands with constraints. */
2319 if (n_alternatives == 0)
2321 insn_extract (insn);
2322 for (i = 0; i < noperands; i++)
2324 constraints[i] = constraints1[i]
2325 = insn_operand_constraint[insn_code_number][i];
2326 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2335 /* If we will need to know, later, whether some pair of operands
2336 are the same, we must compare them now and save the result.
2337 Reloading the base and index registers will clobber them
2338 and afterward they will fail to match. */
2340 for (i = 0; i < noperands; i++)
2345 substed_operand[i] = recog_operand[i];
2348 modified[i] = RELOAD_READ;
2350 /* Scan this operand's constraint to see if it is an output operand,
2351 an in-out operand, is commutative, or should match another. */
2356 modified[i] = RELOAD_WRITE;
2358 modified[i] = RELOAD_READ_WRITE;
2361 /* The last operand should not be marked commutative. */
2362 if (i == noperands - 1)
2364 if (this_insn_is_asm)
2365 warning_for_asm (this_insn,
2366 "`%%' constraint used with last operand");
2373 else if (c >= '0' && c <= '9')
2376 operands_match[c][i]
2377 = operands_match_p (recog_operand[c], recog_operand[i]);
2379 /* An operand may not match itself. */
2382 if (this_insn_is_asm)
2383 warning_for_asm (this_insn,
2384 "operand %d has constraint %d", i, c);
2389 /* If C can be commuted with C+1, and C might need to match I,
2390 then C+1 might also need to match I. */
2391 if (commutative >= 0)
2393 if (c == commutative || c == commutative + 1)
2395 int other = c + (c == commutative ? 1 : -1);
2396 operands_match[other][i]
2397 = operands_match_p (recog_operand[other], recog_operand[i]);
2399 if (i == commutative || i == commutative + 1)
2401 int other = i + (i == commutative ? 1 : -1);
2402 operands_match[c][other]
2403 = operands_match_p (recog_operand[c], recog_operand[other]);
2405 /* Note that C is supposed to be less than I.
2406 No need to consider altering both C and I because in
2407 that case we would alter one into the other. */
2413 /* Examine each operand that is a memory reference or memory address
2414 and reload parts of the addresses into index registers.
2415 Also here any references to pseudo regs that didn't get hard regs
2416 but are equivalent to constants get replaced in the insn itself
2417 with those constants. Nobody will ever see them again.
2419 Finally, set up the preferred classes of each operand. */
2421 for (i = 0; i < noperands; i++)
2423 register RTX_CODE code = GET_CODE (recog_operand[i]);
2425 address_reloaded[i] = 0;
2426 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2427 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2430 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2431 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2434 if (*constraints[i] == 0)
2435 /* Ignore things like match_operator operands. */
2437 else if (constraints[i][0] == 'p')
2439 find_reloads_address (VOIDmode, NULL_PTR,
2440 recog_operand[i], recog_operand_loc[i],
2441 i, operand_type[i], ind_levels);
2442 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2444 else if (code == MEM)
2446 if (find_reloads_address (GET_MODE (recog_operand[i]),
2447 recog_operand_loc[i],
2448 XEXP (recog_operand[i], 0),
2449 &XEXP (recog_operand[i], 0),
2450 i, address_type[i], ind_levels))
2451 address_reloaded[i] = 1;
2452 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2454 else if (code == SUBREG)
2455 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2456 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2459 && &SET_DEST (set) == recog_operand_loc[i]);
2460 else if (code == PLUS)
2461 /* We can get a PLUS as an "operand" as a result of
2462 register elimination. See eliminate_regs and gen_input_reload. */
2463 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2464 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2466 else if (code == REG)
2468 /* This is equivalent to calling find_reloads_toplev.
2469 The code is duplicated for speed.
2470 When we find a pseudo always equivalent to a constant,
2471 we replace it by the constant. We must be sure, however,
2472 that we don't try to replace it in the insn in which it
2474 register int regno = REGNO (recog_operand[i]);
2475 if (reg_equiv_constant[regno] != 0
2476 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2477 substed_operand[i] = recog_operand[i]
2478 = reg_equiv_constant[regno];
2479 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2480 that feeds this insn. */
2481 if (reg_equiv_mem[regno] != 0)
2482 substed_operand[i] = recog_operand[i]
2483 = reg_equiv_mem[regno];
2485 if (reg_equiv_address[regno] != 0)
2487 /* If reg_equiv_address is not a constant address, copy it,
2488 since it may be shared. */
2489 rtx address = reg_equiv_address[regno];
2491 if (rtx_varies_p (address))
2492 address = copy_rtx (address);
2494 /* If this is an output operand, we must output a CLOBBER
2495 after INSN so find_equiv_reg knows REGNO is being written.
2496 Mark this insn specially, do we can put our output reloads
2499 if (modified[i] != RELOAD_READ)
2500 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2505 *recog_operand_loc[i] = recog_operand[i]
2506 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2507 RTX_UNCHANGING_P (recog_operand[i])
2508 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2509 find_reloads_address (GET_MODE (recog_operand[i]),
2510 recog_operand_loc[i],
2511 XEXP (recog_operand[i], 0),
2512 &XEXP (recog_operand[i], 0),
2513 i, address_type[i], ind_levels);
2514 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2517 /* If the operand is still a register (we didn't replace it with an
2518 equivalent), get the preferred class to reload it into. */
2519 code = GET_CODE (recog_operand[i]);
2521 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2522 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2524 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2525 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2528 /* If this is simply a copy from operand 1 to operand 0, merge the
2529 preferred classes for the operands. */
2530 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2531 && recog_operand[1] == SET_SRC (set))
2533 preferred_class[0] = preferred_class[1]
2534 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2535 pref_or_nothing[0] |= pref_or_nothing[1];
2536 pref_or_nothing[1] |= pref_or_nothing[0];
2539 /* Now see what we need for pseudo-regs that didn't get hard regs
2540 or got the wrong kind of hard reg. For this, we must consider
2541 all the operands together against the register constraints. */
2543 best = MAX_RECOG_OPERANDS + 300;
2546 goal_alternative_swapped = 0;
2549 /* The constraints are made of several alternatives.
2550 Each operand's constraint looks like foo,bar,... with commas
2551 separating the alternatives. The first alternatives for all
2552 operands go together, the second alternatives go together, etc.
2554 First loop over alternatives. */
2556 for (this_alternative_number = 0;
2557 this_alternative_number < n_alternatives;
2558 this_alternative_number++)
2560 /* Loop over operands for one constraint alternative. */
2561 /* LOSERS counts those that don't fit this alternative
2562 and would require loading. */
2564 /* BAD is set to 1 if it some operand can't fit this alternative
2565 even after reloading. */
2567 /* REJECT is a count of how undesirable this alternative says it is
2568 if any reloading is required. If the alternative matches exactly
2569 then REJECT is ignored, but otherwise it gets this much
2570 counted against it in addition to the reloading needed. Each
2571 ? counts three times here since we want the disparaging caused by
2572 a bad register class to only count 1/3 as much. */
2575 this_earlyclobber = 0;
2577 for (i = 0; i < noperands; i++)
2579 register char *p = constraints[i];
2580 register int win = 0;
2581 /* 0 => this operand can be reloaded somehow for this alternative */
2583 /* 0 => this operand can be reloaded if the alternative allows regs. */
2586 register rtx operand = recog_operand[i];
2588 /* Nonzero means this is a MEM that must be reloaded into a reg
2589 regardless of what the constraint says. */
2590 int force_reload = 0;
2592 int earlyclobber = 0;
2594 /* If the operand is a SUBREG, extract
2595 the REG or MEM (or maybe even a constant) within.
2596 (Constants can occur as a result of reg_equiv_constant.) */
2598 while (GET_CODE (operand) == SUBREG)
2600 offset += SUBREG_WORD (operand);
2601 operand = SUBREG_REG (operand);
2602 /* Force reload if this is a constant or if there may may
2603 be a problem accessing OPERAND in the outer mode. */
2604 if (CONSTANT_P (operand)
2605 #ifdef LOAD_EXTEND_OP
2606 /* If we have a SUBREG where both the inner and outer
2607 modes are different size but no wider than a word,
2608 combine.c has made assumptions about the behavior of
2609 the machine in such register access. If the data is,
2610 in fact, in memory we must always load using the size
2611 assumed to be in the register and let the insn do the
2612 different-sized accesses. */
2613 || ((GET_CODE (operand) == MEM
2614 || (GET_CODE (operand)== REG
2615 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2616 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2617 && GET_MODE_SIZE (GET_MODE (operand)) <= UNITS_PER_WORD
2618 && (GET_MODE_SIZE (operand_mode[i])
2619 != GET_MODE_SIZE (GET_MODE (operand))))
2621 /* Subreg of a hard reg which can't handle the subreg's mode
2622 or which would handle that mode in the wrong number of
2623 registers for subregging to work. */
2624 || (GET_CODE (operand) == REG
2625 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2626 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2627 && (GET_MODE_SIZE (GET_MODE (operand))
2629 && ((GET_MODE_SIZE (GET_MODE (operand))
2631 != HARD_REGNO_NREGS (REGNO (operand),
2632 GET_MODE (operand))))
2633 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2638 this_alternative[i] = (int) NO_REGS;
2639 this_alternative_win[i] = 0;
2640 this_alternative_offmemok[i] = 0;
2641 this_alternative_earlyclobber[i] = 0;
2642 this_alternative_matches[i] = -1;
2644 /* An empty constraint or empty alternative
2645 allows anything which matched the pattern. */
2646 if (*p == 0 || *p == ',')
2649 /* Scan this alternative's specs for this operand;
2650 set WIN if the operand fits any letter in this alternative.
2651 Otherwise, clear BADOP if this operand could
2652 fit some letter after reloads,
2653 or set WINREG if this operand could fit after reloads
2654 provided the constraint allows some registers. */
2656 while (*p && (c = *p++) != ',')
2665 /* The last operand should not be marked commutative. */
2666 if (i != noperands - 1)
2679 /* Ignore rest of this alternative as far as
2680 reloading is concerned. */
2681 while (*p && *p != ',') p++;
2690 this_alternative_matches[i] = c;
2691 /* We are supposed to match a previous operand.
2692 If we do, we win if that one did.
2693 If we do not, count both of the operands as losers.
2694 (This is too conservative, since most of the time
2695 only a single reload insn will be needed to make
2696 the two operands win. As a result, this alternative
2697 may be rejected when it is actually desirable.) */
2698 if ((swapped && (c != commutative || i != commutative + 1))
2699 /* If we are matching as if two operands were swapped,
2700 also pretend that operands_match had been computed
2702 But if I is the second of those and C is the first,
2703 don't exchange them, because operands_match is valid
2704 only on one side of its diagonal. */
2706 [(c == commutative || c == commutative + 1)
2707 ? 2*commutative + 1 - c : c]
2708 [(i == commutative || i == commutative + 1)
2709 ? 2*commutative + 1 - i : i])
2710 : operands_match[c][i])
2711 win = this_alternative_win[c];
2714 /* Operands don't match. */
2716 /* Retroactively mark the operand we had to match
2717 as a loser, if it wasn't already. */
2718 if (this_alternative_win[c])
2720 this_alternative_win[c] = 0;
2721 if (this_alternative[c] == (int) NO_REGS)
2723 /* But count the pair only once in the total badness of
2724 this alternative, if the pair can be a dummy reload. */
2726 = find_dummy_reload (recog_operand[i], recog_operand[c],
2727 recog_operand_loc[i], recog_operand_loc[c],
2728 operand_mode[i], operand_mode[c],
2729 this_alternative[c], -1);
2734 /* This can be fixed with reloads if the operand
2735 we are supposed to match can be fixed with reloads. */
2737 this_alternative[i] = this_alternative[c];
2739 /* If we have to reload this operand and some previous
2740 operand also had to match the same thing as this
2741 operand, we don't know how to do that. So reject this
2743 if (! win || force_reload)
2744 for (j = 0; j < i; j++)
2745 if (this_alternative_matches[j]
2746 == this_alternative_matches[i])
2752 /* All necessary reloads for an address_operand
2753 were handled in find_reloads_address. */
2754 this_alternative[i] = (int) ALL_REGS;
2761 if (GET_CODE (operand) == MEM
2762 || (GET_CODE (operand) == REG
2763 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2764 && reg_renumber[REGNO (operand)] < 0))
2766 if (CONSTANT_P (operand))
2771 if (GET_CODE (operand) == MEM
2772 && ! address_reloaded[i]
2773 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2774 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2779 if (GET_CODE (operand) == MEM
2780 && ! address_reloaded[i]
2781 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2782 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2786 /* Memory operand whose address is not offsettable. */
2790 if (GET_CODE (operand) == MEM
2791 && ! (ind_levels ? offsettable_memref_p (operand)
2792 : offsettable_nonstrict_memref_p (operand))
2793 /* Certain mem addresses will become offsettable
2794 after they themselves are reloaded. This is important;
2795 we don't want our own handling of unoffsettables
2796 to override the handling of reg_equiv_address. */
2797 && !(GET_CODE (XEXP (operand, 0)) == REG
2799 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2803 /* Memory operand whose address is offsettable. */
2807 if ((GET_CODE (operand) == MEM
2808 /* If IND_LEVELS, find_reloads_address won't reload a
2809 pseudo that didn't get a hard reg, so we have to
2810 reject that case. */
2811 && (ind_levels ? offsettable_memref_p (operand)
2812 : offsettable_nonstrict_memref_p (operand)))
2813 /* Certain mem addresses will become offsettable
2814 after they themselves are reloaded. This is important;
2815 we don't want our own handling of unoffsettables
2816 to override the handling of reg_equiv_address. */
2817 || (GET_CODE (operand) == MEM
2818 && GET_CODE (XEXP (operand, 0)) == REG
2820 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2821 || (GET_CODE (operand) == REG
2822 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2823 && reg_renumber[REGNO (operand)] < 0))
2825 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2831 /* Output operand that is stored before the need for the
2832 input operands (and their index registers) is over. */
2833 earlyclobber = 1, this_earlyclobber = 1;
2837 /* Match any floating double constant, but only if
2838 we can examine the bits of it reliably. */
2839 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2840 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2841 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2843 if (GET_CODE (operand) == CONST_DOUBLE)
2848 if (GET_CODE (operand) == CONST_DOUBLE)
2854 if (GET_CODE (operand) == CONST_DOUBLE
2855 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2860 if (GET_CODE (operand) == CONST_INT
2861 || (GET_CODE (operand) == CONST_DOUBLE
2862 && GET_MODE (operand) == VOIDmode))
2865 if (CONSTANT_P (operand)
2866 #ifdef LEGITIMATE_PIC_OPERAND_P
2867 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2874 if (GET_CODE (operand) == CONST_INT
2875 || (GET_CODE (operand) == CONST_DOUBLE
2876 && GET_MODE (operand) == VOIDmode))
2888 if (GET_CODE (operand) == CONST_INT
2889 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2899 /* A PLUS is never a valid operand, but reload can make
2900 it from a register when eliminating registers. */
2901 && GET_CODE (operand) != PLUS
2902 /* A SCRATCH is not a valid operand. */
2903 && GET_CODE (operand) != SCRATCH
2904 #ifdef LEGITIMATE_PIC_OPERAND_P
2905 && (! CONSTANT_P (operand)
2907 || LEGITIMATE_PIC_OPERAND_P (operand))
2909 && (GENERAL_REGS == ALL_REGS
2910 || GET_CODE (operand) != REG
2911 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2912 && reg_renumber[REGNO (operand)] < 0)))
2914 /* Drop through into 'r' case */
2918 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2921 #ifdef EXTRA_CONSTRAINT
2927 if (EXTRA_CONSTRAINT (operand, c))
2934 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2937 if (GET_MODE (operand) == BLKmode)
2940 if (GET_CODE (operand) == REG
2941 && reg_fits_class_p (operand, this_alternative[i],
2942 offset, GET_MODE (recog_operand[i])))
2949 /* If this operand could be handled with a reg,
2950 and some reg is allowed, then this operand can be handled. */
2951 if (winreg && this_alternative[i] != (int) NO_REGS)
2954 /* Record which operands fit this alternative. */
2955 this_alternative_earlyclobber[i] = earlyclobber;
2956 if (win && ! force_reload)
2957 this_alternative_win[i] = 1;
2960 this_alternative_offmemok[i] = offmemok;
2964 /* Alternative loses if it has no regs for a reg operand. */
2965 if (GET_CODE (operand) == REG
2966 && this_alternative[i] == (int) NO_REGS
2967 && this_alternative_matches[i] < 0)
2970 /* Alternative loses if it requires a type of reload not
2971 permitted for this insn. We can always reload SCRATCH
2972 and objects with a REG_UNUSED note. */
2973 if (GET_CODE (operand) != SCRATCH
2974 && modified[i] != RELOAD_READ && no_output_reloads
2975 && ! find_reg_note (insn, REG_UNUSED, operand))
2977 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2980 /* We prefer to reload pseudos over reloading other things,
2981 since such reloads may be able to be eliminated later.
2982 If we are reloading a SCRATCH, we won't be generating any
2983 insns, just using a register, so it is also preferred.
2984 So bump REJECT in other cases. */
2985 if (! (GET_CODE (operand) == REG
2986 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
2987 && GET_CODE (operand) != SCRATCH)
2991 /* If this operand is a pseudo register that didn't get a hard
2992 reg and this alternative accepts some register, see if the
2993 class that we want is a subset of the preferred class for this
2994 register. If not, but it intersects that class, use the
2995 preferred class instead. If it does not intersect the preferred
2996 class, show that usage of this alternative should be discouraged;
2997 it will be discouraged more still if the register is `preferred
2998 or nothing'. We do this because it increases the chance of
2999 reusing our spill register in a later insn and avoiding a pair
3000 of memory stores and loads.
3002 Don't bother with this if this alternative will accept this
3005 Don't do this for a multiword operand, if
3006 we have to worry about small classes, because making reg groups
3007 harder to allocate is asking for trouble.
3009 Don't do this if the preferred class has only one register
3010 because we might otherwise exhaust the class. */
3013 if (! win && this_alternative[i] != (int) NO_REGS
3014 #ifdef SMALL_REGISTER_CLASSES
3015 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3017 && reg_class_size[(int) preferred_class[i]] > 1)
3019 if (! reg_class_subset_p (this_alternative[i],
3020 preferred_class[i]))
3022 /* Since we don't have a way of forming the intersection,
3023 we just do something special if the preferred class
3024 is a subset of the class we have; that's the most
3025 common case anyway. */
3026 if (reg_class_subset_p (preferred_class[i],
3027 this_alternative[i]))
3028 this_alternative[i] = (int) preferred_class[i];
3030 reject += (1 + pref_or_nothing[i]);
3035 /* Now see if any output operands that are marked "earlyclobber"
3036 in this alternative conflict with any input operands
3037 or any memory addresses. */
3039 for (i = 0; i < noperands; i++)
3040 if (this_alternative_earlyclobber[i]
3041 && this_alternative_win[i])
3043 struct decomposition early_data;
3045 early_data = decompose (recog_operand[i]);
3047 if (modified[i] == RELOAD_READ)
3049 if (this_insn_is_asm)
3050 warning_for_asm (this_insn,
3051 "`&' constraint used with input operand");
3057 if (this_alternative[i] == NO_REGS)
3059 this_alternative_earlyclobber[i] = 0;
3060 if (this_insn_is_asm)
3061 error_for_asm (this_insn,
3062 "`&' constraint used with no register class");
3067 for (j = 0; j < noperands; j++)
3068 /* Is this an input operand or a memory ref? */
3069 if ((GET_CODE (recog_operand[j]) == MEM
3070 || modified[j] != RELOAD_WRITE)
3072 /* Ignore things like match_operator operands. */
3073 && *constraints1[j] != 0
3074 /* Don't count an input operand that is constrained to match
3075 the early clobber operand. */
3076 && ! (this_alternative_matches[j] == i
3077 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3078 /* Is it altered by storing the earlyclobber operand? */
3079 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3081 /* If the output is in a single-reg class,
3082 it's costly to reload it, so reload the input instead. */
3083 if (reg_class_size[this_alternative[i]] == 1
3084 && (GET_CODE (recog_operand[j]) == REG
3085 || GET_CODE (recog_operand[j]) == SUBREG))
3088 this_alternative_win[j] = 0;
3093 /* If an earlyclobber operand conflicts with something,
3094 it must be reloaded, so request this and count the cost. */
3098 this_alternative_win[i] = 0;
3099 for (j = 0; j < noperands; j++)
3100 if (this_alternative_matches[j] == i
3101 && this_alternative_win[j])
3103 this_alternative_win[j] = 0;
3109 /* If one alternative accepts all the operands, no reload required,
3110 choose that alternative; don't consider the remaining ones. */
3113 /* Unswap these so that they are never swapped at `finish'. */
3114 if (commutative >= 0)
3116 recog_operand[commutative] = substed_operand[commutative];
3117 recog_operand[commutative + 1]
3118 = substed_operand[commutative + 1];
3120 for (i = 0; i < noperands; i++)
3122 goal_alternative_win[i] = 1;
3123 goal_alternative[i] = this_alternative[i];
3124 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3125 goal_alternative_matches[i] = this_alternative_matches[i];
3126 goal_alternative_earlyclobber[i]
3127 = this_alternative_earlyclobber[i];
3129 goal_alternative_number = this_alternative_number;
3130 goal_alternative_swapped = swapped;
3131 goal_earlyclobber = this_earlyclobber;
3135 /* REJECT, set by the ! and ? constraint characters and when a register
3136 would be reloaded into a non-preferred class, discourages the use of
3137 this alternative for a reload goal. REJECT is incremented by three
3138 for each ? and one for each non-preferred class. */
3139 losers = losers * 3 + reject;
3141 /* If this alternative can be made to work by reloading,
3142 and it needs less reloading than the others checked so far,
3143 record it as the chosen goal for reloading. */
3144 if (! bad && best > losers)
3146 for (i = 0; i < noperands; i++)
3148 goal_alternative[i] = this_alternative[i];
3149 goal_alternative_win[i] = this_alternative_win[i];
3150 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3151 goal_alternative_matches[i] = this_alternative_matches[i];
3152 goal_alternative_earlyclobber[i]
3153 = this_alternative_earlyclobber[i];
3155 goal_alternative_swapped = swapped;
3157 goal_alternative_number = this_alternative_number;
3158 goal_earlyclobber = this_earlyclobber;
3162 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3163 then we need to try each alternative twice,
3164 the second time matching those two operands
3165 as if we had exchanged them.
3166 To do this, really exchange them in operands.
3168 If we have just tried the alternatives the second time,
3169 return operands to normal and drop through. */
3171 if (commutative >= 0)
3176 register enum reg_class tclass;
3179 recog_operand[commutative] = substed_operand[commutative + 1];
3180 recog_operand[commutative + 1] = substed_operand[commutative];
3182 tclass = preferred_class[commutative];
3183 preferred_class[commutative] = preferred_class[commutative + 1];
3184 preferred_class[commutative + 1] = tclass;
3186 t = pref_or_nothing[commutative];
3187 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3188 pref_or_nothing[commutative + 1] = t;
3190 bcopy (constraints1, constraints, noperands * sizeof (char *));
3195 recog_operand[commutative] = substed_operand[commutative];
3196 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3200 /* The operands don't meet the constraints.
3201 goal_alternative describes the alternative
3202 that we could reach by reloading the fewest operands.
3203 Reload so as to fit it. */
3205 if (best == MAX_RECOG_OPERANDS + 300)
3207 /* No alternative works with reloads?? */
3208 if (insn_code_number >= 0)
3210 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3211 /* Avoid further trouble with this insn. */
3212 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3217 /* Jump to `finish' from above if all operands are valid already.
3218 In that case, goal_alternative_win is all 1. */
3221 /* Right now, for any pair of operands I and J that are required to match,
3223 goal_alternative_matches[J] is I.
3224 Set up goal_alternative_matched as the inverse function:
3225 goal_alternative_matched[I] = J. */
3227 for (i = 0; i < noperands; i++)
3228 goal_alternative_matched[i] = -1;
3230 for (i = 0; i < noperands; i++)
3231 if (! goal_alternative_win[i]
3232 && goal_alternative_matches[i] >= 0)
3233 goal_alternative_matched[goal_alternative_matches[i]] = i;
3235 /* If the best alternative is with operands 1 and 2 swapped,
3236 consider them swapped before reporting the reloads. Update the
3237 operand numbers of any reloads already pushed. */
3239 if (goal_alternative_swapped)
3243 tem = substed_operand[commutative];
3244 substed_operand[commutative] = substed_operand[commutative + 1];
3245 substed_operand[commutative + 1] = tem;
3246 tem = recog_operand[commutative];
3247 recog_operand[commutative] = recog_operand[commutative + 1];
3248 recog_operand[commutative + 1] = tem;
3250 for (i = 0; i < n_reloads; i++)
3252 if (reload_opnum[i] == commutative)
3253 reload_opnum[i] = commutative + 1;
3254 else if (reload_opnum[i] == commutative + 1)
3255 reload_opnum[i] = commutative;
3259 /* Perform whatever substitutions on the operands we are supposed
3260 to make due to commutativity or replacement of registers
3261 with equivalent constants or memory slots. */
3263 for (i = 0; i < noperands; i++)
3265 *recog_operand_loc[i] = substed_operand[i];
3266 /* While we are looping on operands, initialize this. */
3267 operand_reloadnum[i] = -1;
3269 /* If this is an earlyclobber operand, we need to widen the scope.
3270 The reload must remain valid from the start of the insn being
3271 reloaded until after the operand is stored into its destination.
3272 We approximate this with RELOAD_OTHER even though we know that we
3273 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3275 One special case that is worth checking is when we have an
3276 output that is earlyclobber but isn't used past the insn (typically
3277 a SCRATCH). In this case, we only need have the reload live
3278 through the insn itself, but not for any of our input or output
3281 In any case, anything needed to address this operand can remain
3282 however they were previously categorized. */
3284 if (goal_alternative_earlyclobber[i])
3286 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3287 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3290 /* Any constants that aren't allowed and can't be reloaded
3291 into registers are here changed into memory references. */
3292 for (i = 0; i < noperands; i++)
3293 if (! goal_alternative_win[i]
3294 && CONSTANT_P (recog_operand[i])
3295 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3296 (enum reg_class) goal_alternative[i])
3298 && operand_mode[i] != VOIDmode)
3300 *recog_operand_loc[i] = recog_operand[i]
3301 = find_reloads_toplev (force_const_mem (operand_mode[i],
3303 i, address_type[i], ind_levels, 0);
3304 if (alternative_allows_memconst (constraints1[i],
3305 goal_alternative_number))
3306 goal_alternative_win[i] = 1;
3309 /* Record the values of the earlyclobber operands for the caller. */
3310 if (goal_earlyclobber)
3311 for (i = 0; i < noperands; i++)
3312 if (goal_alternative_earlyclobber[i])
3313 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3315 /* Now record reloads for all the operands that need them. */
3316 for (i = 0; i < noperands; i++)
3317 if (! goal_alternative_win[i])
3319 /* Operands that match previous ones have already been handled. */
3320 if (goal_alternative_matches[i] >= 0)
3322 /* Handle an operand with a nonoffsettable address
3323 appearing where an offsettable address will do
3324 by reloading the address into a base register. */
3325 else if (goal_alternative_matched[i] == -1
3326 && goal_alternative_offmemok[i]
3327 && GET_CODE (recog_operand[i]) == MEM)
3329 operand_reloadnum[i]
3330 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3331 &XEXP (recog_operand[i], 0), NULL_PTR,
3332 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3333 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3334 reload_inc[operand_reloadnum[i]]
3335 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3337 /* If this operand is an output, we will have made any
3338 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3339 now we are treating part of the operand as an input, so
3340 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3342 if (operand_type[i] == RELOAD_FOR_OUTPUT)
3343 for (j = 0; j < n_reloads; j++)
3344 if (reload_opnum[j] == i
3345 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3346 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3348 else if (goal_alternative_matched[i] == -1)
3349 operand_reloadnum[i] =
3350 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3351 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3352 (modified[i] != RELOAD_WRITE ?
3353 recog_operand_loc[i] : 0),
3354 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3355 (enum reg_class) goal_alternative[i],
3356 (modified[i] == RELOAD_WRITE
3357 ? VOIDmode : operand_mode[i]),
3358 (modified[i] == RELOAD_READ
3359 ? VOIDmode : operand_mode[i]),
3360 (insn_code_number < 0 ? 0
3361 : insn_operand_strict_low[insn_code_number][i]),
3362 0, i, operand_type[i]);
3363 /* In a matching pair of operands, one must be input only
3364 and the other must be output only.
3365 Pass the input operand as IN and the other as OUT. */
3366 else if (modified[i] == RELOAD_READ
3367 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3369 operand_reloadnum[i]
3370 = push_reload (recog_operand[i],
3371 recog_operand[goal_alternative_matched[i]],
3372 recog_operand_loc[i],
3373 recog_operand_loc[goal_alternative_matched[i]],
3374 (enum reg_class) goal_alternative[i],
3376 operand_mode[goal_alternative_matched[i]],
3377 0, 0, i, RELOAD_OTHER);
3378 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3380 else if (modified[i] == RELOAD_WRITE
3381 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3383 operand_reloadnum[goal_alternative_matched[i]]
3384 = push_reload (recog_operand[goal_alternative_matched[i]],
3386 recog_operand_loc[goal_alternative_matched[i]],
3387 recog_operand_loc[i],
3388 (enum reg_class) goal_alternative[i],
3389 operand_mode[goal_alternative_matched[i]],
3391 0, 0, i, RELOAD_OTHER);
3392 operand_reloadnum[i] = output_reloadnum;
3394 else if (insn_code_number >= 0)
3398 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3399 /* Avoid further trouble with this insn. */
3400 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3405 else if (goal_alternative_matched[i] < 0
3406 && goal_alternative_matches[i] < 0
3409 /* For each non-matching operand that's a MEM or a pseudo-register
3410 that didn't get a hard register, make an optional reload.
3411 This may get done even if the insn needs no reloads otherwise. */
3413 rtx operand = recog_operand[i];
3415 while (GET_CODE (operand) == SUBREG)
3416 operand = XEXP (operand, 0);
3417 if ((GET_CODE (operand) == MEM
3418 || (GET_CODE (operand) == REG
3419 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3420 && (enum reg_class) goal_alternative[i] != NO_REGS
3421 && ! no_input_reloads
3422 /* Optional output reloads don't do anything and we mustn't
3423 make in-out reloads on insns that are not permitted output
3425 && (modified[i] == RELOAD_READ
3426 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3427 operand_reloadnum[i]
3428 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3429 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3430 (modified[i] != RELOAD_WRITE
3431 ? recog_operand_loc[i] : 0),
3432 (modified[i] != RELOAD_READ
3433 ? recog_operand_loc[i] : 0),
3434 (enum reg_class) goal_alternative[i],
3435 (modified[i] == RELOAD_WRITE
3436 ? VOIDmode : operand_mode[i]),
3437 (modified[i] == RELOAD_READ
3438 ? VOIDmode : operand_mode[i]),
3439 (insn_code_number < 0 ? 0
3440 : insn_operand_strict_low[insn_code_number][i]),
3441 1, i, operand_type[i]);
3443 else if (goal_alternative_matches[i] >= 0
3444 && goal_alternative_win[goal_alternative_matches[i]]
3445 && modified[i] == RELOAD_READ
3446 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3447 && ! no_input_reloads && ! no_output_reloads
3450 /* Similarly, make an optional reload for a pair of matching
3451 objects that are in MEM or a pseudo that didn't get a hard reg. */
3453 rtx operand = recog_operand[i];
3455 while (GET_CODE (operand) == SUBREG)
3456 operand = XEXP (operand, 0);
3457 if ((GET_CODE (operand) == MEM
3458 || (GET_CODE (operand) == REG
3459 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3460 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3462 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3463 = push_reload (recog_operand[goal_alternative_matches[i]],
3465 recog_operand_loc[goal_alternative_matches[i]],
3466 recog_operand_loc[i],
3467 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3468 operand_mode[goal_alternative_matches[i]],
3470 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3473 /* If this insn pattern contains any MATCH_DUP's, make sure that
3474 they will be substituted if the operands they match are substituted.
3475 Also do now any substitutions we already did on the operands.
3477 Don't do this if we aren't making replacements because we might be
3478 propagating things allocated by frame pointer elimination into places
3479 it doesn't expect. */
3481 if (insn_code_number >= 0 && replace)
3482 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3484 int opno = recog_dup_num[i];
3485 *recog_dup_loc[i] = *recog_operand_loc[opno];
3486 if (operand_reloadnum[opno] >= 0)
3487 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3488 insn_operand_mode[insn_code_number][opno]);
3492 /* This loses because reloading of prior insns can invalidate the equivalence
3493 (or at least find_equiv_reg isn't smart enough to find it any more),
3494 causing this insn to need more reload regs than it needed before.
3495 It may be too late to make the reload regs available.
3496 Now this optimization is done safely in choose_reload_regs. */
3498 /* For each reload of a reg into some other class of reg,
3499 search for an existing equivalent reg (same value now) in the right class.
3500 We can use it as long as we don't need to change its contents. */
3501 for (i = 0; i < n_reloads; i++)
3502 if (reload_reg_rtx[i] == 0
3503 && reload_in[i] != 0
3504 && GET_CODE (reload_in[i]) == REG
3505 && reload_out[i] == 0)
3508 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3509 static_reload_reg_p, 0, reload_inmode[i]);
3510 /* Prevent generation of insn to load the value
3511 because the one we found already has the value. */
3512 if (reload_reg_rtx[i])
3513 reload_in[i] = reload_reg_rtx[i];
3517 /* Perhaps an output reload can be combined with another
3518 to reduce needs by one. */
3519 if (!goal_earlyclobber)
3522 /* If we have a pair of reloads for parts of an address, they are reloading
3523 the same object, the operands themselves were not reloaded, and they
3524 are for two operands that are supposed to match, merge the reloads and
3525 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3527 for (i = 0; i < n_reloads; i++)
3531 for (j = i + 1; j < n_reloads; j++)
3532 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3533 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3534 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3535 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3536 && rtx_equal_p (reload_in[i], reload_in[j])
3537 && (operand_reloadnum[reload_opnum[i]] < 0
3538 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3539 && (operand_reloadnum[reload_opnum[j]] < 0
3540 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3541 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3542 || (goal_alternative_matches[reload_opnum[j]]
3543 == reload_opnum[i])))
3545 for (k = 0; k < n_replacements; k++)
3546 if (replacements[k].what == j)
3547 replacements[k].what = i;
3549 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3554 /* Scan all the reloads and update their type.
3555 If a reload is for the address of an operand and we didn't reload
3556 that operand, change the type. Similarly, change the operand number
3557 of a reload when two operands match. If a reload is optional, treat it
3558 as though the operand isn't reloaded.
3560 ??? This latter case is somewhat odd because if we do the optional
3561 reload, it means the object is hanging around. Thus we need only
3562 do the address reload if the optional reload was NOT done.
3564 Change secondary reloads to be the address type of their operand, not
3567 If an operand's reload is now RELOAD_OTHER, change any
3568 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3569 RELOAD_FOR_OTHER_ADDRESS. */
3571 for (i = 0; i < n_reloads; i++)
3573 if (reload_secondary_p[i]
3574 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3575 reload_when_needed[i] = address_type[reload_opnum[i]];
3577 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3578 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3579 && (operand_reloadnum[reload_opnum[i]] < 0
3580 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3581 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3583 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3584 && operand_reloadnum[reload_opnum[i]] >= 0
3585 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3587 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3589 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3590 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3593 /* See if we have any reloads that are now allowed to be merged
3594 because we've changed when the reload is needed to
3595 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3596 check for the most common cases. */
3598 for (i = 0; i < n_reloads; i++)
3599 if (reload_in[i] != 0 && reload_out[i] == 0
3600 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3601 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3602 for (j = 0; j < n_reloads; j++)
3603 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3604 && reload_when_needed[j] == reload_when_needed[i]
3605 && MATCHES (reload_in[i], reload_in[j])
3606 && reload_reg_class[i] == reload_reg_class[j]
3607 && !reload_nocombine[i] && !reload_nocombine[j]
3608 && reload_reg_rtx[i] == reload_reg_rtx[j])
3610 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3611 transfer_replacements (i, j);
3615 #else /* no REGISTER_CONSTRAINTS */
3617 int insn_code_number;
3618 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3620 rtx body = PATTERN (insn);
3624 n_earlyclobbers = 0;
3625 replace_reloads = replace;
3628 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3629 Store the operand values in RECOG_OPERAND and the locations
3630 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3631 Return if the insn needs no reload processing. */
3633 switch (GET_CODE (body))
3644 noperands = asm_noperands (body);
3647 /* This insn is an `asm' with operands.
3648 First, find out how many operands, and allocate space. */
3650 insn_code_number = -1;
3651 /* ??? This is a bug! ???
3652 Give up and delete this insn if it has too many operands. */
3653 if (noperands > MAX_RECOG_OPERANDS)
3656 /* Now get the operand values out of the insn. */
3658 decode_asm_operands (body, recog_operand, recog_operand_loc,
3659 NULL_PTR, NULL_PTR);
3664 /* Ordinary insn: recognize it, allocate space for operands and
3665 constraints, and get them out via insn_extract. */
3667 insn_code_number = recog_memoized (insn);
3668 noperands = insn_n_operands[insn_code_number];
3669 insn_extract (insn);
3675 for (i = 0; i < noperands; i++)
3677 register RTX_CODE code = GET_CODE (recog_operand[i]);
3678 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3680 if (insn_code_number >= 0)
3681 if (insn_operand_address_p[insn_code_number][i])
3682 find_reloads_address (VOIDmode, NULL_PTR,
3683 recog_operand[i], recog_operand_loc[i],
3684 i, RELOAD_FOR_INPUT, ind_levels);
3686 /* In these cases, we can't tell if the operand is an input
3687 or an output, so be conservative. In practice it won't be
3691 find_reloads_address (GET_MODE (recog_operand[i]),
3692 recog_operand_loc[i],
3693 XEXP (recog_operand[i], 0),
3694 &XEXP (recog_operand[i], 0),
3695 i, RELOAD_OTHER, ind_levels);
3697 recog_operand[i] = *recog_operand_loc[i]
3698 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3699 ind_levels, is_set_dest);
3702 register int regno = REGNO (recog_operand[i]);
3703 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3704 recog_operand[i] = *recog_operand_loc[i]
3705 = reg_equiv_constant[regno];
3706 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3707 that feeds this insn. */
3708 if (reg_equiv_mem[regno] != 0)
3709 recog_operand[i] = *recog_operand_loc[i]
3710 = reg_equiv_mem[regno];
3715 /* Perhaps an output reload can be combined with another
3716 to reduce needs by one. */
3717 if (!goal_earlyclobber)
3719 #endif /* no REGISTER_CONSTRAINTS */
3722 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3723 accepts a memory operand with constant address. */
3726 alternative_allows_memconst (constraint, altnum)
3731 /* Skip alternatives before the one requested. */
3734 while (*constraint++ != ',');
3737 /* Scan the requested alternative for 'm' or 'o'.
3738 If one of them is present, this alternative accepts memory constants. */
3739 while ((c = *constraint++) && c != ',' && c != '#')
3740 if (c == 'm' || c == 'o')
3745 /* Scan X for memory references and scan the addresses for reloading.
3746 Also checks for references to "constant" regs that we want to eliminate
3747 and replaces them with the values they stand for.
3748 We may alter X destructively if it contains a reference to such.
3749 If X is just a constant reg, we return the equivalent value
3752 IND_LEVELS says how many levels of indirect addressing this machine
3755 OPNUM and TYPE identify the purpose of the reload.
3757 IS_SET_DEST is true if X is the destination of a SET, which is not
3758 appropriate to be replaced by a constant. */
3761 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
3764 enum reload_type type;
3768 register RTX_CODE code = GET_CODE (x);
3770 register char *fmt = GET_RTX_FORMAT (code);
3775 /* This code is duplicated for speed in find_reloads. */
3776 register int regno = REGNO (x);
3777 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3778 x = reg_equiv_constant[regno];
3780 /* This creates (subreg (mem...)) which would cause an unnecessary
3781 reload of the mem. */
3782 else if (reg_equiv_mem[regno] != 0)
3783 x = reg_equiv_mem[regno];
3785 else if (reg_equiv_address[regno] != 0)
3787 /* If reg_equiv_address varies, it may be shared, so copy it. */
3788 rtx addr = reg_equiv_address[regno];
3790 if (rtx_varies_p (addr))
3791 addr = copy_rtx (addr);
3793 x = gen_rtx (MEM, GET_MODE (x), addr);
3794 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3795 find_reloads_address (GET_MODE (x), NULL_PTR,
3797 &XEXP (x, 0), opnum, type, ind_levels);
3804 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3805 opnum, type, ind_levels);
3809 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3811 /* Check for SUBREG containing a REG that's equivalent to a constant.
3812 If the constant has a known value, truncate it right now.
3813 Similarly if we are extracting a single-word of a multi-word
3814 constant. If the constant is symbolic, allow it to be substituted
3815 normally. push_reload will strip the subreg later. If the
3816 constant is VOIDmode, abort because we will lose the mode of
3817 the register (this should never happen because one of the cases
3818 above should handle it). */
3820 register int regno = REGNO (SUBREG_REG (x));
3823 if (subreg_lowpart_p (x)
3824 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3825 && reg_equiv_constant[regno] != 0
3826 && (tem = gen_lowpart_common (GET_MODE (x),
3827 reg_equiv_constant[regno])) != 0)
3830 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3831 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3832 && reg_equiv_constant[regno] != 0
3833 && (tem = operand_subword (reg_equiv_constant[regno],
3835 GET_MODE (SUBREG_REG (x)))) != 0)
3838 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3839 && reg_equiv_constant[regno] != 0
3840 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3843 /* If the subreg contains a reg that will be converted to a mem,
3844 convert the subreg to a narrower memref now.
3845 Otherwise, we would get (subreg (mem ...) ...),
3846 which would force reload of the mem.
3848 We also need to do this if there is an equivalent MEM that is
3849 not offsettable. In that case, alter_subreg would produce an
3850 invalid address on big-endian machines.
3852 For machines that extend byte loads, we must not reload using
3853 a wider mode if we have a paradoxical SUBREG. find_reloads will
3854 force a reload in that case. So we should not do anything here. */
3856 else if (regno >= FIRST_PSEUDO_REGISTER
3857 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
3858 && (GET_MODE_SIZE (GET_MODE (x))
3859 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3861 && (reg_equiv_address[regno] != 0
3862 || (reg_equiv_mem[regno] != 0
3863 && (! strict_memory_address_p (GET_MODE (x),
3864 XEXP (reg_equiv_mem[regno], 0))
3865 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
3867 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3868 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3869 : XEXP (reg_equiv_mem[regno], 0));
3870 #if BYTES_BIG_ENDIAN
3872 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3873 offset += MIN (size, UNITS_PER_WORD);
3874 size = GET_MODE_SIZE (GET_MODE (x));
3875 offset -= MIN (size, UNITS_PER_WORD);
3877 addr = plus_constant (addr, offset);
3878 x = gen_rtx (MEM, GET_MODE (x), addr);
3879 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3880 find_reloads_address (GET_MODE (x), NULL_PTR,
3882 &XEXP (x, 0), opnum, type, ind_levels);
3887 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3890 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
3891 ind_levels, is_set_dest);
3896 /* Return a mem ref for the memory equivalent of reg REGNO.
3897 This mem ref is not shared with anything. */
3900 make_memloc (ad, regno)
3905 rtx tem = reg_equiv_address[regno];
3907 #if 0 /* We cannot safely reuse a memloc made here;
3908 if the pseudo appears twice, and its mem needs a reload,
3909 it gets two separate reloads assigned, but it only
3910 gets substituted with the second of them;
3911 then it can get used before that reload reg gets loaded up. */
3912 for (i = 0; i < n_memlocs; i++)
3913 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
3917 /* If TEM might contain a pseudo, we must copy it to avoid
3918 modifying it when we do the substitution for the reload. */
3919 if (rtx_varies_p (tem))
3920 tem = copy_rtx (tem);
3922 tem = gen_rtx (MEM, GET_MODE (ad), tem);
3923 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3924 memlocs[n_memlocs++] = tem;
3928 /* Record all reloads needed for handling memory address AD
3929 which appears in *LOC in a memory reference to mode MODE
3930 which itself is found in location *MEMREFLOC.
3931 Note that we take shortcuts assuming that no multi-reg machine mode
3932 occurs as part of an address.
3934 OPNUM and TYPE specify the purpose of this reload.
3936 IND_LEVELS says how many levels of indirect addressing this machine
3939 Value is nonzero if this address is reloaded or replaced as a whole.
3940 This is interesting to the caller if the address is an autoincrement.
3942 Note that there is no verification that the address will be valid after
3943 this routine does its work. Instead, we rely on the fact that the address
3944 was valid when reload started. So we need only undo things that reload
3945 could have broken. These are wrong register types, pseudos not allocated
3946 to a hard register, and frame pointer elimination. */
3949 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
3950 enum machine_mode mode;
3955 enum reload_type type;
3961 /* If the address is a register, see if it is a legitimate address and
3962 reload if not. We first handle the cases where we need not reload
3963 or where we must reload in a non-standard way. */
3965 if (GET_CODE (ad) == REG)
3969 if (reg_equiv_constant[regno] != 0
3970 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
3972 *loc = ad = reg_equiv_constant[regno];
3976 else if (reg_equiv_address[regno] != 0)
3978 tem = make_memloc (ad, regno);
3979 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
3980 &XEXP (tem, 0), opnum, type, ind_levels);
3981 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3982 GET_MODE (ad), VOIDmode, 0, 0,
3987 /* We can avoid a reload if the register's equivalent memory expression
3988 is valid as an indirect memory address.
3989 But not all addresses are valid in a mem used as an indirect address:
3990 only reg or reg+constant. */
3992 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
3993 && strict_memory_address_p (mode, reg_equiv_mem[regno])
3994 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
3995 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
3996 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
3997 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)))))
4000 /* The only remaining case where we can avoid a reload is if this is a
4001 hard register that is valid as a base register and which is not the
4002 subject of a CLOBBER in this insn. */
4004 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
4005 && ! regno_clobbered_p (regno, this_insn))
4008 /* If we do not have one of the cases above, we must do the reload. */
4009 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4010 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4014 if (strict_memory_address_p (mode, ad))
4016 /* The address appears valid, so reloads are not needed.
4017 But the address may contain an eliminable register.
4018 This can happen because a machine with indirect addressing
4019 may consider a pseudo register by itself a valid address even when
4020 it has failed to get a hard reg.
4021 So do a tree-walk to find and eliminate all such regs. */
4023 /* But first quickly dispose of a common case. */
4024 if (GET_CODE (ad) == PLUS
4025 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4026 && GET_CODE (XEXP (ad, 0)) == REG
4027 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4030 subst_reg_equivs_changed = 0;
4031 *loc = subst_reg_equivs (ad);
4033 if (! subst_reg_equivs_changed)
4036 /* Check result for validity after substitution. */
4037 if (strict_memory_address_p (mode, ad))
4041 /* The address is not valid. We have to figure out why. One possibility
4042 is that it is itself a MEM. This can happen when the frame pointer is
4043 being eliminated, a pseudo is not allocated to a hard register, and the
4044 offset between the frame and stack pointers is not its initial value.
4045 In that case the pseudo will have been replaced by a MEM referring to
4046 the stack pointer. */
4047 if (GET_CODE (ad) == MEM)
4049 /* First ensure that the address in this MEM is valid. Then, unless
4050 indirect addresses are valid, reload the MEM into a register. */
4052 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4053 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
4055 /* If tem was changed, then we must create a new memory reference to
4056 hold it and store it back into memrefloc. */
4057 if (tem != ad && memrefloc)
4059 *memrefloc = copy_rtx (*memrefloc);
4060 copy_replacements (tem, XEXP (*memrefloc, 0));
4061 loc = &XEXP (*memrefloc, 0);
4064 /* Check similar cases as for indirect addresses as above except
4065 that we can allow pseudos and a MEM since they should have been
4066 taken care of above. */
4069 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4070 || GET_CODE (XEXP (tem, 0)) == MEM
4071 || ! (GET_CODE (XEXP (tem, 0)) == REG
4072 || (GET_CODE (XEXP (tem, 0)) == PLUS
4073 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4074 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4076 /* Must use TEM here, not AD, since it is the one that will
4077 have any subexpressions reloaded, if needed. */
4078 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4079 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
4087 /* If we have address of a stack slot but it's not valid
4088 (displacement is too large), compute the sum in a register. */
4089 else if (GET_CODE (ad) == PLUS
4090 && (XEXP (ad, 0) == frame_pointer_rtx
4091 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4092 || XEXP (ad, 0) == hard_frame_pointer_rtx
4094 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4095 || XEXP (ad, 0) == arg_pointer_rtx
4097 || XEXP (ad, 0) == stack_pointer_rtx)
4098 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4100 /* Unshare the MEM rtx so we can safely alter it. */
4103 rtx oldref = *memrefloc;
4104 *memrefloc = copy_rtx (*memrefloc);
4105 loc = &XEXP (*memrefloc, 0);
4107 if (double_reg_address_ok)
4109 /* Unshare the sum as well. */
4110 *loc = ad = copy_rtx (ad);
4111 /* Reload the displacement into an index reg.
4112 We assume the frame pointer or arg pointer is a base reg. */
4113 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4114 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4119 /* If the sum of two regs is not necessarily valid,
4120 reload the sum into a base reg.
4121 That will at least work. */
4122 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
4123 opnum, type, ind_levels);
4128 /* If we have an indexed stack slot, there are three possible reasons why
4129 it might be invalid: The index might need to be reloaded, the address
4130 might have been made by frame pointer elimination and hence have a
4131 constant out of range, or both reasons might apply.
4133 We can easily check for an index needing reload, but even if that is the
4134 case, we might also have an invalid constant. To avoid making the
4135 conservative assumption and requiring two reloads, we see if this address
4136 is valid when not interpreted strictly. If it is, the only problem is
4137 that the index needs a reload and find_reloads_address_1 will take care
4140 There is still a case when we might generate an extra reload,
4141 however. In certain cases eliminate_regs will return a MEM for a REG
4142 (see the code there for details). In those cases, memory_address_p
4143 applied to our address will return 0 so we will think that our offset
4144 must be too large. But it might indeed be valid and the only problem
4145 is that a MEM is present where a REG should be. This case should be
4146 very rare and there doesn't seem to be any way to avoid it.
4148 If we decide to do something here, it must be that
4149 `double_reg_address_ok' is true and that this address rtl was made by
4150 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4151 rework the sum so that the reload register will be added to the index.
4152 This is safe because we know the address isn't shared.
4154 We check for fp/ap/sp as both the first and second operand of the
4157 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4158 && GET_CODE (XEXP (ad, 0)) == PLUS
4159 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4160 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4161 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4163 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4164 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4166 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4167 && ! memory_address_p (mode, ad))
4169 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4170 plus_constant (XEXP (XEXP (ad, 0), 0),
4171 INTVAL (XEXP (ad, 1))),
4172 XEXP (XEXP (ad, 0), 1));
4173 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4174 GET_MODE (ad), opnum, type, ind_levels);
4175 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4180 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4181 && GET_CODE (XEXP (ad, 0)) == PLUS
4182 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4183 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4184 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4186 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4187 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4189 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4190 && ! memory_address_p (mode, ad))
4192 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4193 plus_constant (XEXP (XEXP (ad, 0), 1),
4194 INTVAL (XEXP (ad, 1))),
4195 XEXP (XEXP (ad, 0), 0));
4196 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4197 GET_MODE (ad), opnum, type, ind_levels);
4198 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4203 /* See if address becomes valid when an eliminable register
4204 in a sum is replaced. */
4207 if (GET_CODE (ad) == PLUS)
4208 tem = subst_indexed_address (ad);
4209 if (tem != ad && strict_memory_address_p (mode, tem))
4211 /* Ok, we win that way. Replace any additional eliminable
4214 subst_reg_equivs_changed = 0;
4215 tem = subst_reg_equivs (tem);
4217 /* Make sure that didn't make the address invalid again. */
4219 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4226 /* If constants aren't valid addresses, reload the constant address
4228 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4230 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4231 Unshare it so we can safely alter it. */
4232 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4233 && CONSTANT_POOL_ADDRESS_P (ad))
4235 rtx oldref = *memrefloc;
4236 *memrefloc = copy_rtx (*memrefloc);
4237 loc = &XEXP (*memrefloc, 0);
4240 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4245 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
4248 /* Find all pseudo regs appearing in AD
4249 that are eliminable in favor of equivalent values
4250 and do not have hard regs; replace them by their equivalents. */
4253 subst_reg_equivs (ad)
4256 register RTX_CODE code = GET_CODE (ad);
4274 register int regno = REGNO (ad);
4276 if (reg_equiv_constant[regno] != 0)
4278 subst_reg_equivs_changed = 1;
4279 return reg_equiv_constant[regno];
4285 /* Quickly dispose of a common case. */
4286 if (XEXP (ad, 0) == frame_pointer_rtx
4287 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4291 fmt = GET_RTX_FORMAT (code);
4292 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4294 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4298 /* Compute the sum of X and Y, making canonicalizations assumed in an
4299 address, namely: sum constant integers, surround the sum of two
4300 constants with a CONST, put the constant as the second operand, and
4301 group the constant on the outermost sum.
4303 This routine assumes both inputs are already in canonical form. */
4310 enum machine_mode mode = GET_MODE (x);
4312 if (mode == VOIDmode)
4313 mode = GET_MODE (y);
4315 if (mode == VOIDmode)
4318 if (GET_CODE (x) == CONST_INT)
4319 return plus_constant (y, INTVAL (x));
4320 else if (GET_CODE (y) == CONST_INT)
4321 return plus_constant (x, INTVAL (y));
4322 else if (CONSTANT_P (x))
4323 tem = x, x = y, y = tem;
4325 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4326 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4328 /* Note that if the operands of Y are specified in the opposite
4329 order in the recursive calls below, infinite recursion will occur. */
4330 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))
4331 /* Moving the constant in with the MEM yields rtl that reload may not
4332 be able to handle when this is an address calculation. */
4333 && GET_CODE (x) != MEM)
4334 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4336 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4337 constant will have been placed second. */
4338 if (CONSTANT_P (x) && CONSTANT_P (y))
4340 if (GET_CODE (x) == CONST)
4342 if (GET_CODE (y) == CONST)
4345 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
4348 return gen_rtx (PLUS, mode, x, y);
4351 /* If ADDR is a sum containing a pseudo register that should be
4352 replaced with a constant (from reg_equiv_constant),
4353 return the result of doing so, and also apply the associative
4354 law so that the result is more likely to be a valid address.
4355 (But it is not guaranteed to be one.)
4357 Note that at most one register is replaced, even if more are
4358 replaceable. Also, we try to put the result into a canonical form
4359 so it is more likely to be a valid address.
4361 In all other cases, return ADDR. */
4364 subst_indexed_address (addr)
4367 rtx op0 = 0, op1 = 0, op2 = 0;
4371 if (GET_CODE (addr) == PLUS)
4373 /* Try to find a register to replace. */
4374 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4375 if (GET_CODE (op0) == REG
4376 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4377 && reg_renumber[regno] < 0
4378 && reg_equiv_constant[regno] != 0)
4379 op0 = reg_equiv_constant[regno];
4380 else if (GET_CODE (op1) == REG
4381 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4382 && reg_renumber[regno] < 0
4383 && reg_equiv_constant[regno] != 0)
4384 op1 = reg_equiv_constant[regno];
4385 else if (GET_CODE (op0) == PLUS
4386 && (tem = subst_indexed_address (op0)) != op0)
4388 else if (GET_CODE (op1) == PLUS
4389 && (tem = subst_indexed_address (op1)) != op1)
4394 /* Pick out up to three things to add. */
4395 if (GET_CODE (op1) == PLUS)
4396 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4397 else if (GET_CODE (op0) == PLUS)
4398 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4400 /* Compute the sum. */
4402 op1 = form_sum (op1, op2);
4404 op0 = form_sum (op0, op1);
4411 /* Record the pseudo registers we must reload into hard registers
4412 in a subexpression of a would-be memory address, X.
4413 (This function is not called if the address we find is strictly valid.)
4414 CONTEXT = 1 means we are considering regs as index regs,
4415 = 0 means we are considering them as base regs.
4417 OPNUM and TYPE specify the purpose of any reloads made.
4419 IND_LEVELS says how many levels of indirect addressing are
4420 supported at this point in the address.
4422 We return nonzero if X, as a whole, is reloaded or replaced. */
4424 /* Note that we take shortcuts assuming that no multi-reg machine mode
4425 occurs as part of an address.
4426 Also, this is not fully machine-customizable; it works for machines
4427 such as vaxes and 68000's and 32000's, but other possible machines
4428 could have addressing modes that this does not handle right. */
4431 find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
4436 enum reload_type type;
4439 register RTX_CODE code = GET_CODE (x);
4443 register rtx orig_op0 = XEXP (x, 0);
4444 register rtx orig_op1 = XEXP (x, 1);
4445 register RTX_CODE code0 = GET_CODE (orig_op0);
4446 register RTX_CODE code1 = GET_CODE (orig_op1);
4447 register rtx op0 = orig_op0;
4448 register rtx op1 = orig_op1;
4450 if (GET_CODE (op0) == SUBREG)
4452 op0 = SUBREG_REG (op0);
4453 code0 = GET_CODE (op0);
4455 if (GET_CODE (op1) == SUBREG)
4457 op1 = SUBREG_REG (op1);
4458 code1 = GET_CODE (op1);
4461 if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
4463 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4465 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4468 else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
4470 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4472 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4475 else if (code0 == CONST_INT || code0 == CONST
4476 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4477 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type, ind_levels);
4478 else if (code1 == CONST_INT || code1 == CONST
4479 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4480 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type, ind_levels);
4481 else if (code0 == REG && code1 == REG)
4483 if (REG_OK_FOR_INDEX_P (op0)
4484 && REG_OK_FOR_BASE_P (op1))
4486 else if (REG_OK_FOR_INDEX_P (op1)
4487 && REG_OK_FOR_BASE_P (op0))
4489 else if (REG_OK_FOR_BASE_P (op1))
4490 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4492 else if (REG_OK_FOR_BASE_P (op0))
4493 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4495 else if (REG_OK_FOR_INDEX_P (op1))
4496 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4498 else if (REG_OK_FOR_INDEX_P (op0))
4499 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4503 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4505 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4509 else if (code0 == REG)
4511 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4513 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4516 else if (code1 == REG)
4518 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4520 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4524 else if (code == POST_INC || code == POST_DEC
4525 || code == PRE_INC || code == PRE_DEC)
4527 if (GET_CODE (XEXP (x, 0)) == REG)
4529 register int regno = REGNO (XEXP (x, 0));
4533 /* A register that is incremented cannot be constant! */
4534 if (regno >= FIRST_PSEUDO_REGISTER
4535 && reg_equiv_constant[regno] != 0)
4538 /* Handle a register that is equivalent to a memory location
4539 which cannot be addressed directly. */
4540 if (reg_equiv_address[regno] != 0)
4542 rtx tem = make_memloc (XEXP (x, 0), regno);
4543 /* First reload the memory location's address. */
4544 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4545 &XEXP (tem, 0), opnum, type, ind_levels);
4546 /* Put this inside a new increment-expression. */
4547 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4548 /* Proceed to reload that, as if it contained a register. */
4551 /* If we have a hard register that is ok as an index,
4552 don't make a reload. If an autoincrement of a nice register
4553 isn't "valid", it must be that no autoincrement is "valid".
4554 If that is true and something made an autoincrement anyway,
4555 this must be a special context where one is allowed.
4556 (For example, a "push" instruction.)
4557 We can't improve this address, so leave it alone. */
4559 /* Otherwise, reload the autoincrement into a suitable hard reg
4560 and record how much to increment by. */
4562 if (reg_renumber[regno] >= 0)
4563 regno = reg_renumber[regno];
4564 if ((regno >= FIRST_PSEUDO_REGISTER
4565 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4566 : REGNO_OK_FOR_BASE_P (regno))))
4571 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4572 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4573 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4575 reload_inc[reloadnum]
4576 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4581 /* Update the REG_INC notes. */
4583 for (link = REG_NOTES (this_insn);
4584 link; link = XEXP (link, 1))
4585 if (REG_NOTE_KIND (link) == REG_INC
4586 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4587 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4592 else if (GET_CODE (XEXP (x, 0)) == MEM)
4594 /* This is probably the result of a substitution, by eliminate_regs,
4595 of an equivalent address for a pseudo that was not allocated to a
4596 hard register. Verify that the specified address is valid and
4597 reload it into a register. */
4598 rtx tem = XEXP (x, 0);
4602 /* Since we know we are going to reload this item, don't decrement
4603 for the indirection level.
4605 Note that this is actually conservative: it would be slightly
4606 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4608 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4609 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4610 opnum, type, ind_levels);
4612 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4613 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4614 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4615 reload_inc[reloadnum]
4616 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4618 link = FIND_REG_INC_NOTE (this_insn, tem);
4620 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4625 else if (code == MEM)
4627 /* This is probably the result of a substitution, by eliminate_regs,
4628 of an equivalent address for a pseudo that was not allocated to a
4629 hard register. Verify that the specified address is valid and reload
4632 Since we know we are going to reload this item, don't decrement
4633 for the indirection level.
4635 Note that this is actually conservative: it would be slightly more
4636 efficient to use the value of SPILL_INDIRECT_LEVELS from
4639 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4640 opnum, type, ind_levels);
4642 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4643 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4644 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4647 else if (code == REG)
4649 register int regno = REGNO (x);
4651 if (reg_equiv_constant[regno] != 0)
4653 find_reloads_address_part (reg_equiv_constant[regno], loc,
4654 (context ? INDEX_REG_CLASS
4656 GET_MODE (x), opnum, type, ind_levels);
4660 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4661 that feeds this insn. */
4662 if (reg_equiv_mem[regno] != 0)
4664 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4665 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4666 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4670 if (reg_equiv_address[regno] != 0)
4672 x = make_memloc (x, regno);
4673 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4674 opnum, type, ind_levels);
4677 if (reg_renumber[regno] >= 0)
4678 regno = reg_renumber[regno];
4679 if ((regno >= FIRST_PSEUDO_REGISTER
4680 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4681 : REGNO_OK_FOR_BASE_P (regno))))
4683 push_reload (x, NULL_RTX, loc, NULL_PTR,
4684 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4685 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4689 /* If a register appearing in an address is the subject of a CLOBBER
4690 in this insn, reload it into some other register to be safe.
4691 The CLOBBER is supposed to make the register unavailable
4692 from before this insn to after it. */
4693 if (regno_clobbered_p (regno, this_insn))
4695 push_reload (x, NULL_RTX, loc, NULL_PTR,
4696 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4697 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4703 register char *fmt = GET_RTX_FORMAT (code);
4705 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4708 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4709 opnum, type, ind_levels);
4716 /* X, which is found at *LOC, is a part of an address that needs to be
4717 reloaded into a register of class CLASS. If X is a constant, or if
4718 X is a PLUS that contains a constant, check that the constant is a
4719 legitimate operand and that we are supposed to be able to load
4720 it into the register.
4722 If not, force the constant into memory and reload the MEM instead.
4724 MODE is the mode to use, in case X is an integer constant.
4726 OPNUM and TYPE describe the purpose of any reloads made.
4728 IND_LEVELS says how many levels of indirect addressing this machine
4732 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
4735 enum reg_class class;
4736 enum machine_mode mode;
4738 enum reload_type type;
4742 && (! LEGITIMATE_CONSTANT_P (x)
4743 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4745 rtx tem = x = force_const_mem (mode, x);
4746 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4747 opnum, type, ind_levels);
4750 else if (GET_CODE (x) == PLUS
4751 && CONSTANT_P (XEXP (x, 1))
4752 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4753 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4755 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4757 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4758 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4759 opnum, type, ind_levels);
4762 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4763 mode, VOIDmode, 0, 0, opnum, type);
4766 /* Substitute into the current INSN the registers into which we have reloaded
4767 the things that need reloading. The array `replacements'
4768 says contains the locations of all pointers that must be changed
4769 and says what to replace them with.
4771 Return the rtx that X translates into; usually X, but modified. */
4778 for (i = 0; i < n_replacements; i++)
4780 register struct replacement *r = &replacements[i];
4781 register rtx reloadreg = reload_reg_rtx[r->what];
4784 /* Encapsulate RELOADREG so its machine mode matches what
4785 used to be there. Note that gen_lowpart_common will
4786 do the wrong thing if RELOADREG is multi-word. RELOADREG
4787 will always be a REG here. */
4788 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4789 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4791 /* If we are putting this into a SUBREG and RELOADREG is a
4792 SUBREG, we would be making nested SUBREGs, so we have to fix
4793 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4795 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4797 if (GET_MODE (*r->subreg_loc)
4798 == GET_MODE (SUBREG_REG (reloadreg)))
4799 *r->subreg_loc = SUBREG_REG (reloadreg);
4802 *r->where = SUBREG_REG (reloadreg);
4803 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4807 *r->where = reloadreg;
4809 /* If reload got no reg and isn't optional, something's wrong. */
4810 else if (! reload_optional[r->what])
4815 /* Make a copy of any replacements being done into X and move those copies
4816 to locations in Y, a copy of X. We only look at the highest level of
4820 copy_replacements (x, y)
4825 enum rtx_code code = GET_CODE (x);
4826 char *fmt = GET_RTX_FORMAT (code);
4827 struct replacement *r;
4829 /* We can't support X being a SUBREG because we might then need to know its
4830 location if something inside it was replaced. */
4834 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4836 for (j = 0; j < n_replacements; j++)
4838 if (replacements[j].subreg_loc == &XEXP (x, i))
4840 r = &replacements[n_replacements++];
4841 r->where = replacements[j].where;
4842 r->subreg_loc = &XEXP (y, i);
4843 r->what = replacements[j].what;
4844 r->mode = replacements[j].mode;
4846 else if (replacements[j].where == &XEXP (x, i))
4848 r = &replacements[n_replacements++];
4849 r->where = &XEXP (y, i);
4851 r->what = replacements[j].what;
4852 r->mode = replacements[j].mode;
4857 /* If LOC was scheduled to be replaced by something, return the replacement.
4858 Otherwise, return *LOC. */
4861 find_replacement (loc)
4864 struct replacement *r;
4866 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4868 rtx reloadreg = reload_reg_rtx[r->what];
4870 if (reloadreg && r->where == loc)
4872 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
4873 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4877 else if (reloadreg && r->subreg_loc == loc)
4879 /* RELOADREG must be either a REG or a SUBREG.
4881 ??? Is it actually still ever a SUBREG? If so, why? */
4883 if (GET_CODE (reloadreg) == REG)
4884 return gen_rtx (REG, GET_MODE (*loc),
4885 REGNO (reloadreg) + SUBREG_WORD (*loc));
4886 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
4889 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
4890 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
4897 /* Return nonzero if register in range [REGNO, ENDREGNO)
4898 appears either explicitly or implicitly in X
4899 other than being stored into (except for earlyclobber operands).
4901 References contained within the substructure at LOC do not count.
4902 LOC may be zero, meaning don't ignore anything.
4904 This is similar to refers_to_regno_p in rtlanal.c except that we
4905 look at equivalences for pseudos that didn't get hard registers. */
4908 refers_to_regno_for_reload_p (regno, endregno, x, loc)
4909 int regno, endregno;
4914 register RTX_CODE code;
4921 code = GET_CODE (x);
4928 /* If this is a pseudo, a hard register must not have been allocated.
4929 X must therefore either be a constant or be in memory. */
4930 if (i >= FIRST_PSEUDO_REGISTER)
4932 if (reg_equiv_memory_loc[i])
4933 return refers_to_regno_for_reload_p (regno, endregno,
4934 reg_equiv_memory_loc[i],
4937 if (reg_equiv_constant[i])
4943 return (endregno > i
4944 && regno < i + (i < FIRST_PSEUDO_REGISTER
4945 ? HARD_REGNO_NREGS (i, GET_MODE (x))
4949 /* If this is a SUBREG of a hard reg, we can see exactly which
4950 registers are being modified. Otherwise, handle normally. */
4951 if (GET_CODE (SUBREG_REG (x)) == REG
4952 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4954 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4956 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
4957 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4959 return endregno > inner_regno && regno < inner_endregno;
4965 if (&SET_DEST (x) != loc
4966 /* Note setting a SUBREG counts as referring to the REG it is in for
4967 a pseudo but not for hard registers since we can
4968 treat each word individually. */
4969 && ((GET_CODE (SET_DEST (x)) == SUBREG
4970 && loc != &SUBREG_REG (SET_DEST (x))
4971 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
4972 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
4973 && refers_to_regno_for_reload_p (regno, endregno,
4974 SUBREG_REG (SET_DEST (x)),
4976 /* If the ouput is an earlyclobber operand, this is
4978 || ((GET_CODE (SET_DEST (x)) != REG
4979 || earlyclobber_operand_p (SET_DEST (x)))
4980 && refers_to_regno_for_reload_p (regno, endregno,
4981 SET_DEST (x), loc))))
4984 if (code == CLOBBER || loc == &SET_SRC (x))
4990 /* X does not match, so try its subexpressions. */
4992 fmt = GET_RTX_FORMAT (code);
4993 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4995 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5003 if (refers_to_regno_for_reload_p (regno, endregno,
5007 else if (fmt[i] == 'E')
5010 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5011 if (loc != &XVECEXP (x, i, j)
5012 && refers_to_regno_for_reload_p (regno, endregno,
5013 XVECEXP (x, i, j), loc))
5020 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5021 we check if any register number in X conflicts with the relevant register
5022 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5023 contains a MEM (we don't bother checking for memory addresses that can't
5024 conflict because we expect this to be a rare case.
5026 This function is similar to reg_overlap_mention_p in rtlanal.c except
5027 that we look at equivalences for pseudos that didn't get hard registers. */
5030 reg_overlap_mentioned_for_reload_p (x, in)
5033 int regno, endregno;
5035 if (GET_CODE (x) == SUBREG)
5037 regno = REGNO (SUBREG_REG (x));
5038 if (regno < FIRST_PSEUDO_REGISTER)
5039 regno += SUBREG_WORD (x);
5041 else if (GET_CODE (x) == REG)
5045 /* If this is a pseudo, it must not have been assigned a hard register.
5046 Therefore, it must either be in memory or be a constant. */
5048 if (regno >= FIRST_PSEUDO_REGISTER)
5050 if (reg_equiv_memory_loc[regno])
5051 return refers_to_mem_for_reload_p (in);
5052 else if (reg_equiv_constant[regno])
5057 else if (CONSTANT_P (x))
5059 else if (GET_CODE (x) == MEM)
5060 return refers_to_mem_for_reload_p (in);
5061 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5062 || GET_CODE (x) == CC0)
5063 return reg_mentioned_p (x, in);
5067 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5068 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5070 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5073 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5077 refers_to_mem_for_reload_p (x)
5083 if (GET_CODE (x) == MEM)
5086 if (GET_CODE (x) == REG)
5087 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5088 && reg_equiv_memory_loc[REGNO (x)]);
5090 fmt = GET_RTX_FORMAT (GET_CODE (x));
5091 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5093 && (GET_CODE (XEXP (x, i)) == MEM
5094 || refers_to_mem_for_reload_p (XEXP (x, i))))
5100 /* Check the insns before INSN to see if there is a suitable register
5101 containing the same value as GOAL.
5102 If OTHER is -1, look for a register in class CLASS.
5103 Otherwise, just see if register number OTHER shares GOAL's value.
5105 Return an rtx for the register found, or zero if none is found.
5107 If RELOAD_REG_P is (short *)1,
5108 we reject any hard reg that appears in reload_reg_rtx
5109 because such a hard reg is also needed coming into this insn.
5111 If RELOAD_REG_P is any other nonzero value,
5112 it is a vector indexed by hard reg number
5113 and we reject any hard reg whose element in the vector is nonnegative
5114 as well as any that appears in reload_reg_rtx.
5116 If GOAL is zero, then GOALREG is a register number; we look
5117 for an equivalent for that register.
5119 MODE is the machine mode of the value we want an equivalence for.
5120 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5122 This function is used by jump.c as well as in the reload pass.
5124 If GOAL is the sum of the stack pointer and a constant, we treat it
5125 as if it were a constant except that sp is required to be unchanging. */
5128 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5131 enum reg_class class;
5133 short *reload_reg_p;
5135 enum machine_mode mode;
5137 register rtx p = insn;
5138 rtx goaltry, valtry, value, where;
5140 register int regno = -1;
5144 int goal_mem_addr_varies = 0;
5145 int need_stable_sp = 0;
5151 else if (GET_CODE (goal) == REG)
5152 regno = REGNO (goal);
5153 else if (GET_CODE (goal) == MEM)
5155 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5156 if (MEM_VOLATILE_P (goal))
5158 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5160 /* An address with side effects must be reexecuted. */
5171 else if (CONSTANT_P (goal))
5173 else if (GET_CODE (goal) == PLUS
5174 && XEXP (goal, 0) == stack_pointer_rtx
5175 && CONSTANT_P (XEXP (goal, 1)))
5176 goal_const = need_stable_sp = 1;
5180 /* On some machines, certain regs must always be rejected
5181 because they don't behave the way ordinary registers do. */
5183 #ifdef OVERLAPPING_REGNO_P
5184 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5185 && OVERLAPPING_REGNO_P (regno))
5189 /* Scan insns back from INSN, looking for one that copies
5190 a value into or out of GOAL.
5191 Stop and give up if we reach a label. */
5196 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5198 if (GET_CODE (p) == INSN
5199 /* If we don't want spill regs ... */
5200 && (! (reload_reg_p != 0
5201 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5202 /* ... then ignore insns introduced by reload; they aren't useful
5203 and can cause results in reload_as_needed to be different
5204 from what they were when calculating the need for spills.
5205 If we notice an input-reload insn here, we will reject it below,
5206 but it might hide a usable equivalent. That makes bad code.
5207 It may even abort: perhaps no reg was spilled for this insn
5208 because it was assumed we would find that equivalent. */
5209 || INSN_UID (p) < reload_first_uid))
5212 pat = single_set (p);
5213 /* First check for something that sets some reg equal to GOAL. */
5216 && true_regnum (SET_SRC (pat)) == regno
5217 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5220 && true_regnum (SET_DEST (pat)) == regno
5221 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5223 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5224 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5226 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5227 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5229 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5230 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5231 /* If we are looking for a constant,
5232 and something equivalent to that constant was copied
5233 into a reg, we can use that reg. */
5234 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5236 && rtx_equal_p (XEXP (tem, 0), goal)
5237 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5238 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5240 && GET_CODE (SET_DEST (pat)) == REG
5241 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5242 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5243 && GET_CODE (goal) == CONST_INT
5244 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5246 && rtx_equal_p (goal, goaltry)
5247 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5249 && (valueno = true_regnum (valtry)) >= 0)
5250 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5252 && GET_CODE (SET_DEST (pat)) == REG
5253 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5254 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5255 && GET_CODE (goal) == CONST_INT
5256 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5258 && rtx_equal_p (goal, goaltry)
5260 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5261 && (valueno = true_regnum (valtry)) >= 0)))
5264 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5265 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5275 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5276 (or copying VALUE into GOAL, if GOAL is also a register).
5277 Now verify that VALUE is really valid. */
5279 /* VALUENO is the register number of VALUE; a hard register. */
5281 /* Don't try to re-use something that is killed in this insn. We want
5282 to be able to trust REG_UNUSED notes. */
5283 if (find_reg_note (where, REG_UNUSED, value))
5286 /* If we propose to get the value from the stack pointer or if GOAL is
5287 a MEM based on the stack pointer, we need a stable SP. */
5288 if (valueno == STACK_POINTER_REGNUM
5289 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5293 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5294 if (GET_MODE (value) != mode)
5297 /* Reject VALUE if it was loaded from GOAL
5298 and is also a register that appears in the address of GOAL. */
5300 if (goal_mem && value == SET_DEST (PATTERN (where))
5301 && refers_to_regno_for_reload_p (valueno,
5303 + HARD_REGNO_NREGS (valueno, mode)),
5307 /* Reject registers that overlap GOAL. */
5309 if (!goal_mem && !goal_const
5310 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5311 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5314 /* Reject VALUE if it is one of the regs reserved for reloads.
5315 Reload1 knows how to reuse them anyway, and it would get
5316 confused if we allocated one without its knowledge.
5317 (Now that insns introduced by reload are ignored above,
5318 this case shouldn't happen, but I'm not positive.) */
5320 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5321 && reload_reg_p[valueno] >= 0)
5324 /* On some machines, certain regs must always be rejected
5325 because they don't behave the way ordinary registers do. */
5327 #ifdef OVERLAPPING_REGNO_P
5328 if (OVERLAPPING_REGNO_P (valueno))
5332 nregs = HARD_REGNO_NREGS (regno, mode);
5333 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5335 /* Reject VALUE if it is a register being used for an input reload
5336 even if it is not one of those reserved. */
5338 if (reload_reg_p != 0)
5341 for (i = 0; i < n_reloads; i++)
5342 if (reload_reg_rtx[i] != 0 && reload_in[i])
5344 int regno1 = REGNO (reload_reg_rtx[i]);
5345 int nregs1 = HARD_REGNO_NREGS (regno1,
5346 GET_MODE (reload_reg_rtx[i]));
5347 if (regno1 < valueno + valuenregs
5348 && regno1 + nregs1 > valueno)
5354 /* We must treat frame pointer as varying here,
5355 since it can vary--in a nonlocal goto as generated by expand_goto. */
5356 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5358 /* Now verify that the values of GOAL and VALUE remain unaltered
5359 until INSN is reached. */
5368 /* Don't trust the conversion past a function call
5369 if either of the two is in a call-clobbered register, or memory. */
5370 if (GET_CODE (p) == CALL_INSN
5371 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5372 && call_used_regs[regno])
5374 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5375 && call_used_regs[valueno])
5381 #ifdef INSN_CLOBBERS_REGNO_P
5382 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5383 && INSN_CLOBBERS_REGNO_P (p, valueno))
5384 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5385 && INSN_CLOBBERS_REGNO_P (p, regno)))
5389 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5391 /* If this insn P stores in either GOAL or VALUE, return 0.
5392 If GOAL is a memory ref and this insn writes memory, return 0.
5393 If GOAL is a memory ref and its address is not constant,
5394 and this insn P changes a register used in GOAL, return 0. */
5397 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5399 register rtx dest = SET_DEST (pat);
5400 while (GET_CODE (dest) == SUBREG
5401 || GET_CODE (dest) == ZERO_EXTRACT
5402 || GET_CODE (dest) == SIGN_EXTRACT
5403 || GET_CODE (dest) == STRICT_LOW_PART)
5404 dest = XEXP (dest, 0);
5405 if (GET_CODE (dest) == REG)
5407 register int xregno = REGNO (dest);
5409 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5410 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5413 if (xregno < regno + nregs && xregno + xnregs > regno)
5415 if (xregno < valueno + valuenregs
5416 && xregno + xnregs > valueno)
5418 if (goal_mem_addr_varies
5419 && reg_overlap_mentioned_for_reload_p (dest, goal))
5422 else if (goal_mem && GET_CODE (dest) == MEM
5423 && ! push_operand (dest, GET_MODE (dest)))
5425 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5428 else if (GET_CODE (pat) == PARALLEL)
5431 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5433 register rtx v1 = XVECEXP (pat, 0, i);
5434 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5436 register rtx dest = SET_DEST (v1);
5437 while (GET_CODE (dest) == SUBREG
5438 || GET_CODE (dest) == ZERO_EXTRACT
5439 || GET_CODE (dest) == SIGN_EXTRACT
5440 || GET_CODE (dest) == STRICT_LOW_PART)
5441 dest = XEXP (dest, 0);
5442 if (GET_CODE (dest) == REG)
5444 register int xregno = REGNO (dest);
5446 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5447 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5450 if (xregno < regno + nregs
5451 && xregno + xnregs > regno)
5453 if (xregno < valueno + valuenregs
5454 && xregno + xnregs > valueno)
5456 if (goal_mem_addr_varies
5457 && reg_overlap_mentioned_for_reload_p (dest,
5461 else if (goal_mem && GET_CODE (dest) == MEM
5462 && ! push_operand (dest, GET_MODE (dest)))
5464 else if (need_stable_sp
5465 && push_operand (dest, GET_MODE (dest)))
5472 /* If this insn auto-increments or auto-decrements
5473 either regno or valueno, return 0 now.
5474 If GOAL is a memory ref and its address is not constant,
5475 and this insn P increments a register used in GOAL, return 0. */
5479 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5480 if (REG_NOTE_KIND (link) == REG_INC
5481 && GET_CODE (XEXP (link, 0)) == REG)
5483 register int incno = REGNO (XEXP (link, 0));
5484 if (incno < regno + nregs && incno >= regno)
5486 if (incno < valueno + valuenregs && incno >= valueno)
5488 if (goal_mem_addr_varies
5489 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5499 /* Find a place where INCED appears in an increment or decrement operator
5500 within X, and return the amount INCED is incremented or decremented by.
5501 The value is always positive. */
5504 find_inc_amount (x, inced)
5507 register enum rtx_code code = GET_CODE (x);
5513 register rtx addr = XEXP (x, 0);
5514 if ((GET_CODE (addr) == PRE_DEC
5515 || GET_CODE (addr) == POST_DEC
5516 || GET_CODE (addr) == PRE_INC
5517 || GET_CODE (addr) == POST_INC)
5518 && XEXP (addr, 0) == inced)
5519 return GET_MODE_SIZE (GET_MODE (x));
5522 fmt = GET_RTX_FORMAT (code);
5523 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5527 register int tem = find_inc_amount (XEXP (x, i), inced);
5534 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5536 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5546 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5549 regno_clobbered_p (regno, insn)
5553 if (GET_CODE (PATTERN (insn)) == CLOBBER
5554 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5555 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5557 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5559 int i = XVECLEN (PATTERN (insn), 0) - 1;
5563 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5564 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5565 && REGNO (XEXP (elt, 0)) == regno)