1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This file contains subroutines used only from the file reload1.c.
21 It knows how to scan one insn for operands and values
22 that need to be copied into registers to make valid code.
23 It also finds other operands and values which are valid
24 but for which equivalent values in registers exist and
25 ought to be used instead.
27 Before processing the first insn of the function, call `init_reload'.
28 init_reload actually has to be called earlier anyway.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
72 Using a reload register for several reloads in one insn:
74 When an insn has reloads, it is considered as having three parts:
75 the input reloads, the insn itself after reloading, and the output reloads.
76 Reloads of values used in memory addresses are often needed for only one part.
78 When this is so, reload_when_needed records which part needs the reload.
79 Two reloads for different parts of the insn can share the same reload
82 When a reload is used for addresses in multiple parts, or when it is
83 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
84 a register with any other reload. */
88 /* We do not enable this with CHECKING_P, since it is awfully slow. */
93 #include "coretypes.h"
105 #include "rtl-error.h"
107 #include "addresses.h"
110 /* True if X is a constant that can be forced into the constant pool.
111 MODE is the mode of the operand, or VOIDmode if not known. */
112 #define CONST_POOL_OK_P(MODE, X) \
113 ((MODE) != VOIDmode \
115 && GET_CODE (X) != HIGH \
116 && !targetm.cannot_force_const_mem (MODE, X))
118 /* True if C is a non-empty register class that has too few registers
119 to be safely used as a reload target class. */
122 small_register_class_p (reg_class_t rclass)
124 return (reg_class_size [(int) rclass] == 1
125 || (reg_class_size [(int) rclass] >= 1
126 && targetm.class_likely_spilled_p (rclass)));
130 /* All reloads of the current insn are recorded here. See reload.h for
133 struct reload rld[MAX_RELOADS];
135 /* All the "earlyclobber" operands of the current insn
136 are recorded here. */
138 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
140 int reload_n_operands;
142 /* Replacing reloads.
144 If `replace_reloads' is nonzero, then as each reload is recorded
145 an entry is made for it in the table `replacements'.
146 Then later `subst_reloads' can look through that table and
147 perform all the replacements needed. */
149 /* Nonzero means record the places to replace. */
150 static int replace_reloads;
152 /* Each replacement is recorded with a structure like this. */
155 rtx *where; /* Location to store in */
156 int what; /* which reload this is for */
157 machine_mode mode; /* mode it must have */
160 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
162 /* Number of replacements currently recorded. */
163 static int n_replacements;
165 /* Used to track what is modified by an operand. */
168 int reg_flag; /* Nonzero if referencing a register. */
169 int safe; /* Nonzero if this can't conflict with anything. */
170 rtx base; /* Base address for MEM. */
171 HOST_WIDE_INT start; /* Starting offset or register number. */
172 HOST_WIDE_INT end; /* Ending offset or register number. */
175 /* Save MEMs needed to copy from one class of registers to another. One MEM
176 is used per mode, but normally only one or two modes are ever used.
178 We keep two versions, before and after register elimination. The one
179 after register elimination is record separately for each operand. This
180 is done in case the address is not valid to be sure that we separately
183 static rtx secondary_memlocs[NUM_MACHINE_MODES];
184 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
185 static int secondary_memlocs_elim_used = 0;
187 /* The instruction we are doing reloads for;
188 so we can test whether a register dies in it. */
189 static rtx_insn *this_insn;
191 /* Nonzero if this instruction is a user-specified asm with operands. */
192 static int this_insn_is_asm;
194 /* If hard_regs_live_known is nonzero,
195 we can tell which hard regs are currently live,
196 at least enough to succeed in choosing dummy reloads. */
197 static int hard_regs_live_known;
199 /* Indexed by hard reg number,
200 element is nonnegative if hard reg has been spilled.
201 This vector is passed to `find_reloads' as an argument
202 and is not changed here. */
203 static short *static_reload_reg_p;
205 /* Set to 1 in subst_reg_equivs if it changes anything. */
206 static int subst_reg_equivs_changed;
208 /* On return from push_reload, holds the reload-number for the OUT
209 operand, which can be different for that from the input operand. */
210 static int output_reloadnum;
212 /* Compare two RTX's. */
213 #define MATCHES(x, y) \
214 (x == y || (x != 0 && (REG_P (x) \
215 ? REG_P (y) && REGNO (x) == REGNO (y) \
216 : rtx_equal_p (x, y) && ! side_effects_p (x))))
218 /* Indicates if two reloads purposes are for similar enough things that we
219 can merge their reloads. */
220 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
221 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
222 || ((when1) == (when2) && (op1) == (op2)) \
223 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
224 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
225 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
226 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
227 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
229 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
230 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
231 ((when1) != (when2) \
232 || ! ((op1) == (op2) \
233 || (when1) == RELOAD_FOR_INPUT \
234 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
235 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
237 /* If we are going to reload an address, compute the reload type to
239 #define ADDR_TYPE(type) \
240 ((type) == RELOAD_FOR_INPUT_ADDRESS \
241 ? RELOAD_FOR_INPADDR_ADDRESS \
242 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
243 ? RELOAD_FOR_OUTADDR_ADDRESS \
246 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
247 machine_mode, enum reload_type,
248 enum insn_code *, secondary_reload_info *);
249 static enum reg_class find_valid_class (machine_mode, machine_mode,
251 static void push_replacement (rtx *, int, machine_mode);
252 static void dup_replacements (rtx *, rtx *);
253 static void combine_reloads (void);
254 static int find_reusable_reload (rtx *, rtx, enum reg_class,
255 enum reload_type, int, int);
256 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, machine_mode,
257 machine_mode, reg_class_t, int, int);
258 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
259 static struct decomposition decompose (rtx);
260 static int immune_p (rtx, rtx, struct decomposition);
261 static bool alternative_allows_const_pool_ref (rtx, const char *, int);
262 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int,
264 static rtx make_memloc (rtx, int);
265 static int maybe_memory_address_addr_space_p (machine_mode, rtx,
266 addr_space_t, rtx *);
267 static int find_reloads_address (machine_mode, rtx *, rtx, rtx *,
268 int, enum reload_type, int, rtx_insn *);
269 static rtx subst_reg_equivs (rtx, rtx_insn *);
270 static rtx subst_indexed_address (rtx);
271 static void update_auto_inc_notes (rtx_insn *, int, int);
272 static int find_reloads_address_1 (machine_mode, addr_space_t, rtx, int,
273 enum rtx_code, enum rtx_code, rtx *,
274 int, enum reload_type,int, rtx_insn *);
275 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
277 enum reload_type, int);
278 static rtx find_reloads_subreg_address (rtx, int, enum reload_type,
279 int, rtx_insn *, int *);
280 static void copy_replacements_1 (rtx *, rtx *, int);
281 static int find_inc_amount (rtx, rtx);
282 static int refers_to_mem_for_reload_p (rtx);
283 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
286 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
290 push_reg_equiv_alt_mem (int regno, rtx mem)
294 for (it = reg_equiv_alt_mem_list (regno); it; it = XEXP (it, 1))
295 if (rtx_equal_p (XEXP (it, 0), mem))
298 reg_equiv_alt_mem_list (regno)
299 = alloc_EXPR_LIST (REG_EQUIV, mem,
300 reg_equiv_alt_mem_list (regno));
303 /* Determine if any secondary reloads are needed for loading (if IN_P is
304 nonzero) or storing (if IN_P is zero) X to or from a reload register of
305 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
306 are needed, push them.
308 Return the reload number of the secondary reload we made, or -1 if
309 we didn't need one. *PICODE is set to the insn_code to use if we do
310 need a secondary reload. */
313 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
314 enum reg_class reload_class,
315 machine_mode reload_mode, enum reload_type type,
316 enum insn_code *picode, secondary_reload_info *prev_sri)
318 enum reg_class rclass = NO_REGS;
319 enum reg_class scratch_class;
320 machine_mode mode = reload_mode;
321 enum insn_code icode = CODE_FOR_nothing;
322 enum insn_code t_icode = CODE_FOR_nothing;
323 enum reload_type secondary_type;
324 int s_reload, t_reload = -1;
325 const char *scratch_constraint;
326 secondary_reload_info sri;
328 if (type == RELOAD_FOR_INPUT_ADDRESS
329 || type == RELOAD_FOR_OUTPUT_ADDRESS
330 || type == RELOAD_FOR_INPADDR_ADDRESS
331 || type == RELOAD_FOR_OUTADDR_ADDRESS)
332 secondary_type = type;
334 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
336 *picode = CODE_FOR_nothing;
338 /* If X is a paradoxical SUBREG, use the inner value to determine both the
339 mode and object being reloaded. */
340 if (paradoxical_subreg_p (x))
343 reload_mode = GET_MODE (x);
346 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
347 is still a pseudo-register by now, it *must* have an equivalent MEM
348 but we don't want to assume that), use that equivalent when seeing if
349 a secondary reload is needed since whether or not a reload is needed
350 might be sensitive to the form of the MEM. */
352 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
353 && reg_equiv_mem (REGNO (x)))
354 x = reg_equiv_mem (REGNO (x));
356 sri.icode = CODE_FOR_nothing;
357 sri.prev_sri = prev_sri;
358 rclass = (enum reg_class) targetm.secondary_reload (in_p, x, reload_class,
360 icode = (enum insn_code) sri.icode;
362 /* If we don't need any secondary registers, done. */
363 if (rclass == NO_REGS && icode == CODE_FOR_nothing)
366 if (rclass != NO_REGS)
367 t_reload = push_secondary_reload (in_p, x, opnum, optional, rclass,
368 reload_mode, type, &t_icode, &sri);
370 /* If we will be using an insn, the secondary reload is for a
373 if (icode != CODE_FOR_nothing)
375 /* If IN_P is nonzero, the reload register will be the output in
376 operand 0. If IN_P is zero, the reload register will be the input
377 in operand 1. Outputs should have an initial "=", which we must
380 /* ??? It would be useful to be able to handle only two, or more than
381 three, operands, but for now we can only handle the case of having
382 exactly three: output, input and one temp/scratch. */
383 gcc_assert (insn_data[(int) icode].n_operands == 3);
385 /* ??? We currently have no way to represent a reload that needs
386 an icode to reload from an intermediate tertiary reload register.
387 We should probably have a new field in struct reload to tag a
388 chain of scratch operand reloads onto. */
389 gcc_assert (rclass == NO_REGS);
391 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
392 gcc_assert (*scratch_constraint == '=');
393 scratch_constraint++;
394 if (*scratch_constraint == '&')
395 scratch_constraint++;
396 scratch_class = (reg_class_for_constraint
397 (lookup_constraint (scratch_constraint)));
399 rclass = scratch_class;
400 mode = insn_data[(int) icode].operand[2].mode;
403 /* This case isn't valid, so fail. Reload is allowed to use the same
404 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
405 in the case of a secondary register, we actually need two different
406 registers for correct code. We fail here to prevent the possibility of
407 silently generating incorrect code later.
409 The convention is that secondary input reloads are valid only if the
410 secondary_class is different from class. If you have such a case, you
411 can not use secondary reloads, you must work around the problem some
414 Allow this when a reload_in/out pattern is being used. I.e. assume
415 that the generated code handles this case. */
417 gcc_assert (!in_p || rclass != reload_class || icode != CODE_FOR_nothing
418 || t_icode != CODE_FOR_nothing);
420 /* See if we can reuse an existing secondary reload. */
421 for (s_reload = 0; s_reload < n_reloads; s_reload++)
422 if (rld[s_reload].secondary_p
423 && (reg_class_subset_p (rclass, rld[s_reload].rclass)
424 || reg_class_subset_p (rld[s_reload].rclass, rclass))
425 && ((in_p && rld[s_reload].inmode == mode)
426 || (! in_p && rld[s_reload].outmode == mode))
427 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
428 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
429 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
430 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
431 && (small_register_class_p (rclass)
432 || targetm.small_register_classes_for_mode_p (VOIDmode))
433 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
434 opnum, rld[s_reload].opnum))
437 rld[s_reload].inmode = mode;
439 rld[s_reload].outmode = mode;
441 if (reg_class_subset_p (rclass, rld[s_reload].rclass))
442 rld[s_reload].rclass = rclass;
444 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
445 rld[s_reload].optional &= optional;
446 rld[s_reload].secondary_p = 1;
447 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
448 opnum, rld[s_reload].opnum))
449 rld[s_reload].when_needed = RELOAD_OTHER;
454 if (s_reload == n_reloads)
456 /* If we need a memory location to copy between the two reload regs,
457 set it up now. Note that we do the input case before making
458 the reload and the output case after. This is due to the
459 way reloads are output. */
461 if (in_p && icode == CODE_FOR_nothing
462 && targetm.secondary_memory_needed (mode, rclass, reload_class))
464 get_secondary_mem (x, reload_mode, opnum, type);
466 /* We may have just added new reloads. Make sure we add
467 the new reload at the end. */
468 s_reload = n_reloads;
471 /* We need to make a new secondary reload for this register class. */
472 rld[s_reload].in = rld[s_reload].out = 0;
473 rld[s_reload].rclass = rclass;
475 rld[s_reload].inmode = in_p ? mode : VOIDmode;
476 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
477 rld[s_reload].reg_rtx = 0;
478 rld[s_reload].optional = optional;
479 rld[s_reload].inc = 0;
480 /* Maybe we could combine these, but it seems too tricky. */
481 rld[s_reload].nocombine = 1;
482 rld[s_reload].in_reg = 0;
483 rld[s_reload].out_reg = 0;
484 rld[s_reload].opnum = opnum;
485 rld[s_reload].when_needed = secondary_type;
486 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
487 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
488 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
489 rld[s_reload].secondary_out_icode
490 = ! in_p ? t_icode : CODE_FOR_nothing;
491 rld[s_reload].secondary_p = 1;
495 if (! in_p && icode == CODE_FOR_nothing
496 && targetm.secondary_memory_needed (mode, reload_class, rclass))
497 get_secondary_mem (x, mode, opnum, type);
504 /* If a secondary reload is needed, return its class. If both an intermediate
505 register and a scratch register is needed, we return the class of the
506 intermediate register. */
508 secondary_reload_class (bool in_p, reg_class_t rclass, machine_mode mode,
511 enum insn_code icode;
512 secondary_reload_info sri;
514 sri.icode = CODE_FOR_nothing;
517 = (enum reg_class) targetm.secondary_reload (in_p, x, rclass, mode, &sri);
518 icode = (enum insn_code) sri.icode;
520 /* If there are no secondary reloads at all, we return NO_REGS.
521 If an intermediate register is needed, we return its class. */
522 if (icode == CODE_FOR_nothing || rclass != NO_REGS)
525 /* No intermediate register is needed, but we have a special reload
526 pattern, which we assume for now needs a scratch register. */
527 return scratch_reload_class (icode);
530 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
531 three operands, verify that operand 2 is an output operand, and return
533 ??? We'd like to be able to handle any pattern with at least 2 operands,
534 for zero or more scratch registers, but that needs more infrastructure. */
536 scratch_reload_class (enum insn_code icode)
538 const char *scratch_constraint;
539 enum reg_class rclass;
541 gcc_assert (insn_data[(int) icode].n_operands == 3);
542 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
543 gcc_assert (*scratch_constraint == '=');
544 scratch_constraint++;
545 if (*scratch_constraint == '&')
546 scratch_constraint++;
547 rclass = reg_class_for_constraint (lookup_constraint (scratch_constraint));
548 gcc_assert (rclass != NO_REGS);
552 /* Return a memory location that will be used to copy X in mode MODE.
553 If we haven't already made a location for this mode in this insn,
554 call find_reloads_address on the location being returned. */
557 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, machine_mode mode,
558 int opnum, enum reload_type type)
563 /* By default, if MODE is narrower than a word, widen it to a word.
564 This is required because most machines that require these memory
565 locations do not support short load and stores from all registers
566 (e.g., FP registers). */
568 mode = targetm.secondary_memory_needed_mode (mode);
570 /* If we already have made a MEM for this operand in MODE, return it. */
571 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
572 return secondary_memlocs_elim[(int) mode][opnum];
574 /* If this is the first time we've tried to get a MEM for this mode,
575 allocate a new one. `something_changed' in reload will get set
576 by noticing that the frame size has changed. */
578 if (secondary_memlocs[(int) mode] == 0)
580 #ifdef SECONDARY_MEMORY_NEEDED_RTX
581 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
583 secondary_memlocs[(int) mode]
584 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
588 /* Get a version of the address doing any eliminations needed. If that
589 didn't give us a new MEM, make a new one if it isn't valid. */
591 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
592 mem_valid = strict_memory_address_addr_space_p (mode, XEXP (loc, 0),
593 MEM_ADDR_SPACE (loc));
595 if (! mem_valid && loc == secondary_memlocs[(int) mode])
596 loc = copy_rtx (loc);
598 /* The only time the call below will do anything is if the stack
599 offset is too large. In that case IND_LEVELS doesn't matter, so we
600 can just pass a zero. Adjust the type to be the address of the
601 corresponding object. If the address was valid, save the eliminated
602 address. If it wasn't valid, we need to make a reload each time, so
607 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
608 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
611 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
615 secondary_memlocs_elim[(int) mode][opnum] = loc;
616 if (secondary_memlocs_elim_used <= (int)mode)
617 secondary_memlocs_elim_used = (int)mode + 1;
621 /* Clear any secondary memory locations we've made. */
624 clear_secondary_mem (void)
626 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
630 /* Find the largest class which has at least one register valid in
631 mode INNER, and which for every such register, that register number
632 plus N is also valid in OUTER (if in range) and is cheap to move
633 into REGNO. Such a class must exist. */
635 static enum reg_class
636 find_valid_class (machine_mode outer ATTRIBUTE_UNUSED,
637 machine_mode inner ATTRIBUTE_UNUSED, int n,
638 unsigned int dest_regno ATTRIBUTE_UNUSED)
643 enum reg_class best_class = NO_REGS;
644 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
645 unsigned int best_size = 0;
648 for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
652 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
653 if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno))
655 if (targetm.hard_regno_mode_ok (regno, inner))
658 if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno + n)
659 && !targetm.hard_regno_mode_ok (regno + n, outer))
666 cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);
668 if ((reg_class_size[rclass] > best_size
669 && (best_cost < 0 || best_cost >= cost))
672 best_class = (enum reg_class) rclass;
673 best_size = reg_class_size[rclass];
674 best_cost = register_move_cost (outer, (enum reg_class) rclass,
679 gcc_assert (best_size != 0);
684 /* We are trying to reload a subreg of something that is not a register.
685 Find the largest class which contains only registers valid in
686 mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
687 which we would eventually like to obtain the object. */
689 static enum reg_class
690 find_valid_class_1 (machine_mode outer ATTRIBUTE_UNUSED,
691 machine_mode mode ATTRIBUTE_UNUSED,
692 enum reg_class dest_class ATTRIBUTE_UNUSED)
697 enum reg_class best_class = NO_REGS;
698 unsigned int best_size = 0;
701 for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
703 unsigned int computed_rclass_size = 0;
705 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
707 if (in_hard_reg_set_p (reg_class_contents[rclass], mode, regno)
708 && targetm.hard_regno_mode_ok (regno, mode))
709 computed_rclass_size++;
712 cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);
714 if ((computed_rclass_size > best_size
715 && (best_cost < 0 || best_cost >= cost))
718 best_class = (enum reg_class) rclass;
719 best_size = computed_rclass_size;
720 best_cost = register_move_cost (outer, (enum reg_class) rclass,
725 gcc_assert (best_size != 0);
727 #ifdef LIMIT_RELOAD_CLASS
728 best_class = LIMIT_RELOAD_CLASS (mode, best_class);
733 /* Return the number of a previously made reload that can be combined with
734 a new one, or n_reloads if none of the existing reloads can be used.
735 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
736 push_reload, they determine the kind of the new reload that we try to
737 combine. P_IN points to the corresponding value of IN, which can be
738 modified by this function.
739 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
742 find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
743 enum reload_type type, int opnum, int dont_share)
747 /* We can't merge two reloads if the output of either one is
750 if (earlyclobber_operand_p (out))
753 /* We can use an existing reload if the class is right
754 and at least one of IN and OUT is a match
755 and the other is at worst neutral.
756 (A zero compared against anything is neutral.)
758 For targets with small register classes, don't use existing reloads
759 unless they are for the same thing since that can cause us to need
760 more reload registers than we otherwise would. */
762 for (i = 0; i < n_reloads; i++)
763 if ((reg_class_subset_p (rclass, rld[i].rclass)
764 || reg_class_subset_p (rld[i].rclass, rclass))
765 /* If the existing reload has a register, it must fit our class. */
766 && (rld[i].reg_rtx == 0
767 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
768 true_regnum (rld[i].reg_rtx)))
769 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
770 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
771 || (out != 0 && MATCHES (rld[i].out, out)
772 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
773 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
774 && (small_register_class_p (rclass)
775 || targetm.small_register_classes_for_mode_p (VOIDmode))
776 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
779 /* Reloading a plain reg for input can match a reload to postincrement
780 that reg, since the postincrement's value is the right value.
781 Likewise, it can match a preincrement reload, since we regard
782 the preincrementation as happening before any ref in this insn
784 for (i = 0; i < n_reloads; i++)
785 if ((reg_class_subset_p (rclass, rld[i].rclass)
786 || reg_class_subset_p (rld[i].rclass, rclass))
787 /* If the existing reload has a register, it must fit our
789 && (rld[i].reg_rtx == 0
790 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
791 true_regnum (rld[i].reg_rtx)))
792 && out == 0 && rld[i].out == 0 && rld[i].in != 0
794 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
795 && MATCHES (XEXP (rld[i].in, 0), in))
796 || (REG_P (rld[i].in)
797 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
798 && MATCHES (XEXP (in, 0), rld[i].in)))
799 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
800 && (small_register_class_p (rclass)
801 || targetm.small_register_classes_for_mode_p (VOIDmode))
802 && MERGABLE_RELOADS (type, rld[i].when_needed,
803 opnum, rld[i].opnum))
805 /* Make sure reload_in ultimately has the increment,
806 not the plain register. */
814 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
815 expression. MODE is the mode that X will be used in. OUTPUT is true if
816 the function is invoked for the output part of an enclosing reload. */
819 reload_inner_reg_of_subreg (rtx x, machine_mode mode, bool output)
823 /* Only SUBREGs are problematical. */
824 if (GET_CODE (x) != SUBREG)
827 inner = SUBREG_REG (x);
829 /* If INNER is a constant or PLUS, then INNER will need reloading. */
830 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
833 /* If INNER is not a hard register, then INNER will not need reloading. */
834 if (!(REG_P (inner) && HARD_REGISTER_P (inner)))
837 /* If INNER is not ok for MODE, then INNER will need reloading. */
838 if (!targetm.hard_regno_mode_ok (subreg_regno (x), mode))
841 /* If this is for an output, and the outer part is a word or smaller,
842 INNER is larger than a word and the number of registers in INNER is
843 not the same as the number of words in INNER, then INNER will need
844 reloading (with an in-out reload). */
846 && GET_MODE_SIZE (mode) <= UNITS_PER_WORD
847 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
848 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
849 != REG_NREGS (inner)));
852 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
853 requiring an extra reload register. The caller has already found that
854 IN contains some reference to REGNO, so check that we can produce the
855 new value in a single step. E.g. if we have
856 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
857 instruction that adds one to a register, this should succeed.
858 However, if we have something like
859 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
860 needs to be loaded into a register first, we need a separate reload
862 Such PLUS reloads are generated by find_reload_address_part.
863 The out-of-range PLUS expressions are usually introduced in the instruction
864 patterns by register elimination and substituting pseudos without a home
865 by their function-invariant equivalences. */
867 can_reload_into (rtx in, int regno, machine_mode mode)
872 struct recog_data_d save_recog_data;
874 /* For matching constraints, we often get notional input reloads where
875 we want to use the original register as the reload register. I.e.
876 technically this is a non-optional input-output reload, but IN is
877 already a valid register, and has been chosen as the reload register.
878 Speed this up, since it trivially works. */
882 /* To test MEMs properly, we'd have to take into account all the reloads
883 that are already scheduled, which can become quite complicated.
884 And since we've already handled address reloads for this MEM, it
885 should always succeed anyway. */
889 /* If we can make a simple SET insn that does the job, everything should
891 dst = gen_rtx_REG (mode, regno);
892 test_insn = make_insn_raw (gen_rtx_SET (dst, in));
893 save_recog_data = recog_data;
894 if (recog_memoized (test_insn) >= 0)
896 extract_insn (test_insn);
897 r = constrain_operands (1, get_enabled_alternatives (test_insn));
899 recog_data = save_recog_data;
903 /* Record one reload that needs to be performed.
904 IN is an rtx saying where the data are to be found before this instruction.
905 OUT says where they must be stored after the instruction.
906 (IN is zero for data not read, and OUT is zero for data not written.)
907 INLOC and OUTLOC point to the places in the instructions where
908 IN and OUT were found.
909 If IN and OUT are both nonzero, it means the same register must be used
910 to reload both IN and OUT.
912 RCLASS is a register class required for the reloaded data.
913 INMODE is the machine mode that the instruction requires
914 for the reg that replaces IN and OUTMODE is likewise for OUT.
916 If IN is zero, then OUT's location and mode should be passed as
919 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
921 OPTIONAL nonzero means this reload does not need to be performed:
922 it can be discarded if that is more convenient.
924 OPNUM and TYPE say what the purpose of this reload is.
926 The return value is the reload-number for this reload.
928 If both IN and OUT are nonzero, in some rare cases we might
929 want to make two separate reloads. (Actually we never do this now.)
930 Therefore, the reload-number for OUT is stored in
931 output_reloadnum when we return; the return value applies to IN.
932 Usually (presently always), when IN and OUT are nonzero,
933 the two reload-numbers are equal, but the caller should be careful to
937 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
938 enum reg_class rclass, machine_mode inmode,
939 machine_mode outmode, int strict_low, int optional,
940 int opnum, enum reload_type type)
944 int dont_remove_subreg = 0;
945 #ifdef LIMIT_RELOAD_CLASS
946 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
948 int secondary_in_reload = -1, secondary_out_reload = -1;
949 enum insn_code secondary_in_icode = CODE_FOR_nothing;
950 enum insn_code secondary_out_icode = CODE_FOR_nothing;
951 enum reg_class subreg_in_class ATTRIBUTE_UNUSED;
952 subreg_in_class = NO_REGS;
954 /* INMODE and/or OUTMODE could be VOIDmode if no mode
955 has been specified for the operand. In that case,
956 use the operand's mode as the mode to reload. */
957 if (inmode == VOIDmode && in != 0)
958 inmode = GET_MODE (in);
959 if (outmode == VOIDmode && out != 0)
960 outmode = GET_MODE (out);
962 /* If find_reloads and friends until now missed to replace a pseudo
963 with a constant of reg_equiv_constant something went wrong
965 Note that it can't simply be done here if we missed it earlier
966 since the constant might need to be pushed into the literal pool
967 and the resulting memref would probably need further
969 if (in != 0 && REG_P (in))
971 int regno = REGNO (in);
973 gcc_assert (regno < FIRST_PSEUDO_REGISTER
974 || reg_renumber[regno] >= 0
975 || reg_equiv_constant (regno) == NULL_RTX);
978 /* reg_equiv_constant only contains constants which are obviously
979 not appropriate as destination. So if we would need to replace
980 the destination pseudo with a constant we are in real
982 if (out != 0 && REG_P (out))
984 int regno = REGNO (out);
986 gcc_assert (regno < FIRST_PSEUDO_REGISTER
987 || reg_renumber[regno] >= 0
988 || reg_equiv_constant (regno) == NULL_RTX);
991 /* If we have a read-write operand with an address side-effect,
992 change either IN or OUT so the side-effect happens only once. */
993 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
994 switch (GET_CODE (XEXP (in, 0)))
996 case POST_INC: case POST_DEC: case POST_MODIFY:
997 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
1000 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
1001 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
1008 /* If we are reloading a (SUBREG constant ...), really reload just the
1009 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
1010 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
1011 a pseudo and hence will become a MEM) with M1 wider than M2 and the
1012 register is a pseudo, also reload the inside expression.
1013 For machines that extend byte loads, do this for any SUBREG of a pseudo
1014 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
1015 M2 is an integral mode that gets extended when loaded.
1016 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1017 where either M1 is not valid for R or M2 is wider than a word but we
1018 only need one register to store an M2-sized quantity in R.
1019 (However, if OUT is nonzero, we need to reload the reg *and*
1020 the subreg, so do nothing here, and let following statement handle it.)
1022 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1023 we can't handle it here because CONST_INT does not indicate a mode.
1025 Similarly, we must reload the inside expression if we have a
1026 STRICT_LOW_PART (presumably, in == out in this case).
1028 Also reload the inner expression if it does not require a secondary
1029 reload but the SUBREG does.
1031 Finally, reload the inner expression if it is a register that is in
1032 the class whose registers cannot be referenced in a different size
1033 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1034 cannot reload just the inside since we might end up with the wrong
1035 register class. But if it is inside a STRICT_LOW_PART, we have
1036 no choice, so we hope we do get the right register class there. */
1038 scalar_int_mode inner_mode;
1039 if (in != 0 && GET_CODE (in) == SUBREG
1040 && (subreg_lowpart_p (in) || strict_low)
1041 && targetm.can_change_mode_class (GET_MODE (SUBREG_REG (in)),
1043 && contains_allocatable_reg_of_mode[rclass][GET_MODE (SUBREG_REG (in))]
1044 && (CONSTANT_P (SUBREG_REG (in))
1045 || GET_CODE (SUBREG_REG (in)) == PLUS
1047 || (((REG_P (SUBREG_REG (in))
1048 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1049 || MEM_P (SUBREG_REG (in)))
1050 && (paradoxical_subreg_p (inmode, GET_MODE (SUBREG_REG (in)))
1051 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1052 && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (in)),
1054 && GET_MODE_SIZE (inner_mode) <= UNITS_PER_WORD
1055 && paradoxical_subreg_p (inmode, inner_mode)
1056 && LOAD_EXTEND_OP (inner_mode) != UNKNOWN)
1057 || (WORD_REGISTER_OPERATIONS
1058 && partial_subreg_p (inmode, GET_MODE (SUBREG_REG (in)))
1059 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1060 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1061 / UNITS_PER_WORD)))))
1062 || (REG_P (SUBREG_REG (in))
1063 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1064 /* The case where out is nonzero
1065 is handled differently in the following statement. */
1066 && (out == 0 || subreg_lowpart_p (in))
1067 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1068 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1070 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1072 != REG_NREGS (SUBREG_REG (in))))
1073 || !targetm.hard_regno_mode_ok (subreg_regno (in), inmode)))
1074 || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS
1075 && (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)),
1078 || (REG_P (SUBREG_REG (in))
1079 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1080 && !REG_CAN_CHANGE_MODE_P (REGNO (SUBREG_REG (in)),
1081 GET_MODE (SUBREG_REG (in)), inmode))))
1083 #ifdef LIMIT_RELOAD_CLASS
1084 in_subreg_loc = inloc;
1086 inloc = &SUBREG_REG (in);
1089 if (!WORD_REGISTER_OPERATIONS
1090 && LOAD_EXTEND_OP (GET_MODE (in)) == UNKNOWN
1092 /* This is supposed to happen only for paradoxical subregs made by
1093 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1094 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1096 inmode = GET_MODE (in);
1099 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1100 where M1 is not valid for R if it was not handled by the code above.
1102 Similar issue for (SUBREG constant ...) if it was not handled by the
1103 code above. This can happen if SUBREG_BYTE != 0.
1105 However, we must reload the inner reg *as well as* the subreg in
1108 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, false))
1110 if (REG_P (SUBREG_REG (in)))
1112 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1113 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1114 GET_MODE (SUBREG_REG (in)),
1117 REGNO (SUBREG_REG (in)));
1118 else if (CONSTANT_P (SUBREG_REG (in))
1119 || GET_CODE (SUBREG_REG (in)) == PLUS)
1120 subreg_in_class = find_valid_class_1 (inmode,
1121 GET_MODE (SUBREG_REG (in)),
1124 /* This relies on the fact that emit_reload_insns outputs the
1125 instructions for input reloads of type RELOAD_OTHER in the same
1126 order as the reloads. Thus if the outer reload is also of type
1127 RELOAD_OTHER, we are guaranteed that this inner reload will be
1128 output before the outer reload. */
1129 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1130 subreg_in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1131 dont_remove_subreg = 1;
1134 /* Similarly for paradoxical and problematical SUBREGs on the output.
1135 Note that there is no reason we need worry about the previous value
1136 of SUBREG_REG (out); even if wider than out, storing in a subreg is
1137 entitled to clobber it all (except in the case of a word mode subreg
1138 or of a STRICT_LOW_PART, in that latter case the constraint should
1139 label it input-output.) */
1140 if (out != 0 && GET_CODE (out) == SUBREG
1141 && (subreg_lowpart_p (out) || strict_low)
1142 && targetm.can_change_mode_class (GET_MODE (SUBREG_REG (out)),
1144 && contains_allocatable_reg_of_mode[rclass][GET_MODE (SUBREG_REG (out))]
1145 && (CONSTANT_P (SUBREG_REG (out))
1147 || (((REG_P (SUBREG_REG (out))
1148 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1149 || MEM_P (SUBREG_REG (out)))
1150 && (paradoxical_subreg_p (outmode, GET_MODE (SUBREG_REG (out)))
1151 || (WORD_REGISTER_OPERATIONS
1152 && partial_subreg_p (outmode, GET_MODE (SUBREG_REG (out)))
1153 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1154 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1155 / UNITS_PER_WORD)))))
1156 || (REG_P (SUBREG_REG (out))
1157 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1158 /* The case of a word mode subreg
1159 is handled differently in the following statement. */
1160 && ! (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1161 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1163 && !targetm.hard_regno_mode_ok (subreg_regno (out), outmode))
1164 || (secondary_reload_class (0, rclass, outmode, out) != NO_REGS
1165 && (secondary_reload_class (0, rclass, GET_MODE (SUBREG_REG (out)),
1168 || (REG_P (SUBREG_REG (out))
1169 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1170 && !REG_CAN_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1171 GET_MODE (SUBREG_REG (out)),
1174 #ifdef LIMIT_RELOAD_CLASS
1175 out_subreg_loc = outloc;
1177 outloc = &SUBREG_REG (out);
1179 gcc_assert (WORD_REGISTER_OPERATIONS || !MEM_P (out)
1180 || GET_MODE_SIZE (GET_MODE (out))
1181 <= GET_MODE_SIZE (outmode));
1182 outmode = GET_MODE (out);
1185 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1186 where either M1 is not valid for R or M2 is wider than a word but we
1187 only need one register to store an M2-sized quantity in R.
1189 However, we must reload the inner reg *as well as* the subreg in
1190 that case and the inner reg is an in-out reload. */
1192 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, true))
1194 enum reg_class in_out_class
1195 = find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1196 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1197 GET_MODE (SUBREG_REG (out)),
1200 REGNO (SUBREG_REG (out)));
1202 /* This relies on the fact that emit_reload_insns outputs the
1203 instructions for output reloads of type RELOAD_OTHER in reverse
1204 order of the reloads. Thus if the outer reload is also of type
1205 RELOAD_OTHER, we are guaranteed that this inner reload will be
1206 output after the outer reload. */
1207 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1208 &SUBREG_REG (out), in_out_class, VOIDmode, VOIDmode,
1209 0, 0, opnum, RELOAD_OTHER);
1210 dont_remove_subreg = 1;
1213 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1214 if (in != 0 && out != 0 && MEM_P (out)
1215 && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1216 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1219 /* If IN is a SUBREG of a hard register, make a new REG. This
1220 simplifies some of the cases below. */
1222 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1223 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1224 && ! dont_remove_subreg)
1225 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1227 /* Similarly for OUT. */
1228 if (out != 0 && GET_CODE (out) == SUBREG
1229 && REG_P (SUBREG_REG (out))
1230 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1231 && ! dont_remove_subreg)
1232 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1234 /* Narrow down the class of register wanted if that is
1235 desirable on this machine for efficiency. */
1237 reg_class_t preferred_class = rclass;
1240 preferred_class = targetm.preferred_reload_class (in, rclass);
1242 /* Output reloads may need analogous treatment, different in detail. */
1245 = targetm.preferred_output_reload_class (out, preferred_class);
1247 /* Discard what the target said if we cannot do it. */
1248 if (preferred_class != NO_REGS
1249 || (optional && type == RELOAD_FOR_OUTPUT))
1250 rclass = (enum reg_class) preferred_class;
1253 /* Make sure we use a class that can handle the actual pseudo
1254 inside any subreg. For example, on the 386, QImode regs
1255 can appear within SImode subregs. Although GENERAL_REGS
1256 can handle SImode, QImode needs a smaller class. */
1257 #ifdef LIMIT_RELOAD_CLASS
1259 rclass = LIMIT_RELOAD_CLASS (inmode, rclass);
1260 else if (in != 0 && GET_CODE (in) == SUBREG)
1261 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), rclass);
1264 rclass = LIMIT_RELOAD_CLASS (outmode, rclass);
1265 if (out != 0 && GET_CODE (out) == SUBREG)
1266 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), rclass);
1269 /* Verify that this class is at least possible for the mode that
1271 if (this_insn_is_asm)
1274 if (paradoxical_subreg_p (inmode, outmode))
1278 if (mode == VOIDmode)
1280 error_for_asm (this_insn, "cannot reload integer constant "
1281 "operand in %<asm%>");
1286 outmode = word_mode;
1288 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1289 if (targetm.hard_regno_mode_ok (i, mode)
1290 && in_hard_reg_set_p (reg_class_contents[(int) rclass], mode, i))
1292 if (i == FIRST_PSEUDO_REGISTER)
1294 error_for_asm (this_insn, "impossible register constraint "
1296 /* Avoid further trouble with this insn. */
1297 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1298 /* We used to continue here setting class to ALL_REGS, but it triggers
1299 sanity check on i386 for:
1300 void foo(long double d)
1304 Returning zero here ought to be safe as we take care in
1305 find_reloads to not process the reloads when instruction was
1312 /* Optional output reloads are always OK even if we have no register class,
1313 since the function of these reloads is only to have spill_reg_store etc.
1314 set, so that the storing insn can be deleted later. */
1315 gcc_assert (rclass != NO_REGS
1316 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1318 i = find_reusable_reload (&in, out, rclass, type, opnum, dont_share);
1322 /* See if we need a secondary reload register to move between CLASS
1323 and IN or CLASS and OUT. Get the icode and push any required reloads
1324 needed for each of them if so. */
1328 = push_secondary_reload (1, in, opnum, optional, rclass, inmode, type,
1329 &secondary_in_icode, NULL);
1330 if (out != 0 && GET_CODE (out) != SCRATCH)
1331 secondary_out_reload
1332 = push_secondary_reload (0, out, opnum, optional, rclass, outmode,
1333 type, &secondary_out_icode, NULL);
1335 /* We found no existing reload suitable for re-use.
1336 So add an additional reload. */
1338 if (subreg_in_class == NO_REGS
1341 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1342 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER)
1343 subreg_in_class = REGNO_REG_CLASS (reg_or_subregno (in));
1344 /* If a memory location is needed for the copy, make one. */
1345 if (subreg_in_class != NO_REGS
1346 && targetm.secondary_memory_needed (inmode, subreg_in_class, rclass))
1347 get_secondary_mem (in, inmode, opnum, type);
1352 rld[i].rclass = rclass;
1353 rld[i].inmode = inmode;
1354 rld[i].outmode = outmode;
1356 rld[i].optional = optional;
1358 rld[i].nocombine = 0;
1359 rld[i].in_reg = inloc ? *inloc : 0;
1360 rld[i].out_reg = outloc ? *outloc : 0;
1361 rld[i].opnum = opnum;
1362 rld[i].when_needed = type;
1363 rld[i].secondary_in_reload = secondary_in_reload;
1364 rld[i].secondary_out_reload = secondary_out_reload;
1365 rld[i].secondary_in_icode = secondary_in_icode;
1366 rld[i].secondary_out_icode = secondary_out_icode;
1367 rld[i].secondary_p = 0;
1373 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1374 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1375 && (targetm.secondary_memory_needed
1376 (outmode, rclass, REGNO_REG_CLASS (reg_or_subregno (out)))))
1377 get_secondary_mem (out, outmode, opnum, type);
1381 /* We are reusing an existing reload,
1382 but we may have additional information for it.
1383 For example, we may now have both IN and OUT
1384 while the old one may have just one of them. */
1386 /* The modes can be different. If they are, we want to reload in
1387 the larger mode, so that the value is valid for both modes. */
1388 if (inmode != VOIDmode
1389 && partial_subreg_p (rld[i].inmode, inmode))
1390 rld[i].inmode = inmode;
1391 if (outmode != VOIDmode
1392 && partial_subreg_p (rld[i].outmode, outmode))
1393 rld[i].outmode = outmode;
1396 rtx in_reg = inloc ? *inloc : 0;
1397 /* If we merge reloads for two distinct rtl expressions that
1398 are identical in content, there might be duplicate address
1399 reloads. Remove the extra set now, so that if we later find
1400 that we can inherit this reload, we can get rid of the
1401 address reloads altogether.
1403 Do not do this if both reloads are optional since the result
1404 would be an optional reload which could potentially leave
1405 unresolved address replacements.
1407 It is not sufficient to call transfer_replacements since
1408 choose_reload_regs will remove the replacements for address
1409 reloads of inherited reloads which results in the same
1411 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1412 && ! (rld[i].optional && optional))
1414 /* We must keep the address reload with the lower operand
1416 if (opnum > rld[i].opnum)
1418 remove_address_replacements (in);
1420 in_reg = rld[i].in_reg;
1423 remove_address_replacements (rld[i].in);
1425 /* When emitting reloads we don't necessarily look at the in-
1426 and outmode, but also directly at the operands (in and out).
1427 So we can't simply overwrite them with whatever we have found
1428 for this (to-be-merged) reload, we have to "merge" that too.
1429 Reusing another reload already verified that we deal with the
1430 same operands, just possibly in different modes. So we
1431 overwrite the operands only when the new mode is larger.
1432 See also PR33613. */
1434 || partial_subreg_p (GET_MODE (rld[i].in), GET_MODE (in)))
1438 && partial_subreg_p (GET_MODE (rld[i].in_reg),
1439 GET_MODE (in_reg))))
1440 rld[i].in_reg = in_reg;
1446 && partial_subreg_p (GET_MODE (rld[i].out),
1451 || partial_subreg_p (GET_MODE (rld[i].out_reg),
1452 GET_MODE (*outloc))))
1453 rld[i].out_reg = *outloc;
1455 if (reg_class_subset_p (rclass, rld[i].rclass))
1456 rld[i].rclass = rclass;
1457 rld[i].optional &= optional;
1458 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1459 opnum, rld[i].opnum))
1460 rld[i].when_needed = RELOAD_OTHER;
1461 rld[i].opnum = MIN (rld[i].opnum, opnum);
1464 /* If the ostensible rtx being reloaded differs from the rtx found
1465 in the location to substitute, this reload is not safe to combine
1466 because we cannot reliably tell whether it appears in the insn. */
1468 if (in != 0 && in != *inloc)
1469 rld[i].nocombine = 1;
1472 /* This was replaced by changes in find_reloads_address_1 and the new
1473 function inc_for_reload, which go with a new meaning of reload_inc. */
1475 /* If this is an IN/OUT reload in an insn that sets the CC,
1476 it must be for an autoincrement. It doesn't work to store
1477 the incremented value after the insn because that would clobber the CC.
1478 So we must do the increment of the value reloaded from,
1479 increment it, store it back, then decrement again. */
1480 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1484 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1485 /* If we did not find a nonzero amount-to-increment-by,
1486 that contradicts the belief that IN is being incremented
1487 in an address in this insn. */
1488 gcc_assert (rld[i].inc != 0);
1492 /* If we will replace IN and OUT with the reload-reg,
1493 record where they are located so that substitution need
1494 not do a tree walk. */
1496 if (replace_reloads)
1500 struct replacement *r = &replacements[n_replacements++];
1505 if (outloc != 0 && outloc != inloc)
1507 struct replacement *r = &replacements[n_replacements++];
1514 /* If this reload is just being introduced and it has both
1515 an incoming quantity and an outgoing quantity that are
1516 supposed to be made to match, see if either one of the two
1517 can serve as the place to reload into.
1519 If one of them is acceptable, set rld[i].reg_rtx
1522 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1524 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1527 earlyclobber_operand_p (out));
1529 /* If the outgoing register already contains the same value
1530 as the incoming one, we can dispense with loading it.
1531 The easiest way to tell the caller that is to give a phony
1532 value for the incoming operand (same as outgoing one). */
1533 if (rld[i].reg_rtx == out
1534 && (REG_P (in) || CONSTANT_P (in))
1535 && find_equiv_reg (in, this_insn, NO_REGS, REGNO (out),
1536 static_reload_reg_p, i, inmode) != 0)
1540 /* If this is an input reload and the operand contains a register that
1541 dies in this insn and is used nowhere else, see if it is the right class
1542 to be used for this reload. Use it if so. (This occurs most commonly
1543 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1544 this if it is also an output reload that mentions the register unless
1545 the output is a SUBREG that clobbers an entire register.
1547 Note that the operand might be one of the spill regs, if it is a
1548 pseudo reg and we are in a block where spilling has not taken place.
1549 But if there is no spilling in this block, that is OK.
1550 An explicitly used hard reg cannot be a spill reg. */
1552 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1556 machine_mode rel_mode = inmode;
1558 if (out && partial_subreg_p (rel_mode, outmode))
1561 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1562 if (REG_NOTE_KIND (note) == REG_DEAD
1563 && REG_P (XEXP (note, 0))
1564 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1565 && reg_mentioned_p (XEXP (note, 0), in)
1566 /* Check that a former pseudo is valid; see find_dummy_reload. */
1567 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1568 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
1569 ORIGINAL_REGNO (XEXP (note, 0)))
1570 && REG_NREGS (XEXP (note, 0)) == 1))
1571 && ! refers_to_regno_for_reload_p (regno,
1572 end_hard_regno (rel_mode,
1574 PATTERN (this_insn), inloc)
1575 && ! find_reg_fusage (this_insn, USE, XEXP (note, 0))
1576 /* If this is also an output reload, IN cannot be used as
1577 the reload register if it is set in this insn unless IN
1579 && (out == 0 || in == out
1580 || ! hard_reg_set_here_p (regno,
1581 end_hard_regno (rel_mode, regno),
1582 PATTERN (this_insn)))
1583 /* ??? Why is this code so different from the previous?
1584 Is there any simple coherent way to describe the two together?
1585 What's going on here. */
1587 || (GET_CODE (in) == SUBREG
1588 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1590 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1591 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1592 /* Make sure the operand fits in the reg that dies. */
1593 && (GET_MODE_SIZE (rel_mode)
1594 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1595 && targetm.hard_regno_mode_ok (regno, inmode)
1596 && targetm.hard_regno_mode_ok (regno, outmode))
1599 unsigned int nregs = MAX (hard_regno_nregs (regno, inmode),
1600 hard_regno_nregs (regno, outmode));
1602 for (offs = 0; offs < nregs; offs++)
1603 if (fixed_regs[regno + offs]
1604 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1609 && (! (refers_to_regno_for_reload_p
1610 (regno, end_hard_regno (inmode, regno), in, (rtx *) 0))
1611 || can_reload_into (in, regno, inmode)))
1613 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1620 output_reloadnum = i;
1625 /* Record an additional place we must replace a value
1626 for which we have already recorded a reload.
1627 RELOADNUM is the value returned by push_reload
1628 when the reload was recorded.
1629 This is used in insn patterns that use match_dup. */
1632 push_replacement (rtx *loc, int reloadnum, machine_mode mode)
1634 if (replace_reloads)
1636 struct replacement *r = &replacements[n_replacements++];
1637 r->what = reloadnum;
1643 /* Duplicate any replacement we have recorded to apply at
1644 location ORIG_LOC to also be performed at DUP_LOC.
1645 This is used in insn patterns that use match_dup. */
1648 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1650 int i, n = n_replacements;
1652 for (i = 0; i < n; i++)
1654 struct replacement *r = &replacements[i];
1655 if (r->where == orig_loc)
1656 push_replacement (dup_loc, r->what, r->mode);
1660 /* Transfer all replacements that used to be in reload FROM to be in
1664 transfer_replacements (int to, int from)
1668 for (i = 0; i < n_replacements; i++)
1669 if (replacements[i].what == from)
1670 replacements[i].what = to;
1673 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1674 or a subpart of it. If we have any replacements registered for IN_RTX,
1675 cancel the reloads that were supposed to load them.
1676 Return nonzero if we canceled any reloads. */
1678 remove_address_replacements (rtx in_rtx)
1681 char reload_flags[MAX_RELOADS];
1682 int something_changed = 0;
1684 memset (reload_flags, 0, sizeof reload_flags);
1685 for (i = 0, j = 0; i < n_replacements; i++)
1687 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1688 reload_flags[replacements[i].what] |= 1;
1691 replacements[j++] = replacements[i];
1692 reload_flags[replacements[i].what] |= 2;
1695 /* Note that the following store must be done before the recursive calls. */
1698 for (i = n_reloads - 1; i >= 0; i--)
1700 if (reload_flags[i] == 1)
1702 deallocate_reload_reg (i);
1703 remove_address_replacements (rld[i].in);
1705 something_changed = 1;
1708 return something_changed;
1711 /* If there is only one output reload, and it is not for an earlyclobber
1712 operand, try to combine it with a (logically unrelated) input reload
1713 to reduce the number of reload registers needed.
1715 This is safe if the input reload does not appear in
1716 the value being output-reloaded, because this implies
1717 it is not needed any more once the original insn completes.
1719 If that doesn't work, see we can use any of the registers that
1720 die in this insn as a reload register. We can if it is of the right
1721 class and does not appear in the value being output-reloaded. */
1724 combine_reloads (void)
1727 int output_reload = -1;
1728 int secondary_out = -1;
1731 /* Find the output reload; return unless there is exactly one
1732 and that one is mandatory. */
1734 for (i = 0; i < n_reloads; i++)
1735 if (rld[i].out != 0)
1737 if (output_reload >= 0)
1742 if (output_reload < 0 || rld[output_reload].optional)
1745 /* An input-output reload isn't combinable. */
1747 if (rld[output_reload].in != 0)
1750 /* If this reload is for an earlyclobber operand, we can't do anything. */
1751 if (earlyclobber_operand_p (rld[output_reload].out))
1754 /* If there is a reload for part of the address of this operand, we would
1755 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1756 its life to the point where doing this combine would not lower the
1757 number of spill registers needed. */
1758 for (i = 0; i < n_reloads; i++)
1759 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1760 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1761 && rld[i].opnum == rld[output_reload].opnum)
1764 /* Check each input reload; can we combine it? */
1766 for (i = 0; i < n_reloads; i++)
1767 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1768 /* Life span of this reload must not extend past main insn. */
1769 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1770 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1771 && rld[i].when_needed != RELOAD_OTHER
1772 && (ira_reg_class_max_nregs [(int)rld[i].rclass][(int) rld[i].inmode]
1773 == ira_reg_class_max_nregs [(int) rld[output_reload].rclass]
1774 [(int) rld[output_reload].outmode])
1776 && rld[i].reg_rtx == 0
1777 /* Don't combine two reloads with different secondary
1778 memory locations. */
1779 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1780 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1781 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1782 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1783 && (targetm.small_register_classes_for_mode_p (VOIDmode)
1784 ? (rld[i].rclass == rld[output_reload].rclass)
1785 : (reg_class_subset_p (rld[i].rclass,
1786 rld[output_reload].rclass)
1787 || reg_class_subset_p (rld[output_reload].rclass,
1789 && (MATCHES (rld[i].in, rld[output_reload].out)
1790 /* Args reversed because the first arg seems to be
1791 the one that we imagine being modified
1792 while the second is the one that might be affected. */
1793 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1795 /* However, if the input is a register that appears inside
1796 the output, then we also can't share.
1797 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1798 If the same reload reg is used for both reg 69 and the
1799 result to be stored in memory, then that result
1800 will clobber the address of the memory ref. */
1801 && ! (REG_P (rld[i].in)
1802 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1803 rld[output_reload].out))))
1804 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1805 rld[i].when_needed != RELOAD_FOR_INPUT)
1806 && (reg_class_size[(int) rld[i].rclass]
1807 || targetm.small_register_classes_for_mode_p (VOIDmode))
1808 /* We will allow making things slightly worse by combining an
1809 input and an output, but no worse than that. */
1810 && (rld[i].when_needed == RELOAD_FOR_INPUT
1811 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1815 /* We have found a reload to combine with! */
1816 rld[i].out = rld[output_reload].out;
1817 rld[i].out_reg = rld[output_reload].out_reg;
1818 rld[i].outmode = rld[output_reload].outmode;
1819 /* Mark the old output reload as inoperative. */
1820 rld[output_reload].out = 0;
1821 /* The combined reload is needed for the entire insn. */
1822 rld[i].when_needed = RELOAD_OTHER;
1823 /* If the output reload had a secondary reload, copy it. */
1824 if (rld[output_reload].secondary_out_reload != -1)
1826 rld[i].secondary_out_reload
1827 = rld[output_reload].secondary_out_reload;
1828 rld[i].secondary_out_icode
1829 = rld[output_reload].secondary_out_icode;
1832 /* Copy any secondary MEM. */
1833 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1834 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1835 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1836 /* If required, minimize the register class. */
1837 if (reg_class_subset_p (rld[output_reload].rclass,
1839 rld[i].rclass = rld[output_reload].rclass;
1841 /* Transfer all replacements from the old reload to the combined. */
1842 for (j = 0; j < n_replacements; j++)
1843 if (replacements[j].what == output_reload)
1844 replacements[j].what = i;
1849 /* If this insn has only one operand that is modified or written (assumed
1850 to be the first), it must be the one corresponding to this reload. It
1851 is safe to use anything that dies in this insn for that output provided
1852 that it does not occur in the output (we already know it isn't an
1853 earlyclobber. If this is an asm insn, give up. */
1855 if (INSN_CODE (this_insn) == -1)
1858 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1859 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1860 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1863 /* See if some hard register that dies in this insn and is not used in
1864 the output is the right class. Only works if the register we pick
1865 up can fully hold our output reload. */
1866 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1867 if (REG_NOTE_KIND (note) == REG_DEAD
1868 && REG_P (XEXP (note, 0))
1869 && !reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1870 rld[output_reload].out)
1871 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1872 && targetm.hard_regno_mode_ok (regno, rld[output_reload].outmode)
1873 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
1875 && (hard_regno_nregs (regno, rld[output_reload].outmode)
1876 <= REG_NREGS (XEXP (note, 0)))
1877 /* Ensure that a secondary or tertiary reload for this output
1878 won't want this register. */
1879 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1880 || (!(TEST_HARD_REG_BIT
1881 (reg_class_contents[(int) rld[secondary_out].rclass], regno))
1882 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1883 || !(TEST_HARD_REG_BIT
1884 (reg_class_contents[(int) rld[secondary_out].rclass],
1886 && !fixed_regs[regno]
1887 /* Check that a former pseudo is valid; see find_dummy_reload. */
1888 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1889 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
1890 ORIGINAL_REGNO (XEXP (note, 0)))
1891 && REG_NREGS (XEXP (note, 0)) == 1)))
1893 rld[output_reload].reg_rtx
1894 = gen_rtx_REG (rld[output_reload].outmode, regno);
1899 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1900 See if one of IN and OUT is a register that may be used;
1901 this is desirable since a spill-register won't be needed.
1902 If so, return the register rtx that proves acceptable.
1904 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1905 RCLASS is the register class required for the reload.
1907 If FOR_REAL is >= 0, it is the number of the reload,
1908 and in some cases when it can be discovered that OUT doesn't need
1909 to be computed, clear out rld[FOR_REAL].out.
1911 If FOR_REAL is -1, this should not be done, because this call
1912 is just to see if a register can be found, not to find and install it.
1914 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1915 puts an additional constraint on being able to use IN for OUT since
1916 IN must not appear elsewhere in the insn (it is assumed that IN itself
1917 is safe from the earlyclobber). */
1920 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1921 machine_mode inmode, machine_mode outmode,
1922 reg_class_t rclass, int for_real, int earlyclobber)
1930 /* If operands exceed a word, we can't use either of them
1931 unless they have the same size. */
1932 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1933 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1934 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1937 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1938 respectively refers to a hard register. */
1940 /* Find the inside of any subregs. */
1941 while (GET_CODE (out) == SUBREG)
1943 if (REG_P (SUBREG_REG (out))
1944 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1945 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1946 GET_MODE (SUBREG_REG (out)),
1949 out = SUBREG_REG (out);
1951 while (GET_CODE (in) == SUBREG)
1953 if (REG_P (SUBREG_REG (in))
1954 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1955 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1956 GET_MODE (SUBREG_REG (in)),
1959 in = SUBREG_REG (in);
1962 /* Narrow down the reg class, the same way push_reload will;
1963 otherwise we might find a dummy now, but push_reload won't. */
1965 reg_class_t preferred_class = targetm.preferred_reload_class (in, rclass);
1966 if (preferred_class != NO_REGS)
1967 rclass = (enum reg_class) preferred_class;
1970 /* See if OUT will do. */
1972 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1974 unsigned int regno = REGNO (out) + out_offset;
1975 unsigned int nwords = hard_regno_nregs (regno, outmode);
1978 /* When we consider whether the insn uses OUT,
1979 ignore references within IN. They don't prevent us
1980 from copying IN into OUT, because those refs would
1981 move into the insn that reloads IN.
1983 However, we only ignore IN in its role as this reload.
1984 If the insn uses IN elsewhere and it contains OUT,
1985 that counts. We can't be sure it's the "same" operand
1986 so it might not go through this reload.
1988 We also need to avoid using OUT if it, or part of it, is a
1989 fixed register. Modifying such registers, even transiently,
1990 may have undefined effects on the machine, such as modifying
1991 the stack pointer. */
1993 *inloc = const0_rtx;
1995 if (regno < FIRST_PSEUDO_REGISTER
1996 && targetm.hard_regno_mode_ok (regno, outmode)
1997 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1998 PATTERN (this_insn), outloc))
2002 for (i = 0; i < nwords; i++)
2003 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2005 || fixed_regs[regno + i])
2010 if (REG_P (real_out))
2013 value = gen_rtx_REG (outmode, regno);
2020 /* Consider using IN if OUT was not acceptable
2021 or if OUT dies in this insn (like the quotient in a divmod insn).
2022 We can't use IN unless it is dies in this insn,
2023 which means we must know accurately which hard regs are live.
2024 Also, the result can't go in IN if IN is used within OUT,
2025 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2026 if (hard_regs_live_known
2028 && REGNO (in) < FIRST_PSEUDO_REGISTER
2030 || find_reg_note (this_insn, REG_UNUSED, real_out))
2031 && find_reg_note (this_insn, REG_DEAD, real_in)
2032 && !fixed_regs[REGNO (in)]
2033 && targetm.hard_regno_mode_ok (REGNO (in),
2034 /* The only case where out and real_out
2035 might have different modes is where
2036 real_out is a subreg, and in that
2037 case, out has a real mode. */
2038 (GET_MODE (out) != VOIDmode
2039 ? GET_MODE (out) : outmode))
2040 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2041 /* However only do this if we can be sure that this input
2042 operand doesn't correspond with an uninitialized pseudo.
2043 global can assign some hardreg to it that is the same as
2044 the one assigned to a different, also live pseudo (as it
2045 can ignore the conflict). We must never introduce writes
2046 to such hardregs, as they would clobber the other live
2047 pseudo. See PR 20973. */
2048 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
2049 ORIGINAL_REGNO (in))
2050 /* Similarly, only do this if we can be sure that the death
2051 note is still valid. global can assign some hardreg to
2052 the pseudo referenced in the note and simultaneously a
2053 subword of this hardreg to a different, also live pseudo,
2054 because only another subword of the hardreg is actually
2055 used in the insn. This cannot happen if the pseudo has
2056 been assigned exactly one hardreg. See PR 33732. */
2057 && REG_NREGS (in) == 1)))
2059 unsigned int regno = REGNO (in) + in_offset;
2060 unsigned int nwords = hard_regno_nregs (regno, inmode);
2062 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2063 && ! hard_reg_set_here_p (regno, regno + nwords,
2064 PATTERN (this_insn))
2066 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2067 PATTERN (this_insn), inloc)))
2071 for (i = 0; i < nwords; i++)
2072 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2078 /* If we were going to use OUT as the reload reg
2079 and changed our mind, it means OUT is a dummy that
2080 dies here. So don't bother copying value to it. */
2081 if (for_real >= 0 && value == real_out)
2082 rld[for_real].out = 0;
2083 if (REG_P (real_in))
2086 value = gen_rtx_REG (inmode, regno);
2094 /* This page contains subroutines used mainly for determining
2095 whether the IN or an OUT of a reload can serve as the
2098 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2101 earlyclobber_operand_p (rtx x)
2105 for (i = 0; i < n_earlyclobbers; i++)
2106 if (reload_earlyclobbers[i] == x)
2112 /* Return 1 if expression X alters a hard reg in the range
2113 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2114 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2115 X should be the body of an instruction. */
2118 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2120 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2122 rtx op0 = SET_DEST (x);
2124 while (GET_CODE (op0) == SUBREG)
2125 op0 = SUBREG_REG (op0);
2128 unsigned int r = REGNO (op0);
2130 /* See if this reg overlaps range under consideration. */
2132 && end_hard_regno (GET_MODE (op0), r) > beg_regno)
2136 else if (GET_CODE (x) == PARALLEL)
2138 int i = XVECLEN (x, 0) - 1;
2141 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2148 /* Return 1 if ADDR is a valid memory address for mode MODE
2149 in address space AS, and check that each pseudo reg has the
2150 proper kind of hard reg. */
2153 strict_memory_address_addr_space_p (machine_mode mode ATTRIBUTE_UNUSED,
2154 rtx addr, addr_space_t as)
2156 #ifdef GO_IF_LEGITIMATE_ADDRESS
2157 gcc_assert (ADDR_SPACE_GENERIC_P (as));
2158 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2164 return targetm.addr_space.legitimate_address_p (mode, addr, 1, as);
2168 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2169 if they are the same hard reg, and has special hacks for
2170 autoincrement and autodecrement.
2171 This is specifically intended for find_reloads to use
2172 in determining whether two operands match.
2173 X is the operand whose number is the lower of the two.
2175 The value is 2 if Y contains a pre-increment that matches
2176 a non-incrementing address in X. */
2178 /* ??? To be completely correct, we should arrange to pass
2179 for X the output operand and for Y the input operand.
2180 For now, we assume that the output operand has the lower number
2181 because that is natural in (SET output (... input ...)). */
2184 operands_match_p (rtx x, rtx y)
2187 RTX_CODE code = GET_CODE (x);
2193 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2194 && (REG_P (y) || (GET_CODE (y) == SUBREG
2195 && REG_P (SUBREG_REG (y)))))
2201 i = REGNO (SUBREG_REG (x));
2202 if (i >= FIRST_PSEUDO_REGISTER)
2204 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2205 GET_MODE (SUBREG_REG (x)),
2212 if (GET_CODE (y) == SUBREG)
2214 j = REGNO (SUBREG_REG (y));
2215 if (j >= FIRST_PSEUDO_REGISTER)
2217 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2218 GET_MODE (SUBREG_REG (y)),
2225 /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2226 multiple hard register group of scalar integer registers, so that
2227 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2229 scalar_int_mode xmode;
2230 if (REG_WORDS_BIG_ENDIAN
2231 && is_a <scalar_int_mode> (GET_MODE (x), &xmode)
2232 && GET_MODE_SIZE (xmode) > UNITS_PER_WORD
2233 && i < FIRST_PSEUDO_REGISTER)
2234 i += hard_regno_nregs (i, xmode) - 1;
2235 scalar_int_mode ymode;
2236 if (REG_WORDS_BIG_ENDIAN
2237 && is_a <scalar_int_mode> (GET_MODE (y), &ymode)
2238 && GET_MODE_SIZE (ymode) > UNITS_PER_WORD
2239 && j < FIRST_PSEUDO_REGISTER)
2240 j += hard_regno_nregs (j, ymode) - 1;
2244 /* If two operands must match, because they are really a single
2245 operand of an assembler insn, then two postincrements are invalid
2246 because the assembler insn would increment only once.
2247 On the other hand, a postincrement matches ordinary indexing
2248 if the postincrement is the output operand. */
2249 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2250 return operands_match_p (XEXP (x, 0), y);
2251 /* Two preincrements are invalid
2252 because the assembler insn would increment only once.
2253 On the other hand, a preincrement matches ordinary indexing
2254 if the preincrement is the input operand.
2255 In this case, return 2, since some callers need to do special
2256 things when this happens. */
2257 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2258 || GET_CODE (y) == PRE_MODIFY)
2259 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2263 /* Now we have disposed of all the cases in which different rtx codes
2265 if (code != GET_CODE (y))
2268 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2269 if (GET_MODE (x) != GET_MODE (y))
2272 /* MEMs referring to different address space are not equivalent. */
2273 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2282 return label_ref_label (x) == label_ref_label (y);
2284 return XSTR (x, 0) == XSTR (y, 0);
2290 /* Compare the elements. If any pair of corresponding elements
2291 fail to match, return 0 for the whole things. */
2294 fmt = GET_RTX_FORMAT (code);
2295 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2301 if (XWINT (x, i) != XWINT (y, i))
2306 if (XINT (x, i) != XINT (y, i))
2311 if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
2316 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2319 /* If any subexpression returns 2,
2320 we should return 2 if we are successful. */
2329 if (XVECLEN (x, i) != XVECLEN (y, i))
2331 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2333 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2341 /* It is believed that rtx's at this level will never
2342 contain anything but integers and other rtx's,
2343 except for within LABEL_REFs and SYMBOL_REFs. */
2348 return 1 + success_2;
2351 /* Describe the range of registers or memory referenced by X.
2352 If X is a register, set REG_FLAG and put the first register
2353 number into START and the last plus one into END.
2354 If X is a memory reference, put a base address into BASE
2355 and a range of integer offsets into START and END.
2356 If X is pushing on the stack, we can assume it causes no trouble,
2357 so we set the SAFE field. */
2359 static struct decomposition
2362 struct decomposition val;
2365 memset (&val, 0, sizeof (val));
2367 switch (GET_CODE (x))
2371 rtx base = NULL_RTX, offset = 0;
2372 rtx addr = XEXP (x, 0);
2374 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2375 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2377 val.base = XEXP (addr, 0);
2378 val.start = -GET_MODE_SIZE (GET_MODE (x));
2379 val.end = GET_MODE_SIZE (GET_MODE (x));
2380 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2384 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2386 if (GET_CODE (XEXP (addr, 1)) == PLUS
2387 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2388 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2390 val.base = XEXP (addr, 0);
2391 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2392 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2393 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2398 if (GET_CODE (addr) == CONST)
2400 addr = XEXP (addr, 0);
2403 if (GET_CODE (addr) == PLUS)
2405 if (CONSTANT_P (XEXP (addr, 0)))
2407 base = XEXP (addr, 1);
2408 offset = XEXP (addr, 0);
2410 else if (CONSTANT_P (XEXP (addr, 1)))
2412 base = XEXP (addr, 0);
2413 offset = XEXP (addr, 1);
2420 offset = const0_rtx;
2422 if (GET_CODE (offset) == CONST)
2423 offset = XEXP (offset, 0);
2424 if (GET_CODE (offset) == PLUS)
2426 if (CONST_INT_P (XEXP (offset, 0)))
2428 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2429 offset = XEXP (offset, 0);
2431 else if (CONST_INT_P (XEXP (offset, 1)))
2433 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2434 offset = XEXP (offset, 1);
2438 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2439 offset = const0_rtx;
2442 else if (!CONST_INT_P (offset))
2444 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2445 offset = const0_rtx;
2448 if (all_const && GET_CODE (base) == PLUS)
2449 base = gen_rtx_CONST (GET_MODE (base), base);
2451 gcc_assert (CONST_INT_P (offset));
2453 val.start = INTVAL (offset);
2454 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2461 val.start = true_regnum (x);
2462 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2464 /* A pseudo with no hard reg. */
2465 val.start = REGNO (x);
2466 val.end = val.start + 1;
2470 val.end = end_hard_regno (GET_MODE (x), val.start);
2474 if (!REG_P (SUBREG_REG (x)))
2475 /* This could be more precise, but it's good enough. */
2476 return decompose (SUBREG_REG (x));
2478 val.start = true_regnum (x);
2479 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2480 return decompose (SUBREG_REG (x));
2483 val.end = val.start + subreg_nregs (x);
2487 /* This hasn't been assigned yet, so it can't conflict yet. */
2492 gcc_assert (CONSTANT_P (x));
2499 /* Return 1 if altering Y will not modify the value of X.
2500 Y is also described by YDATA, which should be decompose (Y). */
2503 immune_p (rtx x, rtx y, struct decomposition ydata)
2505 struct decomposition xdata;
2508 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2512 gcc_assert (MEM_P (y));
2513 /* If Y is memory and X is not, Y can't affect X. */
2517 xdata = decompose (x);
2519 if (! rtx_equal_p (xdata.base, ydata.base))
2521 /* If bases are distinct symbolic constants, there is no overlap. */
2522 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2524 /* Constants and stack slots never overlap. */
2525 if (CONSTANT_P (xdata.base)
2526 && (ydata.base == frame_pointer_rtx
2527 || ydata.base == hard_frame_pointer_rtx
2528 || ydata.base == stack_pointer_rtx))
2530 if (CONSTANT_P (ydata.base)
2531 && (xdata.base == frame_pointer_rtx
2532 || xdata.base == hard_frame_pointer_rtx
2533 || xdata.base == stack_pointer_rtx))
2535 /* If either base is variable, we don't know anything. */
2539 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2542 /* Similar, but calls decompose. */
2545 safe_from_earlyclobber (rtx op, rtx clobber)
2547 struct decomposition early_data;
2549 early_data = decompose (clobber);
2550 return immune_p (op, clobber, early_data);
2553 /* Main entry point of this file: search the body of INSN
2554 for values that need reloading and record them with push_reload.
2555 REPLACE nonzero means record also where the values occur
2556 so that subst_reloads can be used.
2558 IND_LEVELS says how many levels of indirection are supported by this
2559 machine; a value of zero means that a memory reference is not a valid
2562 LIVE_KNOWN says we have valid information about which hard
2563 regs are live at each point in the program; this is true when
2564 we are called from global_alloc but false when stupid register
2565 allocation has been done.
2567 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2568 which is nonnegative if the reg has been commandeered for reloading into.
2569 It is copied into STATIC_RELOAD_REG_P and referenced from there
2570 by various subroutines.
2572 Return TRUE if some operands need to be changed, because of swapping
2573 commutative operands, reg_equiv_address substitution, or whatever. */
2576 find_reloads (rtx_insn *insn, int replace, int ind_levels, int live_known,
2577 short *reload_reg_p)
2579 int insn_code_number;
2582 /* These start out as the constraints for the insn
2583 and they are chewed up as we consider alternatives. */
2584 const char *constraints[MAX_RECOG_OPERANDS];
2585 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2587 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2588 char pref_or_nothing[MAX_RECOG_OPERANDS];
2589 /* Nonzero for a MEM operand whose entire address needs a reload.
2590 May be -1 to indicate the entire address may or may not need a reload. */
2591 int address_reloaded[MAX_RECOG_OPERANDS];
2592 /* Nonzero for an address operand that needs to be completely reloaded.
2593 May be -1 to indicate the entire operand may or may not need a reload. */
2594 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2595 /* Value of enum reload_type to use for operand. */
2596 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2597 /* Value of enum reload_type to use within address of operand. */
2598 enum reload_type address_type[MAX_RECOG_OPERANDS];
2599 /* Save the usage of each operand. */
2600 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2601 int no_input_reloads = 0, no_output_reloads = 0;
2603 reg_class_t this_alternative[MAX_RECOG_OPERANDS];
2604 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2605 char this_alternative_win[MAX_RECOG_OPERANDS];
2606 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2607 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2608 int this_alternative_matches[MAX_RECOG_OPERANDS];
2609 reg_class_t goal_alternative[MAX_RECOG_OPERANDS];
2610 int this_alternative_number;
2611 int goal_alternative_number = 0;
2612 int operand_reloadnum[MAX_RECOG_OPERANDS];
2613 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2614 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2615 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2616 char goal_alternative_win[MAX_RECOG_OPERANDS];
2617 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2618 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2619 int goal_alternative_swapped;
2622 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2623 rtx substed_operand[MAX_RECOG_OPERANDS];
2624 rtx body = PATTERN (insn);
2625 rtx set = single_set (insn);
2626 int goal_earlyclobber = 0, this_earlyclobber;
2627 machine_mode operand_mode[MAX_RECOG_OPERANDS];
2633 n_earlyclobbers = 0;
2634 replace_reloads = replace;
2635 hard_regs_live_known = live_known;
2636 static_reload_reg_p = reload_reg_p;
2638 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2639 neither are insns that SET cc0. Insns that use CC0 are not allowed
2640 to have any input reloads. */
2641 if (JUMP_P (insn) || CALL_P (insn))
2642 no_output_reloads = 1;
2644 if (HAVE_cc0 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
2645 no_input_reloads = 1;
2646 if (HAVE_cc0 && reg_set_p (cc0_rtx, PATTERN (insn)))
2647 no_output_reloads = 1;
2649 /* The eliminated forms of any secondary memory locations are per-insn, so
2650 clear them out here. */
2652 if (secondary_memlocs_elim_used)
2654 memset (secondary_memlocs_elim, 0,
2655 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2656 secondary_memlocs_elim_used = 0;
2659 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2660 is cheap to move between them. If it is not, there may not be an insn
2661 to do the copy, so we may need a reload. */
2662 if (GET_CODE (body) == SET
2663 && REG_P (SET_DEST (body))
2664 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2665 && REG_P (SET_SRC (body))
2666 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2667 && register_move_cost (GET_MODE (SET_SRC (body)),
2668 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2669 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2672 extract_insn (insn);
2674 noperands = reload_n_operands = recog_data.n_operands;
2675 n_alternatives = recog_data.n_alternatives;
2677 /* Just return "no reloads" if insn has no operands with constraints. */
2678 if (noperands == 0 || n_alternatives == 0)
2681 insn_code_number = INSN_CODE (insn);
2682 this_insn_is_asm = insn_code_number < 0;
2684 memcpy (operand_mode, recog_data.operand_mode,
2685 noperands * sizeof (machine_mode));
2686 memcpy (constraints, recog_data.constraints,
2687 noperands * sizeof (const char *));
2691 /* If we will need to know, later, whether some pair of operands
2692 are the same, we must compare them now and save the result.
2693 Reloading the base and index registers will clobber them
2694 and afterward they will fail to match. */
2696 for (i = 0; i < noperands; i++)
2702 substed_operand[i] = recog_data.operand[i];
2705 modified[i] = RELOAD_READ;
2707 /* Scan this operand's constraint to see if it is an output operand,
2708 an in-out operand, is commutative, or should match another. */
2712 p += CONSTRAINT_LEN (c, p);
2716 modified[i] = RELOAD_WRITE;
2719 modified[i] = RELOAD_READ_WRITE;
2723 /* The last operand should not be marked commutative. */
2724 gcc_assert (i != noperands - 1);
2726 /* We currently only support one commutative pair of
2727 operands. Some existing asm code currently uses more
2728 than one pair. Previously, that would usually work,
2729 but sometimes it would crash the compiler. We
2730 continue supporting that case as well as we can by
2731 silently ignoring all but the first pair. In the
2732 future we may handle it correctly. */
2733 if (commutative < 0)
2736 gcc_assert (this_insn_is_asm);
2739 /* Use of ISDIGIT is tempting here, but it may get expensive because
2740 of locale support we don't want. */
2741 case '0': case '1': case '2': case '3': case '4':
2742 case '5': case '6': case '7': case '8': case '9':
2744 c = strtoul (p - 1, &end, 10);
2747 operands_match[c][i]
2748 = operands_match_p (recog_data.operand[c],
2749 recog_data.operand[i]);
2751 /* An operand may not match itself. */
2752 gcc_assert (c != i);
2754 /* If C can be commuted with C+1, and C might need to match I,
2755 then C+1 might also need to match I. */
2756 if (commutative >= 0)
2758 if (c == commutative || c == commutative + 1)
2760 int other = c + (c == commutative ? 1 : -1);
2761 operands_match[other][i]
2762 = operands_match_p (recog_data.operand[other],
2763 recog_data.operand[i]);
2765 if (i == commutative || i == commutative + 1)
2767 int other = i + (i == commutative ? 1 : -1);
2768 operands_match[c][other]
2769 = operands_match_p (recog_data.operand[c],
2770 recog_data.operand[other]);
2772 /* Note that C is supposed to be less than I.
2773 No need to consider altering both C and I because in
2774 that case we would alter one into the other. */
2781 /* Examine each operand that is a memory reference or memory address
2782 and reload parts of the addresses into index registers.
2783 Also here any references to pseudo regs that didn't get hard regs
2784 but are equivalent to constants get replaced in the insn itself
2785 with those constants. Nobody will ever see them again.
2787 Finally, set up the preferred classes of each operand. */
2789 for (i = 0; i < noperands; i++)
2791 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2793 address_reloaded[i] = 0;
2794 address_operand_reloaded[i] = 0;
2795 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2796 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2799 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2800 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2803 if (*constraints[i] == 0)
2804 /* Ignore things like match_operator operands. */
2806 else if (insn_extra_address_constraint
2807 (lookup_constraint (constraints[i])))
2809 address_operand_reloaded[i]
2810 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2811 recog_data.operand[i],
2812 recog_data.operand_loc[i],
2813 i, operand_type[i], ind_levels, insn);
2815 /* If we now have a simple operand where we used to have a
2816 PLUS or MULT, re-recognize and try again. */
2817 if ((OBJECT_P (*recog_data.operand_loc[i])
2818 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2819 && (GET_CODE (recog_data.operand[i]) == MULT
2820 || GET_CODE (recog_data.operand[i]) == PLUS))
2822 INSN_CODE (insn) = -1;
2823 retval = find_reloads (insn, replace, ind_levels, live_known,
2828 recog_data.operand[i] = *recog_data.operand_loc[i];
2829 substed_operand[i] = recog_data.operand[i];
2831 /* Address operands are reloaded in their existing mode,
2832 no matter what is specified in the machine description. */
2833 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2835 /* If the address is a single CONST_INT pick address mode
2836 instead otherwise we will later not know in which mode
2837 the reload should be performed. */
2838 if (operand_mode[i] == VOIDmode)
2839 operand_mode[i] = Pmode;
2842 else if (code == MEM)
2845 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2846 recog_data.operand_loc[i],
2847 XEXP (recog_data.operand[i], 0),
2848 &XEXP (recog_data.operand[i], 0),
2849 i, address_type[i], ind_levels, insn);
2850 recog_data.operand[i] = *recog_data.operand_loc[i];
2851 substed_operand[i] = recog_data.operand[i];
2853 else if (code == SUBREG)
2855 rtx reg = SUBREG_REG (recog_data.operand[i]);
2857 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2860 && &SET_DEST (set) == recog_data.operand_loc[i],
2862 &address_reloaded[i]);
2864 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2865 that didn't get a hard register, emit a USE with a REG_EQUAL
2866 note in front so that we might inherit a previous, possibly
2872 && (GET_MODE_SIZE (GET_MODE (reg))
2873 >= GET_MODE_SIZE (GET_MODE (op)))
2874 && reg_equiv_constant (REGNO (reg)) == 0)
2875 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2877 REG_EQUAL, reg_equiv_memory_loc (REGNO (reg)));
2879 substed_operand[i] = recog_data.operand[i] = op;
2881 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2882 /* We can get a PLUS as an "operand" as a result of register
2883 elimination. See eliminate_regs and gen_reload. We handle
2884 a unary operator by reloading the operand. */
2885 substed_operand[i] = recog_data.operand[i]
2886 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2887 ind_levels, 0, insn,
2888 &address_reloaded[i]);
2889 else if (code == REG)
2891 /* This is equivalent to calling find_reloads_toplev.
2892 The code is duplicated for speed.
2893 When we find a pseudo always equivalent to a constant,
2894 we replace it by the constant. We must be sure, however,
2895 that we don't try to replace it in the insn in which it
2897 int regno = REGNO (recog_data.operand[i]);
2898 if (reg_equiv_constant (regno) != 0
2899 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2901 /* Record the existing mode so that the check if constants are
2902 allowed will work when operand_mode isn't specified. */
2904 if (operand_mode[i] == VOIDmode)
2905 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2907 substed_operand[i] = recog_data.operand[i]
2908 = reg_equiv_constant (regno);
2910 if (reg_equiv_memory_loc (regno) != 0
2911 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
2912 /* We need not give a valid is_set_dest argument since the case
2913 of a constant equivalence was checked above. */
2914 substed_operand[i] = recog_data.operand[i]
2915 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2916 ind_levels, 0, insn,
2917 &address_reloaded[i]);
2919 /* If the operand is still a register (we didn't replace it with an
2920 equivalent), get the preferred class to reload it into. */
2921 code = GET_CODE (recog_data.operand[i]);
2923 = ((code == REG && REGNO (recog_data.operand[i])
2924 >= FIRST_PSEUDO_REGISTER)
2925 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2929 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2930 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2933 /* If this is simply a copy from operand 1 to operand 0, merge the
2934 preferred classes for the operands. */
2935 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2936 && recog_data.operand[1] == SET_SRC (set))
2938 preferred_class[0] = preferred_class[1]
2939 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2940 pref_or_nothing[0] |= pref_or_nothing[1];
2941 pref_or_nothing[1] |= pref_or_nothing[0];
2944 /* Now see what we need for pseudo-regs that didn't get hard regs
2945 or got the wrong kind of hard reg. For this, we must consider
2946 all the operands together against the register constraints. */
2948 best = MAX_RECOG_OPERANDS * 2 + 600;
2950 goal_alternative_swapped = 0;
2952 /* The constraints are made of several alternatives.
2953 Each operand's constraint looks like foo,bar,... with commas
2954 separating the alternatives. The first alternatives for all
2955 operands go together, the second alternatives go together, etc.
2957 First loop over alternatives. */
2959 alternative_mask enabled = get_enabled_alternatives (insn);
2960 for (this_alternative_number = 0;
2961 this_alternative_number < n_alternatives;
2962 this_alternative_number++)
2966 if (!TEST_BIT (enabled, this_alternative_number))
2970 for (i = 0; i < recog_data.n_operands; i++)
2971 constraints[i] = skip_alternative (constraints[i]);
2976 /* If insn is commutative (it's safe to exchange a certain pair
2977 of operands) then we need to try each alternative twice, the
2978 second time matching those two operands as if we had
2979 exchanged them. To do this, really exchange them in
2981 for (swapped = 0; swapped < (commutative >= 0 ? 2 : 1); swapped++)
2983 /* Loop over operands for one constraint alternative. */
2984 /* LOSERS counts those that don't fit this alternative
2985 and would require loading. */
2987 /* BAD is set to 1 if it some operand can't fit this alternative
2988 even after reloading. */
2990 /* REJECT is a count of how undesirable this alternative says it is
2991 if any reloading is required. If the alternative matches exactly
2992 then REJECT is ignored, but otherwise it gets this much
2993 counted against it in addition to the reloading needed. Each
2994 ? counts three times here since we want the disparaging caused by
2995 a bad register class to only count 1/3 as much. */
3000 recog_data.operand[commutative] = substed_operand[commutative + 1];
3001 recog_data.operand[commutative + 1] = substed_operand[commutative];
3002 /* Swap the duplicates too. */
3003 for (i = 0; i < recog_data.n_dups; i++)
3004 if (recog_data.dup_num[i] == commutative
3005 || recog_data.dup_num[i] == commutative + 1)
3006 *recog_data.dup_loc[i]
3007 = recog_data.operand[(int) recog_data.dup_num[i]];
3009 std::swap (preferred_class[commutative],
3010 preferred_class[commutative + 1]);
3011 std::swap (pref_or_nothing[commutative],
3012 pref_or_nothing[commutative + 1]);
3013 std::swap (address_reloaded[commutative],
3014 address_reloaded[commutative + 1]);
3017 this_earlyclobber = 0;
3019 for (i = 0; i < noperands; i++)
3021 const char *p = constraints[i];
3026 /* 0 => this operand can be reloaded somehow for this alternative. */
3028 /* 0 => this operand can be reloaded if the alternative allows regs. */
3032 rtx operand = recog_data.operand[i];
3034 /* Nonzero means this is a MEM that must be reloaded into a reg
3035 regardless of what the constraint says. */
3036 int force_reload = 0;
3038 /* Nonzero if a constant forced into memory would be OK for this
3041 int earlyclobber = 0;
3042 enum constraint_num cn;
3045 /* If the predicate accepts a unary operator, it means that
3046 we need to reload the operand, but do not do this for
3047 match_operator and friends. */
3048 if (UNARY_P (operand) && *p != 0)
3049 operand = XEXP (operand, 0);
3051 /* If the operand is a SUBREG, extract
3052 the REG or MEM (or maybe even a constant) within.
3053 (Constants can occur as a result of reg_equiv_constant.) */
3055 while (GET_CODE (operand) == SUBREG)
3057 /* Offset only matters when operand is a REG and
3058 it is a hard reg. This is because it is passed
3059 to reg_fits_class_p if it is a REG and all pseudos
3060 return 0 from that function. */
3061 if (REG_P (SUBREG_REG (operand))
3062 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
3064 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand)),
3065 GET_MODE (SUBREG_REG (operand)),
3066 SUBREG_BYTE (operand),
3067 GET_MODE (operand)) < 0)
3069 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
3070 GET_MODE (SUBREG_REG (operand)),
3071 SUBREG_BYTE (operand),
3072 GET_MODE (operand));
3074 operand = SUBREG_REG (operand);
3075 /* Force reload if this is a constant or PLUS or if there may
3076 be a problem accessing OPERAND in the outer mode. */
3077 scalar_int_mode inner_mode;
3078 if (CONSTANT_P (operand)
3079 || GET_CODE (operand) == PLUS
3080 /* We must force a reload of paradoxical SUBREGs
3081 of a MEM because the alignment of the inner value
3082 may not be enough to do the outer reference. On
3083 big-endian machines, it may also reference outside
3086 On machines that extend byte operations and we have a
3087 SUBREG where both the inner and outer modes are no wider
3088 than a word and the inner mode is narrower, is integral,
3089 and gets extended when loaded from memory, combine.c has
3090 made assumptions about the behavior of the machine in such
3091 register access. If the data is, in fact, in memory we
3092 must always load using the size assumed to be in the
3093 register and let the insn do the different-sized
3096 This is doubly true if WORD_REGISTER_OPERATIONS. In
3097 this case eliminate_regs has left non-paradoxical
3098 subregs for push_reload to see. Make sure it does
3099 by forcing the reload.
3101 ??? When is it right at this stage to have a subreg
3102 of a mem that is _not_ to be handled specially? IMO
3103 those should have been reduced to just a mem. */
3104 || ((MEM_P (operand)
3106 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3107 && (WORD_REGISTER_OPERATIONS
3108 || ((GET_MODE_BITSIZE (GET_MODE (operand))
3109 < BIGGEST_ALIGNMENT)
3110 && paradoxical_subreg_p (operand_mode[i],
3111 GET_MODE (operand)))
3113 || ((GET_MODE_SIZE (operand_mode[i])
3115 && (is_a <scalar_int_mode>
3116 (GET_MODE (operand), &inner_mode))
3117 && (GET_MODE_SIZE (inner_mode)
3119 && paradoxical_subreg_p (operand_mode[i],
3121 && LOAD_EXTEND_OP (inner_mode) != UNKNOWN)))
3126 this_alternative[i] = NO_REGS;
3127 this_alternative_win[i] = 0;
3128 this_alternative_match_win[i] = 0;
3129 this_alternative_offmemok[i] = 0;
3130 this_alternative_earlyclobber[i] = 0;
3131 this_alternative_matches[i] = -1;
3133 /* An empty constraint or empty alternative
3134 allows anything which matched the pattern. */
3135 if (*p == 0 || *p == ',')
3138 /* Scan this alternative's specs for this operand;
3139 set WIN if the operand fits any letter in this alternative.
3140 Otherwise, clear BADOP if this operand could
3141 fit some letter after reloads,
3142 or set WINREG if this operand could fit after reloads
3143 provided the constraint allows some registers. */
3146 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3164 /* Ignore rest of this alternative as far as
3165 reloading is concerned. */
3168 while (*p && *p != ',');
3172 case '0': case '1': case '2': case '3': case '4':
3173 case '5': case '6': case '7': case '8': case '9':
3174 m = strtoul (p, &end, 10);
3178 this_alternative_matches[i] = m;
3179 /* We are supposed to match a previous operand.
3180 If we do, we win if that one did.
3181 If we do not, count both of the operands as losers.
3182 (This is too conservative, since most of the time
3183 only a single reload insn will be needed to make
3184 the two operands win. As a result, this alternative
3185 may be rejected when it is actually desirable.) */
3186 if ((swapped && (m != commutative || i != commutative + 1))
3187 /* If we are matching as if two operands were swapped,
3188 also pretend that operands_match had been computed
3190 But if I is the second of those and C is the first,
3191 don't exchange them, because operands_match is valid
3192 only on one side of its diagonal. */
3194 [(m == commutative || m == commutative + 1)
3195 ? 2 * commutative + 1 - m : m]
3196 [(i == commutative || i == commutative + 1)
3197 ? 2 * commutative + 1 - i : i])
3198 : operands_match[m][i])
3200 /* If we are matching a non-offsettable address where an
3201 offsettable address was expected, then we must reject
3202 this combination, because we can't reload it. */
3203 if (this_alternative_offmemok[m]
3204 && MEM_P (recog_data.operand[m])
3205 && this_alternative[m] == NO_REGS
3206 && ! this_alternative_win[m])
3209 did_match = this_alternative_win[m];
3213 /* Operands don't match. */
3216 /* Retroactively mark the operand we had to match
3217 as a loser, if it wasn't already. */
3218 if (this_alternative_win[m])
3220 this_alternative_win[m] = 0;
3221 if (this_alternative[m] == NO_REGS)
3223 /* But count the pair only once in the total badness of
3224 this alternative, if the pair can be a dummy reload.
3225 The pointers in operand_loc are not swapped; swap
3226 them by hand if necessary. */
3227 if (swapped && i == commutative)
3228 loc1 = commutative + 1;
3229 else if (swapped && i == commutative + 1)
3233 if (swapped && m == commutative)
3234 loc2 = commutative + 1;
3235 else if (swapped && m == commutative + 1)
3240 = find_dummy_reload (recog_data.operand[i],
3241 recog_data.operand[m],
3242 recog_data.operand_loc[loc1],
3243 recog_data.operand_loc[loc2],
3244 operand_mode[i], operand_mode[m],
3245 this_alternative[m], -1,
3246 this_alternative_earlyclobber[m]);
3251 /* This can be fixed with reloads if the operand
3252 we are supposed to match can be fixed with reloads. */
3254 this_alternative[i] = this_alternative[m];
3256 /* If we have to reload this operand and some previous
3257 operand also had to match the same thing as this
3258 operand, we don't know how to do that. So reject this
3260 if (! did_match || force_reload)
3261 for (j = 0; j < i; j++)
3262 if (this_alternative_matches[j]
3263 == this_alternative_matches[i])
3271 /* All necessary reloads for an address_operand
3272 were handled in find_reloads_address. */
3274 = base_reg_class (VOIDmode, ADDR_SPACE_GENERIC,
3280 case TARGET_MEM_CONSTRAINT:
3285 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3286 && reg_renumber[REGNO (operand)] < 0))
3288 if (CONST_POOL_OK_P (operand_mode[i], operand))
3295 && ! address_reloaded[i]
3296 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3297 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3303 && ! address_reloaded[i]
3304 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3305 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3309 /* Memory operand whose address is not offsettable. */
3314 && ! (ind_levels ? offsettable_memref_p (operand)
3315 : offsettable_nonstrict_memref_p (operand))
3316 /* Certain mem addresses will become offsettable
3317 after they themselves are reloaded. This is important;
3318 we don't want our own handling of unoffsettables
3319 to override the handling of reg_equiv_address. */
3320 && !(REG_P (XEXP (operand, 0))
3322 || reg_equiv_address (REGNO (XEXP (operand, 0))) != 0)))
3326 /* Memory operand whose address is offsettable. */
3330 if ((MEM_P (operand)
3331 /* If IND_LEVELS, find_reloads_address won't reload a
3332 pseudo that didn't get a hard reg, so we have to
3333 reject that case. */
3334 && ((ind_levels ? offsettable_memref_p (operand)
3335 : offsettable_nonstrict_memref_p (operand))
3336 /* A reloaded address is offsettable because it is now
3337 just a simple register indirect. */
3338 || address_reloaded[i] == 1))
3340 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3341 && reg_renumber[REGNO (operand)] < 0
3342 /* If reg_equiv_address is nonzero, we will be
3343 loading it into a register; hence it will be
3344 offsettable, but we cannot say that reg_equiv_mem
3345 is offsettable without checking. */
3346 && ((reg_equiv_mem (REGNO (operand)) != 0
3347 && offsettable_memref_p (reg_equiv_mem (REGNO (operand))))
3348 || (reg_equiv_address (REGNO (operand)) != 0))))
3350 if (CONST_POOL_OK_P (operand_mode[i], operand)
3358 /* Output operand that is stored before the need for the
3359 input operands (and their index registers) is over. */
3360 earlyclobber = 1, this_earlyclobber = 1;
3370 /* A PLUS is never a valid operand, but reload can make
3371 it from a register when eliminating registers. */
3372 && GET_CODE (operand) != PLUS
3373 /* A SCRATCH is not a valid operand. */
3374 && GET_CODE (operand) != SCRATCH
3375 && (! CONSTANT_P (operand)
3377 || LEGITIMATE_PIC_OPERAND_P (operand))
3378 && (GENERAL_REGS == ALL_REGS
3380 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3381 && reg_renumber[REGNO (operand)] < 0)))
3387 cn = lookup_constraint (p);
3388 switch (get_constraint_type (cn))
3391 cl = reg_class_for_constraint (cn);
3397 if (CONST_INT_P (operand)
3398 && (insn_const_int_ok_for_constraint
3399 (INTVAL (operand), cn)))
3406 if (constraint_satisfied_p (operand, cn))
3408 /* If the address was already reloaded,
3410 else if (MEM_P (operand) && address_reloaded[i] == 1)
3412 /* Likewise if the address will be reloaded because
3413 reg_equiv_address is nonzero. For reg_equiv_mem
3414 we have to check. */
3415 else if (REG_P (operand)
3416 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3417 && reg_renumber[REGNO (operand)] < 0
3418 && ((reg_equiv_mem (REGNO (operand)) != 0
3419 && (constraint_satisfied_p
3420 (reg_equiv_mem (REGNO (operand)),
3422 || (reg_equiv_address (REGNO (operand))
3426 /* If we didn't already win, we can reload
3427 constants via force_const_mem, and other
3428 MEMs by reloading the address like for 'o'. */
3429 if (CONST_POOL_OK_P (operand_mode[i], operand)
3436 case CT_SPECIAL_MEMORY:
3439 if (constraint_satisfied_p (operand, cn))
3441 /* Likewise if the address will be reloaded because
3442 reg_equiv_address is nonzero. For reg_equiv_mem
3443 we have to check. */
3444 else if (REG_P (operand)
3445 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3446 && reg_renumber[REGNO (operand)] < 0
3447 && reg_equiv_mem (REGNO (operand)) != 0
3448 && (constraint_satisfied_p
3449 (reg_equiv_mem (REGNO (operand)), cn)))
3454 if (constraint_satisfied_p (operand, cn))
3457 /* If we didn't already win, we can reload
3458 the address into a base register. */
3460 = base_reg_class (VOIDmode, ADDR_SPACE_GENERIC,
3466 if (constraint_satisfied_p (operand, cn))
3474 = reg_class_subunion[this_alternative[i]][cl];
3475 if (GET_MODE (operand) == BLKmode)
3479 && reg_fits_class_p (operand, this_alternative[i],
3480 offset, GET_MODE (recog_data.operand[i])))
3484 while ((p += len), c);
3486 if (swapped == (commutative >= 0 ? 1 : 0))
3489 /* If this operand could be handled with a reg,
3490 and some reg is allowed, then this operand can be handled. */
3491 if (winreg && this_alternative[i] != NO_REGS
3492 && (win || !class_only_fixed_regs[this_alternative[i]]))
3495 /* Record which operands fit this alternative. */
3496 this_alternative_earlyclobber[i] = earlyclobber;
3497 if (win && ! force_reload)
3498 this_alternative_win[i] = 1;
3499 else if (did_match && ! force_reload)
3500 this_alternative_match_win[i] = 1;
3503 int const_to_mem = 0;
3505 this_alternative_offmemok[i] = offmemok;
3509 /* Alternative loses if it has no regs for a reg operand. */
3511 && this_alternative[i] == NO_REGS
3512 && this_alternative_matches[i] < 0)
3515 /* If this is a constant that is reloaded into the desired
3516 class by copying it to memory first, count that as another
3517 reload. This is consistent with other code and is
3518 required to avoid choosing another alternative when
3519 the constant is moved into memory by this function on
3520 an early reload pass. Note that the test here is
3521 precisely the same as in the code below that calls
3523 if (CONST_POOL_OK_P (operand_mode[i], operand)
3524 && ((targetm.preferred_reload_class (operand,
3525 this_alternative[i])
3527 || no_input_reloads))
3530 if (this_alternative[i] != NO_REGS)
3534 /* Alternative loses if it requires a type of reload not
3535 permitted for this insn. We can always reload SCRATCH
3536 and objects with a REG_UNUSED note. */
3537 if (GET_CODE (operand) != SCRATCH
3538 && modified[i] != RELOAD_READ && no_output_reloads
3539 && ! find_reg_note (insn, REG_UNUSED, operand))
3541 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3545 /* If we can't reload this value at all, reject this
3546 alternative. Note that we could also lose due to
3547 LIMIT_RELOAD_CLASS, but we don't check that
3550 if (! CONSTANT_P (operand) && this_alternative[i] != NO_REGS)
3552 if (targetm.preferred_reload_class (operand,
3553 this_alternative[i])
3557 if (operand_type[i] == RELOAD_FOR_OUTPUT
3558 && (targetm.preferred_output_reload_class (operand,
3559 this_alternative[i])
3564 /* We prefer to reload pseudos over reloading other things,
3565 since such reloads may be able to be eliminated later.
3566 If we are reloading a SCRATCH, we won't be generating any
3567 insns, just using a register, so it is also preferred.
3568 So bump REJECT in other cases. Don't do this in the
3569 case where we are forcing a constant into memory and
3570 it will then win since we don't want to have a different
3571 alternative match then. */
3572 if (! (REG_P (operand)
3573 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3574 && GET_CODE (operand) != SCRATCH
3575 && ! (const_to_mem && constmemok))
3578 /* Input reloads can be inherited more often than output
3579 reloads can be removed, so penalize output reloads. */
3580 if (operand_type[i] != RELOAD_FOR_INPUT
3581 && GET_CODE (operand) != SCRATCH)
3585 /* If this operand is a pseudo register that didn't get
3586 a hard reg and this alternative accepts some
3587 register, see if the class that we want is a subset
3588 of the preferred class for this register. If not,
3589 but it intersects that class, use the preferred class
3590 instead. If it does not intersect the preferred
3591 class, show that usage of this alternative should be
3592 discouraged; it will be discouraged more still if the
3593 register is `preferred or nothing'. We do this
3594 because it increases the chance of reusing our spill
3595 register in a later insn and avoiding a pair of
3596 memory stores and loads.
3598 Don't bother with this if this alternative will
3599 accept this operand.
3601 Don't do this for a multiword operand, since it is
3602 only a small win and has the risk of requiring more
3603 spill registers, which could cause a large loss.
3605 Don't do this if the preferred class has only one
3606 register because we might otherwise exhaust the
3609 if (! win && ! did_match
3610 && this_alternative[i] != NO_REGS
3611 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3612 && reg_class_size [(int) preferred_class[i]] > 0
3613 && ! small_register_class_p (preferred_class[i]))
3615 if (! reg_class_subset_p (this_alternative[i],
3616 preferred_class[i]))
3618 /* Since we don't have a way of forming the intersection,
3619 we just do something special if the preferred class
3620 is a subset of the class we have; that's the most
3621 common case anyway. */
3622 if (reg_class_subset_p (preferred_class[i],
3623 this_alternative[i]))
3624 this_alternative[i] = preferred_class[i];
3626 reject += (2 + 2 * pref_or_nothing[i]);
3631 /* Now see if any output operands that are marked "earlyclobber"
3632 in this alternative conflict with any input operands
3633 or any memory addresses. */
3635 for (i = 0; i < noperands; i++)
3636 if (this_alternative_earlyclobber[i]
3637 && (this_alternative_win[i] || this_alternative_match_win[i]))
3639 struct decomposition early_data;
3641 early_data = decompose (recog_data.operand[i]);
3643 gcc_assert (modified[i] != RELOAD_READ);
3645 if (this_alternative[i] == NO_REGS)
3647 this_alternative_earlyclobber[i] = 0;
3648 gcc_assert (this_insn_is_asm);
3649 error_for_asm (this_insn,
3650 "%<&%> constraint used with no register class");
3653 for (j = 0; j < noperands; j++)
3654 /* Is this an input operand or a memory ref? */
3655 if ((MEM_P (recog_data.operand[j])
3656 || modified[j] != RELOAD_WRITE)
3658 /* Ignore things like match_operator operands. */
3659 && !recog_data.is_operator[j]
3660 /* Don't count an input operand that is constrained to match
3661 the early clobber operand. */
3662 && ! (this_alternative_matches[j] == i
3663 && rtx_equal_p (recog_data.operand[i],
3664 recog_data.operand[j]))
3665 /* Is it altered by storing the earlyclobber operand? */
3666 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3669 /* If the output is in a non-empty few-regs class,
3670 it's costly to reload it, so reload the input instead. */
3671 if (small_register_class_p (this_alternative[i])
3672 && (REG_P (recog_data.operand[j])
3673 || GET_CODE (recog_data.operand[j]) == SUBREG))
3676 this_alternative_win[j] = 0;
3677 this_alternative_match_win[j] = 0;
3682 /* If an earlyclobber operand conflicts with something,
3683 it must be reloaded, so request this and count the cost. */
3687 this_alternative_win[i] = 0;
3688 this_alternative_match_win[j] = 0;
3689 for (j = 0; j < noperands; j++)
3690 if (this_alternative_matches[j] == i
3691 && this_alternative_match_win[j])
3693 this_alternative_win[j] = 0;
3694 this_alternative_match_win[j] = 0;
3700 /* If one alternative accepts all the operands, no reload required,
3701 choose that alternative; don't consider the remaining ones. */
3704 /* Unswap these so that they are never swapped at `finish'. */
3707 recog_data.operand[commutative] = substed_operand[commutative];
3708 recog_data.operand[commutative + 1]
3709 = substed_operand[commutative + 1];
3711 for (i = 0; i < noperands; i++)
3713 goal_alternative_win[i] = this_alternative_win[i];
3714 goal_alternative_match_win[i] = this_alternative_match_win[i];
3715 goal_alternative[i] = this_alternative[i];
3716 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3717 goal_alternative_matches[i] = this_alternative_matches[i];
3718 goal_alternative_earlyclobber[i]
3719 = this_alternative_earlyclobber[i];
3721 goal_alternative_number = this_alternative_number;
3722 goal_alternative_swapped = swapped;
3723 goal_earlyclobber = this_earlyclobber;
3727 /* REJECT, set by the ! and ? constraint characters and when a register
3728 would be reloaded into a non-preferred class, discourages the use of
3729 this alternative for a reload goal. REJECT is incremented by six
3730 for each ? and two for each non-preferred class. */
3731 losers = losers * 6 + reject;
3733 /* If this alternative can be made to work by reloading,
3734 and it needs less reloading than the others checked so far,
3735 record it as the chosen goal for reloading. */
3740 for (i = 0; i < noperands; i++)
3742 goal_alternative[i] = this_alternative[i];
3743 goal_alternative_win[i] = this_alternative_win[i];
3744 goal_alternative_match_win[i]
3745 = this_alternative_match_win[i];
3746 goal_alternative_offmemok[i]
3747 = this_alternative_offmemok[i];
3748 goal_alternative_matches[i] = this_alternative_matches[i];
3749 goal_alternative_earlyclobber[i]
3750 = this_alternative_earlyclobber[i];
3752 goal_alternative_swapped = swapped;
3754 goal_alternative_number = this_alternative_number;
3755 goal_earlyclobber = this_earlyclobber;
3761 /* If the commutative operands have been swapped, swap
3762 them back in order to check the next alternative. */
3763 recog_data.operand[commutative] = substed_operand[commutative];
3764 recog_data.operand[commutative + 1] = substed_operand[commutative + 1];
3765 /* Unswap the duplicates too. */
3766 for (i = 0; i < recog_data.n_dups; i++)
3767 if (recog_data.dup_num[i] == commutative
3768 || recog_data.dup_num[i] == commutative + 1)
3769 *recog_data.dup_loc[i]
3770 = recog_data.operand[(int) recog_data.dup_num[i]];
3772 /* Unswap the operand related information as well. */
3773 std::swap (preferred_class[commutative],
3774 preferred_class[commutative + 1]);
3775 std::swap (pref_or_nothing[commutative],
3776 pref_or_nothing[commutative + 1]);
3777 std::swap (address_reloaded[commutative],
3778 address_reloaded[commutative + 1]);
3783 /* The operands don't meet the constraints.
3784 goal_alternative describes the alternative
3785 that we could reach by reloading the fewest operands.
3786 Reload so as to fit it. */
3788 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3790 /* No alternative works with reloads?? */
3791 if (insn_code_number >= 0)
3792 fatal_insn ("unable to generate reloads for:", insn);
3793 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3794 /* Avoid further trouble with this insn. */
3795 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3800 /* Jump to `finish' from above if all operands are valid already.
3801 In that case, goal_alternative_win is all 1. */
3804 /* Right now, for any pair of operands I and J that are required to match,
3806 goal_alternative_matches[J] is I.
3807 Set up goal_alternative_matched as the inverse function:
3808 goal_alternative_matched[I] = J. */
3810 for (i = 0; i < noperands; i++)
3811 goal_alternative_matched[i] = -1;
3813 for (i = 0; i < noperands; i++)
3814 if (! goal_alternative_win[i]
3815 && goal_alternative_matches[i] >= 0)
3816 goal_alternative_matched[goal_alternative_matches[i]] = i;
3818 for (i = 0; i < noperands; i++)
3819 goal_alternative_win[i] |= goal_alternative_match_win[i];
3821 /* If the best alternative is with operands 1 and 2 swapped,
3822 consider them swapped before reporting the reloads. Update the
3823 operand numbers of any reloads already pushed. */
3825 if (goal_alternative_swapped)
3827 std::swap (substed_operand[commutative],
3828 substed_operand[commutative + 1]);
3829 std::swap (recog_data.operand[commutative],
3830 recog_data.operand[commutative + 1]);
3831 std::swap (*recog_data.operand_loc[commutative],
3832 *recog_data.operand_loc[commutative + 1]);
3834 for (i = 0; i < recog_data.n_dups; i++)
3835 if (recog_data.dup_num[i] == commutative
3836 || recog_data.dup_num[i] == commutative + 1)
3837 *recog_data.dup_loc[i]
3838 = recog_data.operand[(int) recog_data.dup_num[i]];
3840 for (i = 0; i < n_reloads; i++)
3842 if (rld[i].opnum == commutative)
3843 rld[i].opnum = commutative + 1;
3844 else if (rld[i].opnum == commutative + 1)
3845 rld[i].opnum = commutative;
3849 for (i = 0; i < noperands; i++)
3851 operand_reloadnum[i] = -1;
3853 /* If this is an earlyclobber operand, we need to widen the scope.
3854 The reload must remain valid from the start of the insn being
3855 reloaded until after the operand is stored into its destination.
3856 We approximate this with RELOAD_OTHER even though we know that we
3857 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3859 One special case that is worth checking is when we have an
3860 output that is earlyclobber but isn't used past the insn (typically
3861 a SCRATCH). In this case, we only need have the reload live
3862 through the insn itself, but not for any of our input or output
3864 But we must not accidentally narrow the scope of an existing
3865 RELOAD_OTHER reload - leave these alone.
3867 In any case, anything needed to address this operand can remain
3868 however they were previously categorized. */
3870 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3872 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3873 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3876 /* Any constants that aren't allowed and can't be reloaded
3877 into registers are here changed into memory references. */
3878 for (i = 0; i < noperands; i++)
3879 if (! goal_alternative_win[i])
3881 rtx op = recog_data.operand[i];
3882 rtx subreg = NULL_RTX;
3883 rtx plus = NULL_RTX;
3884 machine_mode mode = operand_mode[i];
3886 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3887 push_reload so we have to let them pass here. */
3888 if (GET_CODE (op) == SUBREG)
3891 op = SUBREG_REG (op);
3892 mode = GET_MODE (op);
3895 if (GET_CODE (op) == PLUS)
3901 if (CONST_POOL_OK_P (mode, op)
3902 && ((targetm.preferred_reload_class (op, goal_alternative[i])
3904 || no_input_reloads))
3906 int this_address_reloaded;
3907 rtx tem = force_const_mem (mode, op);
3909 /* If we stripped a SUBREG or a PLUS above add it back. */
3910 if (plus != NULL_RTX)
3911 tem = gen_rtx_PLUS (mode, XEXP (plus, 0), tem);
3913 if (subreg != NULL_RTX)
3914 tem = gen_rtx_SUBREG (operand_mode[i], tem, SUBREG_BYTE (subreg));
3916 this_address_reloaded = 0;
3917 substed_operand[i] = recog_data.operand[i]
3918 = find_reloads_toplev (tem, i, address_type[i], ind_levels,
3919 0, insn, &this_address_reloaded);
3921 /* If the alternative accepts constant pool refs directly
3922 there will be no reload needed at all. */
3923 if (plus == NULL_RTX
3924 && subreg == NULL_RTX
3925 && alternative_allows_const_pool_ref (this_address_reloaded != 1
3926 ? substed_operand[i]
3928 recog_data.constraints[i],
3929 goal_alternative_number))
3930 goal_alternative_win[i] = 1;
3934 /* Record the values of the earlyclobber operands for the caller. */
3935 if (goal_earlyclobber)
3936 for (i = 0; i < noperands; i++)
3937 if (goal_alternative_earlyclobber[i])
3938 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3940 /* Now record reloads for all the operands that need them. */
3941 for (i = 0; i < noperands; i++)
3942 if (! goal_alternative_win[i])
3944 /* Operands that match previous ones have already been handled. */
3945 if (goal_alternative_matches[i] >= 0)
3947 /* Handle an operand with a nonoffsettable address
3948 appearing where an offsettable address will do
3949 by reloading the address into a base register.
3951 ??? We can also do this when the operand is a register and
3952 reg_equiv_mem is not offsettable, but this is a bit tricky,
3953 so we don't bother with it. It may not be worth doing. */
3954 else if (goal_alternative_matched[i] == -1
3955 && goal_alternative_offmemok[i]
3956 && MEM_P (recog_data.operand[i]))
3958 /* If the address to be reloaded is a VOIDmode constant,
3959 use the default address mode as mode of the reload register,
3960 as would have been done by find_reloads_address. */
3961 addr_space_t as = MEM_ADDR_SPACE (recog_data.operand[i]);
3962 machine_mode address_mode;
3964 address_mode = get_address_mode (recog_data.operand[i]);
3965 operand_reloadnum[i]
3966 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3967 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3968 base_reg_class (VOIDmode, as, MEM, SCRATCH),
3970 VOIDmode, 0, 0, i, RELOAD_OTHER);
3971 rld[operand_reloadnum[i]].inc
3972 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3974 /* If this operand is an output, we will have made any
3975 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3976 now we are treating part of the operand as an input, so
3977 we must change these to RELOAD_FOR_OTHER_ADDRESS. */
3979 if (modified[i] == RELOAD_WRITE)
3981 for (j = 0; j < n_reloads; j++)
3983 if (rld[j].opnum == i)
3985 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3986 rld[j].when_needed = RELOAD_FOR_OTHER_ADDRESS;
3987 else if (rld[j].when_needed
3988 == RELOAD_FOR_OUTADDR_ADDRESS)
3989 rld[j].when_needed = RELOAD_FOR_OTHER_ADDRESS;
3994 else if (goal_alternative_matched[i] == -1)
3996 operand_reloadnum[i]
3997 = push_reload ((modified[i] != RELOAD_WRITE
3998 ? recog_data.operand[i] : 0),
3999 (modified[i] != RELOAD_READ
4000 ? recog_data.operand[i] : 0),
4001 (modified[i] != RELOAD_WRITE
4002 ? recog_data.operand_loc[i] : 0),
4003 (modified[i] != RELOAD_READ
4004 ? recog_data.operand_loc[i] : 0),
4005 (enum reg_class) goal_alternative[i],
4006 (modified[i] == RELOAD_WRITE
4007 ? VOIDmode : operand_mode[i]),
4008 (modified[i] == RELOAD_READ
4009 ? VOIDmode : operand_mode[i]),
4010 (insn_code_number < 0 ? 0
4011 : insn_data[insn_code_number].operand[i].strict_low),
4012 0, i, operand_type[i]);
4014 /* In a matching pair of operands, one must be input only
4015 and the other must be output only.
4016 Pass the input operand as IN and the other as OUT. */
4017 else if (modified[i] == RELOAD_READ
4018 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
4020 operand_reloadnum[i]
4021 = push_reload (recog_data.operand[i],
4022 recog_data.operand[goal_alternative_matched[i]],
4023 recog_data.operand_loc[i],
4024 recog_data.operand_loc[goal_alternative_matched[i]],
4025 (enum reg_class) goal_alternative[i],
4027 operand_mode[goal_alternative_matched[i]],
4028 0, 0, i, RELOAD_OTHER);
4029 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
4031 else if (modified[i] == RELOAD_WRITE
4032 && modified[goal_alternative_matched[i]] == RELOAD_READ)
4034 operand_reloadnum[goal_alternative_matched[i]]
4035 = push_reload (recog_data.operand[goal_alternative_matched[i]],
4036 recog_data.operand[i],
4037 recog_data.operand_loc[goal_alternative_matched[i]],
4038 recog_data.operand_loc[i],
4039 (enum reg_class) goal_alternative[i],
4040 operand_mode[goal_alternative_matched[i]],
4042 0, 0, i, RELOAD_OTHER);
4043 operand_reloadnum[i] = output_reloadnum;
4047 gcc_assert (insn_code_number < 0);
4048 error_for_asm (insn, "inconsistent operand constraints "
4050 /* Avoid further trouble with this insn. */
4051 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
4056 else if (goal_alternative_matched[i] < 0
4057 && goal_alternative_matches[i] < 0
4058 && address_operand_reloaded[i] != 1
4061 /* For each non-matching operand that's a MEM or a pseudo-register
4062 that didn't get a hard register, make an optional reload.
4063 This may get done even if the insn needs no reloads otherwise. */
4065 rtx operand = recog_data.operand[i];
4067 while (GET_CODE (operand) == SUBREG)
4068 operand = SUBREG_REG (operand);
4069 if ((MEM_P (operand)
4071 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4072 /* If this is only for an output, the optional reload would not
4073 actually cause us to use a register now, just note that
4074 something is stored here. */
4075 && (goal_alternative[i] != NO_REGS
4076 || modified[i] == RELOAD_WRITE)
4077 && ! no_input_reloads
4078 /* An optional output reload might allow to delete INSN later.
4079 We mustn't make in-out reloads on insns that are not permitted
4081 If this is an asm, we can't delete it; we must not even call
4082 push_reload for an optional output reload in this case,
4083 because we can't be sure that the constraint allows a register,
4084 and push_reload verifies the constraints for asms. */
4085 && (modified[i] == RELOAD_READ
4086 || (! no_output_reloads && ! this_insn_is_asm)))
4087 operand_reloadnum[i]
4088 = push_reload ((modified[i] != RELOAD_WRITE
4089 ? recog_data.operand[i] : 0),
4090 (modified[i] != RELOAD_READ
4091 ? recog_data.operand[i] : 0),
4092 (modified[i] != RELOAD_WRITE
4093 ? recog_data.operand_loc[i] : 0),
4094 (modified[i] != RELOAD_READ
4095 ? recog_data.operand_loc[i] : 0),
4096 (enum reg_class) goal_alternative[i],
4097 (modified[i] == RELOAD_WRITE
4098 ? VOIDmode : operand_mode[i]),
4099 (modified[i] == RELOAD_READ
4100 ? VOIDmode : operand_mode[i]),
4101 (insn_code_number < 0 ? 0
4102 : insn_data[insn_code_number].operand[i].strict_low),
4103 1, i, operand_type[i]);
4104 /* If a memory reference remains (either as a MEM or a pseudo that
4105 did not get a hard register), yet we can't make an optional
4106 reload, check if this is actually a pseudo register reference;
4107 we then need to emit a USE and/or a CLOBBER so that reload
4108 inheritance will do the right thing. */
4112 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4113 && reg_renumber [REGNO (operand)] < 0)))
4115 operand = *recog_data.operand_loc[i];
4117 while (GET_CODE (operand) == SUBREG)
4118 operand = SUBREG_REG (operand);
4119 if (REG_P (operand))
4121 if (modified[i] != RELOAD_WRITE)
4122 /* We mark the USE with QImode so that we recognize
4123 it as one that can be safely deleted at the end
4125 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4127 if (modified[i] != RELOAD_READ)
4128 emit_insn_after (gen_clobber (operand), insn);
4132 else if (goal_alternative_matches[i] >= 0
4133 && goal_alternative_win[goal_alternative_matches[i]]
4134 && modified[i] == RELOAD_READ
4135 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4136 && ! no_input_reloads && ! no_output_reloads
4139 /* Similarly, make an optional reload for a pair of matching
4140 objects that are in MEM or a pseudo that didn't get a hard reg. */
4142 rtx operand = recog_data.operand[i];
4144 while (GET_CODE (operand) == SUBREG)
4145 operand = SUBREG_REG (operand);
4146 if ((MEM_P (operand)
4148 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4149 && (goal_alternative[goal_alternative_matches[i]] != NO_REGS))
4150 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4151 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4152 recog_data.operand[i],
4153 recog_data.operand_loc[goal_alternative_matches[i]],
4154 recog_data.operand_loc[i],
4155 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4156 operand_mode[goal_alternative_matches[i]],
4158 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4161 /* Perform whatever substitutions on the operands we are supposed
4162 to make due to commutativity or replacement of registers
4163 with equivalent constants or memory slots. */
4165 for (i = 0; i < noperands; i++)
4167 /* We only do this on the last pass through reload, because it is
4168 possible for some data (like reg_equiv_address) to be changed during
4169 later passes. Moreover, we lose the opportunity to get a useful
4170 reload_{in,out}_reg when we do these replacements. */
4174 rtx substitution = substed_operand[i];
4176 *recog_data.operand_loc[i] = substitution;
4178 /* If we're replacing an operand with a LABEL_REF, we need to
4179 make sure that there's a REG_LABEL_OPERAND note attached to
4180 this instruction. */
4181 if (GET_CODE (substitution) == LABEL_REF
4182 && !find_reg_note (insn, REG_LABEL_OPERAND,
4183 label_ref_label (substitution))
4184 /* For a JUMP_P, if it was a branch target it must have
4185 already been recorded as such. */
4187 || !label_is_jump_target_p (label_ref_label (substitution),
4190 add_reg_note (insn, REG_LABEL_OPERAND,
4191 label_ref_label (substitution));
4192 if (LABEL_P (label_ref_label (substitution)))
4193 ++LABEL_NUSES (label_ref_label (substitution));
4198 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4201 /* If this insn pattern contains any MATCH_DUP's, make sure that
4202 they will be substituted if the operands they match are substituted.
4203 Also do now any substitutions we already did on the operands.
4205 Don't do this if we aren't making replacements because we might be
4206 propagating things allocated by frame pointer elimination into places
4207 it doesn't expect. */
4209 if (insn_code_number >= 0 && replace)
4210 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4212 int opno = recog_data.dup_num[i];
4213 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4214 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4218 /* This loses because reloading of prior insns can invalidate the equivalence
4219 (or at least find_equiv_reg isn't smart enough to find it any more),
4220 causing this insn to need more reload regs than it needed before.
4221 It may be too late to make the reload regs available.
4222 Now this optimization is done safely in choose_reload_regs. */
4224 /* For each reload of a reg into some other class of reg,
4225 search for an existing equivalent reg (same value now) in the right class.
4226 We can use it as long as we don't need to change its contents. */
4227 for (i = 0; i < n_reloads; i++)
4228 if (rld[i].reg_rtx == 0
4230 && REG_P (rld[i].in)
4234 = find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
4235 static_reload_reg_p, 0, rld[i].inmode);
4236 /* Prevent generation of insn to load the value
4237 because the one we found already has the value. */
4239 rld[i].in = rld[i].reg_rtx;
4243 /* If we detected error and replaced asm instruction by USE, forget about the
4245 if (GET_CODE (PATTERN (insn)) == USE
4246 && CONST_INT_P (XEXP (PATTERN (insn), 0)))
4249 /* Perhaps an output reload can be combined with another
4250 to reduce needs by one. */
4251 if (!goal_earlyclobber)
4254 /* If we have a pair of reloads for parts of an address, they are reloading
4255 the same object, the operands themselves were not reloaded, and they
4256 are for two operands that are supposed to match, merge the reloads and
4257 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4259 for (i = 0; i < n_reloads; i++)
4263 for (j = i + 1; j < n_reloads; j++)
4264 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4265 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4266 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4267 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4268 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4269 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4270 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4271 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4272 && rtx_equal_p (rld[i].in, rld[j].in)
4273 && (operand_reloadnum[rld[i].opnum] < 0
4274 || rld[operand_reloadnum[rld[i].opnum]].optional)
4275 && (operand_reloadnum[rld[j].opnum] < 0
4276 || rld[operand_reloadnum[rld[j].opnum]].optional)
4277 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4278 || (goal_alternative_matches[rld[j].opnum]
4281 for (k = 0; k < n_replacements; k++)
4282 if (replacements[k].what == j)
4283 replacements[k].what = i;
4285 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4286 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4287 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4289 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4294 /* Scan all the reloads and update their type.
4295 If a reload is for the address of an operand and we didn't reload
4296 that operand, change the type. Similarly, change the operand number
4297 of a reload when two operands match. If a reload is optional, treat it
4298 as though the operand isn't reloaded.
4300 ??? This latter case is somewhat odd because if we do the optional
4301 reload, it means the object is hanging around. Thus we need only
4302 do the address reload if the optional reload was NOT done.
4304 Change secondary reloads to be the address type of their operand, not
4307 If an operand's reload is now RELOAD_OTHER, change any
4308 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4309 RELOAD_FOR_OTHER_ADDRESS. */
4311 for (i = 0; i < n_reloads; i++)
4313 if (rld[i].secondary_p
4314 && rld[i].when_needed == operand_type[rld[i].opnum])
4315 rld[i].when_needed = address_type[rld[i].opnum];
4317 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4318 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4319 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4320 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4321 && (operand_reloadnum[rld[i].opnum] < 0
4322 || rld[operand_reloadnum[rld[i].opnum]].optional))
4324 /* If we have a secondary reload to go along with this reload,
4325 change its type to RELOAD_FOR_OPADDR_ADDR. */
4327 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4328 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4329 && rld[i].secondary_in_reload != -1)
4331 int secondary_in_reload = rld[i].secondary_in_reload;
4333 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4335 /* If there's a tertiary reload we have to change it also. */
4336 if (secondary_in_reload > 0
4337 && rld[secondary_in_reload].secondary_in_reload != -1)
4338 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4339 = RELOAD_FOR_OPADDR_ADDR;
4342 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4343 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4344 && rld[i].secondary_out_reload != -1)
4346 int secondary_out_reload = rld[i].secondary_out_reload;
4348 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4350 /* If there's a tertiary reload we have to change it also. */
4351 if (secondary_out_reload
4352 && rld[secondary_out_reload].secondary_out_reload != -1)
4353 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4354 = RELOAD_FOR_OPADDR_ADDR;
4357 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4358 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4359 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4361 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4364 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4365 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4366 && operand_reloadnum[rld[i].opnum] >= 0
4367 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4369 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4371 if (goal_alternative_matches[rld[i].opnum] >= 0)
4372 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4375 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4376 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4377 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4379 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4380 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4381 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4382 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4383 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4384 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4385 This is complicated by the fact that a single operand can have more
4386 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4387 choose_reload_regs without affecting code quality, and cases that
4388 actually fail are extremely rare, so it turns out to be better to fix
4389 the problem here by not generating cases that choose_reload_regs will
4391 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4392 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4394 We can reduce the register pressure by exploiting that a
4395 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4396 does not conflict with any of them, if it is only used for the first of
4397 the RELOAD_FOR_X_ADDRESS reloads. */
4399 int first_op_addr_num = -2;
4400 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4401 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4402 int need_change = 0;
4403 /* We use last_op_addr_reload and the contents of the above arrays
4404 first as flags - -2 means no instance encountered, -1 means exactly
4405 one instance encountered.
4406 If more than one instance has been encountered, we store the reload
4407 number of the first reload of the kind in question; reload numbers
4408 are known to be non-negative. */
4409 for (i = 0; i < noperands; i++)
4410 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4411 for (i = n_reloads - 1; i >= 0; i--)
4413 switch (rld[i].when_needed)
4415 case RELOAD_FOR_OPERAND_ADDRESS:
4416 if (++first_op_addr_num >= 0)
4418 first_op_addr_num = i;
4422 case RELOAD_FOR_INPUT_ADDRESS:
4423 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4425 first_inpaddr_num[rld[i].opnum] = i;
4429 case RELOAD_FOR_OUTPUT_ADDRESS:
4430 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4432 first_outpaddr_num[rld[i].opnum] = i;
4443 for (i = 0; i < n_reloads; i++)
4446 enum reload_type type;
4448 switch (rld[i].when_needed)
4450 case RELOAD_FOR_OPADDR_ADDR:
4451 first_num = first_op_addr_num;
4452 type = RELOAD_FOR_OPERAND_ADDRESS;
4454 case RELOAD_FOR_INPADDR_ADDRESS:
4455 first_num = first_inpaddr_num[rld[i].opnum];
4456 type = RELOAD_FOR_INPUT_ADDRESS;
4458 case RELOAD_FOR_OUTADDR_ADDRESS:
4459 first_num = first_outpaddr_num[rld[i].opnum];
4460 type = RELOAD_FOR_OUTPUT_ADDRESS;
4467 else if (i > first_num)
4468 rld[i].when_needed = type;
4471 /* Check if the only TYPE reload that uses reload I is
4472 reload FIRST_NUM. */
4473 for (j = n_reloads - 1; j > first_num; j--)
4475 if (rld[j].when_needed == type
4476 && (rld[i].secondary_p
4477 ? rld[j].secondary_in_reload == i
4478 : reg_mentioned_p (rld[i].in, rld[j].in)))
4480 rld[i].when_needed = type;
4489 /* See if we have any reloads that are now allowed to be merged
4490 because we've changed when the reload is needed to
4491 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4492 check for the most common cases. */
4494 for (i = 0; i < n_reloads; i++)
4495 if (rld[i].in != 0 && rld[i].out == 0
4496 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4497 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4498 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4499 for (j = 0; j < n_reloads; j++)
4500 if (i != j && rld[j].in != 0 && rld[j].out == 0
4501 && rld[j].when_needed == rld[i].when_needed
4502 && MATCHES (rld[i].in, rld[j].in)
4503 && rld[i].rclass == rld[j].rclass
4504 && !rld[i].nocombine && !rld[j].nocombine
4505 && rld[i].reg_rtx == rld[j].reg_rtx)
4507 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4508 transfer_replacements (i, j);
4512 /* If we made any reloads for addresses, see if they violate a
4513 "no input reloads" requirement for this insn. But loads that we
4514 do after the insn (such as for output addresses) are fine. */
4515 if (HAVE_cc0 && no_input_reloads)
4516 for (i = 0; i < n_reloads; i++)
4517 gcc_assert (rld[i].in == 0
4518 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4519 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4521 /* Compute reload_mode and reload_nregs. */
4522 for (i = 0; i < n_reloads; i++)
4524 rld[i].mode = rld[i].inmode;
4525 if (rld[i].mode == VOIDmode
4526 || partial_subreg_p (rld[i].mode, rld[i].outmode))
4527 rld[i].mode = rld[i].outmode;
4529 rld[i].nregs = ira_reg_class_max_nregs [rld[i].rclass][rld[i].mode];
4532 /* Special case a simple move with an input reload and a
4533 destination of a hard reg, if the hard reg is ok, use it. */
4534 for (i = 0; i < n_reloads; i++)
4535 if (rld[i].when_needed == RELOAD_FOR_INPUT
4536 && GET_CODE (PATTERN (insn)) == SET
4537 && REG_P (SET_DEST (PATTERN (insn)))
4538 && (SET_SRC (PATTERN (insn)) == rld[i].in
4539 || SET_SRC (PATTERN (insn)) == rld[i].in_reg)
4540 && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4542 rtx dest = SET_DEST (PATTERN (insn));
4543 unsigned int regno = REGNO (dest);
4545 if (regno < FIRST_PSEUDO_REGISTER
4546 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
4547 && targetm.hard_regno_mode_ok (regno, rld[i].mode))
4549 int nr = hard_regno_nregs (regno, rld[i].mode);
4552 for (nri = 1; nri < nr; nri ++)
4553 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
4560 rld[i].reg_rtx = dest;
4567 /* Return true if alternative number ALTNUM in constraint-string
4568 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4569 MEM gives the reference if its address hasn't been fully reloaded,
4570 otherwise it is NULL. */
4573 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED,
4574 const char *constraint, int altnum)
4578 /* Skip alternatives before the one requested. */
4581 while (*constraint++ != ',')
4585 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4586 If one of them is present, this alternative accepts the result of
4587 passing a constant-pool reference through find_reloads_toplev.
4589 The same is true of extra memory constraints if the address
4590 was reloaded into a register. However, the target may elect
4591 to disallow the original constant address, forcing it to be
4592 reloaded into a register instead. */
4593 for (; (c = *constraint) && c != ',' && c != '#';
4594 constraint += CONSTRAINT_LEN (c, constraint))
4596 enum constraint_num cn = lookup_constraint (constraint);
4597 if (insn_extra_memory_constraint (cn)
4598 && (mem == NULL || constraint_satisfied_p (mem, cn)))
4604 /* Scan X for memory references and scan the addresses for reloading.
4605 Also checks for references to "constant" regs that we want to eliminate
4606 and replaces them with the values they stand for.
4607 We may alter X destructively if it contains a reference to such.
4608 If X is just a constant reg, we return the equivalent value
4611 IND_LEVELS says how many levels of indirect addressing this machine
4614 OPNUM and TYPE identify the purpose of the reload.
4616 IS_SET_DEST is true if X is the destination of a SET, which is not
4617 appropriate to be replaced by a constant.
4619 INSN, if nonzero, is the insn in which we do the reload. It is used
4620 to determine if we may generate output reloads, and where to put USEs
4621 for pseudos that we have to replace with stack slots.
4623 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4624 result of find_reloads_address. */
4627 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4628 int ind_levels, int is_set_dest, rtx_insn *insn,
4629 int *address_reloaded)
4631 RTX_CODE code = GET_CODE (x);
4633 const char *fmt = GET_RTX_FORMAT (code);
4639 /* This code is duplicated for speed in find_reloads. */
4640 int regno = REGNO (x);
4641 if (reg_equiv_constant (regno) != 0 && !is_set_dest)
4642 x = reg_equiv_constant (regno);
4644 /* This creates (subreg (mem...)) which would cause an unnecessary
4645 reload of the mem. */
4646 else if (reg_equiv_mem (regno) != 0)
4647 x = reg_equiv_mem (regno);
4649 else if (reg_equiv_memory_loc (regno)
4650 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
4652 rtx mem = make_memloc (x, regno);
4653 if (reg_equiv_address (regno)
4654 || ! rtx_equal_p (mem, reg_equiv_mem (regno)))
4656 /* If this is not a toplevel operand, find_reloads doesn't see
4657 this substitution. We have to emit a USE of the pseudo so
4658 that delete_output_reload can see it. */
4659 if (replace_reloads && recog_data.operand[opnum] != x)
4660 /* We mark the USE with QImode so that we recognize it
4661 as one that can be safely deleted at the end of
4663 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4666 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4667 opnum, type, ind_levels, insn);
4668 if (!rtx_equal_p (x, mem))
4669 push_reg_equiv_alt_mem (regno, x);
4670 if (address_reloaded)
4671 *address_reloaded = i;
4680 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4681 opnum, type, ind_levels, insn);
4682 if (address_reloaded)
4683 *address_reloaded = i;
4688 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4690 /* Check for SUBREG containing a REG that's equivalent to a
4691 constant. If the constant has a known value, truncate it
4692 right now. Similarly if we are extracting a single-word of a
4693 multi-word constant. If the constant is symbolic, allow it
4694 to be substituted normally. push_reload will strip the
4695 subreg later. The constant must not be VOIDmode, because we
4696 will lose the mode of the register (this should never happen
4697 because one of the cases above should handle it). */
4699 int regno = REGNO (SUBREG_REG (x));
4702 if (regno >= FIRST_PSEUDO_REGISTER
4703 && reg_renumber[regno] < 0
4704 && reg_equiv_constant (regno) != 0)
4707 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant (regno),
4708 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4710 if (CONSTANT_P (tem)
4711 && !targetm.legitimate_constant_p (GET_MODE (x), tem))
4713 tem = force_const_mem (GET_MODE (x), tem);
4714 i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4715 &XEXP (tem, 0), opnum, type,
4717 if (address_reloaded)
4718 *address_reloaded = i;
4723 /* If the subreg contains a reg that will be converted to a mem,
4724 attempt to convert the whole subreg to a (narrower or wider)
4725 memory reference instead. If this succeeds, we're done --
4726 otherwise fall through to check whether the inner reg still
4727 needs address reloads anyway. */
4729 if (regno >= FIRST_PSEUDO_REGISTER
4730 && reg_equiv_memory_loc (regno) != 0)
4732 tem = find_reloads_subreg_address (x, opnum, type, ind_levels,
4733 insn, address_reloaded);
4739 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4743 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4744 ind_levels, is_set_dest, insn,
4746 /* If we have replaced a reg with it's equivalent memory loc -
4747 that can still be handled here e.g. if it's in a paradoxical
4748 subreg - we must make the change in a copy, rather than using
4749 a destructive change. This way, find_reloads can still elect
4750 not to do the change. */
4751 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4753 x = shallow_copy_rtx (x);
4756 XEXP (x, i) = new_part;
4762 /* Return a mem ref for the memory equivalent of reg REGNO.
4763 This mem ref is not shared with anything. */
4766 make_memloc (rtx ad, int regno)
4768 /* We must rerun eliminate_regs, in case the elimination
4769 offsets have changed. */
4771 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno), VOIDmode, NULL_RTX),
4774 /* If TEM might contain a pseudo, we must copy it to avoid
4775 modifying it when we do the substitution for the reload. */
4776 if (rtx_varies_p (tem, 0))
4777 tem = copy_rtx (tem);
4779 tem = replace_equiv_address_nv (reg_equiv_memory_loc (regno), tem);
4780 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4782 /* Copy the result if it's still the same as the equivalence, to avoid
4783 modifying it when we do the substitution for the reload. */
4784 if (tem == reg_equiv_memory_loc (regno))
4785 tem = copy_rtx (tem);
4789 /* Returns true if AD could be turned into a valid memory reference
4790 to mode MODE in address space AS by reloading the part pointed to
4791 by PART into a register. */
4794 maybe_memory_address_addr_space_p (machine_mode mode, rtx ad,
4795 addr_space_t as, rtx *part)
4799 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4802 retv = memory_address_addr_space_p (mode, ad, as);
4808 /* Record all reloads needed for handling memory address AD
4809 which appears in *LOC in a memory reference to mode MODE
4810 which itself is found in location *MEMREFLOC.
4811 Note that we take shortcuts assuming that no multi-reg machine mode
4812 occurs as part of an address.
4814 OPNUM and TYPE specify the purpose of this reload.
4816 IND_LEVELS says how many levels of indirect addressing this machine
4819 INSN, if nonzero, is the insn in which we do the reload. It is used
4820 to determine if we may generate output reloads, and where to put USEs
4821 for pseudos that we have to replace with stack slots.
4823 Value is one if this address is reloaded or replaced as a whole; it is
4824 zero if the top level of this address was not reloaded or replaced, and
4825 it is -1 if it may or may not have been reloaded or replaced.
4827 Note that there is no verification that the address will be valid after
4828 this routine does its work. Instead, we rely on the fact that the address
4829 was valid when reload started. So we need only undo things that reload
4830 could have broken. These are wrong register types, pseudos not allocated
4831 to a hard register, and frame pointer elimination. */
4834 find_reloads_address (machine_mode mode, rtx *memrefloc, rtx ad,
4835 rtx *loc, int opnum, enum reload_type type,
4836 int ind_levels, rtx_insn *insn)
4838 addr_space_t as = memrefloc? MEM_ADDR_SPACE (*memrefloc)
4839 : ADDR_SPACE_GENERIC;
4841 int removed_and = 0;
4845 /* If the address is a register, see if it is a legitimate address and
4846 reload if not. We first handle the cases where we need not reload
4847 or where we must reload in a non-standard way. */
4853 if (reg_equiv_constant (regno) != 0)
4855 find_reloads_address_part (reg_equiv_constant (regno), loc,
4856 base_reg_class (mode, as, MEM, SCRATCH),
4857 GET_MODE (ad), opnum, type, ind_levels);
4861 tem = reg_equiv_memory_loc (regno);
4864 if (reg_equiv_address (regno) != 0 || num_not_at_initial_offset)
4866 tem = make_memloc (ad, regno);
4867 if (! strict_memory_address_addr_space_p (GET_MODE (tem),
4869 MEM_ADDR_SPACE (tem)))
4873 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4874 &XEXP (tem, 0), opnum,
4875 ADDR_TYPE (type), ind_levels, insn);
4876 if (!rtx_equal_p (tem, orig))
4877 push_reg_equiv_alt_mem (regno, tem);
4879 /* We can avoid a reload if the register's equivalent memory
4880 expression is valid as an indirect memory address.
4881 But not all addresses are valid in a mem used as an indirect
4882 address: only reg or reg+constant. */
4885 && strict_memory_address_addr_space_p (mode, tem, as)
4886 && (REG_P (XEXP (tem, 0))
4887 || (GET_CODE (XEXP (tem, 0)) == PLUS
4888 && REG_P (XEXP (XEXP (tem, 0), 0))
4889 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4891 /* TEM is not the same as what we'll be replacing the
4892 pseudo with after reload, put a USE in front of INSN
4893 in the final reload pass. */
4895 && num_not_at_initial_offset
4896 && ! rtx_equal_p (tem, reg_equiv_mem (regno)))
4899 /* We mark the USE with QImode so that we
4900 recognize it as one that can be safely
4901 deleted at the end of reload. */
4902 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4905 /* This doesn't really count as replacing the address
4906 as a whole, since it is still a memory access. */
4914 /* The only remaining case where we can avoid a reload is if this is a
4915 hard register that is valid as a base register and which is not the
4916 subject of a CLOBBER in this insn. */
4918 else if (regno < FIRST_PSEUDO_REGISTER
4919 && regno_ok_for_base_p (regno, mode, as, MEM, SCRATCH)
4920 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4923 /* If we do not have one of the cases above, we must do the reload. */
4924 push_reload (ad, NULL_RTX, loc, (rtx*) 0,
4925 base_reg_class (mode, as, MEM, SCRATCH),
4926 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4930 if (strict_memory_address_addr_space_p (mode, ad, as))
4932 /* The address appears valid, so reloads are not needed.
4933 But the address may contain an eliminable register.
4934 This can happen because a machine with indirect addressing
4935 may consider a pseudo register by itself a valid address even when
4936 it has failed to get a hard reg.
4937 So do a tree-walk to find and eliminate all such regs. */
4939 /* But first quickly dispose of a common case. */
4940 if (GET_CODE (ad) == PLUS
4941 && CONST_INT_P (XEXP (ad, 1))
4942 && REG_P (XEXP (ad, 0))
4943 && reg_equiv_constant (REGNO (XEXP (ad, 0))) == 0)
4946 subst_reg_equivs_changed = 0;
4947 *loc = subst_reg_equivs (ad, insn);
4949 if (! subst_reg_equivs_changed)
4952 /* Check result for validity after substitution. */
4953 if (strict_memory_address_addr_space_p (mode, ad, as))
4957 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4960 if (memrefloc && ADDR_SPACE_GENERIC_P (as))
4962 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4967 *memrefloc = copy_rtx (*memrefloc);
4968 XEXP (*memrefloc, 0) = ad;
4969 move_replacements (&ad, &XEXP (*memrefloc, 0));
4975 /* The address is not valid. We have to figure out why. First see if
4976 we have an outer AND and remove it if so. Then analyze what's inside. */
4978 if (GET_CODE (ad) == AND)
4981 loc = &XEXP (ad, 0);
4985 /* One possibility for why the address is invalid is that it is itself
4986 a MEM. This can happen when the frame pointer is being eliminated, a
4987 pseudo is not allocated to a hard register, and the offset between the
4988 frame and stack pointers is not its initial value. In that case the
4989 pseudo will have been replaced by a MEM referring to the
4993 /* First ensure that the address in this MEM is valid. Then, unless
4994 indirect addresses are valid, reload the MEM into a register. */
4996 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4997 opnum, ADDR_TYPE (type),
4998 ind_levels == 0 ? 0 : ind_levels - 1, insn);
5000 /* If tem was changed, then we must create a new memory reference to
5001 hold it and store it back into memrefloc. */
5002 if (tem != ad && memrefloc)
5004 *memrefloc = copy_rtx (*memrefloc);
5005 copy_replacements (tem, XEXP (*memrefloc, 0));
5006 loc = &XEXP (*memrefloc, 0);
5008 loc = &XEXP (*loc, 0);
5011 /* Check similar cases as for indirect addresses as above except
5012 that we can allow pseudos and a MEM since they should have been
5013 taken care of above. */
5016 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
5017 || MEM_P (XEXP (tem, 0))
5018 || ! (REG_P (XEXP (tem, 0))
5019 || (GET_CODE (XEXP (tem, 0)) == PLUS
5020 && REG_P (XEXP (XEXP (tem, 0), 0))
5021 && CONST_INT_P (XEXP (XEXP (tem, 0), 1)))))
5023 /* Must use TEM here, not AD, since it is the one that will
5024 have any subexpressions reloaded, if needed. */
5025 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
5026 base_reg_class (mode, as, MEM, SCRATCH), GET_MODE (tem),
5029 return ! removed_and;
5035 /* If we have address of a stack slot but it's not valid because the
5036 displacement is too large, compute the sum in a register.
5037 Handle all base registers here, not just fp/ap/sp, because on some
5038 targets (namely SH) we can also get too large displacements from
5039 big-endian corrections. */
5040 else if (GET_CODE (ad) == PLUS
5041 && REG_P (XEXP (ad, 0))
5042 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
5043 && CONST_INT_P (XEXP (ad, 1))
5044 && (regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, as, PLUS,
5046 /* Similarly, if we were to reload the base register and the
5047 mem+offset address is still invalid, then we want to reload
5048 the whole address, not just the base register. */
5049 || ! maybe_memory_address_addr_space_p
5050 (mode, ad, as, &(XEXP (ad, 0)))))
5053 /* Unshare the MEM rtx so we can safely alter it. */
5056 *memrefloc = copy_rtx (*memrefloc);
5057 loc = &XEXP (*memrefloc, 0);
5059 loc = &XEXP (*loc, 0);
5062 if (double_reg_address_ok[mode]
5063 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, as,
5066 /* Unshare the sum as well. */
5067 *loc = ad = copy_rtx (ad);
5069 /* Reload the displacement into an index reg.
5070 We assume the frame pointer or arg pointer is a base reg. */
5071 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
5072 INDEX_REG_CLASS, GET_MODE (ad), opnum,
5078 /* If the sum of two regs is not necessarily valid,
5079 reload the sum into a base reg.
5080 That will at least work. */
5081 find_reloads_address_part (ad, loc,
5082 base_reg_class (mode, as, MEM, SCRATCH),
5083 GET_MODE (ad), opnum, type, ind_levels);
5085 return ! removed_and;
5088 /* If we have an indexed stack slot, there are three possible reasons why
5089 it might be invalid: The index might need to be reloaded, the address
5090 might have been made by frame pointer elimination and hence have a
5091 constant out of range, or both reasons might apply.
5093 We can easily check for an index needing reload, but even if that is the
5094 case, we might also have an invalid constant. To avoid making the
5095 conservative assumption and requiring two reloads, we see if this address
5096 is valid when not interpreted strictly. If it is, the only problem is
5097 that the index needs a reload and find_reloads_address_1 will take care
5100 Handle all base registers here, not just fp/ap/sp, because on some
5101 targets (namely SPARC) we can also get invalid addresses from preventive
5102 subreg big-endian corrections made by find_reloads_toplev. We
5103 can also get expressions involving LO_SUM (rather than PLUS) from
5104 find_reloads_subreg_address.
5106 If we decide to do something, it must be that `double_reg_address_ok'
5107 is true. We generate a reload of the base register + constant and
5108 rework the sum so that the reload register will be added to the index.
5109 This is safe because we know the address isn't shared.
5111 We check for the base register as both the first and second operand of
5112 the innermost PLUS and/or LO_SUM. */
5114 for (op_index = 0; op_index < 2; ++op_index)
5116 rtx operand, addend;
5117 enum rtx_code inner_code;
5119 if (GET_CODE (ad) != PLUS)
5122 inner_code = GET_CODE (XEXP (ad, 0));
5123 if (!(GET_CODE (ad) == PLUS
5124 && CONST_INT_P (XEXP (ad, 1))
5125 && (inner_code == PLUS || inner_code == LO_SUM)))
5128 operand = XEXP (XEXP (ad, 0), op_index);
5129 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5132 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5134 if ((regno_ok_for_base_p (REGNO (operand), mode, as, inner_code,
5136 || operand == frame_pointer_rtx
5137 || (!HARD_FRAME_POINTER_IS_FRAME_POINTER
5138 && operand == hard_frame_pointer_rtx)
5139 || (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5140 && operand == arg_pointer_rtx)
5141 || operand == stack_pointer_rtx)
5142 && ! maybe_memory_address_addr_space_p
5143 (mode, ad, as, &XEXP (XEXP (ad, 0), 1 - op_index)))
5148 offset_reg = plus_constant (GET_MODE (ad), operand,
5149 INTVAL (XEXP (ad, 1)));
5151 /* Form the adjusted address. */
5152 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5153 ad = gen_rtx_PLUS (GET_MODE (ad),
5154 op_index == 0 ? offset_reg : addend,
5155 op_index == 0 ? addend : offset_reg);
5157 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5158 op_index == 0 ? offset_reg : addend,
5159 op_index == 0 ? addend : offset_reg);
5162 cls = base_reg_class (mode, as, MEM, GET_CODE (addend));
5163 find_reloads_address_part (XEXP (ad, op_index),
5164 &XEXP (ad, op_index), cls,
5165 GET_MODE (ad), opnum, type, ind_levels);
5166 find_reloads_address_1 (mode, as,
5167 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5168 GET_CODE (XEXP (ad, op_index)),
5169 &XEXP (ad, 1 - op_index), opnum,
5176 /* See if address becomes valid when an eliminable register
5177 in a sum is replaced. */
5180 if (GET_CODE (ad) == PLUS)
5181 tem = subst_indexed_address (ad);
5182 if (tem != ad && strict_memory_address_addr_space_p (mode, tem, as))
5184 /* Ok, we win that way. Replace any additional eliminable
5187 subst_reg_equivs_changed = 0;
5188 tem = subst_reg_equivs (tem, insn);
5190 /* Make sure that didn't make the address invalid again. */
5192 if (! subst_reg_equivs_changed
5193 || strict_memory_address_addr_space_p (mode, tem, as))
5200 /* If constants aren't valid addresses, reload the constant address
5202 if (CONSTANT_P (ad) && ! strict_memory_address_addr_space_p (mode, ad, as))
5204 machine_mode address_mode = GET_MODE (ad);
5205 if (address_mode == VOIDmode)
5206 address_mode = targetm.addr_space.address_mode (as);
5208 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5209 Unshare it so we can safely alter it. */
5210 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5211 && CONSTANT_POOL_ADDRESS_P (ad))
5213 *memrefloc = copy_rtx (*memrefloc);
5214 loc = &XEXP (*memrefloc, 0);
5216 loc = &XEXP (*loc, 0);
5219 find_reloads_address_part (ad, loc,
5220 base_reg_class (mode, as, MEM, SCRATCH),
5221 address_mode, opnum, type, ind_levels);
5222 return ! removed_and;
5225 return find_reloads_address_1 (mode, as, ad, 0, MEM, SCRATCH, loc,
5226 opnum, type, ind_levels, insn);
5229 /* Find all pseudo regs appearing in AD
5230 that are eliminable in favor of equivalent values
5231 and do not have hard regs; replace them by their equivalents.
5232 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5233 front of it for pseudos that we have to replace with stack slots. */
5236 subst_reg_equivs (rtx ad, rtx_insn *insn)
5238 RTX_CODE code = GET_CODE (ad);
5255 int regno = REGNO (ad);
5257 if (reg_equiv_constant (regno) != 0)
5259 subst_reg_equivs_changed = 1;
5260 return reg_equiv_constant (regno);
5262 if (reg_equiv_memory_loc (regno) && num_not_at_initial_offset)
5264 rtx mem = make_memloc (ad, regno);
5265 if (! rtx_equal_p (mem, reg_equiv_mem (regno)))
5267 subst_reg_equivs_changed = 1;
5268 /* We mark the USE with QImode so that we recognize it
5269 as one that can be safely deleted at the end of
5271 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5280 /* Quickly dispose of a common case. */
5281 if (XEXP (ad, 0) == frame_pointer_rtx
5282 && CONST_INT_P (XEXP (ad, 1)))
5290 fmt = GET_RTX_FORMAT (code);
5291 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5293 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5297 /* Compute the sum of X and Y, making canonicalizations assumed in an
5298 address, namely: sum constant integers, surround the sum of two
5299 constants with a CONST, put the constant as the second operand, and
5300 group the constant on the outermost sum.
5302 This routine assumes both inputs are already in canonical form. */
5305 form_sum (machine_mode mode, rtx x, rtx y)
5309 gcc_assert (GET_MODE (x) == mode || GET_MODE (x) == VOIDmode);
5310 gcc_assert (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode);
5312 if (CONST_INT_P (x))
5313 return plus_constant (mode, y, INTVAL (x));
5314 else if (CONST_INT_P (y))
5315 return plus_constant (mode, x, INTVAL (y));
5316 else if (CONSTANT_P (x))
5317 tem = x, x = y, y = tem;
5319 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5320 return form_sum (mode, XEXP (x, 0), form_sum (mode, XEXP (x, 1), y));
5322 /* Note that if the operands of Y are specified in the opposite
5323 order in the recursive calls below, infinite recursion will occur. */
5324 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5325 return form_sum (mode, form_sum (mode, x, XEXP (y, 0)), XEXP (y, 1));
5327 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5328 constant will have been placed second. */
5329 if (CONSTANT_P (x) && CONSTANT_P (y))
5331 if (GET_CODE (x) == CONST)
5333 if (GET_CODE (y) == CONST)
5336 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5339 return gen_rtx_PLUS (mode, x, y);
5342 /* If ADDR is a sum containing a pseudo register that should be
5343 replaced with a constant (from reg_equiv_constant),
5344 return the result of doing so, and also apply the associative
5345 law so that the result is more likely to be a valid address.
5346 (But it is not guaranteed to be one.)
5348 Note that at most one register is replaced, even if more are
5349 replaceable. Also, we try to put the result into a canonical form
5350 so it is more likely to be a valid address.
5352 In all other cases, return ADDR. */
5355 subst_indexed_address (rtx addr)
5357 rtx op0 = 0, op1 = 0, op2 = 0;
5361 if (GET_CODE (addr) == PLUS)
5363 /* Try to find a register to replace. */
5364 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5366 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5367 && reg_renumber[regno] < 0
5368 && reg_equiv_constant (regno) != 0)
5369 op0 = reg_equiv_constant (regno);
5370 else if (REG_P (op1)
5371 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5372 && reg_renumber[regno] < 0
5373 && reg_equiv_constant (regno) != 0)
5374 op1 = reg_equiv_constant (regno);
5375 else if (GET_CODE (op0) == PLUS
5376 && (tem = subst_indexed_address (op0)) != op0)
5378 else if (GET_CODE (op1) == PLUS
5379 && (tem = subst_indexed_address (op1)) != op1)
5384 /* Pick out up to three things to add. */
5385 if (GET_CODE (op1) == PLUS)
5386 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5387 else if (GET_CODE (op0) == PLUS)
5388 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5390 /* Compute the sum. */
5392 op1 = form_sum (GET_MODE (addr), op1, op2);
5394 op0 = form_sum (GET_MODE (addr), op0, op1);
5401 /* Update the REG_INC notes for an insn. It updates all REG_INC
5402 notes for the instruction which refer to REGNO the to refer
5403 to the reload number.
5405 INSN is the insn for which any REG_INC notes need updating.
5407 REGNO is the register number which has been reloaded.
5409 RELOADNUM is the reload number. */
5412 update_auto_inc_notes (rtx_insn *insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5413 int reloadnum ATTRIBUTE_UNUSED)
5418 for (rtx link = REG_NOTES (insn); link; link = XEXP (link, 1))
5419 if (REG_NOTE_KIND (link) == REG_INC
5420 && (int) REGNO (XEXP (link, 0)) == regno)
5421 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5424 /* Record the pseudo registers we must reload into hard registers in a
5425 subexpression of a would-be memory address, X referring to a value
5426 in mode MODE. (This function is not called if the address we find
5429 CONTEXT = 1 means we are considering regs as index regs,
5430 = 0 means we are considering them as base regs.
5431 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5433 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5434 is the code of the index part of the address. Otherwise, pass SCRATCH
5436 OPNUM and TYPE specify the purpose of any reloads made.
5438 IND_LEVELS says how many levels of indirect addressing are
5439 supported at this point in the address.
5441 INSN, if nonzero, is the insn in which we do the reload. It is used
5442 to determine if we may generate output reloads.
5444 We return nonzero if X, as a whole, is reloaded or replaced. */
5446 /* Note that we take shortcuts assuming that no multi-reg machine mode
5447 occurs as part of an address.
5448 Also, this is not fully machine-customizable; it works for machines
5449 such as VAXen and 68000's and 32000's, but other possible machines
5450 could have addressing modes that this does not handle right.
5451 If you add push_reload calls here, you need to make sure gen_reload
5452 handles those cases gracefully. */
5455 find_reloads_address_1 (machine_mode mode, addr_space_t as,
5457 enum rtx_code outer_code, enum rtx_code index_code,
5458 rtx *loc, int opnum, enum reload_type type,
5459 int ind_levels, rtx_insn *insn)
5461 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, AS, OUTER, INDEX) \
5463 ? regno_ok_for_base_p (REGNO, MODE, AS, OUTER, INDEX) \
5464 : REGNO_OK_FOR_INDEX_P (REGNO))
5466 enum reg_class context_reg_class;
5467 RTX_CODE code = GET_CODE (x);
5468 bool reloaded_inner_of_autoinc = false;
5471 context_reg_class = INDEX_REG_CLASS;
5473 context_reg_class = base_reg_class (mode, as, outer_code, index_code);
5479 rtx orig_op0 = XEXP (x, 0);
5480 rtx orig_op1 = XEXP (x, 1);
5481 RTX_CODE code0 = GET_CODE (orig_op0);
5482 RTX_CODE code1 = GET_CODE (orig_op1);
5486 if (GET_CODE (op0) == SUBREG)
5488 op0 = SUBREG_REG (op0);
5489 code0 = GET_CODE (op0);
5490 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5491 op0 = gen_rtx_REG (word_mode,
5493 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5494 GET_MODE (SUBREG_REG (orig_op0)),
5495 SUBREG_BYTE (orig_op0),
5496 GET_MODE (orig_op0))));
5499 if (GET_CODE (op1) == SUBREG)
5501 op1 = SUBREG_REG (op1);
5502 code1 = GET_CODE (op1);
5503 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5504 /* ??? Why is this given op1's mode and above for
5505 ??? op0 SUBREGs we use word_mode? */
5506 op1 = gen_rtx_REG (GET_MODE (op1),
5508 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5509 GET_MODE (SUBREG_REG (orig_op1)),
5510 SUBREG_BYTE (orig_op1),
5511 GET_MODE (orig_op1))));
5513 /* Plus in the index register may be created only as a result of
5514 register rematerialization for expression like &localvar*4. Reload it.
5515 It may be possible to combine the displacement on the outer level,
5516 but it is probably not worthwhile to do so. */
5519 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5520 opnum, ADDR_TYPE (type), ind_levels, insn);
5521 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5523 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5527 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5528 || code0 == ZERO_EXTEND || code1 == MEM)
5530 find_reloads_address_1 (mode, as, orig_op0, 1, PLUS, SCRATCH,
5531 &XEXP (x, 0), opnum, type, ind_levels,
5533 find_reloads_address_1 (mode, as, orig_op1, 0, PLUS, code0,
5534 &XEXP (x, 1), opnum, type, ind_levels,
5538 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5539 || code1 == ZERO_EXTEND || code0 == MEM)
5541 find_reloads_address_1 (mode, as, orig_op0, 0, PLUS, code1,
5542 &XEXP (x, 0), opnum, type, ind_levels,
5544 find_reloads_address_1 (mode, as, orig_op1, 1, PLUS, SCRATCH,
5545 &XEXP (x, 1), opnum, type, ind_levels,
5549 else if (code0 == CONST_INT || code0 == CONST
5550 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5551 find_reloads_address_1 (mode, as, orig_op1, 0, PLUS, code0,
5552 &XEXP (x, 1), opnum, type, ind_levels,
5555 else if (code1 == CONST_INT || code1 == CONST
5556 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5557 find_reloads_address_1 (mode, as, orig_op0, 0, PLUS, code1,
5558 &XEXP (x, 0), opnum, type, ind_levels,
5561 else if (code0 == REG && code1 == REG)
5563 if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5564 && regno_ok_for_base_p (REGNO (op0), mode, as, PLUS, REG))
5566 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5567 && regno_ok_for_base_p (REGNO (op1), mode, as, PLUS, REG))
5569 else if (regno_ok_for_base_p (REGNO (op0), mode, as, PLUS, REG))
5570 find_reloads_address_1 (mode, as, orig_op1, 1, PLUS, SCRATCH,
5571 &XEXP (x, 1), opnum, type, ind_levels,
5573 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5574 find_reloads_address_1 (mode, as, orig_op0, 0, PLUS, REG,
5575 &XEXP (x, 0), opnum, type, ind_levels,
5577 else if (regno_ok_for_base_p (REGNO (op1), mode, as, PLUS, REG))
5578 find_reloads_address_1 (mode, as, orig_op0, 1, PLUS, SCRATCH,
5579 &XEXP (x, 0), opnum, type, ind_levels,
5581 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5582 find_reloads_address_1 (mode, as, orig_op1, 0, PLUS, REG,
5583 &XEXP (x, 1), opnum, type, ind_levels,
5587 find_reloads_address_1 (mode, as, orig_op0, 0, PLUS, REG,
5588 &XEXP (x, 0), opnum, type, ind_levels,
5590 find_reloads_address_1 (mode, as, orig_op1, 1, PLUS, SCRATCH,
5591 &XEXP (x, 1), opnum, type, ind_levels,
5596 else if (code0 == REG)
5598 find_reloads_address_1 (mode, as, orig_op0, 1, PLUS, SCRATCH,
5599 &XEXP (x, 0), opnum, type, ind_levels,
5601 find_reloads_address_1 (mode, as, orig_op1, 0, PLUS, REG,
5602 &XEXP (x, 1), opnum, type, ind_levels,
5606 else if (code1 == REG)
5608 find_reloads_address_1 (mode, as, orig_op1, 1, PLUS, SCRATCH,
5609 &XEXP (x, 1), opnum, type, ind_levels,
5611 find_reloads_address_1 (mode, as, orig_op0, 0, PLUS, REG,
5612 &XEXP (x, 0), opnum, type, ind_levels,
5622 rtx op0 = XEXP (x, 0);
5623 rtx op1 = XEXP (x, 1);
5624 enum rtx_code index_code;
5628 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5631 /* Currently, we only support {PRE,POST}_MODIFY constructs
5632 where a base register is {inc,dec}remented by the contents
5633 of another register or by a constant value. Thus, these
5634 operands must match. */
5635 gcc_assert (op0 == XEXP (op1, 0));
5637 /* Require index register (or constant). Let's just handle the
5638 register case in the meantime... If the target allows
5639 auto-modify by a constant then we could try replacing a pseudo
5640 register with its equivalent constant where applicable.
5642 We also handle the case where the register was eliminated
5643 resulting in a PLUS subexpression.
5645 If we later decide to reload the whole PRE_MODIFY or
5646 POST_MODIFY, inc_for_reload might clobber the reload register
5647 before reading the index. The index register might therefore
5648 need to live longer than a TYPE reload normally would, so be
5649 conservative and class it as RELOAD_OTHER. */
5650 if ((REG_P (XEXP (op1, 1))
5651 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5652 || GET_CODE (XEXP (op1, 1)) == PLUS)
5653 find_reloads_address_1 (mode, as, XEXP (op1, 1), 1, code, SCRATCH,
5654 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5657 gcc_assert (REG_P (XEXP (op1, 0)));
5659 regno = REGNO (XEXP (op1, 0));
5660 index_code = GET_CODE (XEXP (op1, 1));
5662 /* A register that is incremented cannot be constant! */
5663 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5664 || reg_equiv_constant (regno) == 0);
5666 /* Handle a register that is equivalent to a memory location
5667 which cannot be addressed directly. */
5668 if (reg_equiv_memory_loc (regno) != 0
5669 && (reg_equiv_address (regno) != 0
5670 || num_not_at_initial_offset))
5672 rtx tem = make_memloc (XEXP (x, 0), regno);
5674 if (reg_equiv_address (regno)
5675 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5679 /* First reload the memory location's address.
5680 We can't use ADDR_TYPE (type) here, because we need to
5681 write back the value after reading it, hence we actually
5682 need two registers. */
5683 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5684 &XEXP (tem, 0), opnum,
5688 if (!rtx_equal_p (tem, orig))
5689 push_reg_equiv_alt_mem (regno, tem);
5691 /* Then reload the memory location into a base
5693 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5695 base_reg_class (mode, as,
5697 GET_MODE (x), GET_MODE (x), 0,
5698 0, opnum, RELOAD_OTHER);
5700 update_auto_inc_notes (this_insn, regno, reloadnum);
5705 if (reg_renumber[regno] >= 0)
5706 regno = reg_renumber[regno];
5708 /* We require a base register here... */
5709 if (!regno_ok_for_base_p (regno, GET_MODE (x), as, code, index_code))
5711 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5712 &XEXP (op1, 0), &XEXP (x, 0),
5713 base_reg_class (mode, as,
5715 GET_MODE (x), GET_MODE (x), 0, 0,
5716 opnum, RELOAD_OTHER);
5718 update_auto_inc_notes (this_insn, regno, reloadnum);
5728 if (REG_P (XEXP (x, 0)))
5730 int regno = REGNO (XEXP (x, 0));
5734 /* A register that is incremented cannot be constant! */
5735 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5736 || reg_equiv_constant (regno) == 0);
5738 /* Handle a register that is equivalent to a memory location
5739 which cannot be addressed directly. */
5740 if (reg_equiv_memory_loc (regno) != 0
5741 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5743 rtx tem = make_memloc (XEXP (x, 0), regno);
5744 if (reg_equiv_address (regno)
5745 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5749 /* First reload the memory location's address.
5750 We can't use ADDR_TYPE (type) here, because we need to
5751 write back the value after reading it, hence we actually
5752 need two registers. */
5753 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5754 &XEXP (tem, 0), opnum, type,
5756 reloaded_inner_of_autoinc = true;
5757 if (!rtx_equal_p (tem, orig))
5758 push_reg_equiv_alt_mem (regno, tem);
5759 /* Put this inside a new increment-expression. */
5760 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5761 /* Proceed to reload that, as if it contained a register. */
5765 /* If we have a hard register that is ok in this incdec context,
5766 don't make a reload. If the register isn't nice enough for
5767 autoincdec, we can reload it. But, if an autoincrement of a
5768 register that we here verified as playing nice, still outside
5769 isn't "valid", it must be that no autoincrement is "valid".
5770 If that is true and something made an autoincrement anyway,
5771 this must be a special context where one is allowed.
5772 (For example, a "push" instruction.)
5773 We can't improve this address, so leave it alone. */
5775 /* Otherwise, reload the autoincrement into a suitable hard reg
5776 and record how much to increment by. */
5778 if (reg_renumber[regno] >= 0)
5779 regno = reg_renumber[regno];
5780 if (regno >= FIRST_PSEUDO_REGISTER
5781 || !REG_OK_FOR_CONTEXT (context, regno, mode, as, code,
5786 /* If we can output the register afterwards, do so, this
5787 saves the extra update.
5788 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5789 CALL_INSN - and it does not set CC0.
5790 But don't do this if we cannot directly address the
5791 memory location, since this will make it harder to
5792 reuse address reloads, and increases register pressure.
5793 Also don't do this if we can probably update x directly. */
5794 rtx equiv = (MEM_P (XEXP (x, 0))
5796 : reg_equiv_mem (regno));
5797 enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
5798 if (insn && NONJUMP_INSN_P (insn)
5800 && ! sets_cc0_p (PATTERN (insn))
5802 && (regno < FIRST_PSEUDO_REGISTER
5804 && memory_operand (equiv, GET_MODE (equiv))
5805 && ! (icode != CODE_FOR_nothing
5806 && insn_operand_matches (icode, 0, equiv)
5807 && insn_operand_matches (icode, 1, equiv))))
5808 /* Using RELOAD_OTHER means we emit this and the reload we
5809 made earlier in the wrong order. */
5810 && !reloaded_inner_of_autoinc)
5812 /* We use the original pseudo for loc, so that
5813 emit_reload_insns() knows which pseudo this
5814 reload refers to and updates the pseudo rtx, not
5815 its equivalent memory location, as well as the
5816 corresponding entry in reg_last_reload_reg. */
5817 loc = &XEXP (x_orig, 0);
5820 = push_reload (x, x, loc, loc,
5822 GET_MODE (x), GET_MODE (x), 0, 0,
5823 opnum, RELOAD_OTHER);
5828 = push_reload (x, x, loc, (rtx*) 0,
5830 GET_MODE (x), GET_MODE (x), 0, 0,
5833 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5838 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5848 /* Look for parts to reload in the inner expression and reload them
5849 too, in addition to this operation. Reloading all inner parts in
5850 addition to this one shouldn't be necessary, but at this point,
5851 we don't know if we can possibly omit any part that *can* be
5852 reloaded. Targets that are better off reloading just either part
5853 (or perhaps even a different part of an outer expression), should
5854 define LEGITIMIZE_RELOAD_ADDRESS. */
5855 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), as, XEXP (x, 0),
5856 context, code, SCRATCH, &XEXP (x, 0), opnum,
5857 type, ind_levels, insn);
5858 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5860 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5864 /* This is probably the result of a substitution, by eliminate_regs, of
5865 an equivalent address for a pseudo that was not allocated to a hard
5866 register. Verify that the specified address is valid and reload it
5869 Since we know we are going to reload this item, don't decrement for
5870 the indirection level.
5872 Note that this is actually conservative: it would be slightly more
5873 efficient to use the value of SPILL_INDIRECT_LEVELS from
5876 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5877 opnum, ADDR_TYPE (type), ind_levels, insn);
5878 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5880 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5885 int regno = REGNO (x);
5887 if (reg_equiv_constant (regno) != 0)
5889 find_reloads_address_part (reg_equiv_constant (regno), loc,
5891 GET_MODE (x), opnum, type, ind_levels);
5895 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5896 that feeds this insn. */
5897 if (reg_equiv_mem (regno) != 0)
5899 push_reload (reg_equiv_mem (regno), NULL_RTX, loc, (rtx*) 0,
5901 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5906 if (reg_equiv_memory_loc (regno)
5907 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5909 rtx tem = make_memloc (x, regno);
5910 if (reg_equiv_address (regno) != 0
5911 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5914 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5915 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5917 if (!rtx_equal_p (x, tem))
5918 push_reg_equiv_alt_mem (regno, x);
5922 if (reg_renumber[regno] >= 0)
5923 regno = reg_renumber[regno];
5925 if (regno >= FIRST_PSEUDO_REGISTER
5926 || !REG_OK_FOR_CONTEXT (context, regno, mode, as, outer_code,
5929 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5931 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5935 /* If a register appearing in an address is the subject of a CLOBBER
5936 in this insn, reload it into some other register to be safe.
5937 The CLOBBER is supposed to make the register unavailable
5938 from before this insn to after it. */
5939 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5941 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5943 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5950 if (REG_P (SUBREG_REG (x)))
5952 /* If this is a SUBREG of a hard register and the resulting register
5953 is of the wrong class, reload the whole SUBREG. This avoids
5954 needless copies if SUBREG_REG is multi-word. */
5955 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5957 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5959 if (!REG_OK_FOR_CONTEXT (context, regno, mode, as, outer_code,
5962 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5964 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5968 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5969 is larger than the class size, then reload the whole SUBREG. */
5972 enum reg_class rclass = context_reg_class;
5973 if (ira_reg_class_max_nregs [rclass][GET_MODE (SUBREG_REG (x))]
5974 > reg_class_size[(int) rclass])
5976 /* If the inner register will be replaced by a memory
5977 reference, we can do this only if we can replace the
5978 whole subreg by a (narrower) memory reference. If
5979 this is not possible, fall through and reload just
5980 the inner register (including address reloads). */
5981 if (reg_equiv_memory_loc (REGNO (SUBREG_REG (x))) != 0)
5983 rtx tem = find_reloads_subreg_address (x, opnum,
5989 push_reload (tem, NULL_RTX, loc, (rtx*) 0, rclass,
5990 GET_MODE (tem), VOIDmode, 0, 0,
5997 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
5998 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
6011 const char *fmt = GET_RTX_FORMAT (code);
6014 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6017 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6019 find_reloads_address_1 (mode, as, XEXP (x, i), context,
6020 code, SCRATCH, &XEXP (x, i),
6021 opnum, type, ind_levels, insn);
6025 #undef REG_OK_FOR_CONTEXT
6029 /* X, which is found at *LOC, is a part of an address that needs to be
6030 reloaded into a register of class RCLASS. If X is a constant, or if
6031 X is a PLUS that contains a constant, check that the constant is a
6032 legitimate operand and that we are supposed to be able to load
6033 it into the register.
6035 If not, force the constant into memory and reload the MEM instead.
6037 MODE is the mode to use, in case X is an integer constant.
6039 OPNUM and TYPE describe the purpose of any reloads made.
6041 IND_LEVELS says how many levels of indirect addressing this machine
6045 find_reloads_address_part (rtx x, rtx *loc, enum reg_class rclass,
6046 machine_mode mode, int opnum,
6047 enum reload_type type, int ind_levels)
6050 && (!targetm.legitimate_constant_p (mode, x)
6051 || targetm.preferred_reload_class (x, rclass) == NO_REGS))
6053 x = force_const_mem (mode, x);
6054 find_reloads_address (mode, &x, XEXP (x, 0), &XEXP (x, 0),
6055 opnum, type, ind_levels, 0);
6058 else if (GET_CODE (x) == PLUS
6059 && CONSTANT_P (XEXP (x, 1))
6060 && (!targetm.legitimate_constant_p (GET_MODE (x), XEXP (x, 1))
6061 || targetm.preferred_reload_class (XEXP (x, 1), rclass)
6066 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
6067 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
6068 find_reloads_address (mode, &XEXP (x, 1), XEXP (tem, 0), &XEXP (tem, 0),
6069 opnum, type, ind_levels, 0);
6072 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6073 mode, VOIDmode, 0, 0, opnum, type);
6076 /* X, a subreg of a pseudo, is a part of an address that needs to be
6077 reloaded, and the pseusdo is equivalent to a memory location.
6079 Attempt to replace the whole subreg by a (possibly narrower or wider)
6080 memory reference. If this is possible, return this new memory
6081 reference, and push all required address reloads. Otherwise,
6084 OPNUM and TYPE identify the purpose of the reload.
6086 IND_LEVELS says how many levels of indirect addressing are
6087 supported at this point in the address.
6089 INSN, if nonzero, is the insn in which we do the reload. It is used
6090 to determine where to put USEs for pseudos that we have to replace with
6094 find_reloads_subreg_address (rtx x, int opnum, enum reload_type type,
6095 int ind_levels, rtx_insn *insn,
6096 int *address_reloaded)
6098 machine_mode outer_mode = GET_MODE (x);
6099 machine_mode inner_mode = GET_MODE (SUBREG_REG (x));
6100 int regno = REGNO (SUBREG_REG (x));
6105 gcc_assert (reg_equiv_memory_loc (regno) != 0);
6107 /* We cannot replace the subreg with a modified memory reference if:
6109 - we have a paradoxical subreg that implicitly acts as a zero or
6110 sign extension operation due to LOAD_EXTEND_OP;
6112 - we have a subreg that is implicitly supposed to act on the full
6113 register due to WORD_REGISTER_OPERATIONS (see also eliminate_regs);
6115 - the address of the equivalent memory location is mode-dependent; or
6117 - we have a paradoxical subreg and the resulting memory is not
6118 sufficiently aligned to allow access in the wider mode.
6120 In addition, we choose not to perform the replacement for *any*
6121 paradoxical subreg, even if it were possible in principle. This
6122 is to avoid generating wider memory references than necessary.
6124 This corresponds to how previous versions of reload used to handle
6125 paradoxical subregs where no address reload was required. */
6127 if (paradoxical_subreg_p (x))
6130 if (WORD_REGISTER_OPERATIONS
6131 && partial_subreg_p (outer_mode, inner_mode)
6132 && ((GET_MODE_SIZE (outer_mode) - 1) / UNITS_PER_WORD
6133 == (GET_MODE_SIZE (inner_mode) - 1) / UNITS_PER_WORD))
6136 /* Since we don't attempt to handle paradoxical subregs, we can just
6137 call into simplify_subreg, which will handle all remaining checks
6139 orig = make_memloc (SUBREG_REG (x), regno);
6140 offset = SUBREG_BYTE (x);
6141 tem = simplify_subreg (outer_mode, orig, inner_mode, offset);
6142 if (!tem || !MEM_P (tem))
6145 /* Now push all required address reloads, if any. */
6146 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6147 XEXP (tem, 0), &XEXP (tem, 0),
6148 opnum, type, ind_levels, insn);
6149 /* ??? Do we need to handle nonzero offsets somehow? */
6150 if (known_eq (offset, 0) && !rtx_equal_p (tem, orig))
6151 push_reg_equiv_alt_mem (regno, tem);
6153 /* For some processors an address may be valid in the original mode but
6154 not in a smaller mode. For example, ARM accepts a scaled index register
6155 in SImode but not in HImode. Note that this is only a problem if the
6156 address in reg_equiv_mem is already invalid in the new mode; other
6157 cases would be fixed by find_reloads_address as usual.
6159 ??? We attempt to handle such cases here by doing an additional reload
6160 of the full address after the usual processing by find_reloads_address.
6161 Note that this may not work in the general case, but it seems to cover
6162 the cases where this situation currently occurs. A more general fix
6163 might be to reload the *value* instead of the address, but this would
6164 not be expected by the callers of this routine as-is.
6166 If find_reloads_address already completed replaced the address, there
6167 is nothing further to do. */
6169 && reg_equiv_mem (regno) != 0
6170 && !strict_memory_address_addr_space_p
6171 (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0),
6172 MEM_ADDR_SPACE (reg_equiv_mem (regno))))
6174 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6175 base_reg_class (GET_MODE (tem), MEM_ADDR_SPACE (tem),
6177 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0, opnum, type);
6181 /* If this is not a toplevel operand, find_reloads doesn't see this
6182 substitution. We have to emit a USE of the pseudo so that
6183 delete_output_reload can see it. */
6184 if (replace_reloads && recog_data.operand[opnum] != x)
6185 /* We mark the USE with QImode so that we recognize it as one that
6186 can be safely deleted at the end of reload. */
6187 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn),
6190 if (address_reloaded)
6191 *address_reloaded = reloaded;
6196 /* Substitute into the current INSN the registers into which we have reloaded
6197 the things that need reloading. The array `replacements'
6198 contains the locations of all pointers that must be changed
6199 and says what to replace them with.
6201 Return the rtx that X translates into; usually X, but modified. */
6204 subst_reloads (rtx_insn *insn)
6208 for (i = 0; i < n_replacements; i++)
6210 struct replacement *r = &replacements[i];
6211 rtx reloadreg = rld[r->what].reg_rtx;
6215 /* This checking takes a very long time on some platforms
6216 causing the gcc.c-torture/compile/limits-fnargs.c test
6217 to time out during testing. See PR 31850.
6219 Internal consistency test. Check that we don't modify
6220 anything in the equivalence arrays. Whenever something from
6221 those arrays needs to be reloaded, it must be unshared before
6222 being substituted into; the equivalence must not be modified.
6223 Otherwise, if the equivalence is used after that, it will
6224 have been modified, and the thing substituted (probably a
6225 register) is likely overwritten and not a usable equivalence. */
6228 for (check_regno = 0; check_regno < max_regno; check_regno++)
6230 #define CHECK_MODF(ARRAY) \
6231 gcc_assert (!(*reg_equivs)[check_regno].ARRAY \
6232 || !loc_mentioned_in_p (r->where, \
6233 (*reg_equivs)[check_regno].ARRAY))
6235 CHECK_MODF (constant);
6236 CHECK_MODF (memory_loc);
6237 CHECK_MODF (address);
6241 #endif /* DEBUG_RELOAD */
6243 /* If we're replacing a LABEL_REF with a register, there must
6244 already be an indication (to e.g. flow) which label this
6245 register refers to. */
6246 gcc_assert (GET_CODE (*r->where) != LABEL_REF
6248 || find_reg_note (insn,
6250 XEXP (*r->where, 0))
6251 || label_is_jump_target_p (XEXP (*r->where, 0), insn));
6253 /* Encapsulate RELOADREG so its machine mode matches what
6254 used to be there. Note that gen_lowpart_common will
6255 do the wrong thing if RELOADREG is multi-word. RELOADREG
6256 will always be a REG here. */
6257 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6258 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6260 *r->where = reloadreg;
6262 /* If reload got no reg and isn't optional, something's wrong. */
6264 gcc_assert (rld[r->what].optional);
6268 /* Make a copy of any replacements being done into X and move those
6269 copies to locations in Y, a copy of X. */
6272 copy_replacements (rtx x, rtx y)
6274 copy_replacements_1 (&x, &y, n_replacements);
6278 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6282 struct replacement *r;
6286 for (j = 0; j < orig_replacements; j++)
6287 if (replacements[j].where == px)
6289 r = &replacements[n_replacements++];
6291 r->what = replacements[j].what;
6292 r->mode = replacements[j].mode;
6297 code = GET_CODE (x);
6298 fmt = GET_RTX_FORMAT (code);
6300 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6303 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6304 else if (fmt[i] == 'E')
6305 for (j = XVECLEN (x, i); --j >= 0; )
6306 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6311 /* Change any replacements being done to *X to be done to *Y. */
6314 move_replacements (rtx *x, rtx *y)
6318 for (i = 0; i < n_replacements; i++)
6319 if (replacements[i].where == x)
6320 replacements[i].where = y;
6323 /* If LOC was scheduled to be replaced by something, return the replacement.
6324 Otherwise, return *LOC. */
6327 find_replacement (rtx *loc)
6329 struct replacement *r;
6331 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6333 rtx reloadreg = rld[r->what].reg_rtx;
6335 if (reloadreg && r->where == loc)
6337 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6338 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6342 else if (reloadreg && GET_CODE (*loc) == SUBREG
6343 && r->where == &SUBREG_REG (*loc))
6345 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6346 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6348 return simplify_gen_subreg (GET_MODE (*loc), reloadreg,
6349 GET_MODE (SUBREG_REG (*loc)),
6350 SUBREG_BYTE (*loc));
6354 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6355 what's inside and make a new rtl if so. */
6356 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6357 || GET_CODE (*loc) == MULT)
6359 rtx x = find_replacement (&XEXP (*loc, 0));
6360 rtx y = find_replacement (&XEXP (*loc, 1));
6362 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6363 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6369 /* Return nonzero if register in range [REGNO, ENDREGNO)
6370 appears either explicitly or implicitly in X
6371 other than being stored into (except for earlyclobber operands).
6373 References contained within the substructure at LOC do not count.
6374 LOC may be zero, meaning don't ignore anything.
6376 This is similar to refers_to_regno_p in rtlanal.c except that we
6377 look at equivalences for pseudos that didn't get hard registers. */
6380 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6392 code = GET_CODE (x);
6399 /* If this is a pseudo, a hard register must not have been allocated.
6400 X must therefore either be a constant or be in memory. */
6401 if (r >= FIRST_PSEUDO_REGISTER)
6403 if (reg_equiv_memory_loc (r))
6404 return refers_to_regno_for_reload_p (regno, endregno,
6405 reg_equiv_memory_loc (r),
6408 gcc_assert (reg_equiv_constant (r) || reg_equiv_invariant (r));
6412 return endregno > r && regno < END_REGNO (x);
6415 /* If this is a SUBREG of a hard reg, we can see exactly which
6416 registers are being modified. Otherwise, handle normally. */
6417 if (REG_P (SUBREG_REG (x))
6418 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6420 unsigned int inner_regno = subreg_regno (x);
6421 unsigned int inner_endregno
6422 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6423 ? subreg_nregs (x) : 1);
6425 return endregno > inner_regno && regno < inner_endregno;
6431 if (&SET_DEST (x) != loc
6432 /* Note setting a SUBREG counts as referring to the REG it is in for
6433 a pseudo but not for hard registers since we can
6434 treat each word individually. */
6435 && ((GET_CODE (SET_DEST (x)) == SUBREG
6436 && loc != &SUBREG_REG (SET_DEST (x))
6437 && REG_P (SUBREG_REG (SET_DEST (x)))
6438 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6439 && refers_to_regno_for_reload_p (regno, endregno,
6440 SUBREG_REG (SET_DEST (x)),
6442 /* If the output is an earlyclobber operand, this is
6444 || ((!REG_P (SET_DEST (x))
6445 || earlyclobber_operand_p (SET_DEST (x)))
6446 && refers_to_regno_for_reload_p (regno, endregno,
6447 SET_DEST (x), loc))))
6450 if (code == CLOBBER || loc == &SET_SRC (x))
6459 /* X does not match, so try its subexpressions. */
6461 fmt = GET_RTX_FORMAT (code);
6462 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6464 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6472 if (refers_to_regno_for_reload_p (regno, endregno,
6476 else if (fmt[i] == 'E')
6479 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6480 if (loc != &XVECEXP (x, i, j)
6481 && refers_to_regno_for_reload_p (regno, endregno,
6482 XVECEXP (x, i, j), loc))
6489 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6490 we check if any register number in X conflicts with the relevant register
6491 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6492 contains a MEM (we don't bother checking for memory addresses that can't
6493 conflict because we expect this to be a rare case.
6495 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6496 that we look at equivalences for pseudos that didn't get hard registers. */
6499 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6501 int regno, endregno;
6503 /* Overly conservative. */
6504 if (GET_CODE (x) == STRICT_LOW_PART
6505 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6508 /* If either argument is a constant, then modifying X can not affect IN. */
6509 if (CONSTANT_P (x) || CONSTANT_P (in))
6511 else if (GET_CODE (x) == SUBREG && MEM_P (SUBREG_REG (x)))
6512 return refers_to_mem_for_reload_p (in);
6513 else if (GET_CODE (x) == SUBREG)
6515 regno = REGNO (SUBREG_REG (x));
6516 if (regno < FIRST_PSEUDO_REGISTER)
6517 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6518 GET_MODE (SUBREG_REG (x)),
6521 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6522 ? subreg_nregs (x) : 1);
6524 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6530 /* If this is a pseudo, it must not have been assigned a hard register.
6531 Therefore, it must either be in memory or be a constant. */
6533 if (regno >= FIRST_PSEUDO_REGISTER)
6535 if (reg_equiv_memory_loc (regno))
6536 return refers_to_mem_for_reload_p (in);
6537 gcc_assert (reg_equiv_constant (regno));
6541 endregno = END_REGNO (x);
6543 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6546 return refers_to_mem_for_reload_p (in);
6547 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6548 || GET_CODE (x) == CC0)
6549 return reg_mentioned_p (x, in);
6552 gcc_assert (GET_CODE (x) == PLUS);
6554 /* We actually want to know if X is mentioned somewhere inside IN.
6555 We must not say that (plus (sp) (const_int 124)) is in
6556 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6557 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6558 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6563 else if (GET_CODE (in) == PLUS)
6564 return (rtx_equal_p (x, in)
6565 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6566 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6567 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6568 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6574 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6578 refers_to_mem_for_reload_p (rtx x)
6587 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6588 && reg_equiv_memory_loc (REGNO (x)));
6590 fmt = GET_RTX_FORMAT (GET_CODE (x));
6591 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6593 && (MEM_P (XEXP (x, i))
6594 || refers_to_mem_for_reload_p (XEXP (x, i))))
6600 /* Check the insns before INSN to see if there is a suitable register
6601 containing the same value as GOAL.
6602 If OTHER is -1, look for a register in class RCLASS.
6603 Otherwise, just see if register number OTHER shares GOAL's value.
6605 Return an rtx for the register found, or zero if none is found.
6607 If RELOAD_REG_P is (short *)1,
6608 we reject any hard reg that appears in reload_reg_rtx
6609 because such a hard reg is also needed coming into this insn.
6611 If RELOAD_REG_P is any other nonzero value,
6612 it is a vector indexed by hard reg number
6613 and we reject any hard reg whose element in the vector is nonnegative
6614 as well as any that appears in reload_reg_rtx.
6616 If GOAL is zero, then GOALREG is a register number; we look
6617 for an equivalent for that register.
6619 MODE is the machine mode of the value we want an equivalence for.
6620 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6622 This function is used by jump.c as well as in the reload pass.
6624 If GOAL is the sum of the stack pointer and a constant, we treat it
6625 as if it were a constant except that sp is required to be unchanging. */
6628 find_equiv_reg (rtx goal, rtx_insn *insn, enum reg_class rclass, int other,
6629 short *reload_reg_p, int goalreg, machine_mode mode)
6632 rtx goaltry, valtry, value;
6639 int goal_mem_addr_varies = 0;
6640 int need_stable_sp = 0;
6647 else if (REG_P (goal))
6648 regno = REGNO (goal);
6649 else if (MEM_P (goal))
6651 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6652 if (MEM_VOLATILE_P (goal))
6654 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6656 /* An address with side effects must be reexecuted. */
6671 else if (CONSTANT_P (goal))
6673 else if (GET_CODE (goal) == PLUS
6674 && XEXP (goal, 0) == stack_pointer_rtx
6675 && CONSTANT_P (XEXP (goal, 1)))
6676 goal_const = need_stable_sp = 1;
6677 else if (GET_CODE (goal) == PLUS
6678 && XEXP (goal, 0) == frame_pointer_rtx
6679 && CONSTANT_P (XEXP (goal, 1)))
6685 /* Scan insns back from INSN, looking for one that copies
6686 a value into or out of GOAL.
6687 Stop and give up if we reach a label. */
6692 if (p && DEBUG_INSN_P (p))
6695 if (p == 0 || LABEL_P (p)
6696 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6699 /* Don't reuse register contents from before a setjmp-type
6700 function call; on the second return (from the longjmp) it
6701 might have been clobbered by a later reuse. It doesn't
6702 seem worthwhile to actually go and see if it is actually
6703 reused even if that information would be readily available;
6704 just don't reuse it across the setjmp call. */
6705 if (CALL_P (p) && find_reg_note (p, REG_SETJMP, NULL_RTX))
6708 if (NONJUMP_INSN_P (p)
6709 /* If we don't want spill regs ... */
6710 && (! (reload_reg_p != 0
6711 && reload_reg_p != (short *) HOST_WIDE_INT_1)
6712 /* ... then ignore insns introduced by reload; they aren't
6713 useful and can cause results in reload_as_needed to be
6714 different from what they were when calculating the need for
6715 spills. If we notice an input-reload insn here, we will
6716 reject it below, but it might hide a usable equivalent.
6717 That makes bad code. It may even fail: perhaps no reg was
6718 spilled for this insn because it was assumed we would find
6720 || INSN_UID (p) < reload_first_uid))
6723 pat = single_set (p);
6725 /* First check for something that sets some reg equal to GOAL. */
6728 && true_regnum (SET_SRC (pat)) == regno
6729 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6732 && true_regnum (SET_DEST (pat)) == regno
6733 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6735 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6736 /* When looking for stack pointer + const,
6737 make sure we don't use a stack adjust. */
6738 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6739 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6741 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6742 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6744 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6745 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6746 /* If we are looking for a constant,
6747 and something equivalent to that constant was copied
6748 into a reg, we can use that reg. */
6749 || (goal_const && REG_NOTES (p) != 0
6750 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6751 && ((rtx_equal_p (XEXP (tem, 0), goal)
6753 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6754 || (REG_P (SET_DEST (pat))
6755 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem, 0))
6756 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6757 && CONST_INT_P (goal)
6758 && (goaltry = operand_subword (XEXP (tem, 0), 0,
6760 && rtx_equal_p (goal, goaltry)
6762 = operand_subword (SET_DEST (pat), 0, 0,
6764 && (valueno = true_regnum (valtry)) >= 0)))
6765 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6767 && REG_P (SET_DEST (pat))
6768 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem, 0))
6769 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6770 && CONST_INT_P (goal)
6771 && (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6773 && rtx_equal_p (goal, goaltry)
6775 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6776 && (valueno = true_regnum (valtry)) >= 0)))
6780 if (valueno != other)
6783 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6785 else if (!in_hard_reg_set_p (reg_class_contents[(int) rclass],
6795 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6796 (or copying VALUE into GOAL, if GOAL is also a register).
6797 Now verify that VALUE is really valid. */
6799 /* VALUENO is the register number of VALUE; a hard register. */
6801 /* Don't try to re-use something that is killed in this insn. We want
6802 to be able to trust REG_UNUSED notes. */
6803 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6806 /* If we propose to get the value from the stack pointer or if GOAL is
6807 a MEM based on the stack pointer, we need a stable SP. */
6808 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6809 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6813 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6814 if (GET_MODE (value) != mode)
6817 /* Reject VALUE if it was loaded from GOAL
6818 and is also a register that appears in the address of GOAL. */
6820 if (goal_mem && value == SET_DEST (single_set (where))
6821 && refers_to_regno_for_reload_p (valueno, end_hard_regno (mode, valueno),
6825 /* Reject registers that overlap GOAL. */
6827 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6828 nregs = hard_regno_nregs (regno, mode);
6831 valuenregs = hard_regno_nregs (valueno, mode);
6833 if (!goal_mem && !goal_const
6834 && regno + nregs > valueno && regno < valueno + valuenregs)
6837 /* Reject VALUE if it is one of the regs reserved for reloads.
6838 Reload1 knows how to reuse them anyway, and it would get
6839 confused if we allocated one without its knowledge.
6840 (Now that insns introduced by reload are ignored above,
6841 this case shouldn't happen, but I'm not positive.) */
6843 if (reload_reg_p != 0 && reload_reg_p != (short *) HOST_WIDE_INT_1)
6846 for (i = 0; i < valuenregs; ++i)
6847 if (reload_reg_p[valueno + i] >= 0)
6851 /* Reject VALUE if it is a register being used for an input reload
6852 even if it is not one of those reserved. */
6854 if (reload_reg_p != 0)
6857 for (i = 0; i < n_reloads; i++)
6858 if (rld[i].reg_rtx != 0
6860 && (int) REGNO (rld[i].reg_rtx) < valueno + valuenregs
6861 && (int) END_REGNO (rld[i].reg_rtx) > valueno)
6866 /* We must treat frame pointer as varying here,
6867 since it can vary--in a nonlocal goto as generated by expand_goto. */
6868 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6870 /* Now verify that the values of GOAL and VALUE remain unaltered
6871 until INSN is reached. */
6880 /* Don't trust the conversion past a function call
6881 if either of the two is in a call-clobbered register, or memory. */
6886 if (goal_mem || need_stable_sp)
6889 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6890 for (i = 0; i < nregs; ++i)
6891 if (call_used_regs[regno + i]
6892 || targetm.hard_regno_call_part_clobbered (regno + i, mode))
6895 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6896 for (i = 0; i < valuenregs; ++i)
6897 if (call_used_regs[valueno + i]
6898 || targetm.hard_regno_call_part_clobbered (valueno + i,
6907 /* Watch out for unspec_volatile, and volatile asms. */
6908 if (volatile_insn_p (pat))
6911 /* If this insn P stores in either GOAL or VALUE, return 0.
6912 If GOAL is a memory ref and this insn writes memory, return 0.
6913 If GOAL is a memory ref and its address is not constant,
6914 and this insn P changes a register used in GOAL, return 0. */
6916 if (GET_CODE (pat) == COND_EXEC)
6917 pat = COND_EXEC_CODE (pat);
6918 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6920 rtx dest = SET_DEST (pat);
6921 while (GET_CODE (dest) == SUBREG
6922 || GET_CODE (dest) == ZERO_EXTRACT
6923 || GET_CODE (dest) == STRICT_LOW_PART)
6924 dest = XEXP (dest, 0);
6927 int xregno = REGNO (dest);
6928 int end_xregno = END_REGNO (dest);
6929 if (xregno < regno + nregs && end_xregno > regno)
6931 if (xregno < valueno + valuenregs
6932 && end_xregno > valueno)
6934 if (goal_mem_addr_varies
6935 && reg_overlap_mentioned_for_reload_p (dest, goal))
6937 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6940 else if (goal_mem && MEM_P (dest)
6941 && ! push_operand (dest, GET_MODE (dest)))
6943 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6944 && reg_equiv_memory_loc (regno) != 0)
6946 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6949 else if (GET_CODE (pat) == PARALLEL)
6952 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6954 rtx v1 = XVECEXP (pat, 0, i);
6955 if (GET_CODE (v1) == COND_EXEC)
6956 v1 = COND_EXEC_CODE (v1);
6957 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6959 rtx dest = SET_DEST (v1);
6960 while (GET_CODE (dest) == SUBREG
6961 || GET_CODE (dest) == ZERO_EXTRACT
6962 || GET_CODE (dest) == STRICT_LOW_PART)
6963 dest = XEXP (dest, 0);
6966 int xregno = REGNO (dest);
6967 int end_xregno = END_REGNO (dest);
6968 if (xregno < regno + nregs
6969 && end_xregno > regno)
6971 if (xregno < valueno + valuenregs
6972 && end_xregno > valueno)
6974 if (goal_mem_addr_varies
6975 && reg_overlap_mentioned_for_reload_p (dest,
6978 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6981 else if (goal_mem && MEM_P (dest)
6982 && ! push_operand (dest, GET_MODE (dest)))
6984 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6985 && reg_equiv_memory_loc (regno) != 0)
6987 else if (need_stable_sp
6988 && push_operand (dest, GET_MODE (dest)))
6994 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
6998 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6999 link = XEXP (link, 1))
7001 pat = XEXP (link, 0);
7002 if (GET_CODE (pat) == CLOBBER)
7004 rtx dest = SET_DEST (pat);
7008 int xregno = REGNO (dest);
7009 int end_xregno = END_REGNO (dest);
7011 if (xregno < regno + nregs
7012 && end_xregno > regno)
7014 else if (xregno < valueno + valuenregs
7015 && end_xregno > valueno)
7017 else if (goal_mem_addr_varies
7018 && reg_overlap_mentioned_for_reload_p (dest,
7023 else if (goal_mem && MEM_P (dest)
7024 && ! push_operand (dest, GET_MODE (dest)))
7026 else if (need_stable_sp
7027 && push_operand (dest, GET_MODE (dest)))
7034 /* If this insn auto-increments or auto-decrements
7035 either regno or valueno, return 0 now.
7036 If GOAL is a memory ref and its address is not constant,
7037 and this insn P increments a register used in GOAL, return 0. */
7041 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7042 if (REG_NOTE_KIND (link) == REG_INC
7043 && REG_P (XEXP (link, 0)))
7045 int incno = REGNO (XEXP (link, 0));
7046 if (incno < regno + nregs && incno >= regno)
7048 if (incno < valueno + valuenregs && incno >= valueno)
7050 if (goal_mem_addr_varies
7051 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7061 /* Find a place where INCED appears in an increment or decrement operator
7062 within X, and return the amount INCED is incremented or decremented by.
7063 The value is always positive. */
7066 find_inc_amount (rtx x, rtx inced)
7068 enum rtx_code code = GET_CODE (x);
7074 rtx addr = XEXP (x, 0);
7075 if ((GET_CODE (addr) == PRE_DEC
7076 || GET_CODE (addr) == POST_DEC
7077 || GET_CODE (addr) == PRE_INC
7078 || GET_CODE (addr) == POST_INC)
7079 && XEXP (addr, 0) == inced)
7080 return GET_MODE_SIZE (GET_MODE (x));
7081 else if ((GET_CODE (addr) == PRE_MODIFY
7082 || GET_CODE (addr) == POST_MODIFY)
7083 && GET_CODE (XEXP (addr, 1)) == PLUS
7084 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7085 && XEXP (addr, 0) == inced
7086 && CONST_INT_P (XEXP (XEXP (addr, 1), 1)))
7088 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7089 return i < 0 ? -i : i;
7093 fmt = GET_RTX_FORMAT (code);
7094 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7098 int tem = find_inc_amount (XEXP (x, i), inced);
7105 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7107 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7117 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7118 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7121 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7131 if (! INSN_P (insn))
7134 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7135 if (REG_NOTE_KIND (link) == REG_INC)
7137 unsigned int test = (int) REGNO (XEXP (link, 0));
7138 if (test >= regno && test < endregno)
7144 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7145 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7146 REG_INC. REGNO must refer to a hard register. */
7149 regno_clobbered_p (unsigned int regno, rtx_insn *insn, machine_mode mode,
7152 /* regno must be a hard register. */
7153 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7155 unsigned int endregno = end_hard_regno (mode, regno);
7157 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7158 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7159 && REG_P (XEXP (PATTERN (insn), 0)))
7161 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7163 return test >= regno && test < endregno;
7166 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7169 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7171 int i = XVECLEN (PATTERN (insn), 0) - 1;
7175 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7176 if ((GET_CODE (elt) == CLOBBER
7177 || (sets == 1 && GET_CODE (elt) == SET))
7178 && REG_P (XEXP (elt, 0)))
7180 unsigned int test = REGNO (XEXP (elt, 0));
7182 if (test >= regno && test < endregno)
7186 && reg_inc_found_and_valid_p (regno, endregno, elt))
7194 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7196 reload_adjust_reg_for_mode (rtx reloadreg, machine_mode mode)
7200 if (GET_MODE (reloadreg) == mode)
7203 regno = REGNO (reloadreg);
7205 if (REG_WORDS_BIG_ENDIAN)
7206 regno += ((int) REG_NREGS (reloadreg)
7207 - (int) hard_regno_nregs (regno, mode));
7209 return gen_rtx_REG (mode, regno);
7212 static const char *const reload_when_needed_name[] =
7215 "RELOAD_FOR_OUTPUT",
7217 "RELOAD_FOR_INPUT_ADDRESS",
7218 "RELOAD_FOR_INPADDR_ADDRESS",
7219 "RELOAD_FOR_OUTPUT_ADDRESS",
7220 "RELOAD_FOR_OUTADDR_ADDRESS",
7221 "RELOAD_FOR_OPERAND_ADDRESS",
7222 "RELOAD_FOR_OPADDR_ADDR",
7224 "RELOAD_FOR_OTHER_ADDRESS"
7227 /* These functions are used to print the variables set by 'find_reloads' */
7230 debug_reload_to_stream (FILE *f)
7237 for (r = 0; r < n_reloads; r++)
7239 fprintf (f, "Reload %d: ", r);
7243 fprintf (f, "reload_in (%s) = ",
7244 GET_MODE_NAME (rld[r].inmode));
7245 print_inline_rtx (f, rld[r].in, 24);
7246 fprintf (f, "\n\t");
7249 if (rld[r].out != 0)
7251 fprintf (f, "reload_out (%s) = ",
7252 GET_MODE_NAME (rld[r].outmode));
7253 print_inline_rtx (f, rld[r].out, 24);
7254 fprintf (f, "\n\t");
7257 fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
7259 fprintf (f, "%s (opnum = %d)",
7260 reload_when_needed_name[(int) rld[r].when_needed],
7263 if (rld[r].optional)
7264 fprintf (f, ", optional");
7266 if (rld[r].nongroup)
7267 fprintf (f, ", nongroup");
7269 if (rld[r].inc != 0)
7270 fprintf (f, ", inc by %d", rld[r].inc);
7272 if (rld[r].nocombine)
7273 fprintf (f, ", can't combine");
7275 if (rld[r].secondary_p)
7276 fprintf (f, ", secondary_reload_p");
7278 if (rld[r].in_reg != 0)
7280 fprintf (f, "\n\treload_in_reg: ");
7281 print_inline_rtx (f, rld[r].in_reg, 24);
7284 if (rld[r].out_reg != 0)
7286 fprintf (f, "\n\treload_out_reg: ");
7287 print_inline_rtx (f, rld[r].out_reg, 24);
7290 if (rld[r].reg_rtx != 0)
7292 fprintf (f, "\n\treload_reg_rtx: ");
7293 print_inline_rtx (f, rld[r].reg_rtx, 24);
7297 if (rld[r].secondary_in_reload != -1)
7299 fprintf (f, "%ssecondary_in_reload = %d",
7300 prefix, rld[r].secondary_in_reload);
7304 if (rld[r].secondary_out_reload != -1)
7305 fprintf (f, "%ssecondary_out_reload = %d\n",
7306 prefix, rld[r].secondary_out_reload);
7309 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7311 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7312 insn_data[rld[r].secondary_in_icode].name);
7316 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7317 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7318 insn_data[rld[r].secondary_out_icode].name);
7327 debug_reload_to_stream (stderr);