1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
105 #ifndef REGISTER_MOVE_COST
106 #define REGISTER_MOVE_COST(x, y) 2
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
117 /* The variables set up by `find_reloads' are:
119 n_reloads number of distinct reloads needed; max reload # + 1
120 tables indexed by reload number
121 reload_in rtx for value to reload from
122 reload_out rtx for where to store reload-reg afterward if nec
123 (often the same as reload_in)
124 reload_reg_class enum reg_class, saying what regs to reload into
125 reload_inmode enum machine_mode; mode this operand should have
126 when reloaded, on input.
127 reload_outmode enum machine_mode; mode this operand should have
128 when reloaded, on output.
129 reload_optional char, nonzero for an optional reload.
130 Optional reloads are ignored unless the
131 value is already sitting in a register.
132 reload_nongroup char, nonzero when a reload must use a register
133 not already allocated to a group.
134 reload_inc int, positive amount to increment or decrement by if
135 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
136 Ignored otherwise (don't assume it is zero).
137 reload_in_reg rtx. A reg for which reload_in is the equivalent.
138 If reload_in is a symbol_ref which came from
139 reg_equiv_constant, then this is the pseudo
140 which has that symbol_ref as equivalent.
141 reload_reg_rtx rtx. This is the register to reload into.
142 If it is zero when `find_reloads' returns,
143 you must find a suitable register in the class
144 specified by reload_reg_class, and store here
145 an rtx for that register with mode from
146 reload_inmode or reload_outmode.
147 reload_nocombine char, nonzero if this reload shouldn't be
148 combined with another reload.
149 reload_opnum int, operand number being reloaded. This is
150 used to group related reloads and need not always
151 be equal to the actual operand number in the insn,
152 though it current will be; for in-out operands, it
153 is one of the two operand numbers.
154 reload_when_needed enum, classifies reload as needed either for
155 addressing an input reload, addressing an output,
156 for addressing a non-reloaded mem ref,
157 or for unspecified purposes (i.e., more than one
159 reload_secondary_p int, 1 if this is a secondary register for one
161 reload_secondary_in_reload
162 reload_secondary_out_reload
163 int, gives the reload number of a secondary
164 reload, when needed; otherwise -1
165 reload_secondary_in_icode
166 reload_secondary_out_icode
167 enum insn_code, if a secondary reload is required,
168 gives the INSN_CODE that uses the secondary
169 reload as a scratch register, or CODE_FOR_nothing
170 if the secondary reload register is to be an
171 intermediate register. */
174 rtx reload_in[MAX_RELOADS];
175 rtx reload_out[MAX_RELOADS];
176 enum reg_class reload_reg_class[MAX_RELOADS];
177 enum machine_mode reload_inmode[MAX_RELOADS];
178 enum machine_mode reload_outmode[MAX_RELOADS];
179 rtx reload_reg_rtx[MAX_RELOADS];
180 char reload_optional[MAX_RELOADS];
181 char reload_nongroup[MAX_RELOADS];
182 int reload_inc[MAX_RELOADS];
183 rtx reload_in_reg[MAX_RELOADS];
184 char reload_nocombine[MAX_RELOADS];
185 int reload_opnum[MAX_RELOADS];
186 enum reload_type reload_when_needed[MAX_RELOADS];
187 int reload_secondary_p[MAX_RELOADS];
188 int reload_secondary_in_reload[MAX_RELOADS];
189 int reload_secondary_out_reload[MAX_RELOADS];
190 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
191 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
193 /* All the "earlyclobber" operands of the current insn
194 are recorded here. */
196 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
198 int reload_n_operands;
200 /* Replacing reloads.
202 If `replace_reloads' is nonzero, then as each reload is recorded
203 an entry is made for it in the table `replacements'.
204 Then later `subst_reloads' can look through that table and
205 perform all the replacements needed. */
207 /* Nonzero means record the places to replace. */
208 static int replace_reloads;
210 /* Each replacement is recorded with a structure like this. */
213 rtx *where; /* Location to store in */
214 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
215 a SUBREG; 0 otherwise. */
216 int what; /* which reload this is for */
217 enum machine_mode mode; /* mode it must have */
220 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
222 /* Number of replacements currently recorded. */
223 static int n_replacements;
225 /* Used to track what is modified by an operand. */
228 int reg_flag; /* Nonzero if referencing a register. */
229 int safe; /* Nonzero if this can't conflict with anything. */
230 rtx base; /* Base address for MEM. */
231 HOST_WIDE_INT start; /* Starting offset or register number. */
232 HOST_WIDE_INT end; /* Ending offset or register number. */
235 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
236 (see reg_equiv_address). */
237 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
238 static int n_memlocs;
240 #ifdef SECONDARY_MEMORY_NEEDED
242 /* Save MEMs needed to copy from one class of registers to another. One MEM
243 is used per mode, but normally only one or two modes are ever used.
245 We keep two versions, before and after register elimination. The one
246 after register elimination is record separately for each operand. This
247 is done in case the address is not valid to be sure that we separately
250 static rtx secondary_memlocs[NUM_MACHINE_MODES];
251 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
254 /* The instruction we are doing reloads for;
255 so we can test whether a register dies in it. */
256 static rtx this_insn;
258 /* Nonzero if this instruction is a user-specified asm with operands. */
259 static int this_insn_is_asm;
261 /* If hard_regs_live_known is nonzero,
262 we can tell which hard regs are currently live,
263 at least enough to succeed in choosing dummy reloads. */
264 static int hard_regs_live_known;
266 /* Indexed by hard reg number,
267 element is nonnegative if hard reg has been spilled.
268 This vector is passed to `find_reloads' as an argument
269 and is not changed here. */
270 static short *static_reload_reg_p;
272 /* Set to 1 in subst_reg_equivs if it changes anything. */
273 static int subst_reg_equivs_changed;
275 /* On return from push_reload, holds the reload-number for the OUT
276 operand, which can be different for that from the input operand. */
277 static int output_reloadnum;
279 /* Compare two RTX's. */
280 #define MATCHES(x, y) \
281 (x == y || (x != 0 && (GET_CODE (x) == REG \
282 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
283 : rtx_equal_p (x, y) && ! side_effects_p (x))))
285 /* Indicates if two reloads purposes are for similar enough things that we
286 can merge their reloads. */
287 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
288 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
289 || ((when1) == (when2) && (op1) == (op2)) \
290 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
291 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
292 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
293 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
294 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
296 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
297 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
298 ((when1) != (when2) \
299 || ! ((op1) == (op2) \
300 || (when1) == RELOAD_FOR_INPUT \
301 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
302 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
304 /* If we are going to reload an address, compute the reload type to
306 #define ADDR_TYPE(type) \
307 ((type) == RELOAD_FOR_INPUT_ADDRESS \
308 ? RELOAD_FOR_INPADDR_ADDRESS \
309 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
310 ? RELOAD_FOR_OUTADDR_ADDRESS \
313 #ifdef HAVE_SECONDARY_RELOADS
314 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
315 enum machine_mode, enum reload_type,
318 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
319 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
320 enum machine_mode, enum machine_mode,
321 int, int, int, enum reload_type));
322 static void push_replacement PROTO((rtx *, int, enum machine_mode));
323 static void combine_reloads PROTO((void));
324 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
325 enum machine_mode, enum machine_mode,
326 enum reg_class, int, int));
327 static int earlyclobber_operand_p PROTO((rtx));
328 static int hard_reg_set_here_p PROTO((int, int, rtx));
329 static struct decomposition decompose PROTO((rtx));
330 static int immune_p PROTO((rtx, rtx, struct decomposition));
331 static int alternative_allows_memconst PROTO((char *, int));
332 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
333 static rtx make_memloc PROTO((rtx, int));
334 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
335 int, enum reload_type, int, rtx));
336 static rtx subst_reg_equivs PROTO((rtx));
337 static rtx subst_indexed_address PROTO((rtx));
338 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
339 int, enum reload_type,int, rtx));
340 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
341 enum machine_mode, int,
342 enum reload_type, int));
343 static int find_inc_amount PROTO((rtx, rtx));
345 #ifdef HAVE_SECONDARY_RELOADS
347 /* Determine if any secondary reloads are needed for loading (if IN_P is
348 non-zero) or storing (if IN_P is zero) X to or from a reload register of
349 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
350 are needed, push them.
352 Return the reload number of the secondary reload we made, or -1 if
353 we didn't need one. *PICODE is set to the insn_code to use if we do
354 need a secondary reload. */
357 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
363 enum reg_class reload_class;
364 enum machine_mode reload_mode;
365 enum reload_type type;
366 enum insn_code *picode;
368 enum reg_class class = NO_REGS;
369 enum machine_mode mode = reload_mode;
370 enum insn_code icode = CODE_FOR_nothing;
371 enum reg_class t_class = NO_REGS;
372 enum machine_mode t_mode = VOIDmode;
373 enum insn_code t_icode = CODE_FOR_nothing;
374 enum reload_type secondary_type;
375 int s_reload, t_reload = -1;
377 if (type == RELOAD_FOR_INPUT_ADDRESS
378 || type == RELOAD_FOR_OUTPUT_ADDRESS
379 || type == RELOAD_FOR_INPADDR_ADDRESS
380 || type == RELOAD_FOR_OUTADDR_ADDRESS)
381 secondary_type = type;
383 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
385 *picode = CODE_FOR_nothing;
387 /* If X is a paradoxical SUBREG, use the inner value to determine both the
388 mode and object being reloaded. */
389 if (GET_CODE (x) == SUBREG
390 && (GET_MODE_SIZE (GET_MODE (x))
391 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
394 reload_mode = GET_MODE (x);
397 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
398 is still a pseudo-register by now, it *must* have an equivalent MEM
399 but we don't want to assume that), use that equivalent when seeing if
400 a secondary reload is needed since whether or not a reload is needed
401 might be sensitive to the form of the MEM. */
403 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
404 && reg_equiv_mem[REGNO (x)] != 0)
405 x = reg_equiv_mem[REGNO (x)];
407 #ifdef SECONDARY_INPUT_RELOAD_CLASS
409 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
412 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
414 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
417 /* If we don't need any secondary registers, done. */
418 if (class == NO_REGS)
421 /* Get a possible insn to use. If the predicate doesn't accept X, don't
424 icode = (in_p ? reload_in_optab[(int) reload_mode]
425 : reload_out_optab[(int) reload_mode]);
427 if (icode != CODE_FOR_nothing
428 && insn_operand_predicate[(int) icode][in_p]
429 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
430 icode = CODE_FOR_nothing;
432 /* If we will be using an insn, see if it can directly handle the reload
433 register we will be using. If it can, the secondary reload is for a
434 scratch register. If it can't, we will use the secondary reload for
435 an intermediate register and require a tertiary reload for the scratch
438 if (icode != CODE_FOR_nothing)
440 /* If IN_P is non-zero, the reload register will be the output in
441 operand 0. If IN_P is zero, the reload register will be the input
442 in operand 1. Outputs should have an initial "=", which we must
445 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
446 enum reg_class insn_class
447 = (insn_letter == 'r' ? GENERAL_REGS
448 : REG_CLASS_FROM_LETTER (insn_letter));
450 if (insn_class == NO_REGS
451 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
452 /* The scratch register's constraint must start with "=&". */
453 || insn_operand_constraint[(int) icode][2][0] != '='
454 || insn_operand_constraint[(int) icode][2][1] != '&')
457 if (reg_class_subset_p (reload_class, insn_class))
458 mode = insn_operand_mode[(int) icode][2];
461 char t_letter = insn_operand_constraint[(int) icode][2][2];
463 t_mode = insn_operand_mode[(int) icode][2];
464 t_class = (t_letter == 'r' ? GENERAL_REGS
465 : REG_CLASS_FROM_LETTER (t_letter));
467 icode = CODE_FOR_nothing;
471 /* This case isn't valid, so fail. Reload is allowed to use the same
472 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
473 in the case of a secondary register, we actually need two different
474 registers for correct code. We fail here to prevent the possibility of
475 silently generating incorrect code later.
477 The convention is that secondary input reloads are valid only if the
478 secondary_class is different from class. If you have such a case, you
479 can not use secondary reloads, you must work around the problem some
482 Allow this when MODE is not reload_mode and assume that the generated
483 code handles this case (it does on the Alpha, which is the only place
484 this currently happens). */
486 if (in_p && class == reload_class && mode == reload_mode)
489 /* If we need a tertiary reload, see if we have one we can reuse or else
492 if (t_class != NO_REGS)
494 for (t_reload = 0; t_reload < n_reloads; t_reload++)
495 if (reload_secondary_p[t_reload]
496 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
497 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
498 && ((in_p && reload_inmode[t_reload] == t_mode)
499 || (! in_p && reload_outmode[t_reload] == t_mode))
500 && ((in_p && (reload_secondary_in_icode[t_reload]
501 == CODE_FOR_nothing))
502 || (! in_p &&(reload_secondary_out_icode[t_reload]
503 == CODE_FOR_nothing)))
504 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
505 && MERGABLE_RELOADS (secondary_type,
506 reload_when_needed[t_reload],
507 opnum, reload_opnum[t_reload]))
510 reload_inmode[t_reload] = t_mode;
512 reload_outmode[t_reload] = t_mode;
514 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
515 reload_reg_class[t_reload] = t_class;
517 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
518 reload_optional[t_reload] &= optional;
519 reload_secondary_p[t_reload] = 1;
520 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
521 opnum, reload_opnum[t_reload]))
522 reload_when_needed[t_reload] = RELOAD_OTHER;
525 if (t_reload == n_reloads)
527 /* We need to make a new tertiary reload for this register class. */
528 reload_in[t_reload] = reload_out[t_reload] = 0;
529 reload_reg_class[t_reload] = t_class;
530 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
531 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
532 reload_reg_rtx[t_reload] = 0;
533 reload_optional[t_reload] = optional;
534 reload_nongroup[t_reload] = 0;
535 reload_inc[t_reload] = 0;
536 /* Maybe we could combine these, but it seems too tricky. */
537 reload_nocombine[t_reload] = 1;
538 reload_in_reg[t_reload] = 0;
539 reload_opnum[t_reload] = opnum;
540 reload_when_needed[t_reload] = secondary_type;
541 reload_secondary_in_reload[t_reload] = -1;
542 reload_secondary_out_reload[t_reload] = -1;
543 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
544 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
545 reload_secondary_p[t_reload] = 1;
551 /* See if we can reuse an existing secondary reload. */
552 for (s_reload = 0; s_reload < n_reloads; s_reload++)
553 if (reload_secondary_p[s_reload]
554 && (reg_class_subset_p (class, reload_reg_class[s_reload])
555 || reg_class_subset_p (reload_reg_class[s_reload], class))
556 && ((in_p && reload_inmode[s_reload] == mode)
557 || (! in_p && reload_outmode[s_reload] == mode))
558 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
559 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
560 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
561 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
562 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
563 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
564 opnum, reload_opnum[s_reload]))
567 reload_inmode[s_reload] = mode;
569 reload_outmode[s_reload] = mode;
571 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
572 reload_reg_class[s_reload] = class;
574 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
575 reload_optional[s_reload] &= optional;
576 reload_secondary_p[s_reload] = 1;
577 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
578 opnum, reload_opnum[s_reload]))
579 reload_when_needed[s_reload] = RELOAD_OTHER;
582 if (s_reload == n_reloads)
584 #ifdef SECONDARY_MEMORY_NEEDED
585 /* If we need a memory location to copy between the two reload regs,
586 set it up now. Note that we do the input case before making
587 the reload and the output case after. This is due to the
588 way reloads are output. */
590 if (in_p && icode == CODE_FOR_nothing
591 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
592 get_secondary_mem (x, reload_mode, opnum, type);
595 /* We need to make a new secondary reload for this register class. */
596 reload_in[s_reload] = reload_out[s_reload] = 0;
597 reload_reg_class[s_reload] = class;
599 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
600 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
601 reload_reg_rtx[s_reload] = 0;
602 reload_optional[s_reload] = optional;
603 reload_nongroup[s_reload] = 0;
604 reload_inc[s_reload] = 0;
605 /* Maybe we could combine these, but it seems too tricky. */
606 reload_nocombine[s_reload] = 1;
607 reload_in_reg[s_reload] = 0;
608 reload_opnum[s_reload] = opnum;
609 reload_when_needed[s_reload] = secondary_type;
610 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
611 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
612 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
613 reload_secondary_out_icode[s_reload]
614 = ! in_p ? t_icode : CODE_FOR_nothing;
615 reload_secondary_p[s_reload] = 1;
619 #ifdef SECONDARY_MEMORY_NEEDED
620 if (! in_p && icode == CODE_FOR_nothing
621 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
622 get_secondary_mem (x, mode, opnum, type);
629 #endif /* HAVE_SECONDARY_RELOADS */
631 #ifdef SECONDARY_MEMORY_NEEDED
633 /* Return a memory location that will be used to copy X in mode MODE.
634 If we haven't already made a location for this mode in this insn,
635 call find_reloads_address on the location being returned. */
638 get_secondary_mem (x, mode, opnum, type)
640 enum machine_mode mode;
642 enum reload_type type;
647 /* By default, if MODE is narrower than a word, widen it to a word.
648 This is required because most machines that require these memory
649 locations do not support short load and stores from all registers
650 (e.g., FP registers). */
652 #ifdef SECONDARY_MEMORY_NEEDED_MODE
653 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
655 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
656 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
659 /* If we already have made a MEM for this operand in MODE, return it. */
660 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
661 return secondary_memlocs_elim[(int) mode][opnum];
663 /* If this is the first time we've tried to get a MEM for this mode,
664 allocate a new one. `something_changed' in reload will get set
665 by noticing that the frame size has changed. */
667 if (secondary_memlocs[(int) mode] == 0)
669 #ifdef SECONDARY_MEMORY_NEEDED_RTX
670 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
672 secondary_memlocs[(int) mode]
673 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
677 /* Get a version of the address doing any eliminations needed. If that
678 didn't give us a new MEM, make a new one if it isn't valid. */
680 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
681 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
683 if (! mem_valid && loc == secondary_memlocs[(int) mode])
684 loc = copy_rtx (loc);
686 /* The only time the call below will do anything is if the stack
687 offset is too large. In that case IND_LEVELS doesn't matter, so we
688 can just pass a zero. Adjust the type to be the address of the
689 corresponding object. If the address was valid, save the eliminated
690 address. If it wasn't valid, we need to make a reload each time, so
695 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
696 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
699 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
703 secondary_memlocs_elim[(int) mode][opnum] = loc;
707 /* Clear any secondary memory locations we've made. */
710 clear_secondary_mem ()
712 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
714 #endif /* SECONDARY_MEMORY_NEEDED */
716 /* Find the largest class for which every register number plus N is valid in
717 M1 (if in range). Abort if no such class exists. */
719 static enum reg_class
720 find_valid_class (m1, n)
721 enum machine_mode m1;
726 enum reg_class best_class;
729 for (class = 1; class < N_REG_CLASSES; class++)
732 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
733 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
734 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
735 && ! HARD_REGNO_MODE_OK (regno + n, m1))
738 if (! bad && reg_class_size[class] > best_size)
739 best_class = class, best_size = reg_class_size[class];
748 /* Record one reload that needs to be performed.
749 IN is an rtx saying where the data are to be found before this instruction.
750 OUT says where they must be stored after the instruction.
751 (IN is zero for data not read, and OUT is zero for data not written.)
752 INLOC and OUTLOC point to the places in the instructions where
753 IN and OUT were found.
754 If IN and OUT are both non-zero, it means the same register must be used
755 to reload both IN and OUT.
757 CLASS is a register class required for the reloaded data.
758 INMODE is the machine mode that the instruction requires
759 for the reg that replaces IN and OUTMODE is likewise for OUT.
761 If IN is zero, then OUT's location and mode should be passed as
764 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
766 OPTIONAL nonzero means this reload does not need to be performed:
767 it can be discarded if that is more convenient.
769 OPNUM and TYPE say what the purpose of this reload is.
771 The return value is the reload-number for this reload.
773 If both IN and OUT are nonzero, in some rare cases we might
774 want to make two separate reloads. (Actually we never do this now.)
775 Therefore, the reload-number for OUT is stored in
776 output_reloadnum when we return; the return value applies to IN.
777 Usually (presently always), when IN and OUT are nonzero,
778 the two reload-numbers are equal, but the caller should be careful to
782 push_reload (in, out, inloc, outloc, class,
783 inmode, outmode, strict_low, optional, opnum, type)
784 register rtx in, out;
786 enum reg_class class;
787 enum machine_mode inmode, outmode;
791 enum reload_type type;
795 int dont_remove_subreg = 0;
796 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
797 int secondary_in_reload = -1, secondary_out_reload = -1;
798 enum insn_code secondary_in_icode = CODE_FOR_nothing;
799 enum insn_code secondary_out_icode = CODE_FOR_nothing;
801 /* INMODE and/or OUTMODE could be VOIDmode if no mode
802 has been specified for the operand. In that case,
803 use the operand's mode as the mode to reload. */
804 if (inmode == VOIDmode && in != 0)
805 inmode = GET_MODE (in);
806 if (outmode == VOIDmode && out != 0)
807 outmode = GET_MODE (out);
809 /* If IN is a pseudo register everywhere-equivalent to a constant, and
810 it is not in a hard register, reload straight from the constant,
811 since we want to get rid of such pseudo registers.
812 Often this is done earlier, but not always in find_reloads_address. */
813 if (in != 0 && GET_CODE (in) == REG)
815 register int regno = REGNO (in);
817 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
818 && reg_equiv_constant[regno] != 0)
819 in = reg_equiv_constant[regno];
822 /* Likewise for OUT. Of course, OUT will never be equivalent to
823 an actual constant, but it might be equivalent to a memory location
824 (in the case of a parameter). */
825 if (out != 0 && GET_CODE (out) == REG)
827 register int regno = REGNO (out);
829 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
830 && reg_equiv_constant[regno] != 0)
831 out = reg_equiv_constant[regno];
834 /* If we have a read-write operand with an address side-effect,
835 change either IN or OUT so the side-effect happens only once. */
836 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
838 if (GET_CODE (XEXP (in, 0)) == POST_INC
839 || GET_CODE (XEXP (in, 0)) == POST_DEC)
840 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
841 if (GET_CODE (XEXP (in, 0)) == PRE_INC
842 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
843 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
846 /* If we are reloading a (SUBREG constant ...), really reload just the
847 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
848 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
849 a pseudo and hence will become a MEM) with M1 wider than M2 and the
850 register is a pseudo, also reload the inside expression.
851 For machines that extend byte loads, do this for any SUBREG of a pseudo
852 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
853 M2 is an integral mode that gets extended when loaded.
854 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
855 either M1 is not valid for R or M2 is wider than a word but we only
856 need one word to store an M2-sized quantity in R.
857 (However, if OUT is nonzero, we need to reload the reg *and*
858 the subreg, so do nothing here, and let following statement handle it.)
860 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
861 we can't handle it here because CONST_INT does not indicate a mode.
863 Similarly, we must reload the inside expression if we have a
864 STRICT_LOW_PART (presumably, in == out in the cas).
866 Also reload the inner expression if it does not require a secondary
867 reload but the SUBREG does.
869 Finally, reload the inner expression if it is a register that is in
870 the class whose registers cannot be referenced in a different size
871 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
872 cannot reload just the inside since we might end up with the wrong
875 if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
876 #ifdef CLASS_CANNOT_CHANGE_SIZE
877 && class != CLASS_CANNOT_CHANGE_SIZE
879 && (CONSTANT_P (SUBREG_REG (in))
880 || GET_CODE (SUBREG_REG (in)) == PLUS
882 || (((GET_CODE (SUBREG_REG (in)) == REG
883 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
884 || GET_CODE (SUBREG_REG (in)) == MEM)
885 && ((GET_MODE_SIZE (inmode)
886 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
887 #ifdef LOAD_EXTEND_OP
888 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
889 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
891 && (GET_MODE_SIZE (inmode)
892 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
893 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
894 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
896 #ifdef WORD_REGISTER_OPERATIONS
897 || ((GET_MODE_SIZE (inmode)
898 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
899 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
900 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
904 || (GET_CODE (SUBREG_REG (in)) == REG
905 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
906 /* The case where out is nonzero
907 is handled differently in the following statement. */
908 && (out == 0 || SUBREG_WORD (in) == 0)
909 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
910 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
912 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
914 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
915 GET_MODE (SUBREG_REG (in)))))
916 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
919 #ifdef SECONDARY_INPUT_RELOAD_CLASS
920 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
921 && (SECONDARY_INPUT_RELOAD_CLASS (class,
922 GET_MODE (SUBREG_REG (in)),
926 #ifdef CLASS_CANNOT_CHANGE_SIZE
927 || (GET_CODE (SUBREG_REG (in)) == REG
928 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
929 && (TEST_HARD_REG_BIT
930 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
931 REGNO (SUBREG_REG (in))))
932 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
933 != GET_MODE_SIZE (inmode)))
937 in_subreg_loc = inloc;
938 inloc = &SUBREG_REG (in);
940 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
941 if (GET_CODE (in) == MEM)
942 /* This is supposed to happen only for paradoxical subregs made by
943 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
944 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
947 inmode = GET_MODE (in);
950 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
951 either M1 is not valid for R or M2 is wider than a word but we only
952 need one word to store an M2-sized quantity in R.
954 However, we must reload the inner reg *as well as* the subreg in
957 /* Similar issue for (SUBREG constant ...) if it was not handled by the
958 code above. This can happen if SUBREG_WORD != 0. */
960 if (in != 0 && GET_CODE (in) == SUBREG
961 && (CONSTANT_P (SUBREG_REG (in))
962 || (GET_CODE (SUBREG_REG (in)) == REG
963 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
964 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
967 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
968 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
970 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
972 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
973 GET_MODE (SUBREG_REG (in)))))))))
975 /* This relies on the fact that emit_reload_insns outputs the
976 instructions for input reloads of type RELOAD_OTHER in the same
977 order as the reloads. Thus if the outer reload is also of type
978 RELOAD_OTHER, we are guaranteed that this inner reload will be
979 output before the outer reload. */
980 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
981 find_valid_class (inmode, SUBREG_WORD (in)),
982 VOIDmode, VOIDmode, 0, 0, opnum, type);
983 dont_remove_subreg = 1;
986 /* Similarly for paradoxical and problematical SUBREGs on the output.
987 Note that there is no reason we need worry about the previous value
988 of SUBREG_REG (out); even if wider than out,
989 storing in a subreg is entitled to clobber it all
990 (except in the case of STRICT_LOW_PART,
991 and in that case the constraint should label it input-output.) */
992 if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
993 #ifdef CLASS_CANNOT_CHANGE_SIZE
994 && class != CLASS_CANNOT_CHANGE_SIZE
996 && (CONSTANT_P (SUBREG_REG (out))
998 || (((GET_CODE (SUBREG_REG (out)) == REG
999 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1000 || GET_CODE (SUBREG_REG (out)) == MEM)
1001 && ((GET_MODE_SIZE (outmode)
1002 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1003 #ifdef WORD_REGISTER_OPERATIONS
1004 || ((GET_MODE_SIZE (outmode)
1005 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1006 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1007 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1011 || (GET_CODE (SUBREG_REG (out)) == REG
1012 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1013 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1014 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1016 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1018 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1019 GET_MODE (SUBREG_REG (out)))))
1020 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1021 + SUBREG_WORD (out)),
1023 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1024 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1025 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1026 GET_MODE (SUBREG_REG (out)),
1030 #ifdef CLASS_CANNOT_CHANGE_SIZE
1031 || (GET_CODE (SUBREG_REG (out)) == REG
1032 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1033 && (TEST_HARD_REG_BIT
1034 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1035 REGNO (SUBREG_REG (out))))
1036 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1037 != GET_MODE_SIZE (outmode)))
1041 out_subreg_loc = outloc;
1042 outloc = &SUBREG_REG (out);
1044 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1045 if (GET_CODE (out) == MEM
1046 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1049 outmode = GET_MODE (out);
1052 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1053 either M1 is not valid for R or M2 is wider than a word but we only
1054 need one word to store an M2-sized quantity in R.
1056 However, we must reload the inner reg *as well as* the subreg in
1057 that case. In this case, the inner reg is an in-out reload. */
1059 if (out != 0 && GET_CODE (out) == SUBREG
1060 && GET_CODE (SUBREG_REG (out)) == REG
1061 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1062 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1064 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1065 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1067 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1069 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1070 GET_MODE (SUBREG_REG (out)))))))
1072 /* This relies on the fact that emit_reload_insns outputs the
1073 instructions for output reloads of type RELOAD_OTHER in reverse
1074 order of the reloads. Thus if the outer reload is also of type
1075 RELOAD_OTHER, we are guaranteed that this inner reload will be
1076 output after the outer reload. */
1077 dont_remove_subreg = 1;
1078 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1080 find_valid_class (outmode, SUBREG_WORD (out)),
1081 VOIDmode, VOIDmode, 0, 0,
1082 opnum, RELOAD_OTHER);
1085 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1086 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1087 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1088 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1091 /* If IN is a SUBREG of a hard register, make a new REG. This
1092 simplifies some of the cases below. */
1094 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1095 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1096 && ! dont_remove_subreg)
1097 in = gen_rtx_REG (GET_MODE (in),
1098 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1100 /* Similarly for OUT. */
1101 if (out != 0 && GET_CODE (out) == SUBREG
1102 && GET_CODE (SUBREG_REG (out)) == REG
1103 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1104 && ! dont_remove_subreg)
1105 out = gen_rtx_REG (GET_MODE (out),
1106 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1108 /* Narrow down the class of register wanted if that is
1109 desirable on this machine for efficiency. */
1111 class = PREFERRED_RELOAD_CLASS (in, class);
1113 /* Output reloads may need analogous treatment, different in detail. */
1114 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1116 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1119 /* Make sure we use a class that can handle the actual pseudo
1120 inside any subreg. For example, on the 386, QImode regs
1121 can appear within SImode subregs. Although GENERAL_REGS
1122 can handle SImode, QImode needs a smaller class. */
1123 #ifdef LIMIT_RELOAD_CLASS
1125 class = LIMIT_RELOAD_CLASS (inmode, class);
1126 else if (in != 0 && GET_CODE (in) == SUBREG)
1127 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1130 class = LIMIT_RELOAD_CLASS (outmode, class);
1131 if (out != 0 && GET_CODE (out) == SUBREG)
1132 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1135 /* Verify that this class is at least possible for the mode that
1137 if (this_insn_is_asm)
1139 enum machine_mode mode;
1140 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1144 if (mode == VOIDmode)
1146 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1151 outmode = word_mode;
1153 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1154 if (HARD_REGNO_MODE_OK (i, mode)
1155 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1157 int nregs = HARD_REGNO_NREGS (i, mode);
1160 for (j = 1; j < nregs; j++)
1161 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1166 if (i == FIRST_PSEUDO_REGISTER)
1168 error_for_asm (this_insn, "impossible register constraint in `asm'");
1173 if (class == NO_REGS)
1176 /* We can use an existing reload if the class is right
1177 and at least one of IN and OUT is a match
1178 and the other is at worst neutral.
1179 (A zero compared against anything is neutral.)
1181 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1182 for the same thing since that can cause us to need more reload registers
1183 than we otherwise would. */
1185 for (i = 0; i < n_reloads; i++)
1186 if ((reg_class_subset_p (class, reload_reg_class[i])
1187 || reg_class_subset_p (reload_reg_class[i], class))
1188 /* If the existing reload has a register, it must fit our class. */
1189 && (reload_reg_rtx[i] == 0
1190 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1191 true_regnum (reload_reg_rtx[i])))
1192 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1193 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1195 (out != 0 && MATCHES (reload_out[i], out)
1196 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1197 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1198 && MERGABLE_RELOADS (type, reload_when_needed[i],
1199 opnum, reload_opnum[i]))
1202 /* Reloading a plain reg for input can match a reload to postincrement
1203 that reg, since the postincrement's value is the right value.
1204 Likewise, it can match a preincrement reload, since we regard
1205 the preincrementation as happening before any ref in this insn
1206 to that register. */
1208 for (i = 0; i < n_reloads; i++)
1209 if ((reg_class_subset_p (class, reload_reg_class[i])
1210 || reg_class_subset_p (reload_reg_class[i], class))
1211 /* If the existing reload has a register, it must fit our class. */
1212 && (reload_reg_rtx[i] == 0
1213 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1214 true_regnum (reload_reg_rtx[i])))
1215 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1216 && ((GET_CODE (in) == REG
1217 && (GET_CODE (reload_in[i]) == POST_INC
1218 || GET_CODE (reload_in[i]) == POST_DEC
1219 || GET_CODE (reload_in[i]) == PRE_INC
1220 || GET_CODE (reload_in[i]) == PRE_DEC)
1221 && MATCHES (XEXP (reload_in[i], 0), in))
1223 (GET_CODE (reload_in[i]) == REG
1224 && (GET_CODE (in) == POST_INC
1225 || GET_CODE (in) == POST_DEC
1226 || GET_CODE (in) == PRE_INC
1227 || GET_CODE (in) == PRE_DEC)
1228 && MATCHES (XEXP (in, 0), reload_in[i])))
1229 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1230 && MERGABLE_RELOADS (type, reload_when_needed[i],
1231 opnum, reload_opnum[i]))
1233 /* Make sure reload_in ultimately has the increment,
1234 not the plain register. */
1235 if (GET_CODE (in) == REG)
1242 /* See if we need a secondary reload register to move between CLASS
1243 and IN or CLASS and OUT. Get the icode and push any required reloads
1244 needed for each of them if so. */
1246 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1249 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1250 &secondary_in_icode);
1253 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1254 if (out != 0 && GET_CODE (out) != SCRATCH)
1255 secondary_out_reload
1256 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1257 type, &secondary_out_icode);
1260 /* We found no existing reload suitable for re-use.
1261 So add an additional reload. */
1263 #ifdef SECONDARY_MEMORY_NEEDED
1264 /* If a memory location is needed for the copy, make one. */
1265 if (in != 0 && GET_CODE (in) == REG
1266 && REGNO (in) < FIRST_PSEUDO_REGISTER
1267 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1269 get_secondary_mem (in, inmode, opnum, type);
1274 reload_out[i] = out;
1275 reload_reg_class[i] = class;
1276 reload_inmode[i] = inmode;
1277 reload_outmode[i] = outmode;
1278 reload_reg_rtx[i] = 0;
1279 reload_optional[i] = optional;
1280 reload_nongroup[i] = 0;
1282 reload_nocombine[i] = 0;
1283 reload_in_reg[i] = inloc ? *inloc : 0;
1284 reload_opnum[i] = opnum;
1285 reload_when_needed[i] = type;
1286 reload_secondary_in_reload[i] = secondary_in_reload;
1287 reload_secondary_out_reload[i] = secondary_out_reload;
1288 reload_secondary_in_icode[i] = secondary_in_icode;
1289 reload_secondary_out_icode[i] = secondary_out_icode;
1290 reload_secondary_p[i] = 0;
1294 #ifdef SECONDARY_MEMORY_NEEDED
1295 if (out != 0 && GET_CODE (out) == REG
1296 && REGNO (out) < FIRST_PSEUDO_REGISTER
1297 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1299 get_secondary_mem (out, outmode, opnum, type);
1304 /* We are reusing an existing reload,
1305 but we may have additional information for it.
1306 For example, we may now have both IN and OUT
1307 while the old one may have just one of them. */
1309 /* The modes can be different. If they are, we want to reload in
1310 the larger mode, so that the value is valid for both modes. */
1311 if (inmode != VOIDmode
1312 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1313 reload_inmode[i] = inmode;
1314 if (outmode != VOIDmode
1315 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1316 reload_outmode[i] = outmode;
1320 reload_out[i] = out;
1321 if (reg_class_subset_p (class, reload_reg_class[i]))
1322 reload_reg_class[i] = class;
1323 reload_optional[i] &= optional;
1324 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1325 opnum, reload_opnum[i]))
1326 reload_when_needed[i] = RELOAD_OTHER;
1327 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1330 /* If the ostensible rtx being reload differs from the rtx found
1331 in the location to substitute, this reload is not safe to combine
1332 because we cannot reliably tell whether it appears in the insn. */
1334 if (in != 0 && in != *inloc)
1335 reload_nocombine[i] = 1;
1338 /* This was replaced by changes in find_reloads_address_1 and the new
1339 function inc_for_reload, which go with a new meaning of reload_inc. */
1341 /* If this is an IN/OUT reload in an insn that sets the CC,
1342 it must be for an autoincrement. It doesn't work to store
1343 the incremented value after the insn because that would clobber the CC.
1344 So we must do the increment of the value reloaded from,
1345 increment it, store it back, then decrement again. */
1346 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1350 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1351 /* If we did not find a nonzero amount-to-increment-by,
1352 that contradicts the belief that IN is being incremented
1353 in an address in this insn. */
1354 if (reload_inc[i] == 0)
1359 /* If we will replace IN and OUT with the reload-reg,
1360 record where they are located so that substitution need
1361 not do a tree walk. */
1363 if (replace_reloads)
1367 register struct replacement *r = &replacements[n_replacements++];
1369 r->subreg_loc = in_subreg_loc;
1373 if (outloc != 0 && outloc != inloc)
1375 register struct replacement *r = &replacements[n_replacements++];
1378 r->subreg_loc = out_subreg_loc;
1383 /* If this reload is just being introduced and it has both
1384 an incoming quantity and an outgoing quantity that are
1385 supposed to be made to match, see if either one of the two
1386 can serve as the place to reload into.
1388 If one of them is acceptable, set reload_reg_rtx[i]
1391 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1393 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1395 reload_reg_class[i], i,
1396 earlyclobber_operand_p (out));
1398 /* If the outgoing register already contains the same value
1399 as the incoming one, we can dispense with loading it.
1400 The easiest way to tell the caller that is to give a phony
1401 value for the incoming operand (same as outgoing one). */
1402 if (reload_reg_rtx[i] == out
1403 && (GET_CODE (in) == REG || CONSTANT_P (in))
1404 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1405 static_reload_reg_p, i, inmode))
1409 /* If this is an input reload and the operand contains a register that
1410 dies in this insn and is used nowhere else, see if it is the right class
1411 to be used for this reload. Use it if so. (This occurs most commonly
1412 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1413 this if it is also an output reload that mentions the register unless
1414 the output is a SUBREG that clobbers an entire register.
1416 Note that the operand might be one of the spill regs, if it is a
1417 pseudo reg and we are in a block where spilling has not taken place.
1418 But if there is no spilling in this block, that is OK.
1419 An explicitly used hard reg cannot be a spill reg. */
1421 if (reload_reg_rtx[i] == 0 && in != 0)
1426 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1427 if (REG_NOTE_KIND (note) == REG_DEAD
1428 && GET_CODE (XEXP (note, 0)) == REG
1429 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1430 && reg_mentioned_p (XEXP (note, 0), in)
1431 && ! refers_to_regno_for_reload_p (regno,
1433 + HARD_REGNO_NREGS (regno,
1435 PATTERN (this_insn), inloc)
1436 /* If this is also an output reload, IN cannot be used as
1437 the reload register if it is set in this insn unless IN
1439 && (out == 0 || in == out
1440 || ! hard_reg_set_here_p (regno,
1442 + HARD_REGNO_NREGS (regno,
1444 PATTERN (this_insn)))
1445 /* ??? Why is this code so different from the previous?
1446 Is there any simple coherent way to describe the two together?
1447 What's going on here. */
1449 || (GET_CODE (in) == SUBREG
1450 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1452 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1453 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1454 /* Make sure the operand fits in the reg that dies. */
1455 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1456 && HARD_REGNO_MODE_OK (regno, inmode)
1457 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1458 && HARD_REGNO_MODE_OK (regno, outmode)
1459 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1460 && !fixed_regs[regno])
1462 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1468 output_reloadnum = i;
1473 /* Record an additional place we must replace a value
1474 for which we have already recorded a reload.
1475 RELOADNUM is the value returned by push_reload
1476 when the reload was recorded.
1477 This is used in insn patterns that use match_dup. */
1480 push_replacement (loc, reloadnum, mode)
1483 enum machine_mode mode;
1485 if (replace_reloads)
1487 register struct replacement *r = &replacements[n_replacements++];
1488 r->what = reloadnum;
1495 /* Transfer all replacements that used to be in reload FROM to be in
1499 transfer_replacements (to, from)
1504 for (i = 0; i < n_replacements; i++)
1505 if (replacements[i].what == from)
1506 replacements[i].what = to;
1509 /* Remove all replacements in reload FROM. */
1511 remove_replacements (from)
1516 for (i = 0, j = 0; i < n_replacements; i++)
1518 if (replacements[i].what == from)
1520 replacements[j++] = replacements[i];
1524 /* If there is only one output reload, and it is not for an earlyclobber
1525 operand, try to combine it with a (logically unrelated) input reload
1526 to reduce the number of reload registers needed.
1528 This is safe if the input reload does not appear in
1529 the value being output-reloaded, because this implies
1530 it is not needed any more once the original insn completes.
1532 If that doesn't work, see we can use any of the registers that
1533 die in this insn as a reload register. We can if it is of the right
1534 class and does not appear in the value being output-reloaded. */
1540 int output_reload = -1;
1541 int secondary_out = -1;
1544 /* Find the output reload; return unless there is exactly one
1545 and that one is mandatory. */
1547 for (i = 0; i < n_reloads; i++)
1548 if (reload_out[i] != 0)
1550 if (output_reload >= 0)
1555 if (output_reload < 0 || reload_optional[output_reload])
1558 /* An input-output reload isn't combinable. */
1560 if (reload_in[output_reload] != 0)
1563 /* If this reload is for an earlyclobber operand, we can't do anything. */
1564 if (earlyclobber_operand_p (reload_out[output_reload]))
1567 /* Check each input reload; can we combine it? */
1569 for (i = 0; i < n_reloads; i++)
1570 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1571 /* Life span of this reload must not extend past main insn. */
1572 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1573 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1574 && reload_when_needed[i] != RELOAD_OTHER
1575 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1576 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1577 reload_outmode[output_reload]))
1578 && reload_inc[i] == 0
1579 && reload_reg_rtx[i] == 0
1580 #ifdef SECONDARY_MEMORY_NEEDED
1581 /* Don't combine two reloads with different secondary
1582 memory locations. */
1583 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1584 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1585 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1586 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1588 && (SMALL_REGISTER_CLASSES
1589 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1590 : (reg_class_subset_p (reload_reg_class[i],
1591 reload_reg_class[output_reload])
1592 || reg_class_subset_p (reload_reg_class[output_reload],
1593 reload_reg_class[i])))
1594 && (MATCHES (reload_in[i], reload_out[output_reload])
1595 /* Args reversed because the first arg seems to be
1596 the one that we imagine being modified
1597 while the second is the one that might be affected. */
1598 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1600 /* However, if the input is a register that appears inside
1601 the output, then we also can't share.
1602 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1603 If the same reload reg is used for both reg 69 and the
1604 result to be stored in memory, then that result
1605 will clobber the address of the memory ref. */
1606 && ! (GET_CODE (reload_in[i]) == REG
1607 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1608 reload_out[output_reload]))))
1609 && (reg_class_size[(int) reload_reg_class[i]]
1610 || SMALL_REGISTER_CLASSES)
1611 /* We will allow making things slightly worse by combining an
1612 input and an output, but no worse than that. */
1613 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1614 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1618 /* We have found a reload to combine with! */
1619 reload_out[i] = reload_out[output_reload];
1620 reload_outmode[i] = reload_outmode[output_reload];
1621 /* Mark the old output reload as inoperative. */
1622 reload_out[output_reload] = 0;
1623 /* The combined reload is needed for the entire insn. */
1624 reload_when_needed[i] = RELOAD_OTHER;
1625 /* If the output reload had a secondary reload, copy it. */
1626 if (reload_secondary_out_reload[output_reload] != -1)
1628 reload_secondary_out_reload[i]
1629 = reload_secondary_out_reload[output_reload];
1630 reload_secondary_out_icode[i]
1631 = reload_secondary_out_icode[output_reload];
1634 #ifdef SECONDARY_MEMORY_NEEDED
1635 /* Copy any secondary MEM. */
1636 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1637 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1638 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1640 /* If required, minimize the register class. */
1641 if (reg_class_subset_p (reload_reg_class[output_reload],
1642 reload_reg_class[i]))
1643 reload_reg_class[i] = reload_reg_class[output_reload];
1645 /* Transfer all replacements from the old reload to the combined. */
1646 for (j = 0; j < n_replacements; j++)
1647 if (replacements[j].what == output_reload)
1648 replacements[j].what = i;
1653 /* If this insn has only one operand that is modified or written (assumed
1654 to be the first), it must be the one corresponding to this reload. It
1655 is safe to use anything that dies in this insn for that output provided
1656 that it does not occur in the output (we already know it isn't an
1657 earlyclobber. If this is an asm insn, give up. */
1659 if (INSN_CODE (this_insn) == -1)
1662 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1663 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1664 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1667 /* See if some hard register that dies in this insn and is not used in
1668 the output is the right class. Only works if the register we pick
1669 up can fully hold our output reload. */
1670 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1671 if (REG_NOTE_KIND (note) == REG_DEAD
1672 && GET_CODE (XEXP (note, 0)) == REG
1673 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1674 reload_out[output_reload])
1675 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1676 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1677 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1678 REGNO (XEXP (note, 0)))
1679 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1680 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1681 /* Ensure that a secondary or tertiary reload for this output
1682 won't want this register. */
1683 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1684 || (! (TEST_HARD_REG_BIT
1685 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1686 REGNO (XEXP (note, 0))))
1687 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1688 || ! (TEST_HARD_REG_BIT
1689 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1690 REGNO (XEXP (note, 0)))))))
1691 && ! fixed_regs[REGNO (XEXP (note, 0))])
1693 reload_reg_rtx[output_reload]
1694 = gen_rtx_REG (reload_outmode[output_reload],
1695 REGNO (XEXP (note, 0)));
1700 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1701 See if one of IN and OUT is a register that may be used;
1702 this is desirable since a spill-register won't be needed.
1703 If so, return the register rtx that proves acceptable.
1705 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1706 CLASS is the register class required for the reload.
1708 If FOR_REAL is >= 0, it is the number of the reload,
1709 and in some cases when it can be discovered that OUT doesn't need
1710 to be computed, clear out reload_out[FOR_REAL].
1712 If FOR_REAL is -1, this should not be done, because this call
1713 is just to see if a register can be found, not to find and install it.
1715 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1716 puts an additional constraint on being able to use IN for OUT since
1717 IN must not appear elsewhere in the insn (it is assumed that IN itself
1718 is safe from the earlyclobber). */
1721 find_dummy_reload (real_in, real_out, inloc, outloc,
1722 inmode, outmode, class, for_real, earlyclobber)
1723 rtx real_in, real_out;
1724 rtx *inloc, *outloc;
1725 enum machine_mode inmode, outmode;
1726 enum reg_class class;
1736 /* If operands exceed a word, we can't use either of them
1737 unless they have the same size. */
1738 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1739 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1740 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1743 /* Find the inside of any subregs. */
1744 while (GET_CODE (out) == SUBREG)
1746 out_offset = SUBREG_WORD (out);
1747 out = SUBREG_REG (out);
1749 while (GET_CODE (in) == SUBREG)
1751 in_offset = SUBREG_WORD (in);
1752 in = SUBREG_REG (in);
1755 /* Narrow down the reg class, the same way push_reload will;
1756 otherwise we might find a dummy now, but push_reload won't. */
1757 class = PREFERRED_RELOAD_CLASS (in, class);
1759 /* See if OUT will do. */
1760 if (GET_CODE (out) == REG
1761 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1763 register int regno = REGNO (out) + out_offset;
1764 int nwords = HARD_REGNO_NREGS (regno, outmode);
1767 /* When we consider whether the insn uses OUT,
1768 ignore references within IN. They don't prevent us
1769 from copying IN into OUT, because those refs would
1770 move into the insn that reloads IN.
1772 However, we only ignore IN in its role as this reload.
1773 If the insn uses IN elsewhere and it contains OUT,
1774 that counts. We can't be sure it's the "same" operand
1775 so it might not go through this reload. */
1777 *inloc = const0_rtx;
1779 if (regno < FIRST_PSEUDO_REGISTER
1780 /* A fixed reg that can overlap other regs better not be used
1781 for reloading in any way. */
1782 #ifdef OVERLAPPING_REGNO_P
1783 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1785 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1786 PATTERN (this_insn), outloc))
1789 for (i = 0; i < nwords; i++)
1790 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1796 if (GET_CODE (real_out) == REG)
1799 value = gen_rtx_REG (outmode, regno);
1806 /* Consider using IN if OUT was not acceptable
1807 or if OUT dies in this insn (like the quotient in a divmod insn).
1808 We can't use IN unless it is dies in this insn,
1809 which means we must know accurately which hard regs are live.
1810 Also, the result can't go in IN if IN is used within OUT,
1811 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1812 if (hard_regs_live_known
1813 && GET_CODE (in) == REG
1814 && REGNO (in) < FIRST_PSEUDO_REGISTER
1816 || find_reg_note (this_insn, REG_UNUSED, real_out))
1817 && find_reg_note (this_insn, REG_DEAD, real_in)
1818 && !fixed_regs[REGNO (in)]
1819 && HARD_REGNO_MODE_OK (REGNO (in),
1820 /* The only case where out and real_out might
1821 have different modes is where real_out
1822 is a subreg, and in that case, out
1824 (GET_MODE (out) != VOIDmode
1825 ? GET_MODE (out) : outmode)))
1827 register int regno = REGNO (in) + in_offset;
1828 int nwords = HARD_REGNO_NREGS (regno, inmode);
1830 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1831 && ! hard_reg_set_here_p (regno, regno + nwords,
1832 PATTERN (this_insn))
1834 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1835 PATTERN (this_insn), inloc)))
1838 for (i = 0; i < nwords; i++)
1839 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1845 /* If we were going to use OUT as the reload reg
1846 and changed our mind, it means OUT is a dummy that
1847 dies here. So don't bother copying value to it. */
1848 if (for_real >= 0 && value == real_out)
1849 reload_out[for_real] = 0;
1850 if (GET_CODE (real_in) == REG)
1853 value = gen_rtx_REG (inmode, regno);
1861 /* This page contains subroutines used mainly for determining
1862 whether the IN or an OUT of a reload can serve as the
1865 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1868 earlyclobber_operand_p (x)
1873 for (i = 0; i < n_earlyclobbers; i++)
1874 if (reload_earlyclobbers[i] == x)
1880 /* Return 1 if expression X alters a hard reg in the range
1881 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1882 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1883 X should be the body of an instruction. */
1886 hard_reg_set_here_p (beg_regno, end_regno, x)
1887 register int beg_regno, end_regno;
1890 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1892 register rtx op0 = SET_DEST (x);
1893 while (GET_CODE (op0) == SUBREG)
1894 op0 = SUBREG_REG (op0);
1895 if (GET_CODE (op0) == REG)
1897 register int r = REGNO (op0);
1898 /* See if this reg overlaps range under consideration. */
1900 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1904 else if (GET_CODE (x) == PARALLEL)
1906 register int i = XVECLEN (x, 0) - 1;
1908 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1915 /* Return 1 if ADDR is a valid memory address for mode MODE,
1916 and check that each pseudo reg has the proper kind of
1920 strict_memory_address_p (mode, addr)
1921 enum machine_mode mode;
1924 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1931 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1932 if they are the same hard reg, and has special hacks for
1933 autoincrement and autodecrement.
1934 This is specifically intended for find_reloads to use
1935 in determining whether two operands match.
1936 X is the operand whose number is the lower of the two.
1938 The value is 2 if Y contains a pre-increment that matches
1939 a non-incrementing address in X. */
1941 /* ??? To be completely correct, we should arrange to pass
1942 for X the output operand and for Y the input operand.
1943 For now, we assume that the output operand has the lower number
1944 because that is natural in (SET output (... input ...)). */
1947 operands_match_p (x, y)
1951 register RTX_CODE code = GET_CODE (x);
1957 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1958 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1959 && GET_CODE (SUBREG_REG (y)) == REG)))
1965 i = REGNO (SUBREG_REG (x));
1966 if (i >= FIRST_PSEUDO_REGISTER)
1968 i += SUBREG_WORD (x);
1973 if (GET_CODE (y) == SUBREG)
1975 j = REGNO (SUBREG_REG (y));
1976 if (j >= FIRST_PSEUDO_REGISTER)
1978 j += SUBREG_WORD (y);
1983 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1984 multiple hard register group, so that for example (reg:DI 0) and
1985 (reg:SI 1) will be considered the same register. */
1986 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1987 && i < FIRST_PSEUDO_REGISTER)
1988 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1989 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1990 && j < FIRST_PSEUDO_REGISTER)
1991 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1995 /* If two operands must match, because they are really a single
1996 operand of an assembler insn, then two postincrements are invalid
1997 because the assembler insn would increment only once.
1998 On the other hand, an postincrement matches ordinary indexing
1999 if the postincrement is the output operand. */
2000 if (code == POST_DEC || code == POST_INC)
2001 return operands_match_p (XEXP (x, 0), y);
2002 /* Two preincrements are invalid
2003 because the assembler insn would increment only once.
2004 On the other hand, an preincrement matches ordinary indexing
2005 if the preincrement is the input operand.
2006 In this case, return 2, since some callers need to do special
2007 things when this happens. */
2008 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2009 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2013 /* Now we have disposed of all the cases
2014 in which different rtx codes can match. */
2015 if (code != GET_CODE (y))
2017 if (code == LABEL_REF)
2018 return XEXP (x, 0) == XEXP (y, 0);
2019 if (code == SYMBOL_REF)
2020 return XSTR (x, 0) == XSTR (y, 0);
2022 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2024 if (GET_MODE (x) != GET_MODE (y))
2027 /* Compare the elements. If any pair of corresponding elements
2028 fail to match, return 0 for the whole things. */
2031 fmt = GET_RTX_FORMAT (code);
2032 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2038 if (XWINT (x, i) != XWINT (y, i))
2043 if (XINT (x, i) != XINT (y, i))
2048 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2051 /* If any subexpression returns 2,
2052 we should return 2 if we are successful. */
2061 if (XVECLEN (x, i) != XVECLEN (y, i))
2063 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2065 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2073 /* It is believed that rtx's at this level will never
2074 contain anything but integers and other rtx's,
2075 except for within LABEL_REFs and SYMBOL_REFs. */
2080 return 1 + success_2;
2083 /* Return the number of times character C occurs in string S. */
2086 n_occurrences (c, s)
2096 /* Describe the range of registers or memory referenced by X.
2097 If X is a register, set REG_FLAG and put the first register
2098 number into START and the last plus one into END.
2099 If X is a memory reference, put a base address into BASE
2100 and a range of integer offsets into START and END.
2101 If X is pushing on the stack, we can assume it causes no trouble,
2102 so we set the SAFE field. */
2104 static struct decomposition
2108 struct decomposition val;
2114 if (GET_CODE (x) == MEM)
2116 rtx base, offset = 0;
2117 rtx addr = XEXP (x, 0);
2119 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2120 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2122 val.base = XEXP (addr, 0);
2123 val.start = - GET_MODE_SIZE (GET_MODE (x));
2124 val.end = GET_MODE_SIZE (GET_MODE (x));
2125 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2129 if (GET_CODE (addr) == CONST)
2131 addr = XEXP (addr, 0);
2134 if (GET_CODE (addr) == PLUS)
2136 if (CONSTANT_P (XEXP (addr, 0)))
2138 base = XEXP (addr, 1);
2139 offset = XEXP (addr, 0);
2141 else if (CONSTANT_P (XEXP (addr, 1)))
2143 base = XEXP (addr, 0);
2144 offset = XEXP (addr, 1);
2151 offset = const0_rtx;
2153 if (GET_CODE (offset) == CONST)
2154 offset = XEXP (offset, 0);
2155 if (GET_CODE (offset) == PLUS)
2157 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2159 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2160 offset = XEXP (offset, 0);
2162 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2164 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2165 offset = XEXP (offset, 1);
2169 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2170 offset = const0_rtx;
2173 else if (GET_CODE (offset) != CONST_INT)
2175 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2176 offset = const0_rtx;
2179 if (all_const && GET_CODE (base) == PLUS)
2180 base = gen_rtx_CONST (GET_MODE (base), base);
2182 if (GET_CODE (offset) != CONST_INT)
2185 val.start = INTVAL (offset);
2186 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2190 else if (GET_CODE (x) == REG)
2193 val.start = true_regnum (x);
2196 /* A pseudo with no hard reg. */
2197 val.start = REGNO (x);
2198 val.end = val.start + 1;
2202 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2204 else if (GET_CODE (x) == SUBREG)
2206 if (GET_CODE (SUBREG_REG (x)) != REG)
2207 /* This could be more precise, but it's good enough. */
2208 return decompose (SUBREG_REG (x));
2210 val.start = true_regnum (x);
2212 return decompose (SUBREG_REG (x));
2215 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2217 else if (CONSTANT_P (x)
2218 /* This hasn't been assigned yet, so it can't conflict yet. */
2219 || GET_CODE (x) == SCRATCH)
2226 /* Return 1 if altering Y will not modify the value of X.
2227 Y is also described by YDATA, which should be decompose (Y). */
2230 immune_p (x, y, ydata)
2232 struct decomposition ydata;
2234 struct decomposition xdata;
2237 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2241 if (GET_CODE (y) != MEM)
2243 /* If Y is memory and X is not, Y can't affect X. */
2244 if (GET_CODE (x) != MEM)
2247 xdata = decompose (x);
2249 if (! rtx_equal_p (xdata.base, ydata.base))
2251 /* If bases are distinct symbolic constants, there is no overlap. */
2252 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2254 /* Constants and stack slots never overlap. */
2255 if (CONSTANT_P (xdata.base)
2256 && (ydata.base == frame_pointer_rtx
2257 || ydata.base == hard_frame_pointer_rtx
2258 || ydata.base == stack_pointer_rtx))
2260 if (CONSTANT_P (ydata.base)
2261 && (xdata.base == frame_pointer_rtx
2262 || xdata.base == hard_frame_pointer_rtx
2263 || xdata.base == stack_pointer_rtx))
2265 /* If either base is variable, we don't know anything. */
2270 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2273 /* Similar, but calls decompose. */
2276 safe_from_earlyclobber (op, clobber)
2279 struct decomposition early_data;
2281 early_data = decompose (clobber);
2282 return immune_p (op, clobber, early_data);
2285 /* Main entry point of this file: search the body of INSN
2286 for values that need reloading and record them with push_reload.
2287 REPLACE nonzero means record also where the values occur
2288 so that subst_reloads can be used.
2290 IND_LEVELS says how many levels of indirection are supported by this
2291 machine; a value of zero means that a memory reference is not a valid
2294 LIVE_KNOWN says we have valid information about which hard
2295 regs are live at each point in the program; this is true when
2296 we are called from global_alloc but false when stupid register
2297 allocation has been done.
2299 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2300 which is nonnegative if the reg has been commandeered for reloading into.
2301 It is copied into STATIC_RELOAD_REG_P and referenced from there
2302 by various subroutines. */
2305 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2307 int replace, ind_levels;
2309 short *reload_reg_p;
2311 #ifdef REGISTER_CONSTRAINTS
2313 register int insn_code_number;
2316 /* These are the constraints for the insn. We don't change them. */
2317 char *constraints1[MAX_RECOG_OPERANDS];
2318 /* These start out as the constraints for the insn
2319 and they are chewed up as we consider alternatives. */
2320 char *constraints[MAX_RECOG_OPERANDS];
2321 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2323 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2324 char pref_or_nothing[MAX_RECOG_OPERANDS];
2325 /* Nonzero for a MEM operand whose entire address needs a reload. */
2326 int address_reloaded[MAX_RECOG_OPERANDS];
2327 /* Value of enum reload_type to use for operand. */
2328 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2329 /* Value of enum reload_type to use within address of operand. */
2330 enum reload_type address_type[MAX_RECOG_OPERANDS];
2331 /* Save the usage of each operand. */
2332 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2333 int no_input_reloads = 0, no_output_reloads = 0;
2335 int this_alternative[MAX_RECOG_OPERANDS];
2336 char this_alternative_win[MAX_RECOG_OPERANDS];
2337 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2338 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2339 int this_alternative_matches[MAX_RECOG_OPERANDS];
2341 int goal_alternative[MAX_RECOG_OPERANDS];
2342 int this_alternative_number;
2343 int goal_alternative_number;
2344 int operand_reloadnum[MAX_RECOG_OPERANDS];
2345 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2346 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2347 char goal_alternative_win[MAX_RECOG_OPERANDS];
2348 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2349 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2350 int goal_alternative_swapped;
2354 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2355 rtx substed_operand[MAX_RECOG_OPERANDS];
2356 rtx body = PATTERN (insn);
2357 rtx set = single_set (insn);
2358 int goal_earlyclobber, this_earlyclobber;
2359 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2360 /* Cache the last regno for the last pseudo we did an output reload
2361 for in case the next insn uses it. */
2362 static int last_output_reload_regno = -1;
2365 this_insn_is_asm = 0; /* Tentative. */
2369 n_earlyclobbers = 0;
2370 replace_reloads = replace;
2371 hard_regs_live_known = live_known;
2372 static_reload_reg_p = reload_reg_p;
2374 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2375 neither are insns that SET cc0. Insns that use CC0 are not allowed
2376 to have any input reloads. */
2377 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2378 no_output_reloads = 1;
2381 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2382 no_input_reloads = 1;
2383 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2384 no_output_reloads = 1;
2387 #ifdef SECONDARY_MEMORY_NEEDED
2388 /* The eliminated forms of any secondary memory locations are per-insn, so
2389 clear them out here. */
2391 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2394 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2395 Make OPERANDS point to a vector of operand values.
2396 Make OPERAND_LOCS point to a vector of pointers to
2397 where the operands were found.
2398 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2399 constraint-strings for this insn.
2400 Return if the insn needs no reload processing. */
2402 switch (GET_CODE (body))
2412 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2413 is cheap to move between them. If it is not, there may not be an insn
2414 to do the copy, so we may need a reload. */
2415 if (GET_CODE (SET_DEST (body)) == REG
2416 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2417 && GET_CODE (SET_SRC (body)) == REG
2418 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2419 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2420 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2424 reload_n_operands = noperands = asm_noperands (body);
2427 /* This insn is an `asm' with operands. */
2429 insn_code_number = -1;
2430 this_insn_is_asm = 1;
2432 /* expand_asm_operands makes sure there aren't too many operands. */
2433 if (noperands > MAX_RECOG_OPERANDS)
2436 /* Now get the operand values and constraints out of the insn. */
2438 decode_asm_operands (body, recog_operand, recog_operand_loc,
2439 constraints, operand_mode);
2442 bcopy ((char *) constraints, (char *) constraints1,
2443 noperands * sizeof (char *));
2444 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2450 /* Ordinary insn: recognize it, get the operands via insn_extract
2451 and get the constraints. */
2453 insn_code_number = recog_memoized (insn);
2454 if (insn_code_number < 0)
2455 fatal_insn_not_found (insn);
2457 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2458 n_alternatives = insn_n_alternatives[insn_code_number];
2459 /* Just return "no reloads" if insn has no operands with constraints. */
2460 if (n_alternatives == 0)
2462 insn_extract (insn);
2463 for (i = 0; i < noperands; i++)
2465 constraints[i] = constraints1[i]
2466 = insn_operand_constraint[insn_code_number][i];
2467 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2476 /* If we will need to know, later, whether some pair of operands
2477 are the same, we must compare them now and save the result.
2478 Reloading the base and index registers will clobber them
2479 and afterward they will fail to match. */
2481 for (i = 0; i < noperands; i++)
2486 substed_operand[i] = recog_operand[i];
2489 modified[i] = RELOAD_READ;
2491 /* Scan this operand's constraint to see if it is an output operand,
2492 an in-out operand, is commutative, or should match another. */
2497 modified[i] = RELOAD_WRITE;
2499 modified[i] = RELOAD_READ_WRITE;
2502 /* The last operand should not be marked commutative. */
2503 if (i == noperands - 1)
2508 else if (c >= '0' && c <= '9')
2511 operands_match[c][i]
2512 = operands_match_p (recog_operand[c], recog_operand[i]);
2514 /* An operand may not match itself. */
2518 /* If C can be commuted with C+1, and C might need to match I,
2519 then C+1 might also need to match I. */
2520 if (commutative >= 0)
2522 if (c == commutative || c == commutative + 1)
2524 int other = c + (c == commutative ? 1 : -1);
2525 operands_match[other][i]
2526 = operands_match_p (recog_operand[other], recog_operand[i]);
2528 if (i == commutative || i == commutative + 1)
2530 int other = i + (i == commutative ? 1 : -1);
2531 operands_match[c][other]
2532 = operands_match_p (recog_operand[c], recog_operand[other]);
2534 /* Note that C is supposed to be less than I.
2535 No need to consider altering both C and I because in
2536 that case we would alter one into the other. */
2542 /* Examine each operand that is a memory reference or memory address
2543 and reload parts of the addresses into index registers.
2544 Also here any references to pseudo regs that didn't get hard regs
2545 but are equivalent to constants get replaced in the insn itself
2546 with those constants. Nobody will ever see them again.
2548 Finally, set up the preferred classes of each operand. */
2550 for (i = 0; i < noperands; i++)
2552 register RTX_CODE code = GET_CODE (recog_operand[i]);
2554 address_reloaded[i] = 0;
2555 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2556 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2559 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2560 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2563 if (*constraints[i] == 0)
2564 /* Ignore things like match_operator operands. */
2566 else if (constraints[i][0] == 'p')
2568 find_reloads_address (VOIDmode, NULL_PTR,
2569 recog_operand[i], recog_operand_loc[i],
2570 i, operand_type[i], ind_levels, insn);
2572 /* If we now have a simple operand where we used to have a
2573 PLUS or MULT, re-recognize and try again. */
2574 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
2575 || GET_CODE (*recog_operand_loc[i]) == SUBREG)
2576 && (GET_CODE (recog_operand[i]) == MULT
2577 || GET_CODE (recog_operand[i]) == PLUS))
2579 INSN_CODE (insn) = -1;
2580 find_reloads (insn, replace, ind_levels, live_known,
2585 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2587 else if (code == MEM)
2589 if (find_reloads_address (GET_MODE (recog_operand[i]),
2590 recog_operand_loc[i],
2591 XEXP (recog_operand[i], 0),
2592 &XEXP (recog_operand[i], 0),
2593 i, address_type[i], ind_levels, insn))
2594 address_reloaded[i] = 1;
2595 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2597 else if (code == SUBREG)
2599 rtx reg = SUBREG_REG (recog_operand[i]);
2601 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2604 && &SET_DEST (set) == recog_operand_loc[i]);
2606 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2607 that didn't get a hard register, emit a USE with a REG_EQUAL
2608 note in front so that we might inherit a previous, possibly
2611 if (GET_CODE (op) == MEM
2612 && GET_CODE (reg) == REG
2613 && (GET_MODE_SIZE (GET_MODE (reg))
2614 >= GET_MODE_SIZE (GET_MODE (op))))
2615 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2616 = gen_rtx_EXPR_LIST (REG_EQUAL,
2617 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2619 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i] = op;
2621 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2622 /* We can get a PLUS as an "operand" as a result of register
2623 elimination. See eliminate_regs and gen_reload. We handle
2624 a unary operator by reloading the operand. */
2625 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2626 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2628 else if (code == REG)
2630 /* This is equivalent to calling find_reloads_toplev.
2631 The code is duplicated for speed.
2632 When we find a pseudo always equivalent to a constant,
2633 we replace it by the constant. We must be sure, however,
2634 that we don't try to replace it in the insn in which it
2636 register int regno = REGNO (recog_operand[i]);
2637 if (reg_equiv_constant[regno] != 0
2638 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2640 /* Record the existing mode so that the check if constants are
2641 allowed will work when operand_mode isn't specified. */
2643 if (operand_mode[i] == VOIDmode)
2644 operand_mode[i] = GET_MODE (recog_operand[i]);
2646 substed_operand[i] = recog_operand[i]
2647 = reg_equiv_constant[regno];
2649 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2650 that feeds this insn. */
2651 if (reg_equiv_mem[regno] != 0)
2652 substed_operand[i] = recog_operand[i]
2653 = reg_equiv_mem[regno];
2655 if (reg_equiv_address[regno] != 0)
2657 /* If reg_equiv_address is not a constant address, copy it,
2658 since it may be shared. */
2659 /* We must rerun eliminate_regs, in case the elimination
2660 offsets have changed. */
2661 rtx address = XEXP (eliminate_regs (reg_equiv_memory_loc[regno],
2665 if (rtx_varies_p (address))
2666 address = copy_rtx (address);
2668 /* Emit a USE that shows what register is being used/modified. */
2669 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode,
2672 = gen_rtx_EXPR_LIST (REG_EQUAL,
2673 reg_equiv_memory_loc[regno],
2676 *recog_operand_loc[i] = recog_operand[i]
2677 = gen_rtx_MEM (GET_MODE (recog_operand[i]), address);
2678 RTX_UNCHANGING_P (recog_operand[i])
2679 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2680 find_reloads_address (GET_MODE (recog_operand[i]),
2681 recog_operand_loc[i],
2682 XEXP (recog_operand[i], 0),
2683 &XEXP (recog_operand[i], 0),
2684 i, address_type[i], ind_levels, insn);
2685 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2688 /* If the operand is still a register (we didn't replace it with an
2689 equivalent), get the preferred class to reload it into. */
2690 code = GET_CODE (recog_operand[i]);
2692 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2693 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2695 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2696 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2699 /* If this is simply a copy from operand 1 to operand 0, merge the
2700 preferred classes for the operands. */
2701 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2702 && recog_operand[1] == SET_SRC (set))
2704 preferred_class[0] = preferred_class[1]
2705 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2706 pref_or_nothing[0] |= pref_or_nothing[1];
2707 pref_or_nothing[1] |= pref_or_nothing[0];
2710 /* Now see what we need for pseudo-regs that didn't get hard regs
2711 or got the wrong kind of hard reg. For this, we must consider
2712 all the operands together against the register constraints. */
2714 best = MAX_RECOG_OPERANDS * 2 + 600;
2717 goal_alternative_swapped = 0;
2720 /* The constraints are made of several alternatives.
2721 Each operand's constraint looks like foo,bar,... with commas
2722 separating the alternatives. The first alternatives for all
2723 operands go together, the second alternatives go together, etc.
2725 First loop over alternatives. */
2727 for (this_alternative_number = 0;
2728 this_alternative_number < n_alternatives;
2729 this_alternative_number++)
2731 /* Loop over operands for one constraint alternative. */
2732 /* LOSERS counts those that don't fit this alternative
2733 and would require loading. */
2735 /* BAD is set to 1 if it some operand can't fit this alternative
2736 even after reloading. */
2738 /* REJECT is a count of how undesirable this alternative says it is
2739 if any reloading is required. If the alternative matches exactly
2740 then REJECT is ignored, but otherwise it gets this much
2741 counted against it in addition to the reloading needed. Each
2742 ? counts three times here since we want the disparaging caused by
2743 a bad register class to only count 1/3 as much. */
2746 this_earlyclobber = 0;
2748 for (i = 0; i < noperands; i++)
2750 register char *p = constraints[i];
2751 register int win = 0;
2752 /* 0 => this operand can be reloaded somehow for this alternative */
2754 /* 0 => this operand can be reloaded if the alternative allows regs. */
2757 register rtx operand = recog_operand[i];
2759 /* Nonzero means this is a MEM that must be reloaded into a reg
2760 regardless of what the constraint says. */
2761 int force_reload = 0;
2763 /* Nonzero if a constant forced into memory would be OK for this
2766 int earlyclobber = 0;
2768 /* If the predicate accepts a unary operator, it means that
2769 we need to reload the operand, but do not do this for
2770 match_operator and friends. */
2771 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2772 operand = XEXP (operand, 0);
2774 /* If the operand is a SUBREG, extract
2775 the REG or MEM (or maybe even a constant) within.
2776 (Constants can occur as a result of reg_equiv_constant.) */
2778 while (GET_CODE (operand) == SUBREG)
2780 offset += SUBREG_WORD (operand);
2781 operand = SUBREG_REG (operand);
2782 /* Force reload if this is a constant or PLUS or if there may
2783 be a problem accessing OPERAND in the outer mode. */
2784 if (CONSTANT_P (operand)
2785 || GET_CODE (operand) == PLUS
2786 /* We must force a reload of paradoxical SUBREGs
2787 of a MEM because the alignment of the inner value
2788 may not be enough to do the outer reference. On
2789 big-endian machines, it may also reference outside
2792 On machines that extend byte operations and we have a
2793 SUBREG where both the inner and outer modes are no wider
2794 than a word and the inner mode is narrower, is integral,
2795 and gets extended when loaded from memory, combine.c has
2796 made assumptions about the behavior of the machine in such
2797 register access. If the data is, in fact, in memory we
2798 must always load using the size assumed to be in the
2799 register and let the insn do the different-sized
2802 This is doubly true if WORD_REGISTER_OPERATIONS. In
2803 this case eliminate_regs has left non-paradoxical
2804 subregs for push_reloads to see. Make sure it does
2805 by forcing the reload.
2807 ??? When is it right at this stage to have a subreg
2808 of a mem that is _not_ to be handled specialy? IMO
2809 those should have been reduced to just a mem. */
2810 || ((GET_CODE (operand) == MEM
2811 || (GET_CODE (operand)== REG
2812 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2813 #ifndef WORD_REGISTER_OPERATIONS
2814 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2815 < BIGGEST_ALIGNMENT)
2816 && (GET_MODE_SIZE (operand_mode[i])
2817 > GET_MODE_SIZE (GET_MODE (operand))))
2818 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2819 #ifdef LOAD_EXTEND_OP
2820 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2821 && (GET_MODE_SIZE (GET_MODE (operand))
2823 && (GET_MODE_SIZE (operand_mode[i])
2824 > GET_MODE_SIZE (GET_MODE (operand)))
2825 && INTEGRAL_MODE_P (GET_MODE (operand))
2826 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2831 /* Subreg of a hard reg which can't handle the subreg's mode
2832 or which would handle that mode in the wrong number of
2833 registers for subregging to work. */
2834 || (GET_CODE (operand) == REG
2835 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2836 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2837 && (GET_MODE_SIZE (GET_MODE (operand))
2839 && ((GET_MODE_SIZE (GET_MODE (operand))
2841 != HARD_REGNO_NREGS (REGNO (operand),
2842 GET_MODE (operand))))
2843 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2848 this_alternative[i] = (int) NO_REGS;
2849 this_alternative_win[i] = 0;
2850 this_alternative_offmemok[i] = 0;
2851 this_alternative_earlyclobber[i] = 0;
2852 this_alternative_matches[i] = -1;
2854 /* An empty constraint or empty alternative
2855 allows anything which matched the pattern. */
2856 if (*p == 0 || *p == ',')
2859 /* Scan this alternative's specs for this operand;
2860 set WIN if the operand fits any letter in this alternative.
2861 Otherwise, clear BADOP if this operand could
2862 fit some letter after reloads,
2863 or set WINREG if this operand could fit after reloads
2864 provided the constraint allows some registers. */
2866 while (*p && (c = *p++) != ',')
2875 /* The last operand should not be marked commutative. */
2876 if (i != noperands - 1)
2889 /* Ignore rest of this alternative as far as
2890 reloading is concerned. */
2891 while (*p && *p != ',') p++;
2900 this_alternative_matches[i] = c;
2901 /* We are supposed to match a previous operand.
2902 If we do, we win if that one did.
2903 If we do not, count both of the operands as losers.
2904 (This is too conservative, since most of the time
2905 only a single reload insn will be needed to make
2906 the two operands win. As a result, this alternative
2907 may be rejected when it is actually desirable.) */
2908 if ((swapped && (c != commutative || i != commutative + 1))
2909 /* If we are matching as if two operands were swapped,
2910 also pretend that operands_match had been computed
2912 But if I is the second of those and C is the first,
2913 don't exchange them, because operands_match is valid
2914 only on one side of its diagonal. */
2916 [(c == commutative || c == commutative + 1)
2917 ? 2*commutative + 1 - c : c]
2918 [(i == commutative || i == commutative + 1)
2919 ? 2*commutative + 1 - i : i])
2920 : operands_match[c][i])
2922 /* If we are matching a non-offsettable address where an
2923 offsettable address was expected, then we must reject
2924 this combination, because we can't reload it. */
2925 if (this_alternative_offmemok[c]
2926 && GET_CODE (recog_operand[c]) == MEM
2927 && this_alternative[c] == (int) NO_REGS
2928 && ! this_alternative_win[c])
2931 win = this_alternative_win[c];
2935 /* Operands don't match. */
2937 /* Retroactively mark the operand we had to match
2938 as a loser, if it wasn't already. */
2939 if (this_alternative_win[c])
2941 this_alternative_win[c] = 0;
2942 if (this_alternative[c] == (int) NO_REGS)
2944 /* But count the pair only once in the total badness of
2945 this alternative, if the pair can be a dummy reload. */
2947 = find_dummy_reload (recog_operand[i], recog_operand[c],
2948 recog_operand_loc[i], recog_operand_loc[c],
2949 operand_mode[i], operand_mode[c],
2950 this_alternative[c], -1,
2951 this_alternative_earlyclobber[c]);
2956 /* This can be fixed with reloads if the operand
2957 we are supposed to match can be fixed with reloads. */
2959 this_alternative[i] = this_alternative[c];
2961 /* If we have to reload this operand and some previous
2962 operand also had to match the same thing as this
2963 operand, we don't know how to do that. So reject this
2965 if (! win || force_reload)
2966 for (j = 0; j < i; j++)
2967 if (this_alternative_matches[j]
2968 == this_alternative_matches[i])
2974 /* All necessary reloads for an address_operand
2975 were handled in find_reloads_address. */
2976 this_alternative[i] = (int) BASE_REG_CLASS;
2983 if (GET_CODE (operand) == MEM
2984 || (GET_CODE (operand) == REG
2985 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2986 && reg_renumber[REGNO (operand)] < 0))
2988 if (CONSTANT_P (operand)
2989 /* force_const_mem does not accept HIGH. */
2990 && GET_CODE (operand) != HIGH)
2996 if (GET_CODE (operand) == MEM
2997 && ! address_reloaded[i]
2998 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2999 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3004 if (GET_CODE (operand) == MEM
3005 && ! address_reloaded[i]
3006 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3007 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3011 /* Memory operand whose address is not offsettable. */
3015 if (GET_CODE (operand) == MEM
3016 && ! (ind_levels ? offsettable_memref_p (operand)
3017 : offsettable_nonstrict_memref_p (operand))
3018 /* Certain mem addresses will become offsettable
3019 after they themselves are reloaded. This is important;
3020 we don't want our own handling of unoffsettables
3021 to override the handling of reg_equiv_address. */
3022 && !(GET_CODE (XEXP (operand, 0)) == REG
3024 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3028 /* Memory operand whose address is offsettable. */
3032 if ((GET_CODE (operand) == MEM
3033 /* If IND_LEVELS, find_reloads_address won't reload a
3034 pseudo that didn't get a hard reg, so we have to
3035 reject that case. */
3036 && (ind_levels ? offsettable_memref_p (operand)
3037 : offsettable_nonstrict_memref_p (operand)))
3038 /* A reloaded auto-increment address is offsettable,
3039 because it is now just a simple register indirect. */
3040 || (GET_CODE (operand) == MEM
3041 && address_reloaded[i]
3042 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3043 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
3044 || GET_CODE (XEXP (operand, 0)) == POST_INC
3045 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3046 /* Certain mem addresses will become offsettable
3047 after they themselves are reloaded. This is important;
3048 we don't want our own handling of unoffsettables
3049 to override the handling of reg_equiv_address. */
3050 || (GET_CODE (operand) == MEM
3051 && GET_CODE (XEXP (operand, 0)) == REG
3053 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
3054 || (GET_CODE (operand) == REG
3055 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3056 && reg_renumber[REGNO (operand)] < 0
3057 /* If reg_equiv_address is nonzero, we will be
3058 loading it into a register; hence it will be
3059 offsettable, but we cannot say that reg_equiv_mem
3060 is offsettable without checking. */
3061 && ((reg_equiv_mem[REGNO (operand)] != 0
3062 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3063 || (reg_equiv_address[REGNO (operand)] != 0))))
3065 /* force_const_mem does not accept HIGH. */
3066 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3067 || GET_CODE (operand) == MEM)
3074 /* Output operand that is stored before the need for the
3075 input operands (and their index registers) is over. */
3076 earlyclobber = 1, this_earlyclobber = 1;
3080 #ifndef REAL_ARITHMETIC
3081 /* Match any floating double constant, but only if
3082 we can examine the bits of it reliably. */
3083 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3084 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3085 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3088 if (GET_CODE (operand) == CONST_DOUBLE)
3093 if (GET_CODE (operand) == CONST_DOUBLE)
3099 if (GET_CODE (operand) == CONST_DOUBLE
3100 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3105 if (GET_CODE (operand) == CONST_INT
3106 || (GET_CODE (operand) == CONST_DOUBLE
3107 && GET_MODE (operand) == VOIDmode))
3110 if (CONSTANT_P (operand)
3111 #ifdef LEGITIMATE_PIC_OPERAND_P
3112 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3119 if (GET_CODE (operand) == CONST_INT
3120 || (GET_CODE (operand) == CONST_DOUBLE
3121 && GET_MODE (operand) == VOIDmode))
3133 if (GET_CODE (operand) == CONST_INT
3134 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3144 /* A PLUS is never a valid operand, but reload can make
3145 it from a register when eliminating registers. */
3146 && GET_CODE (operand) != PLUS
3147 /* A SCRATCH is not a valid operand. */
3148 && GET_CODE (operand) != SCRATCH
3149 #ifdef LEGITIMATE_PIC_OPERAND_P
3150 && (! CONSTANT_P (operand)
3152 || LEGITIMATE_PIC_OPERAND_P (operand))
3154 && (GENERAL_REGS == ALL_REGS
3155 || GET_CODE (operand) != REG
3156 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3157 && reg_renumber[REGNO (operand)] < 0)))
3159 /* Drop through into 'r' case */
3163 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3166 #ifdef EXTRA_CONSTRAINT
3172 if (EXTRA_CONSTRAINT (operand, c))
3179 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3182 if (GET_MODE (operand) == BLKmode)
3185 if (GET_CODE (operand) == REG
3186 && reg_fits_class_p (operand, this_alternative[i],
3187 offset, GET_MODE (recog_operand[i])))
3194 /* If this operand could be handled with a reg,
3195 and some reg is allowed, then this operand can be handled. */
3196 if (winreg && this_alternative[i] != (int) NO_REGS)
3199 /* Record which operands fit this alternative. */
3200 this_alternative_earlyclobber[i] = earlyclobber;
3201 if (win && ! force_reload)
3202 this_alternative_win[i] = 1;
3205 int const_to_mem = 0;
3207 this_alternative_offmemok[i] = offmemok;
3211 /* Alternative loses if it has no regs for a reg operand. */
3212 if (GET_CODE (operand) == REG
3213 && this_alternative[i] == (int) NO_REGS
3214 && this_alternative_matches[i] < 0)
3218 /* If this is a pseudo-register that is set in the previous
3219 insns, there's a good chance that it will already be in a
3220 spill register and we can use that spill register. So
3221 make this case cheaper.
3223 Disabled for egcs. egcs has better inheritance code and
3224 this change causes problems with the improved reload
3225 inheritance code. */
3226 if (GET_CODE (operand) == REG
3227 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3228 && REGNO (operand) == last_output_reload_regno)
3232 /* If this is a constant that is reloaded into the desired
3233 class by copying it to memory first, count that as another
3234 reload. This is consistent with other code and is
3235 required to avoid choosing another alternative when
3236 the constant is moved into memory by this function on
3237 an early reload pass. Note that the test here is
3238 precisely the same as in the code below that calls
3240 if (CONSTANT_P (operand)
3241 /* force_const_mem does not accept HIGH. */
3242 && GET_CODE (operand) != HIGH
3243 && ((PREFERRED_RELOAD_CLASS (operand,
3244 (enum reg_class) this_alternative[i])
3246 || no_input_reloads)
3247 && operand_mode[i] != VOIDmode)
3250 if (this_alternative[i] != (int) NO_REGS)
3254 /* If we can't reload this value at all, reject this
3255 alternative. Note that we could also lose due to
3256 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3259 if (! CONSTANT_P (operand)
3260 && (enum reg_class) this_alternative[i] != NO_REGS
3261 && (PREFERRED_RELOAD_CLASS (operand,
3262 (enum reg_class) this_alternative[i])
3266 /* Alternative loses if it requires a type of reload not
3267 permitted for this insn. We can always reload SCRATCH
3268 and objects with a REG_UNUSED note. */
3269 else if (GET_CODE (operand) != SCRATCH
3270 && modified[i] != RELOAD_READ && no_output_reloads
3271 && ! find_reg_note (insn, REG_UNUSED, operand))
3273 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3278 /* We prefer to reload pseudos over reloading other things,
3279 since such reloads may be able to be eliminated later.
3280 If we are reloading a SCRATCH, we won't be generating any
3281 insns, just using a register, so it is also preferred.
3282 So bump REJECT in other cases. Don't do this in the
3283 case where we are forcing a constant into memory and
3284 it will then win since we don't want to have a different
3285 alternative match then. */
3286 if (! (GET_CODE (operand) == REG
3287 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3288 && GET_CODE (operand) != SCRATCH
3289 && ! (const_to_mem && constmemok))
3292 /* Input reloads can be inherited more often than output
3293 reloads can be removed, so penalize output reloads. */
3294 if (operand_type[i] != RELOAD_FOR_INPUT
3295 && GET_CODE (operand) != SCRATCH)
3299 /* If this operand is a pseudo register that didn't get a hard
3300 reg and this alternative accepts some register, see if the
3301 class that we want is a subset of the preferred class for this
3302 register. If not, but it intersects that class, use the
3303 preferred class instead. If it does not intersect the preferred
3304 class, show that usage of this alternative should be discouraged;
3305 it will be discouraged more still if the register is `preferred
3306 or nothing'. We do this because it increases the chance of
3307 reusing our spill register in a later insn and avoiding a pair
3308 of memory stores and loads.
3310 Don't bother with this if this alternative will accept this
3313 Don't do this for a multiword operand, since it is only a
3314 small win and has the risk of requiring more spill registers,
3315 which could cause a large loss.
3317 Don't do this if the preferred class has only one register
3318 because we might otherwise exhaust the class. */
3321 if (! win && this_alternative[i] != (int) NO_REGS
3322 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3323 && reg_class_size[(int) preferred_class[i]] > 1)
3325 if (! reg_class_subset_p (this_alternative[i],
3326 preferred_class[i]))
3328 /* Since we don't have a way of forming the intersection,
3329 we just do something special if the preferred class
3330 is a subset of the class we have; that's the most
3331 common case anyway. */
3332 if (reg_class_subset_p (preferred_class[i],
3333 this_alternative[i]))
3334 this_alternative[i] = (int) preferred_class[i];
3336 reject += (2 + 2 * pref_or_nothing[i]);
3341 /* Now see if any output operands that are marked "earlyclobber"
3342 in this alternative conflict with any input operands
3343 or any memory addresses. */
3345 for (i = 0; i < noperands; i++)
3346 if (this_alternative_earlyclobber[i]
3347 && this_alternative_win[i])
3349 struct decomposition early_data;
3351 early_data = decompose (recog_operand[i]);
3353 if (modified[i] == RELOAD_READ)
3356 if (this_alternative[i] == NO_REGS)
3358 this_alternative_earlyclobber[i] = 0;
3359 if (this_insn_is_asm)
3360 error_for_asm (this_insn,
3361 "`&' constraint used with no register class");
3366 for (j = 0; j < noperands; j++)
3367 /* Is this an input operand or a memory ref? */
3368 if ((GET_CODE (recog_operand[j]) == MEM
3369 || modified[j] != RELOAD_WRITE)
3371 /* Ignore things like match_operator operands. */
3372 && *constraints1[j] != 0
3373 /* Don't count an input operand that is constrained to match
3374 the early clobber operand. */
3375 && ! (this_alternative_matches[j] == i
3376 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3377 /* Is it altered by storing the earlyclobber operand? */
3378 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3380 /* If the output is in a single-reg class,
3381 it's costly to reload it, so reload the input instead. */
3382 if (reg_class_size[this_alternative[i]] == 1
3383 && (GET_CODE (recog_operand[j]) == REG
3384 || GET_CODE (recog_operand[j]) == SUBREG))
3387 this_alternative_win[j] = 0;
3392 /* If an earlyclobber operand conflicts with something,
3393 it must be reloaded, so request this and count the cost. */
3397 this_alternative_win[i] = 0;
3398 for (j = 0; j < noperands; j++)
3399 if (this_alternative_matches[j] == i
3400 && this_alternative_win[j])
3402 this_alternative_win[j] = 0;
3408 /* If one alternative accepts all the operands, no reload required,
3409 choose that alternative; don't consider the remaining ones. */
3412 /* Unswap these so that they are never swapped at `finish'. */
3413 if (commutative >= 0)
3415 recog_operand[commutative] = substed_operand[commutative];
3416 recog_operand[commutative + 1]
3417 = substed_operand[commutative + 1];
3419 for (i = 0; i < noperands; i++)
3421 goal_alternative_win[i] = 1;
3422 goal_alternative[i] = this_alternative[i];
3423 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3424 goal_alternative_matches[i] = this_alternative_matches[i];
3425 goal_alternative_earlyclobber[i]
3426 = this_alternative_earlyclobber[i];
3428 goal_alternative_number = this_alternative_number;
3429 goal_alternative_swapped = swapped;
3430 goal_earlyclobber = this_earlyclobber;
3434 /* REJECT, set by the ! and ? constraint characters and when a register
3435 would be reloaded into a non-preferred class, discourages the use of
3436 this alternative for a reload goal. REJECT is incremented by six
3437 for each ? and two for each non-preferred class. */
3438 losers = losers * 6 + reject;
3440 /* If this alternative can be made to work by reloading,
3441 and it needs less reloading than the others checked so far,
3442 record it as the chosen goal for reloading. */
3443 if (! bad && best > losers)
3445 for (i = 0; i < noperands; i++)
3447 goal_alternative[i] = this_alternative[i];
3448 goal_alternative_win[i] = this_alternative_win[i];
3449 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3450 goal_alternative_matches[i] = this_alternative_matches[i];
3451 goal_alternative_earlyclobber[i]
3452 = this_alternative_earlyclobber[i];
3454 goal_alternative_swapped = swapped;
3456 goal_alternative_number = this_alternative_number;
3457 goal_earlyclobber = this_earlyclobber;
3461 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3462 then we need to try each alternative twice,
3463 the second time matching those two operands
3464 as if we had exchanged them.
3465 To do this, really exchange them in operands.
3467 If we have just tried the alternatives the second time,
3468 return operands to normal and drop through. */
3470 if (commutative >= 0)
3475 register enum reg_class tclass;
3478 recog_operand[commutative] = substed_operand[commutative + 1];
3479 recog_operand[commutative + 1] = substed_operand[commutative];
3481 tclass = preferred_class[commutative];
3482 preferred_class[commutative] = preferred_class[commutative + 1];
3483 preferred_class[commutative + 1] = tclass;
3485 t = pref_or_nothing[commutative];
3486 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3487 pref_or_nothing[commutative + 1] = t;
3489 bcopy ((char *) constraints1, (char *) constraints,
3490 noperands * sizeof (char *));
3495 recog_operand[commutative] = substed_operand[commutative];
3496 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3500 /* The operands don't meet the constraints.
3501 goal_alternative describes the alternative
3502 that we could reach by reloading the fewest operands.
3503 Reload so as to fit it. */
3505 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3507 /* No alternative works with reloads?? */
3508 if (insn_code_number >= 0)
3510 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3511 /* Avoid further trouble with this insn. */
3512 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3517 /* Jump to `finish' from above if all operands are valid already.
3518 In that case, goal_alternative_win is all 1. */
3521 /* Right now, for any pair of operands I and J that are required to match,
3523 goal_alternative_matches[J] is I.
3524 Set up goal_alternative_matched as the inverse function:
3525 goal_alternative_matched[I] = J. */
3527 for (i = 0; i < noperands; i++)
3528 goal_alternative_matched[i] = -1;
3530 for (i = 0; i < noperands; i++)
3531 if (! goal_alternative_win[i]
3532 && goal_alternative_matches[i] >= 0)
3533 goal_alternative_matched[goal_alternative_matches[i]] = i;
3535 /* If the best alternative is with operands 1 and 2 swapped,
3536 consider them swapped before reporting the reloads. Update the
3537 operand numbers of any reloads already pushed. */
3539 if (goal_alternative_swapped)
3543 tem = substed_operand[commutative];
3544 substed_operand[commutative] = substed_operand[commutative + 1];
3545 substed_operand[commutative + 1] = tem;
3546 tem = recog_operand[commutative];
3547 recog_operand[commutative] = recog_operand[commutative + 1];
3548 recog_operand[commutative + 1] = tem;
3550 for (i = 0; i < n_reloads; i++)
3552 if (reload_opnum[i] == commutative)
3553 reload_opnum[i] = commutative + 1;
3554 else if (reload_opnum[i] == commutative + 1)
3555 reload_opnum[i] = commutative;
3559 /* Perform whatever substitutions on the operands we are supposed
3560 to make due to commutativity or replacement of registers
3561 with equivalent constants or memory slots. */
3563 for (i = 0; i < noperands; i++)
3565 *recog_operand_loc[i] = substed_operand[i];
3566 /* While we are looping on operands, initialize this. */
3567 operand_reloadnum[i] = -1;
3569 /* If this is an earlyclobber operand, we need to widen the scope.
3570 The reload must remain valid from the start of the insn being
3571 reloaded until after the operand is stored into its destination.
3572 We approximate this with RELOAD_OTHER even though we know that we
3573 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3575 One special case that is worth checking is when we have an
3576 output that is earlyclobber but isn't used past the insn (typically
3577 a SCRATCH). In this case, we only need have the reload live
3578 through the insn itself, but not for any of our input or output
3580 But we must not accidentally narrow the scope of an existing
3581 RELOAD_OTHER reload - leave these alone.
3583 In any case, anything needed to address this operand can remain
3584 however they were previously categorized. */
3586 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3588 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3589 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3592 /* Any constants that aren't allowed and can't be reloaded
3593 into registers are here changed into memory references. */
3594 for (i = 0; i < noperands; i++)
3595 if (! goal_alternative_win[i]
3596 && CONSTANT_P (recog_operand[i])
3597 /* force_const_mem does not accept HIGH. */
3598 && GET_CODE (recog_operand[i]) != HIGH
3599 && ((PREFERRED_RELOAD_CLASS (recog_operand[i],
3600 (enum reg_class) goal_alternative[i])
3602 || no_input_reloads)
3603 && operand_mode[i] != VOIDmode)
3605 *recog_operand_loc[i] = recog_operand[i]
3606 = find_reloads_toplev (force_const_mem (operand_mode[i],
3608 i, address_type[i], ind_levels, 0);
3609 if (alternative_allows_memconst (constraints1[i],
3610 goal_alternative_number))
3611 goal_alternative_win[i] = 1;
3614 /* Record the values of the earlyclobber operands for the caller. */
3615 if (goal_earlyclobber)
3616 for (i = 0; i < noperands; i++)
3617 if (goal_alternative_earlyclobber[i])
3618 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3620 /* Now record reloads for all the operands that need them. */
3621 last_output_reload_regno = -1;
3622 for (i = 0; i < noperands; i++)
3623 if (! goal_alternative_win[i])
3625 /* Operands that match previous ones have already been handled. */
3626 if (goal_alternative_matches[i] >= 0)
3628 /* Handle an operand with a nonoffsettable address
3629 appearing where an offsettable address will do
3630 by reloading the address into a base register.
3632 ??? We can also do this when the operand is a register and
3633 reg_equiv_mem is not offsettable, but this is a bit tricky,
3634 so we don't bother with it. It may not be worth doing. */
3635 else if (goal_alternative_matched[i] == -1
3636 && goal_alternative_offmemok[i]
3637 && GET_CODE (recog_operand[i]) == MEM)
3639 operand_reloadnum[i]
3640 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3641 &XEXP (recog_operand[i], 0), NULL_PTR,
3642 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3643 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3644 reload_inc[operand_reloadnum[i]]
3645 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3647 /* If this operand is an output, we will have made any
3648 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3649 now we are treating part of the operand as an input, so
3650 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3652 if (modified[i] == RELOAD_WRITE)
3654 for (j = 0; j < n_reloads; j++)
3656 if (reload_opnum[j] == i)
3658 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3659 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3660 else if (reload_when_needed[j]
3661 == RELOAD_FOR_OUTADDR_ADDRESS)
3662 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3667 else if (goal_alternative_matched[i] == -1)
3669 operand_reloadnum[i]
3670 = push_reload ((modified[i] != RELOAD_WRITE
3671 ? recog_operand[i] : 0),
3672 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3673 (modified[i] != RELOAD_WRITE
3674 ? recog_operand_loc[i] : 0),
3675 (modified[i] != RELOAD_READ
3676 ? recog_operand_loc[i] : 0),
3677 (enum reg_class) goal_alternative[i],
3678 (modified[i] == RELOAD_WRITE
3679 ? VOIDmode : operand_mode[i]),
3680 (modified[i] == RELOAD_READ
3681 ? VOIDmode : operand_mode[i]),
3682 (insn_code_number < 0 ? 0
3683 : insn_operand_strict_low[insn_code_number][i]),
3684 0, i, operand_type[i]);
3685 if (modified[i] != RELOAD_READ
3686 && GET_CODE (recog_operand[i]) == REG)
3687 last_output_reload_regno = REGNO (recog_operand[i]);
3689 /* In a matching pair of operands, one must be input only
3690 and the other must be output only.
3691 Pass the input operand as IN and the other as OUT. */
3692 else if (modified[i] == RELOAD_READ
3693 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3695 operand_reloadnum[i]
3696 = push_reload (recog_operand[i],
3697 recog_operand[goal_alternative_matched[i]],
3698 recog_operand_loc[i],
3699 recog_operand_loc[goal_alternative_matched[i]],
3700 (enum reg_class) goal_alternative[i],
3702 operand_mode[goal_alternative_matched[i]],
3703 0, 0, i, RELOAD_OTHER);
3704 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3705 if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG)
3706 last_output_reload_regno
3707 = REGNO (recog_operand[goal_alternative_matched[i]]);
3709 else if (modified[i] == RELOAD_WRITE
3710 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3712 operand_reloadnum[goal_alternative_matched[i]]
3713 = push_reload (recog_operand[goal_alternative_matched[i]],
3715 recog_operand_loc[goal_alternative_matched[i]],
3716 recog_operand_loc[i],
3717 (enum reg_class) goal_alternative[i],
3718 operand_mode[goal_alternative_matched[i]],
3720 0, 0, i, RELOAD_OTHER);
3721 operand_reloadnum[i] = output_reloadnum;
3722 if (GET_CODE (recog_operand[i]) == REG)
3723 last_output_reload_regno = REGNO (recog_operand[i]);
3725 else if (insn_code_number >= 0)
3729 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3730 /* Avoid further trouble with this insn. */
3731 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3736 else if (goal_alternative_matched[i] < 0
3737 && goal_alternative_matches[i] < 0
3740 /* For each non-matching operand that's a MEM or a pseudo-register
3741 that didn't get a hard register, make an optional reload.
3742 This may get done even if the insn needs no reloads otherwise. */
3744 rtx operand = recog_operand[i];
3746 while (GET_CODE (operand) == SUBREG)
3747 operand = XEXP (operand, 0);
3748 if ((GET_CODE (operand) == MEM
3749 || (GET_CODE (operand) == REG
3750 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3751 && (enum reg_class) goal_alternative[i] != NO_REGS
3752 && ! no_input_reloads
3753 /* Optional output reloads don't do anything and we mustn't
3754 make in-out reloads on insns that are not permitted output
3756 && (modified[i] == RELOAD_READ
3757 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3758 operand_reloadnum[i]
3759 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3760 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3761 (modified[i] != RELOAD_WRITE
3762 ? recog_operand_loc[i] : 0),
3763 (modified[i] != RELOAD_READ
3764 ? recog_operand_loc[i] : 0),
3765 (enum reg_class) goal_alternative[i],
3766 (modified[i] == RELOAD_WRITE
3767 ? VOIDmode : operand_mode[i]),
3768 (modified[i] == RELOAD_READ
3769 ? VOIDmode : operand_mode[i]),
3770 (insn_code_number < 0 ? 0
3771 : insn_operand_strict_low[insn_code_number][i]),
3772 1, i, operand_type[i]);
3774 else if (goal_alternative_matches[i] >= 0
3775 && goal_alternative_win[goal_alternative_matches[i]]
3776 && modified[i] == RELOAD_READ
3777 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3778 && ! no_input_reloads && ! no_output_reloads
3781 /* Similarly, make an optional reload for a pair of matching
3782 objects that are in MEM or a pseudo that didn't get a hard reg. */
3784 rtx operand = recog_operand[i];
3786 while (GET_CODE (operand) == SUBREG)
3787 operand = XEXP (operand, 0);
3788 if ((GET_CODE (operand) == MEM
3789 || (GET_CODE (operand) == REG
3790 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3791 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3793 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3794 = push_reload (recog_operand[goal_alternative_matches[i]],
3796 recog_operand_loc[goal_alternative_matches[i]],
3797 recog_operand_loc[i],
3798 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3799 operand_mode[goal_alternative_matches[i]],
3801 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3804 /* If this insn pattern contains any MATCH_DUP's, make sure that
3805 they will be substituted if the operands they match are substituted.
3806 Also do now any substitutions we already did on the operands.
3808 Don't do this if we aren't making replacements because we might be
3809 propagating things allocated by frame pointer elimination into places
3810 it doesn't expect. */
3812 if (insn_code_number >= 0 && replace)
3813 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3815 int opno = recog_dup_num[i];
3816 *recog_dup_loc[i] = *recog_operand_loc[opno];
3817 if (operand_reloadnum[opno] >= 0)
3818 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3819 insn_operand_mode[insn_code_number][opno]);
3823 /* This loses because reloading of prior insns can invalidate the equivalence
3824 (or at least find_equiv_reg isn't smart enough to find it any more),
3825 causing this insn to need more reload regs than it needed before.
3826 It may be too late to make the reload regs available.
3827 Now this optimization is done safely in choose_reload_regs. */
3829 /* For each reload of a reg into some other class of reg,
3830 search for an existing equivalent reg (same value now) in the right class.
3831 We can use it as long as we don't need to change its contents. */
3832 for (i = 0; i < n_reloads; i++)
3833 if (reload_reg_rtx[i] == 0
3834 && reload_in[i] != 0
3835 && GET_CODE (reload_in[i]) == REG
3836 && reload_out[i] == 0)
3839 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3840 static_reload_reg_p, 0, reload_inmode[i]);
3841 /* Prevent generation of insn to load the value
3842 because the one we found already has the value. */
3843 if (reload_reg_rtx[i])
3844 reload_in[i] = reload_reg_rtx[i];
3848 /* Perhaps an output reload can be combined with another
3849 to reduce needs by one. */
3850 if (!goal_earlyclobber)
3853 /* If we have a pair of reloads for parts of an address, they are reloading
3854 the same object, the operands themselves were not reloaded, and they
3855 are for two operands that are supposed to match, merge the reloads and
3856 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3858 for (i = 0; i < n_reloads; i++)
3862 for (j = i + 1; j < n_reloads; j++)
3863 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3864 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3865 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3866 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3867 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3868 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3869 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3870 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3871 && rtx_equal_p (reload_in[i], reload_in[j])
3872 && (operand_reloadnum[reload_opnum[i]] < 0
3873 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3874 && (operand_reloadnum[reload_opnum[j]] < 0
3875 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3876 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3877 || (goal_alternative_matches[reload_opnum[j]]
3878 == reload_opnum[i])))
3880 for (k = 0; k < n_replacements; k++)
3881 if (replacements[k].what == j)
3882 replacements[k].what = i;
3884 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3885 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3886 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3888 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3893 /* Scan all the reloads and update their type.
3894 If a reload is for the address of an operand and we didn't reload
3895 that operand, change the type. Similarly, change the operand number
3896 of a reload when two operands match. If a reload is optional, treat it
3897 as though the operand isn't reloaded.
3899 ??? This latter case is somewhat odd because if we do the optional
3900 reload, it means the object is hanging around. Thus we need only
3901 do the address reload if the optional reload was NOT done.
3903 Change secondary reloads to be the address type of their operand, not
3906 If an operand's reload is now RELOAD_OTHER, change any
3907 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3908 RELOAD_FOR_OTHER_ADDRESS. */
3910 for (i = 0; i < n_reloads; i++)
3912 if (reload_secondary_p[i]
3913 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3914 reload_when_needed[i] = address_type[reload_opnum[i]];
3916 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3917 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3918 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3919 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3920 && (operand_reloadnum[reload_opnum[i]] < 0
3921 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3923 /* If we have a secondary reload to go along with this reload,
3924 change its type to RELOAD_FOR_OPADDR_ADDR. */
3926 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3927 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
3928 && reload_secondary_in_reload[i] != -1)
3930 int secondary_in_reload = reload_secondary_in_reload[i];
3932 reload_when_needed[secondary_in_reload]
3933 = RELOAD_FOR_OPADDR_ADDR;
3935 /* If there's a tertiary reload we have to change it also. */
3936 if (secondary_in_reload > 0
3937 && reload_secondary_in_reload[secondary_in_reload] != -1)
3938 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3939 = RELOAD_FOR_OPADDR_ADDR;
3942 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3943 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3944 && reload_secondary_out_reload[i] != -1)
3946 int secondary_out_reload = reload_secondary_out_reload[i];
3948 reload_when_needed[secondary_out_reload]
3949 = RELOAD_FOR_OPADDR_ADDR;
3951 /* If there's a tertiary reload we have to change it also. */
3952 if (secondary_out_reload
3953 && reload_secondary_out_reload[secondary_out_reload] != -1)
3954 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
3955 = RELOAD_FOR_OPADDR_ADDR;
3958 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3961 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3962 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
3963 && operand_reloadnum[reload_opnum[i]] >= 0
3964 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3966 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3968 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3969 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3972 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3973 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3974 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3976 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3977 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3978 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3979 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3980 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3981 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3982 This is complicated by the fact that a single operand can have more
3983 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3984 choose_reload_regs without affecting code quality, and cases that
3985 actually fail are extremely rare, so it turns out to be better to fix
3986 the problem here by not generating cases that choose_reload_regs will
3988 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
3989 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
3991 We can reduce the register pressure by exploiting that a
3992 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
3993 does not conflict with any of them, if it is only used for the first of
3994 the RELOAD_FOR_X_ADDRESS reloads. */
3996 int first_op_addr_num = -2;
3997 int first_inpaddr_num[MAX_RECOG_OPERANDS];
3998 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4000 /* We use last_op_addr_reload and the contents of the above arrays
4001 first as flags - -2 means no instance encountered, -1 means exactly
4002 one instance encountered.
4003 If more than one instance has been encountered, we store the reload
4004 number of the first reload of the kind in question; reload numbers
4005 are known to be non-negative. */
4006 for (i = 0; i < noperands; i++)
4007 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4008 for (i = n_reloads - 1; i >= 0; i--)
4010 switch (reload_when_needed[i])
4012 case RELOAD_FOR_OPERAND_ADDRESS:
4013 if (++first_op_addr_num >= 0)
4015 first_op_addr_num = i;
4019 case RELOAD_FOR_INPUT_ADDRESS:
4020 if (++first_inpaddr_num[reload_opnum[i]] >= 0)
4022 first_inpaddr_num[reload_opnum[i]] = i;
4026 case RELOAD_FOR_OUTPUT_ADDRESS:
4027 if (++first_outpaddr_num[reload_opnum[i]] >= 0)
4029 first_outpaddr_num[reload_opnum[i]] = i;
4040 for (i = 0; i < n_reloads; i++)
4042 int first_num, type;
4044 switch (reload_when_needed[i])
4046 case RELOAD_FOR_OPADDR_ADDR:
4047 first_num = first_op_addr_num;
4048 type = RELOAD_FOR_OPERAND_ADDRESS;
4050 case RELOAD_FOR_INPADDR_ADDRESS:
4051 first_num = first_inpaddr_num[reload_opnum[i]];
4052 type = RELOAD_FOR_INPUT_ADDRESS;
4054 case RELOAD_FOR_OUTADDR_ADDRESS:
4055 first_num = first_outpaddr_num[reload_opnum[i]];
4056 type = RELOAD_FOR_OUTPUT_ADDRESS;
4063 else if (i > first_num)
4064 reload_when_needed[i] = type;
4067 /* Check if the only TYPE reload that uses reload I is
4068 reload FIRST_NUM. */
4069 for (j = n_reloads - 1; j > first_num; j--)
4071 if (reload_when_needed[j] == type
4072 && reg_mentioned_p (reload_in[i], reload_in[j]))
4074 reload_when_needed[i] = type;
4083 /* See if we have any reloads that are now allowed to be merged
4084 because we've changed when the reload is needed to
4085 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4086 check for the most common cases. */
4088 for (i = 0; i < n_reloads; i++)
4089 if (reload_in[i] != 0 && reload_out[i] == 0
4090 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
4091 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
4092 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
4093 for (j = 0; j < n_reloads; j++)
4094 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
4095 && reload_when_needed[j] == reload_when_needed[i]
4096 && MATCHES (reload_in[i], reload_in[j])
4097 && reload_reg_class[i] == reload_reg_class[j]
4098 && !reload_nocombine[i] && !reload_nocombine[j]
4099 && reload_reg_rtx[i] == reload_reg_rtx[j])
4101 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
4102 transfer_replacements (i, j);
4106 /* Set which reloads must use registers not used in any group. Start
4107 with those that conflict with a group and then include ones that
4108 conflict with ones that are already known to conflict with a group. */
4111 for (i = 0; i < n_reloads; i++)
4113 enum machine_mode mode = reload_inmode[i];
4114 enum reg_class class = reload_reg_class[i];
4117 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4118 mode = reload_outmode[i];
4119 size = CLASS_MAX_NREGS (class, mode);
4122 for (j = 0; j < n_reloads; j++)
4123 if ((CLASS_MAX_NREGS (reload_reg_class[j],
4124 (GET_MODE_SIZE (reload_outmode[j])
4125 > GET_MODE_SIZE (reload_inmode[j]))
4126 ? reload_outmode[j] : reload_inmode[j])
4128 && !reload_optional[j]
4129 && (reload_in[j] != 0 || reload_out[j] != 0
4130 || reload_secondary_p[j])
4131 && reloads_conflict (i, j)
4132 && reg_classes_intersect_p (class, reload_reg_class[j]))
4134 reload_nongroup[i] = 1;
4144 for (i = 0; i < n_reloads; i++)
4146 enum machine_mode mode = reload_inmode[i];
4147 enum reg_class class = reload_reg_class[i];
4150 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4151 mode = reload_outmode[i];
4152 size = CLASS_MAX_NREGS (class, mode);
4154 if (! reload_nongroup[i] && size == 1)
4155 for (j = 0; j < n_reloads; j++)
4156 if (reload_nongroup[j]
4157 && reloads_conflict (i, j)
4158 && reg_classes_intersect_p (class, reload_reg_class[j]))
4160 reload_nongroup[i] = 1;
4167 #else /* no REGISTER_CONSTRAINTS */
4169 int insn_code_number;
4170 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
4172 rtx body = PATTERN (insn);
4176 n_earlyclobbers = 0;
4177 replace_reloads = replace;
4180 /* Find what kind of insn this is. NOPERANDS gets number of operands.
4181 Store the operand values in RECOG_OPERAND and the locations
4182 of the words in the insn that point to them in RECOG_OPERAND_LOC.
4183 Return if the insn needs no reload processing. */
4185 switch (GET_CODE (body))
4196 noperands = asm_noperands (body);
4199 /* This insn is an `asm' with operands.
4200 First, find out how many operands, and allocate space. */
4202 insn_code_number = -1;
4203 /* ??? This is a bug! ???
4204 Give up and delete this insn if it has too many operands. */
4205 if (noperands > MAX_RECOG_OPERANDS)
4208 /* Now get the operand values out of the insn. */
4210 decode_asm_operands (body, recog_operand, recog_operand_loc,
4211 NULL_PTR, NULL_PTR);
4216 /* Ordinary insn: recognize it, allocate space for operands and
4217 constraints, and get them out via insn_extract. */
4219 insn_code_number = recog_memoized (insn);
4220 noperands = insn_n_operands[insn_code_number];
4221 insn_extract (insn);
4227 for (i = 0; i < noperands; i++)
4229 register RTX_CODE code = GET_CODE (recog_operand[i]);
4230 int is_set_dest = GET_CODE (body) == SET && (i == 0);
4232 if (insn_code_number >= 0)
4233 if (insn_operand_address_p[insn_code_number][i])
4234 find_reloads_address (VOIDmode, NULL_PTR,
4235 recog_operand[i], recog_operand_loc[i],
4236 i, RELOAD_FOR_INPUT, ind_levels, insn);
4238 /* In these cases, we can't tell if the operand is an input
4239 or an output, so be conservative. In practice it won't be
4243 find_reloads_address (GET_MODE (recog_operand[i]),
4244 recog_operand_loc[i],
4245 XEXP (recog_operand[i], 0),
4246 &XEXP (recog_operand[i], 0),
4247 i, RELOAD_OTHER, ind_levels, insn);
4249 recog_operand[i] = *recog_operand_loc[i]
4250 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
4251 ind_levels, is_set_dest);
4254 register int regno = REGNO (recog_operand[i]);
4255 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4256 recog_operand[i] = *recog_operand_loc[i]
4257 = reg_equiv_constant[regno];
4258 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4259 that feeds this insn. */
4260 if (reg_equiv_mem[regno] != 0)
4261 recog_operand[i] = *recog_operand_loc[i]
4262 = reg_equiv_mem[regno];
4267 /* Perhaps an output reload can be combined with another
4268 to reduce needs by one. */
4269 if (!goal_earlyclobber)
4271 #endif /* no REGISTER_CONSTRAINTS */
4274 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4275 accepts a memory operand with constant address. */
4278 alternative_allows_memconst (constraint, altnum)
4283 /* Skip alternatives before the one requested. */
4286 while (*constraint++ != ',');
4289 /* Scan the requested alternative for 'm' or 'o'.
4290 If one of them is present, this alternative accepts memory constants. */
4291 while ((c = *constraint++) && c != ',' && c != '#')
4292 if (c == 'm' || c == 'o')
4297 /* Scan X for memory references and scan the addresses for reloading.
4298 Also checks for references to "constant" regs that we want to eliminate
4299 and replaces them with the values they stand for.
4300 We may alter X destructively if it contains a reference to such.
4301 If X is just a constant reg, we return the equivalent value
4304 IND_LEVELS says how many levels of indirect addressing this machine
4307 OPNUM and TYPE identify the purpose of the reload.
4309 IS_SET_DEST is true if X is the destination of a SET, which is not
4310 appropriate to be replaced by a constant. */
4313 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
4316 enum reload_type type;
4320 register RTX_CODE code = GET_CODE (x);
4322 register char *fmt = GET_RTX_FORMAT (code);
4327 /* This code is duplicated for speed in find_reloads. */
4328 register int regno = REGNO (x);
4329 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4330 x = reg_equiv_constant[regno];
4332 /* This creates (subreg (mem...)) which would cause an unnecessary
4333 reload of the mem. */
4334 else if (reg_equiv_mem[regno] != 0)
4335 x = reg_equiv_mem[regno];
4337 else if (reg_equiv_address[regno] != 0)
4339 /* If reg_equiv_address varies, it may be shared, so copy it. */
4340 /* We must rerun eliminate_regs, in case the elimination
4341 offsets have changed. */
4342 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4346 if (rtx_varies_p (addr))
4347 addr = copy_rtx (addr);
4349 x = gen_rtx_MEM (GET_MODE (x), addr);
4350 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4351 find_reloads_address (GET_MODE (x), NULL_PTR,
4353 &XEXP (x, 0), opnum, type, ind_levels, 0);
4360 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4361 opnum, type, ind_levels, 0);
4365 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4367 /* Check for SUBREG containing a REG that's equivalent to a constant.
4368 If the constant has a known value, truncate it right now.
4369 Similarly if we are extracting a single-word of a multi-word
4370 constant. If the constant is symbolic, allow it to be substituted
4371 normally. push_reload will strip the subreg later. If the
4372 constant is VOIDmode, abort because we will lose the mode of
4373 the register (this should never happen because one of the cases
4374 above should handle it). */
4376 register int regno = REGNO (SUBREG_REG (x));
4379 if (subreg_lowpart_p (x)
4380 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4381 && reg_equiv_constant[regno] != 0
4382 && (tem = gen_lowpart_common (GET_MODE (x),
4383 reg_equiv_constant[regno])) != 0)
4386 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4387 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4388 && reg_equiv_constant[regno] != 0
4389 && (tem = operand_subword (reg_equiv_constant[regno],
4391 GET_MODE (SUBREG_REG (x)))) != 0)
4393 /* TEM is now a word sized constant for the bits from X that
4394 we wanted. However, TEM may be the wrong representation.
4396 Use gen_lowpart_common to convert a CONST_INT into a
4397 CONST_DOUBLE and vice versa as needed according to by the mode
4399 tem = gen_lowpart_common (GET_MODE (x), tem);
4405 /* If the SUBREG is wider than a word, the above test will fail.
4406 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4407 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4408 a 32 bit target. We still can - and have to - handle this
4409 for non-paradoxical subregs of CONST_INTs. */
4410 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4411 && reg_equiv_constant[regno] != 0
4412 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4413 && (GET_MODE_SIZE (GET_MODE (x))
4414 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4416 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4417 if (WORDS_BIG_ENDIAN)
4418 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4419 - GET_MODE_BITSIZE (GET_MODE (x))
4421 /* Here we use the knowledge that CONST_INTs have a
4422 HOST_WIDE_INT field. */
4423 if (shift >= HOST_BITS_PER_WIDE_INT)
4424 shift = HOST_BITS_PER_WIDE_INT - 1;
4425 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4428 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4429 && reg_equiv_constant[regno] != 0
4430 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4433 /* If the subreg contains a reg that will be converted to a mem,
4434 convert the subreg to a narrower memref now.
4435 Otherwise, we would get (subreg (mem ...) ...),
4436 which would force reload of the mem.
4438 We also need to do this if there is an equivalent MEM that is
4439 not offsettable. In that case, alter_subreg would produce an
4440 invalid address on big-endian machines.
4442 For machines that extend byte loads, we must not reload using
4443 a wider mode if we have a paradoxical SUBREG. find_reloads will
4444 force a reload in that case. So we should not do anything here. */
4446 else if (regno >= FIRST_PSEUDO_REGISTER
4447 #ifdef LOAD_EXTEND_OP
4448 && (GET_MODE_SIZE (GET_MODE (x))
4449 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4451 && (reg_equiv_address[regno] != 0
4452 || (reg_equiv_mem[regno] != 0
4453 && (! strict_memory_address_p (GET_MODE (x),
4454 XEXP (reg_equiv_mem[regno], 0))
4455 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
4457 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
4458 /* We must rerun eliminate_regs, in case the elimination
4459 offsets have changed. */
4460 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4463 if (BYTES_BIG_ENDIAN)
4466 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
4467 offset += MIN (size, UNITS_PER_WORD);
4468 size = GET_MODE_SIZE (GET_MODE (x));
4469 offset -= MIN (size, UNITS_PER_WORD);
4471 addr = plus_constant (addr, offset);
4472 x = gen_rtx_MEM (GET_MODE (x), addr);
4473 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4474 find_reloads_address (GET_MODE (x), NULL_PTR,
4476 &XEXP (x, 0), opnum, type, ind_levels, 0);
4481 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4484 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
4485 ind_levels, is_set_dest);
4490 /* Return a mem ref for the memory equivalent of reg REGNO.
4491 This mem ref is not shared with anything. */
4494 make_memloc (ad, regno)
4501 /* We must rerun eliminate_regs, in case the elimination
4502 offsets have changed. */
4503 rtx tem = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4505 #if 0 /* We cannot safely reuse a memloc made here;
4506 if the pseudo appears twice, and its mem needs a reload,
4507 it gets two separate reloads assigned, but it only
4508 gets substituted with the second of them;
4509 then it can get used before that reload reg gets loaded up. */
4510 for (i = 0; i < n_memlocs; i++)
4511 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
4515 /* If TEM might contain a pseudo, we must copy it to avoid
4516 modifying it when we do the substitution for the reload. */
4517 if (rtx_varies_p (tem))
4518 tem = copy_rtx (tem);
4520 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4521 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4522 memlocs[n_memlocs++] = tem;
4526 /* Record all reloads needed for handling memory address AD
4527 which appears in *LOC in a memory reference to mode MODE
4528 which itself is found in location *MEMREFLOC.
4529 Note that we take shortcuts assuming that no multi-reg machine mode
4530 occurs as part of an address.
4532 OPNUM and TYPE specify the purpose of this reload.
4534 IND_LEVELS says how many levels of indirect addressing this machine
4537 INSN, if nonzero, is the insn in which we do the reload. It is used
4538 to determine if we may generate output reloads.
4540 Value is nonzero if this address is reloaded or replaced as a whole.
4541 This is interesting to the caller if the address is an autoincrement.
4543 Note that there is no verification that the address will be valid after
4544 this routine does its work. Instead, we rely on the fact that the address
4545 was valid when reload started. So we need only undo things that reload
4546 could have broken. These are wrong register types, pseudos not allocated
4547 to a hard register, and frame pointer elimination. */
4550 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4551 enum machine_mode mode;
4556 enum reload_type type;
4563 /* If the address is a register, see if it is a legitimate address and
4564 reload if not. We first handle the cases where we need not reload
4565 or where we must reload in a non-standard way. */
4567 if (GET_CODE (ad) == REG)
4571 if (reg_equiv_constant[regno] != 0
4572 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4574 *loc = ad = reg_equiv_constant[regno];
4578 else if (reg_equiv_address[regno] != 0)
4580 tem = make_memloc (ad, regno);
4581 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4582 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4584 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4585 reload_address_base_reg_class,
4586 GET_MODE (ad), VOIDmode, 0, 0,
4591 /* We can avoid a reload if the register's equivalent memory expression
4592 is valid as an indirect memory address.
4593 But not all addresses are valid in a mem used as an indirect address:
4594 only reg or reg+constant. */
4596 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
4597 && strict_memory_address_p (mode, reg_equiv_mem[regno])
4598 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
4599 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
4600 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
4601 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
4604 /* The only remaining case where we can avoid a reload is if this is a
4605 hard register that is valid as a base register and which is not the
4606 subject of a CLOBBER in this insn. */
4608 else if (regno < FIRST_PSEUDO_REGISTER
4609 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4610 && ! regno_clobbered_p (regno, this_insn))
4613 /* If we do not have one of the cases above, we must do the reload. */
4614 push_reload (ad, NULL_RTX, loc, NULL_PTR, reload_address_base_reg_class,
4615 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4619 if (strict_memory_address_p (mode, ad))
4621 /* The address appears valid, so reloads are not needed.
4622 But the address may contain an eliminable register.
4623 This can happen because a machine with indirect addressing
4624 may consider a pseudo register by itself a valid address even when
4625 it has failed to get a hard reg.
4626 So do a tree-walk to find and eliminate all such regs. */
4628 /* But first quickly dispose of a common case. */
4629 if (GET_CODE (ad) == PLUS
4630 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4631 && GET_CODE (XEXP (ad, 0)) == REG
4632 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4635 subst_reg_equivs_changed = 0;
4636 *loc = subst_reg_equivs (ad);
4638 if (! subst_reg_equivs_changed)
4641 /* Check result for validity after substitution. */
4642 if (strict_memory_address_p (mode, ad))
4646 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4651 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4656 *memrefloc = copy_rtx (*memrefloc);
4657 XEXP (*memrefloc, 0) = ad;
4658 move_replacements (&ad, &XEXP (*memrefloc, 0));
4664 /* The address is not valid. We have to figure out why. One possibility
4665 is that it is itself a MEM. This can happen when the frame pointer is
4666 being eliminated, a pseudo is not allocated to a hard register, and the
4667 offset between the frame and stack pointers is not its initial value.
4668 In that case the pseudo will have been replaced by a MEM referring to
4669 the stack pointer. */
4670 if (GET_CODE (ad) == MEM)
4672 /* First ensure that the address in this MEM is valid. Then, unless
4673 indirect addresses are valid, reload the MEM into a register. */
4675 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4676 opnum, ADDR_TYPE (type),
4677 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4679 /* If tem was changed, then we must create a new memory reference to
4680 hold it and store it back into memrefloc. */
4681 if (tem != ad && memrefloc)
4683 *memrefloc = copy_rtx (*memrefloc);
4684 copy_replacements (tem, XEXP (*memrefloc, 0));
4685 loc = &XEXP (*memrefloc, 0);
4688 /* Check similar cases as for indirect addresses as above except
4689 that we can allow pseudos and a MEM since they should have been
4690 taken care of above. */
4693 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4694 || GET_CODE (XEXP (tem, 0)) == MEM
4695 || ! (GET_CODE (XEXP (tem, 0)) == REG
4696 || (GET_CODE (XEXP (tem, 0)) == PLUS
4697 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4698 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4700 /* Must use TEM here, not AD, since it is the one that will
4701 have any subexpressions reloaded, if needed. */
4702 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4703 reload_address_base_reg_class, GET_MODE (tem),
4712 /* If we have address of a stack slot but it's not valid because the
4713 displacement is too large, compute the sum in a register.
4714 Handle all base registers here, not just fp/ap/sp, because on some
4715 targets (namely SH) we can also get too large displacements from
4716 big-endian corrections. */
4717 else if (GET_CODE (ad) == PLUS
4718 && GET_CODE (XEXP (ad, 0)) == REG
4719 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4720 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4721 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4723 /* Unshare the MEM rtx so we can safely alter it. */
4726 *memrefloc = copy_rtx (*memrefloc);
4727 loc = &XEXP (*memrefloc, 0);
4729 if (double_reg_address_ok)
4731 /* Unshare the sum as well. */
4732 *loc = ad = copy_rtx (ad);
4733 /* Reload the displacement into an index reg.
4734 We assume the frame pointer or arg pointer is a base reg. */
4735 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4736 reload_address_index_reg_class,
4737 GET_MODE (ad), opnum, type, ind_levels);
4741 /* If the sum of two regs is not necessarily valid,
4742 reload the sum into a base reg.
4743 That will at least work. */
4744 find_reloads_address_part (ad, loc, reload_address_base_reg_class,
4745 Pmode, opnum, type, ind_levels);
4750 /* If we have an indexed stack slot, there are three possible reasons why
4751 it might be invalid: The index might need to be reloaded, the address
4752 might have been made by frame pointer elimination and hence have a
4753 constant out of range, or both reasons might apply.
4755 We can easily check for an index needing reload, but even if that is the
4756 case, we might also have an invalid constant. To avoid making the
4757 conservative assumption and requiring two reloads, we see if this address
4758 is valid when not interpreted strictly. If it is, the only problem is
4759 that the index needs a reload and find_reloads_address_1 will take care
4762 There is still a case when we might generate an extra reload,
4763 however. In certain cases eliminate_regs will return a MEM for a REG
4764 (see the code there for details). In those cases, memory_address_p
4765 applied to our address will return 0 so we will think that our offset
4766 must be too large. But it might indeed be valid and the only problem
4767 is that a MEM is present where a REG should be. This case should be
4768 very rare and there doesn't seem to be any way to avoid it.
4770 If we decide to do something here, it must be that
4771 `double_reg_address_ok' is true and that this address rtl was made by
4772 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4773 rework the sum so that the reload register will be added to the index.
4774 This is safe because we know the address isn't shared.
4776 We check for fp/ap/sp as both the first and second operand of the
4779 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4780 && GET_CODE (XEXP (ad, 0)) == PLUS
4781 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4782 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4783 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4785 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4786 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4788 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4789 && ! memory_address_p (mode, ad))
4791 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4792 plus_constant (XEXP (XEXP (ad, 0), 0),
4793 INTVAL (XEXP (ad, 1))),
4794 XEXP (XEXP (ad, 0), 1));
4795 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4796 reload_address_base_reg_class,
4797 GET_MODE (ad), opnum, type, ind_levels);
4798 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4804 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4805 && GET_CODE (XEXP (ad, 0)) == PLUS
4806 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4807 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4808 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4810 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4811 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4813 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4814 && ! memory_address_p (mode, ad))
4816 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4817 XEXP (XEXP (ad, 0), 0),
4818 plus_constant (XEXP (XEXP (ad, 0), 1),
4819 INTVAL (XEXP (ad, 1))));
4820 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4821 reload_address_base_reg_class,
4822 GET_MODE (ad), opnum, type, ind_levels);
4823 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4829 /* See if address becomes valid when an eliminable register
4830 in a sum is replaced. */
4833 if (GET_CODE (ad) == PLUS)
4834 tem = subst_indexed_address (ad);
4835 if (tem != ad && strict_memory_address_p (mode, tem))
4837 /* Ok, we win that way. Replace any additional eliminable
4840 subst_reg_equivs_changed = 0;
4841 tem = subst_reg_equivs (tem);
4843 /* Make sure that didn't make the address invalid again. */
4845 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4852 /* If constants aren't valid addresses, reload the constant address
4854 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4856 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4857 Unshare it so we can safely alter it. */
4858 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4859 && CONSTANT_POOL_ADDRESS_P (ad))
4861 *memrefloc = copy_rtx (*memrefloc);
4862 loc = &XEXP (*memrefloc, 0);
4865 find_reloads_address_part (ad, loc, reload_address_base_reg_class,
4871 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4875 /* Find all pseudo regs appearing in AD
4876 that are eliminable in favor of equivalent values
4877 and do not have hard regs; replace them by their equivalents. */
4880 subst_reg_equivs (ad)
4883 register RTX_CODE code = GET_CODE (ad);
4901 register int regno = REGNO (ad);
4903 if (reg_equiv_constant[regno] != 0)
4905 subst_reg_equivs_changed = 1;
4906 return reg_equiv_constant[regno];
4912 /* Quickly dispose of a common case. */
4913 if (XEXP (ad, 0) == frame_pointer_rtx
4914 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4922 fmt = GET_RTX_FORMAT (code);
4923 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4925 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4929 /* Compute the sum of X and Y, making canonicalizations assumed in an
4930 address, namely: sum constant integers, surround the sum of two
4931 constants with a CONST, put the constant as the second operand, and
4932 group the constant on the outermost sum.
4934 This routine assumes both inputs are already in canonical form. */
4941 enum machine_mode mode = GET_MODE (x);
4943 if (mode == VOIDmode)
4944 mode = GET_MODE (y);
4946 if (mode == VOIDmode)
4949 if (GET_CODE (x) == CONST_INT)
4950 return plus_constant (y, INTVAL (x));
4951 else if (GET_CODE (y) == CONST_INT)
4952 return plus_constant (x, INTVAL (y));
4953 else if (CONSTANT_P (x))
4954 tem = x, x = y, y = tem;
4956 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4957 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4959 /* Note that if the operands of Y are specified in the opposite
4960 order in the recursive calls below, infinite recursion will occur. */
4961 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4962 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4964 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4965 constant will have been placed second. */
4966 if (CONSTANT_P (x) && CONSTANT_P (y))
4968 if (GET_CODE (x) == CONST)
4970 if (GET_CODE (y) == CONST)
4973 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
4976 return gen_rtx_PLUS (mode, x, y);
4979 /* If ADDR is a sum containing a pseudo register that should be
4980 replaced with a constant (from reg_equiv_constant),
4981 return the result of doing so, and also apply the associative
4982 law so that the result is more likely to be a valid address.
4983 (But it is not guaranteed to be one.)
4985 Note that at most one register is replaced, even if more are
4986 replaceable. Also, we try to put the result into a canonical form
4987 so it is more likely to be a valid address.
4989 In all other cases, return ADDR. */
4992 subst_indexed_address (addr)
4995 rtx op0 = 0, op1 = 0, op2 = 0;
4999 if (GET_CODE (addr) == PLUS)
5001 /* Try to find a register to replace. */
5002 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5003 if (GET_CODE (op0) == REG
5004 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5005 && reg_renumber[regno] < 0
5006 && reg_equiv_constant[regno] != 0)
5007 op0 = reg_equiv_constant[regno];
5008 else if (GET_CODE (op1) == REG
5009 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5010 && reg_renumber[regno] < 0
5011 && reg_equiv_constant[regno] != 0)
5012 op1 = reg_equiv_constant[regno];
5013 else if (GET_CODE (op0) == PLUS
5014 && (tem = subst_indexed_address (op0)) != op0)
5016 else if (GET_CODE (op1) == PLUS
5017 && (tem = subst_indexed_address (op1)) != op1)
5022 /* Pick out up to three things to add. */
5023 if (GET_CODE (op1) == PLUS)
5024 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5025 else if (GET_CODE (op0) == PLUS)
5026 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5028 /* Compute the sum. */
5030 op1 = form_sum (op1, op2);
5032 op0 = form_sum (op0, op1);
5039 /* Record the pseudo registers we must reload into hard registers in a
5040 subexpression of a would-be memory address, X referring to a value
5041 in mode MODE. (This function is not called if the address we find
5044 CONTEXT = 1 means we are considering regs as index regs,
5045 = 0 means we are considering them as base regs.
5047 OPNUM and TYPE specify the purpose of any reloads made.
5049 IND_LEVELS says how many levels of indirect addressing are
5050 supported at this point in the address.
5052 INSN, if nonzero, is the insn in which we do the reload. It is used
5053 to determine if we may generate output reloads.
5055 We return nonzero if X, as a whole, is reloaded or replaced. */
5057 /* Note that we take shortcuts assuming that no multi-reg machine mode
5058 occurs as part of an address.
5059 Also, this is not fully machine-customizable; it works for machines
5060 such as vaxes and 68000's and 32000's, but other possible machines
5061 could have addressing modes that this does not handle right. */
5064 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5065 enum machine_mode mode;
5070 enum reload_type type;
5074 register RTX_CODE code = GET_CODE (x);
5080 register rtx orig_op0 = XEXP (x, 0);
5081 register rtx orig_op1 = XEXP (x, 1);
5082 register RTX_CODE code0 = GET_CODE (orig_op0);
5083 register RTX_CODE code1 = GET_CODE (orig_op1);
5084 register rtx op0 = orig_op0;
5085 register rtx op1 = orig_op1;
5087 if (GET_CODE (op0) == SUBREG)
5089 op0 = SUBREG_REG (op0);
5090 code0 = GET_CODE (op0);
5091 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5092 op0 = gen_rtx_REG (word_mode,
5093 REGNO (op0) + SUBREG_WORD (orig_op0));
5096 if (GET_CODE (op1) == SUBREG)
5098 op1 = SUBREG_REG (op1);
5099 code1 = GET_CODE (op1);
5100 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5101 op1 = gen_rtx_REG (GET_MODE (op1),
5102 REGNO (op1) + SUBREG_WORD (orig_op1));
5105 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5106 || code0 == ZERO_EXTEND || code1 == MEM)
5108 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5109 type, ind_levels, insn);
5110 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5111 type, ind_levels, insn);
5114 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5115 || code1 == ZERO_EXTEND || code0 == MEM)
5117 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5118 type, ind_levels, insn);
5119 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5120 type, ind_levels, insn);
5123 else if (code0 == CONST_INT || code0 == CONST
5124 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5125 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5126 type, ind_levels, insn);
5128 else if (code1 == CONST_INT || code1 == CONST
5129 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5130 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5131 type, ind_levels, insn);
5133 else if (code0 == REG && code1 == REG)
5135 if (REG_OK_FOR_INDEX_P (op0)
5136 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5138 else if (REG_OK_FOR_INDEX_P (op1)
5139 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5141 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5142 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5143 type, ind_levels, insn);
5144 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5145 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5146 type, ind_levels, insn);
5147 else if (REG_OK_FOR_INDEX_P (op1))
5148 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5149 type, ind_levels, insn);
5150 else if (REG_OK_FOR_INDEX_P (op0))
5151 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5152 type, ind_levels, insn);
5155 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5156 type, ind_levels, insn);
5157 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5158 type, ind_levels, insn);
5162 else if (code0 == REG)
5164 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5165 type, ind_levels, insn);
5166 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5167 type, ind_levels, insn);
5170 else if (code1 == REG)
5172 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5173 type, ind_levels, insn);
5174 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5175 type, ind_levels, insn);
5185 if (GET_CODE (XEXP (x, 0)) == REG)
5187 register int regno = REGNO (XEXP (x, 0));
5191 /* A register that is incremented cannot be constant! */
5192 if (regno >= FIRST_PSEUDO_REGISTER
5193 && reg_equiv_constant[regno] != 0)
5196 /* Handle a register that is equivalent to a memory location
5197 which cannot be addressed directly. */
5198 if (reg_equiv_address[regno] != 0)
5200 rtx tem = make_memloc (XEXP (x, 0), regno);
5201 /* First reload the memory location's address.
5202 We can't use ADDR_TYPE (type) here, because we need to
5203 write back the value after reading it, hence we actually
5204 need two registers. */
5205 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
5206 &XEXP (tem, 0), opnum, type,
5208 /* Put this inside a new increment-expression. */
5209 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5210 /* Proceed to reload that, as if it contained a register. */
5213 /* If we have a hard register that is ok as an index,
5214 don't make a reload. If an autoincrement of a nice register
5215 isn't "valid", it must be that no autoincrement is "valid".
5216 If that is true and something made an autoincrement anyway,
5217 this must be a special context where one is allowed.
5218 (For example, a "push" instruction.)
5219 We can't improve this address, so leave it alone. */
5221 /* Otherwise, reload the autoincrement into a suitable hard reg
5222 and record how much to increment by. */
5224 if (reg_renumber[regno] >= 0)
5225 regno = reg_renumber[regno];
5226 if ((regno >= FIRST_PSEUDO_REGISTER
5227 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5228 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5235 /* If we can output the register afterwards, do so, this
5236 saves the extra update.
5237 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5238 CALL_INSN - and it does not set CC0.
5239 But don't do this if we cannot directly address the
5240 memory location, since this will make it harder to
5241 reuse address reloads, and increases register pressure.
5242 Also don't do this if we can probably update x directly. */
5243 rtx equiv = reg_equiv_mem[regno];
5244 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5245 if (insn && GET_CODE (insn) == INSN && equiv
5247 && ! sets_cc0_p (PATTERN (insn))
5249 && ! (icode != CODE_FOR_nothing
5250 && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
5251 && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
5256 = push_reload (x, x, loc, loc,
5258 ? reload_address_index_reg_class
5259 : reload_address_base_reg_class),
5260 GET_MODE (x), GET_MODE (x), 0, 0,
5261 opnum, RELOAD_OTHER);
5266 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5268 ? reload_address_index_reg_class
5269 : reload_address_base_reg_class),
5270 GET_MODE (x), GET_MODE (x), 0, 0,
5272 reload_inc[reloadnum]
5273 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5279 /* Update the REG_INC notes. */
5281 for (link = REG_NOTES (this_insn);
5282 link; link = XEXP (link, 1))
5283 if (REG_NOTE_KIND (link) == REG_INC
5284 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5285 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5291 else if (GET_CODE (XEXP (x, 0)) == MEM)
5293 /* This is probably the result of a substitution, by eliminate_regs,
5294 of an equivalent address for a pseudo that was not allocated to a
5295 hard register. Verify that the specified address is valid and
5296 reload it into a register. */
5297 rtx tem = XEXP (x, 0);
5301 /* Since we know we are going to reload this item, don't decrement
5302 for the indirection level.
5304 Note that this is actually conservative: it would be slightly
5305 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5307 /* We can't use ADDR_TYPE (type) here, because we need to
5308 write back the value after reading it, hence we actually
5309 need two registers. */
5310 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5311 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5312 opnum, type, ind_levels, insn);
5314 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5316 ? reload_address_index_reg_class
5317 : reload_address_base_reg_class),
5318 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5319 reload_inc[reloadnum]
5320 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5322 link = FIND_REG_INC_NOTE (this_insn, tem);
5324 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5331 /* This is probably the result of a substitution, by eliminate_regs, of
5332 an equivalent address for a pseudo that was not allocated to a hard
5333 register. Verify that the specified address is valid and reload it
5336 Since we know we are going to reload this item, don't decrement for
5337 the indirection level.
5339 Note that this is actually conservative: it would be slightly more
5340 efficient to use the value of SPILL_INDIRECT_LEVELS from
5343 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5344 opnum, ADDR_TYPE (type), ind_levels, insn);
5345 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5346 (context ? reload_address_index_reg_class
5347 : reload_address_base_reg_class),
5348 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5353 register int regno = REGNO (x);
5355 if (reg_equiv_constant[regno] != 0)
5357 find_reloads_address_part (reg_equiv_constant[regno], loc,
5359 ? reload_address_index_reg_class
5360 : reload_address_base_reg_class),
5361 GET_MODE (x), opnum, type, ind_levels);
5365 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5366 that feeds this insn. */
5367 if (reg_equiv_mem[regno] != 0)
5369 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5371 ? reload_address_index_reg_class
5372 : reload_address_base_reg_class),
5373 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5378 if (reg_equiv_address[regno] != 0)
5380 x = make_memloc (x, regno);
5381 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
5382 opnum, ADDR_TYPE (type), ind_levels, insn);
5385 if (reg_renumber[regno] >= 0)
5386 regno = reg_renumber[regno];
5388 if ((regno >= FIRST_PSEUDO_REGISTER
5389 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5390 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5392 push_reload (x, NULL_RTX, loc, NULL_PTR,
5394 ? reload_address_index_reg_class
5395 : reload_address_base_reg_class),
5396 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5400 /* If a register appearing in an address is the subject of a CLOBBER
5401 in this insn, reload it into some other register to be safe.
5402 The CLOBBER is supposed to make the register unavailable
5403 from before this insn to after it. */
5404 if (regno_clobbered_p (regno, this_insn))
5406 push_reload (x, NULL_RTX, loc, NULL_PTR,
5408 ? reload_address_index_reg_class
5409 : reload_address_base_reg_class),
5410 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5417 if (GET_CODE (SUBREG_REG (x)) == REG)
5419 /* If this is a SUBREG of a hard register and the resulting register
5420 is of the wrong class, reload the whole SUBREG. This avoids
5421 needless copies if SUBREG_REG is multi-word. */
5422 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5424 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5426 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5427 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5429 push_reload (x, NULL_RTX, loc, NULL_PTR,
5431 ? reload_address_index_reg_class
5432 : reload_address_base_reg_class),
5433 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5437 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5438 is larger than the class size, then reload the whole SUBREG. */
5441 enum reg_class class = (context
5442 ? reload_address_index_reg_class
5443 : reload_address_base_reg_class);
5444 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5445 > reg_class_size[class])
5447 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5448 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5460 register char *fmt = GET_RTX_FORMAT (code);
5463 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5466 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5467 opnum, type, ind_levels, insn);
5474 /* X, which is found at *LOC, is a part of an address that needs to be
5475 reloaded into a register of class CLASS. If X is a constant, or if
5476 X is a PLUS that contains a constant, check that the constant is a
5477 legitimate operand and that we are supposed to be able to load
5478 it into the register.
5480 If not, force the constant into memory and reload the MEM instead.
5482 MODE is the mode to use, in case X is an integer constant.
5484 OPNUM and TYPE describe the purpose of any reloads made.
5486 IND_LEVELS says how many levels of indirect addressing this machine
5490 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5493 enum reg_class class;
5494 enum machine_mode mode;
5496 enum reload_type type;
5500 && (! LEGITIMATE_CONSTANT_P (x)
5501 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5503 rtx tem = x = force_const_mem (mode, x);
5504 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5505 opnum, type, ind_levels, 0);
5508 else if (GET_CODE (x) == PLUS
5509 && CONSTANT_P (XEXP (x, 1))
5510 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5511 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5513 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5515 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5516 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5517 opnum, type, ind_levels, 0);
5520 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5521 mode, VOIDmode, 0, 0, opnum, type);
5524 /* Substitute into the current INSN the registers into which we have reloaded
5525 the things that need reloading. The array `replacements'
5526 says contains the locations of all pointers that must be changed
5527 and says what to replace them with.
5529 Return the rtx that X translates into; usually X, but modified. */
5536 for (i = 0; i < n_replacements; i++)
5538 register struct replacement *r = &replacements[i];
5539 register rtx reloadreg = reload_reg_rtx[r->what];
5542 /* Encapsulate RELOADREG so its machine mode matches what
5543 used to be there. Note that gen_lowpart_common will
5544 do the wrong thing if RELOADREG is multi-word. RELOADREG
5545 will always be a REG here. */
5546 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5547 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5549 /* If we are putting this into a SUBREG and RELOADREG is a
5550 SUBREG, we would be making nested SUBREGs, so we have to fix
5551 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5553 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5555 if (GET_MODE (*r->subreg_loc)
5556 == GET_MODE (SUBREG_REG (reloadreg)))
5557 *r->subreg_loc = SUBREG_REG (reloadreg);
5560 *r->where = SUBREG_REG (reloadreg);
5561 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5565 *r->where = reloadreg;
5567 /* If reload got no reg and isn't optional, something's wrong. */
5568 else if (! reload_optional[r->what])
5573 /* Make a copy of any replacements being done into X and move those copies
5574 to locations in Y, a copy of X. We only look at the highest level of
5578 copy_replacements (x, y)
5583 enum rtx_code code = GET_CODE (x);
5584 char *fmt = GET_RTX_FORMAT (code);
5585 struct replacement *r;
5587 /* We can't support X being a SUBREG because we might then need to know its
5588 location if something inside it was replaced. */
5592 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5594 for (j = 0; j < n_replacements; j++)
5596 if (replacements[j].subreg_loc == &XEXP (x, i))
5598 r = &replacements[n_replacements++];
5599 r->where = replacements[j].where;
5600 r->subreg_loc = &XEXP (y, i);
5601 r->what = replacements[j].what;
5602 r->mode = replacements[j].mode;
5604 else if (replacements[j].where == &XEXP (x, i))
5606 r = &replacements[n_replacements++];
5607 r->where = &XEXP (y, i);
5609 r->what = replacements[j].what;
5610 r->mode = replacements[j].mode;
5615 /* Change any replacements being done to *X to be done to *Y */
5618 move_replacements (x, y)
5624 for (i = 0; i < n_replacements; i++)
5625 if (replacements[i].subreg_loc == x)
5626 replacements[i].subreg_loc = y;
5627 else if (replacements[i].where == x)
5629 replacements[i].where = y;
5630 replacements[i].subreg_loc = 0;
5634 /* If LOC was scheduled to be replaced by something, return the replacement.
5635 Otherwise, return *LOC. */
5638 find_replacement (loc)
5641 struct replacement *r;
5643 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5645 rtx reloadreg = reload_reg_rtx[r->what];
5647 if (reloadreg && r->where == loc)
5649 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5650 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5654 else if (reloadreg && r->subreg_loc == loc)
5656 /* RELOADREG must be either a REG or a SUBREG.
5658 ??? Is it actually still ever a SUBREG? If so, why? */
5660 if (GET_CODE (reloadreg) == REG)
5661 return gen_rtx_REG (GET_MODE (*loc),
5662 REGNO (reloadreg) + SUBREG_WORD (*loc));
5663 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5666 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5667 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5671 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5672 what's inside and make a new rtl if so. */
5673 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5674 || GET_CODE (*loc) == MULT)
5676 rtx x = find_replacement (&XEXP (*loc, 0));
5677 rtx y = find_replacement (&XEXP (*loc, 1));
5679 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5680 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5686 /* Return nonzero if register in range [REGNO, ENDREGNO)
5687 appears either explicitly or implicitly in X
5688 other than being stored into (except for earlyclobber operands).
5690 References contained within the substructure at LOC do not count.
5691 LOC may be zero, meaning don't ignore anything.
5693 This is similar to refers_to_regno_p in rtlanal.c except that we
5694 look at equivalences for pseudos that didn't get hard registers. */
5697 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5698 int regno, endregno;
5703 register RTX_CODE code;
5710 code = GET_CODE (x);
5717 /* If this is a pseudo, a hard register must not have been allocated.
5718 X must therefore either be a constant or be in memory. */
5719 if (i >= FIRST_PSEUDO_REGISTER)
5721 if (reg_equiv_memory_loc[i])
5722 return refers_to_regno_for_reload_p (regno, endregno,
5723 reg_equiv_memory_loc[i],
5726 if (reg_equiv_constant[i])
5732 return (endregno > i
5733 && regno < i + (i < FIRST_PSEUDO_REGISTER
5734 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5738 /* If this is a SUBREG of a hard reg, we can see exactly which
5739 registers are being modified. Otherwise, handle normally. */
5740 if (GET_CODE (SUBREG_REG (x)) == REG
5741 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5743 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5745 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5746 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5748 return endregno > inner_regno && regno < inner_endregno;
5754 if (&SET_DEST (x) != loc
5755 /* Note setting a SUBREG counts as referring to the REG it is in for
5756 a pseudo but not for hard registers since we can
5757 treat each word individually. */
5758 && ((GET_CODE (SET_DEST (x)) == SUBREG
5759 && loc != &SUBREG_REG (SET_DEST (x))
5760 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5761 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5762 && refers_to_regno_for_reload_p (regno, endregno,
5763 SUBREG_REG (SET_DEST (x)),
5765 /* If the output is an earlyclobber operand, this is
5767 || ((GET_CODE (SET_DEST (x)) != REG
5768 || earlyclobber_operand_p (SET_DEST (x)))
5769 && refers_to_regno_for_reload_p (regno, endregno,
5770 SET_DEST (x), loc))))
5773 if (code == CLOBBER || loc == &SET_SRC (x))
5782 /* X does not match, so try its subexpressions. */
5784 fmt = GET_RTX_FORMAT (code);
5785 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5787 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5795 if (refers_to_regno_for_reload_p (regno, endregno,
5799 else if (fmt[i] == 'E')
5802 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5803 if (loc != &XVECEXP (x, i, j)
5804 && refers_to_regno_for_reload_p (regno, endregno,
5805 XVECEXP (x, i, j), loc))
5812 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5813 we check if any register number in X conflicts with the relevant register
5814 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5815 contains a MEM (we don't bother checking for memory addresses that can't
5816 conflict because we expect this to be a rare case.
5818 This function is similar to reg_overlap_mention_p in rtlanal.c except
5819 that we look at equivalences for pseudos that didn't get hard registers. */
5822 reg_overlap_mentioned_for_reload_p (x, in)
5825 int regno, endregno;
5827 /* Overly conservative. */
5828 if (GET_CODE (x) == STRICT_LOW_PART)
5831 /* If either argument is a constant, then modifying X can not affect IN. */
5832 if (CONSTANT_P (x) || CONSTANT_P (in))
5834 else if (GET_CODE (x) == SUBREG)
5836 regno = REGNO (SUBREG_REG (x));
5837 if (regno < FIRST_PSEUDO_REGISTER)
5838 regno += SUBREG_WORD (x);
5840 else if (GET_CODE (x) == REG)
5844 /* If this is a pseudo, it must not have been assigned a hard register.
5845 Therefore, it must either be in memory or be a constant. */
5847 if (regno >= FIRST_PSEUDO_REGISTER)
5849 if (reg_equiv_memory_loc[regno])
5850 return refers_to_mem_for_reload_p (in);
5851 else if (reg_equiv_constant[regno])
5856 else if (GET_CODE (x) == MEM)
5857 return refers_to_mem_for_reload_p (in);
5858 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5859 || GET_CODE (x) == CC0)
5860 return reg_mentioned_p (x, in);
5864 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5865 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5867 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5870 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5874 refers_to_mem_for_reload_p (x)
5880 if (GET_CODE (x) == MEM)
5883 if (GET_CODE (x) == REG)
5884 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5885 && reg_equiv_memory_loc[REGNO (x)]);
5887 fmt = GET_RTX_FORMAT (GET_CODE (x));
5888 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5890 && (GET_CODE (XEXP (x, i)) == MEM
5891 || refers_to_mem_for_reload_p (XEXP (x, i))))
5897 /* Check the insns before INSN to see if there is a suitable register
5898 containing the same value as GOAL.
5899 If OTHER is -1, look for a register in class CLASS.
5900 Otherwise, just see if register number OTHER shares GOAL's value.
5902 Return an rtx for the register found, or zero if none is found.
5904 If RELOAD_REG_P is (short *)1,
5905 we reject any hard reg that appears in reload_reg_rtx
5906 because such a hard reg is also needed coming into this insn.
5908 If RELOAD_REG_P is any other nonzero value,
5909 it is a vector indexed by hard reg number
5910 and we reject any hard reg whose element in the vector is nonnegative
5911 as well as any that appears in reload_reg_rtx.
5913 If GOAL is zero, then GOALREG is a register number; we look
5914 for an equivalent for that register.
5916 MODE is the machine mode of the value we want an equivalence for.
5917 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5919 This function is used by jump.c as well as in the reload pass.
5921 If GOAL is the sum of the stack pointer and a constant, we treat it
5922 as if it were a constant except that sp is required to be unchanging. */
5925 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5928 enum reg_class class;
5930 short *reload_reg_p;
5932 enum machine_mode mode;
5934 register rtx p = insn;
5935 rtx goaltry, valtry, value, where;
5937 register int regno = -1;
5941 int goal_mem_addr_varies = 0;
5942 int need_stable_sp = 0;
5948 else if (GET_CODE (goal) == REG)
5949 regno = REGNO (goal);
5950 else if (GET_CODE (goal) == MEM)
5952 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5953 if (MEM_VOLATILE_P (goal))
5955 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5957 /* An address with side effects must be reexecuted. */
5970 else if (CONSTANT_P (goal))
5972 else if (GET_CODE (goal) == PLUS
5973 && XEXP (goal, 0) == stack_pointer_rtx
5974 && CONSTANT_P (XEXP (goal, 1)))
5975 goal_const = need_stable_sp = 1;
5976 else if (GET_CODE (goal) == PLUS
5977 && XEXP (goal, 0) == frame_pointer_rtx
5978 && CONSTANT_P (XEXP (goal, 1)))
5983 /* On some machines, certain regs must always be rejected
5984 because they don't behave the way ordinary registers do. */
5986 #ifdef OVERLAPPING_REGNO_P
5987 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5988 && OVERLAPPING_REGNO_P (regno))
5992 /* Scan insns back from INSN, looking for one that copies
5993 a value into or out of GOAL.
5994 Stop and give up if we reach a label. */
5999 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6001 if (GET_CODE (p) == INSN
6002 /* If we don't want spill regs ... */
6003 && (! (reload_reg_p != 0
6004 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6005 /* ... then ignore insns introduced by reload; they aren't useful
6006 and can cause results in reload_as_needed to be different
6007 from what they were when calculating the need for spills.
6008 If we notice an input-reload insn here, we will reject it below,
6009 but it might hide a usable equivalent. That makes bad code.
6010 It may even abort: perhaps no reg was spilled for this insn
6011 because it was assumed we would find that equivalent. */
6012 || INSN_UID (p) < reload_first_uid))
6015 pat = single_set (p);
6016 /* First check for something that sets some reg equal to GOAL. */
6019 && true_regnum (SET_SRC (pat)) == regno
6020 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6023 && true_regnum (SET_DEST (pat)) == regno
6024 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6026 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6027 /* When looking for stack pointer + const,
6028 make sure we don't use a stack adjust. */
6029 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6030 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6032 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6033 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6035 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6036 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6037 /* If we are looking for a constant,
6038 and something equivalent to that constant was copied
6039 into a reg, we can use that reg. */
6040 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6042 && rtx_equal_p (XEXP (tem, 0), goal)
6043 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6044 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6046 && GET_CODE (SET_DEST (pat)) == REG
6047 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6048 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6049 && GET_CODE (goal) == CONST_INT
6050 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
6052 && rtx_equal_p (goal, goaltry)
6053 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
6055 && (valueno = true_regnum (valtry)) >= 0)
6056 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6058 && GET_CODE (SET_DEST (pat)) == REG
6059 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6060 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6061 && GET_CODE (goal) == CONST_INT
6062 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6064 && rtx_equal_p (goal, goaltry)
6066 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6067 && (valueno = true_regnum (valtry)) >= 0)))
6070 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
6071 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6081 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6082 (or copying VALUE into GOAL, if GOAL is also a register).
6083 Now verify that VALUE is really valid. */
6085 /* VALUENO is the register number of VALUE; a hard register. */
6087 /* Don't try to re-use something that is killed in this insn. We want
6088 to be able to trust REG_UNUSED notes. */
6089 if (find_reg_note (where, REG_UNUSED, value))
6092 /* If we propose to get the value from the stack pointer or if GOAL is
6093 a MEM based on the stack pointer, we need a stable SP. */
6094 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6095 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6099 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6100 if (GET_MODE (value) != mode)
6103 /* Reject VALUE if it was loaded from GOAL
6104 and is also a register that appears in the address of GOAL. */
6106 if (goal_mem && value == SET_DEST (single_set (where))
6107 && refers_to_regno_for_reload_p (valueno,
6109 + HARD_REGNO_NREGS (valueno, mode)),
6113 /* Reject registers that overlap GOAL. */
6115 if (!goal_mem && !goal_const
6116 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
6117 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
6120 /* Reject VALUE if it is one of the regs reserved for reloads.
6121 Reload1 knows how to reuse them anyway, and it would get
6122 confused if we allocated one without its knowledge.
6123 (Now that insns introduced by reload are ignored above,
6124 this case shouldn't happen, but I'm not positive.) */
6126 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
6127 && reload_reg_p[valueno] >= 0)
6130 /* On some machines, certain regs must always be rejected
6131 because they don't behave the way ordinary registers do. */
6133 #ifdef OVERLAPPING_REGNO_P
6134 if (OVERLAPPING_REGNO_P (valueno))
6138 nregs = HARD_REGNO_NREGS (regno, mode);
6139 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6141 /* Reject VALUE if it is a register being used for an input reload
6142 even if it is not one of those reserved. */
6144 if (reload_reg_p != 0)
6147 for (i = 0; i < n_reloads; i++)
6148 if (reload_reg_rtx[i] != 0 && reload_in[i])
6150 int regno1 = REGNO (reload_reg_rtx[i]);
6151 int nregs1 = HARD_REGNO_NREGS (regno1,
6152 GET_MODE (reload_reg_rtx[i]));
6153 if (regno1 < valueno + valuenregs
6154 && regno1 + nregs1 > valueno)
6160 /* We must treat frame pointer as varying here,
6161 since it can vary--in a nonlocal goto as generated by expand_goto. */
6162 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6164 /* Now verify that the values of GOAL and VALUE remain unaltered
6165 until INSN is reached. */
6174 /* Don't trust the conversion past a function call
6175 if either of the two is in a call-clobbered register, or memory. */
6176 if (GET_CODE (p) == CALL_INSN
6177 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6178 && call_used_regs[regno])
6180 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6181 && call_used_regs[valueno])
6187 #ifdef NON_SAVING_SETJMP
6188 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6189 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6193 #ifdef INSN_CLOBBERS_REGNO_P
6194 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6195 && INSN_CLOBBERS_REGNO_P (p, valueno))
6196 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6197 && INSN_CLOBBERS_REGNO_P (p, regno)))
6201 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6205 /* Watch out for unspec_volatile, and volatile asms. */
6206 if (volatile_insn_p (pat))
6209 /* If this insn P stores in either GOAL or VALUE, return 0.
6210 If GOAL is a memory ref and this insn writes memory, return 0.
6211 If GOAL is a memory ref and its address is not constant,
6212 and this insn P changes a register used in GOAL, return 0. */
6214 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6216 register rtx dest = SET_DEST (pat);
6217 while (GET_CODE (dest) == SUBREG
6218 || GET_CODE (dest) == ZERO_EXTRACT
6219 || GET_CODE (dest) == SIGN_EXTRACT
6220 || GET_CODE (dest) == STRICT_LOW_PART)
6221 dest = XEXP (dest, 0);
6222 if (GET_CODE (dest) == REG)
6224 register int xregno = REGNO (dest);
6226 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6227 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6230 if (xregno < regno + nregs && xregno + xnregs > regno)
6232 if (xregno < valueno + valuenregs
6233 && xregno + xnregs > valueno)
6235 if (goal_mem_addr_varies
6236 && reg_overlap_mentioned_for_reload_p (dest, goal))
6238 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6241 else if (goal_mem && GET_CODE (dest) == MEM
6242 && ! push_operand (dest, GET_MODE (dest)))
6244 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6245 && reg_equiv_memory_loc[regno] != 0)
6247 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6250 else if (GET_CODE (pat) == PARALLEL)
6253 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6255 register rtx v1 = XVECEXP (pat, 0, i);
6256 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6258 register rtx dest = SET_DEST (v1);
6259 while (GET_CODE (dest) == SUBREG
6260 || GET_CODE (dest) == ZERO_EXTRACT
6261 || GET_CODE (dest) == SIGN_EXTRACT
6262 || GET_CODE (dest) == STRICT_LOW_PART)
6263 dest = XEXP (dest, 0);
6264 if (GET_CODE (dest) == REG)
6266 register int xregno = REGNO (dest);
6268 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6269 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6272 if (xregno < regno + nregs
6273 && xregno + xnregs > regno)
6275 if (xregno < valueno + valuenregs
6276 && xregno + xnregs > valueno)
6278 if (goal_mem_addr_varies
6279 && reg_overlap_mentioned_for_reload_p (dest,
6282 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6285 else if (goal_mem && GET_CODE (dest) == MEM
6286 && ! push_operand (dest, GET_MODE (dest)))
6288 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6289 && reg_equiv_memory_loc[regno] != 0)
6291 else if (need_stable_sp
6292 && push_operand (dest, GET_MODE (dest)))
6298 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6302 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6303 link = XEXP (link, 1))
6305 pat = XEXP (link, 0);
6306 if (GET_CODE (pat) == CLOBBER)
6308 register rtx dest = SET_DEST (pat);
6309 while (GET_CODE (dest) == SUBREG
6310 || GET_CODE (dest) == ZERO_EXTRACT
6311 || GET_CODE (dest) == SIGN_EXTRACT
6312 || GET_CODE (dest) == STRICT_LOW_PART)
6313 dest = XEXP (dest, 0);
6314 if (GET_CODE (dest) == REG)
6316 register int xregno = REGNO (dest);
6318 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6319 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6322 if (xregno < regno + nregs
6323 && xregno + xnregs > regno)
6325 if (xregno < valueno + valuenregs
6326 && xregno + xnregs > valueno)
6328 if (goal_mem_addr_varies
6329 && reg_overlap_mentioned_for_reload_p (dest,
6333 else if (goal_mem && GET_CODE (dest) == MEM
6334 && ! push_operand (dest, GET_MODE (dest)))
6336 else if (need_stable_sp
6337 && push_operand (dest, GET_MODE (dest)))
6344 /* If this insn auto-increments or auto-decrements
6345 either regno or valueno, return 0 now.
6346 If GOAL is a memory ref and its address is not constant,
6347 and this insn P increments a register used in GOAL, return 0. */
6351 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6352 if (REG_NOTE_KIND (link) == REG_INC
6353 && GET_CODE (XEXP (link, 0)) == REG)
6355 register int incno = REGNO (XEXP (link, 0));
6356 if (incno < regno + nregs && incno >= regno)
6358 if (incno < valueno + valuenregs && incno >= valueno)
6360 if (goal_mem_addr_varies
6361 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6371 /* Find a place where INCED appears in an increment or decrement operator
6372 within X, and return the amount INCED is incremented or decremented by.
6373 The value is always positive. */
6376 find_inc_amount (x, inced)
6379 register enum rtx_code code = GET_CODE (x);
6385 register rtx addr = XEXP (x, 0);
6386 if ((GET_CODE (addr) == PRE_DEC
6387 || GET_CODE (addr) == POST_DEC
6388 || GET_CODE (addr) == PRE_INC
6389 || GET_CODE (addr) == POST_INC)
6390 && XEXP (addr, 0) == inced)
6391 return GET_MODE_SIZE (GET_MODE (x));
6394 fmt = GET_RTX_FORMAT (code);
6395 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6399 register int tem = find_inc_amount (XEXP (x, i), inced);
6406 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6408 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6418 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6421 regno_clobbered_p (regno, insn)
6425 if (GET_CODE (PATTERN (insn)) == CLOBBER
6426 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6427 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6429 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6431 int i = XVECLEN (PATTERN (insn), 0) - 1;
6435 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6436 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6437 && REGNO (XEXP (elt, 0)) == regno)
6445 static char *reload_when_needed_name[] =
6448 "RELOAD_FOR_OUTPUT",
6450 "RELOAD_FOR_INPUT_ADDRESS",
6451 "RELOAD_FOR_INPADDR_ADDRESS",
6452 "RELOAD_FOR_OUTPUT_ADDRESS",
6453 "RELOAD_FOR_OUTADDR_ADDRESS",
6454 "RELOAD_FOR_OPERAND_ADDRESS",
6455 "RELOAD_FOR_OPADDR_ADDR",
6457 "RELOAD_FOR_OTHER_ADDRESS"
6460 static char *reg_class_names[] = REG_CLASS_NAMES;
6462 /* These functions are used to print the variables set by 'find_reloads' */
6465 debug_reload_to_stream (f)
6473 for (r = 0; r < n_reloads; r++)
6475 fprintf (f, "Reload %d: ", r);
6477 if (reload_in[r] != 0)
6479 fprintf (f, "reload_in (%s) = ",
6480 GET_MODE_NAME (reload_inmode[r]));
6481 print_inline_rtx (f, reload_in[r], 24);
6482 fprintf (f, "\n\t");
6485 if (reload_out[r] != 0)
6487 fprintf (f, "reload_out (%s) = ",
6488 GET_MODE_NAME (reload_outmode[r]));
6489 print_inline_rtx (f, reload_out[r], 24);
6490 fprintf (f, "\n\t");
6493 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6495 fprintf (f, "%s (opnum = %d)",
6496 reload_when_needed_name[(int) reload_when_needed[r]],
6499 if (reload_optional[r])
6500 fprintf (f, ", optional");
6502 if (reload_nongroup[r])
6503 fprintf (stderr, ", nongroup");
6505 if (reload_inc[r] != 0)
6506 fprintf (f, ", inc by %d", reload_inc[r]);
6508 if (reload_nocombine[r])
6509 fprintf (f, ", can't combine");
6511 if (reload_secondary_p[r])
6512 fprintf (f, ", secondary_reload_p");
6514 if (reload_in_reg[r] != 0)
6516 fprintf (f, "\n\treload_in_reg: ");
6517 print_inline_rtx (f, reload_in_reg[r], 24);
6520 if (reload_reg_rtx[r] != 0)
6522 fprintf (f, "\n\treload_reg_rtx: ");
6523 print_inline_rtx (f, reload_reg_rtx[r], 24);
6527 if (reload_secondary_in_reload[r] != -1)
6529 fprintf (f, "%ssecondary_in_reload = %d",
6530 prefix, reload_secondary_in_reload[r]);
6534 if (reload_secondary_out_reload[r] != -1)
6535 fprintf (f, "%ssecondary_out_reload = %d\n",
6536 prefix, reload_secondary_out_reload[r]);
6539 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6541 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6542 insn_name[reload_secondary_in_icode[r]]);
6546 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6547 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6548 insn_name[reload_secondary_out_icode[r]]);
6557 debug_reload_to_stream (stderr);
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