1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This module looks for cases where matching constraints would force
22 an instruction to need a reload, and this reload would be a register
23 to register move. It then attempts to change the registers used by the
24 instruction to avoid the move instruction. */
33 /* stdio.h must precede rtl.h for FFS. */
37 #include "insn-config.h"
42 #include "hard-reg-set.h"
45 #include "insn-flags.h"
46 #include "basic-block.h"
49 static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx));
50 static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx));
51 static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx));
52 static rtx gen_add3_insn PROTO((rtx, rtx, rtx));
53 static void copy_src_to_dest PROTO((rtx, rtx, rtx, int));
54 static int *regmove_bb_head;
57 int with[MAX_RECOG_OPERANDS];
58 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS];
59 int commutative[MAX_RECOG_OPERANDS];
60 int early_clobber[MAX_RECOG_OPERANDS];
64 static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
66 static int find_matches PROTO((rtx, struct match *));
67 static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
69 static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx));
70 static int stable_but_for_p PROTO((rtx, rtx, rtx));
71 static int loop_depth;
73 /* Generate and return an insn body to add r1 and c,
74 storing the result in r0. */
76 gen_add3_insn (r0, r1, c)
79 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
81 if (icode == CODE_FOR_nothing
82 || ! (*insn_operand_predicate[icode][0]) (r0, insn_operand_mode[icode][0])
83 || ! (*insn_operand_predicate[icode][1]) (r1, insn_operand_mode[icode][1])
84 || ! (*insn_operand_predicate[icode][2]) (c, insn_operand_mode[icode][2]))
87 return (GEN_FCN (icode) (r0, r1, c));
92 /* INC_INSN is an instruction that adds INCREMENT to REG.
93 Try to fold INC_INSN as a post/pre in/decrement into INSN.
94 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
95 Return nonzero for success. */
97 try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
98 rtx reg, insn, inc_insn ,inc_insn_set;
99 HOST_WIDE_INT increment;
102 enum rtx_code inc_code;
104 rtx pset = single_set (insn);
107 /* Can't use the size of SET_SRC, we might have something like
108 (sign_extend:SI (mem:QI ... */
109 rtx use = find_use_as_address (pset, reg, 0);
110 if (use != 0 && use != (rtx) 1)
112 int size = GET_MODE_SIZE (GET_MODE (use));
114 #ifdef HAVE_POST_INCREMENT
115 || (pre == 0 && (inc_code = POST_INC, increment == size))
117 #ifdef HAVE_PRE_INCREMENT
118 || (pre == 1 && (inc_code = PRE_INC, increment == size))
120 #ifdef HAVE_POST_DECREMENT
121 || (pre == 0 && (inc_code = POST_DEC, increment == -size))
123 #ifdef HAVE_PRE_DECREMENT
124 || (pre == 1 && (inc_code = PRE_DEC, increment == -size))
131 &SET_SRC (inc_insn_set),
132 XEXP (SET_SRC (inc_insn_set), 0), 1);
133 validate_change (insn, &XEXP (use, 0),
134 gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
135 if (apply_change_group ())
138 = gen_rtx_EXPR_LIST (REG_INC,
139 reg, REG_NOTES (insn));
142 PUT_CODE (inc_insn, NOTE);
143 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
144 NOTE_SOURCE_FILE (inc_insn) = 0;
153 #endif /* AUTO_INC_DEC */
155 static int *regno_src_regno;
157 /* Indicate how good a choice REG (which appears as a source) is to replace
158 a destination register with. The higher the returned value, the better
159 the choice. The main objective is to avoid using a register that is
160 a candidate for tying to a hard register, since the output might in
161 turn be a candidate to be tied to a different hard register. */
163 replacement_quality(reg)
168 /* Bad if this isn't a register at all. */
169 if (GET_CODE (reg) != REG)
172 /* If this register is not meant to get a hard register,
173 it is a poor choice. */
174 if (REG_LIVE_LENGTH (REGNO (reg)) < 0)
177 src_regno = regno_src_regno[REGNO (reg)];
179 /* If it was not copied from another register, it is fine. */
183 /* Copied from a hard register? */
184 if (src_regno < FIRST_PSEUDO_REGISTER)
187 /* Copied from a pseudo register - not as bad as from a hard register,
188 yet still cumbersome, since the register live length will be lengthened
189 when the registers get tied. */
193 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
196 Search forward to see if SRC dies before either it or DEST is modified,
197 but don't scan past the end of a basic block. If so, we can replace SRC
198 with DEST and let SRC die in INSN.
200 This will reduce the number of registers live in that range and may enable
201 DEST to be tied to SRC, thus often saving one register in addition to a
202 register-register copy. */
205 optimize_reg_copy_1 (insn, dest, src)
213 int sregno = REGNO (src);
214 int dregno = REGNO (dest);
216 /* We don't want to mess with hard regs if register classes are small. */
218 || (SMALL_REGISTER_CLASSES
219 && (sregno < FIRST_PSEUDO_REGISTER
220 || dregno < FIRST_PSEUDO_REGISTER))
221 /* We don't see all updates to SP if they are in an auto-inc memory
222 reference, so we must disallow this optimization on them. */
223 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
226 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
228 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
229 || (GET_CODE (p) == NOTE
230 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
231 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
234 /* ??? We can't scan past the end of a basic block without updating
235 the register lifetime info (REG_DEAD/basic_block_live_at_start).
236 A CALL_INSN might be the last insn of a basic block, if it is inside
237 an EH region. There is no easy way to tell, so we just always break
238 when we see a CALL_INSN if flag_exceptions is nonzero. */
239 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
242 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
245 if (reg_set_p (src, p) || reg_set_p (dest, p)
246 /* Don't change a USE of a register. */
247 || (GET_CODE (PATTERN (p)) == USE
248 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
251 /* See if all of SRC dies in P. This test is slightly more
252 conservative than it needs to be. */
253 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
254 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
262 /* We can do the optimization. Scan forward from INSN again,
263 replacing regs as we go. Set FAILED if a replacement can't
264 be done. In that case, we can't move the death note for SRC.
265 This should be rare. */
267 /* Set to stop at next insn. */
268 for (q = next_real_insn (insn);
269 q != next_real_insn (p);
270 q = next_real_insn (q))
272 if (reg_overlap_mentioned_p (src, PATTERN (q)))
274 /* If SRC is a hard register, we might miss some
275 overlapping registers with validate_replace_rtx,
276 so we would have to undo it. We can't if DEST is
277 present in the insn, so fail in that combination
279 if (sregno < FIRST_PSEUDO_REGISTER
280 && reg_mentioned_p (dest, PATTERN (q)))
283 /* Replace all uses and make sure that the register
284 isn't still present. */
285 else if (validate_replace_rtx (src, dest, q)
286 && (sregno >= FIRST_PSEUDO_REGISTER
287 || ! reg_overlap_mentioned_p (src,
290 /* We assume that a register is used exactly once per
291 insn in the REG_N_REFS updates below. If this is not
292 correct, no great harm is done.
295 We do not undo this substitution if something later
296 fails. Therefore, we must update the other REG_N_*
297 counters now to keep them accurate. */
298 if (sregno >= FIRST_PSEUDO_REGISTER)
300 REG_N_REFS (sregno) -= loop_depth;
302 if (REG_LIVE_LENGTH (sregno) >= 0)
304 REG_LIVE_LENGTH (sregno) -= length;
305 /* REG_LIVE_LENGTH is only an approximation after
306 combine if sched is not run, so make sure that
307 we still have a reasonable value. */
308 if (REG_LIVE_LENGTH (sregno) < 2)
309 REG_LIVE_LENGTH (sregno) = 2;
312 REG_N_CALLS_CROSSED (sregno) -= n_calls;
315 if (dregno >= FIRST_PSEUDO_REGISTER)
317 REG_N_REFS (dregno) += loop_depth;
319 if (REG_LIVE_LENGTH (dregno) >= 0)
320 REG_LIVE_LENGTH (dregno) += d_length;
322 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
325 /* We've done a substitution, clear the counters. */
333 validate_replace_rtx (dest, src, q);
338 /* Count the insns and CALL_INSNs passed. If we passed the
339 death note of DEST, show increased live length. */
344 /* If the insn in which SRC dies is a CALL_INSN, don't count it
345 as a call that has been crossed. Otherwise, count it. */
346 if (q != p && GET_CODE (q) == CALL_INSN)
353 /* If DEST dies here, remove the death note and save it for
354 later. Make sure ALL of DEST dies here; again, this is
355 overly conservative. */
357 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
359 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
360 failed = 1, dest_death = 0;
362 remove_note (q, dest_death);
368 if (sregno >= FIRST_PSEUDO_REGISTER)
370 if (REG_LIVE_LENGTH (sregno) >= 0)
372 REG_LIVE_LENGTH (sregno) -= length;
373 /* REG_LIVE_LENGTH is only an approximation after
374 combine if sched is not run, so make sure that we
375 still have a reasonable value. */
376 if (REG_LIVE_LENGTH (sregno) < 2)
377 REG_LIVE_LENGTH (sregno) = 2;
380 REG_N_CALLS_CROSSED (sregno) -= n_calls;
383 if (dregno >= FIRST_PSEUDO_REGISTER)
385 if (REG_LIVE_LENGTH (dregno) >= 0)
386 REG_LIVE_LENGTH (dregno) += d_length;
388 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
391 /* Move death note of SRC from P to INSN. */
392 remove_note (p, note);
393 XEXP (note, 1) = REG_NOTES (insn);
394 REG_NOTES (insn) = note;
397 /* Put death note of DEST on P if we saw it die. */
400 XEXP (dest_death, 1) = REG_NOTES (p);
401 REG_NOTES (p) = dest_death;
407 /* If SRC is a hard register which is set or killed in some other
408 way, we can't do this optimization. */
409 else if (sregno < FIRST_PSEUDO_REGISTER
410 && dead_or_set_p (p, src))
416 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
417 a sequence of insns that modify DEST followed by an insn that sets
418 SRC to DEST in which DEST dies, with no prior modification of DEST.
419 (There is no need to check if the insns in between actually modify
420 DEST. We should not have cases where DEST is not modified, but
421 the optimization is safe if no such modification is detected.)
422 In that case, we can replace all uses of DEST, starting with INSN and
423 ending with the set of SRC to DEST, with SRC. We do not do this
424 optimization if a CALL_INSN is crossed unless SRC already crosses a
425 call or if DEST dies before the copy back to SRC.
427 It is assumed that DEST and SRC are pseudos; it is too complicated to do
428 this for hard registers since the substitutions we may make might fail. */
431 optimize_reg_copy_2 (insn, dest, src)
438 int sregno = REGNO (src);
439 int dregno = REGNO (dest);
441 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
443 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
444 || (GET_CODE (p) == NOTE
445 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
446 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
449 /* ??? We can't scan past the end of a basic block without updating
450 the register lifetime info (REG_DEAD/basic_block_live_at_start).
451 A CALL_INSN might be the last insn of a basic block, if it is inside
452 an EH region. There is no easy way to tell, so we just always break
453 when we see a CALL_INSN if flag_exceptions is nonzero. */
454 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
457 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
460 set = single_set (p);
461 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
462 && find_reg_note (p, REG_DEAD, dest))
464 /* We can do the optimization. Scan forward from INSN again,
465 replacing regs as we go. */
467 /* Set to stop at next insn. */
468 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
469 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
471 if (reg_mentioned_p (dest, PATTERN (q)))
473 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
475 /* We assume that a register is used exactly once per
476 insn in the updates below. If this is not correct,
477 no great harm is done. */
478 REG_N_REFS (dregno) -= loop_depth;
479 REG_N_REFS (sregno) += loop_depth;
483 if (GET_CODE (q) == CALL_INSN)
485 REG_N_CALLS_CROSSED (dregno)--;
486 REG_N_CALLS_CROSSED (sregno)++;
490 remove_note (p, find_reg_note (p, REG_DEAD, dest));
491 REG_N_DEATHS (dregno)--;
492 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
493 REG_N_DEATHS (sregno)--;
497 if (reg_set_p (src, p)
498 || find_reg_note (p, REG_DEAD, dest)
499 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
503 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
504 Look if SRC dies there, and if it is only set once, by loading
505 it from memory. If so, try to encorporate the zero/sign extension
506 into the memory read, change SRC to the mode of DEST, and alter
507 the remaining accesses to use the appropriate SUBREG. This allows
508 SRC and DEST to be tied later. */
510 optimize_reg_copy_3 (insn, dest, src)
515 rtx src_reg = XEXP (src, 0);
516 int src_no = REGNO (src_reg);
517 int dst_no = REGNO (dest);
519 enum machine_mode old_mode;
521 if (src_no < FIRST_PSEUDO_REGISTER
522 || dst_no < FIRST_PSEUDO_REGISTER
523 || ! find_reg_note (insn, REG_DEAD, src_reg)
524 || REG_N_SETS (src_no) != 1)
526 for (p = PREV_INSN (insn); ! reg_set_p (src_reg, p); p = PREV_INSN (p))
528 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
529 || (GET_CODE (p) == NOTE
530 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
531 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
534 /* ??? We can't scan past the end of a basic block without updating
535 the register lifetime info (REG_DEAD/basic_block_live_at_start).
536 A CALL_INSN might be the last insn of a basic block, if it is inside
537 an EH region. There is no easy way to tell, so we just always break
538 when we see a CALL_INSN if flag_exceptions is nonzero. */
539 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
542 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
545 if (! (set = single_set (p))
546 || GET_CODE (SET_SRC (set)) != MEM
547 || SET_DEST (set) != src_reg)
549 old_mode = GET_MODE (src_reg);
550 PUT_MODE (src_reg, GET_MODE (src));
551 XEXP (src, 0) = SET_SRC (set);
552 if (! validate_change (p, &SET_SRC (set), src, 0))
554 PUT_MODE (src_reg, old_mode);
555 XEXP (src, 0) = src_reg;
558 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0);
559 while (p = NEXT_INSN (p), p != insn)
561 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
563 /* If we can not perform the replacement, then abort now
564 to make debugging easier. */
565 if (! validate_replace_rtx (src_reg, subreg, p))
568 validate_replace_rtx (src, src_reg, insn);
572 /* If we were not able to update the users of src to use dest directly, try
573 instead moving the value to dest directly before the operation. */
576 copy_src_to_dest (insn, src, dest, loop_depth)
595 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
596 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
597 parameter when there is no frame pointer that is not allocated a register.
598 For now, we just reject them, rather than incrementing the live length. */
600 if (GET_CODE (src) == REG
601 && REG_LIVE_LENGTH (REGNO (src)) > 0
602 && GET_CODE (dest) == REG
603 && REG_LIVE_LENGTH (REGNO (dest)) > 0
604 && (set = single_set (insn)) != NULL_RTX
605 && !reg_mentioned_p (dest, SET_SRC (set))
606 && validate_replace_rtx (src, dest, insn))
608 /* Generate the src->dest move. */
610 emit_move_insn (dest, src);
611 seq = gen_sequence ();
613 emit_insn_before (seq, insn);
614 move_insn = PREV_INSN (insn);
615 p_move_notes = ®_NOTES (move_insn);
616 p_insn_notes = ®_NOTES (insn);
618 /* Move any notes mentioning src to the move instruction */
619 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
621 next = XEXP (link, 1);
622 if (XEXP (link, 0) == src)
624 *p_move_notes = link;
625 p_move_notes = &XEXP (link, 1);
629 *p_insn_notes = link;
630 p_insn_notes = &XEXP (link, 1);
634 *p_move_notes = NULL_RTX;
635 *p_insn_notes = NULL_RTX;
637 /* Is the insn the head of a basic block? If so extend it */
638 insn_uid = INSN_UID (insn);
639 move_uid = INSN_UID (move_insn);
640 bb = regmove_bb_head[insn_uid];
643 basic_block_head[bb] = move_insn;
644 regmove_bb_head[insn_uid] = -1;
647 /* Update the various register tables. */
648 dest_regno = REGNO (dest);
649 REG_N_SETS (dest_regno) += loop_depth;
650 REG_N_REFS (dest_regno) += loop_depth;
651 REG_LIVE_LENGTH (dest_regno)++;
652 if (REGNO_FIRST_UID (dest_regno) == insn_uid)
653 REGNO_FIRST_UID (dest_regno) = move_uid;
655 src_regno = REGNO (src);
656 if (! find_reg_note (move_insn, REG_DEAD, src))
657 REG_LIVE_LENGTH (src_regno)++;
659 if (REGNO_FIRST_UID (src_regno) == insn_uid)
660 REGNO_FIRST_UID (src_regno) = move_uid;
662 if (REGNO_LAST_UID (src_regno) == insn_uid)
663 REGNO_LAST_UID (src_regno) = move_uid;
665 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
666 REGNO_LAST_NOTE_UID (src_regno) = move_uid;
671 /* Return whether REG is set in only one location, and is set to a
672 constant, but is set in a different basic block from INSN (an
673 instructions which uses REG). In this case REG is equivalent to a
674 constant, and we don't want to break that equivalence, because that
675 may increase register pressure and make reload harder. If REG is
676 set in the same basic block as INSN, we don't worry about it,
677 because we'll probably need a register anyhow (??? but what if REG
678 is used in a different basic block as well as this one?). FIRST is
679 the first insn in the function. */
682 reg_is_remote_constant_p (reg, insn, first)
689 if (REG_N_SETS (REGNO (reg)) != 1)
692 /* Look for the set. */
693 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1))
697 if (REG_NOTE_KIND (p) != 0)
699 s = single_set (XEXP (p, 0));
701 && GET_CODE (SET_DEST (s)) == REG
702 && REGNO (SET_DEST (s)) == REGNO (reg))
704 /* The register is set in the same basic block. */
709 for (p = first; p && p != insn; p = NEXT_INSN (p))
713 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
717 && GET_CODE (SET_DEST (s)) == REG
718 && REGNO (SET_DEST (s)) == REGNO (reg))
720 /* This is the instruction which sets REG. If there is a
721 REG_EQUAL note, then REG is equivalent to a constant. */
722 if (find_reg_note (p, REG_EQUAL, NULL_RTX))
731 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
732 another add immediate instruction with the same source and dest registers,
733 and if we find one, we change INSN to an increment, and return 1. If
734 no changes are made, we return 0.
737 (set (reg100) (plus reg1 offset1))
739 (set (reg100) (plus reg1 offset2))
741 (set (reg100) (plus reg1 offset1))
743 (set (reg100) (plus reg100 offset2-offset1)) */
745 /* ??? What does this comment mean? */
746 /* cse disrupts preincrement / postdecrement squences when it finds a
747 hard register as ultimate source, like the frame pointer. */
750 fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
751 rtx insn, dst, src, offset;
752 FILE *regmove_dump_file;
754 rtx p, dst_death = 0;
755 int length, num_calls = 0;
757 /* If SRC dies in INSN, we'd have to move the death note. This is
758 considered to be very unlikely, so we just skip the optimization
760 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
763 /* Scan backward to find the first instruction that sets DST. */
765 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
769 if (GET_CODE (p) == CODE_LABEL
770 || GET_CODE (p) == JUMP_INSN
771 || (GET_CODE (p) == NOTE
772 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
773 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
776 /* ??? We can't scan past the end of a basic block without updating
777 the register lifetime info (REG_DEAD/basic_block_live_at_start).
778 A CALL_INSN might be the last insn of a basic block, if it is inside
779 an EH region. There is no easy way to tell, so we just always break
780 when we see a CALL_INSN if flag_exceptions is nonzero. */
781 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
784 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
787 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
792 pset = single_set (p);
793 if (pset && SET_DEST (pset) == dst
794 && GET_CODE (SET_SRC (pset)) == PLUS
795 && XEXP (SET_SRC (pset), 0) == src
796 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
798 HOST_WIDE_INT newconst
799 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
800 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
802 if (add && validate_change (insn, &PATTERN (insn), add, 0))
804 /* Remove the death note for DST from DST_DEATH. */
807 remove_death (REGNO (dst), dst_death);
808 REG_LIVE_LENGTH (REGNO (dst)) += length;
809 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
812 REG_N_REFS (REGNO (dst)) += loop_depth;
813 REG_N_REFS (REGNO (src)) -= loop_depth;
815 if (regmove_dump_file)
816 fprintf (regmove_dump_file,
817 "Fixed operand of insn %d.\n",
821 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
823 if (GET_CODE (p) == CODE_LABEL
824 || GET_CODE (p) == JUMP_INSN
825 || (GET_CODE (p) == NOTE
826 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
827 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
829 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
831 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
833 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
838 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
840 if (GET_CODE (p) == CODE_LABEL
841 || GET_CODE (p) == JUMP_INSN
842 || (GET_CODE (p) == NOTE
843 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
844 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
846 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
848 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
850 try_auto_increment (p, insn, 0, dst, newconst, 1);
859 if (reg_set_p (dst, PATTERN (p)))
862 /* If we have passed a call instruction, and the
863 pseudo-reg SRC is not already live across a call,
864 then don't perform the optimization. */
865 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
866 hard regs are clobbered. Thus, we only use it for src for
868 if (GET_CODE (p) == CALL_INSN)
873 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
876 if (call_used_regs [REGNO (dst)]
877 || find_reg_fusage (p, CLOBBER, dst))
880 else if (reg_set_p (src, PATTERN (p)))
888 regmove_optimize (f, nregs, regmove_dump_file)
891 FILE *regmove_dump_file;
896 int maxregnum = max_reg_num (), i;
897 rtx copy_src, copy_dst;
899 regno_src_regno = (int *)alloca (sizeof *regno_src_regno * maxregnum);
900 for (i = maxregnum; --i >= 0; ) regno_src_regno[i] = -1;
902 regmove_bb_head = (int *)alloca (sizeof (int) * (get_max_uid () + 1));
903 for (i = get_max_uid (); i >= 0; i--) regmove_bb_head[i] = -1;
904 for (i = 0; i < n_basic_blocks; i++)
905 regmove_bb_head[INSN_UID (basic_block_head[i])] = i;
907 /* A forward/backward pass. Replace output operands with input operands. */
911 for (pass = 0; pass <= 2; pass++)
913 if (! flag_regmove && pass >= flag_expensive_optimizations)
916 if (regmove_dump_file)
917 fprintf (regmove_dump_file, "Starting %s pass...\n",
918 pass ? "backward" : "forward");
920 for (insn = pass ? get_last_insn () : f; insn;
921 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn))
924 int insn_code_number;
925 int operand_number, match_number;
927 if (GET_CODE (insn) == NOTE)
929 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
931 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
935 set = single_set (insn);
939 if (flag_expensive_optimizations && ! pass
940 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
941 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
942 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
943 && GET_CODE (SET_DEST(set)) == REG)
944 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
946 if (flag_expensive_optimizations && ! pass
947 && GET_CODE (SET_SRC (set)) == REG
948 && GET_CODE (SET_DEST(set)) == REG)
950 /* If this is a register-register copy where SRC is not dead,
951 see if we can optimize it. If this optimization succeeds,
952 it will become a copy where SRC is dead. */
953 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
954 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
955 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
957 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
958 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
959 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
960 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
961 && SET_SRC (set) != SET_DEST (set))
963 int srcregno = REGNO (SET_SRC(set));
964 if (regno_src_regno[srcregno] >= 0)
965 srcregno = regno_src_regno[srcregno];
966 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
970 #ifdef REGISTER_CONSTRAINTS
972 = find_matches (insn, &match);
974 if (insn_code_number < 0)
977 /* Now scan through the operands looking for a source operand
978 which is supposed to match the destination operand.
979 Then scan forward for an instruction which uses the dest
981 If it dies there, then replace the dest in both operands with
982 the source operand. */
984 for (operand_number = 0;
985 operand_number < insn_n_operands[insn_code_number];
988 rtx src, dst, src_subreg;
989 enum reg_class src_class, dst_class;
991 match_number = match.with[operand_number];
993 /* Nothing to do if the two operands aren't supposed to match. */
994 if (match_number < 0)
997 src = recog_operand[operand_number];
998 dst = recog_operand[match_number];
1000 if (GET_CODE (src) != REG)
1004 if (GET_CODE (dst) == SUBREG
1005 && GET_MODE_SIZE (GET_MODE (dst))
1006 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
1009 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
1010 src, SUBREG_WORD (dst));
1011 dst = SUBREG_REG (dst);
1013 if (GET_CODE (dst) != REG
1014 || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1017 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1019 if (match.commutative[operand_number] < operand_number)
1020 regno_src_regno[REGNO (dst)] = REGNO (src);
1024 if (REG_LIVE_LENGTH (REGNO (src)) < 0)
1027 /* operand_number/src must be a read-only operand, and
1028 match_operand/dst must be a write-only operand. */
1029 if (match.use[operand_number] != READ
1030 || match.use[match_number] != WRITE)
1033 if (match.early_clobber[match_number]
1034 && count_occurrences (PATTERN (insn), src) > 1)
1037 /* Make sure match_operand is the destination. */
1038 if (recog_operand[match_number] != SET_DEST (set))
1041 /* If the operands already match, then there is nothing to do. */
1042 /* But in the commutative case, we might find a better match. */
1043 if (operands_match_p (src, dst)
1044 || (match.commutative[operand_number] >= 0
1045 && operands_match_p (recog_operand[match.commutative
1046 [operand_number]], dst)
1047 && (replacement_quality (recog_operand[match.commutative
1049 >= replacement_quality (src))))
1052 src_class = reg_preferred_class (REGNO (src));
1053 dst_class = reg_preferred_class (REGNO (dst));
1054 if (src_class != dst_class
1055 && (! reg_class_subset_p (src_class, dst_class)
1056 || CLASS_LIKELY_SPILLED_P (src_class))
1057 && (! reg_class_subset_p (dst_class, src_class)
1058 || CLASS_LIKELY_SPILLED_P (dst_class)))
1061 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
1062 operand_number, match_number,
1069 /* A backward pass. Replace input operands with output operands. */
1071 if (regmove_dump_file)
1072 fprintf (regmove_dump_file, "Starting backward pass...\n");
1076 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
1078 if (GET_CODE (insn) == NOTE)
1080 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1082 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1085 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1087 int insn_code_number = find_matches (insn, &match);
1088 int operand_number, match_number;
1091 if (insn_code_number < 0)
1094 /* Now scan through the operands looking for a destination operand
1095 which is supposed to match a source operand.
1096 Then scan backward for an instruction which sets the source
1097 operand. If safe, then replace the source operand with the
1098 dest operand in both instructions. */
1100 copy_src = NULL_RTX;
1101 copy_dst = NULL_RTX;
1102 for (operand_number = 0;
1103 operand_number < insn_n_operands[insn_code_number];
1106 rtx set, p, src, dst;
1107 rtx src_note, dst_note;
1109 enum reg_class src_class, dst_class;
1112 match_number = match.with[operand_number];
1114 /* Nothing to do if the two operands aren't supposed to match. */
1115 if (match_number < 0)
1118 dst = recog_operand[match_number];
1119 src = recog_operand[operand_number];
1121 if (GET_CODE (src) != REG)
1124 if (GET_CODE (dst) != REG
1125 || REGNO (dst) < FIRST_PSEUDO_REGISTER
1126 || REG_LIVE_LENGTH (REGNO (dst)) < 0)
1129 /* If the operands already match, then there is nothing to do. */
1130 if (operands_match_p (src, dst)
1131 || (match.commutative[operand_number] >= 0
1132 && operands_match_p (recog_operand[match.commutative[operand_number]], dst)))
1135 set = single_set (insn);
1139 /* match_number/dst must be a write-only operand, and
1140 operand_operand/src must be a read-only operand. */
1141 if (match.use[operand_number] != READ
1142 || match.use[match_number] != WRITE)
1145 if (match.early_clobber[match_number]
1146 && count_occurrences (PATTERN (insn), src) > 1)
1149 /* Make sure match_number is the destination. */
1150 if (recog_operand[match_number] != SET_DEST (set))
1153 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1155 if (GET_CODE (SET_SRC (set)) == PLUS
1156 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT
1157 && XEXP (SET_SRC (set), 0) == src
1158 && fixup_match_2 (insn, dst, src,
1159 XEXP (SET_SRC (set), 1),
1164 src_class = reg_preferred_class (REGNO (src));
1165 dst_class = reg_preferred_class (REGNO (dst));
1166 if (src_class != dst_class
1167 && (! reg_class_subset_p (src_class, dst_class)
1168 || CLASS_LIKELY_SPILLED_P (src_class))
1169 && (! reg_class_subset_p (dst_class, src_class)
1170 || CLASS_LIKELY_SPILLED_P (dst_class)))
1180 /* Can not modify an earlier insn to set dst if this insn
1181 uses an old value in the source. */
1182 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1192 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1203 /* If src is set once in a different basic block,
1204 and is set equal to a constant, then do not use
1205 it for this optimization, as this would make it
1206 no longer equivalent to a constant. */
1208 if (reg_is_remote_constant_p (src, insn, f))
1219 if (regmove_dump_file)
1220 fprintf (regmove_dump_file,
1221 "Could fix operand %d of insn %d matching operand %d.\n",
1222 operand_number, INSN_UID (insn), match_number);
1224 /* Scan backward to find the first instruction that uses
1225 the input operand. If the operand is set here, then
1226 replace it in both instructions with match_number. */
1228 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1232 if (GET_CODE (p) == CODE_LABEL
1233 || GET_CODE (p) == JUMP_INSN
1234 || (GET_CODE (p) == NOTE
1235 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1236 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1239 /* ??? We can't scan past the end of a basic block without
1240 updating the register lifetime info
1241 (REG_DEAD/basic_block_live_at_start).
1242 A CALL_INSN might be the last insn of a basic block, if
1243 it is inside an EH region. There is no easy way to tell,
1244 so we just always break when we see a CALL_INSN if
1245 flag_exceptions is nonzero. */
1246 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1249 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1254 /* ??? See if all of SRC is set in P. This test is much
1255 more conservative than it needs to be. */
1256 pset = single_set (p);
1257 if (pset && SET_DEST (pset) == src)
1259 /* We use validate_replace_rtx, in case there
1260 are multiple identical source operands. All of
1261 them have to be changed at the same time. */
1262 if (validate_replace_rtx (src, dst, insn))
1264 if (validate_change (p, &SET_DEST (pset),
1269 /* Change all source operands back.
1270 This modifies the dst as a side-effect. */
1271 validate_replace_rtx (dst, src, insn);
1272 /* Now make sure the dst is right. */
1273 validate_change (insn,
1274 recog_operand_loc[match_number],
1281 if (reg_overlap_mentioned_p (src, PATTERN (p))
1282 || reg_overlap_mentioned_p (dst, PATTERN (p)))
1285 /* If we have passed a call instruction, and the
1286 pseudo-reg DST is not already live across a call,
1287 then don't perform the optimization. */
1288 if (GET_CODE (p) == CALL_INSN)
1292 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1301 /* Remove the death note for SRC from INSN. */
1302 remove_note (insn, src_note);
1303 /* Move the death note for SRC to P if it is used
1305 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1307 XEXP (src_note, 1) = REG_NOTES (p);
1308 REG_NOTES (p) = src_note;
1310 /* If there is a REG_DEAD note for DST on P, then remove
1311 it, because DST is now set there. */
1312 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1313 remove_note (p, dst_note);
1315 dstno = REGNO (dst);
1316 srcno = REGNO (src);
1318 REG_N_SETS (dstno)++;
1319 REG_N_SETS (srcno)--;
1321 REG_N_CALLS_CROSSED (dstno) += num_calls;
1322 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1324 REG_LIVE_LENGTH (dstno) += length;
1325 if (REG_LIVE_LENGTH (srcno) >= 0)
1327 REG_LIVE_LENGTH (srcno) -= length;
1328 /* REG_LIVE_LENGTH is only an approximation after
1329 combine if sched is not run, so make sure that we
1330 still have a reasonable value. */
1331 if (REG_LIVE_LENGTH (srcno) < 2)
1332 REG_LIVE_LENGTH (srcno) = 2;
1335 /* We assume that a register is used exactly once per
1336 insn in the updates above. If this is not correct,
1337 no great harm is done. */
1339 REG_N_REFS (dstno) += 2 * loop_depth;
1340 REG_N_REFS (srcno) -= 2 * loop_depth;
1342 /* If that was the only time src was set,
1343 and src was not live at the start of the
1344 function, we know that we have no more
1345 references to src; clear REG_N_REFS so it
1346 won't make reload do any work. */
1347 if (REG_N_SETS (REGNO (src)) == 0
1348 && ! regno_uninitialized (REGNO (src)))
1349 REG_N_REFS (REGNO (src)) = 0;
1351 if (regmove_dump_file)
1352 fprintf (regmove_dump_file,
1353 "Fixed operand %d of insn %d matching operand %d.\n",
1354 operand_number, INSN_UID (insn), match_number);
1360 /* If we weren't able to replace any of the alternatives, try an
1361 alternative appoach of copying the source to the destination. */
1362 if (!success && copy_src != NULL_RTX)
1363 copy_src_to_dest (insn, copy_src, copy_dst, loop_depth);
1367 #endif /* REGISTER_CONSTRAINTS */
1370 /* Returns the INSN_CODE for INSN if its pattern has matching constraints for
1371 any operand. Returns -1 if INSN can't be recognized, or if the alternative
1372 can't be determined.
1374 Initialize the info in MATCHP based on the constraints. */
1377 find_matches (insn, matchp)
1379 struct match *matchp;
1381 int likely_spilled[MAX_RECOG_OPERANDS];
1383 int insn_code_number = recog_memoized (insn);
1384 int any_matches = 0;
1386 if (insn_code_number < 0)
1389 insn_extract (insn);
1390 if (! constrain_operands (insn_code_number, 0))
1393 /* Must initialize this before main loop, because the code for
1394 the commutative case may set matches for operands other than
1396 for (operand_number = insn_n_operands[insn_code_number];
1397 --operand_number >= 0; )
1398 matchp->with[operand_number] = matchp->commutative[operand_number] = -1;
1400 for (operand_number = 0; operand_number < insn_n_operands[insn_code_number];
1406 p = insn_operand_constraint[insn_code_number][operand_number];
1408 likely_spilled[operand_number] = 0;
1409 matchp->use[operand_number] = READ;
1410 matchp->early_clobber[operand_number] = 0;
1412 matchp->use[operand_number] = WRITE;
1414 matchp->use[operand_number] = READWRITE;
1416 for (;*p && i < which_alternative; p++)
1420 while ((c = *p++) != '\0' && c != ',')
1428 matchp->early_clobber[operand_number] = 1;
1431 matchp->commutative[operand_number] = operand_number + 1;
1432 matchp->commutative[operand_number + 1] = operand_number;
1434 case '0': case '1': case '2': case '3': case '4':
1435 case '5': case '6': case '7': case '8': case '9':
1437 if (c < operand_number && likely_spilled[(unsigned char) c])
1439 matchp->with[operand_number] = c;
1441 if (matchp->commutative[operand_number] >= 0)
1442 matchp->with[matchp->commutative[operand_number]] = c;
1444 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1445 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1446 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1447 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1448 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER (c)))
1449 likely_spilled[operand_number] = 1;
1453 return any_matches ? insn_code_number : -1;
1456 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1457 the only set in INSN. INSN has just been recgnized and constrained.
1458 SRC is operand number OPERAND_NUMBER in INSN.
1459 DST is operand number MATCH_NUMBER in INSN.
1460 If BACKWARD is nonzero, we have been called in a backward pass.
1461 Return nonzero for success. */
1463 fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
1464 match_number, regmove_dump_file)
1465 rtx insn, set, src, src_subreg, dst;
1466 int backward, operand_number, match_number;
1467 FILE *regmove_dump_file;
1470 rtx post_inc = 0, post_inc_set = 0, search_end = 0;
1472 int num_calls = 0, s_num_calls = 0;
1473 enum rtx_code code = NOTE;
1474 HOST_WIDE_INT insn_const, newconst;
1475 rtx overlap = 0; /* need to move insn ? */
1476 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note;
1477 int length, s_length, true_loop_depth;
1481 /* Look for (set (regX) (op regA constX))
1482 (set (regY) (op regA constY))
1484 (set (regA) (op regA constX)).
1485 (set (regY) (op regA constY-constX)).
1486 This works for add and shift operations, if
1487 regA is dead after or set by the second insn. */
1489 code = GET_CODE (SET_SRC (set));
1490 if ((code == PLUS || code == LSHIFTRT
1491 || code == ASHIFT || code == ASHIFTRT)
1492 && XEXP (SET_SRC (set), 0) == src
1493 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
1494 insn_const = INTVAL (XEXP (SET_SRC (set), 1));
1495 else if (! stable_but_for_p (SET_SRC (set), src, dst))
1498 /* We might find a src_note while scanning. */
1502 if (regmove_dump_file)
1503 fprintf (regmove_dump_file,
1504 "Could fix operand %d of insn %d matching operand %d.\n",
1505 operand_number, INSN_UID (insn), match_number);
1507 /* If SRC is equivalent to a constant set in a different basic block,
1508 then do not use it for this optimization. We want the equivalence
1509 so that if we have to reload this register, we can reload the
1510 constant, rather than extending the lifespan of the register. */
1511 if (reg_is_remote_constant_p (src, insn, get_insns ()))
1514 /* Scan forward to find the next instruction that
1515 uses the output operand. If the operand dies here,
1516 then replace it in both instructions with
1519 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1521 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
1522 || (GET_CODE (p) == NOTE
1523 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1524 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1527 /* ??? We can't scan past the end of a basic block without updating
1528 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1529 A CALL_INSN might be the last insn of a basic block, if it is
1530 inside an EH region. There is no easy way to tell, so we just
1531 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1532 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1535 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1542 if (reg_set_p (src, p) || reg_set_p (dst, p)
1543 || (GET_CODE (PATTERN (p)) == USE
1544 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
1547 /* See if all of DST dies in P. This test is
1548 slightly more conservative than it needs to be. */
1549 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst)))
1550 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst)))
1557 /* If an optimization is done, the value of SRC while P
1558 is executed will be changed. Check that this is OK. */
1559 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1561 for (q = p; q; q = NEXT_INSN (q))
1563 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1564 || (GET_CODE (q) == NOTE
1565 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1566 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1572 /* ??? We can't scan past the end of a basic block without
1573 updating the register lifetime info
1574 (REG_DEAD/basic_block_live_at_start).
1575 A CALL_INSN might be the last insn of a basic block, if
1576 it is inside an EH region. There is no easy way to tell,
1577 so we just always break when we see a CALL_INSN if
1578 flag_exceptions is nonzero. */
1579 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1585 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1587 if (reg_overlap_mentioned_p (src, PATTERN (q))
1588 || reg_set_p (src, q))
1592 set2 = single_set (q);
1593 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code
1594 || XEXP (SET_SRC (set2), 0) != src
1595 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT
1596 || (SET_DEST (set2) != src
1597 && ! find_reg_note (q, REG_DEAD, src)))
1599 /* If this is a PLUS, we can still save a register by doing
1602 src -= insn_const; .
1603 This also gives opportunities for subsequent
1604 optimizations in the backward pass, so do it there. */
1605 if (code == PLUS && backward
1607 /* We may not emit an insn directly
1608 after P if the latter sets CC0. */
1609 && ! sets_cc0_p (PATTERN (p))
1617 newconst = -insn_const;
1625 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const;
1626 /* Reject out of range shifts. */
1630 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2))))))
1635 if (SET_DEST (set2) != src)
1636 post_inc_set = set2;
1639 /* We use 1 as last argument to validate_change so that all
1640 changes are accepted or rejected together by apply_change_group
1641 when it is called by validate_replace_rtx . */
1642 validate_change (q, &XEXP (SET_SRC (set2), 1),
1643 GEN_INT (newconst), 1);
1645 validate_change (insn, recog_operand_loc[match_number], src, 1);
1646 if (validate_replace_rtx (dst, src_subreg, p))
1651 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1653 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p)))
1655 /* INSN was already checked to be movable when
1656 we found no REG_DEAD note for src on it. */
1658 src_note = find_reg_note (p, REG_DEAD, src);
1661 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1662 already live across a call, then don't perform the optimization. */
1663 if (GET_CODE (p) == CALL_INSN)
1665 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1679 true_loop_depth = backward ? 2 - loop_depth : loop_depth;
1681 /* Remove the death note for DST from P. */
1682 remove_note (p, dst_note);
1685 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
1686 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1688 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
1691 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
1692 REG_N_SETS (REGNO (src))++;
1693 REG_N_REFS (REGNO (src)) += true_loop_depth;
1694 REG_LIVE_LENGTH (REGNO (src))++;
1698 /* The lifetime of src and dest overlap,
1699 but we can change this by moving insn. */
1700 rtx pat = PATTERN (insn);
1702 remove_note (overlap, src_note);
1703 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
1705 && try_auto_increment (overlap, insn, 0, src, insn_const, 0))
1710 rtx notes = REG_NOTES (insn);
1712 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
1713 PUT_CODE (insn, NOTE);
1714 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1715 NOTE_SOURCE_FILE (insn) = 0;
1716 /* emit_insn_after_with_line_notes has no
1717 return value, so search for the new insn. */
1718 for (insn = p; PATTERN (insn) != pat; )
1719 insn = PREV_INSN (insn);
1721 REG_NOTES (insn) = notes;
1724 /* Sometimes we'd generate src = const; src += n;
1725 if so, replace the instruction that set src
1726 in the first place. */
1728 if (! overlap && (code == PLUS || code == MINUS))
1730 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1732 int num_calls2 = 0, s_length2 = 0;
1734 if (note && CONSTANT_P (XEXP (note, 0)))
1736 for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
1738 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1739 || (GET_CODE (q) == NOTE
1740 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1741 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1747 /* ??? We can't scan past the end of a basic block without
1748 updating the register lifetime info
1749 (REG_DEAD/basic_block_live_at_start).
1750 A CALL_INSN might be the last insn of a basic block, if
1751 it is inside an EH region. There is no easy way to tell,
1752 so we just always break when we see a CALL_INSN if
1753 flag_exceptions is nonzero. */
1754 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1760 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1763 if (reg_set_p (src, q))
1765 set2 = single_set (q);
1768 if (reg_overlap_mentioned_p (src, PATTERN (q)))
1773 if (GET_CODE (p) == CALL_INSN)
1776 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
1777 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
1780 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
1781 NOTE_SOURCE_FILE (q) = 0;
1782 REG_N_SETS (REGNO (src))--;
1783 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
1784 REG_N_REFS (REGNO (src)) -= true_loop_depth;
1785 REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
1791 /* Don't remove this seemingly useless if, it is needed to pair with the
1792 else in the next two conditionally included code blocks. */
1795 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1796 else if ((code == PLUS || code == MINUS) && insn_const
1797 && try_auto_increment (p, insn, 0, src, insn_const, 1))
1800 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
1802 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
1805 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1806 /* If post_inc still prevails, try to find an
1807 insn where it can be used as a pre-in/decrement.
1808 If code is MINUS, this was already tried. */
1809 if (post_inc && code == PLUS
1810 /* Check that newconst is likely to be usable
1811 in a pre-in/decrement before starting the search. */
1813 #if defined (HAVE_PRE_INCREMENT)
1814 || (newconst > 0 && newconst <= MOVE_MAX)
1816 #if defined (HAVE_PRE_DECREMENT)
1817 || (newconst < 0 && newconst >= -MOVE_MAX)
1819 ) && exact_log2 (newconst))
1823 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src;
1824 for (q = post_inc; (q = NEXT_INSN (q)); )
1826 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1827 || (GET_CODE (q) == NOTE
1828 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1829 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1832 /* ??? We can't scan past the end of a basic block without updating
1833 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1834 A CALL_INSN might be the last insn of a basic block, if it
1835 is inside an EH region. There is no easy way to tell so we
1836 just always break when we see a CALL_INSN if flag_exceptions
1838 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1841 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1843 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q))
1844 || reg_set_p (src, q)))
1846 if (reg_set_p (inc_dest, q))
1848 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q)))
1850 try_auto_increment (q, post_inc,
1851 post_inc_set, inc_dest, newconst, 1);
1856 #endif /* defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) */
1857 /* Move the death note for DST to INSN if it is used
1859 if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
1861 XEXP (dst_note, 1) = REG_NOTES (insn);
1862 REG_NOTES (insn) = dst_note;
1867 /* Move the death note for SRC from INSN to P. */
1869 remove_note (insn, src_note);
1870 XEXP (src_note, 1) = REG_NOTES (p);
1871 REG_NOTES (p) = src_note;
1873 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls;
1876 REG_N_SETS (REGNO (src))++;
1877 REG_N_SETS (REGNO (dst))--;
1879 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls;
1881 REG_LIVE_LENGTH (REGNO (src)) += s_length;
1882 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0)
1884 REG_LIVE_LENGTH (REGNO (dst)) -= length;
1885 /* REG_LIVE_LENGTH is only an approximation after
1886 combine if sched is not run, so make sure that we
1887 still have a reasonable value. */
1888 if (REG_LIVE_LENGTH (REGNO (dst)) < 2)
1889 REG_LIVE_LENGTH (REGNO (dst)) = 2;
1892 /* We assume that a register is used exactly once per
1893 insn in the updates above. If this is not correct,
1894 no great harm is done. */
1896 REG_N_REFS (REGNO (src)) += 2 * true_loop_depth;
1897 REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth;
1899 /* If that was the only time dst was set,
1900 and dst was not live at the start of the
1901 function, we know that we have no more
1902 references to dst; clear REG_N_REFS so it
1903 won't make reload do any work. */
1904 if (REG_N_SETS (REGNO (dst)) == 0
1905 && ! regno_uninitialized (REGNO (dst)))
1906 REG_N_REFS (REGNO (dst)) = 0;
1908 if (regmove_dump_file)
1909 fprintf (regmove_dump_file,
1910 "Fixed operand %d of insn %d matching operand %d.\n",
1911 operand_number, INSN_UID (insn), match_number);
1916 /* return nonzero if X is stable but for mentioning SRC or mentioning /
1917 changing DST . If in doubt, presume it is unstable. */
1919 stable_but_for_p (x, src, dst)
1922 RTX_CODE code = GET_CODE (x);
1923 switch (GET_RTX_CLASS (code))
1925 case '<': case '1': case 'c': case '2': case 'b': case '3':
1928 char *fmt = GET_RTX_FORMAT (code);
1929 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1930 if (fmt[i] == 'e' && ! stable_but_for_p (XEXP (x, i), src, dst))
1935 if (x == src || x == dst)
1939 return ! rtx_unstable_p (x);
1943 /* Test if regmove seems profitable for this target. Regmove is useful only
1944 if some common patterns are two address, i.e. require matching constraints,
1945 so we check that condition here. */
1948 regmove_profitable_p ()
1950 #ifdef REGISTER_CONSTRAINTS
1952 enum machine_mode mode;
1953 optab tstoptab = add_optab;
1954 do /* check add_optab and ashl_optab */
1955 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1956 mode = GET_MODE_WIDER_MODE (mode))
1958 int icode = (int) tstoptab->handlers[(int) mode].insn_code;
1959 rtx reg0, reg1, reg2, pat;
1962 if (GET_MODE_BITSIZE (mode) < 32 || icode == CODE_FOR_nothing)
1964 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1965 if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i))
1967 if (i + 2 >= FIRST_PSEUDO_REGISTER)
1969 reg0 = gen_rtx_REG (insn_operand_mode[icode][0], i);
1970 reg1 = gen_rtx_REG (insn_operand_mode[icode][1], i + 1);
1971 reg2 = gen_rtx_REG (insn_operand_mode[icode][2], i + 2);
1972 if (! (*insn_operand_predicate[icode][0]) (reg0, VOIDmode)
1973 || ! (*insn_operand_predicate[icode][1]) (reg1, VOIDmode)
1974 || ! (*insn_operand_predicate[icode][2]) (reg2, VOIDmode))
1976 pat = GEN_FCN (icode) (reg0, reg1, reg2);
1979 if (GET_CODE (pat) == SEQUENCE)
1980 pat = XVECEXP (pat, 0, XVECLEN (pat, 0) - 1);
1982 pat = make_insn_raw (pat);
1983 if (! single_set (pat)
1984 || GET_CODE (SET_SRC (single_set (pat))) != tstoptab->code)
1985 /* Unexpected complexity; don't need to handle this unless
1986 we find a machine where this occurs and regmove should
1989 if (find_matches (pat, &match) >= 0)
1993 while (tstoptab != ashl_optab && (tstoptab = ashl_optab, 1));
1994 #endif /* REGISTER_CONSTRAINTS */