1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This module makes some simple RTL code transformations which
24 improve the subsequent register allocation. */
28 #include "coretypes.h"
30 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
32 #include "insn-config.h"
36 #include "hard-reg-set.h"
40 #include "basic-block.h"
45 #include "tree-pass.h"
49 static int optimize_reg_copy_1 (rtx, rtx, rtx);
50 static void optimize_reg_copy_2 (rtx, rtx, rtx);
51 static void optimize_reg_copy_3 (rtx, rtx, rtx);
52 static void copy_src_to_dest (rtx, rtx, rtx);
62 int with[MAX_RECOG_OPERANDS];
63 enum match_use use[MAX_RECOG_OPERANDS];
64 int commutative[MAX_RECOG_OPERANDS];
65 int early_clobber[MAX_RECOG_OPERANDS];
68 static int find_matches (rtx, struct match *);
69 static int fixup_match_2 (rtx, rtx, rtx, rtx);
71 /* Return nonzero if registers with CLASS1 and CLASS2 can be merged without
72 causing too much register allocation problems. */
74 regclass_compatible_p (enum reg_class class0, enum reg_class class1)
76 return (class0 == class1
77 || (reg_class_subset_p (class0, class1)
78 && ! CLASS_LIKELY_SPILLED_P (class0))
79 || (reg_class_subset_p (class1, class0)
80 && ! CLASS_LIKELY_SPILLED_P (class1)));
86 /* Find the place in the rtx X where REG is used as a memory address.
87 Return the MEM rtx that so uses it.
88 If PLUSCONST is nonzero, search instead for a memory address equivalent to
89 (plus REG (const_int PLUSCONST)).
91 If such an address does not appear, return 0.
92 If REG appears more than once, or is used other than in such an address,
96 find_use_as_address (rtx x, rtx reg, HOST_WIDE_INT plusconst)
98 enum rtx_code code = GET_CODE (x);
99 const char * const fmt = GET_RTX_FORMAT (code);
104 if (code == MEM && XEXP (x, 0) == reg && plusconst == 0)
107 if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
108 && XEXP (XEXP (x, 0), 0) == reg
109 && CONST_INT_P (XEXP (XEXP (x, 0), 1))
110 && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst)
113 if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
115 /* If REG occurs inside a MEM used in a bit-field reference,
116 that is unacceptable. */
117 if (find_use_as_address (XEXP (x, 0), reg, 0) != 0)
118 return (rtx) (size_t) 1;
122 return (rtx) (size_t) 1;
124 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
128 tem = find_use_as_address (XEXP (x, i), reg, plusconst);
132 return (rtx) (size_t) 1;
134 else if (fmt[i] == 'E')
137 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
139 tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst);
143 return (rtx) (size_t) 1;
152 /* INC_INSN is an instruction that adds INCREMENT to REG.
153 Try to fold INC_INSN as a post/pre in/decrement into INSN.
154 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
155 Return nonzero for success. */
157 try_auto_increment (rtx insn, rtx inc_insn, rtx inc_insn_set, rtx reg,
158 HOST_WIDE_INT increment, int pre)
160 enum rtx_code inc_code;
162 rtx pset = single_set (insn);
165 /* Can't use the size of SET_SRC, we might have something like
166 (sign_extend:SI (mem:QI ... */
167 rtx use = find_use_as_address (pset, reg, 0);
168 if (use != 0 && use != (rtx) (size_t) 1)
170 int size = GET_MODE_SIZE (GET_MODE (use));
172 || (HAVE_POST_INCREMENT
173 && pre == 0 && (inc_code = POST_INC, increment == size))
174 || (HAVE_PRE_INCREMENT
175 && pre == 1 && (inc_code = PRE_INC, increment == size))
176 || (HAVE_POST_DECREMENT
177 && pre == 0 && (inc_code = POST_DEC, increment == -size))
178 || (HAVE_PRE_DECREMENT
179 && pre == 1 && (inc_code = PRE_DEC, increment == -size))
185 &SET_SRC (inc_insn_set),
186 XEXP (SET_SRC (inc_insn_set), 0), 1);
187 validate_change (insn, &XEXP (use, 0),
188 gen_rtx_fmt_e (inc_code,
189 GET_MODE (XEXP (use, 0)), reg),
191 if (apply_change_group ())
193 /* If there is a REG_DEAD note on this insn, we must
194 change this not to REG_UNUSED meaning that the register
195 is set, but the value is dead. Failure to do so will
196 result in sched1 dying -- when it recomputes lifetime
197 information, the number of REG_DEAD notes will have
199 rtx note = find_reg_note (insn, REG_DEAD, reg);
201 PUT_REG_NOTE_KIND (note, REG_UNUSED);
203 add_reg_note (insn, REG_INC, reg);
206 delete_insn (inc_insn);
217 static int *regno_src_regno;
219 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
222 Search forward to see if SRC dies before either it or DEST is modified,
223 but don't scan past the end of a basic block. If so, we can replace SRC
224 with DEST and let SRC die in INSN.
226 This will reduce the number of registers live in that range and may enable
227 DEST to be tied to SRC, thus often saving one register in addition to a
228 register-register copy. */
231 optimize_reg_copy_1 (rtx insn, rtx dest, rtx src)
236 int sregno = REGNO (src);
237 int dregno = REGNO (dest);
238 basic_block bb = BLOCK_FOR_INSN (insn);
240 /* We don't want to mess with hard regs if register classes are small. */
242 || (SMALL_REGISTER_CLASSES
243 && (sregno < FIRST_PSEUDO_REGISTER
244 || dregno < FIRST_PSEUDO_REGISTER))
245 /* We don't see all updates to SP if they are in an auto-inc memory
246 reference, so we must disallow this optimization on them. */
247 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
250 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
254 if (BLOCK_FOR_INSN (p) != bb)
257 if (reg_set_p (src, p) || reg_set_p (dest, p)
258 /* If SRC is an asm-declared register, it must not be replaced
259 in any asm. Unfortunately, the REG_EXPR tree for the asm
260 variable may be absent in the SRC rtx, so we can't check the
261 actual register declaration easily (the asm operand will have
262 it, though). To avoid complicating the test for a rare case,
263 we just don't perform register replacement for a hard reg
264 mentioned in an asm. */
265 || (sregno < FIRST_PSEUDO_REGISTER
266 && asm_noperands (PATTERN (p)) >= 0
267 && reg_overlap_mentioned_p (src, PATTERN (p)))
268 /* Don't change hard registers used by a call. */
269 || (CALL_P (p) && sregno < FIRST_PSEUDO_REGISTER
270 && find_reg_fusage (p, USE, src))
271 /* Don't change a USE of a register. */
272 || (GET_CODE (PATTERN (p)) == USE
273 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
276 /* See if all of SRC dies in P. This test is slightly more
277 conservative than it needs to be. */
278 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
279 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
286 int s_freq_calls = 0;
287 int d_freq_calls = 0;
289 /* We can do the optimization. Scan forward from INSN again,
290 replacing regs as we go. Set FAILED if a replacement can't
291 be done. In that case, we can't move the death note for SRC.
292 This should be rare. */
294 /* Set to stop at next insn. */
295 for (q = next_real_insn (insn);
296 q != next_real_insn (p);
297 q = next_real_insn (q))
299 if (reg_overlap_mentioned_p (src, PATTERN (q)))
301 /* If SRC is a hard register, we might miss some
302 overlapping registers with validate_replace_rtx,
303 so we would have to undo it. We can't if DEST is
304 present in the insn, so fail in that combination
306 if (sregno < FIRST_PSEUDO_REGISTER
307 && reg_mentioned_p (dest, PATTERN (q)))
310 /* Attempt to replace all uses. */
311 else if (!validate_replace_rtx (src, dest, q))
314 /* If this succeeded, but some part of the register
315 is still present, undo the replacement. */
316 else if (sregno < FIRST_PSEUDO_REGISTER
317 && reg_overlap_mentioned_p (src, PATTERN (q)))
319 validate_replace_rtx (dest, src, q);
324 /* For SREGNO, count the total number of insns scanned.
325 For DREGNO, count the total number of insns scanned after
326 passing the death note for DREGNO. */
327 if (!DEBUG_INSN_P (p))
334 /* If the insn in which SRC dies is a CALL_INSN, don't count it
335 as a call that has been crossed. Otherwise, count it. */
336 if (q != p && CALL_P (q))
338 /* Similarly, total calls for SREGNO, total calls beyond
339 the death note for DREGNO. */
341 s_freq_calls += REG_FREQ_FROM_BB (BLOCK_FOR_INSN (q));
345 d_freq_calls += REG_FREQ_FROM_BB (BLOCK_FOR_INSN (q));
349 /* If DEST dies here, remove the death note and save it for
350 later. Make sure ALL of DEST dies here; again, this is
351 overly conservative. */
353 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
355 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
356 failed = 1, dest_death = 0;
358 remove_note (q, dest_death);
364 /* These counters need to be updated if and only if we are
365 going to move the REG_DEAD note. */
366 if (sregno >= FIRST_PSEUDO_REGISTER)
368 if (REG_LIVE_LENGTH (sregno) >= 0)
370 REG_LIVE_LENGTH (sregno) -= s_length;
371 /* REG_LIVE_LENGTH is only an approximation after
372 combine if sched is not run, so make sure that we
373 still have a reasonable value. */
374 if (REG_LIVE_LENGTH (sregno) < 2)
375 REG_LIVE_LENGTH (sregno) = 2;
378 REG_N_CALLS_CROSSED (sregno) -= s_n_calls;
379 REG_FREQ_CALLS_CROSSED (sregno) -= s_freq_calls;
382 /* Move death note of SRC from P to INSN. */
383 remove_note (p, note);
384 XEXP (note, 1) = REG_NOTES (insn);
385 REG_NOTES (insn) = note;
388 /* DEST is also dead if INSN has a REG_UNUSED note for DEST. */
390 && (dest_death = find_regno_note (insn, REG_UNUSED, dregno)))
392 PUT_REG_NOTE_KIND (dest_death, REG_DEAD);
393 remove_note (insn, dest_death);
396 /* Put death note of DEST on P if we saw it die. */
399 XEXP (dest_death, 1) = REG_NOTES (p);
400 REG_NOTES (p) = dest_death;
402 if (dregno >= FIRST_PSEUDO_REGISTER)
404 /* If and only if we are moving the death note for DREGNO,
405 then we need to update its counters. */
406 if (REG_LIVE_LENGTH (dregno) >= 0)
407 REG_LIVE_LENGTH (dregno) += d_length;
408 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
409 REG_FREQ_CALLS_CROSSED (dregno) += d_freq_calls;
416 /* If SRC is a hard register which is set or killed in some other
417 way, we can't do this optimization. */
418 else if (sregno < FIRST_PSEUDO_REGISTER
419 && dead_or_set_p (p, src))
425 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
426 a sequence of insns that modify DEST followed by an insn that sets
427 SRC to DEST in which DEST dies, with no prior modification of DEST.
428 (There is no need to check if the insns in between actually modify
429 DEST. We should not have cases where DEST is not modified, but
430 the optimization is safe if no such modification is detected.)
431 In that case, we can replace all uses of DEST, starting with INSN and
432 ending with the set of SRC to DEST, with SRC. We do not do this
433 optimization if a CALL_INSN is crossed unless SRC already crosses a
434 call or if DEST dies before the copy back to SRC.
436 It is assumed that DEST and SRC are pseudos; it is too complicated to do
437 this for hard registers since the substitutions we may make might fail. */
440 optimize_reg_copy_2 (rtx insn, rtx dest, rtx src)
444 int sregno = REGNO (src);
445 int dregno = REGNO (dest);
446 basic_block bb = BLOCK_FOR_INSN (insn);
448 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
452 if (BLOCK_FOR_INSN (p) != bb)
455 set = single_set (p);
456 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
457 && find_reg_note (p, REG_DEAD, dest))
459 /* We can do the optimization. Scan forward from INSN again,
460 replacing regs as we go. */
462 /* Set to stop at next insn. */
463 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
466 if (reg_mentioned_p (dest, PATTERN (q)))
470 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
471 note = FIND_REG_INC_NOTE (q, dest);
474 remove_note (q, note);
475 add_reg_note (q, REG_INC, src);
482 int freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (q));
483 REG_N_CALLS_CROSSED (dregno)--;
484 REG_N_CALLS_CROSSED (sregno)++;
485 REG_FREQ_CALLS_CROSSED (dregno) -= freq;
486 REG_FREQ_CALLS_CROSSED (sregno) += freq;
490 remove_note (p, find_reg_note (p, REG_DEAD, dest));
491 REG_N_DEATHS (dregno)--;
492 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
493 REG_N_DEATHS (sregno)--;
497 if (reg_set_p (src, p)
498 || find_reg_note (p, REG_DEAD, dest)
499 || (CALL_P (p) && REG_N_CALLS_CROSSED (sregno) == 0))
504 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
505 Look if SRC dies there, and if it is only set once, by loading
506 it from memory. If so, try to incorporate the zero/sign extension
507 into the memory read, change SRC to the mode of DEST, and alter
508 the remaining accesses to use the appropriate SUBREG. This allows
509 SRC and DEST to be tied later. */
511 optimize_reg_copy_3 (rtx insn, rtx dest, rtx src)
513 rtx src_reg = XEXP (src, 0);
514 int src_no = REGNO (src_reg);
515 int dst_no = REGNO (dest);
517 enum machine_mode old_mode;
518 basic_block bb = BLOCK_FOR_INSN (insn);
520 if (src_no < FIRST_PSEUDO_REGISTER
521 || dst_no < FIRST_PSEUDO_REGISTER
522 || ! find_reg_note (insn, REG_DEAD, src_reg)
523 || REG_N_DEATHS (src_no) != 1
524 || REG_N_SETS (src_no) != 1)
527 for (p = PREV_INSN (insn); p && ! reg_set_p (src_reg, p); p = PREV_INSN (p))
528 if (INSN_P (p) && BLOCK_FOR_INSN (p) != bb)
531 if (! p || BLOCK_FOR_INSN (p) != bb)
534 if (! (set = single_set (p))
535 || !MEM_P (SET_SRC (set))
536 /* If there's a REG_EQUIV note, this must be an insn that loads an
537 argument. Prefer keeping the note over doing this optimization. */
538 || find_reg_note (p, REG_EQUIV, NULL_RTX)
539 || SET_DEST (set) != src_reg)
542 /* Be conservative: although this optimization is also valid for
543 volatile memory references, that could cause trouble in later passes. */
544 if (MEM_VOLATILE_P (SET_SRC (set)))
547 /* Do not use a SUBREG to truncate from one mode to another if truncation
549 if (GET_MODE_BITSIZE (GET_MODE (src_reg)) <= GET_MODE_BITSIZE (GET_MODE (src))
550 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src)),
551 GET_MODE_BITSIZE (GET_MODE (src_reg))))
554 old_mode = GET_MODE (src_reg);
555 PUT_MODE (src_reg, GET_MODE (src));
556 XEXP (src, 0) = SET_SRC (set);
558 /* Include this change in the group so that it's easily undone if
559 one of the changes in the group is invalid. */
560 validate_change (p, &SET_SRC (set), src, 1);
562 /* Now walk forward making additional replacements. We want to be able
563 to undo all the changes if a later substitution fails. */
564 while (p = NEXT_INSN (p), p != insn)
569 /* Make a tentative change. */
570 validate_replace_rtx_group (src_reg,
571 gen_lowpart_SUBREG (old_mode, src_reg),
575 validate_replace_rtx_group (src, src_reg, insn);
577 /* Now see if all the changes are valid. */
578 if (! apply_change_group ())
580 /* One or more changes were no good. Back out everything. */
581 PUT_MODE (src_reg, old_mode);
582 XEXP (src, 0) = src_reg;
586 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
588 remove_note (p, note);
593 /* If we were not able to update the users of src to use dest directly, try
594 instead moving the value to dest directly before the operation. */
597 copy_src_to_dest (rtx insn, rtx src, rtx dest)
611 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
612 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
613 parameter when there is no frame pointer that is not allocated a register.
614 For now, we just reject them, rather than incrementing the live length. */
617 && REG_LIVE_LENGTH (REGNO (src)) > 0
619 && REG_LIVE_LENGTH (REGNO (dest)) > 0
620 && (set = single_set (insn)) != NULL_RTX
621 && !reg_mentioned_p (dest, SET_SRC (set))
622 && GET_MODE (src) == GET_MODE (dest))
624 int old_num_regs = reg_rtx_no;
626 /* Generate the src->dest move. */
628 emit_move_insn (dest, src);
631 /* If this sequence uses new registers, we may not use it. */
632 if (old_num_regs != reg_rtx_no
633 || ! validate_replace_rtx (src, dest, insn))
635 /* We have to restore reg_rtx_no to its old value, lest
636 recompute_reg_usage will try to compute the usage of the
637 new regs, yet reg_n_info is not valid for them. */
638 reg_rtx_no = old_num_regs;
641 emit_insn_before (seq, insn);
642 move_insn = PREV_INSN (insn);
643 p_move_notes = ®_NOTES (move_insn);
644 p_insn_notes = ®_NOTES (insn);
646 /* Move any notes mentioning src to the move instruction. */
647 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
649 next = XEXP (link, 1);
650 if (XEXP (link, 0) == src)
652 *p_move_notes = link;
653 p_move_notes = &XEXP (link, 1);
657 *p_insn_notes = link;
658 p_insn_notes = &XEXP (link, 1);
662 *p_move_notes = NULL_RTX;
663 *p_insn_notes = NULL_RTX;
665 insn_uid = INSN_UID (insn);
666 move_uid = INSN_UID (move_insn);
668 /* Update the various register tables. */
669 dest_regno = REGNO (dest);
670 INC_REG_N_SETS (dest_regno, 1);
671 REG_LIVE_LENGTH (dest_regno)++;
672 src_regno = REGNO (src);
673 if (! find_reg_note (move_insn, REG_DEAD, src))
674 REG_LIVE_LENGTH (src_regno)++;
678 /* reg_set_in_bb[REGNO] points to basic block iff the register is set
679 only once in the given block and has REG_EQUAL note. */
681 static basic_block *reg_set_in_bb;
683 /* Size of reg_set_in_bb array. */
684 static unsigned int max_reg_computed;
687 /* Return whether REG is set in only one location, and is set to a
688 constant, but is set in a different basic block from INSN (an
689 instructions which uses REG). In this case REG is equivalent to a
690 constant, and we don't want to break that equivalence, because that
691 may increase register pressure and make reload harder. If REG is
692 set in the same basic block as INSN, we don't worry about it,
693 because we'll probably need a register anyhow (??? but what if REG
694 is used in a different basic block as well as this one?). */
697 reg_is_remote_constant_p (rtx reg, rtx insn)
705 max_reg_computed = max = max_reg_num ();
706 reg_set_in_bb = XCNEWVEC (basic_block, max);
716 /* This is the instruction which sets REG. If there is a
717 REG_EQUAL note, then REG is equivalent to a constant. */
719 && REG_P (SET_DEST (s))
720 && REG_N_SETS (REGNO (SET_DEST (s))) == 1
721 && find_reg_note (p, REG_EQUAL, NULL_RTX))
722 reg_set_in_bb[REGNO (SET_DEST (s))] = bb;
726 gcc_assert (REGNO (reg) < max_reg_computed);
727 if (reg_set_in_bb[REGNO (reg)] == NULL)
729 return (reg_set_in_bb[REGNO (reg)] != BLOCK_FOR_INSN (insn));
732 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
733 another add immediate instruction with the same source and dest registers,
734 and if we find one, we change INSN to an increment, and return 1. If
735 no changes are made, we return 0.
738 (set (reg100) (plus reg1 offset1))
740 (set (reg100) (plus reg1 offset2))
742 (set (reg100) (plus reg1 offset1))
744 (set (reg100) (plus reg100 offset2-offset1)) */
746 /* ??? What does this comment mean? */
747 /* cse disrupts preincrement / postdecrement sequences when it finds a
748 hard register as ultimate source, like the frame pointer. */
751 fixup_match_2 (rtx insn, rtx dst, rtx src, rtx offset)
753 rtx p, dst_death = 0;
754 int length, num_calls = 0, freq_calls = 0;
755 basic_block bb = BLOCK_FOR_INSN (insn);
757 /* If SRC dies in INSN, we'd have to move the death note. This is
758 considered to be very unlikely, so we just skip the optimization
760 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
763 /* Scan backward to find the first instruction that sets DST. */
765 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
771 if (BLOCK_FOR_INSN (p) != bb)
774 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
776 if (! dst_death && !DEBUG_INSN_P (p))
779 pset = single_set (p);
780 if (pset && SET_DEST (pset) == dst
781 && GET_CODE (SET_SRC (pset)) == PLUS
782 && XEXP (SET_SRC (pset), 0) == src
783 && CONST_INT_P (XEXP (SET_SRC (pset), 1)))
785 HOST_WIDE_INT newconst
786 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
787 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
789 if (add && validate_change (insn, &PATTERN (insn), add, 0))
791 /* Remove the death note for DST from DST_DEATH. */
794 remove_death (REGNO (dst), dst_death);
795 REG_LIVE_LENGTH (REGNO (dst)) += length;
796 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
797 REG_FREQ_CALLS_CROSSED (REGNO (dst)) += freq_calls;
802 "Fixed operand of insn %d.\n",
806 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
810 if (BLOCK_FOR_INSN (p) != bb)
812 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
814 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
819 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
823 if (BLOCK_FOR_INSN (p) != bb)
825 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
827 try_auto_increment (p, insn, 0, dst, newconst, 1);
836 if (reg_set_p (dst, PATTERN (p)))
839 /* If we have passed a call instruction, and the
840 pseudo-reg SRC is not already live across a call,
841 then don't perform the optimization. */
842 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
843 hard regs are clobbered. Thus, we only use it for src for
850 freq_calls += REG_FREQ_FROM_BB (BLOCK_FOR_INSN (p));
853 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
856 if (call_used_regs [REGNO (dst)]
857 || find_reg_fusage (p, CLOBBER, dst))
860 else if (reg_set_p (src, PATTERN (p)))
867 /* A forward pass. Replace output operands with input operands. */
870 regmove_forward_pass (void)
875 if (! flag_expensive_optimizations)
879 fprintf (dump_file, "Starting forward pass...\n");
883 FOR_BB_INSNS (bb, insn)
885 rtx set = single_set (insn);
889 if ((GET_CODE (SET_SRC (set)) == SIGN_EXTEND
890 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
891 && REG_P (XEXP (SET_SRC (set), 0))
892 && REG_P (SET_DEST (set)))
893 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
895 if (REG_P (SET_SRC (set))
896 && REG_P (SET_DEST (set)))
898 /* If this is a register-register copy where SRC is not dead,
899 see if we can optimize it. If this optimization succeeds,
900 it will become a copy where SRC is dead. */
901 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
902 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
903 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
905 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
906 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
907 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
908 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
909 && SET_SRC (set) != SET_DEST (set))
911 int srcregno = REGNO (SET_SRC (set));
912 if (regno_src_regno[srcregno] >= 0)
913 srcregno = regno_src_regno[srcregno];
914 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
922 /* A backward pass. Replace input operands with output operands. */
925 regmove_backward_pass (void)
931 fprintf (dump_file, "Starting backward pass...\n");
933 FOR_EACH_BB_REVERSE (bb)
935 /* ??? Use the safe iterator because fixup_match_2 can remove
936 insns via try_auto_increment. */
937 FOR_BB_INSNS_REVERSE_SAFE (bb, insn, prev)
940 rtx copy_src, copy_dst;
947 if (! find_matches (insn, &match))
950 /* Now scan through the operands looking for a destination operand
951 which is supposed to match a source operand.
952 Then scan backward for an instruction which sets the source
953 operand. If safe, then replace the source operand with the
954 dest operand in both instructions. */
958 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
960 rtx set, p, src, dst;
961 rtx src_note, dst_note;
962 int num_calls = 0, freq_calls = 0;
963 enum reg_class src_class, dst_class;
966 match_no = match.with[op_no];
968 /* Nothing to do if the two operands aren't supposed to match. */
972 dst = recog_data.operand[match_no];
973 src = recog_data.operand[op_no];
979 || REGNO (dst) < FIRST_PSEUDO_REGISTER
980 || REG_LIVE_LENGTH (REGNO (dst)) < 0
981 || GET_MODE (src) != GET_MODE (dst))
984 /* If the operands already match, then there is nothing to do. */
985 if (operands_match_p (src, dst))
988 if (match.commutative[op_no] >= 0)
990 rtx comm = recog_data.operand[match.commutative[op_no]];
991 if (operands_match_p (comm, dst))
995 set = single_set (insn);
999 /* Note that single_set ignores parts of a parallel set for
1000 which one of the destinations is REG_UNUSED. We can't
1001 handle that here, since we can wind up rewriting things
1002 such that a single register is set twice within a single
1004 if (reg_set_p (src, insn))
1007 /* match_no/dst must be a write-only operand, and
1008 operand_operand/src must be a read-only operand. */
1009 if (match.use[op_no] != READ
1010 || match.use[match_no] != WRITE)
1013 if (match.early_clobber[match_no]
1014 && count_occurrences (PATTERN (insn), src, 0) > 1)
1017 /* Make sure match_no is the destination. */
1018 if (recog_data.operand[match_no] != SET_DEST (set))
1021 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1023 if (GET_CODE (SET_SRC (set)) == PLUS
1024 && CONST_INT_P (XEXP (SET_SRC (set), 1))
1025 && XEXP (SET_SRC (set), 0) == src
1026 && fixup_match_2 (insn, dst, src,
1027 XEXP (SET_SRC (set), 1)))
1031 src_class = reg_preferred_class (REGNO (src));
1032 dst_class = reg_preferred_class (REGNO (dst));
1034 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1036 /* We used to force the copy here like in other cases, but
1037 it produces worse code, as it eliminates no copy
1038 instructions and the copy emitted will be produced by
1039 reload anyway. On patterns with multiple alternatives,
1040 there may be better solution available.
1042 In particular this change produced slower code for numeric
1048 if (! regclass_compatible_p (src_class, dst_class))
1058 /* Can not modify an earlier insn to set dst if this insn
1059 uses an old value in the source. */
1060 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1070 /* If src is set once in a different basic block,
1071 and is set equal to a constant, then do not use
1072 it for this optimization, as this would make it
1073 no longer equivalent to a constant. */
1075 if (reg_is_remote_constant_p (src, insn))
1088 "Could fix operand %d of insn %d matching operand %d.\n",
1089 op_no, INSN_UID (insn), match_no);
1091 /* Scan backward to find the first instruction that uses
1092 the input operand. If the operand is set here, then
1093 replace it in both instructions with match_no. */
1095 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1101 if (BLOCK_FOR_INSN (p) != bb)
1104 if (!DEBUG_INSN_P (p))
1107 /* ??? See if all of SRC is set in P. This test is much
1108 more conservative than it needs to be. */
1109 pset = single_set (p);
1110 if (pset && SET_DEST (pset) == src)
1112 /* We use validate_replace_rtx, in case there
1113 are multiple identical source operands. All
1114 of them have to be changed at the same time:
1115 when validate_replace_rtx() calls
1116 apply_change_group(). */
1117 validate_change (p, &SET_DEST (pset), dst, 1);
1118 if (validate_replace_rtx (src, dst, insn))
1123 /* We can't make this change if DST is mentioned at
1124 all in P, since we are going to change its value.
1125 We can't make this change if SRC is read or
1126 partially written in P, since we are going to
1127 eliminate SRC. However, if it's a debug insn, we
1128 can't refrain from making the change, for this
1129 would cause codegen differences, so instead we
1130 invalidate debug expressions that reference DST,
1131 and adjust references to SRC in them so that they
1132 become references to DST. */
1133 if (reg_mentioned_p (dst, PATTERN (p)))
1135 if (DEBUG_INSN_P (p))
1136 validate_change (p, &INSN_VAR_LOCATION_LOC (p),
1137 gen_rtx_UNKNOWN_VAR_LOC (), 1);
1141 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1143 if (DEBUG_INSN_P (p))
1144 validate_replace_rtx_group (src, dst, p);
1149 /* If we have passed a call instruction, and the
1150 pseudo-reg DST is not already live across a call,
1151 then don't perform the optimization. */
1155 freq_calls += REG_FREQ_FROM_BB (BLOCK_FOR_INSN (p));
1157 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1166 /* Remove the death note for SRC from INSN. */
1167 remove_note (insn, src_note);
1168 /* Move the death note for SRC to P if it is used
1170 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1172 XEXP (src_note, 1) = REG_NOTES (p);
1173 REG_NOTES (p) = src_note;
1175 /* If there is a REG_DEAD note for DST on P, then remove
1176 it, because DST is now set there. */
1177 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1178 remove_note (p, dst_note);
1180 dstno = REGNO (dst);
1181 srcno = REGNO (src);
1183 INC_REG_N_SETS (dstno, 1);
1184 INC_REG_N_SETS (srcno, -1);
1186 REG_N_CALLS_CROSSED (dstno) += num_calls;
1187 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1188 REG_FREQ_CALLS_CROSSED (dstno) += freq_calls;
1189 REG_FREQ_CALLS_CROSSED (srcno) -= freq_calls;
1191 REG_LIVE_LENGTH (dstno) += length;
1192 if (REG_LIVE_LENGTH (srcno) >= 0)
1194 REG_LIVE_LENGTH (srcno) -= length;
1195 /* REG_LIVE_LENGTH is only an approximation after
1196 combine if sched is not run, so make sure that we
1197 still have a reasonable value. */
1198 if (REG_LIVE_LENGTH (srcno) < 2)
1199 REG_LIVE_LENGTH (srcno) = 2;
1204 "Fixed operand %d of insn %d matching operand %d.\n",
1205 op_no, INSN_UID (insn), match_no);
1209 else if (num_changes_pending () > 0)
1213 /* If we weren't able to replace any of the alternatives, try an
1214 alternative approach of copying the source to the destination. */
1215 if (!success && copy_src != NULL_RTX)
1216 copy_src_to_dest (insn, copy_src, copy_dst);
1221 /* Main entry for the register move optimization. */
1224 regmove_optimize (void)
1227 int nregs = max_reg_num ();
1229 df_note_add_problem ();
1232 if (flag_ira_loop_pressure)
1233 ira_set_pseudo_classes (dump_file);
1235 regstat_init_n_sets_and_refs ();
1236 regstat_compute_ri ();
1238 regno_src_regno = XNEWVEC (int, nregs);
1239 for (i = nregs; --i >= 0; )
1240 regno_src_regno[i] = -1;
1242 /* A forward pass. Replace output operands with input operands. */
1243 regmove_forward_pass ();
1245 /* A backward pass. Replace input operands with output operands. */
1246 regmove_backward_pass ();
1249 free (regno_src_regno);
1252 free (reg_set_in_bb);
1253 reg_set_in_bb = NULL;
1255 regstat_free_n_sets_and_refs ();
1257 if (flag_ira_loop_pressure)
1262 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1263 Returns 0 if INSN can't be recognized, or if the alternative can't be
1266 Initialize the info in MATCHP based on the constraints. */
1269 find_matches (rtx insn, struct match *matchp)
1271 int likely_spilled[MAX_RECOG_OPERANDS];
1273 int any_matches = 0;
1275 extract_insn (insn);
1276 if (! constrain_operands (0))
1279 /* Must initialize this before main loop, because the code for
1280 the commutative case may set matches for operands other than
1282 for (op_no = recog_data.n_operands; --op_no >= 0; )
1283 matchp->with[op_no] = matchp->commutative[op_no] = -1;
1285 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1291 p = recog_data.constraints[op_no];
1293 likely_spilled[op_no] = 0;
1294 matchp->use[op_no] = READ;
1295 matchp->early_clobber[op_no] = 0;
1297 matchp->use[op_no] = WRITE;
1299 matchp->use[op_no] = READWRITE;
1301 for (;*p && i < which_alternative; p++)
1305 while ((c = *p) != '\0' && c != ',')
1314 matchp->early_clobber[op_no] = 1;
1317 matchp->commutative[op_no] = op_no + 1;
1318 matchp->commutative[op_no + 1] = op_no;
1321 case '0': case '1': case '2': case '3': case '4':
1322 case '5': case '6': case '7': case '8': case '9':
1325 unsigned long match_ul = strtoul (p, &end, 10);
1326 int match = match_ul;
1330 if (match < op_no && likely_spilled[match])
1332 matchp->with[op_no] = match;
1334 if (matchp->commutative[op_no] >= 0)
1335 matchp->with[matchp->commutative[op_no]] = match;
1339 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1340 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1341 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1342 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1343 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_CONSTRAINT ((unsigned char) c, p) ))
1344 likely_spilled[op_no] = 1;
1347 p += CONSTRAINT_LEN (c, p);
1356 gate_handle_regmove (void)
1358 return (optimize > 0 && flag_regmove);
1362 struct rtl_opt_pass pass_regmove =
1366 "regmove", /* name */
1367 gate_handle_regmove, /* gate */
1368 regmove_optimize, /* execute */
1371 0, /* static_pass_number */
1372 TV_REGMOVE, /* tv_id */
1373 0, /* properties_required */
1374 0, /* properties_provided */
1375 0, /* properties_destroyed */
1376 0, /* todo_flags_start */
1377 TODO_df_finish | TODO_verify_rtl_sharing |
1379 TODO_ggc_collect /* todo_flags_finish */