1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
159 #include "function.h"
160 #include "insn-config.h"
162 #include "hard-reg-set.h"
167 #include "basic-block.h"
172 /* We use this array to cache info about insns, because otherwise we
173 spend too much time in stack_regs_mentioned_p.
175 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
176 the insn uses stack registers, two indicates the insn does not use
178 static GTY(()) varray_type stack_regs_mentioned_data;
182 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
184 /* This is the basic stack record. TOP is an index into REG[] such
185 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
187 If TOP is -2, REG[] is not yet initialized. Stack initialization
188 consists of placing each live reg in array `reg' and setting `top'
191 REG_SET indicates which registers are live. */
193 typedef struct stack_def
195 int top; /* index to top stack element */
196 HARD_REG_SET reg_set; /* set of live registers */
197 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
200 /* This is used to carry information about basic blocks. It is
201 attached to the AUX field of the standard CFG block. */
203 typedef struct block_info_def
205 struct stack_def stack_in; /* Input stack configuration. */
206 struct stack_def stack_out; /* Output stack configuration. */
207 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
208 int done; /* True if block already converted. */
209 int predecessors; /* Number of predecessors that needs
213 #define BLOCK_INFO(B) ((block_info) (B)->aux)
215 /* Passed to change_stack to indicate where to emit insns. */
222 /* The block we're currently working on. */
223 static basic_block current_block;
225 /* This is the register file for all register after conversion */
227 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
229 #define FP_MODE_REG(regno,mode) \
230 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
232 /* Used to initialize uninitialized registers. */
235 /* Forward declarations */
237 static int stack_regs_mentioned_p PARAMS ((rtx pat));
238 static void straighten_stack PARAMS ((rtx, stack));
239 static void pop_stack PARAMS ((stack, int));
240 static rtx *get_true_reg PARAMS ((rtx *));
242 static int check_asm_stack_operands PARAMS ((rtx));
243 static int get_asm_operand_n_inputs PARAMS ((rtx));
244 static rtx stack_result PARAMS ((tree));
245 static void replace_reg PARAMS ((rtx *, int));
246 static void remove_regno_note PARAMS ((rtx, enum reg_note,
248 static int get_hard_regnum PARAMS ((stack, rtx));
249 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
251 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
252 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
253 static int swap_rtx_condition_1 PARAMS ((rtx));
254 static int swap_rtx_condition PARAMS ((rtx));
255 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
256 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
257 static void subst_asm_stack_regs PARAMS ((rtx, stack));
258 static void subst_stack_regs PARAMS ((rtx, stack));
259 static void change_stack PARAMS ((rtx, stack, stack,
261 static int convert_regs_entry PARAMS ((void));
262 static void convert_regs_exit PARAMS ((void));
263 static int convert_regs_1 PARAMS ((FILE *, basic_block));
264 static int convert_regs_2 PARAMS ((FILE *, basic_block));
265 static int convert_regs PARAMS ((FILE *));
266 static void print_stack PARAMS ((FILE *, stack));
267 static rtx next_flags_user PARAMS ((rtx));
268 static void record_label_references PARAMS ((rtx, rtx));
269 static bool compensate_edge PARAMS ((edge, FILE *));
271 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
274 stack_regs_mentioned_p (pat)
280 if (STACK_REG_P (pat))
283 fmt = GET_RTX_FORMAT (GET_CODE (pat));
284 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
290 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
291 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
294 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
301 /* Return nonzero if INSN mentions stacked registers, else return zero. */
304 stack_regs_mentioned (insn)
307 unsigned int uid, max;
310 if (! INSN_P (insn) || !stack_regs_mentioned_data)
313 uid = INSN_UID (insn);
314 max = VARRAY_SIZE (stack_regs_mentioned_data);
317 /* Allocate some extra size to avoid too many reallocs, but
318 do not grow too quickly. */
319 max = uid + uid / 20;
320 VARRAY_GROW (stack_regs_mentioned_data, max);
323 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
326 /* This insn has yet to be examined. Do so now. */
327 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
328 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
334 static rtx ix86_flags_rtx;
337 next_flags_user (insn)
340 /* Search forward looking for the first use of this value.
341 Stop at block boundaries. */
343 while (insn != current_block->end)
345 insn = NEXT_INSN (insn);
347 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
350 if (GET_CODE (insn) == CALL_INSN)
356 /* Reorganise the stack into ascending numbers,
360 straighten_stack (insn, regstack)
364 struct stack_def temp_stack;
367 /* If there is only a single register on the stack, then the stack is
368 already in increasing order and no reorganization is needed.
370 Similarly if the stack is empty. */
371 if (regstack->top <= 0)
374 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
376 for (top = temp_stack.top = regstack->top; top >= 0; top--)
377 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
379 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
382 /* Pop a register from the stack */
385 pop_stack (regstack, regno)
389 int top = regstack->top;
391 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
393 /* If regno was not at the top of stack then adjust stack */
394 if (regstack->reg [top] != regno)
397 for (i = regstack->top; i >= 0; i--)
398 if (regstack->reg [i] == regno)
401 for (j = i; j < top; j++)
402 regstack->reg [j] = regstack->reg [j + 1];
408 /* Convert register usage from "flat" register file usage to a "stack
409 register file. FIRST is the first insn in the function, FILE is the
412 Construct a CFG and run life analysis. Then convert each insn one
413 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
414 code duplication created when the converter inserts pop insns on
418 reg_to_stack (first, file)
426 /* Clean up previous run. */
427 stack_regs_mentioned_data = 0;
432 /* See if there is something to do. Flow analysis is quite
433 expensive so we might save some compilation time. */
434 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
435 if (regs_ever_live[i])
437 if (i > LAST_STACK_REG)
440 /* Ok, floating point instructions exist. If not optimizing,
441 build the CFG and run life analysis. */
444 find_basic_blocks (first, max_reg_num (), file);
445 count_or_remove_death_notes (NULL, 1);
446 life_analysis (first, file, PROP_DEATH_NOTES);
448 mark_dfs_back_edges ();
450 /* Set up block info for each basic block. */
451 alloc_aux_for_blocks (sizeof (struct block_info_def));
452 FOR_EACH_BB_REVERSE (bb)
455 for (e = bb->pred; e; e=e->pred_next)
456 if (!(e->flags & EDGE_DFS_BACK)
457 && e->src != ENTRY_BLOCK_PTR)
458 BLOCK_INFO (bb)->predecessors++;
461 /* Create the replacement registers up front. */
462 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
464 enum machine_mode mode;
465 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
467 mode = GET_MODE_WIDER_MODE (mode))
468 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
469 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
471 mode = GET_MODE_WIDER_MODE (mode))
472 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
475 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
477 /* A QNaN for initializing uninitialized variables.
479 ??? We can't load from constant memory in PIC mode, because
480 we're insertting these instructions before the prologue and
481 the PIC register hasn't been set up. In that case, fall back
482 on zero, which we can get from `ldz'. */
485 nan = CONST0_RTX (SFmode);
488 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
489 nan = force_const_mem (SFmode, nan);
492 /* Allocate a cache for stack_regs_mentioned. */
493 max_uid = get_max_uid ();
494 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
495 "stack_regs_mentioned cache");
499 free_aux_for_blocks ();
502 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
503 label's chain of references, and note which insn contains each
507 record_label_references (insn, pat)
510 enum rtx_code code = GET_CODE (pat);
514 if (code == LABEL_REF)
516 rtx label = XEXP (pat, 0);
519 if (GET_CODE (label) != CODE_LABEL)
522 /* If this is an undefined label, LABEL_REFS (label) contains
524 if (INSN_UID (label) == 0)
527 /* Don't make a duplicate in the code_label's chain. */
529 for (ref = LABEL_REFS (label);
531 ref = LABEL_NEXTREF (ref))
532 if (CONTAINING_INSN (ref) == insn)
535 CONTAINING_INSN (pat) = insn;
536 LABEL_NEXTREF (pat) = LABEL_REFS (label);
537 LABEL_REFS (label) = pat;
542 fmt = GET_RTX_FORMAT (code);
543 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
546 record_label_references (insn, XEXP (pat, i));
550 for (j = 0; j < XVECLEN (pat, i); j++)
551 record_label_references (insn, XVECEXP (pat, i, j));
556 /* Return a pointer to the REG expression within PAT. If PAT is not a
557 REG, possible enclosed by a conversion rtx, return the inner part of
558 PAT that stopped the search. */
565 switch (GET_CODE (*pat))
568 /* Eliminate FP subregister accesses in favour of the
569 actual FP register in use. */
572 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
574 int regno_off = subreg_regno_offset (REGNO (subreg),
578 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
587 pat = & XEXP (*pat, 0);
591 /* There are many rules that an asm statement for stack-like regs must
592 follow. Those rules are explained at the top of this file: the rule
593 numbers below refer to that explanation. */
596 check_asm_stack_operands (insn)
601 int malformed_asm = 0;
602 rtx body = PATTERN (insn);
604 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
605 char implicitly_dies[FIRST_PSEUDO_REGISTER];
608 rtx *clobber_reg = 0;
609 int n_inputs, n_outputs;
611 /* Find out what the constraints require. If no constraint
612 alternative matches, this asm is malformed. */
614 constrain_operands (1);
615 alt = which_alternative;
617 preprocess_constraints ();
619 n_inputs = get_asm_operand_n_inputs (body);
620 n_outputs = recog_data.n_operands - n_inputs;
625 /* Avoid further trouble with this insn. */
626 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
630 /* Strip SUBREGs here to make the following code simpler. */
631 for (i = 0; i < recog_data.n_operands; i++)
632 if (GET_CODE (recog_data.operand[i]) == SUBREG
633 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
634 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
636 /* Set up CLOBBER_REG. */
640 if (GET_CODE (body) == PARALLEL)
642 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
644 for (i = 0; i < XVECLEN (body, 0); i++)
645 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
647 rtx clobber = XVECEXP (body, 0, i);
648 rtx reg = XEXP (clobber, 0);
650 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
651 reg = SUBREG_REG (reg);
653 if (STACK_REG_P (reg))
655 clobber_reg[n_clobbers] = reg;
661 /* Enforce rule #4: Output operands must specifically indicate which
662 reg an output appears in after an asm. "=f" is not allowed: the
663 operand constraints must select a class with a single reg.
665 Also enforce rule #5: Output operands must start at the top of
666 the reg-stack: output operands may not "skip" a reg. */
668 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
669 for (i = 0; i < n_outputs; i++)
670 if (STACK_REG_P (recog_data.operand[i]))
672 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
674 error_for_asm (insn, "output constraint %d must specify a single register", i);
681 for (j = 0; j < n_clobbers; j++)
682 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
684 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
685 i, reg_names [REGNO (clobber_reg[j])]);
690 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
695 /* Search for first non-popped reg. */
696 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
697 if (! reg_used_as_output[i])
700 /* If there are any other popped regs, that's an error. */
701 for (; i < LAST_STACK_REG + 1; i++)
702 if (reg_used_as_output[i])
705 if (i != LAST_STACK_REG + 1)
707 error_for_asm (insn, "output regs must be grouped at top of stack");
711 /* Enforce rule #2: All implicitly popped input regs must be closer
712 to the top of the reg-stack than any input that is not implicitly
715 memset (implicitly_dies, 0, sizeof (implicitly_dies));
716 for (i = n_outputs; i < n_outputs + n_inputs; i++)
717 if (STACK_REG_P (recog_data.operand[i]))
719 /* An input reg is implicitly popped if it is tied to an
720 output, or if there is a CLOBBER for it. */
723 for (j = 0; j < n_clobbers; j++)
724 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
727 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
728 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
731 /* Search for first non-popped reg. */
732 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
733 if (! implicitly_dies[i])
736 /* If there are any other popped regs, that's an error. */
737 for (; i < LAST_STACK_REG + 1; i++)
738 if (implicitly_dies[i])
741 if (i != LAST_STACK_REG + 1)
744 "implicitly popped regs must be grouped at top of stack");
748 /* Enfore rule #3: If any input operand uses the "f" constraint, all
749 output constraints must use the "&" earlyclobber.
751 ??? Detect this more deterministically by having constrain_asm_operands
752 record any earlyclobber. */
754 for (i = n_outputs; i < n_outputs + n_inputs; i++)
755 if (recog_op_alt[i][alt].matches == -1)
759 for (j = 0; j < n_outputs; j++)
760 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
763 "output operand %d must use `&' constraint", j);
770 /* Avoid further trouble with this insn. */
771 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
778 /* Calculate the number of inputs and outputs in BODY, an
779 asm_operands. N_OPERANDS is the total number of operands, and
780 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
784 get_asm_operand_n_inputs (body)
787 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
788 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
790 else if (GET_CODE (body) == ASM_OPERANDS)
791 return ASM_OPERANDS_INPUT_LENGTH (body);
793 else if (GET_CODE (body) == PARALLEL
794 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
795 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
797 else if (GET_CODE (body) == PARALLEL
798 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
799 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
804 /* If current function returns its result in an fp stack register,
805 return the REG. Otherwise, return 0. */
813 /* If the value is supposed to be returned in memory, then clearly
814 it is not returned in a stack register. */
815 if (aggregate_value_p (DECL_RESULT (decl)))
818 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
821 #ifdef FUNCTION_OUTGOING_VALUE
823 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
825 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
829 return result != 0 && STACK_REG_P (result) ? result : 0;
834 * This section deals with stack register substitution, and forms the second
838 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
839 the desired hard REGNO. */
842 replace_reg (reg, regno)
846 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
847 || ! STACK_REG_P (*reg))
850 switch (GET_MODE_CLASS (GET_MODE (*reg)))
854 case MODE_COMPLEX_FLOAT:;
857 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
860 /* Remove a note of type NOTE, which must be found, for register
861 number REGNO from INSN. Remove only one such note. */
864 remove_regno_note (insn, note, regno)
869 rtx *note_link, this;
871 note_link = ®_NOTES (insn);
872 for (this = *note_link; this; this = XEXP (this, 1))
873 if (REG_NOTE_KIND (this) == note
874 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
876 *note_link = XEXP (this, 1);
880 note_link = &XEXP (this, 1);
885 /* Find the hard register number of virtual register REG in REGSTACK.
886 The hard register number is relative to the top of the stack. -1 is
887 returned if the register is not found. */
890 get_hard_regnum (regstack, reg)
896 if (! STACK_REG_P (reg))
899 for (i = regstack->top; i >= 0; i--)
900 if (regstack->reg[i] == REGNO (reg))
903 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
906 /* Emit an insn to pop virtual register REG before or after INSN.
907 REGSTACK is the stack state after INSN and is updated to reflect this
908 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
909 is represented as a SET whose destination is the register to be popped
910 and source is the top of stack. A death note for the top of stack
911 cases the movdf pattern to pop. */
914 emit_pop_insn (insn, regstack, reg, where)
918 enum emit_where where;
920 rtx pop_insn, pop_rtx;
923 /* For complex types take care to pop both halves. These may survive in
924 CLOBBER and USE expressions. */
925 if (COMPLEX_MODE_P (GET_MODE (reg)))
927 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
928 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
931 if (get_hard_regnum (regstack, reg1) >= 0)
932 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
933 if (get_hard_regnum (regstack, reg2) >= 0)
934 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
940 hard_regno = get_hard_regnum (regstack, reg);
942 if (hard_regno < FIRST_STACK_REG)
945 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
946 FP_MODE_REG (FIRST_STACK_REG, DFmode));
948 if (where == EMIT_AFTER)
949 pop_insn = emit_insn_after (pop_rtx, insn);
951 pop_insn = emit_insn_before (pop_rtx, insn);
954 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
955 REG_NOTES (pop_insn));
957 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
958 = regstack->reg[regstack->top];
960 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
965 /* Emit an insn before or after INSN to swap virtual register REG with
966 the top of stack. REGSTACK is the stack state before the swap, and
967 is updated to reflect the swap. A swap insn is represented as a
968 PARALLEL of two patterns: each pattern moves one reg to the other.
970 If REG is already at the top of the stack, no insn is emitted. */
973 emit_swap_insn (insn, regstack, reg)
980 int tmp, other_reg; /* swap regno temps */
981 rtx i1; /* the stack-reg insn prior to INSN */
982 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
984 hard_regno = get_hard_regnum (regstack, reg);
986 if (hard_regno < FIRST_STACK_REG)
988 if (hard_regno == FIRST_STACK_REG)
991 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
993 tmp = regstack->reg[other_reg];
994 regstack->reg[other_reg] = regstack->reg[regstack->top];
995 regstack->reg[regstack->top] = tmp;
997 /* Find the previous insn involving stack regs, but don't pass a
1000 if (current_block && insn != current_block->head)
1002 rtx tmp = PREV_INSN (insn);
1003 rtx limit = PREV_INSN (current_block->head);
1004 while (tmp != limit)
1006 if (GET_CODE (tmp) == CODE_LABEL
1007 || GET_CODE (tmp) == CALL_INSN
1008 || NOTE_INSN_BASIC_BLOCK_P (tmp)
1009 || (GET_CODE (tmp) == INSN
1010 && stack_regs_mentioned (tmp)))
1015 tmp = PREV_INSN (tmp);
1020 && (i1set = single_set (i1)) != NULL_RTX)
1022 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1023 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1025 /* If the previous register stack push was from the reg we are to
1026 swap with, omit the swap. */
1028 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1029 && GET_CODE (i1src) == REG
1030 && REGNO (i1src) == (unsigned) hard_regno - 1
1031 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1034 /* If the previous insn wrote to the reg we are to swap with,
1037 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno
1038 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1039 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1043 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1044 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1047 emit_insn_after (swap_rtx, i1);
1048 else if (current_block)
1049 emit_insn_before (swap_rtx, current_block->head);
1051 emit_insn_before (swap_rtx, insn);
1054 /* Handle a move to or from a stack register in PAT, which is in INSN.
1055 REGSTACK is the current stack. */
1058 move_for_stack_reg (insn, regstack, pat)
1063 rtx *psrc = get_true_reg (&SET_SRC (pat));
1064 rtx *pdest = get_true_reg (&SET_DEST (pat));
1068 src = *psrc; dest = *pdest;
1070 if (STACK_REG_P (src) && STACK_REG_P (dest))
1072 /* Write from one stack reg to another. If SRC dies here, then
1073 just change the register mapping and delete the insn. */
1075 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1080 /* If this is a no-op move, there must not be a REG_DEAD note. */
1081 if (REGNO (src) == REGNO (dest))
1084 for (i = regstack->top; i >= 0; i--)
1085 if (regstack->reg[i] == REGNO (src))
1088 /* The source must be live, and the dest must be dead. */
1089 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1092 /* It is possible that the dest is unused after this insn.
1093 If so, just pop the src. */
1095 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1097 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1103 regstack->reg[i] = REGNO (dest);
1105 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1106 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1113 /* The source reg does not die. */
1115 /* If this appears to be a no-op move, delete it, or else it
1116 will confuse the machine description output patterns. But if
1117 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1118 for REG_UNUSED will not work for deleted insns. */
1120 if (REGNO (src) == REGNO (dest))
1122 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1123 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1129 /* The destination ought to be dead */
1130 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1133 replace_reg (psrc, get_hard_regnum (regstack, src));
1135 regstack->reg[++regstack->top] = REGNO (dest);
1136 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1137 replace_reg (pdest, FIRST_STACK_REG);
1139 else if (STACK_REG_P (src))
1141 /* Save from a stack reg to MEM, or possibly integer reg. Since
1142 only top of stack may be saved, emit an exchange first if
1145 emit_swap_insn (insn, regstack, src);
1147 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1150 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1152 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1154 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1155 && regstack->top < REG_STACK_SIZE - 1)
1157 /* A 387 cannot write an XFmode value to a MEM without
1158 clobbering the source reg. The output code can handle
1159 this by reading back the value from the MEM.
1160 But it is more efficient to use a temp register if one is
1161 available. Push the source value here if the register
1162 stack is not full, and then write the value to memory via
1164 rtx push_rtx, push_insn;
1165 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1167 if (GET_MODE (src) == TFmode)
1168 push_rtx = gen_movtf (top_stack_reg, top_stack_reg);
1170 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1171 push_insn = emit_insn_before (push_rtx, insn);
1172 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1176 replace_reg (psrc, FIRST_STACK_REG);
1178 else if (STACK_REG_P (dest))
1180 /* Load from MEM, or possibly integer REG or constant, into the
1181 stack regs. The actual target is always the top of the
1182 stack. The stack mapping is changed to reflect that DEST is
1183 now at top of stack. */
1185 /* The destination ought to be dead */
1186 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1189 if (regstack->top >= REG_STACK_SIZE)
1192 regstack->reg[++regstack->top] = REGNO (dest);
1193 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1194 replace_reg (pdest, FIRST_STACK_REG);
1200 /* Swap the condition on a branch, if there is one. Return true if we
1201 found a condition to swap. False if the condition was not used as
1205 swap_rtx_condition_1 (pat)
1211 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1213 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1218 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1219 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1225 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1226 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1228 else if (fmt[i] == 'e')
1229 r |= swap_rtx_condition_1 (XEXP (pat, i));
1237 swap_rtx_condition (insn)
1240 rtx pat = PATTERN (insn);
1242 /* We're looking for a single set to cc0 or an HImode temporary. */
1244 if (GET_CODE (pat) == SET
1245 && GET_CODE (SET_DEST (pat)) == REG
1246 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1248 insn = next_flags_user (insn);
1249 if (insn == NULL_RTX)
1251 pat = PATTERN (insn);
1254 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1255 not doing anything with the cc value right now. We may be able to
1256 search for one though. */
1258 if (GET_CODE (pat) == SET
1259 && GET_CODE (SET_SRC (pat)) == UNSPEC
1260 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1262 rtx dest = SET_DEST (pat);
1264 /* Search forward looking for the first use of this value.
1265 Stop at block boundaries. */
1266 while (insn != current_block->end)
1268 insn = NEXT_INSN (insn);
1269 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1271 if (GET_CODE (insn) == CALL_INSN)
1275 /* So we've found the insn using this value. If it is anything
1276 other than sahf, aka unspec 10, or the value does not die
1277 (meaning we'd have to search further), then we must give up. */
1278 pat = PATTERN (insn);
1279 if (GET_CODE (pat) != SET
1280 || GET_CODE (SET_SRC (pat)) != UNSPEC
1281 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1282 || ! dead_or_set_p (insn, dest))
1285 /* Now we are prepared to handle this as a normal cc0 setter. */
1286 insn = next_flags_user (insn);
1287 if (insn == NULL_RTX)
1289 pat = PATTERN (insn);
1292 if (swap_rtx_condition_1 (pat))
1295 INSN_CODE (insn) = -1;
1296 if (recog_memoized (insn) == -1)
1298 /* In case the flags don't die here, recurse to try fix
1299 following user too. */
1300 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1302 insn = next_flags_user (insn);
1303 if (!insn || !swap_rtx_condition (insn))
1308 swap_rtx_condition_1 (pat);
1316 /* Handle a comparison. Special care needs to be taken to avoid
1317 causing comparisons that a 387 cannot do correctly, such as EQ.
1319 Also, a pop insn may need to be emitted. The 387 does have an
1320 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1321 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1325 compare_for_stack_reg (insn, regstack, pat_src)
1331 rtx src1_note, src2_note;
1334 src1 = get_true_reg (&XEXP (pat_src, 0));
1335 src2 = get_true_reg (&XEXP (pat_src, 1));
1336 flags_user = next_flags_user (insn);
1338 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1339 registers that die in this insn - move those to stack top first. */
1340 if ((! STACK_REG_P (*src1)
1341 || (STACK_REG_P (*src2)
1342 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1343 && swap_rtx_condition (insn))
1346 temp = XEXP (pat_src, 0);
1347 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1348 XEXP (pat_src, 1) = temp;
1350 src1 = get_true_reg (&XEXP (pat_src, 0));
1351 src2 = get_true_reg (&XEXP (pat_src, 1));
1353 INSN_CODE (insn) = -1;
1356 /* We will fix any death note later. */
1358 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1360 if (STACK_REG_P (*src2))
1361 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1363 src2_note = NULL_RTX;
1365 emit_swap_insn (insn, regstack, *src1);
1367 replace_reg (src1, FIRST_STACK_REG);
1369 if (STACK_REG_P (*src2))
1370 replace_reg (src2, get_hard_regnum (regstack, *src2));
1374 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1375 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1378 /* If the second operand dies, handle that. But if the operands are
1379 the same stack register, don't bother, because only one death is
1380 needed, and it was just handled. */
1383 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1384 && REGNO (*src1) == REGNO (*src2)))
1386 /* As a special case, two regs may die in this insn if src2 is
1387 next to top of stack and the top of stack also dies. Since
1388 we have already popped src1, "next to top of stack" is really
1389 at top (FIRST_STACK_REG) now. */
1391 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1394 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1395 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1399 /* The 386 can only represent death of the first operand in
1400 the case handled above. In all other cases, emit a separate
1401 pop and remove the death note from here. */
1403 /* link_cc0_insns (insn); */
1405 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1407 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1413 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1414 is the current register layout. */
1417 subst_stack_regs_pat (insn, regstack, pat)
1424 switch (GET_CODE (pat))
1427 /* Deaths in USE insns can happen in non optimizing compilation.
1428 Handle them by popping the dying register. */
1429 src = get_true_reg (&XEXP (pat, 0));
1430 if (STACK_REG_P (*src)
1431 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1433 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1436 /* ??? Uninitialized USE should not happen. */
1437 else if (get_hard_regnum (regstack, *src) == -1)
1445 dest = get_true_reg (&XEXP (pat, 0));
1446 if (STACK_REG_P (*dest))
1448 note = find_reg_note (insn, REG_DEAD, *dest);
1450 if (pat != PATTERN (insn))
1452 /* The fix_truncdi_1 pattern wants to be able to allocate
1453 it's own scratch register. It does this by clobbering
1454 an fp reg so that it is assured of an empty reg-stack
1455 register. If the register is live, kill it now.
1456 Remove the DEAD/UNUSED note so we don't try to kill it
1460 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1463 note = find_reg_note (insn, REG_UNUSED, *dest);
1467 remove_note (insn, note);
1468 replace_reg (dest, LAST_STACK_REG);
1472 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1473 indicates an uninitialized value. Because reload removed
1474 all other clobbers, this must be due to a function
1475 returning without a value. Load up a NaN. */
1478 && get_hard_regnum (regstack, *dest) == -1)
1480 pat = gen_rtx_SET (VOIDmode,
1481 FP_MODE_REG (REGNO (*dest), SFmode),
1483 PATTERN (insn) = pat;
1484 move_for_stack_reg (insn, regstack, pat);
1486 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1487 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1489 pat = gen_rtx_SET (VOIDmode,
1490 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1492 PATTERN (insn) = pat;
1493 move_for_stack_reg (insn, regstack, pat);
1502 rtx *src1 = (rtx *) 0, *src2;
1503 rtx src1_note, src2_note;
1506 dest = get_true_reg (&SET_DEST (pat));
1507 src = get_true_reg (&SET_SRC (pat));
1508 pat_src = SET_SRC (pat);
1510 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1511 if (STACK_REG_P (*src)
1512 || (STACK_REG_P (*dest)
1513 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1514 || GET_CODE (*src) == CONST_DOUBLE)))
1516 move_for_stack_reg (insn, regstack, pat);
1520 switch (GET_CODE (pat_src))
1523 compare_for_stack_reg (insn, regstack, pat_src);
1529 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1532 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1533 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1536 replace_reg (dest, FIRST_STACK_REG);
1540 /* This is a `tstM2' case. */
1541 if (*dest != cc0_rtx)
1547 case FLOAT_TRUNCATE:
1551 /* These insns only operate on the top of the stack. DEST might
1552 be cc0_rtx if we're processing a tstM pattern. Also, it's
1553 possible that the tstM case results in a REG_DEAD note on the
1557 src1 = get_true_reg (&XEXP (pat_src, 0));
1559 emit_swap_insn (insn, regstack, *src1);
1561 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1563 if (STACK_REG_P (*dest))
1564 replace_reg (dest, FIRST_STACK_REG);
1568 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1570 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1573 replace_reg (src1, FIRST_STACK_REG);
1578 /* On i386, reversed forms of subM3 and divM3 exist for
1579 MODE_FLOAT, so the same code that works for addM3 and mulM3
1583 /* These insns can accept the top of stack as a destination
1584 from a stack reg or mem, or can use the top of stack as a
1585 source and some other stack register (possibly top of stack)
1586 as a destination. */
1588 src1 = get_true_reg (&XEXP (pat_src, 0));
1589 src2 = get_true_reg (&XEXP (pat_src, 1));
1591 /* We will fix any death note later. */
1593 if (STACK_REG_P (*src1))
1594 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1596 src1_note = NULL_RTX;
1597 if (STACK_REG_P (*src2))
1598 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1600 src2_note = NULL_RTX;
1602 /* If either operand is not a stack register, then the dest
1603 must be top of stack. */
1605 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1606 emit_swap_insn (insn, regstack, *dest);
1609 /* Both operands are REG. If neither operand is already
1610 at the top of stack, choose to make the one that is the dest
1611 the new top of stack. */
1613 int src1_hard_regnum, src2_hard_regnum;
1615 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1616 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1617 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1620 if (src1_hard_regnum != FIRST_STACK_REG
1621 && src2_hard_regnum != FIRST_STACK_REG)
1622 emit_swap_insn (insn, regstack, *dest);
1625 if (STACK_REG_P (*src1))
1626 replace_reg (src1, get_hard_regnum (regstack, *src1));
1627 if (STACK_REG_P (*src2))
1628 replace_reg (src2, get_hard_regnum (regstack, *src2));
1632 rtx src1_reg = XEXP (src1_note, 0);
1634 /* If the register that dies is at the top of stack, then
1635 the destination is somewhere else - merely substitute it.
1636 But if the reg that dies is not at top of stack, then
1637 move the top of stack to the dead reg, as though we had
1638 done the insn and then a store-with-pop. */
1640 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1642 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1643 replace_reg (dest, get_hard_regnum (regstack, *dest));
1647 int regno = get_hard_regnum (regstack, src1_reg);
1649 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1650 replace_reg (dest, regno);
1652 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1653 = regstack->reg[regstack->top];
1656 CLEAR_HARD_REG_BIT (regstack->reg_set,
1657 REGNO (XEXP (src1_note, 0)));
1658 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1663 rtx src2_reg = XEXP (src2_note, 0);
1664 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1666 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1667 replace_reg (dest, get_hard_regnum (regstack, *dest));
1671 int regno = get_hard_regnum (regstack, src2_reg);
1673 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1674 replace_reg (dest, regno);
1676 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1677 = regstack->reg[regstack->top];
1680 CLEAR_HARD_REG_BIT (regstack->reg_set,
1681 REGNO (XEXP (src2_note, 0)));
1682 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1687 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1688 replace_reg (dest, get_hard_regnum (regstack, *dest));
1691 /* Keep operand 1 maching with destination. */
1692 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1693 && REG_P (*src1) && REG_P (*src2)
1694 && REGNO (*src1) != REGNO (*dest))
1696 int tmp = REGNO (*src1);
1697 replace_reg (src1, REGNO (*src2));
1698 replace_reg (src2, tmp);
1703 switch (XINT (pat_src, 1))
1707 /* These insns only operate on the top of the stack. */
1709 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1711 emit_swap_insn (insn, regstack, *src1);
1713 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1715 if (STACK_REG_P (*dest))
1716 replace_reg (dest, FIRST_STACK_REG);
1720 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1722 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1725 replace_reg (src1, FIRST_STACK_REG);
1729 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1730 The combination matches the PPRO fcomi instruction. */
1732 pat_src = XVECEXP (pat_src, 0, 0);
1733 if (GET_CODE (pat_src) != UNSPEC
1734 || XINT (pat_src, 1) != UNSPEC_FNSTSW)
1739 /* Combined fcomp+fnstsw generated for doing well with
1740 CSE. When optimizing this would have been broken
1743 pat_src = XVECEXP (pat_src, 0, 0);
1744 if (GET_CODE (pat_src) != COMPARE)
1747 compare_for_stack_reg (insn, regstack, pat_src);
1756 /* This insn requires the top of stack to be the destination. */
1758 src1 = get_true_reg (&XEXP (pat_src, 1));
1759 src2 = get_true_reg (&XEXP (pat_src, 2));
1761 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1762 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1764 /* If the comparison operator is an FP comparison operator,
1765 it is handled correctly by compare_for_stack_reg () who
1766 will move the destination to the top of stack. But if the
1767 comparison operator is not an FP comparison operator, we
1768 have to handle it here. */
1769 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1770 && REGNO (*dest) != regstack->reg[regstack->top])
1772 /* In case one of operands is the top of stack and the operands
1773 dies, it is safe to make it the destination operand by
1774 reversing the direction of cmove and avoid fxch. */
1775 if ((REGNO (*src1) == regstack->reg[regstack->top]
1777 || (REGNO (*src2) == regstack->reg[regstack->top]
1780 int idx1 = (get_hard_regnum (regstack, *src1)
1782 int idx2 = (get_hard_regnum (regstack, *src2)
1785 /* Make reg-stack believe that the operands are already
1786 swapped on the stack */
1787 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1788 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1790 /* Reverse condition to compensate the operand swap.
1791 i386 do have comparison always reversible. */
1792 PUT_CODE (XEXP (pat_src, 0),
1793 reversed_comparison_code (XEXP (pat_src, 0), insn));
1796 emit_swap_insn (insn, regstack, *dest);
1804 src_note[1] = src1_note;
1805 src_note[2] = src2_note;
1807 if (STACK_REG_P (*src1))
1808 replace_reg (src1, get_hard_regnum (regstack, *src1));
1809 if (STACK_REG_P (*src2))
1810 replace_reg (src2, get_hard_regnum (regstack, *src2));
1812 for (i = 1; i <= 2; i++)
1815 int regno = REGNO (XEXP (src_note[i], 0));
1817 /* If the register that dies is not at the top of
1818 stack, then move the top of stack to the dead reg */
1819 if (regno != regstack->reg[regstack->top])
1821 remove_regno_note (insn, REG_DEAD, regno);
1822 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1826 /* Top of stack never dies, as it is the
1832 /* Make dest the top of stack. Add dest to regstack if
1834 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1835 regstack->reg[++regstack->top] = REGNO (*dest);
1836 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1837 replace_reg (dest, FIRST_STACK_REG);
1851 /* Substitute hard regnums for any stack regs in INSN, which has
1852 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1853 before the insn, and is updated with changes made here.
1855 There are several requirements and assumptions about the use of
1856 stack-like regs in asm statements. These rules are enforced by
1857 record_asm_stack_regs; see comments there for details. Any
1858 asm_operands left in the RTL at this point may be assume to meet the
1859 requirements, since record_asm_stack_regs removes any problem asm. */
1862 subst_asm_stack_regs (insn, regstack)
1866 rtx body = PATTERN (insn);
1869 rtx *note_reg; /* Array of note contents */
1870 rtx **note_loc; /* Address of REG field of each note */
1871 enum reg_note *note_kind; /* The type of each note */
1873 rtx *clobber_reg = 0;
1874 rtx **clobber_loc = 0;
1876 struct stack_def temp_stack;
1881 int n_inputs, n_outputs;
1883 if (! check_asm_stack_operands (insn))
1886 /* Find out what the constraints required. If no constraint
1887 alternative matches, that is a compiler bug: we should have caught
1888 such an insn in check_asm_stack_operands. */
1889 extract_insn (insn);
1890 constrain_operands (1);
1891 alt = which_alternative;
1893 preprocess_constraints ();
1895 n_inputs = get_asm_operand_n_inputs (body);
1896 n_outputs = recog_data.n_operands - n_inputs;
1901 /* Strip SUBREGs here to make the following code simpler. */
1902 for (i = 0; i < recog_data.n_operands; i++)
1903 if (GET_CODE (recog_data.operand[i]) == SUBREG
1904 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1906 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1907 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1910 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1912 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1915 note_reg = (rtx *) alloca (i * sizeof (rtx));
1916 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1917 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1920 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1922 rtx reg = XEXP (note, 0);
1923 rtx *loc = & XEXP (note, 0);
1925 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1927 loc = & SUBREG_REG (reg);
1928 reg = SUBREG_REG (reg);
1931 if (STACK_REG_P (reg)
1932 && (REG_NOTE_KIND (note) == REG_DEAD
1933 || REG_NOTE_KIND (note) == REG_UNUSED))
1935 note_reg[n_notes] = reg;
1936 note_loc[n_notes] = loc;
1937 note_kind[n_notes] = REG_NOTE_KIND (note);
1942 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1946 if (GET_CODE (body) == PARALLEL)
1948 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1949 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1951 for (i = 0; i < XVECLEN (body, 0); i++)
1952 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1954 rtx clobber = XVECEXP (body, 0, i);
1955 rtx reg = XEXP (clobber, 0);
1956 rtx *loc = & XEXP (clobber, 0);
1958 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1960 loc = & SUBREG_REG (reg);
1961 reg = SUBREG_REG (reg);
1964 if (STACK_REG_P (reg))
1966 clobber_reg[n_clobbers] = reg;
1967 clobber_loc[n_clobbers] = loc;
1973 temp_stack = *regstack;
1975 /* Put the input regs into the desired place in TEMP_STACK. */
1977 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1978 if (STACK_REG_P (recog_data.operand[i])
1979 && reg_class_subset_p (recog_op_alt[i][alt].class,
1981 && recog_op_alt[i][alt].class != FLOAT_REGS)
1983 /* If an operand needs to be in a particular reg in
1984 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1985 these constraints are for single register classes, and
1986 reload guaranteed that operand[i] is already in that class,
1987 we can just use REGNO (recog_data.operand[i]) to know which
1988 actual reg this operand needs to be in. */
1990 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
1995 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
1997 /* recog_data.operand[i] is not in the right place. Find
1998 it and swap it with whatever is already in I's place.
1999 K is where recog_data.operand[i] is now. J is where it
2003 k = temp_stack.top - (regno - FIRST_STACK_REG);
2005 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2007 temp = temp_stack.reg[k];
2008 temp_stack.reg[k] = temp_stack.reg[j];
2009 temp_stack.reg[j] = temp;
2013 /* Emit insns before INSN to make sure the reg-stack is in the right
2016 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2018 /* Make the needed input register substitutions. Do death notes and
2019 clobbers too, because these are for inputs, not outputs. */
2021 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2022 if (STACK_REG_P (recog_data.operand[i]))
2024 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2029 replace_reg (recog_data.operand_loc[i], regnum);
2032 for (i = 0; i < n_notes; i++)
2033 if (note_kind[i] == REG_DEAD)
2035 int regnum = get_hard_regnum (regstack, note_reg[i]);
2040 replace_reg (note_loc[i], regnum);
2043 for (i = 0; i < n_clobbers; i++)
2045 /* It's OK for a CLOBBER to reference a reg that is not live.
2046 Don't try to replace it in that case. */
2047 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2051 /* Sigh - clobbers always have QImode. But replace_reg knows
2052 that these regs can't be MODE_INT and will abort. Just put
2053 the right reg there without calling replace_reg. */
2055 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2059 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2061 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2062 if (STACK_REG_P (recog_data.operand[i]))
2064 /* An input reg is implicitly popped if it is tied to an
2065 output, or if there is a CLOBBER for it. */
2068 for (j = 0; j < n_clobbers; j++)
2069 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2072 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2074 /* recog_data.operand[i] might not be at the top of stack.
2075 But that's OK, because all we need to do is pop the
2076 right number of regs off of the top of the reg-stack.
2077 record_asm_stack_regs guaranteed that all implicitly
2078 popped regs were grouped at the top of the reg-stack. */
2080 CLEAR_HARD_REG_BIT (regstack->reg_set,
2081 regstack->reg[regstack->top]);
2086 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2087 Note that there isn't any need to substitute register numbers.
2088 ??? Explain why this is true. */
2090 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2092 /* See if there is an output for this hard reg. */
2095 for (j = 0; j < n_outputs; j++)
2096 if (STACK_REG_P (recog_data.operand[j])
2097 && REGNO (recog_data.operand[j]) == (unsigned) i)
2099 regstack->reg[++regstack->top] = i;
2100 SET_HARD_REG_BIT (regstack->reg_set, i);
2105 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2106 input that the asm didn't implicitly pop. If the asm didn't
2107 implicitly pop an input reg, that reg will still be live.
2109 Note that we can't use find_regno_note here: the register numbers
2110 in the death notes have already been substituted. */
2112 for (i = 0; i < n_outputs; i++)
2113 if (STACK_REG_P (recog_data.operand[i]))
2117 for (j = 0; j < n_notes; j++)
2118 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2119 && note_kind[j] == REG_UNUSED)
2121 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2127 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2128 if (STACK_REG_P (recog_data.operand[i]))
2132 for (j = 0; j < n_notes; j++)
2133 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2134 && note_kind[j] == REG_DEAD
2135 && TEST_HARD_REG_BIT (regstack->reg_set,
2136 REGNO (recog_data.operand[i])))
2138 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2145 /* Substitute stack hard reg numbers for stack virtual registers in
2146 INSN. Non-stack register numbers are not changed. REGSTACK is the
2147 current stack content. Insns may be emitted as needed to arrange the
2148 stack for the 387 based on the contents of the insn. */
2151 subst_stack_regs (insn, regstack)
2155 rtx *note_link, note;
2158 if (GET_CODE (insn) == CALL_INSN)
2160 int top = regstack->top;
2162 /* If there are any floating point parameters to be passed in
2163 registers for this call, make sure they are in the right
2168 straighten_stack (PREV_INSN (insn), regstack);
2170 /* Now mark the arguments as dead after the call. */
2172 while (regstack->top >= 0)
2174 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2180 /* Do the actual substitution if any stack regs are mentioned.
2181 Since we only record whether entire insn mentions stack regs, and
2182 subst_stack_regs_pat only works for patterns that contain stack regs,
2183 we must check each pattern in a parallel here. A call_value_pop could
2186 if (stack_regs_mentioned (insn))
2188 int n_operands = asm_noperands (PATTERN (insn));
2189 if (n_operands >= 0)
2191 /* This insn is an `asm' with operands. Decode the operands,
2192 decide how many are inputs, and do register substitution.
2193 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2195 subst_asm_stack_regs (insn, regstack);
2199 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2200 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2202 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2203 subst_stack_regs_pat (insn, regstack,
2204 XVECEXP (PATTERN (insn), 0, i));
2207 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2210 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2211 REG_UNUSED will already have been dealt with, so just return. */
2213 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn))
2216 /* If there is a REG_UNUSED note on a stack register on this insn,
2217 the indicated reg must be popped. The REG_UNUSED note is removed,
2218 since the form of the newly emitted pop insn references the reg,
2219 making it no longer `unset'. */
2221 note_link = ®_NOTES (insn);
2222 for (note = *note_link; note; note = XEXP (note, 1))
2223 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2225 *note_link = XEXP (note, 1);
2226 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2229 note_link = &XEXP (note, 1);
2232 /* Change the organization of the stack so that it fits a new basic
2233 block. Some registers might have to be popped, but there can never be
2234 a register live in the new block that is not now live.
2236 Insert any needed insns before or after INSN, as indicated by
2237 WHERE. OLD is the original stack layout, and NEW is the desired
2238 form. OLD is updated to reflect the code emitted, ie, it will be
2239 the same as NEW upon return.
2241 This function will not preserve block_end[]. But that information
2242 is no longer needed once this has executed. */
2245 change_stack (insn, old, new, where)
2249 enum emit_where where;
2254 /* We will be inserting new insns "backwards". If we are to insert
2255 after INSN, find the next insn, and insert before it. */
2257 if (where == EMIT_AFTER)
2259 if (current_block && current_block->end == insn)
2261 insn = NEXT_INSN (insn);
2264 /* Pop any registers that are not needed in the new block. */
2266 for (reg = old->top; reg >= 0; reg--)
2267 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2268 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2273 /* If the new block has never been processed, then it can inherit
2274 the old stack order. */
2276 new->top = old->top;
2277 memcpy (new->reg, old->reg, sizeof (new->reg));
2281 /* This block has been entered before, and we must match the
2282 previously selected stack order. */
2284 /* By now, the only difference should be the order of the stack,
2285 not their depth or liveliness. */
2287 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2290 if (old->top != new->top)
2293 /* If the stack is not empty (new->top != -1), loop here emitting
2294 swaps until the stack is correct.
2296 The worst case number of swaps emitted is N + 2, where N is the
2297 depth of the stack. In some cases, the reg at the top of
2298 stack may be correct, but swapped anyway in order to fix
2299 other regs. But since we never swap any other reg away from
2300 its correct slot, this algorithm will converge. */
2305 /* Swap the reg at top of stack into the position it is
2306 supposed to be in, until the correct top of stack appears. */
2308 while (old->reg[old->top] != new->reg[new->top])
2310 for (reg = new->top; reg >= 0; reg--)
2311 if (new->reg[reg] == old->reg[old->top])
2317 emit_swap_insn (insn, old,
2318 FP_MODE_REG (old->reg[reg], DFmode));
2321 /* See if any regs remain incorrect. If so, bring an
2322 incorrect reg to the top of stack, and let the while loop
2325 for (reg = new->top; reg >= 0; reg--)
2326 if (new->reg[reg] != old->reg[reg])
2328 emit_swap_insn (insn, old,
2329 FP_MODE_REG (old->reg[reg], DFmode));
2334 /* At this point there must be no differences. */
2336 for (reg = old->top; reg >= 0; reg--)
2337 if (old->reg[reg] != new->reg[reg])
2342 current_block->end = PREV_INSN (insn);
2345 /* Print stack configuration. */
2348 print_stack (file, s)
2356 fprintf (file, "uninitialized\n");
2357 else if (s->top == -1)
2358 fprintf (file, "empty\n");
2363 for (i = 0; i <= s->top; ++i)
2364 fprintf (file, "%d ", s->reg[i]);
2365 fputs ("]\n", file);
2369 /* This function was doing life analysis. We now let the regular live
2370 code do it's job, so we only need to check some extra invariants
2371 that reg-stack expects. Primary among these being that all registers
2372 are initialized before use.
2374 The function returns true when code was emitted to CFG edges and
2375 commit_edge_insertions needs to be called. */
2378 convert_regs_entry ()
2384 FOR_EACH_BB_REVERSE (block)
2386 block_info bi = BLOCK_INFO (block);
2389 /* Set current register status at last instruction `uninitialized'. */
2390 bi->stack_in.top = -2;
2392 /* Copy live_at_end and live_at_start into temporaries. */
2393 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2395 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2396 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2397 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2398 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2402 /* Load something into each stack register live at function entry.
2403 Such live registers can be caused by uninitialized variables or
2404 functions not returning values on all paths. In order to keep
2405 the push/pop code happy, and to not scrog the register stack, we
2406 must put something in these registers. Use a QNaN.
2408 Note that we are insertting converted code here. This code is
2409 never seen by the convert_regs pass. */
2411 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2413 basic_block block = e->dest;
2414 block_info bi = BLOCK_INFO (block);
2417 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2418 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2422 bi->stack_in.reg[++top] = reg;
2424 init = gen_rtx_SET (VOIDmode,
2425 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2427 insert_insn_on_edge (init, e);
2431 bi->stack_in.top = top;
2437 /* Construct the desired stack for function exit. This will either
2438 be `empty', or the function return value at top-of-stack. */
2441 convert_regs_exit ()
2443 int value_reg_low, value_reg_high;
2447 retvalue = stack_result (current_function_decl);
2448 value_reg_low = value_reg_high = -1;
2451 value_reg_low = REGNO (retvalue);
2452 value_reg_high = value_reg_low
2453 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2456 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2457 if (value_reg_low == -1)
2458 output_stack->top = -1;
2463 output_stack->top = value_reg_high - value_reg_low;
2464 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2466 output_stack->reg[reg - value_reg_low] = reg;
2467 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2472 /* Adjust the stack of this block on exit to match the stack of the
2473 target block, or copy stack info into the stack of the successor
2474 of the successor hasn't been processed yet. */
2476 compensate_edge (e, file)
2480 basic_block block = e->src, target = e->dest;
2481 block_info bi = BLOCK_INFO (block);
2482 struct stack_def regstack, tmpstack;
2483 stack target_stack = &BLOCK_INFO (target)->stack_in;
2486 current_block = block;
2487 regstack = bi->stack_out;
2489 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2491 if (target_stack->top == -2)
2493 /* The target block hasn't had a stack order selected.
2494 We need merely ensure that no pops are needed. */
2495 for (reg = regstack.top; reg >= 0; --reg)
2496 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2502 fprintf (file, "new block; copying stack position\n");
2504 /* change_stack kills values in regstack. */
2505 tmpstack = regstack;
2507 change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER);
2512 fprintf (file, "new block; pops needed\n");
2516 if (target_stack->top == regstack.top)
2518 for (reg = target_stack->top; reg >= 0; --reg)
2519 if (target_stack->reg[reg] != regstack.reg[reg])
2525 fprintf (file, "no changes needed\n");
2532 fprintf (file, "correcting stack to ");
2533 print_stack (file, target_stack);
2537 /* Care for non-call EH edges specially. The normal return path have
2538 values in registers. These will be popped en masse by the unwind
2540 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2541 target_stack->top = -1;
2543 /* Other calls may appear to have values live in st(0), but the
2544 abnormal return path will not have actually loaded the values. */
2545 else if (e->flags & EDGE_ABNORMAL_CALL)
2547 /* Assert that the lifetimes are as we expect -- one value
2548 live at st(0) on the end of the source block, and no
2549 values live at the beginning of the destination block. */
2552 CLEAR_HARD_REG_SET (tmp);
2553 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2557 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2558 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2562 target_stack->top = -1;
2565 /* It is better to output directly to the end of the block
2566 instead of to the edge, because emit_swap can do minimal
2567 insn scheduling. We can do this when there is only one
2568 edge out, and it is not abnormal. */
2569 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL))
2571 /* change_stack kills values in regstack. */
2572 tmpstack = regstack;
2574 change_stack (block->end, &tmpstack, target_stack,
2575 (GET_CODE (block->end) == JUMP_INSN
2576 ? EMIT_BEFORE : EMIT_AFTER));
2582 /* We don't support abnormal edges. Global takes care to
2583 avoid any live register across them, so we should never
2584 have to insert instructions on such edges. */
2585 if (e->flags & EDGE_ABNORMAL)
2588 current_block = NULL;
2591 /* ??? change_stack needs some point to emit insns after.
2592 Also needed to keep gen_sequence from returning a
2593 pattern as opposed to a sequence, which would lose
2595 after = emit_note (NULL, NOTE_INSN_DELETED);
2597 tmpstack = regstack;
2598 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2600 seq = gen_sequence ();
2603 insert_insn_on_edge (seq, e);
2609 /* Convert stack register references in one block. */
2612 convert_regs_1 (file, block)
2616 struct stack_def regstack;
2617 block_info bi = BLOCK_INFO (block);
2620 edge e, beste = NULL;
2624 /* Find the edge we will copy stack from. It should be the most frequent
2625 one as it will get cheapest after compensation code is generated,
2626 if multiple such exists, take one with largest count, prefer critical
2627 one (as splitting critical edges is more expensive), or one with lowest
2628 index, to avoid random changes with different orders of the edges. */
2629 for (e = block->pred; e ; e = e->pred_next)
2631 if (e->flags & EDGE_DFS_BACK)
2635 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2637 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2639 else if (beste->count < e->count)
2641 else if (beste->count > e->count)
2643 else if ((EDGE_CRITICAL_P (e) != 0)
2644 != (EDGE_CRITICAL_P (beste) != 0))
2646 if (EDGE_CRITICAL_P (e))
2649 else if (e->src->index < beste->src->index)
2653 /* Entry block does have stack already initialized. */
2654 if (bi->stack_in.top == -2)
2655 inserted |= compensate_edge (beste, file);
2659 current_block = block;
2663 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2664 print_stack (file, &bi->stack_in);
2667 /* Process all insns in this block. Keep track of NEXT so that we
2668 don't process insns emitted while substituting in INSN. */
2670 regstack = bi->stack_in;
2674 next = NEXT_INSN (insn);
2676 /* Ensure we have not missed a block boundary. */
2679 if (insn == block->end)
2682 /* Don't bother processing unless there is a stack reg
2683 mentioned or if it's a CALL_INSN. */
2684 if (stack_regs_mentioned (insn)
2685 || GET_CODE (insn) == CALL_INSN)
2689 fprintf (file, " insn %d input stack: ",
2691 print_stack (file, ®stack);
2693 subst_stack_regs (insn, ®stack);
2700 fprintf (file, "Expected live registers [");
2701 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2702 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2703 fprintf (file, " %d", reg);
2704 fprintf (file, " ]\nOutput stack: ");
2705 print_stack (file, ®stack);
2709 if (GET_CODE (insn) == JUMP_INSN)
2710 insn = PREV_INSN (insn);
2712 /* If the function is declared to return a value, but it returns one
2713 in only some cases, some registers might come live here. Emit
2714 necessary moves for them. */
2716 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2718 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2719 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2725 fprintf (file, "Emitting insn initializing reg %d\n",
2729 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2731 insn = emit_insn_after (set, insn);
2732 subst_stack_regs (insn, ®stack);
2736 /* Something failed if the stack lives don't match. */
2737 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2740 bi->stack_out = regstack;
2742 /* Compensate the back edges, as those wasn't visited yet. */
2743 for (e = block->succ; e ; e = e->succ_next)
2745 if (e->flags & EDGE_DFS_BACK
2746 || (e->dest == EXIT_BLOCK_PTR))
2748 if (!BLOCK_INFO (e->dest)->done
2749 && e->dest != block)
2751 inserted |= compensate_edge (e, file);
2754 for (e = block->pred; e ; e = e->pred_next)
2756 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2757 && e->src != ENTRY_BLOCK_PTR)
2759 if (!BLOCK_INFO (e->src)->done)
2761 inserted |= compensate_edge (e, file);
2768 /* Convert registers in all blocks reachable from BLOCK. */
2771 convert_regs_2 (file, block)
2775 basic_block *stack, *sp;
2778 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2789 inserted |= convert_regs_1 (file, block);
2790 BLOCK_INFO (block)->done = 1;
2792 for (e = block->succ; e ; e = e->succ_next)
2793 if (! (e->flags & EDGE_DFS_BACK))
2795 BLOCK_INFO (e->dest)->predecessors--;
2796 if (!BLOCK_INFO (e->dest)->predecessors)
2800 while (sp != stack);
2805 /* Traverse all basic blocks in a function, converting the register
2806 references in each insn from the "flat" register file that gcc uses,
2807 to the stack-like registers the 387 uses. */
2817 /* Initialize uninitialized registers on function entry. */
2818 inserted = convert_regs_entry ();
2820 /* Construct the desired stack for function exit. */
2821 convert_regs_exit ();
2822 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2824 /* ??? Future: process inner loops first, and give them arbitrary
2825 initial stacks which emit_swap_insn can modify. This ought to
2826 prevent double fxch that aften appears at the head of a loop. */
2828 /* Process all blocks reachable from all entry points. */
2829 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2830 inserted |= convert_regs_2 (file, e->dest);
2832 /* ??? Process all unreachable blocks. Though there's no excuse
2833 for keeping these even when not optimizing. */
2836 block_info bi = BLOCK_INFO (b);
2842 /* Create an arbitrary input stack. */
2843 bi->stack_in.top = -1;
2844 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2845 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2846 bi->stack_in.reg[++bi->stack_in.top] = reg;
2848 inserted |= convert_regs_2 (file, b);
2852 fixup_abnormal_edges ();
2854 commit_edge_insertions ();
2861 #endif /* STACK_REGS */
2863 #include "gt-reg-stack.h"