1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
78 There are several rules on the usage of stack-like regs in
79 asm_operands insns. These rules apply only to the operands that are
82 1. Given a set of input regs that die in an asm_operands, it is
83 necessary to know which are implicitly popped by the asm, and
84 which must be explicitly popped by gcc.
86 An input reg that is implicitly popped by the asm must be
87 explicitly clobbered, unless it is constrained to match an
90 2. For any input reg that is implicitly popped by an asm, it is
91 necessary to know how to adjust the stack to compensate for the pop.
92 If any non-popped input is closer to the top of the reg-stack than
93 the implicitly popped reg, it would not be possible to know what the
94 stack looked like - it's not clear how the rest of the stack "slides
97 All implicitly popped input regs must be closer to the top of
98 the reg-stack than any input that is not implicitly popped.
100 3. It is possible that if an input dies in an insn, reload might
101 use the input reg for an output reload. Consider this example:
103 asm ("foo" : "=t" (a) : "f" (b));
105 This asm says that input B is not popped by the asm, and that
106 the asm pushes a result onto the reg-stack, i.e., the stack is one
107 deeper after the asm than it was before. But, it is possible that
108 reload will think that it can use the same reg for both the input and
109 the output, if input B dies in this insn.
111 If any input operand uses the "f" constraint, all output reg
112 constraints must use the "&" earlyclobber.
114 The asm above would be written as
116 asm ("foo" : "=&t" (a) : "f" (b));
118 4. Some operands need to be in particular places on the stack. All
119 output operands fall in this category - there is no other way to
120 know which regs the outputs appear in unless the user indicates
121 this in the constraints.
123 Output operands must specifically indicate which reg an output
124 appears in after an asm. "=f" is not allowed: the operand
125 constraints must select a class with a single reg.
127 5. Output operands may not be "inserted" between existing stack regs.
128 Since no 387 opcode uses a read/write operand, all output operands
129 are dead before the asm_operands, and are pushed by the asm_operands.
130 It makes no sense to push anywhere but the top of the reg-stack.
132 Output operands must start at the top of the reg-stack: output
133 operands may not "skip" a reg.
135 6. Some asm statements may need extra stack space for internal
136 calculations. This can be guaranteed by clobbering stack registers
137 unrelated to the inputs and outputs.
139 Here are a couple of reasonable asms to want to write. This asm
140 takes one input, which is internally popped, and produces two outputs.
142 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
144 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
145 and replaces them with one output. The user must code the "st(1)"
146 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
148 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
154 #include "coretypes.h"
156 #include "hash-set.h"
157 #include "machmode.h"
159 #include "double-int.h"
163 #include "wide-int.h"
167 #include "rtl-error.h"
169 #include "hard-reg-set.h"
171 #include "function.h"
172 #include "insn-config.h"
177 #include "dominance.h"
181 #include "cfgbuild.h"
182 #include "cfgcleanup.h"
183 #include "basic-block.h"
186 #include "tree-pass.h"
189 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
190 #include "rtl-iter.h"
194 /* We use this array to cache info about insns, because otherwise we
195 spend too much time in stack_regs_mentioned_p.
197 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
198 the insn uses stack registers, two indicates the insn does not use
200 static vec<char> stack_regs_mentioned_data;
202 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
204 int regstack_completed = 0;
206 /* This is the basic stack record. TOP is an index into REG[] such
207 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
209 If TOP is -2, REG[] is not yet initialized. Stack initialization
210 consists of placing each live reg in array `reg' and setting `top'
213 REG_SET indicates which registers are live. */
215 typedef struct stack_def
217 int top; /* index to top stack element */
218 HARD_REG_SET reg_set; /* set of live registers */
219 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
222 /* This is used to carry information about basic blocks. It is
223 attached to the AUX field of the standard CFG block. */
225 typedef struct block_info_def
227 struct stack_def stack_in; /* Input stack configuration. */
228 struct stack_def stack_out; /* Output stack configuration. */
229 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
230 int done; /* True if block already converted. */
231 int predecessors; /* Number of predecessors that need
235 #define BLOCK_INFO(B) ((block_info) (B)->aux)
237 /* Passed to change_stack to indicate where to emit insns. */
244 /* The block we're currently working on. */
245 static basic_block current_block;
247 /* In the current_block, whether we're processing the first register
248 stack or call instruction, i.e. the regstack is currently the
249 same as BLOCK_INFO(current_block)->stack_in. */
250 static bool starting_stack_p;
252 /* This is the register file for all register after conversion. */
254 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
256 #define FP_MODE_REG(regno,mode) \
257 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
259 /* Used to initialize uninitialized registers. */
260 static rtx not_a_num;
262 /* Forward declarations */
264 static int stack_regs_mentioned_p (const_rtx pat);
265 static void pop_stack (stack_ptr, int);
266 static rtx *get_true_reg (rtx *);
268 static int check_asm_stack_operands (rtx_insn *);
269 static void get_asm_operands_in_out (rtx, int *, int *);
270 static rtx stack_result (tree);
271 static void replace_reg (rtx *, int);
272 static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int);
273 static int get_hard_regnum (stack_ptr, rtx);
274 static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where);
275 static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx);
276 static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx);
277 static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx);
278 static int swap_rtx_condition_1 (rtx);
279 static int swap_rtx_condition (rtx_insn *);
280 static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx);
281 static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx);
282 static void subst_asm_stack_regs (rtx_insn *, stack_ptr);
283 static bool subst_stack_regs (rtx_insn *, stack_ptr);
284 static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where);
285 static void print_stack (FILE *, stack_ptr);
286 static rtx_insn *next_flags_user (rtx_insn *);
288 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
291 stack_regs_mentioned_p (const_rtx pat)
296 if (STACK_REG_P (pat))
299 fmt = GET_RTX_FORMAT (GET_CODE (pat));
300 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
306 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
307 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
310 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
317 /* Return nonzero if INSN mentions stacked registers, else return zero. */
320 stack_regs_mentioned (const_rtx insn)
322 unsigned int uid, max;
325 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ())
328 uid = INSN_UID (insn);
329 max = stack_regs_mentioned_data.length ();
332 /* Allocate some extra size to avoid too many reallocs, but
333 do not grow too quickly. */
334 max = uid + uid / 20 + 1;
335 stack_regs_mentioned_data.safe_grow_cleared (max);
338 test = stack_regs_mentioned_data[uid];
341 /* This insn has yet to be examined. Do so now. */
342 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
343 stack_regs_mentioned_data[uid] = test;
349 static rtx ix86_flags_rtx;
352 next_flags_user (rtx_insn *insn)
354 /* Search forward looking for the first use of this value.
355 Stop at block boundaries. */
357 while (insn != BB_END (current_block))
359 insn = NEXT_INSN (insn);
361 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
370 /* Reorganize the stack into ascending numbers, before this insn. */
373 straighten_stack (rtx_insn *insn, stack_ptr regstack)
375 struct stack_def temp_stack;
378 /* If there is only a single register on the stack, then the stack is
379 already in increasing order and no reorganization is needed.
381 Similarly if the stack is empty. */
382 if (regstack->top <= 0)
385 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
387 for (top = temp_stack.top = regstack->top; top >= 0; top--)
388 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
390 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
393 /* Pop a register from the stack. */
396 pop_stack (stack_ptr regstack, int regno)
398 int top = regstack->top;
400 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
402 /* If regno was not at the top of stack then adjust stack. */
403 if (regstack->reg [top] != regno)
406 for (i = regstack->top; i >= 0; i--)
407 if (regstack->reg [i] == regno)
410 for (j = i; j < top; j++)
411 regstack->reg [j] = regstack->reg [j + 1];
417 /* Return a pointer to the REG expression within PAT. If PAT is not a
418 REG, possible enclosed by a conversion rtx, return the inner part of
419 PAT that stopped the search. */
422 get_true_reg (rtx *pat)
425 switch (GET_CODE (*pat))
428 /* Eliminate FP subregister accesses in favor of the
429 actual FP register in use. */
432 if (STACK_REG_P (subreg = SUBREG_REG (*pat)))
434 int regno_off = subreg_regno_offset (REGNO (subreg),
438 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
446 pat = & XEXP (*pat, 0);
450 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP
451 || XINT (*pat, 1) == UNSPEC_FILD_ATOMIC)
452 pat = & XVECEXP (*pat, 0, 0);
456 if (!flag_unsafe_math_optimizations)
458 pat = & XEXP (*pat, 0);
466 /* Set if we find any malformed asms in a block. */
467 static bool any_malformed_asm;
469 /* There are many rules that an asm statement for stack-like regs must
470 follow. Those rules are explained at the top of this file: the rule
471 numbers below refer to that explanation. */
474 check_asm_stack_operands (rtx_insn *insn)
478 int malformed_asm = 0;
479 rtx body = PATTERN (insn);
481 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
482 char implicitly_dies[FIRST_PSEUDO_REGISTER];
484 rtx *clobber_reg = 0;
485 int n_inputs, n_outputs;
487 /* Find out what the constraints require. If no constraint
488 alternative matches, this asm is malformed. */
489 extract_constrain_insn (insn);
491 preprocess_constraints (insn);
493 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
495 if (which_alternative < 0)
498 /* Avoid further trouble with this insn. */
499 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
502 const operand_alternative *op_alt = which_op_alt ();
504 /* Strip SUBREGs here to make the following code simpler. */
505 for (i = 0; i < recog_data.n_operands; i++)
506 if (GET_CODE (recog_data.operand[i]) == SUBREG
507 && REG_P (SUBREG_REG (recog_data.operand[i])))
508 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
510 /* Set up CLOBBER_REG. */
514 if (GET_CODE (body) == PARALLEL)
516 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
518 for (i = 0; i < XVECLEN (body, 0); i++)
519 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
521 rtx clobber = XVECEXP (body, 0, i);
522 rtx reg = XEXP (clobber, 0);
524 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
525 reg = SUBREG_REG (reg);
527 if (STACK_REG_P (reg))
529 clobber_reg[n_clobbers] = reg;
535 /* Enforce rule #4: Output operands must specifically indicate which
536 reg an output appears in after an asm. "=f" is not allowed: the
537 operand constraints must select a class with a single reg.
539 Also enforce rule #5: Output operands must start at the top of
540 the reg-stack: output operands may not "skip" a reg. */
542 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
543 for (i = 0; i < n_outputs; i++)
544 if (STACK_REG_P (recog_data.operand[i]))
546 if (reg_class_size[(int) op_alt[i].cl] != 1)
548 error_for_asm (insn, "output constraint %d must specify a single register", i);
555 for (j = 0; j < n_clobbers; j++)
556 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
558 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
559 i, reg_names [REGNO (clobber_reg[j])]);
564 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
569 /* Search for first non-popped reg. */
570 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
571 if (! reg_used_as_output[i])
574 /* If there are any other popped regs, that's an error. */
575 for (; i < LAST_STACK_REG + 1; i++)
576 if (reg_used_as_output[i])
579 if (i != LAST_STACK_REG + 1)
581 error_for_asm (insn, "output regs must be grouped at top of stack");
585 /* Enforce rule #2: All implicitly popped input regs must be closer
586 to the top of the reg-stack than any input that is not implicitly
589 memset (implicitly_dies, 0, sizeof (implicitly_dies));
590 for (i = n_outputs; i < n_outputs + n_inputs; i++)
591 if (STACK_REG_P (recog_data.operand[i]))
593 /* An input reg is implicitly popped if it is tied to an
594 output, or if there is a CLOBBER for it. */
597 for (j = 0; j < n_clobbers; j++)
598 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
601 if (j < n_clobbers || op_alt[i].matches >= 0)
602 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
605 /* Search for first non-popped reg. */
606 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
607 if (! implicitly_dies[i])
610 /* If there are any other popped regs, that's an error. */
611 for (; i < LAST_STACK_REG + 1; i++)
612 if (implicitly_dies[i])
615 if (i != LAST_STACK_REG + 1)
618 "implicitly popped regs must be grouped at top of stack");
622 /* Enforce rule #3: If any input operand uses the "f" constraint, all
623 output constraints must use the "&" earlyclobber.
625 ??? Detect this more deterministically by having constrain_asm_operands
626 record any earlyclobber. */
628 for (i = n_outputs; i < n_outputs + n_inputs; i++)
629 if (op_alt[i].matches == -1)
633 for (j = 0; j < n_outputs; j++)
634 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
637 "output operand %d must use %<&%> constraint", j);
644 /* Avoid further trouble with this insn. */
645 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
646 any_malformed_asm = true;
653 /* Calculate the number of inputs and outputs in BODY, an
654 asm_operands. N_OPERANDS is the total number of operands, and
655 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
659 get_asm_operands_in_out (rtx body, int *pout, int *pin)
661 rtx asmop = extract_asm_operands (body);
663 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop);
664 *pout = (recog_data.n_operands
665 - ASM_OPERANDS_INPUT_LENGTH (asmop)
666 - ASM_OPERANDS_LABEL_LENGTH (asmop));
669 /* If current function returns its result in an fp stack register,
670 return the REG. Otherwise, return 0. */
673 stack_result (tree decl)
677 /* If the value is supposed to be returned in memory, then clearly
678 it is not returned in a stack register. */
679 if (aggregate_value_p (DECL_RESULT (decl), decl))
682 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
684 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
687 return result != 0 && STACK_REG_P (result) ? result : 0;
692 * This section deals with stack register substitution, and forms the second
696 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
697 the desired hard REGNO. */
700 replace_reg (rtx *reg, int regno)
702 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG));
703 gcc_assert (STACK_REG_P (*reg));
705 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
706 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
708 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
711 /* Remove a note of type NOTE, which must be found, for register
712 number REGNO from INSN. Remove only one such note. */
715 remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno)
717 rtx *note_link, this_rtx;
719 note_link = ®_NOTES (insn);
720 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1))
721 if (REG_NOTE_KIND (this_rtx) == note
722 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno)
724 *note_link = XEXP (this_rtx, 1);
728 note_link = &XEXP (this_rtx, 1);
733 /* Find the hard register number of virtual register REG in REGSTACK.
734 The hard register number is relative to the top of the stack. -1 is
735 returned if the register is not found. */
738 get_hard_regnum (stack_ptr regstack, rtx reg)
742 gcc_assert (STACK_REG_P (reg));
744 for (i = regstack->top; i >= 0; i--)
745 if (regstack->reg[i] == REGNO (reg))
748 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
751 /* Emit an insn to pop virtual register REG before or after INSN.
752 REGSTACK is the stack state after INSN and is updated to reflect this
753 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
754 is represented as a SET whose destination is the register to be popped
755 and source is the top of stack. A death note for the top of stack
756 cases the movdf pattern to pop. */
759 emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, enum emit_where where)
765 /* For complex types take care to pop both halves. These may survive in
766 CLOBBER and USE expressions. */
767 if (COMPLEX_MODE_P (GET_MODE (reg)))
769 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
770 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
773 if (get_hard_regnum (regstack, reg1) >= 0)
774 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
775 if (get_hard_regnum (regstack, reg2) >= 0)
776 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
777 gcc_assert (pop_insn);
781 hard_regno = get_hard_regnum (regstack, reg);
783 gcc_assert (hard_regno >= FIRST_STACK_REG);
785 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, DFmode),
786 FP_MODE_REG (FIRST_STACK_REG, DFmode));
788 if (where == EMIT_AFTER)
789 pop_insn = emit_insn_after (pop_rtx, insn);
791 pop_insn = emit_insn_before (pop_rtx, insn);
793 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode));
795 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
796 = regstack->reg[regstack->top];
798 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
803 /* Emit an insn before or after INSN to swap virtual register REG with
804 the top of stack. REGSTACK is the stack state before the swap, and
805 is updated to reflect the swap. A swap insn is represented as a
806 PARALLEL of two patterns: each pattern moves one reg to the other.
808 If REG is already at the top of the stack, no insn is emitted. */
811 emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg)
815 int other_reg; /* swap regno temps */
816 rtx_insn *i1; /* the stack-reg insn prior to INSN */
817 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
819 hard_regno = get_hard_regnum (regstack, reg);
821 if (hard_regno == FIRST_STACK_REG)
823 if (hard_regno == -1)
825 /* Something failed if the register wasn't on the stack. If we had
826 malformed asms, we zapped the instruction itself, but that didn't
827 produce the same pattern of register sets as before. To prevent
828 further failure, adjust REGSTACK to include REG at TOP. */
829 gcc_assert (any_malformed_asm);
830 regstack->reg[++regstack->top] = REGNO (reg);
833 gcc_assert (hard_regno >= FIRST_STACK_REG);
835 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
836 std::swap (regstack->reg[regstack->top], regstack->reg[other_reg]);
838 /* Find the previous insn involving stack regs, but don't pass a
841 if (current_block && insn != BB_HEAD (current_block))
843 rtx_insn *tmp = PREV_INSN (insn);
844 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block));
849 || NOTE_INSN_BASIC_BLOCK_P (tmp)
850 || (NONJUMP_INSN_P (tmp)
851 && stack_regs_mentioned (tmp)))
856 tmp = PREV_INSN (tmp);
861 && (i1set = single_set (i1)) != NULL_RTX)
863 rtx i1src = *get_true_reg (&SET_SRC (i1set));
864 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
866 /* If the previous register stack push was from the reg we are to
867 swap with, omit the swap. */
869 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
871 && REGNO (i1src) == (unsigned) hard_regno - 1
872 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
875 /* If the previous insn wrote to the reg we are to swap with,
878 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
879 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
880 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
884 /* Avoid emitting the swap if this is the first register stack insn
885 of the current_block. Instead update the current_block's stack_in
886 and let compensate edges take care of this for us. */
887 if (current_block && starting_stack_p)
889 BLOCK_INFO (current_block)->stack_in = *regstack;
890 starting_stack_p = false;
894 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
895 FP_MODE_REG (FIRST_STACK_REG, XFmode));
898 emit_insn_after (swap_rtx, i1);
899 else if (current_block)
900 emit_insn_before (swap_rtx, BB_HEAD (current_block));
902 emit_insn_before (swap_rtx, insn);
905 /* Emit an insns before INSN to swap virtual register SRC1 with
906 the top of stack and virtual register SRC2 with second stack
907 slot. REGSTACK is the stack state before the swaps, and
908 is updated to reflect the swaps. A swap insn is represented as a
909 PARALLEL of two patterns: each pattern moves one reg to the other.
911 If SRC1 and/or SRC2 are already at the right place, no swap insn
915 swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2)
917 struct stack_def temp_stack;
920 temp_stack = *regstack;
922 /* Place operand 1 at the top of stack. */
923 regno = get_hard_regnum (&temp_stack, src1);
924 gcc_assert (regno >= 0);
925 if (regno != FIRST_STACK_REG)
927 k = temp_stack.top - (regno - FIRST_STACK_REG);
930 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
933 /* Place operand 2 next on the stack. */
934 regno = get_hard_regnum (&temp_stack, src2);
935 gcc_assert (regno >= 0);
936 if (regno != FIRST_STACK_REG + 1)
938 k = temp_stack.top - (regno - FIRST_STACK_REG);
939 j = temp_stack.top - 1;
941 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
944 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
947 /* Handle a move to or from a stack register in PAT, which is in INSN.
948 REGSTACK is the current stack. Return whether a control flow insn
949 was deleted in the process. */
952 move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat)
954 rtx *psrc = get_true_reg (&SET_SRC (pat));
955 rtx *pdest = get_true_reg (&SET_DEST (pat));
958 bool control_flow_insn_deleted = false;
960 src = *psrc; dest = *pdest;
962 if (STACK_REG_P (src) && STACK_REG_P (dest))
964 /* Write from one stack reg to another. If SRC dies here, then
965 just change the register mapping and delete the insn. */
967 note = find_regno_note (insn, REG_DEAD, REGNO (src));
972 /* If this is a no-op move, there must not be a REG_DEAD note. */
973 gcc_assert (REGNO (src) != REGNO (dest));
975 for (i = regstack->top; i >= 0; i--)
976 if (regstack->reg[i] == REGNO (src))
979 /* The destination must be dead, or life analysis is borked. */
980 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
982 /* If the source is not live, this is yet another case of
983 uninitialized variables. Load up a NaN instead. */
985 return move_nan_for_stack_reg (insn, regstack, dest);
987 /* It is possible that the dest is unused after this insn.
988 If so, just pop the src. */
990 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
991 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
994 regstack->reg[i] = REGNO (dest);
995 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
996 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
999 control_flow_insn_deleted |= control_flow_insn_p (insn);
1001 return control_flow_insn_deleted;
1004 /* The source reg does not die. */
1006 /* If this appears to be a no-op move, delete it, or else it
1007 will confuse the machine description output patterns. But if
1008 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1009 for REG_UNUSED will not work for deleted insns. */
1011 if (REGNO (src) == REGNO (dest))
1013 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1014 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1016 control_flow_insn_deleted |= control_flow_insn_p (insn);
1018 return control_flow_insn_deleted;
1021 /* The destination ought to be dead. */
1022 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1024 replace_reg (psrc, get_hard_regnum (regstack, src));
1026 regstack->reg[++regstack->top] = REGNO (dest);
1027 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1028 replace_reg (pdest, FIRST_STACK_REG);
1030 else if (STACK_REG_P (src))
1032 /* Save from a stack reg to MEM, or possibly integer reg. Since
1033 only top of stack may be saved, emit an exchange first if
1036 emit_swap_insn (insn, regstack, src);
1038 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1041 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1043 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1045 else if ((GET_MODE (src) == XFmode)
1046 && regstack->top < REG_STACK_SIZE - 1)
1048 /* A 387 cannot write an XFmode value to a MEM without
1049 clobbering the source reg. The output code can handle
1050 this by reading back the value from the MEM.
1051 But it is more efficient to use a temp register if one is
1052 available. Push the source value here if the register
1053 stack is not full, and then write the value to memory via
1056 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1058 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1059 emit_insn_before (push_rtx, insn);
1060 add_reg_note (insn, REG_DEAD, top_stack_reg);
1063 replace_reg (psrc, FIRST_STACK_REG);
1067 rtx pat = PATTERN (insn);
1069 gcc_assert (STACK_REG_P (dest));
1071 /* Load from MEM, or possibly integer REG or constant, into the
1072 stack regs. The actual target is always the top of the
1073 stack. The stack mapping is changed to reflect that DEST is
1074 now at top of stack. */
1076 /* The destination ought to be dead. However, there is a
1077 special case with i387 UNSPEC_TAN, where destination is live
1078 (an argument to fptan) but inherent load of 1.0 is modelled
1079 as a load from a constant. */
1080 if (GET_CODE (pat) == PARALLEL
1081 && XVECLEN (pat, 0) == 2
1082 && GET_CODE (XVECEXP (pat, 0, 1)) == SET
1083 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC
1084 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN)
1085 emit_swap_insn (insn, regstack, dest);
1087 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1089 gcc_assert (regstack->top < REG_STACK_SIZE);
1091 regstack->reg[++regstack->top] = REGNO (dest);
1092 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1093 replace_reg (pdest, FIRST_STACK_REG);
1096 return control_flow_insn_deleted;
1099 /* A helper function which replaces INSN with a pattern that loads up
1100 a NaN into DEST, then invokes move_for_stack_reg. */
1103 move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest)
1107 dest = FP_MODE_REG (REGNO (dest), SFmode);
1108 pat = gen_rtx_SET (dest, not_a_num);
1109 PATTERN (insn) = pat;
1110 INSN_CODE (insn) = -1;
1112 return move_for_stack_reg (insn, regstack, pat);
1115 /* Swap the condition on a branch, if there is one. Return true if we
1116 found a condition to swap. False if the condition was not used as
1120 swap_rtx_condition_1 (rtx pat)
1125 if (COMPARISON_P (pat))
1127 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1132 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1133 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1139 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1140 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1142 else if (fmt[i] == 'e')
1143 r |= swap_rtx_condition_1 (XEXP (pat, i));
1151 swap_rtx_condition (rtx_insn *insn)
1153 rtx pat = PATTERN (insn);
1155 /* We're looking for a single set to cc0 or an HImode temporary. */
1157 if (GET_CODE (pat) == SET
1158 && REG_P (SET_DEST (pat))
1159 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1161 insn = next_flags_user (insn);
1162 if (insn == NULL_RTX)
1164 pat = PATTERN (insn);
1167 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1168 with the cc value right now. We may be able to search for one
1171 if (GET_CODE (pat) == SET
1172 && GET_CODE (SET_SRC (pat)) == UNSPEC
1173 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1175 rtx dest = SET_DEST (pat);
1177 /* Search forward looking for the first use of this value.
1178 Stop at block boundaries. */
1179 while (insn != BB_END (current_block))
1181 insn = NEXT_INSN (insn);
1182 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1188 /* We haven't found it. */
1189 if (insn == BB_END (current_block))
1192 /* So we've found the insn using this value. If it is anything
1193 other than sahf or the value does not die (meaning we'd have
1194 to search further), then we must give up. */
1195 pat = PATTERN (insn);
1196 if (GET_CODE (pat) != SET
1197 || GET_CODE (SET_SRC (pat)) != UNSPEC
1198 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1199 || ! dead_or_set_p (insn, dest))
1202 /* Now we are prepared to handle this as a normal cc0 setter. */
1203 insn = next_flags_user (insn);
1204 if (insn == NULL_RTX)
1206 pat = PATTERN (insn);
1209 if (swap_rtx_condition_1 (pat))
1212 INSN_CODE (insn) = -1;
1213 if (recog_memoized (insn) == -1)
1215 /* In case the flags don't die here, recurse to try fix
1216 following user too. */
1217 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1219 insn = next_flags_user (insn);
1220 if (!insn || !swap_rtx_condition (insn))
1225 swap_rtx_condition_1 (pat);
1233 /* Handle a comparison. Special care needs to be taken to avoid
1234 causing comparisons that a 387 cannot do correctly, such as EQ.
1236 Also, a pop insn may need to be emitted. The 387 does have an
1237 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1238 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1242 compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat_src)
1245 rtx src1_note, src2_note;
1247 src1 = get_true_reg (&XEXP (pat_src, 0));
1248 src2 = get_true_reg (&XEXP (pat_src, 1));
1250 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1251 registers that die in this insn - move those to stack top first. */
1252 if ((! STACK_REG_P (*src1)
1253 || (STACK_REG_P (*src2)
1254 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1255 && swap_rtx_condition (insn))
1257 std::swap (XEXP (pat_src, 0), XEXP (pat_src, 1));
1259 src1 = get_true_reg (&XEXP (pat_src, 0));
1260 src2 = get_true_reg (&XEXP (pat_src, 1));
1262 INSN_CODE (insn) = -1;
1265 /* We will fix any death note later. */
1267 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1269 if (STACK_REG_P (*src2))
1270 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1272 src2_note = NULL_RTX;
1274 emit_swap_insn (insn, regstack, *src1);
1276 replace_reg (src1, FIRST_STACK_REG);
1278 if (STACK_REG_P (*src2))
1279 replace_reg (src2, get_hard_regnum (regstack, *src2));
1283 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1284 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1287 /* If the second operand dies, handle that. But if the operands are
1288 the same stack register, don't bother, because only one death is
1289 needed, and it was just handled. */
1292 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1293 && REGNO (*src1) == REGNO (*src2)))
1295 /* As a special case, two regs may die in this insn if src2 is
1296 next to top of stack and the top of stack also dies. Since
1297 we have already popped src1, "next to top of stack" is really
1298 at top (FIRST_STACK_REG) now. */
1300 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1303 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1304 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1308 /* The 386 can only represent death of the first operand in
1309 the case handled above. In all other cases, emit a separate
1310 pop and remove the death note from here. */
1311 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1312 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1318 /* Substitute hardware stack regs in debug insn INSN, using stack
1319 layout REGSTACK. If we can't find a hardware stack reg for any of
1320 the REGs in it, reset the debug insn. */
1323 subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack)
1325 subrtx_ptr_iterator::array_type array;
1326 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST)
1330 if (STACK_REG_P (x))
1332 int hard_regno = get_hard_regnum (regstack, x);
1334 /* If we can't find an active register, reset this debug insn. */
1335 if (hard_regno == -1)
1337 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
1341 gcc_assert (hard_regno >= FIRST_STACK_REG);
1342 replace_reg (loc, hard_regno);
1343 iter.skip_subrtxes ();
1348 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1349 is the current register layout. Return whether a control flow insn
1350 was deleted in the process. */
1353 subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat)
1356 bool control_flow_insn_deleted = false;
1358 switch (GET_CODE (pat))
1361 /* Deaths in USE insns can happen in non optimizing compilation.
1362 Handle them by popping the dying register. */
1363 src = get_true_reg (&XEXP (pat, 0));
1364 if (STACK_REG_P (*src)
1365 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1367 /* USEs are ignored for liveness information so USEs of dead
1368 register might happen. */
1369 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src)))
1370 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1371 return control_flow_insn_deleted;
1373 /* Uninitialized USE might happen for functions returning uninitialized
1374 value. We will properly initialize the USE on the edge to EXIT_BLOCK,
1375 so it is safe to ignore the use here. This is consistent with behavior
1376 of dataflow analyzer that ignores USE too. (This also imply that
1377 forcibly initializing the register to NaN here would lead to ICE later,
1378 since the REG_DEAD notes are not issued.) */
1388 dest = get_true_reg (&XEXP (pat, 0));
1389 if (STACK_REG_P (*dest))
1391 note = find_reg_note (insn, REG_DEAD, *dest);
1393 if (pat != PATTERN (insn))
1395 /* The fix_truncdi_1 pattern wants to be able to
1396 allocate its own scratch register. It does this by
1397 clobbering an fp reg so that it is assured of an
1398 empty reg-stack register. If the register is live,
1399 kill it now. Remove the DEAD/UNUSED note so we
1400 don't try to kill it later too.
1402 In reality the UNUSED note can be absent in some
1403 complicated cases when the register is reused for
1404 partially set variable. */
1407 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1409 note = find_reg_note (insn, REG_UNUSED, *dest);
1411 remove_note (insn, note);
1412 replace_reg (dest, FIRST_STACK_REG + 1);
1416 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1417 indicates an uninitialized value. Because reload removed
1418 all other clobbers, this must be due to a function
1419 returning without a value. Load up a NaN. */
1424 if (COMPLEX_MODE_P (GET_MODE (t)))
1426 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1427 if (get_hard_regnum (regstack, u) == -1)
1429 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1430 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1431 control_flow_insn_deleted
1432 |= move_nan_for_stack_reg (insn2, regstack, u);
1435 if (get_hard_regnum (regstack, t) == -1)
1436 control_flow_insn_deleted
1437 |= move_nan_for_stack_reg (insn, regstack, t);
1446 rtx *src1 = (rtx *) 0, *src2;
1447 rtx src1_note, src2_note;
1450 dest = get_true_reg (&SET_DEST (pat));
1451 src = get_true_reg (&SET_SRC (pat));
1452 pat_src = SET_SRC (pat);
1454 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1455 if (STACK_REG_P (*src)
1456 || (STACK_REG_P (*dest)
1457 && (REG_P (*src) || MEM_P (*src)
1458 || CONST_DOUBLE_P (*src))))
1460 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1464 switch (GET_CODE (pat_src))
1467 compare_for_stack_reg (insn, regstack, pat_src);
1473 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1476 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1477 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1480 replace_reg (dest, FIRST_STACK_REG);
1484 /* This is a `tstM2' case. */
1485 gcc_assert (*dest == cc0_rtx);
1490 case FLOAT_TRUNCATE:
1494 /* These insns only operate on the top of the stack. DEST might
1495 be cc0_rtx if we're processing a tstM pattern. Also, it's
1496 possible that the tstM case results in a REG_DEAD note on the
1500 src1 = get_true_reg (&XEXP (pat_src, 0));
1502 emit_swap_insn (insn, regstack, *src1);
1504 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1506 if (STACK_REG_P (*dest))
1507 replace_reg (dest, FIRST_STACK_REG);
1511 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1513 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1516 replace_reg (src1, FIRST_STACK_REG);
1521 /* On i386, reversed forms of subM3 and divM3 exist for
1522 MODE_FLOAT, so the same code that works for addM3 and mulM3
1526 /* These insns can accept the top of stack as a destination
1527 from a stack reg or mem, or can use the top of stack as a
1528 source and some other stack register (possibly top of stack)
1529 as a destination. */
1531 src1 = get_true_reg (&XEXP (pat_src, 0));
1532 src2 = get_true_reg (&XEXP (pat_src, 1));
1534 /* We will fix any death note later. */
1536 if (STACK_REG_P (*src1))
1537 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1539 src1_note = NULL_RTX;
1540 if (STACK_REG_P (*src2))
1541 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1543 src2_note = NULL_RTX;
1545 /* If either operand is not a stack register, then the dest
1546 must be top of stack. */
1548 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1549 emit_swap_insn (insn, regstack, *dest);
1552 /* Both operands are REG. If neither operand is already
1553 at the top of stack, choose to make the one that is the
1554 dest the new top of stack. */
1556 int src1_hard_regnum, src2_hard_regnum;
1558 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1559 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1561 /* If the source is not live, this is yet another case of
1562 uninitialized variables. Load up a NaN instead. */
1563 if (src1_hard_regnum == -1)
1565 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1);
1566 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1567 control_flow_insn_deleted
1568 |= move_nan_for_stack_reg (insn2, regstack, *src1);
1570 if (src2_hard_regnum == -1)
1572 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2);
1573 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1574 control_flow_insn_deleted
1575 |= move_nan_for_stack_reg (insn2, regstack, *src2);
1578 if (src1_hard_regnum != FIRST_STACK_REG
1579 && src2_hard_regnum != FIRST_STACK_REG)
1580 emit_swap_insn (insn, regstack, *dest);
1583 if (STACK_REG_P (*src1))
1584 replace_reg (src1, get_hard_regnum (regstack, *src1));
1585 if (STACK_REG_P (*src2))
1586 replace_reg (src2, get_hard_regnum (regstack, *src2));
1590 rtx src1_reg = XEXP (src1_note, 0);
1592 /* If the register that dies is at the top of stack, then
1593 the destination is somewhere else - merely substitute it.
1594 But if the reg that dies is not at top of stack, then
1595 move the top of stack to the dead reg, as though we had
1596 done the insn and then a store-with-pop. */
1598 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1600 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1601 replace_reg (dest, get_hard_regnum (regstack, *dest));
1605 int regno = get_hard_regnum (regstack, src1_reg);
1607 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1608 replace_reg (dest, regno);
1610 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1611 = regstack->reg[regstack->top];
1614 CLEAR_HARD_REG_BIT (regstack->reg_set,
1615 REGNO (XEXP (src1_note, 0)));
1616 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1621 rtx src2_reg = XEXP (src2_note, 0);
1622 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1624 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1625 replace_reg (dest, get_hard_regnum (regstack, *dest));
1629 int regno = get_hard_regnum (regstack, src2_reg);
1631 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1632 replace_reg (dest, regno);
1634 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1635 = regstack->reg[regstack->top];
1638 CLEAR_HARD_REG_BIT (regstack->reg_set,
1639 REGNO (XEXP (src2_note, 0)));
1640 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1645 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1646 replace_reg (dest, get_hard_regnum (regstack, *dest));
1649 /* Keep operand 1 matching with destination. */
1650 if (COMMUTATIVE_ARITH_P (pat_src)
1651 && REG_P (*src1) && REG_P (*src2)
1652 && REGNO (*src1) != REGNO (*dest))
1654 int tmp = REGNO (*src1);
1655 replace_reg (src1, REGNO (*src2));
1656 replace_reg (src2, tmp);
1661 switch (XINT (pat_src, 1))
1664 case UNSPEC_FIST_ATOMIC:
1666 case UNSPEC_FIST_FLOOR:
1667 case UNSPEC_FIST_CEIL:
1669 /* These insns only operate on the top of the stack. */
1671 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1672 emit_swap_insn (insn, regstack, *src1);
1674 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1676 if (STACK_REG_P (*dest))
1677 replace_reg (dest, FIRST_STACK_REG);
1681 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1683 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1686 replace_reg (src1, FIRST_STACK_REG);
1691 /* This insn only operate on the top of the stack. */
1693 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1694 emit_swap_insn (insn, regstack, *src1);
1696 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1698 replace_reg (src1, FIRST_STACK_REG);
1702 remove_regno_note (insn, REG_DEAD,
1703 REGNO (XEXP (src1_note, 0)));
1704 emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
1712 case UNSPEC_FRNDINT:
1715 case UNSPEC_FRNDINT_FLOOR:
1716 case UNSPEC_FRNDINT_CEIL:
1717 case UNSPEC_FRNDINT_TRUNC:
1718 case UNSPEC_FRNDINT_MASK_PM:
1720 /* Above insns operate on the top of the stack. */
1722 case UNSPEC_SINCOS_COS:
1723 case UNSPEC_XTRACT_FRACT:
1725 /* Above insns operate on the top two stack slots,
1726 first part of one input, double output insn. */
1728 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1730 emit_swap_insn (insn, regstack, *src1);
1732 /* Input should never die, it is replaced with output. */
1733 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1734 gcc_assert (!src1_note);
1736 if (STACK_REG_P (*dest))
1737 replace_reg (dest, FIRST_STACK_REG);
1739 replace_reg (src1, FIRST_STACK_REG);
1742 case UNSPEC_SINCOS_SIN:
1743 case UNSPEC_XTRACT_EXP:
1745 /* These insns operate on the top two stack slots,
1746 second part of one input, double output insn. */
1753 /* For UNSPEC_TAN, regstack->top is already increased
1754 by inherent load of constant 1.0. */
1756 /* Output value is generated in the second stack slot.
1757 Move current value from second slot to the top. */
1758 regstack->reg[regstack->top]
1759 = regstack->reg[regstack->top - 1];
1761 gcc_assert (STACK_REG_P (*dest));
1763 regstack->reg[regstack->top - 1] = REGNO (*dest);
1764 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1765 replace_reg (dest, FIRST_STACK_REG + 1);
1767 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1769 replace_reg (src1, FIRST_STACK_REG);
1774 case UNSPEC_FYL2XP1:
1775 /* These insns operate on the top two stack slots. */
1777 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1778 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1780 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1781 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1783 swap_to_top (insn, regstack, *src1, *src2);
1785 replace_reg (src1, FIRST_STACK_REG);
1786 replace_reg (src2, FIRST_STACK_REG + 1);
1789 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1791 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1793 /* Pop both input operands from the stack. */
1794 CLEAR_HARD_REG_BIT (regstack->reg_set,
1795 regstack->reg[regstack->top]);
1796 CLEAR_HARD_REG_BIT (regstack->reg_set,
1797 regstack->reg[regstack->top - 1]);
1800 /* Push the result back onto the stack. */
1801 regstack->reg[++regstack->top] = REGNO (*dest);
1802 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1803 replace_reg (dest, FIRST_STACK_REG);
1806 case UNSPEC_FSCALE_FRACT:
1807 case UNSPEC_FPREM_F:
1808 case UNSPEC_FPREM1_F:
1809 /* These insns operate on the top two stack slots,
1810 first part of double input, double output insn. */
1812 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1813 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1815 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1816 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1818 /* Inputs should never die, they are
1819 replaced with outputs. */
1820 gcc_assert (!src1_note);
1821 gcc_assert (!src2_note);
1823 swap_to_top (insn, regstack, *src1, *src2);
1825 /* Push the result back onto stack. Empty stack slot
1826 will be filled in second part of insn. */
1827 if (STACK_REG_P (*dest))
1829 regstack->reg[regstack->top] = REGNO (*dest);
1830 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1831 replace_reg (dest, FIRST_STACK_REG);
1834 replace_reg (src1, FIRST_STACK_REG);
1835 replace_reg (src2, FIRST_STACK_REG + 1);
1838 case UNSPEC_FSCALE_EXP:
1839 case UNSPEC_FPREM_U:
1840 case UNSPEC_FPREM1_U:
1841 /* These insns operate on the top two stack slots,
1842 second part of double input, double output insn. */
1844 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1845 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1847 /* Push the result back onto stack. Fill empty slot from
1848 first part of insn and fix top of stack pointer. */
1849 if (STACK_REG_P (*dest))
1851 regstack->reg[regstack->top - 1] = REGNO (*dest);
1852 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1853 replace_reg (dest, FIRST_STACK_REG + 1);
1856 replace_reg (src1, FIRST_STACK_REG);
1857 replace_reg (src2, FIRST_STACK_REG + 1);
1860 case UNSPEC_C2_FLAG:
1861 /* This insn operates on the top two stack slots,
1862 third part of C2 setting double input insn. */
1864 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1865 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1867 replace_reg (src1, FIRST_STACK_REG);
1868 replace_reg (src2, FIRST_STACK_REG + 1);
1872 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1873 The combination matches the PPRO fcomi instruction. */
1875 pat_src = XVECEXP (pat_src, 0, 0);
1876 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1877 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1881 /* Combined fcomp+fnstsw generated for doing well with
1882 CSE. When optimizing this would have been broken
1885 pat_src = XVECEXP (pat_src, 0, 0);
1886 gcc_assert (GET_CODE (pat_src) == COMPARE);
1888 compare_for_stack_reg (insn, regstack, pat_src);
1897 /* This insn requires the top of stack to be the destination. */
1899 src1 = get_true_reg (&XEXP (pat_src, 1));
1900 src2 = get_true_reg (&XEXP (pat_src, 2));
1902 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1903 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1905 /* If the comparison operator is an FP comparison operator,
1906 it is handled correctly by compare_for_stack_reg () who
1907 will move the destination to the top of stack. But if the
1908 comparison operator is not an FP comparison operator, we
1909 have to handle it here. */
1910 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1911 && REGNO (*dest) != regstack->reg[regstack->top])
1913 /* In case one of operands is the top of stack and the operands
1914 dies, it is safe to make it the destination operand by
1915 reversing the direction of cmove and avoid fxch. */
1916 if ((REGNO (*src1) == regstack->reg[regstack->top]
1918 || (REGNO (*src2) == regstack->reg[regstack->top]
1921 int idx1 = (get_hard_regnum (regstack, *src1)
1923 int idx2 = (get_hard_regnum (regstack, *src2)
1926 /* Make reg-stack believe that the operands are already
1927 swapped on the stack */
1928 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1929 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1931 /* Reverse condition to compensate the operand swap.
1932 i386 do have comparison always reversible. */
1933 PUT_CODE (XEXP (pat_src, 0),
1934 reversed_comparison_code (XEXP (pat_src, 0), insn));
1937 emit_swap_insn (insn, regstack, *dest);
1945 src_note[1] = src1_note;
1946 src_note[2] = src2_note;
1948 if (STACK_REG_P (*src1))
1949 replace_reg (src1, get_hard_regnum (regstack, *src1));
1950 if (STACK_REG_P (*src2))
1951 replace_reg (src2, get_hard_regnum (regstack, *src2));
1953 for (i = 1; i <= 2; i++)
1956 int regno = REGNO (XEXP (src_note[i], 0));
1958 /* If the register that dies is not at the top of
1959 stack, then move the top of stack to the dead reg.
1960 Top of stack should never die, as it is the
1962 gcc_assert (regno != regstack->reg[regstack->top]);
1963 remove_regno_note (insn, REG_DEAD, regno);
1964 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1969 /* Make dest the top of stack. Add dest to regstack if
1971 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1972 regstack->reg[++regstack->top] = REGNO (*dest);
1973 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1974 replace_reg (dest, FIRST_STACK_REG);
1987 return control_flow_insn_deleted;
1990 /* Substitute hard regnums for any stack regs in INSN, which has
1991 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1992 before the insn, and is updated with changes made here.
1994 There are several requirements and assumptions about the use of
1995 stack-like regs in asm statements. These rules are enforced by
1996 record_asm_stack_regs; see comments there for details. Any
1997 asm_operands left in the RTL at this point may be assume to meet the
1998 requirements, since record_asm_stack_regs removes any problem asm. */
2001 subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack)
2003 rtx body = PATTERN (insn);
2005 rtx *note_reg; /* Array of note contents */
2006 rtx **note_loc; /* Address of REG field of each note */
2007 enum reg_note *note_kind; /* The type of each note */
2009 rtx *clobber_reg = 0;
2010 rtx **clobber_loc = 0;
2012 struct stack_def temp_stack;
2017 int n_inputs, n_outputs;
2019 if (! check_asm_stack_operands (insn))
2022 /* Find out what the constraints required. If no constraint
2023 alternative matches, that is a compiler bug: we should have caught
2024 such an insn in check_asm_stack_operands. */
2025 extract_constrain_insn (insn);
2027 preprocess_constraints (insn);
2028 const operand_alternative *op_alt = which_op_alt ();
2030 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
2032 /* Strip SUBREGs here to make the following code simpler. */
2033 for (i = 0; i < recog_data.n_operands; i++)
2034 if (GET_CODE (recog_data.operand[i]) == SUBREG
2035 && REG_P (SUBREG_REG (recog_data.operand[i])))
2037 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2038 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2041 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2043 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2046 note_reg = XALLOCAVEC (rtx, i);
2047 note_loc = XALLOCAVEC (rtx *, i);
2048 note_kind = XALLOCAVEC (enum reg_note, i);
2051 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2053 if (GET_CODE (note) != EXPR_LIST)
2055 rtx reg = XEXP (note, 0);
2056 rtx *loc = & XEXP (note, 0);
2058 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2060 loc = & SUBREG_REG (reg);
2061 reg = SUBREG_REG (reg);
2064 if (STACK_REG_P (reg)
2065 && (REG_NOTE_KIND (note) == REG_DEAD
2066 || REG_NOTE_KIND (note) == REG_UNUSED))
2068 note_reg[n_notes] = reg;
2069 note_loc[n_notes] = loc;
2070 note_kind[n_notes] = REG_NOTE_KIND (note);
2075 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2079 if (GET_CODE (body) == PARALLEL)
2081 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
2082 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0));
2084 for (i = 0; i < XVECLEN (body, 0); i++)
2085 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2087 rtx clobber = XVECEXP (body, 0, i);
2088 rtx reg = XEXP (clobber, 0);
2089 rtx *loc = & XEXP (clobber, 0);
2091 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2093 loc = & SUBREG_REG (reg);
2094 reg = SUBREG_REG (reg);
2097 if (STACK_REG_P (reg))
2099 clobber_reg[n_clobbers] = reg;
2100 clobber_loc[n_clobbers] = loc;
2106 temp_stack = *regstack;
2108 /* Put the input regs into the desired place in TEMP_STACK. */
2110 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2111 if (STACK_REG_P (recog_data.operand[i])
2112 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS)
2113 && op_alt[i].cl != FLOAT_REGS)
2115 /* If an operand needs to be in a particular reg in
2116 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2117 these constraints are for single register classes, and
2118 reload guaranteed that operand[i] is already in that class,
2119 we can just use REGNO (recog_data.operand[i]) to know which
2120 actual reg this operand needs to be in. */
2122 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2124 gcc_assert (regno >= 0);
2126 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2128 /* recog_data.operand[i] is not in the right place. Find
2129 it and swap it with whatever is already in I's place.
2130 K is where recog_data.operand[i] is now. J is where it
2134 k = temp_stack.top - (regno - FIRST_STACK_REG);
2136 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2138 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
2142 /* Emit insns before INSN to make sure the reg-stack is in the right
2145 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2147 /* Make the needed input register substitutions. Do death notes and
2148 clobbers too, because these are for inputs, not outputs. */
2150 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2151 if (STACK_REG_P (recog_data.operand[i]))
2153 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2155 gcc_assert (regnum >= 0);
2157 replace_reg (recog_data.operand_loc[i], regnum);
2160 for (i = 0; i < n_notes; i++)
2161 if (note_kind[i] == REG_DEAD)
2163 int regnum = get_hard_regnum (regstack, note_reg[i]);
2165 gcc_assert (regnum >= 0);
2167 replace_reg (note_loc[i], regnum);
2170 for (i = 0; i < n_clobbers; i++)
2172 /* It's OK for a CLOBBER to reference a reg that is not live.
2173 Don't try to replace it in that case. */
2174 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2178 /* Sigh - clobbers always have QImode. But replace_reg knows
2179 that these regs can't be MODE_INT and will assert. Just put
2180 the right reg there without calling replace_reg. */
2182 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2186 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2188 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2189 if (STACK_REG_P (recog_data.operand[i]))
2191 /* An input reg is implicitly popped if it is tied to an
2192 output, or if there is a CLOBBER for it. */
2195 for (j = 0; j < n_clobbers; j++)
2196 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2199 if (j < n_clobbers || op_alt[i].matches >= 0)
2201 /* recog_data.operand[i] might not be at the top of stack.
2202 But that's OK, because all we need to do is pop the
2203 right number of regs off of the top of the reg-stack.
2204 record_asm_stack_regs guaranteed that all implicitly
2205 popped regs were grouped at the top of the reg-stack. */
2207 CLEAR_HARD_REG_BIT (regstack->reg_set,
2208 regstack->reg[regstack->top]);
2213 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2214 Note that there isn't any need to substitute register numbers.
2215 ??? Explain why this is true. */
2217 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2219 /* See if there is an output for this hard reg. */
2222 for (j = 0; j < n_outputs; j++)
2223 if (STACK_REG_P (recog_data.operand[j])
2224 && REGNO (recog_data.operand[j]) == (unsigned) i)
2226 regstack->reg[++regstack->top] = i;
2227 SET_HARD_REG_BIT (regstack->reg_set, i);
2232 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2233 input that the asm didn't implicitly pop. If the asm didn't
2234 implicitly pop an input reg, that reg will still be live.
2236 Note that we can't use find_regno_note here: the register numbers
2237 in the death notes have already been substituted. */
2239 for (i = 0; i < n_outputs; i++)
2240 if (STACK_REG_P (recog_data.operand[i]))
2244 for (j = 0; j < n_notes; j++)
2245 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2246 && note_kind[j] == REG_UNUSED)
2248 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2254 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2255 if (STACK_REG_P (recog_data.operand[i]))
2259 for (j = 0; j < n_notes; j++)
2260 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2261 && note_kind[j] == REG_DEAD
2262 && TEST_HARD_REG_BIT (regstack->reg_set,
2263 REGNO (recog_data.operand[i])))
2265 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2272 /* Substitute stack hard reg numbers for stack virtual registers in
2273 INSN. Non-stack register numbers are not changed. REGSTACK is the
2274 current stack content. Insns may be emitted as needed to arrange the
2275 stack for the 387 based on the contents of the insn. Return whether
2276 a control flow insn was deleted in the process. */
2279 subst_stack_regs (rtx_insn *insn, stack_ptr regstack)
2281 rtx *note_link, note;
2282 bool control_flow_insn_deleted = false;
2287 int top = regstack->top;
2289 /* If there are any floating point parameters to be passed in
2290 registers for this call, make sure they are in the right
2295 straighten_stack (insn, regstack);
2297 /* Now mark the arguments as dead after the call. */
2299 while (regstack->top >= 0)
2301 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2307 /* Do the actual substitution if any stack regs are mentioned.
2308 Since we only record whether entire insn mentions stack regs, and
2309 subst_stack_regs_pat only works for patterns that contain stack regs,
2310 we must check each pattern in a parallel here. A call_value_pop could
2313 if (stack_regs_mentioned (insn))
2315 int n_operands = asm_noperands (PATTERN (insn));
2316 if (n_operands >= 0)
2318 /* This insn is an `asm' with operands. Decode the operands,
2319 decide how many are inputs, and do register substitution.
2320 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2322 subst_asm_stack_regs (insn, regstack);
2323 return control_flow_insn_deleted;
2326 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2327 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2329 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2331 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2332 XVECEXP (PATTERN (insn), 0, i)
2333 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2334 control_flow_insn_deleted
2335 |= subst_stack_regs_pat (insn, regstack,
2336 XVECEXP (PATTERN (insn), 0, i));
2340 control_flow_insn_deleted
2341 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2344 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2345 REG_UNUSED will already have been dealt with, so just return. */
2347 if (NOTE_P (insn) || insn->deleted ())
2348 return control_flow_insn_deleted;
2350 /* If this a noreturn call, we can't insert pop insns after it.
2351 Instead, reset the stack state to empty. */
2353 && find_reg_note (insn, REG_NORETURN, NULL))
2356 CLEAR_HARD_REG_SET (regstack->reg_set);
2357 return control_flow_insn_deleted;
2360 /* If there is a REG_UNUSED note on a stack register on this insn,
2361 the indicated reg must be popped. The REG_UNUSED note is removed,
2362 since the form of the newly emitted pop insn references the reg,
2363 making it no longer `unset'. */
2365 note_link = ®_NOTES (insn);
2366 for (note = *note_link; note; note = XEXP (note, 1))
2367 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2369 *note_link = XEXP (note, 1);
2370 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2373 note_link = &XEXP (note, 1);
2375 return control_flow_insn_deleted;
2378 /* Change the organization of the stack so that it fits a new basic
2379 block. Some registers might have to be popped, but there can never be
2380 a register live in the new block that is not now live.
2382 Insert any needed insns before or after INSN, as indicated by
2383 WHERE. OLD is the original stack layout, and NEW is the desired
2384 form. OLD is updated to reflect the code emitted, i.e., it will be
2385 the same as NEW upon return.
2387 This function will not preserve block_end[]. But that information
2388 is no longer needed once this has executed. */
2391 change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack,
2392 enum emit_where where)
2398 /* Stack adjustments for the first insn in a block update the
2399 current_block's stack_in instead of inserting insns directly.
2400 compensate_edges will add the necessary code later. */
2403 && where == EMIT_BEFORE)
2405 BLOCK_INFO (current_block)->stack_in = *new_stack;
2406 starting_stack_p = false;
2411 /* We will be inserting new insns "backwards". If we are to insert
2412 after INSN, find the next insn, and insert before it. */
2414 if (where == EMIT_AFTER)
2416 if (current_block && BB_END (current_block) == insn)
2418 insn = NEXT_INSN (insn);
2421 /* Initialize partially dead variables. */
2422 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
2423 if (TEST_HARD_REG_BIT (new_stack->reg_set, i)
2424 && !TEST_HARD_REG_BIT (old->reg_set, i))
2426 old->reg[++old->top] = i;
2427 SET_HARD_REG_BIT (old->reg_set, i);
2428 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num),
2432 /* Pop any registers that are not needed in the new block. */
2434 /* If the destination block's stack already has a specified layout
2435 and contains two or more registers, use a more intelligent algorithm
2436 to pop registers that minimizes the number number of fxchs below. */
2437 if (new_stack->top > 0)
2439 bool slots[REG_STACK_SIZE];
2440 int pops[REG_STACK_SIZE];
2441 int next, dest, topsrc;
2443 /* First pass to determine the free slots. */
2444 for (reg = 0; reg <= new_stack->top; reg++)
2445 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]);
2447 /* Second pass to allocate preferred slots. */
2449 for (reg = old->top; reg > new_stack->top; reg--)
2450 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2453 for (next = 0; next <= new_stack->top; next++)
2454 if (!slots[next] && new_stack->reg[next] == old->reg[reg])
2456 /* If this is a preference for the new top of stack, record
2457 the fact by remembering it's old->reg in topsrc. */
2458 if (next == new_stack->top)
2469 /* Intentionally, avoid placing the top of stack in it's correct
2470 location, if we still need to permute the stack below and we
2471 can usefully place it somewhere else. This is the case if any
2472 slot is still unallocated, in which case we should place the
2473 top of stack there. */
2475 for (reg = 0; reg < new_stack->top; reg++)
2479 slots[new_stack->top] = false;
2484 /* Third pass allocates remaining slots and emits pop insns. */
2485 next = new_stack->top;
2486 for (reg = old->top; reg > new_stack->top; reg--)
2491 /* Find next free slot. */
2496 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2502 /* The following loop attempts to maximize the number of times we
2503 pop the top of the stack, as this permits the use of the faster
2504 ffreep instruction on platforms that support it. */
2508 for (reg = 0; reg <= old->top; reg++)
2509 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2513 while (old->top >= live)
2514 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top]))
2516 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next]))
2518 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2522 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2526 if (new_stack->top == -2)
2528 /* If the new block has never been processed, then it can inherit
2529 the old stack order. */
2531 new_stack->top = old->top;
2532 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg));
2536 /* This block has been entered before, and we must match the
2537 previously selected stack order. */
2539 /* By now, the only difference should be the order of the stack,
2540 not their depth or liveliness. */
2542 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set));
2543 gcc_assert (old->top == new_stack->top);
2545 /* If the stack is not empty (new_stack->top != -1), loop here emitting
2546 swaps until the stack is correct.
2548 The worst case number of swaps emitted is N + 2, where N is the
2549 depth of the stack. In some cases, the reg at the top of
2550 stack may be correct, but swapped anyway in order to fix
2551 other regs. But since we never swap any other reg away from
2552 its correct slot, this algorithm will converge. */
2554 if (new_stack->top != -1)
2557 /* Swap the reg at top of stack into the position it is
2558 supposed to be in, until the correct top of stack appears. */
2560 while (old->reg[old->top] != new_stack->reg[new_stack->top])
2562 for (reg = new_stack->top; reg >= 0; reg--)
2563 if (new_stack->reg[reg] == old->reg[old->top])
2566 gcc_assert (reg != -1);
2568 emit_swap_insn (insn, old,
2569 FP_MODE_REG (old->reg[reg], DFmode));
2572 /* See if any regs remain incorrect. If so, bring an
2573 incorrect reg to the top of stack, and let the while loop
2576 for (reg = new_stack->top; reg >= 0; reg--)
2577 if (new_stack->reg[reg] != old->reg[reg])
2579 emit_swap_insn (insn, old,
2580 FP_MODE_REG (old->reg[reg], DFmode));
2585 /* At this point there must be no differences. */
2587 for (reg = old->top; reg >= 0; reg--)
2588 gcc_assert (old->reg[reg] == new_stack->reg[reg]);
2592 BB_END (current_block) = PREV_INSN (insn);
2595 /* Print stack configuration. */
2598 print_stack (FILE *file, stack_ptr s)
2604 fprintf (file, "uninitialized\n");
2605 else if (s->top == -1)
2606 fprintf (file, "empty\n");
2611 for (i = 0; i <= s->top; ++i)
2612 fprintf (file, "%d ", s->reg[i]);
2613 fputs ("]\n", file);
2617 /* This function was doing life analysis. We now let the regular live
2618 code do it's job, so we only need to check some extra invariants
2619 that reg-stack expects. Primary among these being that all registers
2620 are initialized before use.
2622 The function returns true when code was emitted to CFG edges and
2623 commit_edge_insertions needs to be called. */
2626 convert_regs_entry (void)
2632 /* Load something into each stack register live at function entry.
2633 Such live registers can be caused by uninitialized variables or
2634 functions not returning values on all paths. In order to keep
2635 the push/pop code happy, and to not scrog the register stack, we
2636 must put something in these registers. Use a QNaN.
2638 Note that we are inserting converted code here. This code is
2639 never seen by the convert_regs pass. */
2641 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
2643 basic_block block = e->dest;
2644 block_info bi = BLOCK_INFO (block);
2647 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2648 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2652 bi->stack_in.reg[++top] = reg;
2654 init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode),
2656 insert_insn_on_edge (init, e);
2660 bi->stack_in.top = top;
2666 /* Construct the desired stack for function exit. This will either
2667 be `empty', or the function return value at top-of-stack. */
2670 convert_regs_exit (void)
2672 int value_reg_low, value_reg_high;
2673 stack_ptr output_stack;
2676 retvalue = stack_result (current_function_decl);
2677 value_reg_low = value_reg_high = -1;
2680 value_reg_low = REGNO (retvalue);
2681 value_reg_high = END_HARD_REGNO (retvalue) - 1;
2684 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in;
2685 if (value_reg_low == -1)
2686 output_stack->top = -1;
2691 output_stack->top = value_reg_high - value_reg_low;
2692 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2694 output_stack->reg[value_reg_high - reg] = reg;
2695 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2700 /* Copy the stack info from the end of edge E's source block to the
2701 start of E's destination block. */
2704 propagate_stack (edge e)
2706 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out;
2707 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2710 /* Preserve the order of the original stack, but check whether
2711 any pops are needed. */
2712 dest_stack->top = -1;
2713 for (reg = 0; reg <= src_stack->top; ++reg)
2714 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2715 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2717 /* Push in any partially dead values. */
2718 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++)
2719 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg)
2720 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg))
2721 dest_stack->reg[++dest_stack->top] = reg;
2725 /* Adjust the stack of edge E's source block on exit to match the stack
2726 of it's target block upon input. The stack layouts of both blocks
2727 should have been defined by now. */
2730 compensate_edge (edge e)
2732 basic_block source = e->src, target = e->dest;
2733 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in;
2734 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out;
2735 struct stack_def regstack;
2739 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2741 gcc_assert (target_stack->top != -2);
2743 /* Check whether stacks are identical. */
2744 if (target_stack->top == source_stack->top)
2746 for (reg = target_stack->top; reg >= 0; --reg)
2747 if (target_stack->reg[reg] != source_stack->reg[reg])
2753 fprintf (dump_file, "no changes needed\n");
2760 fprintf (dump_file, "correcting stack to ");
2761 print_stack (dump_file, target_stack);
2764 /* Abnormal calls may appear to have values live in st(0), but the
2765 abnormal return path will not have actually loaded the values. */
2766 if (e->flags & EDGE_ABNORMAL_CALL)
2768 /* Assert that the lifetimes are as we expect -- one value
2769 live at st(0) on the end of the source block, and no
2770 values live at the beginning of the destination block.
2771 For complex return values, we may have st(1) live as well. */
2772 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2773 gcc_assert (target_stack->top == -1);
2777 /* Handle non-call EH edges specially. The normal return path have
2778 values in registers. These will be popped en masse by the unwind
2780 if (e->flags & EDGE_EH)
2782 gcc_assert (target_stack->top == -1);
2786 /* We don't support abnormal edges. Global takes care to
2787 avoid any live register across them, so we should never
2788 have to insert instructions on such edges. */
2789 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2791 /* Make a copy of source_stack as change_stack is destructive. */
2792 regstack = *source_stack;
2794 /* It is better to output directly to the end of the block
2795 instead of to the edge, because emit_swap can do minimal
2796 insn scheduling. We can do this when there is only one
2797 edge out, and it is not abnormal. */
2798 if (EDGE_COUNT (source->succs) == 1)
2800 current_block = source;
2801 change_stack (BB_END (source), ®stack, target_stack,
2802 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2809 current_block = NULL;
2812 /* ??? change_stack needs some point to emit insns after. */
2813 after = emit_note (NOTE_INSN_DELETED);
2815 change_stack (after, ®stack, target_stack, EMIT_BEFORE);
2820 insert_insn_on_edge (seq, e);
2826 /* Traverse all non-entry edges in the CFG, and emit the necessary
2827 edge compensation code to change the stack from stack_out of the
2828 source block to the stack_in of the destination block. */
2831 compensate_edges (void)
2833 bool inserted = false;
2836 starting_stack_p = false;
2838 FOR_EACH_BB_FN (bb, cfun)
2839 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun))
2844 FOR_EACH_EDGE (e, ei, bb->succs)
2845 inserted |= compensate_edge (e);
2850 /* Select the better of two edges E1 and E2 to use to determine the
2851 stack layout for their shared destination basic block. This is
2852 typically the more frequently executed. The edge E1 may be NULL
2853 (in which case E2 is returned), but E2 is always non-NULL. */
2856 better_edge (edge e1, edge e2)
2861 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2863 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2866 if (e1->count > e2->count)
2868 if (e1->count < e2->count)
2871 /* Prefer critical edges to minimize inserting compensation code on
2874 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2875 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2877 /* Avoid non-deterministic behavior. */
2878 return (e1->src->index < e2->src->index) ? e1 : e2;
2881 /* Convert stack register references in one block. Return true if the CFG
2882 has been modified in the process. */
2885 convert_regs_1 (basic_block block)
2887 struct stack_def regstack;
2888 block_info bi = BLOCK_INFO (block);
2890 rtx_insn *insn, *next;
2891 bool control_flow_insn_deleted = false;
2892 bool cfg_altered = false;
2893 int debug_insns_with_starting_stack = 0;
2895 any_malformed_asm = false;
2897 /* Choose an initial stack layout, if one hasn't already been chosen. */
2898 if (bi->stack_in.top == -2)
2900 edge e, beste = NULL;
2903 /* Select the best incoming edge (typically the most frequent) to
2904 use as a template for this basic block. */
2905 FOR_EACH_EDGE (e, ei, block->preds)
2906 if (BLOCK_INFO (e->src)->done)
2907 beste = better_edge (beste, e);
2910 propagate_stack (beste);
2913 /* No predecessors. Create an arbitrary input stack. */
2914 bi->stack_in.top = -1;
2915 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2916 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2917 bi->stack_in.reg[++bi->stack_in.top] = reg;
2923 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2924 print_stack (dump_file, &bi->stack_in);
2927 /* Process all insns in this block. Keep track of NEXT so that we
2928 don't process insns emitted while substituting in INSN. */
2929 current_block = block;
2930 next = BB_HEAD (block);
2931 regstack = bi->stack_in;
2932 starting_stack_p = true;
2937 next = NEXT_INSN (insn);
2939 /* Ensure we have not missed a block boundary. */
2941 if (insn == BB_END (block))
2944 /* Don't bother processing unless there is a stack reg
2945 mentioned or if it's a CALL_INSN. */
2946 if (DEBUG_INSN_P (insn))
2948 if (starting_stack_p)
2949 debug_insns_with_starting_stack++;
2952 subst_all_stack_regs_in_debug_insn (insn, ®stack);
2954 /* Nothing must ever die at a debug insn. If something
2955 is referenced in it that becomes dead, it should have
2956 died before and the reference in the debug insn
2957 should have been removed so as to avoid changing code
2959 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL));
2962 else if (stack_regs_mentioned (insn)
2967 fprintf (dump_file, " insn %d input stack: ",
2969 print_stack (dump_file, ®stack);
2971 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
2972 starting_stack_p = false;
2977 if (debug_insns_with_starting_stack)
2979 /* Since it's the first non-debug instruction that determines
2980 the stack requirements of the current basic block, we refrain
2981 from updating debug insns before it in the loop above, and
2982 fix them up here. */
2983 for (insn = BB_HEAD (block); debug_insns_with_starting_stack;
2984 insn = NEXT_INSN (insn))
2986 if (!DEBUG_INSN_P (insn))
2989 debug_insns_with_starting_stack--;
2990 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in);
2996 fprintf (dump_file, "Expected live registers [");
2997 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2998 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2999 fprintf (dump_file, " %d", reg);
3000 fprintf (dump_file, " ]\nOutput stack: ");
3001 print_stack (dump_file, ®stack);
3004 insn = BB_END (block);
3006 insn = PREV_INSN (insn);
3008 /* If the function is declared to return a value, but it returns one
3009 in only some cases, some registers might come live here. Emit
3010 necessary moves for them. */
3012 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3014 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
3015 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
3020 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
3022 set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num);
3023 insn = emit_insn_after (set, insn);
3024 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
3028 /* Amongst the insns possibly deleted during the substitution process above,
3029 might have been the only trapping insn in the block. We purge the now
3030 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
3031 called at the end of convert_regs. The order in which we process the
3032 blocks ensures that we never delete an already processed edge.
3034 Note that, at this point, the CFG may have been damaged by the emission
3035 of instructions after an abnormal call, which moves the basic block end
3036 (and is the reason why we call fixup_abnormal_edges later). So we must
3037 be sure that the trapping insn has been deleted before trying to purge
3038 dead edges, otherwise we risk purging valid edges.
3040 ??? We are normally supposed not to delete trapping insns, so we pretend
3041 that the insns deleted above don't actually trap. It would have been
3042 better to detect this earlier and avoid creating the EH edge in the first
3043 place, still, but we don't have enough information at that time. */
3045 if (control_flow_insn_deleted)
3046 cfg_altered |= purge_dead_edges (block);
3048 /* Something failed if the stack lives don't match. If we had malformed
3049 asms, we zapped the instruction itself, but that didn't produce the
3050 same pattern of register kills as before. */
3052 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set)
3053 || any_malformed_asm);
3054 bi->stack_out = regstack;
3060 /* Convert registers in all blocks reachable from BLOCK. Return true if the
3061 CFG has been modified in the process. */
3064 convert_regs_2 (basic_block block)
3066 basic_block *stack, *sp;
3067 bool cfg_altered = false;
3069 /* We process the blocks in a top-down manner, in a way such that one block
3070 is only processed after all its predecessors. The number of predecessors
3071 of every block has already been computed. */
3073 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun));
3085 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3086 some dead EH outgoing edge after the deletion of the trapping
3087 insn inside the block. Since the number of predecessors of
3088 BLOCK's successors was computed based on the initial edge set,
3089 we check the necessity to process some of these successors
3090 before such an edge deletion may happen. However, there is
3091 a pitfall: if BLOCK is the only predecessor of a successor and
3092 the edge between them happens to be deleted, the successor
3093 becomes unreachable and should not be processed. The problem
3094 is that there is no way to preventively detect this case so we
3095 stack the successor in all cases and hand over the task of
3096 fixing up the discrepancy to convert_regs_1. */
3098 FOR_EACH_EDGE (e, ei, block->succs)
3099 if (! (e->flags & EDGE_DFS_BACK))
3101 BLOCK_INFO (e->dest)->predecessors--;
3102 if (!BLOCK_INFO (e->dest)->predecessors)
3106 cfg_altered |= convert_regs_1 (block);
3108 while (sp != stack);
3115 /* Traverse all basic blocks in a function, converting the register
3116 references in each insn from the "flat" register file that gcc uses,
3117 to the stack-like registers the 387 uses. */
3122 bool cfg_altered = false;
3128 /* Initialize uninitialized registers on function entry. */
3129 inserted = convert_regs_entry ();
3131 /* Construct the desired stack for function exit. */
3132 convert_regs_exit ();
3133 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1;
3135 /* ??? Future: process inner loops first, and give them arbitrary
3136 initial stacks which emit_swap_insn can modify. This ought to
3137 prevent double fxch that often appears at the head of a loop. */
3139 /* Process all blocks reachable from all entry points. */
3140 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
3141 cfg_altered |= convert_regs_2 (e->dest);
3143 /* ??? Process all unreachable blocks. Though there's no excuse
3144 for keeping these even when not optimizing. */
3145 FOR_EACH_BB_FN (b, cfun)
3147 block_info bi = BLOCK_INFO (b);
3150 cfg_altered |= convert_regs_2 (b);
3153 /* We must fix up abnormal edges before inserting compensation code
3154 because both mechanisms insert insns on edges. */
3155 inserted |= fixup_abnormal_edges ();
3157 inserted |= compensate_edges ();
3159 clear_aux_for_blocks ();
3162 commit_edge_insertions ();
3168 fputc ('\n', dump_file);
3171 /* Convert register usage from "flat" register file usage to a "stack
3172 register file. FILE is the dump file, if used.
3174 Construct a CFG and run life analysis. Then convert each insn one
3175 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3176 code duplication created when the converter inserts pop insns on
3186 /* Clean up previous run. */
3187 stack_regs_mentioned_data.release ();
3189 /* See if there is something to do. Flow analysis is quite
3190 expensive so we might save some compilation time. */
3191 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3192 if (df_regs_ever_live_p (i))
3194 if (i > LAST_STACK_REG)
3197 df_note_add_problem ();
3200 mark_dfs_back_edges ();
3202 /* Set up block info for each basic block. */
3203 alloc_aux_for_blocks (sizeof (struct block_info_def));
3204 FOR_EACH_BB_FN (bb, cfun)
3206 block_info bi = BLOCK_INFO (bb);
3211 FOR_EACH_EDGE (e, ei, bb->preds)
3212 if (!(e->flags & EDGE_DFS_BACK)
3213 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun))
3216 /* Set current register status at last instruction `uninitialized'. */
3217 bi->stack_in.top = -2;
3219 /* Copy live_at_end and live_at_start into temporaries. */
3220 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3222 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg))
3223 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3224 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg))
3225 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3229 /* Create the replacement registers up front. */
3230 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3233 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3235 mode = GET_MODE_WIDER_MODE (mode))
3236 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3237 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3239 mode = GET_MODE_WIDER_MODE (mode))
3240 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3243 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3245 /* A QNaN for initializing uninitialized variables.
3247 ??? We can't load from constant memory in PIC mode, because
3248 we're inserting these instructions before the prologue and
3249 the PIC register hasn't been set up. In that case, fall back
3250 on zero, which we can get from `fldz'. */
3252 if ((flag_pic && !TARGET_64BIT)
3253 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3254 not_a_num = CONST0_RTX (SFmode);
3259 real_nan (&r, "", 1, SFmode);
3260 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode);
3261 not_a_num = force_const_mem (SFmode, not_a_num);
3264 /* Allocate a cache for stack_regs_mentioned. */
3265 max_uid = get_max_uid ();
3266 stack_regs_mentioned_data.create (max_uid + 1);
3267 memset (stack_regs_mentioned_data.address (),
3268 0, sizeof (char) * (max_uid + 1));
3272 free_aux_for_blocks ();
3275 #endif /* STACK_REGS */
3279 const pass_data pass_data_stack_regs =
3281 RTL_PASS, /* type */
3282 "*stack_regs", /* name */
3283 OPTGROUP_NONE, /* optinfo_flags */
3284 TV_REG_STACK, /* tv_id */
3285 0, /* properties_required */
3286 0, /* properties_provided */
3287 0, /* properties_destroyed */
3288 0, /* todo_flags_start */
3289 0, /* todo_flags_finish */
3292 class pass_stack_regs : public rtl_opt_pass
3295 pass_stack_regs (gcc::context *ctxt)
3296 : rtl_opt_pass (pass_data_stack_regs, ctxt)
3299 /* opt_pass methods: */
3300 virtual bool gate (function *)
3309 }; // class pass_stack_regs
3314 make_pass_stack_regs (gcc::context *ctxt)
3316 return new pass_stack_regs (ctxt);
3319 /* Convert register usage from flat register file usage to a stack
3322 rest_of_handle_stack_regs (void)
3326 regstack_completed = 1;
3333 const pass_data pass_data_stack_regs_run =
3335 RTL_PASS, /* type */
3337 OPTGROUP_NONE, /* optinfo_flags */
3338 TV_REG_STACK, /* tv_id */
3339 0, /* properties_required */
3340 0, /* properties_provided */
3341 0, /* properties_destroyed */
3342 0, /* todo_flags_start */
3343 TODO_df_finish, /* todo_flags_finish */
3346 class pass_stack_regs_run : public rtl_opt_pass
3349 pass_stack_regs_run (gcc::context *ctxt)
3350 : rtl_opt_pass (pass_data_stack_regs_run, ctxt)
3353 /* opt_pass methods: */
3354 virtual unsigned int execute (function *)
3356 return rest_of_handle_stack_regs ();
3359 }; // class pass_stack_regs_run
3364 make_pass_stack_regs_run (gcc::context *ctxt)
3366 return new pass_stack_regs_run (ctxt);