1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
78 There are several rules on the usage of stack-like regs in
79 asm_operands insns. These rules apply only to the operands that are
82 1. Given a set of input regs that die in an asm_operands, it is
83 necessary to know which are implicitly popped by the asm, and
84 which must be explicitly popped by gcc.
86 An input reg that is implicitly popped by the asm must be
87 explicitly clobbered, unless it is constrained to match an
90 2. For any input reg that is implicitly popped by an asm, it is
91 necessary to know how to adjust the stack to compensate for the pop.
92 If any non-popped input is closer to the top of the reg-stack than
93 the implicitly popped reg, it would not be possible to know what the
94 stack looked like - it's not clear how the rest of the stack "slides
97 All implicitly popped input regs must be closer to the top of
98 the reg-stack than any input that is not implicitly popped.
100 3. It is possible that if an input dies in an insn, reload might
101 use the input reg for an output reload. Consider this example:
103 asm ("foo" : "=t" (a) : "f" (b));
105 This asm says that input B is not popped by the asm, and that
106 the asm pushes a result onto the reg-stack, i.e., the stack is one
107 deeper after the asm than it was before. But, it is possible that
108 reload will think that it can use the same reg for both the input and
109 the output, if input B dies in this insn.
111 If any input operand uses the "f" constraint, all output reg
112 constraints must use the "&" earlyclobber.
114 The asm above would be written as
116 asm ("foo" : "=&t" (a) : "f" (b));
118 4. Some operands need to be in particular places on the stack. All
119 output operands fall in this category - there is no other way to
120 know which regs the outputs appear in unless the user indicates
121 this in the constraints.
123 Output operands must specifically indicate which reg an output
124 appears in after an asm. "=f" is not allowed: the operand
125 constraints must select a class with a single reg.
127 5. Output operands may not be "inserted" between existing stack regs.
128 Since no 387 opcode uses a read/write operand, all output operands
129 are dead before the asm_operands, and are pushed by the asm_operands.
130 It makes no sense to push anywhere but the top of the reg-stack.
132 Output operands must start at the top of the reg-stack: output
133 operands may not "skip" a reg.
135 6. Some asm statements may need extra stack space for internal
136 calculations. This can be guaranteed by clobbering stack registers
137 unrelated to the inputs and outputs.
139 Here are a couple of reasonable asms to want to write. This asm
140 takes one input, which is internally popped, and produces two outputs.
142 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
144 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
145 and replaces them with one output. The user must code the "st(1)"
146 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
148 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
154 #include "coretypes.h"
158 #include "rtl-error.h"
160 #include "function.h"
161 #include "insn-config.h"
163 #include "hard-reg-set.h"
166 #include "basic-block.h"
169 #include "tree-pass.h"
172 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
173 #include "rtl-iter.h"
177 /* We use this array to cache info about insns, because otherwise we
178 spend too much time in stack_regs_mentioned_p.
180 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
181 the insn uses stack registers, two indicates the insn does not use
183 static vec<char> stack_regs_mentioned_data;
185 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
187 int regstack_completed = 0;
189 /* This is the basic stack record. TOP is an index into REG[] such
190 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
192 If TOP is -2, REG[] is not yet initialized. Stack initialization
193 consists of placing each live reg in array `reg' and setting `top'
196 REG_SET indicates which registers are live. */
198 typedef struct stack_def
200 int top; /* index to top stack element */
201 HARD_REG_SET reg_set; /* set of live registers */
202 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
205 /* This is used to carry information about basic blocks. It is
206 attached to the AUX field of the standard CFG block. */
208 typedef struct block_info_def
210 struct stack_def stack_in; /* Input stack configuration. */
211 struct stack_def stack_out; /* Output stack configuration. */
212 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
213 int done; /* True if block already converted. */
214 int predecessors; /* Number of predecessors that need
218 #define BLOCK_INFO(B) ((block_info) (B)->aux)
220 /* Passed to change_stack to indicate where to emit insns. */
227 /* The block we're currently working on. */
228 static basic_block current_block;
230 /* In the current_block, whether we're processing the first register
231 stack or call instruction, i.e. the regstack is currently the
232 same as BLOCK_INFO(current_block)->stack_in. */
233 static bool starting_stack_p;
235 /* This is the register file for all register after conversion. */
237 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
239 #define FP_MODE_REG(regno,mode) \
240 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
242 /* Used to initialize uninitialized registers. */
243 static rtx not_a_num;
245 /* Forward declarations */
247 static int stack_regs_mentioned_p (const_rtx pat);
248 static void pop_stack (stack_ptr, int);
249 static rtx *get_true_reg (rtx *);
251 static int check_asm_stack_operands (rtx_insn *);
252 static void get_asm_operands_in_out (rtx, int *, int *);
253 static rtx stack_result (tree);
254 static void replace_reg (rtx *, int);
255 static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int);
256 static int get_hard_regnum (stack_ptr, rtx);
257 static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where);
258 static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx);
259 static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx);
260 static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx);
261 static int swap_rtx_condition_1 (rtx);
262 static int swap_rtx_condition (rtx_insn *);
263 static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx);
264 static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx);
265 static void subst_asm_stack_regs (rtx_insn *, stack_ptr);
266 static bool subst_stack_regs (rtx_insn *, stack_ptr);
267 static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where);
268 static void print_stack (FILE *, stack_ptr);
269 static rtx_insn *next_flags_user (rtx_insn *);
271 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
274 stack_regs_mentioned_p (const_rtx pat)
279 if (STACK_REG_P (pat))
282 fmt = GET_RTX_FORMAT (GET_CODE (pat));
283 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
289 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
290 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
293 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
300 /* Return nonzero if INSN mentions stacked registers, else return zero. */
303 stack_regs_mentioned (const_rtx insn)
305 unsigned int uid, max;
308 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ())
311 uid = INSN_UID (insn);
312 max = stack_regs_mentioned_data.length ();
315 /* Allocate some extra size to avoid too many reallocs, but
316 do not grow too quickly. */
317 max = uid + uid / 20 + 1;
318 stack_regs_mentioned_data.safe_grow_cleared (max);
321 test = stack_regs_mentioned_data[uid];
324 /* This insn has yet to be examined. Do so now. */
325 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
326 stack_regs_mentioned_data[uid] = test;
332 static rtx ix86_flags_rtx;
335 next_flags_user (rtx_insn *insn)
337 /* Search forward looking for the first use of this value.
338 Stop at block boundaries. */
340 while (insn != BB_END (current_block))
342 insn = NEXT_INSN (insn);
344 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
353 /* Reorganize the stack into ascending numbers, before this insn. */
356 straighten_stack (rtx_insn *insn, stack_ptr regstack)
358 struct stack_def temp_stack;
361 /* If there is only a single register on the stack, then the stack is
362 already in increasing order and no reorganization is needed.
364 Similarly if the stack is empty. */
365 if (regstack->top <= 0)
368 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
370 for (top = temp_stack.top = regstack->top; top >= 0; top--)
371 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
373 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
376 /* Pop a register from the stack. */
379 pop_stack (stack_ptr regstack, int regno)
381 int top = regstack->top;
383 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
385 /* If regno was not at the top of stack then adjust stack. */
386 if (regstack->reg [top] != regno)
389 for (i = regstack->top; i >= 0; i--)
390 if (regstack->reg [i] == regno)
393 for (j = i; j < top; j++)
394 regstack->reg [j] = regstack->reg [j + 1];
400 /* Return a pointer to the REG expression within PAT. If PAT is not a
401 REG, possible enclosed by a conversion rtx, return the inner part of
402 PAT that stopped the search. */
405 get_true_reg (rtx *pat)
408 switch (GET_CODE (*pat))
411 /* Eliminate FP subregister accesses in favor of the
412 actual FP register in use. */
415 if (STACK_REG_P (subreg = SUBREG_REG (*pat)))
417 int regno_off = subreg_regno_offset (REGNO (subreg),
421 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
429 pat = & XEXP (*pat, 0);
433 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP
434 || XINT (*pat, 1) == UNSPEC_LDA)
435 pat = & XVECEXP (*pat, 0, 0);
439 if (!flag_unsafe_math_optimizations)
441 pat = & XEXP (*pat, 0);
449 /* Set if we find any malformed asms in a block. */
450 static bool any_malformed_asm;
452 /* There are many rules that an asm statement for stack-like regs must
453 follow. Those rules are explained at the top of this file: the rule
454 numbers below refer to that explanation. */
457 check_asm_stack_operands (rtx_insn *insn)
461 int malformed_asm = 0;
462 rtx body = PATTERN (insn);
464 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
465 char implicitly_dies[FIRST_PSEUDO_REGISTER];
467 rtx *clobber_reg = 0;
468 int n_inputs, n_outputs;
470 /* Find out what the constraints require. If no constraint
471 alternative matches, this asm is malformed. */
473 constrain_operands (1);
475 preprocess_constraints (insn);
477 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
479 if (which_alternative < 0)
482 /* Avoid further trouble with this insn. */
483 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
486 const operand_alternative *op_alt = which_op_alt ();
488 /* Strip SUBREGs here to make the following code simpler. */
489 for (i = 0; i < recog_data.n_operands; i++)
490 if (GET_CODE (recog_data.operand[i]) == SUBREG
491 && REG_P (SUBREG_REG (recog_data.operand[i])))
492 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
494 /* Set up CLOBBER_REG. */
498 if (GET_CODE (body) == PARALLEL)
500 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
502 for (i = 0; i < XVECLEN (body, 0); i++)
503 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
505 rtx clobber = XVECEXP (body, 0, i);
506 rtx reg = XEXP (clobber, 0);
508 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
509 reg = SUBREG_REG (reg);
511 if (STACK_REG_P (reg))
513 clobber_reg[n_clobbers] = reg;
519 /* Enforce rule #4: Output operands must specifically indicate which
520 reg an output appears in after an asm. "=f" is not allowed: the
521 operand constraints must select a class with a single reg.
523 Also enforce rule #5: Output operands must start at the top of
524 the reg-stack: output operands may not "skip" a reg. */
526 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
527 for (i = 0; i < n_outputs; i++)
528 if (STACK_REG_P (recog_data.operand[i]))
530 if (reg_class_size[(int) op_alt[i].cl] != 1)
532 error_for_asm (insn, "output constraint %d must specify a single register", i);
539 for (j = 0; j < n_clobbers; j++)
540 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
542 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
543 i, reg_names [REGNO (clobber_reg[j])]);
548 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
553 /* Search for first non-popped reg. */
554 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
555 if (! reg_used_as_output[i])
558 /* If there are any other popped regs, that's an error. */
559 for (; i < LAST_STACK_REG + 1; i++)
560 if (reg_used_as_output[i])
563 if (i != LAST_STACK_REG + 1)
565 error_for_asm (insn, "output regs must be grouped at top of stack");
569 /* Enforce rule #2: All implicitly popped input regs must be closer
570 to the top of the reg-stack than any input that is not implicitly
573 memset (implicitly_dies, 0, sizeof (implicitly_dies));
574 for (i = n_outputs; i < n_outputs + n_inputs; i++)
575 if (STACK_REG_P (recog_data.operand[i]))
577 /* An input reg is implicitly popped if it is tied to an
578 output, or if there is a CLOBBER for it. */
581 for (j = 0; j < n_clobbers; j++)
582 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
585 if (j < n_clobbers || op_alt[i].matches >= 0)
586 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
589 /* Search for first non-popped reg. */
590 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
591 if (! implicitly_dies[i])
594 /* If there are any other popped regs, that's an error. */
595 for (; i < LAST_STACK_REG + 1; i++)
596 if (implicitly_dies[i])
599 if (i != LAST_STACK_REG + 1)
602 "implicitly popped regs must be grouped at top of stack");
606 /* Enforce rule #3: If any input operand uses the "f" constraint, all
607 output constraints must use the "&" earlyclobber.
609 ??? Detect this more deterministically by having constrain_asm_operands
610 record any earlyclobber. */
612 for (i = n_outputs; i < n_outputs + n_inputs; i++)
613 if (op_alt[i].matches == -1)
617 for (j = 0; j < n_outputs; j++)
618 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
621 "output operand %d must use %<&%> constraint", j);
628 /* Avoid further trouble with this insn. */
629 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
630 any_malformed_asm = true;
637 /* Calculate the number of inputs and outputs in BODY, an
638 asm_operands. N_OPERANDS is the total number of operands, and
639 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
643 get_asm_operands_in_out (rtx body, int *pout, int *pin)
645 rtx asmop = extract_asm_operands (body);
647 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop);
648 *pout = (recog_data.n_operands
649 - ASM_OPERANDS_INPUT_LENGTH (asmop)
650 - ASM_OPERANDS_LABEL_LENGTH (asmop));
653 /* If current function returns its result in an fp stack register,
654 return the REG. Otherwise, return 0. */
657 stack_result (tree decl)
661 /* If the value is supposed to be returned in memory, then clearly
662 it is not returned in a stack register. */
663 if (aggregate_value_p (DECL_RESULT (decl), decl))
666 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
668 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
671 return result != 0 && STACK_REG_P (result) ? result : 0;
676 * This section deals with stack register substitution, and forms the second
680 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
681 the desired hard REGNO. */
684 replace_reg (rtx *reg, int regno)
686 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG));
687 gcc_assert (STACK_REG_P (*reg));
689 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
690 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
692 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
695 /* Remove a note of type NOTE, which must be found, for register
696 number REGNO from INSN. Remove only one such note. */
699 remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno)
701 rtx *note_link, this_rtx;
703 note_link = ®_NOTES (insn);
704 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1))
705 if (REG_NOTE_KIND (this_rtx) == note
706 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno)
708 *note_link = XEXP (this_rtx, 1);
712 note_link = &XEXP (this_rtx, 1);
717 /* Find the hard register number of virtual register REG in REGSTACK.
718 The hard register number is relative to the top of the stack. -1 is
719 returned if the register is not found. */
722 get_hard_regnum (stack_ptr regstack, rtx reg)
726 gcc_assert (STACK_REG_P (reg));
728 for (i = regstack->top; i >= 0; i--)
729 if (regstack->reg[i] == REGNO (reg))
732 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
735 /* Emit an insn to pop virtual register REG before or after INSN.
736 REGSTACK is the stack state after INSN and is updated to reflect this
737 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
738 is represented as a SET whose destination is the register to be popped
739 and source is the top of stack. A death note for the top of stack
740 cases the movdf pattern to pop. */
743 emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, enum emit_where where)
749 /* For complex types take care to pop both halves. These may survive in
750 CLOBBER and USE expressions. */
751 if (COMPLEX_MODE_P (GET_MODE (reg)))
753 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
754 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
757 if (get_hard_regnum (regstack, reg1) >= 0)
758 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
759 if (get_hard_regnum (regstack, reg2) >= 0)
760 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
761 gcc_assert (pop_insn);
765 hard_regno = get_hard_regnum (regstack, reg);
767 gcc_assert (hard_regno >= FIRST_STACK_REG);
769 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
770 FP_MODE_REG (FIRST_STACK_REG, DFmode));
772 if (where == EMIT_AFTER)
773 pop_insn = emit_insn_after (pop_rtx, insn);
775 pop_insn = emit_insn_before (pop_rtx, insn);
777 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode));
779 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
780 = regstack->reg[regstack->top];
782 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
787 /* Emit an insn before or after INSN to swap virtual register REG with
788 the top of stack. REGSTACK is the stack state before the swap, and
789 is updated to reflect the swap. A swap insn is represented as a
790 PARALLEL of two patterns: each pattern moves one reg to the other.
792 If REG is already at the top of the stack, no insn is emitted. */
795 emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg)
799 int tmp, other_reg; /* swap regno temps */
800 rtx_insn *i1; /* the stack-reg insn prior to INSN */
801 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
803 hard_regno = get_hard_regnum (regstack, reg);
805 if (hard_regno == FIRST_STACK_REG)
807 if (hard_regno == -1)
809 /* Something failed if the register wasn't on the stack. If we had
810 malformed asms, we zapped the instruction itself, but that didn't
811 produce the same pattern of register sets as before. To prevent
812 further failure, adjust REGSTACK to include REG at TOP. */
813 gcc_assert (any_malformed_asm);
814 regstack->reg[++regstack->top] = REGNO (reg);
817 gcc_assert (hard_regno >= FIRST_STACK_REG);
819 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
821 tmp = regstack->reg[other_reg];
822 regstack->reg[other_reg] = regstack->reg[regstack->top];
823 regstack->reg[regstack->top] = tmp;
825 /* Find the previous insn involving stack regs, but don't pass a
828 if (current_block && insn != BB_HEAD (current_block))
830 rtx_insn *tmp = PREV_INSN (insn);
831 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block));
836 || NOTE_INSN_BASIC_BLOCK_P (tmp)
837 || (NONJUMP_INSN_P (tmp)
838 && stack_regs_mentioned (tmp)))
843 tmp = PREV_INSN (tmp);
848 && (i1set = single_set (i1)) != NULL_RTX)
850 rtx i1src = *get_true_reg (&SET_SRC (i1set));
851 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
853 /* If the previous register stack push was from the reg we are to
854 swap with, omit the swap. */
856 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
858 && REGNO (i1src) == (unsigned) hard_regno - 1
859 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
862 /* If the previous insn wrote to the reg we are to swap with,
865 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
866 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
867 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
871 /* Avoid emitting the swap if this is the first register stack insn
872 of the current_block. Instead update the current_block's stack_in
873 and let compensate edges take care of this for us. */
874 if (current_block && starting_stack_p)
876 BLOCK_INFO (current_block)->stack_in = *regstack;
877 starting_stack_p = false;
881 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
882 FP_MODE_REG (FIRST_STACK_REG, XFmode));
885 emit_insn_after (swap_rtx, i1);
886 else if (current_block)
887 emit_insn_before (swap_rtx, BB_HEAD (current_block));
889 emit_insn_before (swap_rtx, insn);
892 /* Emit an insns before INSN to swap virtual register SRC1 with
893 the top of stack and virtual register SRC2 with second stack
894 slot. REGSTACK is the stack state before the swaps, and
895 is updated to reflect the swaps. A swap insn is represented as a
896 PARALLEL of two patterns: each pattern moves one reg to the other.
898 If SRC1 and/or SRC2 are already at the right place, no swap insn
902 swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2)
904 struct stack_def temp_stack;
905 int regno, j, k, temp;
907 temp_stack = *regstack;
909 /* Place operand 1 at the top of stack. */
910 regno = get_hard_regnum (&temp_stack, src1);
911 gcc_assert (regno >= 0);
912 if (regno != FIRST_STACK_REG)
914 k = temp_stack.top - (regno - FIRST_STACK_REG);
917 temp = temp_stack.reg[k];
918 temp_stack.reg[k] = temp_stack.reg[j];
919 temp_stack.reg[j] = temp;
922 /* Place operand 2 next on the stack. */
923 regno = get_hard_regnum (&temp_stack, src2);
924 gcc_assert (regno >= 0);
925 if (regno != FIRST_STACK_REG + 1)
927 k = temp_stack.top - (regno - FIRST_STACK_REG);
928 j = temp_stack.top - 1;
930 temp = temp_stack.reg[k];
931 temp_stack.reg[k] = temp_stack.reg[j];
932 temp_stack.reg[j] = temp;
935 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
938 /* Handle a move to or from a stack register in PAT, which is in INSN.
939 REGSTACK is the current stack. Return whether a control flow insn
940 was deleted in the process. */
943 move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat)
945 rtx *psrc = get_true_reg (&SET_SRC (pat));
946 rtx *pdest = get_true_reg (&SET_DEST (pat));
949 bool control_flow_insn_deleted = false;
951 src = *psrc; dest = *pdest;
953 if (STACK_REG_P (src) && STACK_REG_P (dest))
955 /* Write from one stack reg to another. If SRC dies here, then
956 just change the register mapping and delete the insn. */
958 note = find_regno_note (insn, REG_DEAD, REGNO (src));
963 /* If this is a no-op move, there must not be a REG_DEAD note. */
964 gcc_assert (REGNO (src) != REGNO (dest));
966 for (i = regstack->top; i >= 0; i--)
967 if (regstack->reg[i] == REGNO (src))
970 /* The destination must be dead, or life analysis is borked. */
971 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
973 /* If the source is not live, this is yet another case of
974 uninitialized variables. Load up a NaN instead. */
976 return move_nan_for_stack_reg (insn, regstack, dest);
978 /* It is possible that the dest is unused after this insn.
979 If so, just pop the src. */
981 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
982 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
985 regstack->reg[i] = REGNO (dest);
986 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
987 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
990 control_flow_insn_deleted |= control_flow_insn_p (insn);
992 return control_flow_insn_deleted;
995 /* The source reg does not die. */
997 /* If this appears to be a no-op move, delete it, or else it
998 will confuse the machine description output patterns. But if
999 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1000 for REG_UNUSED will not work for deleted insns. */
1002 if (REGNO (src) == REGNO (dest))
1004 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1005 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1007 control_flow_insn_deleted |= control_flow_insn_p (insn);
1009 return control_flow_insn_deleted;
1012 /* The destination ought to be dead. */
1013 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1015 replace_reg (psrc, get_hard_regnum (regstack, src));
1017 regstack->reg[++regstack->top] = REGNO (dest);
1018 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1019 replace_reg (pdest, FIRST_STACK_REG);
1021 else if (STACK_REG_P (src))
1023 /* Save from a stack reg to MEM, or possibly integer reg. Since
1024 only top of stack may be saved, emit an exchange first if
1027 emit_swap_insn (insn, regstack, src);
1029 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1032 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1034 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1036 else if ((GET_MODE (src) == XFmode)
1037 && regstack->top < REG_STACK_SIZE - 1)
1039 /* A 387 cannot write an XFmode value to a MEM without
1040 clobbering the source reg. The output code can handle
1041 this by reading back the value from the MEM.
1042 But it is more efficient to use a temp register if one is
1043 available. Push the source value here if the register
1044 stack is not full, and then write the value to memory via
1047 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1049 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1050 emit_insn_before (push_rtx, insn);
1051 add_reg_note (insn, REG_DEAD, top_stack_reg);
1054 replace_reg (psrc, FIRST_STACK_REG);
1058 rtx pat = PATTERN (insn);
1060 gcc_assert (STACK_REG_P (dest));
1062 /* Load from MEM, or possibly integer REG or constant, into the
1063 stack regs. The actual target is always the top of the
1064 stack. The stack mapping is changed to reflect that DEST is
1065 now at top of stack. */
1067 /* The destination ought to be dead. However, there is a
1068 special case with i387 UNSPEC_TAN, where destination is live
1069 (an argument to fptan) but inherent load of 1.0 is modelled
1070 as a load from a constant. */
1071 if (GET_CODE (pat) == PARALLEL
1072 && XVECLEN (pat, 0) == 2
1073 && GET_CODE (XVECEXP (pat, 0, 1)) == SET
1074 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC
1075 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN)
1076 emit_swap_insn (insn, regstack, dest);
1078 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1080 gcc_assert (regstack->top < REG_STACK_SIZE);
1082 regstack->reg[++regstack->top] = REGNO (dest);
1083 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1084 replace_reg (pdest, FIRST_STACK_REG);
1087 return control_flow_insn_deleted;
1090 /* A helper function which replaces INSN with a pattern that loads up
1091 a NaN into DEST, then invokes move_for_stack_reg. */
1094 move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest)
1098 dest = FP_MODE_REG (REGNO (dest), SFmode);
1099 pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1100 PATTERN (insn) = pat;
1101 INSN_CODE (insn) = -1;
1103 return move_for_stack_reg (insn, regstack, pat);
1106 /* Swap the condition on a branch, if there is one. Return true if we
1107 found a condition to swap. False if the condition was not used as
1111 swap_rtx_condition_1 (rtx pat)
1116 if (COMPARISON_P (pat))
1118 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1123 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1124 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1130 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1131 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1133 else if (fmt[i] == 'e')
1134 r |= swap_rtx_condition_1 (XEXP (pat, i));
1142 swap_rtx_condition (rtx_insn *insn)
1144 rtx pat = PATTERN (insn);
1146 /* We're looking for a single set to cc0 or an HImode temporary. */
1148 if (GET_CODE (pat) == SET
1149 && REG_P (SET_DEST (pat))
1150 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1152 insn = next_flags_user (insn);
1153 if (insn == NULL_RTX)
1155 pat = PATTERN (insn);
1158 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1159 with the cc value right now. We may be able to search for one
1162 if (GET_CODE (pat) == SET
1163 && GET_CODE (SET_SRC (pat)) == UNSPEC
1164 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1166 rtx dest = SET_DEST (pat);
1168 /* Search forward looking for the first use of this value.
1169 Stop at block boundaries. */
1170 while (insn != BB_END (current_block))
1172 insn = NEXT_INSN (insn);
1173 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1179 /* We haven't found it. */
1180 if (insn == BB_END (current_block))
1183 /* So we've found the insn using this value. If it is anything
1184 other than sahf or the value does not die (meaning we'd have
1185 to search further), then we must give up. */
1186 pat = PATTERN (insn);
1187 if (GET_CODE (pat) != SET
1188 || GET_CODE (SET_SRC (pat)) != UNSPEC
1189 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1190 || ! dead_or_set_p (insn, dest))
1193 /* Now we are prepared to handle this as a normal cc0 setter. */
1194 insn = next_flags_user (insn);
1195 if (insn == NULL_RTX)
1197 pat = PATTERN (insn);
1200 if (swap_rtx_condition_1 (pat))
1203 INSN_CODE (insn) = -1;
1204 if (recog_memoized (insn) == -1)
1206 /* In case the flags don't die here, recurse to try fix
1207 following user too. */
1208 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1210 insn = next_flags_user (insn);
1211 if (!insn || !swap_rtx_condition (insn))
1216 swap_rtx_condition_1 (pat);
1224 /* Handle a comparison. Special care needs to be taken to avoid
1225 causing comparisons that a 387 cannot do correctly, such as EQ.
1227 Also, a pop insn may need to be emitted. The 387 does have an
1228 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1229 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1233 compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat_src)
1236 rtx src1_note, src2_note;
1238 src1 = get_true_reg (&XEXP (pat_src, 0));
1239 src2 = get_true_reg (&XEXP (pat_src, 1));
1241 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1242 registers that die in this insn - move those to stack top first. */
1243 if ((! STACK_REG_P (*src1)
1244 || (STACK_REG_P (*src2)
1245 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1246 && swap_rtx_condition (insn))
1249 temp = XEXP (pat_src, 0);
1250 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1251 XEXP (pat_src, 1) = temp;
1253 src1 = get_true_reg (&XEXP (pat_src, 0));
1254 src2 = get_true_reg (&XEXP (pat_src, 1));
1256 INSN_CODE (insn) = -1;
1259 /* We will fix any death note later. */
1261 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1263 if (STACK_REG_P (*src2))
1264 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1266 src2_note = NULL_RTX;
1268 emit_swap_insn (insn, regstack, *src1);
1270 replace_reg (src1, FIRST_STACK_REG);
1272 if (STACK_REG_P (*src2))
1273 replace_reg (src2, get_hard_regnum (regstack, *src2));
1277 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1278 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1281 /* If the second operand dies, handle that. But if the operands are
1282 the same stack register, don't bother, because only one death is
1283 needed, and it was just handled. */
1286 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1287 && REGNO (*src1) == REGNO (*src2)))
1289 /* As a special case, two regs may die in this insn if src2 is
1290 next to top of stack and the top of stack also dies. Since
1291 we have already popped src1, "next to top of stack" is really
1292 at top (FIRST_STACK_REG) now. */
1294 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1297 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1298 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1302 /* The 386 can only represent death of the first operand in
1303 the case handled above. In all other cases, emit a separate
1304 pop and remove the death note from here. */
1305 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1306 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1312 /* Substitute hardware stack regs in debug insn INSN, using stack
1313 layout REGSTACK. If we can't find a hardware stack reg for any of
1314 the REGs in it, reset the debug insn. */
1317 subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack)
1319 subrtx_ptr_iterator::array_type array;
1320 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST)
1324 if (STACK_REG_P (x))
1326 int hard_regno = get_hard_regnum (regstack, x);
1328 /* If we can't find an active register, reset this debug insn. */
1329 if (hard_regno == -1)
1331 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
1335 gcc_assert (hard_regno >= FIRST_STACK_REG);
1336 replace_reg (loc, hard_regno);
1337 iter.skip_subrtxes ();
1342 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1343 is the current register layout. Return whether a control flow insn
1344 was deleted in the process. */
1347 subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat)
1350 bool control_flow_insn_deleted = false;
1352 switch (GET_CODE (pat))
1355 /* Deaths in USE insns can happen in non optimizing compilation.
1356 Handle them by popping the dying register. */
1357 src = get_true_reg (&XEXP (pat, 0));
1358 if (STACK_REG_P (*src)
1359 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1361 /* USEs are ignored for liveness information so USEs of dead
1362 register might happen. */
1363 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src)))
1364 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1365 return control_flow_insn_deleted;
1367 /* Uninitialized USE might happen for functions returning uninitialized
1368 value. We will properly initialize the USE on the edge to EXIT_BLOCK,
1369 so it is safe to ignore the use here. This is consistent with behavior
1370 of dataflow analyzer that ignores USE too. (This also imply that
1371 forcibly initializing the register to NaN here would lead to ICE later,
1372 since the REG_DEAD notes are not issued.) */
1382 dest = get_true_reg (&XEXP (pat, 0));
1383 if (STACK_REG_P (*dest))
1385 note = find_reg_note (insn, REG_DEAD, *dest);
1387 if (pat != PATTERN (insn))
1389 /* The fix_truncdi_1 pattern wants to be able to
1390 allocate its own scratch register. It does this by
1391 clobbering an fp reg so that it is assured of an
1392 empty reg-stack register. If the register is live,
1393 kill it now. Remove the DEAD/UNUSED note so we
1394 don't try to kill it later too.
1396 In reality the UNUSED note can be absent in some
1397 complicated cases when the register is reused for
1398 partially set variable. */
1401 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1403 note = find_reg_note (insn, REG_UNUSED, *dest);
1405 remove_note (insn, note);
1406 replace_reg (dest, FIRST_STACK_REG + 1);
1410 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1411 indicates an uninitialized value. Because reload removed
1412 all other clobbers, this must be due to a function
1413 returning without a value. Load up a NaN. */
1418 if (COMPLEX_MODE_P (GET_MODE (t)))
1420 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1421 if (get_hard_regnum (regstack, u) == -1)
1423 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1424 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1425 control_flow_insn_deleted
1426 |= move_nan_for_stack_reg (insn2, regstack, u);
1429 if (get_hard_regnum (regstack, t) == -1)
1430 control_flow_insn_deleted
1431 |= move_nan_for_stack_reg (insn, regstack, t);
1440 rtx *src1 = (rtx *) 0, *src2;
1441 rtx src1_note, src2_note;
1444 dest = get_true_reg (&SET_DEST (pat));
1445 src = get_true_reg (&SET_SRC (pat));
1446 pat_src = SET_SRC (pat);
1448 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1449 if (STACK_REG_P (*src)
1450 || (STACK_REG_P (*dest)
1451 && (REG_P (*src) || MEM_P (*src)
1452 || CONST_DOUBLE_P (*src))))
1454 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1458 switch (GET_CODE (pat_src))
1461 compare_for_stack_reg (insn, regstack, pat_src);
1467 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1470 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1471 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1474 replace_reg (dest, FIRST_STACK_REG);
1478 /* This is a `tstM2' case. */
1479 gcc_assert (*dest == cc0_rtx);
1484 case FLOAT_TRUNCATE:
1488 /* These insns only operate on the top of the stack. DEST might
1489 be cc0_rtx if we're processing a tstM pattern. Also, it's
1490 possible that the tstM case results in a REG_DEAD note on the
1494 src1 = get_true_reg (&XEXP (pat_src, 0));
1496 emit_swap_insn (insn, regstack, *src1);
1498 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1500 if (STACK_REG_P (*dest))
1501 replace_reg (dest, FIRST_STACK_REG);
1505 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1507 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1510 replace_reg (src1, FIRST_STACK_REG);
1515 /* On i386, reversed forms of subM3 and divM3 exist for
1516 MODE_FLOAT, so the same code that works for addM3 and mulM3
1520 /* These insns can accept the top of stack as a destination
1521 from a stack reg or mem, or can use the top of stack as a
1522 source and some other stack register (possibly top of stack)
1523 as a destination. */
1525 src1 = get_true_reg (&XEXP (pat_src, 0));
1526 src2 = get_true_reg (&XEXP (pat_src, 1));
1528 /* We will fix any death note later. */
1530 if (STACK_REG_P (*src1))
1531 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1533 src1_note = NULL_RTX;
1534 if (STACK_REG_P (*src2))
1535 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1537 src2_note = NULL_RTX;
1539 /* If either operand is not a stack register, then the dest
1540 must be top of stack. */
1542 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1543 emit_swap_insn (insn, regstack, *dest);
1546 /* Both operands are REG. If neither operand is already
1547 at the top of stack, choose to make the one that is the
1548 dest the new top of stack. */
1550 int src1_hard_regnum, src2_hard_regnum;
1552 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1553 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1555 /* If the source is not live, this is yet another case of
1556 uninitialized variables. Load up a NaN instead. */
1557 if (src1_hard_regnum == -1)
1559 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1);
1560 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1561 control_flow_insn_deleted
1562 |= move_nan_for_stack_reg (insn2, regstack, *src1);
1564 if (src2_hard_regnum == -1)
1566 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2);
1567 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1568 control_flow_insn_deleted
1569 |= move_nan_for_stack_reg (insn2, regstack, *src2);
1572 if (src1_hard_regnum != FIRST_STACK_REG
1573 && src2_hard_regnum != FIRST_STACK_REG)
1574 emit_swap_insn (insn, regstack, *dest);
1577 if (STACK_REG_P (*src1))
1578 replace_reg (src1, get_hard_regnum (regstack, *src1));
1579 if (STACK_REG_P (*src2))
1580 replace_reg (src2, get_hard_regnum (regstack, *src2));
1584 rtx src1_reg = XEXP (src1_note, 0);
1586 /* If the register that dies is at the top of stack, then
1587 the destination is somewhere else - merely substitute it.
1588 But if the reg that dies is not at top of stack, then
1589 move the top of stack to the dead reg, as though we had
1590 done the insn and then a store-with-pop. */
1592 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1594 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1595 replace_reg (dest, get_hard_regnum (regstack, *dest));
1599 int regno = get_hard_regnum (regstack, src1_reg);
1601 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1602 replace_reg (dest, regno);
1604 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1605 = regstack->reg[regstack->top];
1608 CLEAR_HARD_REG_BIT (regstack->reg_set,
1609 REGNO (XEXP (src1_note, 0)));
1610 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1615 rtx src2_reg = XEXP (src2_note, 0);
1616 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1618 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1619 replace_reg (dest, get_hard_regnum (regstack, *dest));
1623 int regno = get_hard_regnum (regstack, src2_reg);
1625 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1626 replace_reg (dest, regno);
1628 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1629 = regstack->reg[regstack->top];
1632 CLEAR_HARD_REG_BIT (regstack->reg_set,
1633 REGNO (XEXP (src2_note, 0)));
1634 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1639 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1640 replace_reg (dest, get_hard_regnum (regstack, *dest));
1643 /* Keep operand 1 matching with destination. */
1644 if (COMMUTATIVE_ARITH_P (pat_src)
1645 && REG_P (*src1) && REG_P (*src2)
1646 && REGNO (*src1) != REGNO (*dest))
1648 int tmp = REGNO (*src1);
1649 replace_reg (src1, REGNO (*src2));
1650 replace_reg (src2, tmp);
1655 switch (XINT (pat_src, 1))
1660 case UNSPEC_FIST_FLOOR:
1661 case UNSPEC_FIST_CEIL:
1663 /* These insns only operate on the top of the stack. */
1665 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1666 emit_swap_insn (insn, regstack, *src1);
1668 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1670 if (STACK_REG_P (*dest))
1671 replace_reg (dest, FIRST_STACK_REG);
1675 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1677 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1680 replace_reg (src1, FIRST_STACK_REG);
1685 /* This insn only operate on the top of the stack. */
1687 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1688 emit_swap_insn (insn, regstack, *src1);
1690 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1692 replace_reg (src1, FIRST_STACK_REG);
1696 remove_regno_note (insn, REG_DEAD,
1697 REGNO (XEXP (src1_note, 0)));
1698 emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
1706 case UNSPEC_FRNDINT:
1709 case UNSPEC_FRNDINT_FLOOR:
1710 case UNSPEC_FRNDINT_CEIL:
1711 case UNSPEC_FRNDINT_TRUNC:
1712 case UNSPEC_FRNDINT_MASK_PM:
1714 /* Above insns operate on the top of the stack. */
1716 case UNSPEC_SINCOS_COS:
1717 case UNSPEC_XTRACT_FRACT:
1719 /* Above insns operate on the top two stack slots,
1720 first part of one input, double output insn. */
1722 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1724 emit_swap_insn (insn, regstack, *src1);
1726 /* Input should never die, it is replaced with output. */
1727 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1728 gcc_assert (!src1_note);
1730 if (STACK_REG_P (*dest))
1731 replace_reg (dest, FIRST_STACK_REG);
1733 replace_reg (src1, FIRST_STACK_REG);
1736 case UNSPEC_SINCOS_SIN:
1737 case UNSPEC_XTRACT_EXP:
1739 /* These insns operate on the top two stack slots,
1740 second part of one input, double output insn. */
1747 /* For UNSPEC_TAN, regstack->top is already increased
1748 by inherent load of constant 1.0. */
1750 /* Output value is generated in the second stack slot.
1751 Move current value from second slot to the top. */
1752 regstack->reg[regstack->top]
1753 = regstack->reg[regstack->top - 1];
1755 gcc_assert (STACK_REG_P (*dest));
1757 regstack->reg[regstack->top - 1] = REGNO (*dest);
1758 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1759 replace_reg (dest, FIRST_STACK_REG + 1);
1761 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1763 replace_reg (src1, FIRST_STACK_REG);
1768 case UNSPEC_FYL2XP1:
1769 /* These insns operate on the top two stack slots. */
1771 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1772 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1774 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1775 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1777 swap_to_top (insn, regstack, *src1, *src2);
1779 replace_reg (src1, FIRST_STACK_REG);
1780 replace_reg (src2, FIRST_STACK_REG + 1);
1783 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1785 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1787 /* Pop both input operands from the stack. */
1788 CLEAR_HARD_REG_BIT (regstack->reg_set,
1789 regstack->reg[regstack->top]);
1790 CLEAR_HARD_REG_BIT (regstack->reg_set,
1791 regstack->reg[regstack->top - 1]);
1794 /* Push the result back onto the stack. */
1795 regstack->reg[++regstack->top] = REGNO (*dest);
1796 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1797 replace_reg (dest, FIRST_STACK_REG);
1800 case UNSPEC_FSCALE_FRACT:
1801 case UNSPEC_FPREM_F:
1802 case UNSPEC_FPREM1_F:
1803 /* These insns operate on the top two stack slots,
1804 first part of double input, double output insn. */
1806 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1807 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1809 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1810 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1812 /* Inputs should never die, they are
1813 replaced with outputs. */
1814 gcc_assert (!src1_note);
1815 gcc_assert (!src2_note);
1817 swap_to_top (insn, regstack, *src1, *src2);
1819 /* Push the result back onto stack. Empty stack slot
1820 will be filled in second part of insn. */
1821 if (STACK_REG_P (*dest))
1823 regstack->reg[regstack->top] = REGNO (*dest);
1824 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1825 replace_reg (dest, FIRST_STACK_REG);
1828 replace_reg (src1, FIRST_STACK_REG);
1829 replace_reg (src2, FIRST_STACK_REG + 1);
1832 case UNSPEC_FSCALE_EXP:
1833 case UNSPEC_FPREM_U:
1834 case UNSPEC_FPREM1_U:
1835 /* These insns operate on the top two stack slots,
1836 second part of double input, double output insn. */
1838 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1839 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1841 /* Push the result back onto stack. Fill empty slot from
1842 first part of insn and fix top of stack pointer. */
1843 if (STACK_REG_P (*dest))
1845 regstack->reg[regstack->top - 1] = REGNO (*dest);
1846 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1847 replace_reg (dest, FIRST_STACK_REG + 1);
1850 replace_reg (src1, FIRST_STACK_REG);
1851 replace_reg (src2, FIRST_STACK_REG + 1);
1854 case UNSPEC_C2_FLAG:
1855 /* This insn operates on the top two stack slots,
1856 third part of C2 setting double input insn. */
1858 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1859 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1861 replace_reg (src1, FIRST_STACK_REG);
1862 replace_reg (src2, FIRST_STACK_REG + 1);
1866 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1867 The combination matches the PPRO fcomi instruction. */
1869 pat_src = XVECEXP (pat_src, 0, 0);
1870 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1871 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1875 /* Combined fcomp+fnstsw generated for doing well with
1876 CSE. When optimizing this would have been broken
1879 pat_src = XVECEXP (pat_src, 0, 0);
1880 gcc_assert (GET_CODE (pat_src) == COMPARE);
1882 compare_for_stack_reg (insn, regstack, pat_src);
1891 /* This insn requires the top of stack to be the destination. */
1893 src1 = get_true_reg (&XEXP (pat_src, 1));
1894 src2 = get_true_reg (&XEXP (pat_src, 2));
1896 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1897 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1899 /* If the comparison operator is an FP comparison operator,
1900 it is handled correctly by compare_for_stack_reg () who
1901 will move the destination to the top of stack. But if the
1902 comparison operator is not an FP comparison operator, we
1903 have to handle it here. */
1904 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1905 && REGNO (*dest) != regstack->reg[regstack->top])
1907 /* In case one of operands is the top of stack and the operands
1908 dies, it is safe to make it the destination operand by
1909 reversing the direction of cmove and avoid fxch. */
1910 if ((REGNO (*src1) == regstack->reg[regstack->top]
1912 || (REGNO (*src2) == regstack->reg[regstack->top]
1915 int idx1 = (get_hard_regnum (regstack, *src1)
1917 int idx2 = (get_hard_regnum (regstack, *src2)
1920 /* Make reg-stack believe that the operands are already
1921 swapped on the stack */
1922 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1923 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1925 /* Reverse condition to compensate the operand swap.
1926 i386 do have comparison always reversible. */
1927 PUT_CODE (XEXP (pat_src, 0),
1928 reversed_comparison_code (XEXP (pat_src, 0), insn));
1931 emit_swap_insn (insn, regstack, *dest);
1939 src_note[1] = src1_note;
1940 src_note[2] = src2_note;
1942 if (STACK_REG_P (*src1))
1943 replace_reg (src1, get_hard_regnum (regstack, *src1));
1944 if (STACK_REG_P (*src2))
1945 replace_reg (src2, get_hard_regnum (regstack, *src2));
1947 for (i = 1; i <= 2; i++)
1950 int regno = REGNO (XEXP (src_note[i], 0));
1952 /* If the register that dies is not at the top of
1953 stack, then move the top of stack to the dead reg.
1954 Top of stack should never die, as it is the
1956 gcc_assert (regno != regstack->reg[regstack->top]);
1957 remove_regno_note (insn, REG_DEAD, regno);
1958 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1963 /* Make dest the top of stack. Add dest to regstack if
1965 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1966 regstack->reg[++regstack->top] = REGNO (*dest);
1967 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1968 replace_reg (dest, FIRST_STACK_REG);
1981 return control_flow_insn_deleted;
1984 /* Substitute hard regnums for any stack regs in INSN, which has
1985 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1986 before the insn, and is updated with changes made here.
1988 There are several requirements and assumptions about the use of
1989 stack-like regs in asm statements. These rules are enforced by
1990 record_asm_stack_regs; see comments there for details. Any
1991 asm_operands left in the RTL at this point may be assume to meet the
1992 requirements, since record_asm_stack_regs removes any problem asm. */
1995 subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack)
1997 rtx body = PATTERN (insn);
1999 rtx *note_reg; /* Array of note contents */
2000 rtx **note_loc; /* Address of REG field of each note */
2001 enum reg_note *note_kind; /* The type of each note */
2003 rtx *clobber_reg = 0;
2004 rtx **clobber_loc = 0;
2006 struct stack_def temp_stack;
2011 int n_inputs, n_outputs;
2013 if (! check_asm_stack_operands (insn))
2016 /* Find out what the constraints required. If no constraint
2017 alternative matches, that is a compiler bug: we should have caught
2018 such an insn in check_asm_stack_operands. */
2019 extract_insn (insn);
2020 constrain_operands (1);
2022 preprocess_constraints (insn);
2023 const operand_alternative *op_alt = which_op_alt ();
2025 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
2027 /* Strip SUBREGs here to make the following code simpler. */
2028 for (i = 0; i < recog_data.n_operands; i++)
2029 if (GET_CODE (recog_data.operand[i]) == SUBREG
2030 && REG_P (SUBREG_REG (recog_data.operand[i])))
2032 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2033 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2036 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2038 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2041 note_reg = XALLOCAVEC (rtx, i);
2042 note_loc = XALLOCAVEC (rtx *, i);
2043 note_kind = XALLOCAVEC (enum reg_note, i);
2046 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2048 if (GET_CODE (note) != EXPR_LIST)
2050 rtx reg = XEXP (note, 0);
2051 rtx *loc = & XEXP (note, 0);
2053 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2055 loc = & SUBREG_REG (reg);
2056 reg = SUBREG_REG (reg);
2059 if (STACK_REG_P (reg)
2060 && (REG_NOTE_KIND (note) == REG_DEAD
2061 || REG_NOTE_KIND (note) == REG_UNUSED))
2063 note_reg[n_notes] = reg;
2064 note_loc[n_notes] = loc;
2065 note_kind[n_notes] = REG_NOTE_KIND (note);
2070 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2074 if (GET_CODE (body) == PARALLEL)
2076 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
2077 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0));
2079 for (i = 0; i < XVECLEN (body, 0); i++)
2080 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2082 rtx clobber = XVECEXP (body, 0, i);
2083 rtx reg = XEXP (clobber, 0);
2084 rtx *loc = & XEXP (clobber, 0);
2086 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2088 loc = & SUBREG_REG (reg);
2089 reg = SUBREG_REG (reg);
2092 if (STACK_REG_P (reg))
2094 clobber_reg[n_clobbers] = reg;
2095 clobber_loc[n_clobbers] = loc;
2101 temp_stack = *regstack;
2103 /* Put the input regs into the desired place in TEMP_STACK. */
2105 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2106 if (STACK_REG_P (recog_data.operand[i])
2107 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS)
2108 && op_alt[i].cl != FLOAT_REGS)
2110 /* If an operand needs to be in a particular reg in
2111 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2112 these constraints are for single register classes, and
2113 reload guaranteed that operand[i] is already in that class,
2114 we can just use REGNO (recog_data.operand[i]) to know which
2115 actual reg this operand needs to be in. */
2117 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2119 gcc_assert (regno >= 0);
2121 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2123 /* recog_data.operand[i] is not in the right place. Find
2124 it and swap it with whatever is already in I's place.
2125 K is where recog_data.operand[i] is now. J is where it
2129 k = temp_stack.top - (regno - FIRST_STACK_REG);
2131 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2133 temp = temp_stack.reg[k];
2134 temp_stack.reg[k] = temp_stack.reg[j];
2135 temp_stack.reg[j] = temp;
2139 /* Emit insns before INSN to make sure the reg-stack is in the right
2142 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2144 /* Make the needed input register substitutions. Do death notes and
2145 clobbers too, because these are for inputs, not outputs. */
2147 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2148 if (STACK_REG_P (recog_data.operand[i]))
2150 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2152 gcc_assert (regnum >= 0);
2154 replace_reg (recog_data.operand_loc[i], regnum);
2157 for (i = 0; i < n_notes; i++)
2158 if (note_kind[i] == REG_DEAD)
2160 int regnum = get_hard_regnum (regstack, note_reg[i]);
2162 gcc_assert (regnum >= 0);
2164 replace_reg (note_loc[i], regnum);
2167 for (i = 0; i < n_clobbers; i++)
2169 /* It's OK for a CLOBBER to reference a reg that is not live.
2170 Don't try to replace it in that case. */
2171 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2175 /* Sigh - clobbers always have QImode. But replace_reg knows
2176 that these regs can't be MODE_INT and will assert. Just put
2177 the right reg there without calling replace_reg. */
2179 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2183 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2185 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2186 if (STACK_REG_P (recog_data.operand[i]))
2188 /* An input reg is implicitly popped if it is tied to an
2189 output, or if there is a CLOBBER for it. */
2192 for (j = 0; j < n_clobbers; j++)
2193 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2196 if (j < n_clobbers || op_alt[i].matches >= 0)
2198 /* recog_data.operand[i] might not be at the top of stack.
2199 But that's OK, because all we need to do is pop the
2200 right number of regs off of the top of the reg-stack.
2201 record_asm_stack_regs guaranteed that all implicitly
2202 popped regs were grouped at the top of the reg-stack. */
2204 CLEAR_HARD_REG_BIT (regstack->reg_set,
2205 regstack->reg[regstack->top]);
2210 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2211 Note that there isn't any need to substitute register numbers.
2212 ??? Explain why this is true. */
2214 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2216 /* See if there is an output for this hard reg. */
2219 for (j = 0; j < n_outputs; j++)
2220 if (STACK_REG_P (recog_data.operand[j])
2221 && REGNO (recog_data.operand[j]) == (unsigned) i)
2223 regstack->reg[++regstack->top] = i;
2224 SET_HARD_REG_BIT (regstack->reg_set, i);
2229 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2230 input that the asm didn't implicitly pop. If the asm didn't
2231 implicitly pop an input reg, that reg will still be live.
2233 Note that we can't use find_regno_note here: the register numbers
2234 in the death notes have already been substituted. */
2236 for (i = 0; i < n_outputs; i++)
2237 if (STACK_REG_P (recog_data.operand[i]))
2241 for (j = 0; j < n_notes; j++)
2242 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2243 && note_kind[j] == REG_UNUSED)
2245 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2251 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2252 if (STACK_REG_P (recog_data.operand[i]))
2256 for (j = 0; j < n_notes; j++)
2257 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2258 && note_kind[j] == REG_DEAD
2259 && TEST_HARD_REG_BIT (regstack->reg_set,
2260 REGNO (recog_data.operand[i])))
2262 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2269 /* Substitute stack hard reg numbers for stack virtual registers in
2270 INSN. Non-stack register numbers are not changed. REGSTACK is the
2271 current stack content. Insns may be emitted as needed to arrange the
2272 stack for the 387 based on the contents of the insn. Return whether
2273 a control flow insn was deleted in the process. */
2276 subst_stack_regs (rtx_insn *insn, stack_ptr regstack)
2278 rtx *note_link, note;
2279 bool control_flow_insn_deleted = false;
2284 int top = regstack->top;
2286 /* If there are any floating point parameters to be passed in
2287 registers for this call, make sure they are in the right
2292 straighten_stack (insn, regstack);
2294 /* Now mark the arguments as dead after the call. */
2296 while (regstack->top >= 0)
2298 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2304 /* Do the actual substitution if any stack regs are mentioned.
2305 Since we only record whether entire insn mentions stack regs, and
2306 subst_stack_regs_pat only works for patterns that contain stack regs,
2307 we must check each pattern in a parallel here. A call_value_pop could
2310 if (stack_regs_mentioned (insn))
2312 int n_operands = asm_noperands (PATTERN (insn));
2313 if (n_operands >= 0)
2315 /* This insn is an `asm' with operands. Decode the operands,
2316 decide how many are inputs, and do register substitution.
2317 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2319 subst_asm_stack_regs (insn, regstack);
2320 return control_flow_insn_deleted;
2323 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2324 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2326 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2328 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2329 XVECEXP (PATTERN (insn), 0, i)
2330 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2331 control_flow_insn_deleted
2332 |= subst_stack_regs_pat (insn, regstack,
2333 XVECEXP (PATTERN (insn), 0, i));
2337 control_flow_insn_deleted
2338 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2341 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2342 REG_UNUSED will already have been dealt with, so just return. */
2344 if (NOTE_P (insn) || insn->deleted ())
2345 return control_flow_insn_deleted;
2347 /* If this a noreturn call, we can't insert pop insns after it.
2348 Instead, reset the stack state to empty. */
2350 && find_reg_note (insn, REG_NORETURN, NULL))
2353 CLEAR_HARD_REG_SET (regstack->reg_set);
2354 return control_flow_insn_deleted;
2357 /* If there is a REG_UNUSED note on a stack register on this insn,
2358 the indicated reg must be popped. The REG_UNUSED note is removed,
2359 since the form of the newly emitted pop insn references the reg,
2360 making it no longer `unset'. */
2362 note_link = ®_NOTES (insn);
2363 for (note = *note_link; note; note = XEXP (note, 1))
2364 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2366 *note_link = XEXP (note, 1);
2367 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2370 note_link = &XEXP (note, 1);
2372 return control_flow_insn_deleted;
2375 /* Change the organization of the stack so that it fits a new basic
2376 block. Some registers might have to be popped, but there can never be
2377 a register live in the new block that is not now live.
2379 Insert any needed insns before or after INSN, as indicated by
2380 WHERE. OLD is the original stack layout, and NEW is the desired
2381 form. OLD is updated to reflect the code emitted, i.e., it will be
2382 the same as NEW upon return.
2384 This function will not preserve block_end[]. But that information
2385 is no longer needed once this has executed. */
2388 change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack,
2389 enum emit_where where)
2395 /* Stack adjustments for the first insn in a block update the
2396 current_block's stack_in instead of inserting insns directly.
2397 compensate_edges will add the necessary code later. */
2400 && where == EMIT_BEFORE)
2402 BLOCK_INFO (current_block)->stack_in = *new_stack;
2403 starting_stack_p = false;
2408 /* We will be inserting new insns "backwards". If we are to insert
2409 after INSN, find the next insn, and insert before it. */
2411 if (where == EMIT_AFTER)
2413 if (current_block && BB_END (current_block) == insn)
2415 insn = NEXT_INSN (insn);
2418 /* Initialize partially dead variables. */
2419 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
2420 if (TEST_HARD_REG_BIT (new_stack->reg_set, i)
2421 && !TEST_HARD_REG_BIT (old->reg_set, i))
2423 old->reg[++old->top] = i;
2424 SET_HARD_REG_BIT (old->reg_set, i);
2425 emit_insn_before (gen_rtx_SET (VOIDmode,
2426 FP_MODE_REG (i, SFmode), not_a_num), insn);
2429 /* Pop any registers that are not needed in the new block. */
2431 /* If the destination block's stack already has a specified layout
2432 and contains two or more registers, use a more intelligent algorithm
2433 to pop registers that minimizes the number number of fxchs below. */
2434 if (new_stack->top > 0)
2436 bool slots[REG_STACK_SIZE];
2437 int pops[REG_STACK_SIZE];
2438 int next, dest, topsrc;
2440 /* First pass to determine the free slots. */
2441 for (reg = 0; reg <= new_stack->top; reg++)
2442 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]);
2444 /* Second pass to allocate preferred slots. */
2446 for (reg = old->top; reg > new_stack->top; reg--)
2447 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2450 for (next = 0; next <= new_stack->top; next++)
2451 if (!slots[next] && new_stack->reg[next] == old->reg[reg])
2453 /* If this is a preference for the new top of stack, record
2454 the fact by remembering it's old->reg in topsrc. */
2455 if (next == new_stack->top)
2466 /* Intentionally, avoid placing the top of stack in it's correct
2467 location, if we still need to permute the stack below and we
2468 can usefully place it somewhere else. This is the case if any
2469 slot is still unallocated, in which case we should place the
2470 top of stack there. */
2472 for (reg = 0; reg < new_stack->top; reg++)
2476 slots[new_stack->top] = false;
2481 /* Third pass allocates remaining slots and emits pop insns. */
2482 next = new_stack->top;
2483 for (reg = old->top; reg > new_stack->top; reg--)
2488 /* Find next free slot. */
2493 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2499 /* The following loop attempts to maximize the number of times we
2500 pop the top of the stack, as this permits the use of the faster
2501 ffreep instruction on platforms that support it. */
2505 for (reg = 0; reg <= old->top; reg++)
2506 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2510 while (old->top >= live)
2511 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top]))
2513 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next]))
2515 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2519 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2523 if (new_stack->top == -2)
2525 /* If the new block has never been processed, then it can inherit
2526 the old stack order. */
2528 new_stack->top = old->top;
2529 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg));
2533 /* This block has been entered before, and we must match the
2534 previously selected stack order. */
2536 /* By now, the only difference should be the order of the stack,
2537 not their depth or liveliness. */
2539 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set));
2540 gcc_assert (old->top == new_stack->top);
2542 /* If the stack is not empty (new_stack->top != -1), loop here emitting
2543 swaps until the stack is correct.
2545 The worst case number of swaps emitted is N + 2, where N is the
2546 depth of the stack. In some cases, the reg at the top of
2547 stack may be correct, but swapped anyway in order to fix
2548 other regs. But since we never swap any other reg away from
2549 its correct slot, this algorithm will converge. */
2551 if (new_stack->top != -1)
2554 /* Swap the reg at top of stack into the position it is
2555 supposed to be in, until the correct top of stack appears. */
2557 while (old->reg[old->top] != new_stack->reg[new_stack->top])
2559 for (reg = new_stack->top; reg >= 0; reg--)
2560 if (new_stack->reg[reg] == old->reg[old->top])
2563 gcc_assert (reg != -1);
2565 emit_swap_insn (insn, old,
2566 FP_MODE_REG (old->reg[reg], DFmode));
2569 /* See if any regs remain incorrect. If so, bring an
2570 incorrect reg to the top of stack, and let the while loop
2573 for (reg = new_stack->top; reg >= 0; reg--)
2574 if (new_stack->reg[reg] != old->reg[reg])
2576 emit_swap_insn (insn, old,
2577 FP_MODE_REG (old->reg[reg], DFmode));
2582 /* At this point there must be no differences. */
2584 for (reg = old->top; reg >= 0; reg--)
2585 gcc_assert (old->reg[reg] == new_stack->reg[reg]);
2589 BB_END (current_block) = PREV_INSN (insn);
2592 /* Print stack configuration. */
2595 print_stack (FILE *file, stack_ptr s)
2601 fprintf (file, "uninitialized\n");
2602 else if (s->top == -1)
2603 fprintf (file, "empty\n");
2608 for (i = 0; i <= s->top; ++i)
2609 fprintf (file, "%d ", s->reg[i]);
2610 fputs ("]\n", file);
2614 /* This function was doing life analysis. We now let the regular live
2615 code do it's job, so we only need to check some extra invariants
2616 that reg-stack expects. Primary among these being that all registers
2617 are initialized before use.
2619 The function returns true when code was emitted to CFG edges and
2620 commit_edge_insertions needs to be called. */
2623 convert_regs_entry (void)
2629 /* Load something into each stack register live at function entry.
2630 Such live registers can be caused by uninitialized variables or
2631 functions not returning values on all paths. In order to keep
2632 the push/pop code happy, and to not scrog the register stack, we
2633 must put something in these registers. Use a QNaN.
2635 Note that we are inserting converted code here. This code is
2636 never seen by the convert_regs pass. */
2638 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
2640 basic_block block = e->dest;
2641 block_info bi = BLOCK_INFO (block);
2644 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2645 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2649 bi->stack_in.reg[++top] = reg;
2651 init = gen_rtx_SET (VOIDmode,
2652 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2654 insert_insn_on_edge (init, e);
2658 bi->stack_in.top = top;
2664 /* Construct the desired stack for function exit. This will either
2665 be `empty', or the function return value at top-of-stack. */
2668 convert_regs_exit (void)
2670 int value_reg_low, value_reg_high;
2671 stack_ptr output_stack;
2674 retvalue = stack_result (current_function_decl);
2675 value_reg_low = value_reg_high = -1;
2678 value_reg_low = REGNO (retvalue);
2679 value_reg_high = END_HARD_REGNO (retvalue) - 1;
2682 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in;
2683 if (value_reg_low == -1)
2684 output_stack->top = -1;
2689 output_stack->top = value_reg_high - value_reg_low;
2690 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2692 output_stack->reg[value_reg_high - reg] = reg;
2693 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2698 /* Copy the stack info from the end of edge E's source block to the
2699 start of E's destination block. */
2702 propagate_stack (edge e)
2704 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out;
2705 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2708 /* Preserve the order of the original stack, but check whether
2709 any pops are needed. */
2710 dest_stack->top = -1;
2711 for (reg = 0; reg <= src_stack->top; ++reg)
2712 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2713 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2715 /* Push in any partially dead values. */
2716 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++)
2717 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg)
2718 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg))
2719 dest_stack->reg[++dest_stack->top] = reg;
2723 /* Adjust the stack of edge E's source block on exit to match the stack
2724 of it's target block upon input. The stack layouts of both blocks
2725 should have been defined by now. */
2728 compensate_edge (edge e)
2730 basic_block source = e->src, target = e->dest;
2731 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in;
2732 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out;
2733 struct stack_def regstack;
2737 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2739 gcc_assert (target_stack->top != -2);
2741 /* Check whether stacks are identical. */
2742 if (target_stack->top == source_stack->top)
2744 for (reg = target_stack->top; reg >= 0; --reg)
2745 if (target_stack->reg[reg] != source_stack->reg[reg])
2751 fprintf (dump_file, "no changes needed\n");
2758 fprintf (dump_file, "correcting stack to ");
2759 print_stack (dump_file, target_stack);
2762 /* Abnormal calls may appear to have values live in st(0), but the
2763 abnormal return path will not have actually loaded the values. */
2764 if (e->flags & EDGE_ABNORMAL_CALL)
2766 /* Assert that the lifetimes are as we expect -- one value
2767 live at st(0) on the end of the source block, and no
2768 values live at the beginning of the destination block.
2769 For complex return values, we may have st(1) live as well. */
2770 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2771 gcc_assert (target_stack->top == -1);
2775 /* Handle non-call EH edges specially. The normal return path have
2776 values in registers. These will be popped en masse by the unwind
2778 if (e->flags & EDGE_EH)
2780 gcc_assert (target_stack->top == -1);
2784 /* We don't support abnormal edges. Global takes care to
2785 avoid any live register across them, so we should never
2786 have to insert instructions on such edges. */
2787 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2789 /* Make a copy of source_stack as change_stack is destructive. */
2790 regstack = *source_stack;
2792 /* It is better to output directly to the end of the block
2793 instead of to the edge, because emit_swap can do minimal
2794 insn scheduling. We can do this when there is only one
2795 edge out, and it is not abnormal. */
2796 if (EDGE_COUNT (source->succs) == 1)
2798 current_block = source;
2799 change_stack (BB_END (source), ®stack, target_stack,
2800 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2807 current_block = NULL;
2810 /* ??? change_stack needs some point to emit insns after. */
2811 after = emit_note (NOTE_INSN_DELETED);
2813 change_stack (after, ®stack, target_stack, EMIT_BEFORE);
2818 insert_insn_on_edge (seq, e);
2824 /* Traverse all non-entry edges in the CFG, and emit the necessary
2825 edge compensation code to change the stack from stack_out of the
2826 source block to the stack_in of the destination block. */
2829 compensate_edges (void)
2831 bool inserted = false;
2834 starting_stack_p = false;
2836 FOR_EACH_BB_FN (bb, cfun)
2837 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun))
2842 FOR_EACH_EDGE (e, ei, bb->succs)
2843 inserted |= compensate_edge (e);
2848 /* Select the better of two edges E1 and E2 to use to determine the
2849 stack layout for their shared destination basic block. This is
2850 typically the more frequently executed. The edge E1 may be NULL
2851 (in which case E2 is returned), but E2 is always non-NULL. */
2854 better_edge (edge e1, edge e2)
2859 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2861 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2864 if (e1->count > e2->count)
2866 if (e1->count < e2->count)
2869 /* Prefer critical edges to minimize inserting compensation code on
2872 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2873 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2875 /* Avoid non-deterministic behavior. */
2876 return (e1->src->index < e2->src->index) ? e1 : e2;
2879 /* Convert stack register references in one block. Return true if the CFG
2880 has been modified in the process. */
2883 convert_regs_1 (basic_block block)
2885 struct stack_def regstack;
2886 block_info bi = BLOCK_INFO (block);
2888 rtx_insn *insn, *next;
2889 bool control_flow_insn_deleted = false;
2890 bool cfg_altered = false;
2891 int debug_insns_with_starting_stack = 0;
2893 any_malformed_asm = false;
2895 /* Choose an initial stack layout, if one hasn't already been chosen. */
2896 if (bi->stack_in.top == -2)
2898 edge e, beste = NULL;
2901 /* Select the best incoming edge (typically the most frequent) to
2902 use as a template for this basic block. */
2903 FOR_EACH_EDGE (e, ei, block->preds)
2904 if (BLOCK_INFO (e->src)->done)
2905 beste = better_edge (beste, e);
2908 propagate_stack (beste);
2911 /* No predecessors. Create an arbitrary input stack. */
2912 bi->stack_in.top = -1;
2913 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2914 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2915 bi->stack_in.reg[++bi->stack_in.top] = reg;
2921 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2922 print_stack (dump_file, &bi->stack_in);
2925 /* Process all insns in this block. Keep track of NEXT so that we
2926 don't process insns emitted while substituting in INSN. */
2927 current_block = block;
2928 next = BB_HEAD (block);
2929 regstack = bi->stack_in;
2930 starting_stack_p = true;
2935 next = NEXT_INSN (insn);
2937 /* Ensure we have not missed a block boundary. */
2939 if (insn == BB_END (block))
2942 /* Don't bother processing unless there is a stack reg
2943 mentioned or if it's a CALL_INSN. */
2944 if (DEBUG_INSN_P (insn))
2946 if (starting_stack_p)
2947 debug_insns_with_starting_stack++;
2950 subst_all_stack_regs_in_debug_insn (insn, ®stack);
2952 /* Nothing must ever die at a debug insn. If something
2953 is referenced in it that becomes dead, it should have
2954 died before and the reference in the debug insn
2955 should have been removed so as to avoid changing code
2957 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL));
2960 else if (stack_regs_mentioned (insn)
2965 fprintf (dump_file, " insn %d input stack: ",
2967 print_stack (dump_file, ®stack);
2969 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
2970 starting_stack_p = false;
2975 if (debug_insns_with_starting_stack)
2977 /* Since it's the first non-debug instruction that determines
2978 the stack requirements of the current basic block, we refrain
2979 from updating debug insns before it in the loop above, and
2980 fix them up here. */
2981 for (insn = BB_HEAD (block); debug_insns_with_starting_stack;
2982 insn = NEXT_INSN (insn))
2984 if (!DEBUG_INSN_P (insn))
2987 debug_insns_with_starting_stack--;
2988 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in);
2994 fprintf (dump_file, "Expected live registers [");
2995 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2996 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2997 fprintf (dump_file, " %d", reg);
2998 fprintf (dump_file, " ]\nOutput stack: ");
2999 print_stack (dump_file, ®stack);
3002 insn = BB_END (block);
3004 insn = PREV_INSN (insn);
3006 /* If the function is declared to return a value, but it returns one
3007 in only some cases, some registers might come live here. Emit
3008 necessary moves for them. */
3010 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3012 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
3013 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
3018 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
3020 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
3021 insn = emit_insn_after (set, insn);
3022 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
3026 /* Amongst the insns possibly deleted during the substitution process above,
3027 might have been the only trapping insn in the block. We purge the now
3028 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
3029 called at the end of convert_regs. The order in which we process the
3030 blocks ensures that we never delete an already processed edge.
3032 Note that, at this point, the CFG may have been damaged by the emission
3033 of instructions after an abnormal call, which moves the basic block end
3034 (and is the reason why we call fixup_abnormal_edges later). So we must
3035 be sure that the trapping insn has been deleted before trying to purge
3036 dead edges, otherwise we risk purging valid edges.
3038 ??? We are normally supposed not to delete trapping insns, so we pretend
3039 that the insns deleted above don't actually trap. It would have been
3040 better to detect this earlier and avoid creating the EH edge in the first
3041 place, still, but we don't have enough information at that time. */
3043 if (control_flow_insn_deleted)
3044 cfg_altered |= purge_dead_edges (block);
3046 /* Something failed if the stack lives don't match. If we had malformed
3047 asms, we zapped the instruction itself, but that didn't produce the
3048 same pattern of register kills as before. */
3050 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set)
3051 || any_malformed_asm);
3052 bi->stack_out = regstack;
3058 /* Convert registers in all blocks reachable from BLOCK. Return true if the
3059 CFG has been modified in the process. */
3062 convert_regs_2 (basic_block block)
3064 basic_block *stack, *sp;
3065 bool cfg_altered = false;
3067 /* We process the blocks in a top-down manner, in a way such that one block
3068 is only processed after all its predecessors. The number of predecessors
3069 of every block has already been computed. */
3071 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun));
3083 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3084 some dead EH outgoing edge after the deletion of the trapping
3085 insn inside the block. Since the number of predecessors of
3086 BLOCK's successors was computed based on the initial edge set,
3087 we check the necessity to process some of these successors
3088 before such an edge deletion may happen. However, there is
3089 a pitfall: if BLOCK is the only predecessor of a successor and
3090 the edge between them happens to be deleted, the successor
3091 becomes unreachable and should not be processed. The problem
3092 is that there is no way to preventively detect this case so we
3093 stack the successor in all cases and hand over the task of
3094 fixing up the discrepancy to convert_regs_1. */
3096 FOR_EACH_EDGE (e, ei, block->succs)
3097 if (! (e->flags & EDGE_DFS_BACK))
3099 BLOCK_INFO (e->dest)->predecessors--;
3100 if (!BLOCK_INFO (e->dest)->predecessors)
3104 cfg_altered |= convert_regs_1 (block);
3106 while (sp != stack);
3113 /* Traverse all basic blocks in a function, converting the register
3114 references in each insn from the "flat" register file that gcc uses,
3115 to the stack-like registers the 387 uses. */
3120 bool cfg_altered = false;
3126 /* Initialize uninitialized registers on function entry. */
3127 inserted = convert_regs_entry ();
3129 /* Construct the desired stack for function exit. */
3130 convert_regs_exit ();
3131 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1;
3133 /* ??? Future: process inner loops first, and give them arbitrary
3134 initial stacks which emit_swap_insn can modify. This ought to
3135 prevent double fxch that often appears at the head of a loop. */
3137 /* Process all blocks reachable from all entry points. */
3138 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
3139 cfg_altered |= convert_regs_2 (e->dest);
3141 /* ??? Process all unreachable blocks. Though there's no excuse
3142 for keeping these even when not optimizing. */
3143 FOR_EACH_BB_FN (b, cfun)
3145 block_info bi = BLOCK_INFO (b);
3148 cfg_altered |= convert_regs_2 (b);
3151 /* We must fix up abnormal edges before inserting compensation code
3152 because both mechanisms insert insns on edges. */
3153 inserted |= fixup_abnormal_edges ();
3155 inserted |= compensate_edges ();
3157 clear_aux_for_blocks ();
3160 commit_edge_insertions ();
3166 fputc ('\n', dump_file);
3169 /* Convert register usage from "flat" register file usage to a "stack
3170 register file. FILE is the dump file, if used.
3172 Construct a CFG and run life analysis. Then convert each insn one
3173 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3174 code duplication created when the converter inserts pop insns on
3184 /* Clean up previous run. */
3185 stack_regs_mentioned_data.release ();
3187 /* See if there is something to do. Flow analysis is quite
3188 expensive so we might save some compilation time. */
3189 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3190 if (df_regs_ever_live_p (i))
3192 if (i > LAST_STACK_REG)
3195 df_note_add_problem ();
3198 mark_dfs_back_edges ();
3200 /* Set up block info for each basic block. */
3201 alloc_aux_for_blocks (sizeof (struct block_info_def));
3202 FOR_EACH_BB_FN (bb, cfun)
3204 block_info bi = BLOCK_INFO (bb);
3209 FOR_EACH_EDGE (e, ei, bb->preds)
3210 if (!(e->flags & EDGE_DFS_BACK)
3211 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun))
3214 /* Set current register status at last instruction `uninitialized'. */
3215 bi->stack_in.top = -2;
3217 /* Copy live_at_end and live_at_start into temporaries. */
3218 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3220 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg))
3221 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3222 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg))
3223 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3227 /* Create the replacement registers up front. */
3228 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3230 enum machine_mode mode;
3231 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3233 mode = GET_MODE_WIDER_MODE (mode))
3234 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3235 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3237 mode = GET_MODE_WIDER_MODE (mode))
3238 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3241 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3243 /* A QNaN for initializing uninitialized variables.
3245 ??? We can't load from constant memory in PIC mode, because
3246 we're inserting these instructions before the prologue and
3247 the PIC register hasn't been set up. In that case, fall back
3248 on zero, which we can get from `fldz'. */
3250 if ((flag_pic && !TARGET_64BIT)
3251 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3252 not_a_num = CONST0_RTX (SFmode);
3257 real_nan (&r, "", 1, SFmode);
3258 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode);
3259 not_a_num = force_const_mem (SFmode, not_a_num);
3262 /* Allocate a cache for stack_regs_mentioned. */
3263 max_uid = get_max_uid ();
3264 stack_regs_mentioned_data.create (max_uid + 1);
3265 memset (stack_regs_mentioned_data.address (),
3266 0, sizeof (char) * (max_uid + 1));
3270 free_aux_for_blocks ();
3273 #endif /* STACK_REGS */
3277 const pass_data pass_data_stack_regs =
3279 RTL_PASS, /* type */
3280 "*stack_regs", /* name */
3281 OPTGROUP_NONE, /* optinfo_flags */
3282 TV_REG_STACK, /* tv_id */
3283 0, /* properties_required */
3284 0, /* properties_provided */
3285 0, /* properties_destroyed */
3286 0, /* todo_flags_start */
3287 0, /* todo_flags_finish */
3290 class pass_stack_regs : public rtl_opt_pass
3293 pass_stack_regs (gcc::context *ctxt)
3294 : rtl_opt_pass (pass_data_stack_regs, ctxt)
3297 /* opt_pass methods: */
3298 virtual bool gate (function *)
3307 }; // class pass_stack_regs
3312 make_pass_stack_regs (gcc::context *ctxt)
3314 return new pass_stack_regs (ctxt);
3317 /* Convert register usage from flat register file usage to a stack
3320 rest_of_handle_stack_regs (void)
3324 regstack_completed = 1;
3331 const pass_data pass_data_stack_regs_run =
3333 RTL_PASS, /* type */
3335 OPTGROUP_NONE, /* optinfo_flags */
3336 TV_REG_STACK, /* tv_id */
3337 0, /* properties_required */
3338 0, /* properties_provided */
3339 0, /* properties_destroyed */
3340 0, /* todo_flags_start */
3341 TODO_df_finish, /* todo_flags_finish */
3344 class pass_stack_regs_run : public rtl_opt_pass
3347 pass_stack_regs_run (gcc::context *ctxt)
3348 : rtl_opt_pass (pass_data_stack_regs_run, ctxt)
3351 /* opt_pass methods: */
3352 virtual unsigned int execute (function *)
3354 return rest_of_handle_stack_regs ();
3357 }; // class pass_stack_regs_run
3362 make_pass_stack_regs_run (gcc::context *ctxt)
3364 return new pass_stack_regs_run (ctxt);