1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
78 There are several rules on the usage of stack-like regs in
79 asm_operands insns. These rules apply only to the operands that are
82 1. Given a set of input regs that die in an asm_operands, it is
83 necessary to know which are implicitly popped by the asm, and
84 which must be explicitly popped by gcc.
86 An input reg that is implicitly popped by the asm must be
87 explicitly clobbered, unless it is constrained to match an
90 2. For any input reg that is implicitly popped by an asm, it is
91 necessary to know how to adjust the stack to compensate for the pop.
92 If any non-popped input is closer to the top of the reg-stack than
93 the implicitly popped reg, it would not be possible to know what the
94 stack looked like - it's not clear how the rest of the stack "slides
97 All implicitly popped input regs must be closer to the top of
98 the reg-stack than any input that is not implicitly popped.
100 3. It is possible that if an input dies in an insn, reload might
101 use the input reg for an output reload. Consider this example:
103 asm ("foo" : "=t" (a) : "f" (b));
105 This asm says that input B is not popped by the asm, and that
106 the asm pushes a result onto the reg-stack, i.e., the stack is one
107 deeper after the asm than it was before. But, it is possible that
108 reload will think that it can use the same reg for both the input and
109 the output, if input B dies in this insn.
111 If any input operand uses the "f" constraint, all output reg
112 constraints must use the "&" earlyclobber.
114 The asm above would be written as
116 asm ("foo" : "=&t" (a) : "f" (b));
118 4. Some operands need to be in particular places on the stack. All
119 output operands fall in this category - there is no other way to
120 know which regs the outputs appear in unless the user indicates
121 this in the constraints.
123 Output operands must specifically indicate which reg an output
124 appears in after an asm. "=f" is not allowed: the operand
125 constraints must select a class with a single reg.
127 5. Output operands may not be "inserted" between existing stack regs.
128 Since no 387 opcode uses a read/write operand, all output operands
129 are dead before the asm_operands, and are pushed by the asm_operands.
130 It makes no sense to push anywhere but the top of the reg-stack.
132 Output operands must start at the top of the reg-stack: output
133 operands may not "skip" a reg.
135 6. Some asm statements may need extra stack space for internal
136 calculations. This can be guaranteed by clobbering stack registers
137 unrelated to the inputs and outputs.
139 Here are a couple of reasonable asms to want to write. This asm
140 takes one input, which is internally popped, and produces two outputs.
142 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
144 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
145 and replaces them with one output. The user must code the "st(1)"
146 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
148 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
154 #include "coretypes.h"
158 #include "rtl-error.h"
161 #include "hash-set.h"
163 #include "machmode.h"
164 #include "hard-reg-set.h"
166 #include "function.h"
167 #include "insn-config.h"
172 #include "dominance.h"
176 #include "cfgbuild.h"
177 #include "cfgcleanup.h"
178 #include "basic-block.h"
181 #include "tree-pass.h"
184 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
185 #include "rtl-iter.h"
189 /* We use this array to cache info about insns, because otherwise we
190 spend too much time in stack_regs_mentioned_p.
192 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
193 the insn uses stack registers, two indicates the insn does not use
195 static vec<char> stack_regs_mentioned_data;
197 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
199 int regstack_completed = 0;
201 /* This is the basic stack record. TOP is an index into REG[] such
202 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
204 If TOP is -2, REG[] is not yet initialized. Stack initialization
205 consists of placing each live reg in array `reg' and setting `top'
208 REG_SET indicates which registers are live. */
210 typedef struct stack_def
212 int top; /* index to top stack element */
213 HARD_REG_SET reg_set; /* set of live registers */
214 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
217 /* This is used to carry information about basic blocks. It is
218 attached to the AUX field of the standard CFG block. */
220 typedef struct block_info_def
222 struct stack_def stack_in; /* Input stack configuration. */
223 struct stack_def stack_out; /* Output stack configuration. */
224 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
225 int done; /* True if block already converted. */
226 int predecessors; /* Number of predecessors that need
230 #define BLOCK_INFO(B) ((block_info) (B)->aux)
232 /* Passed to change_stack to indicate where to emit insns. */
239 /* The block we're currently working on. */
240 static basic_block current_block;
242 /* In the current_block, whether we're processing the first register
243 stack or call instruction, i.e. the regstack is currently the
244 same as BLOCK_INFO(current_block)->stack_in. */
245 static bool starting_stack_p;
247 /* This is the register file for all register after conversion. */
249 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
251 #define FP_MODE_REG(regno,mode) \
252 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
254 /* Used to initialize uninitialized registers. */
255 static rtx not_a_num;
257 /* Forward declarations */
259 static int stack_regs_mentioned_p (const_rtx pat);
260 static void pop_stack (stack_ptr, int);
261 static rtx *get_true_reg (rtx *);
263 static int check_asm_stack_operands (rtx_insn *);
264 static void get_asm_operands_in_out (rtx, int *, int *);
265 static rtx stack_result (tree);
266 static void replace_reg (rtx *, int);
267 static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int);
268 static int get_hard_regnum (stack_ptr, rtx);
269 static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where);
270 static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx);
271 static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx);
272 static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx);
273 static int swap_rtx_condition_1 (rtx);
274 static int swap_rtx_condition (rtx_insn *);
275 static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx);
276 static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx);
277 static void subst_asm_stack_regs (rtx_insn *, stack_ptr);
278 static bool subst_stack_regs (rtx_insn *, stack_ptr);
279 static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where);
280 static void print_stack (FILE *, stack_ptr);
281 static rtx_insn *next_flags_user (rtx_insn *);
283 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
286 stack_regs_mentioned_p (const_rtx pat)
291 if (STACK_REG_P (pat))
294 fmt = GET_RTX_FORMAT (GET_CODE (pat));
295 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
301 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
302 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
305 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
312 /* Return nonzero if INSN mentions stacked registers, else return zero. */
315 stack_regs_mentioned (const_rtx insn)
317 unsigned int uid, max;
320 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ())
323 uid = INSN_UID (insn);
324 max = stack_regs_mentioned_data.length ();
327 /* Allocate some extra size to avoid too many reallocs, but
328 do not grow too quickly. */
329 max = uid + uid / 20 + 1;
330 stack_regs_mentioned_data.safe_grow_cleared (max);
333 test = stack_regs_mentioned_data[uid];
336 /* This insn has yet to be examined. Do so now. */
337 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
338 stack_regs_mentioned_data[uid] = test;
344 static rtx ix86_flags_rtx;
347 next_flags_user (rtx_insn *insn)
349 /* Search forward looking for the first use of this value.
350 Stop at block boundaries. */
352 while (insn != BB_END (current_block))
354 insn = NEXT_INSN (insn);
356 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
365 /* Reorganize the stack into ascending numbers, before this insn. */
368 straighten_stack (rtx_insn *insn, stack_ptr regstack)
370 struct stack_def temp_stack;
373 /* If there is only a single register on the stack, then the stack is
374 already in increasing order and no reorganization is needed.
376 Similarly if the stack is empty. */
377 if (regstack->top <= 0)
380 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
382 for (top = temp_stack.top = regstack->top; top >= 0; top--)
383 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
385 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
388 /* Pop a register from the stack. */
391 pop_stack (stack_ptr regstack, int regno)
393 int top = regstack->top;
395 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
397 /* If regno was not at the top of stack then adjust stack. */
398 if (regstack->reg [top] != regno)
401 for (i = regstack->top; i >= 0; i--)
402 if (regstack->reg [i] == regno)
405 for (j = i; j < top; j++)
406 regstack->reg [j] = regstack->reg [j + 1];
412 /* Return a pointer to the REG expression within PAT. If PAT is not a
413 REG, possible enclosed by a conversion rtx, return the inner part of
414 PAT that stopped the search. */
417 get_true_reg (rtx *pat)
420 switch (GET_CODE (*pat))
423 /* Eliminate FP subregister accesses in favor of the
424 actual FP register in use. */
427 if (STACK_REG_P (subreg = SUBREG_REG (*pat)))
429 int regno_off = subreg_regno_offset (REGNO (subreg),
433 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
441 pat = & XEXP (*pat, 0);
445 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP
446 || XINT (*pat, 1) == UNSPEC_LDA)
447 pat = & XVECEXP (*pat, 0, 0);
451 if (!flag_unsafe_math_optimizations)
453 pat = & XEXP (*pat, 0);
461 /* Set if we find any malformed asms in a block. */
462 static bool any_malformed_asm;
464 /* There are many rules that an asm statement for stack-like regs must
465 follow. Those rules are explained at the top of this file: the rule
466 numbers below refer to that explanation. */
469 check_asm_stack_operands (rtx_insn *insn)
473 int malformed_asm = 0;
474 rtx body = PATTERN (insn);
476 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
477 char implicitly_dies[FIRST_PSEUDO_REGISTER];
479 rtx *clobber_reg = 0;
480 int n_inputs, n_outputs;
482 /* Find out what the constraints require. If no constraint
483 alternative matches, this asm is malformed. */
484 extract_constrain_insn (insn);
486 preprocess_constraints (insn);
488 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
490 if (which_alternative < 0)
493 /* Avoid further trouble with this insn. */
494 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
497 const operand_alternative *op_alt = which_op_alt ();
499 /* Strip SUBREGs here to make the following code simpler. */
500 for (i = 0; i < recog_data.n_operands; i++)
501 if (GET_CODE (recog_data.operand[i]) == SUBREG
502 && REG_P (SUBREG_REG (recog_data.operand[i])))
503 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
505 /* Set up CLOBBER_REG. */
509 if (GET_CODE (body) == PARALLEL)
511 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
513 for (i = 0; i < XVECLEN (body, 0); i++)
514 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
516 rtx clobber = XVECEXP (body, 0, i);
517 rtx reg = XEXP (clobber, 0);
519 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
520 reg = SUBREG_REG (reg);
522 if (STACK_REG_P (reg))
524 clobber_reg[n_clobbers] = reg;
530 /* Enforce rule #4: Output operands must specifically indicate which
531 reg an output appears in after an asm. "=f" is not allowed: the
532 operand constraints must select a class with a single reg.
534 Also enforce rule #5: Output operands must start at the top of
535 the reg-stack: output operands may not "skip" a reg. */
537 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
538 for (i = 0; i < n_outputs; i++)
539 if (STACK_REG_P (recog_data.operand[i]))
541 if (reg_class_size[(int) op_alt[i].cl] != 1)
543 error_for_asm (insn, "output constraint %d must specify a single register", i);
550 for (j = 0; j < n_clobbers; j++)
551 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
553 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
554 i, reg_names [REGNO (clobber_reg[j])]);
559 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
564 /* Search for first non-popped reg. */
565 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
566 if (! reg_used_as_output[i])
569 /* If there are any other popped regs, that's an error. */
570 for (; i < LAST_STACK_REG + 1; i++)
571 if (reg_used_as_output[i])
574 if (i != LAST_STACK_REG + 1)
576 error_for_asm (insn, "output regs must be grouped at top of stack");
580 /* Enforce rule #2: All implicitly popped input regs must be closer
581 to the top of the reg-stack than any input that is not implicitly
584 memset (implicitly_dies, 0, sizeof (implicitly_dies));
585 for (i = n_outputs; i < n_outputs + n_inputs; i++)
586 if (STACK_REG_P (recog_data.operand[i]))
588 /* An input reg is implicitly popped if it is tied to an
589 output, or if there is a CLOBBER for it. */
592 for (j = 0; j < n_clobbers; j++)
593 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
596 if (j < n_clobbers || op_alt[i].matches >= 0)
597 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
600 /* Search for first non-popped reg. */
601 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
602 if (! implicitly_dies[i])
605 /* If there are any other popped regs, that's an error. */
606 for (; i < LAST_STACK_REG + 1; i++)
607 if (implicitly_dies[i])
610 if (i != LAST_STACK_REG + 1)
613 "implicitly popped regs must be grouped at top of stack");
617 /* Enforce rule #3: If any input operand uses the "f" constraint, all
618 output constraints must use the "&" earlyclobber.
620 ??? Detect this more deterministically by having constrain_asm_operands
621 record any earlyclobber. */
623 for (i = n_outputs; i < n_outputs + n_inputs; i++)
624 if (op_alt[i].matches == -1)
628 for (j = 0; j < n_outputs; j++)
629 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
632 "output operand %d must use %<&%> constraint", j);
639 /* Avoid further trouble with this insn. */
640 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
641 any_malformed_asm = true;
648 /* Calculate the number of inputs and outputs in BODY, an
649 asm_operands. N_OPERANDS is the total number of operands, and
650 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
654 get_asm_operands_in_out (rtx body, int *pout, int *pin)
656 rtx asmop = extract_asm_operands (body);
658 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop);
659 *pout = (recog_data.n_operands
660 - ASM_OPERANDS_INPUT_LENGTH (asmop)
661 - ASM_OPERANDS_LABEL_LENGTH (asmop));
664 /* If current function returns its result in an fp stack register,
665 return the REG. Otherwise, return 0. */
668 stack_result (tree decl)
672 /* If the value is supposed to be returned in memory, then clearly
673 it is not returned in a stack register. */
674 if (aggregate_value_p (DECL_RESULT (decl), decl))
677 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
679 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
682 return result != 0 && STACK_REG_P (result) ? result : 0;
687 * This section deals with stack register substitution, and forms the second
691 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
692 the desired hard REGNO. */
695 replace_reg (rtx *reg, int regno)
697 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG));
698 gcc_assert (STACK_REG_P (*reg));
700 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
701 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
703 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
706 /* Remove a note of type NOTE, which must be found, for register
707 number REGNO from INSN. Remove only one such note. */
710 remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno)
712 rtx *note_link, this_rtx;
714 note_link = ®_NOTES (insn);
715 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1))
716 if (REG_NOTE_KIND (this_rtx) == note
717 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno)
719 *note_link = XEXP (this_rtx, 1);
723 note_link = &XEXP (this_rtx, 1);
728 /* Find the hard register number of virtual register REG in REGSTACK.
729 The hard register number is relative to the top of the stack. -1 is
730 returned if the register is not found. */
733 get_hard_regnum (stack_ptr regstack, rtx reg)
737 gcc_assert (STACK_REG_P (reg));
739 for (i = regstack->top; i >= 0; i--)
740 if (regstack->reg[i] == REGNO (reg))
743 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
746 /* Emit an insn to pop virtual register REG before or after INSN.
747 REGSTACK is the stack state after INSN and is updated to reflect this
748 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
749 is represented as a SET whose destination is the register to be popped
750 and source is the top of stack. A death note for the top of stack
751 cases the movdf pattern to pop. */
754 emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, enum emit_where where)
760 /* For complex types take care to pop both halves. These may survive in
761 CLOBBER and USE expressions. */
762 if (COMPLEX_MODE_P (GET_MODE (reg)))
764 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
765 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
768 if (get_hard_regnum (regstack, reg1) >= 0)
769 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
770 if (get_hard_regnum (regstack, reg2) >= 0)
771 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
772 gcc_assert (pop_insn);
776 hard_regno = get_hard_regnum (regstack, reg);
778 gcc_assert (hard_regno >= FIRST_STACK_REG);
780 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
781 FP_MODE_REG (FIRST_STACK_REG, DFmode));
783 if (where == EMIT_AFTER)
784 pop_insn = emit_insn_after (pop_rtx, insn);
786 pop_insn = emit_insn_before (pop_rtx, insn);
788 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode));
790 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
791 = regstack->reg[regstack->top];
793 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
798 /* Emit an insn before or after INSN to swap virtual register REG with
799 the top of stack. REGSTACK is the stack state before the swap, and
800 is updated to reflect the swap. A swap insn is represented as a
801 PARALLEL of two patterns: each pattern moves one reg to the other.
803 If REG is already at the top of the stack, no insn is emitted. */
806 emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg)
810 int tmp, other_reg; /* swap regno temps */
811 rtx_insn *i1; /* the stack-reg insn prior to INSN */
812 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
814 hard_regno = get_hard_regnum (regstack, reg);
816 if (hard_regno == FIRST_STACK_REG)
818 if (hard_regno == -1)
820 /* Something failed if the register wasn't on the stack. If we had
821 malformed asms, we zapped the instruction itself, but that didn't
822 produce the same pattern of register sets as before. To prevent
823 further failure, adjust REGSTACK to include REG at TOP. */
824 gcc_assert (any_malformed_asm);
825 regstack->reg[++regstack->top] = REGNO (reg);
828 gcc_assert (hard_regno >= FIRST_STACK_REG);
830 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
832 tmp = regstack->reg[other_reg];
833 regstack->reg[other_reg] = regstack->reg[regstack->top];
834 regstack->reg[regstack->top] = tmp;
836 /* Find the previous insn involving stack regs, but don't pass a
839 if (current_block && insn != BB_HEAD (current_block))
841 rtx_insn *tmp = PREV_INSN (insn);
842 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block));
847 || NOTE_INSN_BASIC_BLOCK_P (tmp)
848 || (NONJUMP_INSN_P (tmp)
849 && stack_regs_mentioned (tmp)))
854 tmp = PREV_INSN (tmp);
859 && (i1set = single_set (i1)) != NULL_RTX)
861 rtx i1src = *get_true_reg (&SET_SRC (i1set));
862 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
864 /* If the previous register stack push was from the reg we are to
865 swap with, omit the swap. */
867 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
869 && REGNO (i1src) == (unsigned) hard_regno - 1
870 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
873 /* If the previous insn wrote to the reg we are to swap with,
876 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
877 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
878 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
882 /* Avoid emitting the swap if this is the first register stack insn
883 of the current_block. Instead update the current_block's stack_in
884 and let compensate edges take care of this for us. */
885 if (current_block && starting_stack_p)
887 BLOCK_INFO (current_block)->stack_in = *regstack;
888 starting_stack_p = false;
892 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
893 FP_MODE_REG (FIRST_STACK_REG, XFmode));
896 emit_insn_after (swap_rtx, i1);
897 else if (current_block)
898 emit_insn_before (swap_rtx, BB_HEAD (current_block));
900 emit_insn_before (swap_rtx, insn);
903 /* Emit an insns before INSN to swap virtual register SRC1 with
904 the top of stack and virtual register SRC2 with second stack
905 slot. REGSTACK is the stack state before the swaps, and
906 is updated to reflect the swaps. A swap insn is represented as a
907 PARALLEL of two patterns: each pattern moves one reg to the other.
909 If SRC1 and/or SRC2 are already at the right place, no swap insn
913 swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2)
915 struct stack_def temp_stack;
916 int regno, j, k, temp;
918 temp_stack = *regstack;
920 /* Place operand 1 at the top of stack. */
921 regno = get_hard_regnum (&temp_stack, src1);
922 gcc_assert (regno >= 0);
923 if (regno != FIRST_STACK_REG)
925 k = temp_stack.top - (regno - FIRST_STACK_REG);
928 temp = temp_stack.reg[k];
929 temp_stack.reg[k] = temp_stack.reg[j];
930 temp_stack.reg[j] = temp;
933 /* Place operand 2 next on the stack. */
934 regno = get_hard_regnum (&temp_stack, src2);
935 gcc_assert (regno >= 0);
936 if (regno != FIRST_STACK_REG + 1)
938 k = temp_stack.top - (regno - FIRST_STACK_REG);
939 j = temp_stack.top - 1;
941 temp = temp_stack.reg[k];
942 temp_stack.reg[k] = temp_stack.reg[j];
943 temp_stack.reg[j] = temp;
946 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
949 /* Handle a move to or from a stack register in PAT, which is in INSN.
950 REGSTACK is the current stack. Return whether a control flow insn
951 was deleted in the process. */
954 move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat)
956 rtx *psrc = get_true_reg (&SET_SRC (pat));
957 rtx *pdest = get_true_reg (&SET_DEST (pat));
960 bool control_flow_insn_deleted = false;
962 src = *psrc; dest = *pdest;
964 if (STACK_REG_P (src) && STACK_REG_P (dest))
966 /* Write from one stack reg to another. If SRC dies here, then
967 just change the register mapping and delete the insn. */
969 note = find_regno_note (insn, REG_DEAD, REGNO (src));
974 /* If this is a no-op move, there must not be a REG_DEAD note. */
975 gcc_assert (REGNO (src) != REGNO (dest));
977 for (i = regstack->top; i >= 0; i--)
978 if (regstack->reg[i] == REGNO (src))
981 /* The destination must be dead, or life analysis is borked. */
982 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
984 /* If the source is not live, this is yet another case of
985 uninitialized variables. Load up a NaN instead. */
987 return move_nan_for_stack_reg (insn, regstack, dest);
989 /* It is possible that the dest is unused after this insn.
990 If so, just pop the src. */
992 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
993 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
996 regstack->reg[i] = REGNO (dest);
997 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
998 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1001 control_flow_insn_deleted |= control_flow_insn_p (insn);
1003 return control_flow_insn_deleted;
1006 /* The source reg does not die. */
1008 /* If this appears to be a no-op move, delete it, or else it
1009 will confuse the machine description output patterns. But if
1010 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1011 for REG_UNUSED will not work for deleted insns. */
1013 if (REGNO (src) == REGNO (dest))
1015 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1016 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1018 control_flow_insn_deleted |= control_flow_insn_p (insn);
1020 return control_flow_insn_deleted;
1023 /* The destination ought to be dead. */
1024 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1026 replace_reg (psrc, get_hard_regnum (regstack, src));
1028 regstack->reg[++regstack->top] = REGNO (dest);
1029 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1030 replace_reg (pdest, FIRST_STACK_REG);
1032 else if (STACK_REG_P (src))
1034 /* Save from a stack reg to MEM, or possibly integer reg. Since
1035 only top of stack may be saved, emit an exchange first if
1038 emit_swap_insn (insn, regstack, src);
1040 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1043 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1045 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1047 else if ((GET_MODE (src) == XFmode)
1048 && regstack->top < REG_STACK_SIZE - 1)
1050 /* A 387 cannot write an XFmode value to a MEM without
1051 clobbering the source reg. The output code can handle
1052 this by reading back the value from the MEM.
1053 But it is more efficient to use a temp register if one is
1054 available. Push the source value here if the register
1055 stack is not full, and then write the value to memory via
1058 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1060 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1061 emit_insn_before (push_rtx, insn);
1062 add_reg_note (insn, REG_DEAD, top_stack_reg);
1065 replace_reg (psrc, FIRST_STACK_REG);
1069 rtx pat = PATTERN (insn);
1071 gcc_assert (STACK_REG_P (dest));
1073 /* Load from MEM, or possibly integer REG or constant, into the
1074 stack regs. The actual target is always the top of the
1075 stack. The stack mapping is changed to reflect that DEST is
1076 now at top of stack. */
1078 /* The destination ought to be dead. However, there is a
1079 special case with i387 UNSPEC_TAN, where destination is live
1080 (an argument to fptan) but inherent load of 1.0 is modelled
1081 as a load from a constant. */
1082 if (GET_CODE (pat) == PARALLEL
1083 && XVECLEN (pat, 0) == 2
1084 && GET_CODE (XVECEXP (pat, 0, 1)) == SET
1085 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC
1086 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN)
1087 emit_swap_insn (insn, regstack, dest);
1089 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1091 gcc_assert (regstack->top < REG_STACK_SIZE);
1093 regstack->reg[++regstack->top] = REGNO (dest);
1094 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1095 replace_reg (pdest, FIRST_STACK_REG);
1098 return control_flow_insn_deleted;
1101 /* A helper function which replaces INSN with a pattern that loads up
1102 a NaN into DEST, then invokes move_for_stack_reg. */
1105 move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest)
1109 dest = FP_MODE_REG (REGNO (dest), SFmode);
1110 pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1111 PATTERN (insn) = pat;
1112 INSN_CODE (insn) = -1;
1114 return move_for_stack_reg (insn, regstack, pat);
1117 /* Swap the condition on a branch, if there is one. Return true if we
1118 found a condition to swap. False if the condition was not used as
1122 swap_rtx_condition_1 (rtx pat)
1127 if (COMPARISON_P (pat))
1129 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1134 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1135 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1141 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1142 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1144 else if (fmt[i] == 'e')
1145 r |= swap_rtx_condition_1 (XEXP (pat, i));
1153 swap_rtx_condition (rtx_insn *insn)
1155 rtx pat = PATTERN (insn);
1157 /* We're looking for a single set to cc0 or an HImode temporary. */
1159 if (GET_CODE (pat) == SET
1160 && REG_P (SET_DEST (pat))
1161 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1163 insn = next_flags_user (insn);
1164 if (insn == NULL_RTX)
1166 pat = PATTERN (insn);
1169 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1170 with the cc value right now. We may be able to search for one
1173 if (GET_CODE (pat) == SET
1174 && GET_CODE (SET_SRC (pat)) == UNSPEC
1175 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1177 rtx dest = SET_DEST (pat);
1179 /* Search forward looking for the first use of this value.
1180 Stop at block boundaries. */
1181 while (insn != BB_END (current_block))
1183 insn = NEXT_INSN (insn);
1184 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1190 /* We haven't found it. */
1191 if (insn == BB_END (current_block))
1194 /* So we've found the insn using this value. If it is anything
1195 other than sahf or the value does not die (meaning we'd have
1196 to search further), then we must give up. */
1197 pat = PATTERN (insn);
1198 if (GET_CODE (pat) != SET
1199 || GET_CODE (SET_SRC (pat)) != UNSPEC
1200 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1201 || ! dead_or_set_p (insn, dest))
1204 /* Now we are prepared to handle this as a normal cc0 setter. */
1205 insn = next_flags_user (insn);
1206 if (insn == NULL_RTX)
1208 pat = PATTERN (insn);
1211 if (swap_rtx_condition_1 (pat))
1214 INSN_CODE (insn) = -1;
1215 if (recog_memoized (insn) == -1)
1217 /* In case the flags don't die here, recurse to try fix
1218 following user too. */
1219 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1221 insn = next_flags_user (insn);
1222 if (!insn || !swap_rtx_condition (insn))
1227 swap_rtx_condition_1 (pat);
1235 /* Handle a comparison. Special care needs to be taken to avoid
1236 causing comparisons that a 387 cannot do correctly, such as EQ.
1238 Also, a pop insn may need to be emitted. The 387 does have an
1239 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1240 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1244 compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat_src)
1247 rtx src1_note, src2_note;
1249 src1 = get_true_reg (&XEXP (pat_src, 0));
1250 src2 = get_true_reg (&XEXP (pat_src, 1));
1252 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1253 registers that die in this insn - move those to stack top first. */
1254 if ((! STACK_REG_P (*src1)
1255 || (STACK_REG_P (*src2)
1256 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1257 && swap_rtx_condition (insn))
1260 temp = XEXP (pat_src, 0);
1261 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1262 XEXP (pat_src, 1) = temp;
1264 src1 = get_true_reg (&XEXP (pat_src, 0));
1265 src2 = get_true_reg (&XEXP (pat_src, 1));
1267 INSN_CODE (insn) = -1;
1270 /* We will fix any death note later. */
1272 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1274 if (STACK_REG_P (*src2))
1275 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1277 src2_note = NULL_RTX;
1279 emit_swap_insn (insn, regstack, *src1);
1281 replace_reg (src1, FIRST_STACK_REG);
1283 if (STACK_REG_P (*src2))
1284 replace_reg (src2, get_hard_regnum (regstack, *src2));
1288 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1289 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1292 /* If the second operand dies, handle that. But if the operands are
1293 the same stack register, don't bother, because only one death is
1294 needed, and it was just handled. */
1297 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1298 && REGNO (*src1) == REGNO (*src2)))
1300 /* As a special case, two regs may die in this insn if src2 is
1301 next to top of stack and the top of stack also dies. Since
1302 we have already popped src1, "next to top of stack" is really
1303 at top (FIRST_STACK_REG) now. */
1305 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1308 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1309 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1313 /* The 386 can only represent death of the first operand in
1314 the case handled above. In all other cases, emit a separate
1315 pop and remove the death note from here. */
1316 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1317 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1323 /* Substitute hardware stack regs in debug insn INSN, using stack
1324 layout REGSTACK. If we can't find a hardware stack reg for any of
1325 the REGs in it, reset the debug insn. */
1328 subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack)
1330 subrtx_ptr_iterator::array_type array;
1331 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST)
1335 if (STACK_REG_P (x))
1337 int hard_regno = get_hard_regnum (regstack, x);
1339 /* If we can't find an active register, reset this debug insn. */
1340 if (hard_regno == -1)
1342 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
1346 gcc_assert (hard_regno >= FIRST_STACK_REG);
1347 replace_reg (loc, hard_regno);
1348 iter.skip_subrtxes ();
1353 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1354 is the current register layout. Return whether a control flow insn
1355 was deleted in the process. */
1358 subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat)
1361 bool control_flow_insn_deleted = false;
1363 switch (GET_CODE (pat))
1366 /* Deaths in USE insns can happen in non optimizing compilation.
1367 Handle them by popping the dying register. */
1368 src = get_true_reg (&XEXP (pat, 0));
1369 if (STACK_REG_P (*src)
1370 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1372 /* USEs are ignored for liveness information so USEs of dead
1373 register might happen. */
1374 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src)))
1375 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1376 return control_flow_insn_deleted;
1378 /* Uninitialized USE might happen for functions returning uninitialized
1379 value. We will properly initialize the USE on the edge to EXIT_BLOCK,
1380 so it is safe to ignore the use here. This is consistent with behavior
1381 of dataflow analyzer that ignores USE too. (This also imply that
1382 forcibly initializing the register to NaN here would lead to ICE later,
1383 since the REG_DEAD notes are not issued.) */
1393 dest = get_true_reg (&XEXP (pat, 0));
1394 if (STACK_REG_P (*dest))
1396 note = find_reg_note (insn, REG_DEAD, *dest);
1398 if (pat != PATTERN (insn))
1400 /* The fix_truncdi_1 pattern wants to be able to
1401 allocate its own scratch register. It does this by
1402 clobbering an fp reg so that it is assured of an
1403 empty reg-stack register. If the register is live,
1404 kill it now. Remove the DEAD/UNUSED note so we
1405 don't try to kill it later too.
1407 In reality the UNUSED note can be absent in some
1408 complicated cases when the register is reused for
1409 partially set variable. */
1412 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1414 note = find_reg_note (insn, REG_UNUSED, *dest);
1416 remove_note (insn, note);
1417 replace_reg (dest, FIRST_STACK_REG + 1);
1421 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1422 indicates an uninitialized value. Because reload removed
1423 all other clobbers, this must be due to a function
1424 returning without a value. Load up a NaN. */
1429 if (COMPLEX_MODE_P (GET_MODE (t)))
1431 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1432 if (get_hard_regnum (regstack, u) == -1)
1434 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1435 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1436 control_flow_insn_deleted
1437 |= move_nan_for_stack_reg (insn2, regstack, u);
1440 if (get_hard_regnum (regstack, t) == -1)
1441 control_flow_insn_deleted
1442 |= move_nan_for_stack_reg (insn, regstack, t);
1451 rtx *src1 = (rtx *) 0, *src2;
1452 rtx src1_note, src2_note;
1455 dest = get_true_reg (&SET_DEST (pat));
1456 src = get_true_reg (&SET_SRC (pat));
1457 pat_src = SET_SRC (pat);
1459 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1460 if (STACK_REG_P (*src)
1461 || (STACK_REG_P (*dest)
1462 && (REG_P (*src) || MEM_P (*src)
1463 || CONST_DOUBLE_P (*src))))
1465 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1469 switch (GET_CODE (pat_src))
1472 compare_for_stack_reg (insn, regstack, pat_src);
1478 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1481 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1482 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1485 replace_reg (dest, FIRST_STACK_REG);
1489 /* This is a `tstM2' case. */
1490 gcc_assert (*dest == cc0_rtx);
1495 case FLOAT_TRUNCATE:
1499 /* These insns only operate on the top of the stack. DEST might
1500 be cc0_rtx if we're processing a tstM pattern. Also, it's
1501 possible that the tstM case results in a REG_DEAD note on the
1505 src1 = get_true_reg (&XEXP (pat_src, 0));
1507 emit_swap_insn (insn, regstack, *src1);
1509 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1511 if (STACK_REG_P (*dest))
1512 replace_reg (dest, FIRST_STACK_REG);
1516 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1518 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1521 replace_reg (src1, FIRST_STACK_REG);
1526 /* On i386, reversed forms of subM3 and divM3 exist for
1527 MODE_FLOAT, so the same code that works for addM3 and mulM3
1531 /* These insns can accept the top of stack as a destination
1532 from a stack reg or mem, or can use the top of stack as a
1533 source and some other stack register (possibly top of stack)
1534 as a destination. */
1536 src1 = get_true_reg (&XEXP (pat_src, 0));
1537 src2 = get_true_reg (&XEXP (pat_src, 1));
1539 /* We will fix any death note later. */
1541 if (STACK_REG_P (*src1))
1542 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1544 src1_note = NULL_RTX;
1545 if (STACK_REG_P (*src2))
1546 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1548 src2_note = NULL_RTX;
1550 /* If either operand is not a stack register, then the dest
1551 must be top of stack. */
1553 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1554 emit_swap_insn (insn, regstack, *dest);
1557 /* Both operands are REG. If neither operand is already
1558 at the top of stack, choose to make the one that is the
1559 dest the new top of stack. */
1561 int src1_hard_regnum, src2_hard_regnum;
1563 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1564 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1566 /* If the source is not live, this is yet another case of
1567 uninitialized variables. Load up a NaN instead. */
1568 if (src1_hard_regnum == -1)
1570 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1);
1571 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1572 control_flow_insn_deleted
1573 |= move_nan_for_stack_reg (insn2, regstack, *src1);
1575 if (src2_hard_regnum == -1)
1577 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2);
1578 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1579 control_flow_insn_deleted
1580 |= move_nan_for_stack_reg (insn2, regstack, *src2);
1583 if (src1_hard_regnum != FIRST_STACK_REG
1584 && src2_hard_regnum != FIRST_STACK_REG)
1585 emit_swap_insn (insn, regstack, *dest);
1588 if (STACK_REG_P (*src1))
1589 replace_reg (src1, get_hard_regnum (regstack, *src1));
1590 if (STACK_REG_P (*src2))
1591 replace_reg (src2, get_hard_regnum (regstack, *src2));
1595 rtx src1_reg = XEXP (src1_note, 0);
1597 /* If the register that dies is at the top of stack, then
1598 the destination is somewhere else - merely substitute it.
1599 But if the reg that dies is not at top of stack, then
1600 move the top of stack to the dead reg, as though we had
1601 done the insn and then a store-with-pop. */
1603 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1605 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1606 replace_reg (dest, get_hard_regnum (regstack, *dest));
1610 int regno = get_hard_regnum (regstack, src1_reg);
1612 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1613 replace_reg (dest, regno);
1615 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1616 = regstack->reg[regstack->top];
1619 CLEAR_HARD_REG_BIT (regstack->reg_set,
1620 REGNO (XEXP (src1_note, 0)));
1621 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1626 rtx src2_reg = XEXP (src2_note, 0);
1627 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1629 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1630 replace_reg (dest, get_hard_regnum (regstack, *dest));
1634 int regno = get_hard_regnum (regstack, src2_reg);
1636 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1637 replace_reg (dest, regno);
1639 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1640 = regstack->reg[regstack->top];
1643 CLEAR_HARD_REG_BIT (regstack->reg_set,
1644 REGNO (XEXP (src2_note, 0)));
1645 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1650 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1651 replace_reg (dest, get_hard_regnum (regstack, *dest));
1654 /* Keep operand 1 matching with destination. */
1655 if (COMMUTATIVE_ARITH_P (pat_src)
1656 && REG_P (*src1) && REG_P (*src2)
1657 && REGNO (*src1) != REGNO (*dest))
1659 int tmp = REGNO (*src1);
1660 replace_reg (src1, REGNO (*src2));
1661 replace_reg (src2, tmp);
1666 switch (XINT (pat_src, 1))
1671 case UNSPEC_FIST_FLOOR:
1672 case UNSPEC_FIST_CEIL:
1674 /* These insns only operate on the top of the stack. */
1676 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1677 emit_swap_insn (insn, regstack, *src1);
1679 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1681 if (STACK_REG_P (*dest))
1682 replace_reg (dest, FIRST_STACK_REG);
1686 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1688 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1691 replace_reg (src1, FIRST_STACK_REG);
1696 /* This insn only operate on the top of the stack. */
1698 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1699 emit_swap_insn (insn, regstack, *src1);
1701 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1703 replace_reg (src1, FIRST_STACK_REG);
1707 remove_regno_note (insn, REG_DEAD,
1708 REGNO (XEXP (src1_note, 0)));
1709 emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
1717 case UNSPEC_FRNDINT:
1720 case UNSPEC_FRNDINT_FLOOR:
1721 case UNSPEC_FRNDINT_CEIL:
1722 case UNSPEC_FRNDINT_TRUNC:
1723 case UNSPEC_FRNDINT_MASK_PM:
1725 /* Above insns operate on the top of the stack. */
1727 case UNSPEC_SINCOS_COS:
1728 case UNSPEC_XTRACT_FRACT:
1730 /* Above insns operate on the top two stack slots,
1731 first part of one input, double output insn. */
1733 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1735 emit_swap_insn (insn, regstack, *src1);
1737 /* Input should never die, it is replaced with output. */
1738 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1739 gcc_assert (!src1_note);
1741 if (STACK_REG_P (*dest))
1742 replace_reg (dest, FIRST_STACK_REG);
1744 replace_reg (src1, FIRST_STACK_REG);
1747 case UNSPEC_SINCOS_SIN:
1748 case UNSPEC_XTRACT_EXP:
1750 /* These insns operate on the top two stack slots,
1751 second part of one input, double output insn. */
1758 /* For UNSPEC_TAN, regstack->top is already increased
1759 by inherent load of constant 1.0. */
1761 /* Output value is generated in the second stack slot.
1762 Move current value from second slot to the top. */
1763 regstack->reg[regstack->top]
1764 = regstack->reg[regstack->top - 1];
1766 gcc_assert (STACK_REG_P (*dest));
1768 regstack->reg[regstack->top - 1] = REGNO (*dest);
1769 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1770 replace_reg (dest, FIRST_STACK_REG + 1);
1772 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1774 replace_reg (src1, FIRST_STACK_REG);
1779 case UNSPEC_FYL2XP1:
1780 /* These insns operate on the top two stack slots. */
1782 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1783 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1785 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1786 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1788 swap_to_top (insn, regstack, *src1, *src2);
1790 replace_reg (src1, FIRST_STACK_REG);
1791 replace_reg (src2, FIRST_STACK_REG + 1);
1794 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1796 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1798 /* Pop both input operands from the stack. */
1799 CLEAR_HARD_REG_BIT (regstack->reg_set,
1800 regstack->reg[regstack->top]);
1801 CLEAR_HARD_REG_BIT (regstack->reg_set,
1802 regstack->reg[regstack->top - 1]);
1805 /* Push the result back onto the stack. */
1806 regstack->reg[++regstack->top] = REGNO (*dest);
1807 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1808 replace_reg (dest, FIRST_STACK_REG);
1811 case UNSPEC_FSCALE_FRACT:
1812 case UNSPEC_FPREM_F:
1813 case UNSPEC_FPREM1_F:
1814 /* These insns operate on the top two stack slots,
1815 first part of double input, double output insn. */
1817 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1818 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1820 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1821 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1823 /* Inputs should never die, they are
1824 replaced with outputs. */
1825 gcc_assert (!src1_note);
1826 gcc_assert (!src2_note);
1828 swap_to_top (insn, regstack, *src1, *src2);
1830 /* Push the result back onto stack. Empty stack slot
1831 will be filled in second part of insn. */
1832 if (STACK_REG_P (*dest))
1834 regstack->reg[regstack->top] = REGNO (*dest);
1835 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1836 replace_reg (dest, FIRST_STACK_REG);
1839 replace_reg (src1, FIRST_STACK_REG);
1840 replace_reg (src2, FIRST_STACK_REG + 1);
1843 case UNSPEC_FSCALE_EXP:
1844 case UNSPEC_FPREM_U:
1845 case UNSPEC_FPREM1_U:
1846 /* These insns operate on the top two stack slots,
1847 second part of double input, double output insn. */
1849 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1850 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1852 /* Push the result back onto stack. Fill empty slot from
1853 first part of insn and fix top of stack pointer. */
1854 if (STACK_REG_P (*dest))
1856 regstack->reg[regstack->top - 1] = REGNO (*dest);
1857 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1858 replace_reg (dest, FIRST_STACK_REG + 1);
1861 replace_reg (src1, FIRST_STACK_REG);
1862 replace_reg (src2, FIRST_STACK_REG + 1);
1865 case UNSPEC_C2_FLAG:
1866 /* This insn operates on the top two stack slots,
1867 third part of C2 setting double input insn. */
1869 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1870 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1872 replace_reg (src1, FIRST_STACK_REG);
1873 replace_reg (src2, FIRST_STACK_REG + 1);
1877 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1878 The combination matches the PPRO fcomi instruction. */
1880 pat_src = XVECEXP (pat_src, 0, 0);
1881 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1882 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1886 /* Combined fcomp+fnstsw generated for doing well with
1887 CSE. When optimizing this would have been broken
1890 pat_src = XVECEXP (pat_src, 0, 0);
1891 gcc_assert (GET_CODE (pat_src) == COMPARE);
1893 compare_for_stack_reg (insn, regstack, pat_src);
1902 /* This insn requires the top of stack to be the destination. */
1904 src1 = get_true_reg (&XEXP (pat_src, 1));
1905 src2 = get_true_reg (&XEXP (pat_src, 2));
1907 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1908 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1910 /* If the comparison operator is an FP comparison operator,
1911 it is handled correctly by compare_for_stack_reg () who
1912 will move the destination to the top of stack. But if the
1913 comparison operator is not an FP comparison operator, we
1914 have to handle it here. */
1915 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1916 && REGNO (*dest) != regstack->reg[regstack->top])
1918 /* In case one of operands is the top of stack and the operands
1919 dies, it is safe to make it the destination operand by
1920 reversing the direction of cmove and avoid fxch. */
1921 if ((REGNO (*src1) == regstack->reg[regstack->top]
1923 || (REGNO (*src2) == regstack->reg[regstack->top]
1926 int idx1 = (get_hard_regnum (regstack, *src1)
1928 int idx2 = (get_hard_regnum (regstack, *src2)
1931 /* Make reg-stack believe that the operands are already
1932 swapped on the stack */
1933 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1934 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1936 /* Reverse condition to compensate the operand swap.
1937 i386 do have comparison always reversible. */
1938 PUT_CODE (XEXP (pat_src, 0),
1939 reversed_comparison_code (XEXP (pat_src, 0), insn));
1942 emit_swap_insn (insn, regstack, *dest);
1950 src_note[1] = src1_note;
1951 src_note[2] = src2_note;
1953 if (STACK_REG_P (*src1))
1954 replace_reg (src1, get_hard_regnum (regstack, *src1));
1955 if (STACK_REG_P (*src2))
1956 replace_reg (src2, get_hard_regnum (regstack, *src2));
1958 for (i = 1; i <= 2; i++)
1961 int regno = REGNO (XEXP (src_note[i], 0));
1963 /* If the register that dies is not at the top of
1964 stack, then move the top of stack to the dead reg.
1965 Top of stack should never die, as it is the
1967 gcc_assert (regno != regstack->reg[regstack->top]);
1968 remove_regno_note (insn, REG_DEAD, regno);
1969 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1974 /* Make dest the top of stack. Add dest to regstack if
1976 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1977 regstack->reg[++regstack->top] = REGNO (*dest);
1978 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1979 replace_reg (dest, FIRST_STACK_REG);
1992 return control_flow_insn_deleted;
1995 /* Substitute hard regnums for any stack regs in INSN, which has
1996 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1997 before the insn, and is updated with changes made here.
1999 There are several requirements and assumptions about the use of
2000 stack-like regs in asm statements. These rules are enforced by
2001 record_asm_stack_regs; see comments there for details. Any
2002 asm_operands left in the RTL at this point may be assume to meet the
2003 requirements, since record_asm_stack_regs removes any problem asm. */
2006 subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack)
2008 rtx body = PATTERN (insn);
2010 rtx *note_reg; /* Array of note contents */
2011 rtx **note_loc; /* Address of REG field of each note */
2012 enum reg_note *note_kind; /* The type of each note */
2014 rtx *clobber_reg = 0;
2015 rtx **clobber_loc = 0;
2017 struct stack_def temp_stack;
2022 int n_inputs, n_outputs;
2024 if (! check_asm_stack_operands (insn))
2027 /* Find out what the constraints required. If no constraint
2028 alternative matches, that is a compiler bug: we should have caught
2029 such an insn in check_asm_stack_operands. */
2030 extract_constrain_insn (insn);
2032 preprocess_constraints (insn);
2033 const operand_alternative *op_alt = which_op_alt ();
2035 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
2037 /* Strip SUBREGs here to make the following code simpler. */
2038 for (i = 0; i < recog_data.n_operands; i++)
2039 if (GET_CODE (recog_data.operand[i]) == SUBREG
2040 && REG_P (SUBREG_REG (recog_data.operand[i])))
2042 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2043 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2046 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2048 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2051 note_reg = XALLOCAVEC (rtx, i);
2052 note_loc = XALLOCAVEC (rtx *, i);
2053 note_kind = XALLOCAVEC (enum reg_note, i);
2056 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2058 if (GET_CODE (note) != EXPR_LIST)
2060 rtx reg = XEXP (note, 0);
2061 rtx *loc = & XEXP (note, 0);
2063 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2065 loc = & SUBREG_REG (reg);
2066 reg = SUBREG_REG (reg);
2069 if (STACK_REG_P (reg)
2070 && (REG_NOTE_KIND (note) == REG_DEAD
2071 || REG_NOTE_KIND (note) == REG_UNUSED))
2073 note_reg[n_notes] = reg;
2074 note_loc[n_notes] = loc;
2075 note_kind[n_notes] = REG_NOTE_KIND (note);
2080 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2084 if (GET_CODE (body) == PARALLEL)
2086 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
2087 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0));
2089 for (i = 0; i < XVECLEN (body, 0); i++)
2090 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2092 rtx clobber = XVECEXP (body, 0, i);
2093 rtx reg = XEXP (clobber, 0);
2094 rtx *loc = & XEXP (clobber, 0);
2096 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2098 loc = & SUBREG_REG (reg);
2099 reg = SUBREG_REG (reg);
2102 if (STACK_REG_P (reg))
2104 clobber_reg[n_clobbers] = reg;
2105 clobber_loc[n_clobbers] = loc;
2111 temp_stack = *regstack;
2113 /* Put the input regs into the desired place in TEMP_STACK. */
2115 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2116 if (STACK_REG_P (recog_data.operand[i])
2117 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS)
2118 && op_alt[i].cl != FLOAT_REGS)
2120 /* If an operand needs to be in a particular reg in
2121 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2122 these constraints are for single register classes, and
2123 reload guaranteed that operand[i] is already in that class,
2124 we can just use REGNO (recog_data.operand[i]) to know which
2125 actual reg this operand needs to be in. */
2127 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2129 gcc_assert (regno >= 0);
2131 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2133 /* recog_data.operand[i] is not in the right place. Find
2134 it and swap it with whatever is already in I's place.
2135 K is where recog_data.operand[i] is now. J is where it
2139 k = temp_stack.top - (regno - FIRST_STACK_REG);
2141 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2143 temp = temp_stack.reg[k];
2144 temp_stack.reg[k] = temp_stack.reg[j];
2145 temp_stack.reg[j] = temp;
2149 /* Emit insns before INSN to make sure the reg-stack is in the right
2152 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2154 /* Make the needed input register substitutions. Do death notes and
2155 clobbers too, because these are for inputs, not outputs. */
2157 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2158 if (STACK_REG_P (recog_data.operand[i]))
2160 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2162 gcc_assert (regnum >= 0);
2164 replace_reg (recog_data.operand_loc[i], regnum);
2167 for (i = 0; i < n_notes; i++)
2168 if (note_kind[i] == REG_DEAD)
2170 int regnum = get_hard_regnum (regstack, note_reg[i]);
2172 gcc_assert (regnum >= 0);
2174 replace_reg (note_loc[i], regnum);
2177 for (i = 0; i < n_clobbers; i++)
2179 /* It's OK for a CLOBBER to reference a reg that is not live.
2180 Don't try to replace it in that case. */
2181 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2185 /* Sigh - clobbers always have QImode. But replace_reg knows
2186 that these regs can't be MODE_INT and will assert. Just put
2187 the right reg there without calling replace_reg. */
2189 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2193 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2195 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2196 if (STACK_REG_P (recog_data.operand[i]))
2198 /* An input reg is implicitly popped if it is tied to an
2199 output, or if there is a CLOBBER for it. */
2202 for (j = 0; j < n_clobbers; j++)
2203 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2206 if (j < n_clobbers || op_alt[i].matches >= 0)
2208 /* recog_data.operand[i] might not be at the top of stack.
2209 But that's OK, because all we need to do is pop the
2210 right number of regs off of the top of the reg-stack.
2211 record_asm_stack_regs guaranteed that all implicitly
2212 popped regs were grouped at the top of the reg-stack. */
2214 CLEAR_HARD_REG_BIT (regstack->reg_set,
2215 regstack->reg[regstack->top]);
2220 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2221 Note that there isn't any need to substitute register numbers.
2222 ??? Explain why this is true. */
2224 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2226 /* See if there is an output for this hard reg. */
2229 for (j = 0; j < n_outputs; j++)
2230 if (STACK_REG_P (recog_data.operand[j])
2231 && REGNO (recog_data.operand[j]) == (unsigned) i)
2233 regstack->reg[++regstack->top] = i;
2234 SET_HARD_REG_BIT (regstack->reg_set, i);
2239 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2240 input that the asm didn't implicitly pop. If the asm didn't
2241 implicitly pop an input reg, that reg will still be live.
2243 Note that we can't use find_regno_note here: the register numbers
2244 in the death notes have already been substituted. */
2246 for (i = 0; i < n_outputs; i++)
2247 if (STACK_REG_P (recog_data.operand[i]))
2251 for (j = 0; j < n_notes; j++)
2252 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2253 && note_kind[j] == REG_UNUSED)
2255 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2261 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2262 if (STACK_REG_P (recog_data.operand[i]))
2266 for (j = 0; j < n_notes; j++)
2267 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2268 && note_kind[j] == REG_DEAD
2269 && TEST_HARD_REG_BIT (regstack->reg_set,
2270 REGNO (recog_data.operand[i])))
2272 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2279 /* Substitute stack hard reg numbers for stack virtual registers in
2280 INSN. Non-stack register numbers are not changed. REGSTACK is the
2281 current stack content. Insns may be emitted as needed to arrange the
2282 stack for the 387 based on the contents of the insn. Return whether
2283 a control flow insn was deleted in the process. */
2286 subst_stack_regs (rtx_insn *insn, stack_ptr regstack)
2288 rtx *note_link, note;
2289 bool control_flow_insn_deleted = false;
2294 int top = regstack->top;
2296 /* If there are any floating point parameters to be passed in
2297 registers for this call, make sure they are in the right
2302 straighten_stack (insn, regstack);
2304 /* Now mark the arguments as dead after the call. */
2306 while (regstack->top >= 0)
2308 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2314 /* Do the actual substitution if any stack regs are mentioned.
2315 Since we only record whether entire insn mentions stack regs, and
2316 subst_stack_regs_pat only works for patterns that contain stack regs,
2317 we must check each pattern in a parallel here. A call_value_pop could
2320 if (stack_regs_mentioned (insn))
2322 int n_operands = asm_noperands (PATTERN (insn));
2323 if (n_operands >= 0)
2325 /* This insn is an `asm' with operands. Decode the operands,
2326 decide how many are inputs, and do register substitution.
2327 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2329 subst_asm_stack_regs (insn, regstack);
2330 return control_flow_insn_deleted;
2333 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2334 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2336 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2338 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2339 XVECEXP (PATTERN (insn), 0, i)
2340 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2341 control_flow_insn_deleted
2342 |= subst_stack_regs_pat (insn, regstack,
2343 XVECEXP (PATTERN (insn), 0, i));
2347 control_flow_insn_deleted
2348 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2351 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2352 REG_UNUSED will already have been dealt with, so just return. */
2354 if (NOTE_P (insn) || insn->deleted ())
2355 return control_flow_insn_deleted;
2357 /* If this a noreturn call, we can't insert pop insns after it.
2358 Instead, reset the stack state to empty. */
2360 && find_reg_note (insn, REG_NORETURN, NULL))
2363 CLEAR_HARD_REG_SET (regstack->reg_set);
2364 return control_flow_insn_deleted;
2367 /* If there is a REG_UNUSED note on a stack register on this insn,
2368 the indicated reg must be popped. The REG_UNUSED note is removed,
2369 since the form of the newly emitted pop insn references the reg,
2370 making it no longer `unset'. */
2372 note_link = ®_NOTES (insn);
2373 for (note = *note_link; note; note = XEXP (note, 1))
2374 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2376 *note_link = XEXP (note, 1);
2377 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2380 note_link = &XEXP (note, 1);
2382 return control_flow_insn_deleted;
2385 /* Change the organization of the stack so that it fits a new basic
2386 block. Some registers might have to be popped, but there can never be
2387 a register live in the new block that is not now live.
2389 Insert any needed insns before or after INSN, as indicated by
2390 WHERE. OLD is the original stack layout, and NEW is the desired
2391 form. OLD is updated to reflect the code emitted, i.e., it will be
2392 the same as NEW upon return.
2394 This function will not preserve block_end[]. But that information
2395 is no longer needed once this has executed. */
2398 change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack,
2399 enum emit_where where)
2405 /* Stack adjustments for the first insn in a block update the
2406 current_block's stack_in instead of inserting insns directly.
2407 compensate_edges will add the necessary code later. */
2410 && where == EMIT_BEFORE)
2412 BLOCK_INFO (current_block)->stack_in = *new_stack;
2413 starting_stack_p = false;
2418 /* We will be inserting new insns "backwards". If we are to insert
2419 after INSN, find the next insn, and insert before it. */
2421 if (where == EMIT_AFTER)
2423 if (current_block && BB_END (current_block) == insn)
2425 insn = NEXT_INSN (insn);
2428 /* Initialize partially dead variables. */
2429 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
2430 if (TEST_HARD_REG_BIT (new_stack->reg_set, i)
2431 && !TEST_HARD_REG_BIT (old->reg_set, i))
2433 old->reg[++old->top] = i;
2434 SET_HARD_REG_BIT (old->reg_set, i);
2435 emit_insn_before (gen_rtx_SET (VOIDmode,
2436 FP_MODE_REG (i, SFmode), not_a_num), insn);
2439 /* Pop any registers that are not needed in the new block. */
2441 /* If the destination block's stack already has a specified layout
2442 and contains two or more registers, use a more intelligent algorithm
2443 to pop registers that minimizes the number number of fxchs below. */
2444 if (new_stack->top > 0)
2446 bool slots[REG_STACK_SIZE];
2447 int pops[REG_STACK_SIZE];
2448 int next, dest, topsrc;
2450 /* First pass to determine the free slots. */
2451 for (reg = 0; reg <= new_stack->top; reg++)
2452 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]);
2454 /* Second pass to allocate preferred slots. */
2456 for (reg = old->top; reg > new_stack->top; reg--)
2457 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2460 for (next = 0; next <= new_stack->top; next++)
2461 if (!slots[next] && new_stack->reg[next] == old->reg[reg])
2463 /* If this is a preference for the new top of stack, record
2464 the fact by remembering it's old->reg in topsrc. */
2465 if (next == new_stack->top)
2476 /* Intentionally, avoid placing the top of stack in it's correct
2477 location, if we still need to permute the stack below and we
2478 can usefully place it somewhere else. This is the case if any
2479 slot is still unallocated, in which case we should place the
2480 top of stack there. */
2482 for (reg = 0; reg < new_stack->top; reg++)
2486 slots[new_stack->top] = false;
2491 /* Third pass allocates remaining slots and emits pop insns. */
2492 next = new_stack->top;
2493 for (reg = old->top; reg > new_stack->top; reg--)
2498 /* Find next free slot. */
2503 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2509 /* The following loop attempts to maximize the number of times we
2510 pop the top of the stack, as this permits the use of the faster
2511 ffreep instruction on platforms that support it. */
2515 for (reg = 0; reg <= old->top; reg++)
2516 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2520 while (old->top >= live)
2521 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top]))
2523 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next]))
2525 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2529 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2533 if (new_stack->top == -2)
2535 /* If the new block has never been processed, then it can inherit
2536 the old stack order. */
2538 new_stack->top = old->top;
2539 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg));
2543 /* This block has been entered before, and we must match the
2544 previously selected stack order. */
2546 /* By now, the only difference should be the order of the stack,
2547 not their depth or liveliness. */
2549 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set));
2550 gcc_assert (old->top == new_stack->top);
2552 /* If the stack is not empty (new_stack->top != -1), loop here emitting
2553 swaps until the stack is correct.
2555 The worst case number of swaps emitted is N + 2, where N is the
2556 depth of the stack. In some cases, the reg at the top of
2557 stack may be correct, but swapped anyway in order to fix
2558 other regs. But since we never swap any other reg away from
2559 its correct slot, this algorithm will converge. */
2561 if (new_stack->top != -1)
2564 /* Swap the reg at top of stack into the position it is
2565 supposed to be in, until the correct top of stack appears. */
2567 while (old->reg[old->top] != new_stack->reg[new_stack->top])
2569 for (reg = new_stack->top; reg >= 0; reg--)
2570 if (new_stack->reg[reg] == old->reg[old->top])
2573 gcc_assert (reg != -1);
2575 emit_swap_insn (insn, old,
2576 FP_MODE_REG (old->reg[reg], DFmode));
2579 /* See if any regs remain incorrect. If so, bring an
2580 incorrect reg to the top of stack, and let the while loop
2583 for (reg = new_stack->top; reg >= 0; reg--)
2584 if (new_stack->reg[reg] != old->reg[reg])
2586 emit_swap_insn (insn, old,
2587 FP_MODE_REG (old->reg[reg], DFmode));
2592 /* At this point there must be no differences. */
2594 for (reg = old->top; reg >= 0; reg--)
2595 gcc_assert (old->reg[reg] == new_stack->reg[reg]);
2599 BB_END (current_block) = PREV_INSN (insn);
2602 /* Print stack configuration. */
2605 print_stack (FILE *file, stack_ptr s)
2611 fprintf (file, "uninitialized\n");
2612 else if (s->top == -1)
2613 fprintf (file, "empty\n");
2618 for (i = 0; i <= s->top; ++i)
2619 fprintf (file, "%d ", s->reg[i]);
2620 fputs ("]\n", file);
2624 /* This function was doing life analysis. We now let the regular live
2625 code do it's job, so we only need to check some extra invariants
2626 that reg-stack expects. Primary among these being that all registers
2627 are initialized before use.
2629 The function returns true when code was emitted to CFG edges and
2630 commit_edge_insertions needs to be called. */
2633 convert_regs_entry (void)
2639 /* Load something into each stack register live at function entry.
2640 Such live registers can be caused by uninitialized variables or
2641 functions not returning values on all paths. In order to keep
2642 the push/pop code happy, and to not scrog the register stack, we
2643 must put something in these registers. Use a QNaN.
2645 Note that we are inserting converted code here. This code is
2646 never seen by the convert_regs pass. */
2648 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
2650 basic_block block = e->dest;
2651 block_info bi = BLOCK_INFO (block);
2654 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2655 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2659 bi->stack_in.reg[++top] = reg;
2661 init = gen_rtx_SET (VOIDmode,
2662 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2664 insert_insn_on_edge (init, e);
2668 bi->stack_in.top = top;
2674 /* Construct the desired stack for function exit. This will either
2675 be `empty', or the function return value at top-of-stack. */
2678 convert_regs_exit (void)
2680 int value_reg_low, value_reg_high;
2681 stack_ptr output_stack;
2684 retvalue = stack_result (current_function_decl);
2685 value_reg_low = value_reg_high = -1;
2688 value_reg_low = REGNO (retvalue);
2689 value_reg_high = END_HARD_REGNO (retvalue) - 1;
2692 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in;
2693 if (value_reg_low == -1)
2694 output_stack->top = -1;
2699 output_stack->top = value_reg_high - value_reg_low;
2700 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2702 output_stack->reg[value_reg_high - reg] = reg;
2703 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2708 /* Copy the stack info from the end of edge E's source block to the
2709 start of E's destination block. */
2712 propagate_stack (edge e)
2714 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out;
2715 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2718 /* Preserve the order of the original stack, but check whether
2719 any pops are needed. */
2720 dest_stack->top = -1;
2721 for (reg = 0; reg <= src_stack->top; ++reg)
2722 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2723 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2725 /* Push in any partially dead values. */
2726 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++)
2727 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg)
2728 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg))
2729 dest_stack->reg[++dest_stack->top] = reg;
2733 /* Adjust the stack of edge E's source block on exit to match the stack
2734 of it's target block upon input. The stack layouts of both blocks
2735 should have been defined by now. */
2738 compensate_edge (edge e)
2740 basic_block source = e->src, target = e->dest;
2741 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in;
2742 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out;
2743 struct stack_def regstack;
2747 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2749 gcc_assert (target_stack->top != -2);
2751 /* Check whether stacks are identical. */
2752 if (target_stack->top == source_stack->top)
2754 for (reg = target_stack->top; reg >= 0; --reg)
2755 if (target_stack->reg[reg] != source_stack->reg[reg])
2761 fprintf (dump_file, "no changes needed\n");
2768 fprintf (dump_file, "correcting stack to ");
2769 print_stack (dump_file, target_stack);
2772 /* Abnormal calls may appear to have values live in st(0), but the
2773 abnormal return path will not have actually loaded the values. */
2774 if (e->flags & EDGE_ABNORMAL_CALL)
2776 /* Assert that the lifetimes are as we expect -- one value
2777 live at st(0) on the end of the source block, and no
2778 values live at the beginning of the destination block.
2779 For complex return values, we may have st(1) live as well. */
2780 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2781 gcc_assert (target_stack->top == -1);
2785 /* Handle non-call EH edges specially. The normal return path have
2786 values in registers. These will be popped en masse by the unwind
2788 if (e->flags & EDGE_EH)
2790 gcc_assert (target_stack->top == -1);
2794 /* We don't support abnormal edges. Global takes care to
2795 avoid any live register across them, so we should never
2796 have to insert instructions on such edges. */
2797 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2799 /* Make a copy of source_stack as change_stack is destructive. */
2800 regstack = *source_stack;
2802 /* It is better to output directly to the end of the block
2803 instead of to the edge, because emit_swap can do minimal
2804 insn scheduling. We can do this when there is only one
2805 edge out, and it is not abnormal. */
2806 if (EDGE_COUNT (source->succs) == 1)
2808 current_block = source;
2809 change_stack (BB_END (source), ®stack, target_stack,
2810 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2817 current_block = NULL;
2820 /* ??? change_stack needs some point to emit insns after. */
2821 after = emit_note (NOTE_INSN_DELETED);
2823 change_stack (after, ®stack, target_stack, EMIT_BEFORE);
2828 insert_insn_on_edge (seq, e);
2834 /* Traverse all non-entry edges in the CFG, and emit the necessary
2835 edge compensation code to change the stack from stack_out of the
2836 source block to the stack_in of the destination block. */
2839 compensate_edges (void)
2841 bool inserted = false;
2844 starting_stack_p = false;
2846 FOR_EACH_BB_FN (bb, cfun)
2847 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun))
2852 FOR_EACH_EDGE (e, ei, bb->succs)
2853 inserted |= compensate_edge (e);
2858 /* Select the better of two edges E1 and E2 to use to determine the
2859 stack layout for their shared destination basic block. This is
2860 typically the more frequently executed. The edge E1 may be NULL
2861 (in which case E2 is returned), but E2 is always non-NULL. */
2864 better_edge (edge e1, edge e2)
2869 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2871 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2874 if (e1->count > e2->count)
2876 if (e1->count < e2->count)
2879 /* Prefer critical edges to minimize inserting compensation code on
2882 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2883 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2885 /* Avoid non-deterministic behavior. */
2886 return (e1->src->index < e2->src->index) ? e1 : e2;
2889 /* Convert stack register references in one block. Return true if the CFG
2890 has been modified in the process. */
2893 convert_regs_1 (basic_block block)
2895 struct stack_def regstack;
2896 block_info bi = BLOCK_INFO (block);
2898 rtx_insn *insn, *next;
2899 bool control_flow_insn_deleted = false;
2900 bool cfg_altered = false;
2901 int debug_insns_with_starting_stack = 0;
2903 any_malformed_asm = false;
2905 /* Choose an initial stack layout, if one hasn't already been chosen. */
2906 if (bi->stack_in.top == -2)
2908 edge e, beste = NULL;
2911 /* Select the best incoming edge (typically the most frequent) to
2912 use as a template for this basic block. */
2913 FOR_EACH_EDGE (e, ei, block->preds)
2914 if (BLOCK_INFO (e->src)->done)
2915 beste = better_edge (beste, e);
2918 propagate_stack (beste);
2921 /* No predecessors. Create an arbitrary input stack. */
2922 bi->stack_in.top = -1;
2923 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2924 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2925 bi->stack_in.reg[++bi->stack_in.top] = reg;
2931 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2932 print_stack (dump_file, &bi->stack_in);
2935 /* Process all insns in this block. Keep track of NEXT so that we
2936 don't process insns emitted while substituting in INSN. */
2937 current_block = block;
2938 next = BB_HEAD (block);
2939 regstack = bi->stack_in;
2940 starting_stack_p = true;
2945 next = NEXT_INSN (insn);
2947 /* Ensure we have not missed a block boundary. */
2949 if (insn == BB_END (block))
2952 /* Don't bother processing unless there is a stack reg
2953 mentioned or if it's a CALL_INSN. */
2954 if (DEBUG_INSN_P (insn))
2956 if (starting_stack_p)
2957 debug_insns_with_starting_stack++;
2960 subst_all_stack_regs_in_debug_insn (insn, ®stack);
2962 /* Nothing must ever die at a debug insn. If something
2963 is referenced in it that becomes dead, it should have
2964 died before and the reference in the debug insn
2965 should have been removed so as to avoid changing code
2967 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL));
2970 else if (stack_regs_mentioned (insn)
2975 fprintf (dump_file, " insn %d input stack: ",
2977 print_stack (dump_file, ®stack);
2979 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
2980 starting_stack_p = false;
2985 if (debug_insns_with_starting_stack)
2987 /* Since it's the first non-debug instruction that determines
2988 the stack requirements of the current basic block, we refrain
2989 from updating debug insns before it in the loop above, and
2990 fix them up here. */
2991 for (insn = BB_HEAD (block); debug_insns_with_starting_stack;
2992 insn = NEXT_INSN (insn))
2994 if (!DEBUG_INSN_P (insn))
2997 debug_insns_with_starting_stack--;
2998 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in);
3004 fprintf (dump_file, "Expected live registers [");
3005 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3006 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
3007 fprintf (dump_file, " %d", reg);
3008 fprintf (dump_file, " ]\nOutput stack: ");
3009 print_stack (dump_file, ®stack);
3012 insn = BB_END (block);
3014 insn = PREV_INSN (insn);
3016 /* If the function is declared to return a value, but it returns one
3017 in only some cases, some registers might come live here. Emit
3018 necessary moves for them. */
3020 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3022 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
3023 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
3028 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
3030 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
3031 insn = emit_insn_after (set, insn);
3032 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
3036 /* Amongst the insns possibly deleted during the substitution process above,
3037 might have been the only trapping insn in the block. We purge the now
3038 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
3039 called at the end of convert_regs. The order in which we process the
3040 blocks ensures that we never delete an already processed edge.
3042 Note that, at this point, the CFG may have been damaged by the emission
3043 of instructions after an abnormal call, which moves the basic block end
3044 (and is the reason why we call fixup_abnormal_edges later). So we must
3045 be sure that the trapping insn has been deleted before trying to purge
3046 dead edges, otherwise we risk purging valid edges.
3048 ??? We are normally supposed not to delete trapping insns, so we pretend
3049 that the insns deleted above don't actually trap. It would have been
3050 better to detect this earlier and avoid creating the EH edge in the first
3051 place, still, but we don't have enough information at that time. */
3053 if (control_flow_insn_deleted)
3054 cfg_altered |= purge_dead_edges (block);
3056 /* Something failed if the stack lives don't match. If we had malformed
3057 asms, we zapped the instruction itself, but that didn't produce the
3058 same pattern of register kills as before. */
3060 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set)
3061 || any_malformed_asm);
3062 bi->stack_out = regstack;
3068 /* Convert registers in all blocks reachable from BLOCK. Return true if the
3069 CFG has been modified in the process. */
3072 convert_regs_2 (basic_block block)
3074 basic_block *stack, *sp;
3075 bool cfg_altered = false;
3077 /* We process the blocks in a top-down manner, in a way such that one block
3078 is only processed after all its predecessors. The number of predecessors
3079 of every block has already been computed. */
3081 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun));
3093 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3094 some dead EH outgoing edge after the deletion of the trapping
3095 insn inside the block. Since the number of predecessors of
3096 BLOCK's successors was computed based on the initial edge set,
3097 we check the necessity to process some of these successors
3098 before such an edge deletion may happen. However, there is
3099 a pitfall: if BLOCK is the only predecessor of a successor and
3100 the edge between them happens to be deleted, the successor
3101 becomes unreachable and should not be processed. The problem
3102 is that there is no way to preventively detect this case so we
3103 stack the successor in all cases and hand over the task of
3104 fixing up the discrepancy to convert_regs_1. */
3106 FOR_EACH_EDGE (e, ei, block->succs)
3107 if (! (e->flags & EDGE_DFS_BACK))
3109 BLOCK_INFO (e->dest)->predecessors--;
3110 if (!BLOCK_INFO (e->dest)->predecessors)
3114 cfg_altered |= convert_regs_1 (block);
3116 while (sp != stack);
3123 /* Traverse all basic blocks in a function, converting the register
3124 references in each insn from the "flat" register file that gcc uses,
3125 to the stack-like registers the 387 uses. */
3130 bool cfg_altered = false;
3136 /* Initialize uninitialized registers on function entry. */
3137 inserted = convert_regs_entry ();
3139 /* Construct the desired stack for function exit. */
3140 convert_regs_exit ();
3141 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1;
3143 /* ??? Future: process inner loops first, and give them arbitrary
3144 initial stacks which emit_swap_insn can modify. This ought to
3145 prevent double fxch that often appears at the head of a loop. */
3147 /* Process all blocks reachable from all entry points. */
3148 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
3149 cfg_altered |= convert_regs_2 (e->dest);
3151 /* ??? Process all unreachable blocks. Though there's no excuse
3152 for keeping these even when not optimizing. */
3153 FOR_EACH_BB_FN (b, cfun)
3155 block_info bi = BLOCK_INFO (b);
3158 cfg_altered |= convert_regs_2 (b);
3161 /* We must fix up abnormal edges before inserting compensation code
3162 because both mechanisms insert insns on edges. */
3163 inserted |= fixup_abnormal_edges ();
3165 inserted |= compensate_edges ();
3167 clear_aux_for_blocks ();
3170 commit_edge_insertions ();
3176 fputc ('\n', dump_file);
3179 /* Convert register usage from "flat" register file usage to a "stack
3180 register file. FILE is the dump file, if used.
3182 Construct a CFG and run life analysis. Then convert each insn one
3183 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3184 code duplication created when the converter inserts pop insns on
3194 /* Clean up previous run. */
3195 stack_regs_mentioned_data.release ();
3197 /* See if there is something to do. Flow analysis is quite
3198 expensive so we might save some compilation time. */
3199 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3200 if (df_regs_ever_live_p (i))
3202 if (i > LAST_STACK_REG)
3205 df_note_add_problem ();
3208 mark_dfs_back_edges ();
3210 /* Set up block info for each basic block. */
3211 alloc_aux_for_blocks (sizeof (struct block_info_def));
3212 FOR_EACH_BB_FN (bb, cfun)
3214 block_info bi = BLOCK_INFO (bb);
3219 FOR_EACH_EDGE (e, ei, bb->preds)
3220 if (!(e->flags & EDGE_DFS_BACK)
3221 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun))
3224 /* Set current register status at last instruction `uninitialized'. */
3225 bi->stack_in.top = -2;
3227 /* Copy live_at_end and live_at_start into temporaries. */
3228 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3230 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg))
3231 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3232 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg))
3233 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3237 /* Create the replacement registers up front. */
3238 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3240 enum machine_mode mode;
3241 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3243 mode = GET_MODE_WIDER_MODE (mode))
3244 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3245 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3247 mode = GET_MODE_WIDER_MODE (mode))
3248 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3251 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3253 /* A QNaN for initializing uninitialized variables.
3255 ??? We can't load from constant memory in PIC mode, because
3256 we're inserting these instructions before the prologue and
3257 the PIC register hasn't been set up. In that case, fall back
3258 on zero, which we can get from `fldz'. */
3260 if ((flag_pic && !TARGET_64BIT)
3261 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3262 not_a_num = CONST0_RTX (SFmode);
3267 real_nan (&r, "", 1, SFmode);
3268 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode);
3269 not_a_num = force_const_mem (SFmode, not_a_num);
3272 /* Allocate a cache for stack_regs_mentioned. */
3273 max_uid = get_max_uid ();
3274 stack_regs_mentioned_data.create (max_uid + 1);
3275 memset (stack_regs_mentioned_data.address (),
3276 0, sizeof (char) * (max_uid + 1));
3280 free_aux_for_blocks ();
3283 #endif /* STACK_REGS */
3287 const pass_data pass_data_stack_regs =
3289 RTL_PASS, /* type */
3290 "*stack_regs", /* name */
3291 OPTGROUP_NONE, /* optinfo_flags */
3292 TV_REG_STACK, /* tv_id */
3293 0, /* properties_required */
3294 0, /* properties_provided */
3295 0, /* properties_destroyed */
3296 0, /* todo_flags_start */
3297 0, /* todo_flags_finish */
3300 class pass_stack_regs : public rtl_opt_pass
3303 pass_stack_regs (gcc::context *ctxt)
3304 : rtl_opt_pass (pass_data_stack_regs, ctxt)
3307 /* opt_pass methods: */
3308 virtual bool gate (function *)
3317 }; // class pass_stack_regs
3322 make_pass_stack_regs (gcc::context *ctxt)
3324 return new pass_stack_regs (ctxt);
3327 /* Convert register usage from flat register file usage to a stack
3330 rest_of_handle_stack_regs (void)
3334 regstack_completed = 1;
3341 const pass_data pass_data_stack_regs_run =
3343 RTL_PASS, /* type */
3345 OPTGROUP_NONE, /* optinfo_flags */
3346 TV_REG_STACK, /* tv_id */
3347 0, /* properties_required */
3348 0, /* properties_provided */
3349 0, /* properties_destroyed */
3350 0, /* todo_flags_start */
3351 TODO_df_finish, /* todo_flags_finish */
3354 class pass_stack_regs_run : public rtl_opt_pass
3357 pass_stack_regs_run (gcc::context *ctxt)
3358 : rtl_opt_pass (pass_data_stack_regs_run, ctxt)
3361 /* opt_pass methods: */
3362 virtual unsigned int execute (function *)
3364 return rest_of_handle_stack_regs ();
3367 }; // class pass_stack_regs_run
3372 make_pass_stack_regs_run (gcc::context *ctxt)
3374 return new pass_stack_regs_run (ctxt);