1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
78 There are several rules on the usage of stack-like regs in
79 asm_operands insns. These rules apply only to the operands that are
82 1. Given a set of input regs that die in an asm_operands, it is
83 necessary to know which are implicitly popped by the asm, and
84 which must be explicitly popped by gcc.
86 An input reg that is implicitly popped by the asm must be
87 explicitly clobbered, unless it is constrained to match an
90 2. For any input reg that is implicitly popped by an asm, it is
91 necessary to know how to adjust the stack to compensate for the pop.
92 If any non-popped input is closer to the top of the reg-stack than
93 the implicitly popped reg, it would not be possible to know what the
94 stack looked like - it's not clear how the rest of the stack "slides
97 All implicitly popped input regs must be closer to the top of
98 the reg-stack than any input that is not implicitly popped.
100 3. It is possible that if an input dies in an insn, reload might
101 use the input reg for an output reload. Consider this example:
103 asm ("foo" : "=t" (a) : "f" (b));
105 This asm says that input B is not popped by the asm, and that
106 the asm pushes a result onto the reg-stack, i.e., the stack is one
107 deeper after the asm than it was before. But, it is possible that
108 reload will think that it can use the same reg for both the input and
109 the output, if input B dies in this insn.
111 If any input operand uses the "f" constraint, all output reg
112 constraints must use the "&" earlyclobber.
114 The asm above would be written as
116 asm ("foo" : "=&t" (a) : "f" (b));
118 4. Some operands need to be in particular places on the stack. All
119 output operands fall in this category - there is no other way to
120 know which regs the outputs appear in unless the user indicates
121 this in the constraints.
123 Output operands must specifically indicate which reg an output
124 appears in after an asm. "=f" is not allowed: the operand
125 constraints must select a class with a single reg.
127 5. Output operands may not be "inserted" between existing stack regs.
128 Since no 387 opcode uses a read/write operand, all output operands
129 are dead before the asm_operands, and are pushed by the asm_operands.
130 It makes no sense to push anywhere but the top of the reg-stack.
132 Output operands must start at the top of the reg-stack: output
133 operands may not "skip" a reg.
135 6. Some asm statements may need extra stack space for internal
136 calculations. This can be guaranteed by clobbering stack registers
137 unrelated to the inputs and outputs.
139 Here are a couple of reasonable asms to want to write. This asm
140 takes one input, which is internally popped, and produces two outputs.
142 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
144 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
145 and replaces them with one output. The user must code the "st(1)"
146 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
148 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
154 #include "coretypes.h"
158 #include "rtl-error.h"
160 #include "function.h"
161 #include "insn-config.h"
163 #include "hard-reg-set.h"
166 #include "basic-block.h"
169 #include "tree-pass.h"
172 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
176 /* We use this array to cache info about insns, because otherwise we
177 spend too much time in stack_regs_mentioned_p.
179 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
180 the insn uses stack registers, two indicates the insn does not use
182 static vec<char> stack_regs_mentioned_data;
184 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
186 int regstack_completed = 0;
188 /* This is the basic stack record. TOP is an index into REG[] such
189 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
191 If TOP is -2, REG[] is not yet initialized. Stack initialization
192 consists of placing each live reg in array `reg' and setting `top'
195 REG_SET indicates which registers are live. */
197 typedef struct stack_def
199 int top; /* index to top stack element */
200 HARD_REG_SET reg_set; /* set of live registers */
201 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
204 /* This is used to carry information about basic blocks. It is
205 attached to the AUX field of the standard CFG block. */
207 typedef struct block_info_def
209 struct stack_def stack_in; /* Input stack configuration. */
210 struct stack_def stack_out; /* Output stack configuration. */
211 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
212 int done; /* True if block already converted. */
213 int predecessors; /* Number of predecessors that need
217 #define BLOCK_INFO(B) ((block_info) (B)->aux)
219 /* Passed to change_stack to indicate where to emit insns. */
226 /* The block we're currently working on. */
227 static basic_block current_block;
229 /* In the current_block, whether we're processing the first register
230 stack or call instruction, i.e. the regstack is currently the
231 same as BLOCK_INFO(current_block)->stack_in. */
232 static bool starting_stack_p;
234 /* This is the register file for all register after conversion. */
236 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
238 #define FP_MODE_REG(regno,mode) \
239 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
241 /* Used to initialize uninitialized registers. */
242 static rtx not_a_num;
244 /* Forward declarations */
246 static int stack_regs_mentioned_p (const_rtx pat);
247 static void pop_stack (stack_ptr, int);
248 static rtx *get_true_reg (rtx *);
250 static int check_asm_stack_operands (rtx);
251 static void get_asm_operands_in_out (rtx, int *, int *);
252 static rtx stack_result (tree);
253 static void replace_reg (rtx *, int);
254 static void remove_regno_note (rtx, enum reg_note, unsigned int);
255 static int get_hard_regnum (stack_ptr, rtx);
256 static rtx emit_pop_insn (rtx, stack_ptr, rtx, enum emit_where);
257 static void swap_to_top (rtx, stack_ptr, rtx, rtx);
258 static bool move_for_stack_reg (rtx, stack_ptr, rtx);
259 static bool move_nan_for_stack_reg (rtx, stack_ptr, rtx);
260 static int swap_rtx_condition_1 (rtx);
261 static int swap_rtx_condition (rtx);
262 static void compare_for_stack_reg (rtx, stack_ptr, rtx);
263 static bool subst_stack_regs_pat (rtx, stack_ptr, rtx);
264 static void subst_asm_stack_regs (rtx, stack_ptr);
265 static bool subst_stack_regs (rtx, stack_ptr);
266 static void change_stack (rtx, stack_ptr, stack_ptr, enum emit_where);
267 static void print_stack (FILE *, stack_ptr);
268 static rtx next_flags_user (rtx);
270 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
273 stack_regs_mentioned_p (const_rtx pat)
278 if (STACK_REG_P (pat))
281 fmt = GET_RTX_FORMAT (GET_CODE (pat));
282 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
288 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
289 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
292 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
299 /* Return nonzero if INSN mentions stacked registers, else return zero. */
302 stack_regs_mentioned (const_rtx insn)
304 unsigned int uid, max;
307 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ())
310 uid = INSN_UID (insn);
311 max = stack_regs_mentioned_data.length ();
314 /* Allocate some extra size to avoid too many reallocs, but
315 do not grow too quickly. */
316 max = uid + uid / 20 + 1;
317 stack_regs_mentioned_data.safe_grow_cleared (max);
320 test = stack_regs_mentioned_data[uid];
323 /* This insn has yet to be examined. Do so now. */
324 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
325 stack_regs_mentioned_data[uid] = test;
331 static rtx ix86_flags_rtx;
334 next_flags_user (rtx insn)
336 /* Search forward looking for the first use of this value.
337 Stop at block boundaries. */
339 while (insn != BB_END (current_block))
341 insn = NEXT_INSN (insn);
343 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
352 /* Reorganize the stack into ascending numbers, before this insn. */
355 straighten_stack (rtx insn, stack_ptr regstack)
357 struct stack_def temp_stack;
360 /* If there is only a single register on the stack, then the stack is
361 already in increasing order and no reorganization is needed.
363 Similarly if the stack is empty. */
364 if (regstack->top <= 0)
367 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
369 for (top = temp_stack.top = regstack->top; top >= 0; top--)
370 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
372 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
375 /* Pop a register from the stack. */
378 pop_stack (stack_ptr regstack, int regno)
380 int top = regstack->top;
382 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
384 /* If regno was not at the top of stack then adjust stack. */
385 if (regstack->reg [top] != regno)
388 for (i = regstack->top; i >= 0; i--)
389 if (regstack->reg [i] == regno)
392 for (j = i; j < top; j++)
393 regstack->reg [j] = regstack->reg [j + 1];
399 /* Return a pointer to the REG expression within PAT. If PAT is not a
400 REG, possible enclosed by a conversion rtx, return the inner part of
401 PAT that stopped the search. */
404 get_true_reg (rtx *pat)
407 switch (GET_CODE (*pat))
410 /* Eliminate FP subregister accesses in favor of the
411 actual FP register in use. */
414 if (STACK_REG_P (subreg = SUBREG_REG (*pat)))
416 int regno_off = subreg_regno_offset (REGNO (subreg),
420 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
428 pat = & XEXP (*pat, 0);
432 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP
433 || XINT (*pat, 1) == UNSPEC_LDA)
434 pat = & XVECEXP (*pat, 0, 0);
438 if (!flag_unsafe_math_optimizations)
440 pat = & XEXP (*pat, 0);
448 /* Set if we find any malformed asms in a block. */
449 static bool any_malformed_asm;
451 /* There are many rules that an asm statement for stack-like regs must
452 follow. Those rules are explained at the top of this file: the rule
453 numbers below refer to that explanation. */
456 check_asm_stack_operands (rtx insn)
460 int malformed_asm = 0;
461 rtx body = PATTERN (insn);
463 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
464 char implicitly_dies[FIRST_PSEUDO_REGISTER];
467 rtx *clobber_reg = 0;
468 int n_inputs, n_outputs;
470 /* Find out what the constraints require. If no constraint
471 alternative matches, this asm is malformed. */
473 constrain_operands (1);
474 alt = which_alternative;
476 preprocess_constraints ();
478 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
483 /* Avoid further trouble with this insn. */
484 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
488 /* Strip SUBREGs here to make the following code simpler. */
489 for (i = 0; i < recog_data.n_operands; i++)
490 if (GET_CODE (recog_data.operand[i]) == SUBREG
491 && REG_P (SUBREG_REG (recog_data.operand[i])))
492 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
494 /* Set up CLOBBER_REG. */
498 if (GET_CODE (body) == PARALLEL)
500 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
502 for (i = 0; i < XVECLEN (body, 0); i++)
503 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
505 rtx clobber = XVECEXP (body, 0, i);
506 rtx reg = XEXP (clobber, 0);
508 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
509 reg = SUBREG_REG (reg);
511 if (STACK_REG_P (reg))
513 clobber_reg[n_clobbers] = reg;
519 /* Enforce rule #4: Output operands must specifically indicate which
520 reg an output appears in after an asm. "=f" is not allowed: the
521 operand constraints must select a class with a single reg.
523 Also enforce rule #5: Output operands must start at the top of
524 the reg-stack: output operands may not "skip" a reg. */
526 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
527 for (i = 0; i < n_outputs; i++)
528 if (STACK_REG_P (recog_data.operand[i]))
530 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
532 error_for_asm (insn, "output constraint %d must specify a single register", i);
539 for (j = 0; j < n_clobbers; j++)
540 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
542 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
543 i, reg_names [REGNO (clobber_reg[j])]);
548 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
553 /* Search for first non-popped reg. */
554 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
555 if (! reg_used_as_output[i])
558 /* If there are any other popped regs, that's an error. */
559 for (; i < LAST_STACK_REG + 1; i++)
560 if (reg_used_as_output[i])
563 if (i != LAST_STACK_REG + 1)
565 error_for_asm (insn, "output regs must be grouped at top of stack");
569 /* Enforce rule #2: All implicitly popped input regs must be closer
570 to the top of the reg-stack than any input that is not implicitly
573 memset (implicitly_dies, 0, sizeof (implicitly_dies));
574 for (i = n_outputs; i < n_outputs + n_inputs; i++)
575 if (STACK_REG_P (recog_data.operand[i]))
577 /* An input reg is implicitly popped if it is tied to an
578 output, or if there is a CLOBBER for it. */
581 for (j = 0; j < n_clobbers; j++)
582 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
585 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
586 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
589 /* Search for first non-popped reg. */
590 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
591 if (! implicitly_dies[i])
594 /* If there are any other popped regs, that's an error. */
595 for (; i < LAST_STACK_REG + 1; i++)
596 if (implicitly_dies[i])
599 if (i != LAST_STACK_REG + 1)
602 "implicitly popped regs must be grouped at top of stack");
606 /* Enforce rule #3: If any input operand uses the "f" constraint, all
607 output constraints must use the "&" earlyclobber.
609 ??? Detect this more deterministically by having constrain_asm_operands
610 record any earlyclobber. */
612 for (i = n_outputs; i < n_outputs + n_inputs; i++)
613 if (recog_op_alt[i][alt].matches == -1)
617 for (j = 0; j < n_outputs; j++)
618 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
621 "output operand %d must use %<&%> constraint", j);
628 /* Avoid further trouble with this insn. */
629 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
630 any_malformed_asm = true;
637 /* Calculate the number of inputs and outputs in BODY, an
638 asm_operands. N_OPERANDS is the total number of operands, and
639 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
643 get_asm_operands_in_out (rtx body, int *pout, int *pin)
645 rtx asmop = extract_asm_operands (body);
647 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop);
648 *pout = (recog_data.n_operands
649 - ASM_OPERANDS_INPUT_LENGTH (asmop)
650 - ASM_OPERANDS_LABEL_LENGTH (asmop));
653 /* If current function returns its result in an fp stack register,
654 return the REG. Otherwise, return 0. */
657 stack_result (tree decl)
661 /* If the value is supposed to be returned in memory, then clearly
662 it is not returned in a stack register. */
663 if (aggregate_value_p (DECL_RESULT (decl), decl))
666 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
668 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
671 return result != 0 && STACK_REG_P (result) ? result : 0;
676 * This section deals with stack register substitution, and forms the second
680 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
681 the desired hard REGNO. */
684 replace_reg (rtx *reg, int regno)
686 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG));
687 gcc_assert (STACK_REG_P (*reg));
689 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
690 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
692 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
695 /* Remove a note of type NOTE, which must be found, for register
696 number REGNO from INSN. Remove only one such note. */
699 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
701 rtx *note_link, this_rtx;
703 note_link = ®_NOTES (insn);
704 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1))
705 if (REG_NOTE_KIND (this_rtx) == note
706 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno)
708 *note_link = XEXP (this_rtx, 1);
712 note_link = &XEXP (this_rtx, 1);
717 /* Find the hard register number of virtual register REG in REGSTACK.
718 The hard register number is relative to the top of the stack. -1 is
719 returned if the register is not found. */
722 get_hard_regnum (stack_ptr regstack, rtx reg)
726 gcc_assert (STACK_REG_P (reg));
728 for (i = regstack->top; i >= 0; i--)
729 if (regstack->reg[i] == REGNO (reg))
732 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
735 /* Emit an insn to pop virtual register REG before or after INSN.
736 REGSTACK is the stack state after INSN and is updated to reflect this
737 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
738 is represented as a SET whose destination is the register to be popped
739 and source is the top of stack. A death note for the top of stack
740 cases the movdf pattern to pop. */
743 emit_pop_insn (rtx insn, stack_ptr regstack, rtx reg, enum emit_where where)
745 rtx pop_insn, pop_rtx;
748 /* For complex types take care to pop both halves. These may survive in
749 CLOBBER and USE expressions. */
750 if (COMPLEX_MODE_P (GET_MODE (reg)))
752 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
753 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
756 if (get_hard_regnum (regstack, reg1) >= 0)
757 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
758 if (get_hard_regnum (regstack, reg2) >= 0)
759 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
760 gcc_assert (pop_insn);
764 hard_regno = get_hard_regnum (regstack, reg);
766 gcc_assert (hard_regno >= FIRST_STACK_REG);
768 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
769 FP_MODE_REG (FIRST_STACK_REG, DFmode));
771 if (where == EMIT_AFTER)
772 pop_insn = emit_insn_after (pop_rtx, insn);
774 pop_insn = emit_insn_before (pop_rtx, insn);
776 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode));
778 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
779 = regstack->reg[regstack->top];
781 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
786 /* Emit an insn before or after INSN to swap virtual register REG with
787 the top of stack. REGSTACK is the stack state before the swap, and
788 is updated to reflect the swap. A swap insn is represented as a
789 PARALLEL of two patterns: each pattern moves one reg to the other.
791 If REG is already at the top of the stack, no insn is emitted. */
794 emit_swap_insn (rtx insn, stack_ptr regstack, rtx reg)
798 int tmp, other_reg; /* swap regno temps */
799 rtx i1; /* the stack-reg insn prior to INSN */
800 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
802 hard_regno = get_hard_regnum (regstack, reg);
804 if (hard_regno == FIRST_STACK_REG)
806 if (hard_regno == -1)
808 /* Something failed if the register wasn't on the stack. If we had
809 malformed asms, we zapped the instruction itself, but that didn't
810 produce the same pattern of register sets as before. To prevent
811 further failure, adjust REGSTACK to include REG at TOP. */
812 gcc_assert (any_malformed_asm);
813 regstack->reg[++regstack->top] = REGNO (reg);
816 gcc_assert (hard_regno >= FIRST_STACK_REG);
818 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
820 tmp = regstack->reg[other_reg];
821 regstack->reg[other_reg] = regstack->reg[regstack->top];
822 regstack->reg[regstack->top] = tmp;
824 /* Find the previous insn involving stack regs, but don't pass a
827 if (current_block && insn != BB_HEAD (current_block))
829 rtx tmp = PREV_INSN (insn);
830 rtx limit = PREV_INSN (BB_HEAD (current_block));
835 || NOTE_INSN_BASIC_BLOCK_P (tmp)
836 || (NONJUMP_INSN_P (tmp)
837 && stack_regs_mentioned (tmp)))
842 tmp = PREV_INSN (tmp);
847 && (i1set = single_set (i1)) != NULL_RTX)
849 rtx i1src = *get_true_reg (&SET_SRC (i1set));
850 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
852 /* If the previous register stack push was from the reg we are to
853 swap with, omit the swap. */
855 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
857 && REGNO (i1src) == (unsigned) hard_regno - 1
858 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
861 /* If the previous insn wrote to the reg we are to swap with,
864 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
865 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
866 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
870 /* Avoid emitting the swap if this is the first register stack insn
871 of the current_block. Instead update the current_block's stack_in
872 and let compensate edges take care of this for us. */
873 if (current_block && starting_stack_p)
875 BLOCK_INFO (current_block)->stack_in = *regstack;
876 starting_stack_p = false;
880 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
881 FP_MODE_REG (FIRST_STACK_REG, XFmode));
884 emit_insn_after (swap_rtx, i1);
885 else if (current_block)
886 emit_insn_before (swap_rtx, BB_HEAD (current_block));
888 emit_insn_before (swap_rtx, insn);
891 /* Emit an insns before INSN to swap virtual register SRC1 with
892 the top of stack and virtual register SRC2 with second stack
893 slot. REGSTACK is the stack state before the swaps, and
894 is updated to reflect the swaps. A swap insn is represented as a
895 PARALLEL of two patterns: each pattern moves one reg to the other.
897 If SRC1 and/or SRC2 are already at the right place, no swap insn
901 swap_to_top (rtx insn, stack_ptr regstack, rtx src1, rtx src2)
903 struct stack_def temp_stack;
904 int regno, j, k, temp;
906 temp_stack = *regstack;
908 /* Place operand 1 at the top of stack. */
909 regno = get_hard_regnum (&temp_stack, src1);
910 gcc_assert (regno >= 0);
911 if (regno != FIRST_STACK_REG)
913 k = temp_stack.top - (regno - FIRST_STACK_REG);
916 temp = temp_stack.reg[k];
917 temp_stack.reg[k] = temp_stack.reg[j];
918 temp_stack.reg[j] = temp;
921 /* Place operand 2 next on the stack. */
922 regno = get_hard_regnum (&temp_stack, src2);
923 gcc_assert (regno >= 0);
924 if (regno != FIRST_STACK_REG + 1)
926 k = temp_stack.top - (regno - FIRST_STACK_REG);
927 j = temp_stack.top - 1;
929 temp = temp_stack.reg[k];
930 temp_stack.reg[k] = temp_stack.reg[j];
931 temp_stack.reg[j] = temp;
934 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
937 /* Handle a move to or from a stack register in PAT, which is in INSN.
938 REGSTACK is the current stack. Return whether a control flow insn
939 was deleted in the process. */
942 move_for_stack_reg (rtx insn, stack_ptr regstack, rtx pat)
944 rtx *psrc = get_true_reg (&SET_SRC (pat));
945 rtx *pdest = get_true_reg (&SET_DEST (pat));
948 bool control_flow_insn_deleted = false;
950 src = *psrc; dest = *pdest;
952 if (STACK_REG_P (src) && STACK_REG_P (dest))
954 /* Write from one stack reg to another. If SRC dies here, then
955 just change the register mapping and delete the insn. */
957 note = find_regno_note (insn, REG_DEAD, REGNO (src));
962 /* If this is a no-op move, there must not be a REG_DEAD note. */
963 gcc_assert (REGNO (src) != REGNO (dest));
965 for (i = regstack->top; i >= 0; i--)
966 if (regstack->reg[i] == REGNO (src))
969 /* The destination must be dead, or life analysis is borked. */
970 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
972 /* If the source is not live, this is yet another case of
973 uninitialized variables. Load up a NaN instead. */
975 return move_nan_for_stack_reg (insn, regstack, dest);
977 /* It is possible that the dest is unused after this insn.
978 If so, just pop the src. */
980 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
981 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
984 regstack->reg[i] = REGNO (dest);
985 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
986 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
989 control_flow_insn_deleted |= control_flow_insn_p (insn);
991 return control_flow_insn_deleted;
994 /* The source reg does not die. */
996 /* If this appears to be a no-op move, delete it, or else it
997 will confuse the machine description output patterns. But if
998 it is REG_UNUSED, we must pop the reg now, as per-insn processing
999 for REG_UNUSED will not work for deleted insns. */
1001 if (REGNO (src) == REGNO (dest))
1003 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1004 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1006 control_flow_insn_deleted |= control_flow_insn_p (insn);
1008 return control_flow_insn_deleted;
1011 /* The destination ought to be dead. */
1012 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1014 replace_reg (psrc, get_hard_regnum (regstack, src));
1016 regstack->reg[++regstack->top] = REGNO (dest);
1017 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1018 replace_reg (pdest, FIRST_STACK_REG);
1020 else if (STACK_REG_P (src))
1022 /* Save from a stack reg to MEM, or possibly integer reg. Since
1023 only top of stack may be saved, emit an exchange first if
1026 emit_swap_insn (insn, regstack, src);
1028 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1031 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1033 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1035 else if ((GET_MODE (src) == XFmode)
1036 && regstack->top < REG_STACK_SIZE - 1)
1038 /* A 387 cannot write an XFmode value to a MEM without
1039 clobbering the source reg. The output code can handle
1040 this by reading back the value from the MEM.
1041 But it is more efficient to use a temp register if one is
1042 available. Push the source value here if the register
1043 stack is not full, and then write the value to memory via
1046 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1048 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1049 emit_insn_before (push_rtx, insn);
1050 add_reg_note (insn, REG_DEAD, top_stack_reg);
1053 replace_reg (psrc, FIRST_STACK_REG);
1057 rtx pat = PATTERN (insn);
1059 gcc_assert (STACK_REG_P (dest));
1061 /* Load from MEM, or possibly integer REG or constant, into the
1062 stack regs. The actual target is always the top of the
1063 stack. The stack mapping is changed to reflect that DEST is
1064 now at top of stack. */
1066 /* The destination ought to be dead. However, there is a
1067 special case with i387 UNSPEC_TAN, where destination is live
1068 (an argument to fptan) but inherent load of 1.0 is modelled
1069 as a load from a constant. */
1070 if (GET_CODE (pat) == PARALLEL
1071 && XVECLEN (pat, 0) == 2
1072 && GET_CODE (XVECEXP (pat, 0, 1)) == SET
1073 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC
1074 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN)
1075 emit_swap_insn (insn, regstack, dest);
1077 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1079 gcc_assert (regstack->top < REG_STACK_SIZE);
1081 regstack->reg[++regstack->top] = REGNO (dest);
1082 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1083 replace_reg (pdest, FIRST_STACK_REG);
1086 return control_flow_insn_deleted;
1089 /* A helper function which replaces INSN with a pattern that loads up
1090 a NaN into DEST, then invokes move_for_stack_reg. */
1093 move_nan_for_stack_reg (rtx insn, stack_ptr regstack, rtx dest)
1097 dest = FP_MODE_REG (REGNO (dest), SFmode);
1098 pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1099 PATTERN (insn) = pat;
1100 INSN_CODE (insn) = -1;
1102 return move_for_stack_reg (insn, regstack, pat);
1105 /* Swap the condition on a branch, if there is one. Return true if we
1106 found a condition to swap. False if the condition was not used as
1110 swap_rtx_condition_1 (rtx pat)
1115 if (COMPARISON_P (pat))
1117 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1122 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1123 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1129 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1130 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1132 else if (fmt[i] == 'e')
1133 r |= swap_rtx_condition_1 (XEXP (pat, i));
1141 swap_rtx_condition (rtx insn)
1143 rtx pat = PATTERN (insn);
1145 /* We're looking for a single set to cc0 or an HImode temporary. */
1147 if (GET_CODE (pat) == SET
1148 && REG_P (SET_DEST (pat))
1149 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1151 insn = next_flags_user (insn);
1152 if (insn == NULL_RTX)
1154 pat = PATTERN (insn);
1157 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1158 with the cc value right now. We may be able to search for one
1161 if (GET_CODE (pat) == SET
1162 && GET_CODE (SET_SRC (pat)) == UNSPEC
1163 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1165 rtx dest = SET_DEST (pat);
1167 /* Search forward looking for the first use of this value.
1168 Stop at block boundaries. */
1169 while (insn != BB_END (current_block))
1171 insn = NEXT_INSN (insn);
1172 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1178 /* We haven't found it. */
1179 if (insn == BB_END (current_block))
1182 /* So we've found the insn using this value. If it is anything
1183 other than sahf or the value does not die (meaning we'd have
1184 to search further), then we must give up. */
1185 pat = PATTERN (insn);
1186 if (GET_CODE (pat) != SET
1187 || GET_CODE (SET_SRC (pat)) != UNSPEC
1188 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1189 || ! dead_or_set_p (insn, dest))
1192 /* Now we are prepared to handle this as a normal cc0 setter. */
1193 insn = next_flags_user (insn);
1194 if (insn == NULL_RTX)
1196 pat = PATTERN (insn);
1199 if (swap_rtx_condition_1 (pat))
1202 INSN_CODE (insn) = -1;
1203 if (recog_memoized (insn) == -1)
1205 /* In case the flags don't die here, recurse to try fix
1206 following user too. */
1207 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1209 insn = next_flags_user (insn);
1210 if (!insn || !swap_rtx_condition (insn))
1215 swap_rtx_condition_1 (pat);
1223 /* Handle a comparison. Special care needs to be taken to avoid
1224 causing comparisons that a 387 cannot do correctly, such as EQ.
1226 Also, a pop insn may need to be emitted. The 387 does have an
1227 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1228 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1232 compare_for_stack_reg (rtx insn, stack_ptr regstack, rtx pat_src)
1235 rtx src1_note, src2_note;
1237 src1 = get_true_reg (&XEXP (pat_src, 0));
1238 src2 = get_true_reg (&XEXP (pat_src, 1));
1240 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1241 registers that die in this insn - move those to stack top first. */
1242 if ((! STACK_REG_P (*src1)
1243 || (STACK_REG_P (*src2)
1244 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1245 && swap_rtx_condition (insn))
1248 temp = XEXP (pat_src, 0);
1249 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1250 XEXP (pat_src, 1) = temp;
1252 src1 = get_true_reg (&XEXP (pat_src, 0));
1253 src2 = get_true_reg (&XEXP (pat_src, 1));
1255 INSN_CODE (insn) = -1;
1258 /* We will fix any death note later. */
1260 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1262 if (STACK_REG_P (*src2))
1263 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1265 src2_note = NULL_RTX;
1267 emit_swap_insn (insn, regstack, *src1);
1269 replace_reg (src1, FIRST_STACK_REG);
1271 if (STACK_REG_P (*src2))
1272 replace_reg (src2, get_hard_regnum (regstack, *src2));
1276 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1277 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1280 /* If the second operand dies, handle that. But if the operands are
1281 the same stack register, don't bother, because only one death is
1282 needed, and it was just handled. */
1285 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1286 && REGNO (*src1) == REGNO (*src2)))
1288 /* As a special case, two regs may die in this insn if src2 is
1289 next to top of stack and the top of stack also dies. Since
1290 we have already popped src1, "next to top of stack" is really
1291 at top (FIRST_STACK_REG) now. */
1293 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1296 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1297 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1301 /* The 386 can only represent death of the first operand in
1302 the case handled above. In all other cases, emit a separate
1303 pop and remove the death note from here. */
1304 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1305 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1311 /* Substitute new registers in LOC, which is part of a debug insn.
1312 REGSTACK is the current register layout. */
1315 subst_stack_regs_in_debug_insn (rtx *loc, void *data)
1317 stack_ptr regstack = (stack_ptr)data;
1320 if (!STACK_REG_P (*loc))
1323 hard_regno = get_hard_regnum (regstack, *loc);
1325 /* If we can't find an active register, reset this debug insn. */
1326 if (hard_regno == -1)
1329 gcc_assert (hard_regno >= FIRST_STACK_REG);
1331 replace_reg (loc, hard_regno);
1336 /* Substitute hardware stack regs in debug insn INSN, using stack
1337 layout REGSTACK. If we can't find a hardware stack reg for any of
1338 the REGs in it, reset the debug insn. */
1341 subst_all_stack_regs_in_debug_insn (rtx insn, struct stack_def *regstack)
1343 int ret = for_each_rtx (&INSN_VAR_LOCATION_LOC (insn),
1344 subst_stack_regs_in_debug_insn,
1348 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
1350 gcc_checking_assert (ret == 0);
1353 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1354 is the current register layout. Return whether a control flow insn
1355 was deleted in the process. */
1358 subst_stack_regs_pat (rtx insn, stack_ptr regstack, rtx pat)
1361 bool control_flow_insn_deleted = false;
1363 switch (GET_CODE (pat))
1366 /* Deaths in USE insns can happen in non optimizing compilation.
1367 Handle them by popping the dying register. */
1368 src = get_true_reg (&XEXP (pat, 0));
1369 if (STACK_REG_P (*src)
1370 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1372 /* USEs are ignored for liveness information so USEs of dead
1373 register might happen. */
1374 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src)))
1375 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1376 return control_flow_insn_deleted;
1378 /* Uninitialized USE might happen for functions returning uninitialized
1379 value. We will properly initialize the USE on the edge to EXIT_BLOCK,
1380 so it is safe to ignore the use here. This is consistent with behavior
1381 of dataflow analyzer that ignores USE too. (This also imply that
1382 forcibly initializing the register to NaN here would lead to ICE later,
1383 since the REG_DEAD notes are not issued.) */
1393 dest = get_true_reg (&XEXP (pat, 0));
1394 if (STACK_REG_P (*dest))
1396 note = find_reg_note (insn, REG_DEAD, *dest);
1398 if (pat != PATTERN (insn))
1400 /* The fix_truncdi_1 pattern wants to be able to
1401 allocate its own scratch register. It does this by
1402 clobbering an fp reg so that it is assured of an
1403 empty reg-stack register. If the register is live,
1404 kill it now. Remove the DEAD/UNUSED note so we
1405 don't try to kill it later too.
1407 In reality the UNUSED note can be absent in some
1408 complicated cases when the register is reused for
1409 partially set variable. */
1412 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1414 note = find_reg_note (insn, REG_UNUSED, *dest);
1416 remove_note (insn, note);
1417 replace_reg (dest, FIRST_STACK_REG + 1);
1421 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1422 indicates an uninitialized value. Because reload removed
1423 all other clobbers, this must be due to a function
1424 returning without a value. Load up a NaN. */
1429 if (COMPLEX_MODE_P (GET_MODE (t)))
1431 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1432 if (get_hard_regnum (regstack, u) == -1)
1434 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1435 rtx insn2 = emit_insn_before (pat2, insn);
1436 control_flow_insn_deleted
1437 |= move_nan_for_stack_reg (insn2, regstack, u);
1440 if (get_hard_regnum (regstack, t) == -1)
1441 control_flow_insn_deleted
1442 |= move_nan_for_stack_reg (insn, regstack, t);
1451 rtx *src1 = (rtx *) 0, *src2;
1452 rtx src1_note, src2_note;
1455 dest = get_true_reg (&SET_DEST (pat));
1456 src = get_true_reg (&SET_SRC (pat));
1457 pat_src = SET_SRC (pat);
1459 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1460 if (STACK_REG_P (*src)
1461 || (STACK_REG_P (*dest)
1462 && (REG_P (*src) || MEM_P (*src)
1463 || CONST_DOUBLE_P (*src))))
1465 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1469 switch (GET_CODE (pat_src))
1472 compare_for_stack_reg (insn, regstack, pat_src);
1478 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1481 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1482 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1485 replace_reg (dest, FIRST_STACK_REG);
1489 /* This is a `tstM2' case. */
1490 gcc_assert (*dest == cc0_rtx);
1495 case FLOAT_TRUNCATE:
1499 /* These insns only operate on the top of the stack. DEST might
1500 be cc0_rtx if we're processing a tstM pattern. Also, it's
1501 possible that the tstM case results in a REG_DEAD note on the
1505 src1 = get_true_reg (&XEXP (pat_src, 0));
1507 emit_swap_insn (insn, regstack, *src1);
1509 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1511 if (STACK_REG_P (*dest))
1512 replace_reg (dest, FIRST_STACK_REG);
1516 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1518 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1521 replace_reg (src1, FIRST_STACK_REG);
1526 /* On i386, reversed forms of subM3 and divM3 exist for
1527 MODE_FLOAT, so the same code that works for addM3 and mulM3
1531 /* These insns can accept the top of stack as a destination
1532 from a stack reg or mem, or can use the top of stack as a
1533 source and some other stack register (possibly top of stack)
1534 as a destination. */
1536 src1 = get_true_reg (&XEXP (pat_src, 0));
1537 src2 = get_true_reg (&XEXP (pat_src, 1));
1539 /* We will fix any death note later. */
1541 if (STACK_REG_P (*src1))
1542 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1544 src1_note = NULL_RTX;
1545 if (STACK_REG_P (*src2))
1546 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1548 src2_note = NULL_RTX;
1550 /* If either operand is not a stack register, then the dest
1551 must be top of stack. */
1553 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1554 emit_swap_insn (insn, regstack, *dest);
1557 /* Both operands are REG. If neither operand is already
1558 at the top of stack, choose to make the one that is the
1559 dest the new top of stack. */
1561 int src1_hard_regnum, src2_hard_regnum;
1563 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1564 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1566 /* If the source is not live, this is yet another case of
1567 uninitialized variables. Load up a NaN instead. */
1568 if (src1_hard_regnum == -1)
1570 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1);
1571 rtx insn2 = emit_insn_before (pat2, insn);
1572 control_flow_insn_deleted
1573 |= move_nan_for_stack_reg (insn2, regstack, *src1);
1575 if (src2_hard_regnum == -1)
1577 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2);
1578 rtx insn2 = emit_insn_before (pat2, insn);
1579 control_flow_insn_deleted
1580 |= move_nan_for_stack_reg (insn2, regstack, *src2);
1583 if (src1_hard_regnum != FIRST_STACK_REG
1584 && src2_hard_regnum != FIRST_STACK_REG)
1585 emit_swap_insn (insn, regstack, *dest);
1588 if (STACK_REG_P (*src1))
1589 replace_reg (src1, get_hard_regnum (regstack, *src1));
1590 if (STACK_REG_P (*src2))
1591 replace_reg (src2, get_hard_regnum (regstack, *src2));
1595 rtx src1_reg = XEXP (src1_note, 0);
1597 /* If the register that dies is at the top of stack, then
1598 the destination is somewhere else - merely substitute it.
1599 But if the reg that dies is not at top of stack, then
1600 move the top of stack to the dead reg, as though we had
1601 done the insn and then a store-with-pop. */
1603 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1605 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1606 replace_reg (dest, get_hard_regnum (regstack, *dest));
1610 int regno = get_hard_regnum (regstack, src1_reg);
1612 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1613 replace_reg (dest, regno);
1615 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1616 = regstack->reg[regstack->top];
1619 CLEAR_HARD_REG_BIT (regstack->reg_set,
1620 REGNO (XEXP (src1_note, 0)));
1621 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1626 rtx src2_reg = XEXP (src2_note, 0);
1627 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1629 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1630 replace_reg (dest, get_hard_regnum (regstack, *dest));
1634 int regno = get_hard_regnum (regstack, src2_reg);
1636 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1637 replace_reg (dest, regno);
1639 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1640 = regstack->reg[regstack->top];
1643 CLEAR_HARD_REG_BIT (regstack->reg_set,
1644 REGNO (XEXP (src2_note, 0)));
1645 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1650 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1651 replace_reg (dest, get_hard_regnum (regstack, *dest));
1654 /* Keep operand 1 matching with destination. */
1655 if (COMMUTATIVE_ARITH_P (pat_src)
1656 && REG_P (*src1) && REG_P (*src2)
1657 && REGNO (*src1) != REGNO (*dest))
1659 int tmp = REGNO (*src1);
1660 replace_reg (src1, REGNO (*src2));
1661 replace_reg (src2, tmp);
1666 switch (XINT (pat_src, 1))
1671 case UNSPEC_FIST_FLOOR:
1672 case UNSPEC_FIST_CEIL:
1674 /* These insns only operate on the top of the stack. */
1676 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1677 emit_swap_insn (insn, regstack, *src1);
1679 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1681 if (STACK_REG_P (*dest))
1682 replace_reg (dest, FIRST_STACK_REG);
1686 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1688 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1691 replace_reg (src1, FIRST_STACK_REG);
1696 /* This insn only operate on the top of the stack. */
1698 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1699 emit_swap_insn (insn, regstack, *src1);
1701 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1703 replace_reg (src1, FIRST_STACK_REG);
1707 remove_regno_note (insn, REG_DEAD,
1708 REGNO (XEXP (src1_note, 0)));
1709 emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
1717 case UNSPEC_FRNDINT:
1720 case UNSPEC_FRNDINT_FLOOR:
1721 case UNSPEC_FRNDINT_CEIL:
1722 case UNSPEC_FRNDINT_TRUNC:
1723 case UNSPEC_FRNDINT_MASK_PM:
1725 /* Above insns operate on the top of the stack. */
1727 case UNSPEC_SINCOS_COS:
1728 case UNSPEC_XTRACT_FRACT:
1730 /* Above insns operate on the top two stack slots,
1731 first part of one input, double output insn. */
1733 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1735 emit_swap_insn (insn, regstack, *src1);
1737 /* Input should never die, it is replaced with output. */
1738 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1739 gcc_assert (!src1_note);
1741 if (STACK_REG_P (*dest))
1742 replace_reg (dest, FIRST_STACK_REG);
1744 replace_reg (src1, FIRST_STACK_REG);
1747 case UNSPEC_SINCOS_SIN:
1748 case UNSPEC_XTRACT_EXP:
1750 /* These insns operate on the top two stack slots,
1751 second part of one input, double output insn. */
1758 /* For UNSPEC_TAN, regstack->top is already increased
1759 by inherent load of constant 1.0. */
1761 /* Output value is generated in the second stack slot.
1762 Move current value from second slot to the top. */
1763 regstack->reg[regstack->top]
1764 = regstack->reg[regstack->top - 1];
1766 gcc_assert (STACK_REG_P (*dest));
1768 regstack->reg[regstack->top - 1] = REGNO (*dest);
1769 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1770 replace_reg (dest, FIRST_STACK_REG + 1);
1772 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1774 replace_reg (src1, FIRST_STACK_REG);
1779 case UNSPEC_FYL2XP1:
1780 /* These insns operate on the top two stack slots. */
1782 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1783 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1785 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1786 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1788 swap_to_top (insn, regstack, *src1, *src2);
1790 replace_reg (src1, FIRST_STACK_REG);
1791 replace_reg (src2, FIRST_STACK_REG + 1);
1794 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1796 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1798 /* Pop both input operands from the stack. */
1799 CLEAR_HARD_REG_BIT (regstack->reg_set,
1800 regstack->reg[regstack->top]);
1801 CLEAR_HARD_REG_BIT (regstack->reg_set,
1802 regstack->reg[regstack->top - 1]);
1805 /* Push the result back onto the stack. */
1806 regstack->reg[++regstack->top] = REGNO (*dest);
1807 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1808 replace_reg (dest, FIRST_STACK_REG);
1811 case UNSPEC_FSCALE_FRACT:
1812 case UNSPEC_FPREM_F:
1813 case UNSPEC_FPREM1_F:
1814 /* These insns operate on the top two stack slots,
1815 first part of double input, double output insn. */
1817 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1818 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1820 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1821 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1823 /* Inputs should never die, they are
1824 replaced with outputs. */
1825 gcc_assert (!src1_note);
1826 gcc_assert (!src2_note);
1828 swap_to_top (insn, regstack, *src1, *src2);
1830 /* Push the result back onto stack. Empty stack slot
1831 will be filled in second part of insn. */
1832 if (STACK_REG_P (*dest))
1834 regstack->reg[regstack->top] = REGNO (*dest);
1835 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1836 replace_reg (dest, FIRST_STACK_REG);
1839 replace_reg (src1, FIRST_STACK_REG);
1840 replace_reg (src2, FIRST_STACK_REG + 1);
1843 case UNSPEC_FSCALE_EXP:
1844 case UNSPEC_FPREM_U:
1845 case UNSPEC_FPREM1_U:
1846 /* These insns operate on the top two stack slots,
1847 second part of double input, double output insn. */
1849 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1850 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1852 /* Push the result back onto stack. Fill empty slot from
1853 first part of insn and fix top of stack pointer. */
1854 if (STACK_REG_P (*dest))
1856 regstack->reg[regstack->top - 1] = REGNO (*dest);
1857 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1858 replace_reg (dest, FIRST_STACK_REG + 1);
1861 replace_reg (src1, FIRST_STACK_REG);
1862 replace_reg (src2, FIRST_STACK_REG + 1);
1865 case UNSPEC_C2_FLAG:
1866 /* This insn operates on the top two stack slots,
1867 third part of C2 setting double input insn. */
1869 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1870 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1872 replace_reg (src1, FIRST_STACK_REG);
1873 replace_reg (src2, FIRST_STACK_REG + 1);
1877 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1878 The combination matches the PPRO fcomi instruction. */
1880 pat_src = XVECEXP (pat_src, 0, 0);
1881 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1882 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1886 /* Combined fcomp+fnstsw generated for doing well with
1887 CSE. When optimizing this would have been broken
1890 pat_src = XVECEXP (pat_src, 0, 0);
1891 gcc_assert (GET_CODE (pat_src) == COMPARE);
1893 compare_for_stack_reg (insn, regstack, pat_src);
1902 /* This insn requires the top of stack to be the destination. */
1904 src1 = get_true_reg (&XEXP (pat_src, 1));
1905 src2 = get_true_reg (&XEXP (pat_src, 2));
1907 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1908 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1910 /* If the comparison operator is an FP comparison operator,
1911 it is handled correctly by compare_for_stack_reg () who
1912 will move the destination to the top of stack. But if the
1913 comparison operator is not an FP comparison operator, we
1914 have to handle it here. */
1915 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1916 && REGNO (*dest) != regstack->reg[regstack->top])
1918 /* In case one of operands is the top of stack and the operands
1919 dies, it is safe to make it the destination operand by
1920 reversing the direction of cmove and avoid fxch. */
1921 if ((REGNO (*src1) == regstack->reg[regstack->top]
1923 || (REGNO (*src2) == regstack->reg[regstack->top]
1926 int idx1 = (get_hard_regnum (regstack, *src1)
1928 int idx2 = (get_hard_regnum (regstack, *src2)
1931 /* Make reg-stack believe that the operands are already
1932 swapped on the stack */
1933 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1934 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1936 /* Reverse condition to compensate the operand swap.
1937 i386 do have comparison always reversible. */
1938 PUT_CODE (XEXP (pat_src, 0),
1939 reversed_comparison_code (XEXP (pat_src, 0), insn));
1942 emit_swap_insn (insn, regstack, *dest);
1950 src_note[1] = src1_note;
1951 src_note[2] = src2_note;
1953 if (STACK_REG_P (*src1))
1954 replace_reg (src1, get_hard_regnum (regstack, *src1));
1955 if (STACK_REG_P (*src2))
1956 replace_reg (src2, get_hard_regnum (regstack, *src2));
1958 for (i = 1; i <= 2; i++)
1961 int regno = REGNO (XEXP (src_note[i], 0));
1963 /* If the register that dies is not at the top of
1964 stack, then move the top of stack to the dead reg.
1965 Top of stack should never die, as it is the
1967 gcc_assert (regno != regstack->reg[regstack->top]);
1968 remove_regno_note (insn, REG_DEAD, regno);
1969 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1974 /* Make dest the top of stack. Add dest to regstack if
1976 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1977 regstack->reg[++regstack->top] = REGNO (*dest);
1978 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1979 replace_reg (dest, FIRST_STACK_REG);
1992 return control_flow_insn_deleted;
1995 /* Substitute hard regnums for any stack regs in INSN, which has
1996 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1997 before the insn, and is updated with changes made here.
1999 There are several requirements and assumptions about the use of
2000 stack-like regs in asm statements. These rules are enforced by
2001 record_asm_stack_regs; see comments there for details. Any
2002 asm_operands left in the RTL at this point may be assume to meet the
2003 requirements, since record_asm_stack_regs removes any problem asm. */
2006 subst_asm_stack_regs (rtx insn, stack_ptr regstack)
2008 rtx body = PATTERN (insn);
2011 rtx *note_reg; /* Array of note contents */
2012 rtx **note_loc; /* Address of REG field of each note */
2013 enum reg_note *note_kind; /* The type of each note */
2015 rtx *clobber_reg = 0;
2016 rtx **clobber_loc = 0;
2018 struct stack_def temp_stack;
2023 int n_inputs, n_outputs;
2025 if (! check_asm_stack_operands (insn))
2028 /* Find out what the constraints required. If no constraint
2029 alternative matches, that is a compiler bug: we should have caught
2030 such an insn in check_asm_stack_operands. */
2031 extract_insn (insn);
2032 constrain_operands (1);
2033 alt = which_alternative;
2035 preprocess_constraints ();
2037 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
2039 gcc_assert (alt >= 0);
2041 /* Strip SUBREGs here to make the following code simpler. */
2042 for (i = 0; i < recog_data.n_operands; i++)
2043 if (GET_CODE (recog_data.operand[i]) == SUBREG
2044 && REG_P (SUBREG_REG (recog_data.operand[i])))
2046 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2047 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2050 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2052 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2055 note_reg = XALLOCAVEC (rtx, i);
2056 note_loc = XALLOCAVEC (rtx *, i);
2057 note_kind = XALLOCAVEC (enum reg_note, i);
2060 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2062 if (GET_CODE (note) != EXPR_LIST)
2064 rtx reg = XEXP (note, 0);
2065 rtx *loc = & XEXP (note, 0);
2067 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2069 loc = & SUBREG_REG (reg);
2070 reg = SUBREG_REG (reg);
2073 if (STACK_REG_P (reg)
2074 && (REG_NOTE_KIND (note) == REG_DEAD
2075 || REG_NOTE_KIND (note) == REG_UNUSED))
2077 note_reg[n_notes] = reg;
2078 note_loc[n_notes] = loc;
2079 note_kind[n_notes] = REG_NOTE_KIND (note);
2084 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2088 if (GET_CODE (body) == PARALLEL)
2090 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
2091 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0));
2093 for (i = 0; i < XVECLEN (body, 0); i++)
2094 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2096 rtx clobber = XVECEXP (body, 0, i);
2097 rtx reg = XEXP (clobber, 0);
2098 rtx *loc = & XEXP (clobber, 0);
2100 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2102 loc = & SUBREG_REG (reg);
2103 reg = SUBREG_REG (reg);
2106 if (STACK_REG_P (reg))
2108 clobber_reg[n_clobbers] = reg;
2109 clobber_loc[n_clobbers] = loc;
2115 temp_stack = *regstack;
2117 /* Put the input regs into the desired place in TEMP_STACK. */
2119 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2120 if (STACK_REG_P (recog_data.operand[i])
2121 && reg_class_subset_p (recog_op_alt[i][alt].cl,
2123 && recog_op_alt[i][alt].cl != FLOAT_REGS)
2125 /* If an operand needs to be in a particular reg in
2126 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2127 these constraints are for single register classes, and
2128 reload guaranteed that operand[i] is already in that class,
2129 we can just use REGNO (recog_data.operand[i]) to know which
2130 actual reg this operand needs to be in. */
2132 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2134 gcc_assert (regno >= 0);
2136 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2138 /* recog_data.operand[i] is not in the right place. Find
2139 it and swap it with whatever is already in I's place.
2140 K is where recog_data.operand[i] is now. J is where it
2144 k = temp_stack.top - (regno - FIRST_STACK_REG);
2146 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2148 temp = temp_stack.reg[k];
2149 temp_stack.reg[k] = temp_stack.reg[j];
2150 temp_stack.reg[j] = temp;
2154 /* Emit insns before INSN to make sure the reg-stack is in the right
2157 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2159 /* Make the needed input register substitutions. Do death notes and
2160 clobbers too, because these are for inputs, not outputs. */
2162 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2163 if (STACK_REG_P (recog_data.operand[i]))
2165 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2167 gcc_assert (regnum >= 0);
2169 replace_reg (recog_data.operand_loc[i], regnum);
2172 for (i = 0; i < n_notes; i++)
2173 if (note_kind[i] == REG_DEAD)
2175 int regnum = get_hard_regnum (regstack, note_reg[i]);
2177 gcc_assert (regnum >= 0);
2179 replace_reg (note_loc[i], regnum);
2182 for (i = 0; i < n_clobbers; i++)
2184 /* It's OK for a CLOBBER to reference a reg that is not live.
2185 Don't try to replace it in that case. */
2186 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2190 /* Sigh - clobbers always have QImode. But replace_reg knows
2191 that these regs can't be MODE_INT and will assert. Just put
2192 the right reg there without calling replace_reg. */
2194 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2198 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2200 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2201 if (STACK_REG_P (recog_data.operand[i]))
2203 /* An input reg is implicitly popped if it is tied to an
2204 output, or if there is a CLOBBER for it. */
2207 for (j = 0; j < n_clobbers; j++)
2208 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2211 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2213 /* recog_data.operand[i] might not be at the top of stack.
2214 But that's OK, because all we need to do is pop the
2215 right number of regs off of the top of the reg-stack.
2216 record_asm_stack_regs guaranteed that all implicitly
2217 popped regs were grouped at the top of the reg-stack. */
2219 CLEAR_HARD_REG_BIT (regstack->reg_set,
2220 regstack->reg[regstack->top]);
2225 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2226 Note that there isn't any need to substitute register numbers.
2227 ??? Explain why this is true. */
2229 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2231 /* See if there is an output for this hard reg. */
2234 for (j = 0; j < n_outputs; j++)
2235 if (STACK_REG_P (recog_data.operand[j])
2236 && REGNO (recog_data.operand[j]) == (unsigned) i)
2238 regstack->reg[++regstack->top] = i;
2239 SET_HARD_REG_BIT (regstack->reg_set, i);
2244 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2245 input that the asm didn't implicitly pop. If the asm didn't
2246 implicitly pop an input reg, that reg will still be live.
2248 Note that we can't use find_regno_note here: the register numbers
2249 in the death notes have already been substituted. */
2251 for (i = 0; i < n_outputs; i++)
2252 if (STACK_REG_P (recog_data.operand[i]))
2256 for (j = 0; j < n_notes; j++)
2257 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2258 && note_kind[j] == REG_UNUSED)
2260 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2266 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2267 if (STACK_REG_P (recog_data.operand[i]))
2271 for (j = 0; j < n_notes; j++)
2272 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2273 && note_kind[j] == REG_DEAD
2274 && TEST_HARD_REG_BIT (regstack->reg_set,
2275 REGNO (recog_data.operand[i])))
2277 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2284 /* Substitute stack hard reg numbers for stack virtual registers in
2285 INSN. Non-stack register numbers are not changed. REGSTACK is the
2286 current stack content. Insns may be emitted as needed to arrange the
2287 stack for the 387 based on the contents of the insn. Return whether
2288 a control flow insn was deleted in the process. */
2291 subst_stack_regs (rtx insn, stack_ptr regstack)
2293 rtx *note_link, note;
2294 bool control_flow_insn_deleted = false;
2299 int top = regstack->top;
2301 /* If there are any floating point parameters to be passed in
2302 registers for this call, make sure they are in the right
2307 straighten_stack (insn, regstack);
2309 /* Now mark the arguments as dead after the call. */
2311 while (regstack->top >= 0)
2313 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2319 /* Do the actual substitution if any stack regs are mentioned.
2320 Since we only record whether entire insn mentions stack regs, and
2321 subst_stack_regs_pat only works for patterns that contain stack regs,
2322 we must check each pattern in a parallel here. A call_value_pop could
2325 if (stack_regs_mentioned (insn))
2327 int n_operands = asm_noperands (PATTERN (insn));
2328 if (n_operands >= 0)
2330 /* This insn is an `asm' with operands. Decode the operands,
2331 decide how many are inputs, and do register substitution.
2332 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2334 subst_asm_stack_regs (insn, regstack);
2335 return control_flow_insn_deleted;
2338 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2339 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2341 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2343 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2344 XVECEXP (PATTERN (insn), 0, i)
2345 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2346 control_flow_insn_deleted
2347 |= subst_stack_regs_pat (insn, regstack,
2348 XVECEXP (PATTERN (insn), 0, i));
2352 control_flow_insn_deleted
2353 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2356 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2357 REG_UNUSED will already have been dealt with, so just return. */
2359 if (NOTE_P (insn) || INSN_DELETED_P (insn))
2360 return control_flow_insn_deleted;
2362 /* If this a noreturn call, we can't insert pop insns after it.
2363 Instead, reset the stack state to empty. */
2365 && find_reg_note (insn, REG_NORETURN, NULL))
2368 CLEAR_HARD_REG_SET (regstack->reg_set);
2369 return control_flow_insn_deleted;
2372 /* If there is a REG_UNUSED note on a stack register on this insn,
2373 the indicated reg must be popped. The REG_UNUSED note is removed,
2374 since the form of the newly emitted pop insn references the reg,
2375 making it no longer `unset'. */
2377 note_link = ®_NOTES (insn);
2378 for (note = *note_link; note; note = XEXP (note, 1))
2379 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2381 *note_link = XEXP (note, 1);
2382 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2385 note_link = &XEXP (note, 1);
2387 return control_flow_insn_deleted;
2390 /* Change the organization of the stack so that it fits a new basic
2391 block. Some registers might have to be popped, but there can never be
2392 a register live in the new block that is not now live.
2394 Insert any needed insns before or after INSN, as indicated by
2395 WHERE. OLD is the original stack layout, and NEW is the desired
2396 form. OLD is updated to reflect the code emitted, i.e., it will be
2397 the same as NEW upon return.
2399 This function will not preserve block_end[]. But that information
2400 is no longer needed once this has executed. */
2403 change_stack (rtx insn, stack_ptr old, stack_ptr new_stack, enum emit_where where)
2409 /* Stack adjustments for the first insn in a block update the
2410 current_block's stack_in instead of inserting insns directly.
2411 compensate_edges will add the necessary code later. */
2414 && where == EMIT_BEFORE)
2416 BLOCK_INFO (current_block)->stack_in = *new_stack;
2417 starting_stack_p = false;
2422 /* We will be inserting new insns "backwards". If we are to insert
2423 after INSN, find the next insn, and insert before it. */
2425 if (where == EMIT_AFTER)
2427 if (current_block && BB_END (current_block) == insn)
2429 insn = NEXT_INSN (insn);
2432 /* Initialize partially dead variables. */
2433 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
2434 if (TEST_HARD_REG_BIT (new_stack->reg_set, i)
2435 && !TEST_HARD_REG_BIT (old->reg_set, i))
2437 old->reg[++old->top] = i;
2438 SET_HARD_REG_BIT (old->reg_set, i);
2439 emit_insn_before (gen_rtx_SET (VOIDmode,
2440 FP_MODE_REG (i, SFmode), not_a_num), insn);
2443 /* Pop any registers that are not needed in the new block. */
2445 /* If the destination block's stack already has a specified layout
2446 and contains two or more registers, use a more intelligent algorithm
2447 to pop registers that minimizes the number number of fxchs below. */
2448 if (new_stack->top > 0)
2450 bool slots[REG_STACK_SIZE];
2451 int pops[REG_STACK_SIZE];
2452 int next, dest, topsrc;
2454 /* First pass to determine the free slots. */
2455 for (reg = 0; reg <= new_stack->top; reg++)
2456 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]);
2458 /* Second pass to allocate preferred slots. */
2460 for (reg = old->top; reg > new_stack->top; reg--)
2461 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2464 for (next = 0; next <= new_stack->top; next++)
2465 if (!slots[next] && new_stack->reg[next] == old->reg[reg])
2467 /* If this is a preference for the new top of stack, record
2468 the fact by remembering it's old->reg in topsrc. */
2469 if (next == new_stack->top)
2480 /* Intentionally, avoid placing the top of stack in it's correct
2481 location, if we still need to permute the stack below and we
2482 can usefully place it somewhere else. This is the case if any
2483 slot is still unallocated, in which case we should place the
2484 top of stack there. */
2486 for (reg = 0; reg < new_stack->top; reg++)
2490 slots[new_stack->top] = false;
2495 /* Third pass allocates remaining slots and emits pop insns. */
2496 next = new_stack->top;
2497 for (reg = old->top; reg > new_stack->top; reg--)
2502 /* Find next free slot. */
2507 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2513 /* The following loop attempts to maximize the number of times we
2514 pop the top of the stack, as this permits the use of the faster
2515 ffreep instruction on platforms that support it. */
2519 for (reg = 0; reg <= old->top; reg++)
2520 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2524 while (old->top >= live)
2525 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top]))
2527 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next]))
2529 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2533 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2537 if (new_stack->top == -2)
2539 /* If the new block has never been processed, then it can inherit
2540 the old stack order. */
2542 new_stack->top = old->top;
2543 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg));
2547 /* This block has been entered before, and we must match the
2548 previously selected stack order. */
2550 /* By now, the only difference should be the order of the stack,
2551 not their depth or liveliness. */
2553 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set));
2554 gcc_assert (old->top == new_stack->top);
2556 /* If the stack is not empty (new_stack->top != -1), loop here emitting
2557 swaps until the stack is correct.
2559 The worst case number of swaps emitted is N + 2, where N is the
2560 depth of the stack. In some cases, the reg at the top of
2561 stack may be correct, but swapped anyway in order to fix
2562 other regs. But since we never swap any other reg away from
2563 its correct slot, this algorithm will converge. */
2565 if (new_stack->top != -1)
2568 /* Swap the reg at top of stack into the position it is
2569 supposed to be in, until the correct top of stack appears. */
2571 while (old->reg[old->top] != new_stack->reg[new_stack->top])
2573 for (reg = new_stack->top; reg >= 0; reg--)
2574 if (new_stack->reg[reg] == old->reg[old->top])
2577 gcc_assert (reg != -1);
2579 emit_swap_insn (insn, old,
2580 FP_MODE_REG (old->reg[reg], DFmode));
2583 /* See if any regs remain incorrect. If so, bring an
2584 incorrect reg to the top of stack, and let the while loop
2587 for (reg = new_stack->top; reg >= 0; reg--)
2588 if (new_stack->reg[reg] != old->reg[reg])
2590 emit_swap_insn (insn, old,
2591 FP_MODE_REG (old->reg[reg], DFmode));
2596 /* At this point there must be no differences. */
2598 for (reg = old->top; reg >= 0; reg--)
2599 gcc_assert (old->reg[reg] == new_stack->reg[reg]);
2603 BB_END (current_block) = PREV_INSN (insn);
2606 /* Print stack configuration. */
2609 print_stack (FILE *file, stack_ptr s)
2615 fprintf (file, "uninitialized\n");
2616 else if (s->top == -1)
2617 fprintf (file, "empty\n");
2622 for (i = 0; i <= s->top; ++i)
2623 fprintf (file, "%d ", s->reg[i]);
2624 fputs ("]\n", file);
2628 /* This function was doing life analysis. We now let the regular live
2629 code do it's job, so we only need to check some extra invariants
2630 that reg-stack expects. Primary among these being that all registers
2631 are initialized before use.
2633 The function returns true when code was emitted to CFG edges and
2634 commit_edge_insertions needs to be called. */
2637 convert_regs_entry (void)
2643 /* Load something into each stack register live at function entry.
2644 Such live registers can be caused by uninitialized variables or
2645 functions not returning values on all paths. In order to keep
2646 the push/pop code happy, and to not scrog the register stack, we
2647 must put something in these registers. Use a QNaN.
2649 Note that we are inserting converted code here. This code is
2650 never seen by the convert_regs pass. */
2652 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
2654 basic_block block = e->dest;
2655 block_info bi = BLOCK_INFO (block);
2658 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2659 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2663 bi->stack_in.reg[++top] = reg;
2665 init = gen_rtx_SET (VOIDmode,
2666 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2668 insert_insn_on_edge (init, e);
2672 bi->stack_in.top = top;
2678 /* Construct the desired stack for function exit. This will either
2679 be `empty', or the function return value at top-of-stack. */
2682 convert_regs_exit (void)
2684 int value_reg_low, value_reg_high;
2685 stack_ptr output_stack;
2688 retvalue = stack_result (current_function_decl);
2689 value_reg_low = value_reg_high = -1;
2692 value_reg_low = REGNO (retvalue);
2693 value_reg_high = END_HARD_REGNO (retvalue) - 1;
2696 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in;
2697 if (value_reg_low == -1)
2698 output_stack->top = -1;
2703 output_stack->top = value_reg_high - value_reg_low;
2704 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2706 output_stack->reg[value_reg_high - reg] = reg;
2707 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2712 /* Copy the stack info from the end of edge E's source block to the
2713 start of E's destination block. */
2716 propagate_stack (edge e)
2718 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out;
2719 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2722 /* Preserve the order of the original stack, but check whether
2723 any pops are needed. */
2724 dest_stack->top = -1;
2725 for (reg = 0; reg <= src_stack->top; ++reg)
2726 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2727 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2729 /* Push in any partially dead values. */
2730 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++)
2731 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg)
2732 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg))
2733 dest_stack->reg[++dest_stack->top] = reg;
2737 /* Adjust the stack of edge E's source block on exit to match the stack
2738 of it's target block upon input. The stack layouts of both blocks
2739 should have been defined by now. */
2742 compensate_edge (edge e)
2744 basic_block source = e->src, target = e->dest;
2745 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in;
2746 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out;
2747 struct stack_def regstack;
2751 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2753 gcc_assert (target_stack->top != -2);
2755 /* Check whether stacks are identical. */
2756 if (target_stack->top == source_stack->top)
2758 for (reg = target_stack->top; reg >= 0; --reg)
2759 if (target_stack->reg[reg] != source_stack->reg[reg])
2765 fprintf (dump_file, "no changes needed\n");
2772 fprintf (dump_file, "correcting stack to ");
2773 print_stack (dump_file, target_stack);
2776 /* Abnormal calls may appear to have values live in st(0), but the
2777 abnormal return path will not have actually loaded the values. */
2778 if (e->flags & EDGE_ABNORMAL_CALL)
2780 /* Assert that the lifetimes are as we expect -- one value
2781 live at st(0) on the end of the source block, and no
2782 values live at the beginning of the destination block.
2783 For complex return values, we may have st(1) live as well. */
2784 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2785 gcc_assert (target_stack->top == -1);
2789 /* Handle non-call EH edges specially. The normal return path have
2790 values in registers. These will be popped en masse by the unwind
2792 if (e->flags & EDGE_EH)
2794 gcc_assert (target_stack->top == -1);
2798 /* We don't support abnormal edges. Global takes care to
2799 avoid any live register across them, so we should never
2800 have to insert instructions on such edges. */
2801 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2803 /* Make a copy of source_stack as change_stack is destructive. */
2804 regstack = *source_stack;
2806 /* It is better to output directly to the end of the block
2807 instead of to the edge, because emit_swap can do minimal
2808 insn scheduling. We can do this when there is only one
2809 edge out, and it is not abnormal. */
2810 if (EDGE_COUNT (source->succs) == 1)
2812 current_block = source;
2813 change_stack (BB_END (source), ®stack, target_stack,
2814 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2820 current_block = NULL;
2823 /* ??? change_stack needs some point to emit insns after. */
2824 after = emit_note (NOTE_INSN_DELETED);
2826 change_stack (after, ®stack, target_stack, EMIT_BEFORE);
2831 insert_insn_on_edge (seq, e);
2837 /* Traverse all non-entry edges in the CFG, and emit the necessary
2838 edge compensation code to change the stack from stack_out of the
2839 source block to the stack_in of the destination block. */
2842 compensate_edges (void)
2844 bool inserted = false;
2847 starting_stack_p = false;
2849 FOR_EACH_BB_FN (bb, cfun)
2850 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun))
2855 FOR_EACH_EDGE (e, ei, bb->succs)
2856 inserted |= compensate_edge (e);
2861 /* Select the better of two edges E1 and E2 to use to determine the
2862 stack layout for their shared destination basic block. This is
2863 typically the more frequently executed. The edge E1 may be NULL
2864 (in which case E2 is returned), but E2 is always non-NULL. */
2867 better_edge (edge e1, edge e2)
2872 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2874 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2877 if (e1->count > e2->count)
2879 if (e1->count < e2->count)
2882 /* Prefer critical edges to minimize inserting compensation code on
2885 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2886 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2888 /* Avoid non-deterministic behavior. */
2889 return (e1->src->index < e2->src->index) ? e1 : e2;
2892 /* Convert stack register references in one block. Return true if the CFG
2893 has been modified in the process. */
2896 convert_regs_1 (basic_block block)
2898 struct stack_def regstack;
2899 block_info bi = BLOCK_INFO (block);
2902 bool control_flow_insn_deleted = false;
2903 bool cfg_altered = false;
2904 int debug_insns_with_starting_stack = 0;
2906 any_malformed_asm = false;
2908 /* Choose an initial stack layout, if one hasn't already been chosen. */
2909 if (bi->stack_in.top == -2)
2911 edge e, beste = NULL;
2914 /* Select the best incoming edge (typically the most frequent) to
2915 use as a template for this basic block. */
2916 FOR_EACH_EDGE (e, ei, block->preds)
2917 if (BLOCK_INFO (e->src)->done)
2918 beste = better_edge (beste, e);
2921 propagate_stack (beste);
2924 /* No predecessors. Create an arbitrary input stack. */
2925 bi->stack_in.top = -1;
2926 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2927 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2928 bi->stack_in.reg[++bi->stack_in.top] = reg;
2934 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2935 print_stack (dump_file, &bi->stack_in);
2938 /* Process all insns in this block. Keep track of NEXT so that we
2939 don't process insns emitted while substituting in INSN. */
2940 current_block = block;
2941 next = BB_HEAD (block);
2942 regstack = bi->stack_in;
2943 starting_stack_p = true;
2948 next = NEXT_INSN (insn);
2950 /* Ensure we have not missed a block boundary. */
2952 if (insn == BB_END (block))
2955 /* Don't bother processing unless there is a stack reg
2956 mentioned or if it's a CALL_INSN. */
2957 if (DEBUG_INSN_P (insn))
2959 if (starting_stack_p)
2960 debug_insns_with_starting_stack++;
2963 subst_all_stack_regs_in_debug_insn (insn, ®stack);
2965 /* Nothing must ever die at a debug insn. If something
2966 is referenced in it that becomes dead, it should have
2967 died before and the reference in the debug insn
2968 should have been removed so as to avoid changing code
2970 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL));
2973 else if (stack_regs_mentioned (insn)
2978 fprintf (dump_file, " insn %d input stack: ",
2980 print_stack (dump_file, ®stack);
2982 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
2983 starting_stack_p = false;
2988 if (debug_insns_with_starting_stack)
2990 /* Since it's the first non-debug instruction that determines
2991 the stack requirements of the current basic block, we refrain
2992 from updating debug insns before it in the loop above, and
2993 fix them up here. */
2994 for (insn = BB_HEAD (block); debug_insns_with_starting_stack;
2995 insn = NEXT_INSN (insn))
2997 if (!DEBUG_INSN_P (insn))
3000 debug_insns_with_starting_stack--;
3001 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in);
3007 fprintf (dump_file, "Expected live registers [");
3008 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3009 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
3010 fprintf (dump_file, " %d", reg);
3011 fprintf (dump_file, " ]\nOutput stack: ");
3012 print_stack (dump_file, ®stack);
3015 insn = BB_END (block);
3017 insn = PREV_INSN (insn);
3019 /* If the function is declared to return a value, but it returns one
3020 in only some cases, some registers might come live here. Emit
3021 necessary moves for them. */
3023 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3025 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
3026 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
3031 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
3033 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
3034 insn = emit_insn_after (set, insn);
3035 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
3039 /* Amongst the insns possibly deleted during the substitution process above,
3040 might have been the only trapping insn in the block. We purge the now
3041 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
3042 called at the end of convert_regs. The order in which we process the
3043 blocks ensures that we never delete an already processed edge.
3045 Note that, at this point, the CFG may have been damaged by the emission
3046 of instructions after an abnormal call, which moves the basic block end
3047 (and is the reason why we call fixup_abnormal_edges later). So we must
3048 be sure that the trapping insn has been deleted before trying to purge
3049 dead edges, otherwise we risk purging valid edges.
3051 ??? We are normally supposed not to delete trapping insns, so we pretend
3052 that the insns deleted above don't actually trap. It would have been
3053 better to detect this earlier and avoid creating the EH edge in the first
3054 place, still, but we don't have enough information at that time. */
3056 if (control_flow_insn_deleted)
3057 cfg_altered |= purge_dead_edges (block);
3059 /* Something failed if the stack lives don't match. If we had malformed
3060 asms, we zapped the instruction itself, but that didn't produce the
3061 same pattern of register kills as before. */
3063 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set)
3064 || any_malformed_asm);
3065 bi->stack_out = regstack;
3071 /* Convert registers in all blocks reachable from BLOCK. Return true if the
3072 CFG has been modified in the process. */
3075 convert_regs_2 (basic_block block)
3077 basic_block *stack, *sp;
3078 bool cfg_altered = false;
3080 /* We process the blocks in a top-down manner, in a way such that one block
3081 is only processed after all its predecessors. The number of predecessors
3082 of every block has already been computed. */
3084 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun));
3096 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3097 some dead EH outgoing edge after the deletion of the trapping
3098 insn inside the block. Since the number of predecessors of
3099 BLOCK's successors was computed based on the initial edge set,
3100 we check the necessity to process some of these successors
3101 before such an edge deletion may happen. However, there is
3102 a pitfall: if BLOCK is the only predecessor of a successor and
3103 the edge between them happens to be deleted, the successor
3104 becomes unreachable and should not be processed. The problem
3105 is that there is no way to preventively detect this case so we
3106 stack the successor in all cases and hand over the task of
3107 fixing up the discrepancy to convert_regs_1. */
3109 FOR_EACH_EDGE (e, ei, block->succs)
3110 if (! (e->flags & EDGE_DFS_BACK))
3112 BLOCK_INFO (e->dest)->predecessors--;
3113 if (!BLOCK_INFO (e->dest)->predecessors)
3117 cfg_altered |= convert_regs_1 (block);
3119 while (sp != stack);
3126 /* Traverse all basic blocks in a function, converting the register
3127 references in each insn from the "flat" register file that gcc uses,
3128 to the stack-like registers the 387 uses. */
3133 bool cfg_altered = false;
3139 /* Initialize uninitialized registers on function entry. */
3140 inserted = convert_regs_entry ();
3142 /* Construct the desired stack for function exit. */
3143 convert_regs_exit ();
3144 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1;
3146 /* ??? Future: process inner loops first, and give them arbitrary
3147 initial stacks which emit_swap_insn can modify. This ought to
3148 prevent double fxch that often appears at the head of a loop. */
3150 /* Process all blocks reachable from all entry points. */
3151 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
3152 cfg_altered |= convert_regs_2 (e->dest);
3154 /* ??? Process all unreachable blocks. Though there's no excuse
3155 for keeping these even when not optimizing. */
3156 FOR_EACH_BB_FN (b, cfun)
3158 block_info bi = BLOCK_INFO (b);
3161 cfg_altered |= convert_regs_2 (b);
3164 /* We must fix up abnormal edges before inserting compensation code
3165 because both mechanisms insert insns on edges. */
3166 inserted |= fixup_abnormal_edges ();
3168 inserted |= compensate_edges ();
3170 clear_aux_for_blocks ();
3173 commit_edge_insertions ();
3179 fputc ('\n', dump_file);
3182 /* Convert register usage from "flat" register file usage to a "stack
3183 register file. FILE is the dump file, if used.
3185 Construct a CFG and run life analysis. Then convert each insn one
3186 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3187 code duplication created when the converter inserts pop insns on
3197 /* Clean up previous run. */
3198 stack_regs_mentioned_data.release ();
3200 /* See if there is something to do. Flow analysis is quite
3201 expensive so we might save some compilation time. */
3202 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3203 if (df_regs_ever_live_p (i))
3205 if (i > LAST_STACK_REG)
3208 df_note_add_problem ();
3211 mark_dfs_back_edges ();
3213 /* Set up block info for each basic block. */
3214 alloc_aux_for_blocks (sizeof (struct block_info_def));
3215 FOR_EACH_BB_FN (bb, cfun)
3217 block_info bi = BLOCK_INFO (bb);
3222 FOR_EACH_EDGE (e, ei, bb->preds)
3223 if (!(e->flags & EDGE_DFS_BACK)
3224 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun))
3227 /* Set current register status at last instruction `uninitialized'. */
3228 bi->stack_in.top = -2;
3230 /* Copy live_at_end and live_at_start into temporaries. */
3231 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3233 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg))
3234 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3235 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg))
3236 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3240 /* Create the replacement registers up front. */
3241 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3243 enum machine_mode mode;
3244 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3246 mode = GET_MODE_WIDER_MODE (mode))
3247 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3248 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3250 mode = GET_MODE_WIDER_MODE (mode))
3251 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3254 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3256 /* A QNaN for initializing uninitialized variables.
3258 ??? We can't load from constant memory in PIC mode, because
3259 we're inserting these instructions before the prologue and
3260 the PIC register hasn't been set up. In that case, fall back
3261 on zero, which we can get from `fldz'. */
3263 if ((flag_pic && !TARGET_64BIT)
3264 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3265 not_a_num = CONST0_RTX (SFmode);
3270 real_nan (&r, "", 1, SFmode);
3271 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode);
3272 not_a_num = force_const_mem (SFmode, not_a_num);
3275 /* Allocate a cache for stack_regs_mentioned. */
3276 max_uid = get_max_uid ();
3277 stack_regs_mentioned_data.create (max_uid + 1);
3278 memset (stack_regs_mentioned_data.address (),
3279 0, sizeof (char) * (max_uid + 1));
3283 free_aux_for_blocks ();
3286 #endif /* STACK_REGS */
3290 const pass_data pass_data_stack_regs =
3292 RTL_PASS, /* type */
3293 "*stack_regs", /* name */
3294 OPTGROUP_NONE, /* optinfo_flags */
3295 false, /* has_execute */
3296 TV_REG_STACK, /* tv_id */
3297 0, /* properties_required */
3298 0, /* properties_provided */
3299 0, /* properties_destroyed */
3300 0, /* todo_flags_start */
3301 0, /* todo_flags_finish */
3304 class pass_stack_regs : public rtl_opt_pass
3307 pass_stack_regs (gcc::context *ctxt)
3308 : rtl_opt_pass (pass_data_stack_regs, ctxt)
3311 /* opt_pass methods: */
3312 virtual bool gate (function *)
3321 }; // class pass_stack_regs
3326 make_pass_stack_regs (gcc::context *ctxt)
3328 return new pass_stack_regs (ctxt);
3331 /* Convert register usage from flat register file usage to a stack
3334 rest_of_handle_stack_regs (void)
3338 regstack_completed = 1;
3345 const pass_data pass_data_stack_regs_run =
3347 RTL_PASS, /* type */
3349 OPTGROUP_NONE, /* optinfo_flags */
3350 true, /* has_execute */
3351 TV_REG_STACK, /* tv_id */
3352 0, /* properties_required */
3353 0, /* properties_provided */
3354 0, /* properties_destroyed */
3355 0, /* todo_flags_start */
3356 ( TODO_df_finish | TODO_verify_rtl_sharing ), /* todo_flags_finish */
3359 class pass_stack_regs_run : public rtl_opt_pass
3362 pass_stack_regs_run (gcc::context *ctxt)
3363 : rtl_opt_pass (pass_data_stack_regs_run, ctxt)
3366 /* opt_pass methods: */
3367 virtual unsigned int execute (function *)
3369 return rest_of_handle_stack_regs ();
3372 }; // class pass_stack_regs_run
3377 make_pass_stack_regs_run (gcc::context *ctxt)
3379 return new pass_stack_regs_run (ctxt);