1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
159 #include "function.h"
160 #include "insn-config.h"
162 #include "hard-reg-set.h"
167 #include "basic-block.h"
173 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178 If TOP is -2, REG[] is not yet initialized. Stack initialization
179 consists of placing each live reg in array `reg' and setting `top'
182 REG_SET indicates which registers are live. */
184 typedef struct stack_def
186 int top; /* index to top stack element */
187 HARD_REG_SET reg_set; /* set of live registers */
188 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
191 /* This is used to carry information about basic blocks. It is
192 attached to the AUX field of the standard CFG block. */
194 typedef struct block_info_def
196 struct stack_def stack_in; /* Input stack configuration. */
197 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
198 int done; /* True if block already converted. */
201 #define BLOCK_INFO(B) ((block_info) (B)->aux)
203 /* Passed to change_stack to indicate where to emit insns. */
210 /* We use this array to cache info about insns, because otherwise we
211 spend too much time in stack_regs_mentioned_p.
213 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
214 the insn uses stack registers, two indicates the insn does not use
216 static varray_type stack_regs_mentioned_data;
218 /* The block we're currently working on. */
219 static basic_block current_block;
221 /* This is the register file for all register after conversion */
223 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
225 #define FP_MODE_REG(regno,mode) \
226 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
228 /* Used to initialize uninitialized registers. */
231 /* Forward declarations */
233 static int stack_regs_mentioned_p PARAMS ((rtx pat));
234 static void straighten_stack PARAMS ((rtx, stack));
235 static void pop_stack PARAMS ((stack, int));
236 static rtx *get_true_reg PARAMS ((rtx *));
238 static int check_asm_stack_operands PARAMS ((rtx));
239 static int get_asm_operand_n_inputs PARAMS ((rtx));
240 static rtx stack_result PARAMS ((tree));
241 static void replace_reg PARAMS ((rtx *, int));
242 static void remove_regno_note PARAMS ((rtx, enum reg_note,
244 static int get_hard_regnum PARAMS ((stack, rtx));
245 static void delete_insn_for_stacker PARAMS ((rtx));
246 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
248 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
249 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
250 static int swap_rtx_condition_1 PARAMS ((rtx));
251 static int swap_rtx_condition PARAMS ((rtx));
252 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
253 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
254 static void subst_asm_stack_regs PARAMS ((rtx, stack));
255 static void subst_stack_regs PARAMS ((rtx, stack));
256 static void change_stack PARAMS ((rtx, stack, stack,
258 static int convert_regs_entry PARAMS ((void));
259 static void convert_regs_exit PARAMS ((void));
260 static int convert_regs_1 PARAMS ((FILE *, basic_block));
261 static int convert_regs_2 PARAMS ((FILE *, basic_block));
262 static int convert_regs PARAMS ((FILE *));
263 static void print_stack PARAMS ((FILE *, stack));
264 static rtx next_flags_user PARAMS ((rtx));
265 static void record_label_references PARAMS ((rtx, rtx));
267 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
270 stack_regs_mentioned_p (pat)
273 register const char *fmt;
276 if (STACK_REG_P (pat))
279 fmt = GET_RTX_FORMAT (GET_CODE (pat));
280 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
286 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
287 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
290 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
297 /* Return nonzero if INSN mentions stacked registers, else return zero. */
300 stack_regs_mentioned (insn)
303 unsigned int uid, max;
309 uid = INSN_UID (insn);
310 max = VARRAY_SIZE (stack_regs_mentioned_data);
313 /* Allocate some extra size to avoid too many reallocs, but
314 do not grow too quickly. */
315 max = uid + uid / 20;
316 VARRAY_GROW (stack_regs_mentioned_data, max);
319 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
322 /* This insn has yet to be examined. Do so now. */
323 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
324 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
330 static rtx ix86_flags_rtx;
333 next_flags_user (insn)
336 /* Search forward looking for the first use of this value.
337 Stop at block boundaries. */
339 while (insn != current_block->end)
341 insn = NEXT_INSN (insn);
343 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
346 if (GET_CODE (insn) == CALL_INSN)
352 /* Reorganise the stack into ascending numbers,
356 straighten_stack (insn, regstack)
360 struct stack_def temp_stack;
363 /* If there is only a single register on the stack, then the stack is
364 already in increasing order and no reorganization is needed.
366 Similarly if the stack is empty. */
367 if (regstack->top <= 0)
370 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
372 for (top = temp_stack.top = regstack->top; top >= 0; top--)
373 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
375 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
378 /* Pop a register from the stack */
381 pop_stack (regstack, regno)
385 int top = regstack->top;
387 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
389 /* If regno was not at the top of stack then adjust stack */
390 if (regstack->reg [top] != regno)
393 for (i = regstack->top; i >= 0; i--)
394 if (regstack->reg [i] == regno)
397 for (j = i; j < top; j++)
398 regstack->reg [j] = regstack->reg [j + 1];
404 /* Convert register usage from "flat" register file usage to a "stack
405 register file. FIRST is the first insn in the function, FILE is the
408 Construct a CFG and run life analysis. Then convert each insn one
409 by one. Run a last jump_optimize pass, if optimizing, to eliminate
410 code duplication created when the converter inserts pop insns on
414 reg_to_stack (first, file)
422 /* See if there is something to do. Flow analysis is quite
423 expensive so we might save some compilation time. */
424 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
425 if (regs_ever_live[i])
427 if (i > LAST_STACK_REG)
430 /* Ok, floating point instructions exist. If not optimizing,
431 build the CFG and run life analysis. */
432 find_basic_blocks (first, max_reg_num (), file);
433 count_or_remove_death_notes (NULL, 1);
434 life_analysis (first, file, PROP_DEATH_NOTES);
436 /* Set up block info for each basic block. */
437 bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi));
438 for (i = n_basic_blocks - 1; i >= 0; --i)
439 BASIC_BLOCK (i)->aux = bi + i;
440 EXIT_BLOCK_PTR->aux = bi + n_basic_blocks;
442 /* Create the replacement registers up front. */
443 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
445 enum machine_mode mode;
446 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
448 mode = GET_MODE_WIDER_MODE (mode))
449 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
450 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
452 mode = GET_MODE_WIDER_MODE (mode))
453 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
456 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
458 /* A QNaN for initializing uninitialized variables.
460 ??? We can't load from constant memory in PIC mode, because
461 we're insertting these instructions before the prologue and
462 the PIC register hasn't been set up. In that case, fall back
463 on zero, which we can get from `ldz'. */
466 nan = CONST0_RTX (SFmode);
469 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
470 nan = force_const_mem (SFmode, nan);
473 /* Allocate a cache for stack_regs_mentioned. */
474 max_uid = get_max_uid ();
475 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
476 "stack_regs_mentioned cache");
478 if (convert_regs (file) && optimize)
479 cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_CROSSJUMP | CLEANUP_POST_REGSTACK);
482 VARRAY_FREE (stack_regs_mentioned_data);
486 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
487 label's chain of references, and note which insn contains each
491 record_label_references (insn, pat)
494 register enum rtx_code code = GET_CODE (pat);
496 register const char *fmt;
498 if (code == LABEL_REF)
500 register rtx label = XEXP (pat, 0);
503 if (GET_CODE (label) != CODE_LABEL)
506 /* If this is an undefined label, LABEL_REFS (label) contains
508 if (INSN_UID (label) == 0)
511 /* Don't make a duplicate in the code_label's chain. */
513 for (ref = LABEL_REFS (label);
515 ref = LABEL_NEXTREF (ref))
516 if (CONTAINING_INSN (ref) == insn)
519 CONTAINING_INSN (pat) = insn;
520 LABEL_NEXTREF (pat) = LABEL_REFS (label);
521 LABEL_REFS (label) = pat;
526 fmt = GET_RTX_FORMAT (code);
527 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
530 record_label_references (insn, XEXP (pat, i));
534 for (j = 0; j < XVECLEN (pat, i); j++)
535 record_label_references (insn, XVECEXP (pat, i, j));
540 /* Return a pointer to the REG expression within PAT. If PAT is not a
541 REG, possible enclosed by a conversion rtx, return the inner part of
542 PAT that stopped the search. */
549 switch (GET_CODE (*pat))
552 /* Eliminate FP subregister accesses in favour of the
553 actual FP register in use. */
556 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
558 int regno_off = subreg_regno_offset (REGNO (subreg),
562 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
571 pat = & XEXP (*pat, 0);
575 /* There are many rules that an asm statement for stack-like regs must
576 follow. Those rules are explained at the top of this file: the rule
577 numbers below refer to that explanation. */
580 check_asm_stack_operands (insn)
585 int malformed_asm = 0;
586 rtx body = PATTERN (insn);
588 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
589 char implicitly_dies[FIRST_PSEUDO_REGISTER];
592 rtx *clobber_reg = 0;
593 int n_inputs, n_outputs;
595 /* Find out what the constraints require. If no constraint
596 alternative matches, this asm is malformed. */
598 constrain_operands (1);
599 alt = which_alternative;
601 preprocess_constraints ();
603 n_inputs = get_asm_operand_n_inputs (body);
604 n_outputs = recog_data.n_operands - n_inputs;
609 /* Avoid further trouble with this insn. */
610 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
614 /* Strip SUBREGs here to make the following code simpler. */
615 for (i = 0; i < recog_data.n_operands; i++)
616 if (GET_CODE (recog_data.operand[i]) == SUBREG
617 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
618 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
620 /* Set up CLOBBER_REG. */
624 if (GET_CODE (body) == PARALLEL)
626 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
628 for (i = 0; i < XVECLEN (body, 0); i++)
629 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
631 rtx clobber = XVECEXP (body, 0, i);
632 rtx reg = XEXP (clobber, 0);
634 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
635 reg = SUBREG_REG (reg);
637 if (STACK_REG_P (reg))
639 clobber_reg[n_clobbers] = reg;
645 /* Enforce rule #4: Output operands must specifically indicate which
646 reg an output appears in after an asm. "=f" is not allowed: the
647 operand constraints must select a class with a single reg.
649 Also enforce rule #5: Output operands must start at the top of
650 the reg-stack: output operands may not "skip" a reg. */
652 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
653 for (i = 0; i < n_outputs; i++)
654 if (STACK_REG_P (recog_data.operand[i]))
656 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
658 error_for_asm (insn, "Output constraint %d must specify a single register", i);
665 for (j = 0; j < n_clobbers; j++)
666 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
668 error_for_asm (insn, "Output constraint %d cannot be specified together with \"%s\" clobber",
669 i, reg_names [REGNO (clobber_reg[j])]);
674 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
679 /* Search for first non-popped reg. */
680 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
681 if (! reg_used_as_output[i])
684 /* If there are any other popped regs, that's an error. */
685 for (; i < LAST_STACK_REG + 1; i++)
686 if (reg_used_as_output[i])
689 if (i != LAST_STACK_REG + 1)
691 error_for_asm (insn, "Output regs must be grouped at top of stack");
695 /* Enforce rule #2: All implicitly popped input regs must be closer
696 to the top of the reg-stack than any input that is not implicitly
699 memset (implicitly_dies, 0, sizeof (implicitly_dies));
700 for (i = n_outputs; i < n_outputs + n_inputs; i++)
701 if (STACK_REG_P (recog_data.operand[i]))
703 /* An input reg is implicitly popped if it is tied to an
704 output, or if there is a CLOBBER for it. */
707 for (j = 0; j < n_clobbers; j++)
708 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
711 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
712 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
715 /* Search for first non-popped reg. */
716 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
717 if (! implicitly_dies[i])
720 /* If there are any other popped regs, that's an error. */
721 for (; i < LAST_STACK_REG + 1; i++)
722 if (implicitly_dies[i])
725 if (i != LAST_STACK_REG + 1)
728 "Implicitly popped regs must be grouped at top of stack");
732 /* Enfore rule #3: If any input operand uses the "f" constraint, all
733 output constraints must use the "&" earlyclobber.
735 ??? Detect this more deterministically by having constrain_asm_operands
736 record any earlyclobber. */
738 for (i = n_outputs; i < n_outputs + n_inputs; i++)
739 if (recog_op_alt[i][alt].matches == -1)
743 for (j = 0; j < n_outputs; j++)
744 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
747 "Output operand %d must use `&' constraint", j);
754 /* Avoid further trouble with this insn. */
755 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
762 /* Calculate the number of inputs and outputs in BODY, an
763 asm_operands. N_OPERANDS is the total number of operands, and
764 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
768 get_asm_operand_n_inputs (body)
771 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
772 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
774 else if (GET_CODE (body) == ASM_OPERANDS)
775 return ASM_OPERANDS_INPUT_LENGTH (body);
777 else if (GET_CODE (body) == PARALLEL
778 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
779 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
781 else if (GET_CODE (body) == PARALLEL
782 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
783 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
788 /* If current function returns its result in an fp stack register,
789 return the REG. Otherwise, return 0. */
797 /* If the value is supposed to be returned in memory, then clearly
798 it is not returned in a stack register. */
799 if (aggregate_value_p (DECL_RESULT (decl)))
802 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
805 #ifdef FUNCTION_OUTGOING_VALUE
807 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
809 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
813 return result != 0 && STACK_REG_P (result) ? result : 0;
818 * This section deals with stack register substitution, and forms the second
822 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
823 the desired hard REGNO. */
826 replace_reg (reg, regno)
830 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
831 || ! STACK_REG_P (*reg))
834 switch (GET_MODE_CLASS (GET_MODE (*reg)))
838 case MODE_COMPLEX_FLOAT:;
841 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
844 /* Remove a note of type NOTE, which must be found, for register
845 number REGNO from INSN. Remove only one such note. */
848 remove_regno_note (insn, note, regno)
853 register rtx *note_link, this;
855 note_link = ®_NOTES(insn);
856 for (this = *note_link; this; this = XEXP (this, 1))
857 if (REG_NOTE_KIND (this) == note
858 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
860 *note_link = XEXP (this, 1);
864 note_link = &XEXP (this, 1);
869 /* Find the hard register number of virtual register REG in REGSTACK.
870 The hard register number is relative to the top of the stack. -1 is
871 returned if the register is not found. */
874 get_hard_regnum (regstack, reg)
880 if (! STACK_REG_P (reg))
883 for (i = regstack->top; i >= 0; i--)
884 if (regstack->reg[i] == REGNO (reg))
887 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
890 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
891 the chain of insns. Doing so could confuse block_begin and block_end
892 if this were the only insn in the block. */
895 delete_insn_for_stacker (insn)
898 PUT_CODE (insn, NOTE);
899 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
900 NOTE_SOURCE_FILE (insn) = 0;
903 /* Emit an insn to pop virtual register REG before or after INSN.
904 REGSTACK is the stack state after INSN and is updated to reflect this
905 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
906 is represented as a SET whose destination is the register to be popped
907 and source is the top of stack. A death note for the top of stack
908 cases the movdf pattern to pop. */
911 emit_pop_insn (insn, regstack, reg, where)
915 enum emit_where where;
917 rtx pop_insn, pop_rtx;
920 /* For complex types take care to pop both halves. These may survive in
921 CLOBBER and USE expressions. */
922 if (COMPLEX_MODE_P (GET_MODE (reg)))
924 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
925 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
928 if (get_hard_regnum (regstack, reg1) >= 0)
929 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
930 if (get_hard_regnum (regstack, reg2) >= 0)
931 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
937 hard_regno = get_hard_regnum (regstack, reg);
939 if (hard_regno < FIRST_STACK_REG)
942 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
943 FP_MODE_REG (FIRST_STACK_REG, DFmode));
945 if (where == EMIT_AFTER)
946 pop_insn = emit_block_insn_after (pop_rtx, insn, current_block);
948 pop_insn = emit_block_insn_before (pop_rtx, insn, current_block);
951 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
952 REG_NOTES (pop_insn));
954 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
955 = regstack->reg[regstack->top];
957 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
962 /* Emit an insn before or after INSN to swap virtual register REG with
963 the top of stack. REGSTACK is the stack state before the swap, and
964 is updated to reflect the swap. A swap insn is represented as a
965 PARALLEL of two patterns: each pattern moves one reg to the other.
967 If REG is already at the top of the stack, no insn is emitted. */
970 emit_swap_insn (insn, regstack, reg)
977 int tmp, other_reg; /* swap regno temps */
978 rtx i1; /* the stack-reg insn prior to INSN */
979 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
981 hard_regno = get_hard_regnum (regstack, reg);
983 if (hard_regno < FIRST_STACK_REG)
985 if (hard_regno == FIRST_STACK_REG)
988 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
990 tmp = regstack->reg[other_reg];
991 regstack->reg[other_reg] = regstack->reg[regstack->top];
992 regstack->reg[regstack->top] = tmp;
994 /* Find the previous insn involving stack regs, but don't pass a
997 if (current_block && insn != current_block->head)
999 rtx tmp = PREV_INSN (insn);
1000 rtx limit = PREV_INSN (current_block->head);
1001 while (tmp != limit)
1003 if (GET_CODE (tmp) == CODE_LABEL
1004 || GET_CODE (tmp) == CALL_INSN
1005 || NOTE_INSN_BASIC_BLOCK_P (tmp)
1006 || (GET_CODE (tmp) == INSN
1007 && stack_regs_mentioned (tmp)))
1012 tmp = PREV_INSN (tmp);
1017 && (i1set = single_set (i1)) != NULL_RTX)
1019 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1020 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1022 /* If the previous register stack push was from the reg we are to
1023 swap with, omit the swap. */
1025 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1026 && GET_CODE (i1src) == REG
1027 && REGNO (i1src) == (unsigned) hard_regno - 1
1028 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1031 /* If the previous insn wrote to the reg we are to swap with,
1034 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno
1035 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1036 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1040 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1041 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1044 emit_block_insn_after (swap_rtx, i1, current_block);
1045 else if (current_block)
1046 emit_block_insn_before (swap_rtx, current_block->head, current_block);
1048 emit_insn_before (swap_rtx, insn);
1051 /* Handle a move to or from a stack register in PAT, which is in INSN.
1052 REGSTACK is the current stack. */
1055 move_for_stack_reg (insn, regstack, pat)
1060 rtx *psrc = get_true_reg (&SET_SRC (pat));
1061 rtx *pdest = get_true_reg (&SET_DEST (pat));
1065 src = *psrc; dest = *pdest;
1067 if (STACK_REG_P (src) && STACK_REG_P (dest))
1069 /* Write from one stack reg to another. If SRC dies here, then
1070 just change the register mapping and delete the insn. */
1072 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1077 /* If this is a no-op move, there must not be a REG_DEAD note. */
1078 if (REGNO (src) == REGNO (dest))
1081 for (i = regstack->top; i >= 0; i--)
1082 if (regstack->reg[i] == REGNO (src))
1085 /* The source must be live, and the dest must be dead. */
1086 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1089 /* It is possible that the dest is unused after this insn.
1090 If so, just pop the src. */
1092 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1094 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1096 delete_insn_for_stacker (insn);
1100 regstack->reg[i] = REGNO (dest);
1102 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1103 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1105 delete_insn_for_stacker (insn);
1110 /* The source reg does not die. */
1112 /* If this appears to be a no-op move, delete it, or else it
1113 will confuse the machine description output patterns. But if
1114 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1115 for REG_UNUSED will not work for deleted insns. */
1117 if (REGNO (src) == REGNO (dest))
1119 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1120 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1122 delete_insn_for_stacker (insn);
1126 /* The destination ought to be dead */
1127 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1130 replace_reg (psrc, get_hard_regnum (regstack, src));
1132 regstack->reg[++regstack->top] = REGNO (dest);
1133 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1134 replace_reg (pdest, FIRST_STACK_REG);
1136 else if (STACK_REG_P (src))
1138 /* Save from a stack reg to MEM, or possibly integer reg. Since
1139 only top of stack may be saved, emit an exchange first if
1142 emit_swap_insn (insn, regstack, src);
1144 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1147 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1149 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1151 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1152 && regstack->top < REG_STACK_SIZE - 1)
1154 /* A 387 cannot write an XFmode value to a MEM without
1155 clobbering the source reg. The output code can handle
1156 this by reading back the value from the MEM.
1157 But it is more efficient to use a temp register if one is
1158 available. Push the source value here if the register
1159 stack is not full, and then write the value to memory via
1161 rtx push_rtx, push_insn;
1162 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1164 if (GET_MODE (src) == TFmode)
1165 push_rtx = gen_movtf (top_stack_reg, top_stack_reg);
1167 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1168 push_insn = emit_insn_before (push_rtx, insn);
1169 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1173 replace_reg (psrc, FIRST_STACK_REG);
1175 else if (STACK_REG_P (dest))
1177 /* Load from MEM, or possibly integer REG or constant, into the
1178 stack regs. The actual target is always the top of the
1179 stack. The stack mapping is changed to reflect that DEST is
1180 now at top of stack. */
1182 /* The destination ought to be dead */
1183 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1186 if (regstack->top >= REG_STACK_SIZE)
1189 regstack->reg[++regstack->top] = REGNO (dest);
1190 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1191 replace_reg (pdest, FIRST_STACK_REG);
1197 /* Swap the condition on a branch, if there is one. Return true if we
1198 found a condition to swap. False if the condition was not used as
1202 swap_rtx_condition_1 (pat)
1205 register const char *fmt;
1206 register int i, r = 0;
1208 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1210 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1215 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1216 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1222 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1223 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1225 else if (fmt[i] == 'e')
1226 r |= swap_rtx_condition_1 (XEXP (pat, i));
1234 swap_rtx_condition (insn)
1237 rtx pat = PATTERN (insn);
1239 /* We're looking for a single set to cc0 or an HImode temporary. */
1241 if (GET_CODE (pat) == SET
1242 && GET_CODE (SET_DEST (pat)) == REG
1243 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1245 insn = next_flags_user (insn);
1246 if (insn == NULL_RTX)
1248 pat = PATTERN (insn);
1251 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1252 not doing anything with the cc value right now. We may be able to
1253 search for one though. */
1255 if (GET_CODE (pat) == SET
1256 && GET_CODE (SET_SRC (pat)) == UNSPEC
1257 && XINT (SET_SRC (pat), 1) == 9)
1259 rtx dest = SET_DEST (pat);
1261 /* Search forward looking for the first use of this value.
1262 Stop at block boundaries. */
1263 while (insn != current_block->end)
1265 insn = NEXT_INSN (insn);
1266 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1268 if (GET_CODE (insn) == CALL_INSN)
1272 /* So we've found the insn using this value. If it is anything
1273 other than sahf, aka unspec 10, or the value does not die
1274 (meaning we'd have to search further), then we must give up. */
1275 pat = PATTERN (insn);
1276 if (GET_CODE (pat) != SET
1277 || GET_CODE (SET_SRC (pat)) != UNSPEC
1278 || XINT (SET_SRC (pat), 1) != 10
1279 || ! dead_or_set_p (insn, dest))
1282 /* Now we are prepared to handle this as a normal cc0 setter. */
1283 insn = next_flags_user (insn);
1284 if (insn == NULL_RTX)
1286 pat = PATTERN (insn);
1289 if (swap_rtx_condition_1 (pat))
1292 INSN_CODE (insn) = -1;
1293 if (recog_memoized (insn) == -1)
1295 /* In case the flags don't die here, recurse to try fix
1296 following user too. */
1297 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1299 insn = next_flags_user (insn);
1300 if (!insn || !swap_rtx_condition (insn))
1305 swap_rtx_condition_1 (pat);
1313 /* Handle a comparison. Special care needs to be taken to avoid
1314 causing comparisons that a 387 cannot do correctly, such as EQ.
1316 Also, a pop insn may need to be emitted. The 387 does have an
1317 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1318 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1322 compare_for_stack_reg (insn, regstack, pat_src)
1328 rtx src1_note, src2_note;
1331 src1 = get_true_reg (&XEXP (pat_src, 0));
1332 src2 = get_true_reg (&XEXP (pat_src, 1));
1333 flags_user = next_flags_user (insn);
1335 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1336 registers that die in this insn - move those to stack top first. */
1337 if ((! STACK_REG_P (*src1)
1338 || (STACK_REG_P (*src2)
1339 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1340 && swap_rtx_condition (insn))
1343 temp = XEXP (pat_src, 0);
1344 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1345 XEXP (pat_src, 1) = temp;
1347 src1 = get_true_reg (&XEXP (pat_src, 0));
1348 src2 = get_true_reg (&XEXP (pat_src, 1));
1350 INSN_CODE (insn) = -1;
1353 /* We will fix any death note later. */
1355 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1357 if (STACK_REG_P (*src2))
1358 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1360 src2_note = NULL_RTX;
1362 emit_swap_insn (insn, regstack, *src1);
1364 replace_reg (src1, FIRST_STACK_REG);
1366 if (STACK_REG_P (*src2))
1367 replace_reg (src2, get_hard_regnum (regstack, *src2));
1371 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1372 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1375 /* If the second operand dies, handle that. But if the operands are
1376 the same stack register, don't bother, because only one death is
1377 needed, and it was just handled. */
1380 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1381 && REGNO (*src1) == REGNO (*src2)))
1383 /* As a special case, two regs may die in this insn if src2 is
1384 next to top of stack and the top of stack also dies. Since
1385 we have already popped src1, "next to top of stack" is really
1386 at top (FIRST_STACK_REG) now. */
1388 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1391 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1392 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1396 /* The 386 can only represent death of the first operand in
1397 the case handled above. In all other cases, emit a separate
1398 pop and remove the death note from here. */
1400 /* link_cc0_insns (insn); */
1402 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1404 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1410 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1411 is the current register layout. */
1414 subst_stack_regs_pat (insn, regstack, pat)
1421 switch (GET_CODE (pat))
1424 /* Deaths in USE insns can happen in non optimizing compilation.
1425 Handle them by popping the dying register. */
1426 src = get_true_reg (&XEXP (pat, 0));
1427 if (STACK_REG_P (*src)
1428 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1430 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1433 /* ??? Uninitialized USE should not happen. */
1434 else if (get_hard_regnum (regstack, *src) == -1)
1442 dest = get_true_reg (&XEXP (pat, 0));
1443 if (STACK_REG_P (*dest))
1445 note = find_reg_note (insn, REG_DEAD, *dest);
1447 if (pat != PATTERN (insn))
1449 /* The fix_truncdi_1 pattern wants to be able to allocate
1450 it's own scratch register. It does this by clobbering
1451 an fp reg so that it is assured of an empty reg-stack
1452 register. If the register is live, kill it now.
1453 Remove the DEAD/UNUSED note so we don't try to kill it
1457 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1460 note = find_reg_note (insn, REG_UNUSED, *dest);
1464 remove_note (insn, note);
1465 replace_reg (dest, LAST_STACK_REG);
1469 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1470 indicates an uninitialized value. Because reload removed
1471 all other clobbers, this must be due to a function
1472 returning without a value. Load up a NaN. */
1475 && get_hard_regnum (regstack, *dest) == -1)
1477 pat = gen_rtx_SET (VOIDmode,
1478 FP_MODE_REG (REGNO (*dest), SFmode),
1480 PATTERN (insn) = pat;
1481 move_for_stack_reg (insn, regstack, pat);
1483 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1484 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1486 pat = gen_rtx_SET (VOIDmode,
1487 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1489 PATTERN (insn) = pat;
1490 move_for_stack_reg (insn, regstack, pat);
1499 rtx *src1 = (rtx *) 0, *src2;
1500 rtx src1_note, src2_note;
1503 dest = get_true_reg (&SET_DEST (pat));
1504 src = get_true_reg (&SET_SRC (pat));
1505 pat_src = SET_SRC (pat);
1507 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1508 if (STACK_REG_P (*src)
1509 || (STACK_REG_P (*dest)
1510 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1511 || GET_CODE (*src) == CONST_DOUBLE)))
1513 move_for_stack_reg (insn, regstack, pat);
1517 switch (GET_CODE (pat_src))
1520 compare_for_stack_reg (insn, regstack, pat_src);
1526 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1529 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1530 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1533 replace_reg (dest, FIRST_STACK_REG);
1537 /* This is a `tstM2' case. */
1538 if (*dest != cc0_rtx)
1544 case FLOAT_TRUNCATE:
1548 /* These insns only operate on the top of the stack. DEST might
1549 be cc0_rtx if we're processing a tstM pattern. Also, it's
1550 possible that the tstM case results in a REG_DEAD note on the
1554 src1 = get_true_reg (&XEXP (pat_src, 0));
1556 emit_swap_insn (insn, regstack, *src1);
1558 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1560 if (STACK_REG_P (*dest))
1561 replace_reg (dest, FIRST_STACK_REG);
1565 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1567 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1570 replace_reg (src1, FIRST_STACK_REG);
1575 /* On i386, reversed forms of subM3 and divM3 exist for
1576 MODE_FLOAT, so the same code that works for addM3 and mulM3
1580 /* These insns can accept the top of stack as a destination
1581 from a stack reg or mem, or can use the top of stack as a
1582 source and some other stack register (possibly top of stack)
1583 as a destination. */
1585 src1 = get_true_reg (&XEXP (pat_src, 0));
1586 src2 = get_true_reg (&XEXP (pat_src, 1));
1588 /* We will fix any death note later. */
1590 if (STACK_REG_P (*src1))
1591 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1593 src1_note = NULL_RTX;
1594 if (STACK_REG_P (*src2))
1595 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1597 src2_note = NULL_RTX;
1599 /* If either operand is not a stack register, then the dest
1600 must be top of stack. */
1602 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1603 emit_swap_insn (insn, regstack, *dest);
1606 /* Both operands are REG. If neither operand is already
1607 at the top of stack, choose to make the one that is the dest
1608 the new top of stack. */
1610 int src1_hard_regnum, src2_hard_regnum;
1612 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1613 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1614 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1617 if (src1_hard_regnum != FIRST_STACK_REG
1618 && src2_hard_regnum != FIRST_STACK_REG)
1619 emit_swap_insn (insn, regstack, *dest);
1622 if (STACK_REG_P (*src1))
1623 replace_reg (src1, get_hard_regnum (regstack, *src1));
1624 if (STACK_REG_P (*src2))
1625 replace_reg (src2, get_hard_regnum (regstack, *src2));
1629 rtx src1_reg = XEXP (src1_note, 0);
1631 /* If the register that dies is at the top of stack, then
1632 the destination is somewhere else - merely substitute it.
1633 But if the reg that dies is not at top of stack, then
1634 move the top of stack to the dead reg, as though we had
1635 done the insn and then a store-with-pop. */
1637 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1639 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1640 replace_reg (dest, get_hard_regnum (regstack, *dest));
1644 int regno = get_hard_regnum (regstack, src1_reg);
1646 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1647 replace_reg (dest, regno);
1649 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1650 = regstack->reg[regstack->top];
1653 CLEAR_HARD_REG_BIT (regstack->reg_set,
1654 REGNO (XEXP (src1_note, 0)));
1655 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1660 rtx src2_reg = XEXP (src2_note, 0);
1661 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1663 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1664 replace_reg (dest, get_hard_regnum (regstack, *dest));
1668 int regno = get_hard_regnum (regstack, src2_reg);
1670 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1671 replace_reg (dest, regno);
1673 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1674 = regstack->reg[regstack->top];
1677 CLEAR_HARD_REG_BIT (regstack->reg_set,
1678 REGNO (XEXP (src2_note, 0)));
1679 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1684 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1685 replace_reg (dest, get_hard_regnum (regstack, *dest));
1688 /* Keep operand 1 maching with destination. */
1689 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1690 && REG_P (*src1) && REG_P (*src2)
1691 && REGNO (*src1) != REGNO (*dest))
1693 int tmp = REGNO (*src1);
1694 replace_reg (src1, REGNO (*src2));
1695 replace_reg (src2, tmp);
1700 switch (XINT (pat_src, 1))
1704 /* These insns only operate on the top of the stack. */
1706 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1708 emit_swap_insn (insn, regstack, *src1);
1710 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1712 if (STACK_REG_P (*dest))
1713 replace_reg (dest, FIRST_STACK_REG);
1717 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1719 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1722 replace_reg (src1, FIRST_STACK_REG);
1726 /* (unspec [(unspec [(compare ..)] 9)] 10)
1727 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1728 matches the PPRO fcomi instruction. */
1730 pat_src = XVECEXP (pat_src, 0, 0);
1731 if (GET_CODE (pat_src) != UNSPEC
1732 || XINT (pat_src, 1) != 9)
1737 /* (unspec [(compare ..)] 9) */
1738 /* Combined fcomp+fnstsw generated for doing well with
1739 CSE. When optimizing this would have been broken
1742 pat_src = XVECEXP (pat_src, 0, 0);
1743 if (GET_CODE (pat_src) != COMPARE)
1746 compare_for_stack_reg (insn, regstack, pat_src);
1755 /* This insn requires the top of stack to be the destination. */
1757 /* If the comparison operator is an FP comparison operator,
1758 it is handled correctly by compare_for_stack_reg () who
1759 will move the destination to the top of stack. But if the
1760 comparison operator is not an FP comparison operator, we
1761 have to handle it here. */
1762 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1763 && REGNO (*dest) != regstack->reg[regstack->top])
1764 emit_swap_insn (insn, regstack, *dest);
1766 src1 = get_true_reg (&XEXP (pat_src, 1));
1767 src2 = get_true_reg (&XEXP (pat_src, 2));
1769 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1770 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1777 src_note[1] = src1_note;
1778 src_note[2] = src2_note;
1780 if (STACK_REG_P (*src1))
1781 replace_reg (src1, get_hard_regnum (regstack, *src1));
1782 if (STACK_REG_P (*src2))
1783 replace_reg (src2, get_hard_regnum (regstack, *src2));
1785 for (i = 1; i <= 2; i++)
1788 int regno = REGNO (XEXP (src_note[i], 0));
1790 /* If the register that dies is not at the top of
1791 stack, then move the top of stack to the dead reg */
1792 if (regno != regstack->reg[regstack->top])
1794 remove_regno_note (insn, REG_DEAD, regno);
1795 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1800 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
1801 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
1807 /* Make dest the top of stack. Add dest to regstack if
1809 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1810 regstack->reg[++regstack->top] = REGNO (*dest);
1811 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1812 replace_reg (dest, FIRST_STACK_REG);
1826 /* Substitute hard regnums for any stack regs in INSN, which has
1827 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1828 before the insn, and is updated with changes made here.
1830 There are several requirements and assumptions about the use of
1831 stack-like regs in asm statements. These rules are enforced by
1832 record_asm_stack_regs; see comments there for details. Any
1833 asm_operands left in the RTL at this point may be assume to meet the
1834 requirements, since record_asm_stack_regs removes any problem asm. */
1837 subst_asm_stack_regs (insn, regstack)
1841 rtx body = PATTERN (insn);
1844 rtx *note_reg; /* Array of note contents */
1845 rtx **note_loc; /* Address of REG field of each note */
1846 enum reg_note *note_kind; /* The type of each note */
1848 rtx *clobber_reg = 0;
1849 rtx **clobber_loc = 0;
1851 struct stack_def temp_stack;
1856 int n_inputs, n_outputs;
1858 if (! check_asm_stack_operands (insn))
1861 /* Find out what the constraints required. If no constraint
1862 alternative matches, that is a compiler bug: we should have caught
1863 such an insn in check_asm_stack_operands. */
1864 extract_insn (insn);
1865 constrain_operands (1);
1866 alt = which_alternative;
1868 preprocess_constraints ();
1870 n_inputs = get_asm_operand_n_inputs (body);
1871 n_outputs = recog_data.n_operands - n_inputs;
1876 /* Strip SUBREGs here to make the following code simpler. */
1877 for (i = 0; i < recog_data.n_operands; i++)
1878 if (GET_CODE (recog_data.operand[i]) == SUBREG
1879 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1881 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1882 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1885 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1887 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1890 note_reg = (rtx *) alloca (i * sizeof (rtx));
1891 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1892 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1895 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1897 rtx reg = XEXP (note, 0);
1898 rtx *loc = & XEXP (note, 0);
1900 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1902 loc = & SUBREG_REG (reg);
1903 reg = SUBREG_REG (reg);
1906 if (STACK_REG_P (reg)
1907 && (REG_NOTE_KIND (note) == REG_DEAD
1908 || REG_NOTE_KIND (note) == REG_UNUSED))
1910 note_reg[n_notes] = reg;
1911 note_loc[n_notes] = loc;
1912 note_kind[n_notes] = REG_NOTE_KIND (note);
1917 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1921 if (GET_CODE (body) == PARALLEL)
1923 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1924 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1926 for (i = 0; i < XVECLEN (body, 0); i++)
1927 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1929 rtx clobber = XVECEXP (body, 0, i);
1930 rtx reg = XEXP (clobber, 0);
1931 rtx *loc = & XEXP (clobber, 0);
1933 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1935 loc = & SUBREG_REG (reg);
1936 reg = SUBREG_REG (reg);
1939 if (STACK_REG_P (reg))
1941 clobber_reg[n_clobbers] = reg;
1942 clobber_loc[n_clobbers] = loc;
1948 temp_stack = *regstack;
1950 /* Put the input regs into the desired place in TEMP_STACK. */
1952 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1953 if (STACK_REG_P (recog_data.operand[i])
1954 && reg_class_subset_p (recog_op_alt[i][alt].class,
1956 && recog_op_alt[i][alt].class != FLOAT_REGS)
1958 /* If an operand needs to be in a particular reg in
1959 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1960 these constraints are for single register classes, and
1961 reload guaranteed that operand[i] is already in that class,
1962 we can just use REGNO (recog_data.operand[i]) to know which
1963 actual reg this operand needs to be in. */
1965 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
1970 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
1972 /* recog_data.operand[i] is not in the right place. Find
1973 it and swap it with whatever is already in I's place.
1974 K is where recog_data.operand[i] is now. J is where it
1978 k = temp_stack.top - (regno - FIRST_STACK_REG);
1980 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
1982 temp = temp_stack.reg[k];
1983 temp_stack.reg[k] = temp_stack.reg[j];
1984 temp_stack.reg[j] = temp;
1988 /* Emit insns before INSN to make sure the reg-stack is in the right
1991 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1993 /* Make the needed input register substitutions. Do death notes and
1994 clobbers too, because these are for inputs, not outputs. */
1996 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1997 if (STACK_REG_P (recog_data.operand[i]))
1999 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2004 replace_reg (recog_data.operand_loc[i], regnum);
2007 for (i = 0; i < n_notes; i++)
2008 if (note_kind[i] == REG_DEAD)
2010 int regnum = get_hard_regnum (regstack, note_reg[i]);
2015 replace_reg (note_loc[i], regnum);
2018 for (i = 0; i < n_clobbers; i++)
2020 /* It's OK for a CLOBBER to reference a reg that is not live.
2021 Don't try to replace it in that case. */
2022 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2026 /* Sigh - clobbers always have QImode. But replace_reg knows
2027 that these regs can't be MODE_INT and will abort. Just put
2028 the right reg there without calling replace_reg. */
2030 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2034 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2036 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2037 if (STACK_REG_P (recog_data.operand[i]))
2039 /* An input reg is implicitly popped if it is tied to an
2040 output, or if there is a CLOBBER for it. */
2043 for (j = 0; j < n_clobbers; j++)
2044 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2047 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2049 /* recog_data.operand[i] might not be at the top of stack.
2050 But that's OK, because all we need to do is pop the
2051 right number of regs off of the top of the reg-stack.
2052 record_asm_stack_regs guaranteed that all implicitly
2053 popped regs were grouped at the top of the reg-stack. */
2055 CLEAR_HARD_REG_BIT (regstack->reg_set,
2056 regstack->reg[regstack->top]);
2061 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2062 Note that there isn't any need to substitute register numbers.
2063 ??? Explain why this is true. */
2065 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2067 /* See if there is an output for this hard reg. */
2070 for (j = 0; j < n_outputs; j++)
2071 if (STACK_REG_P (recog_data.operand[j])
2072 && REGNO (recog_data.operand[j]) == (unsigned) i)
2074 regstack->reg[++regstack->top] = i;
2075 SET_HARD_REG_BIT (regstack->reg_set, i);
2080 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2081 input that the asm didn't implicitly pop. If the asm didn't
2082 implicitly pop an input reg, that reg will still be live.
2084 Note that we can't use find_regno_note here: the register numbers
2085 in the death notes have already been substituted. */
2087 for (i = 0; i < n_outputs; i++)
2088 if (STACK_REG_P (recog_data.operand[i]))
2092 for (j = 0; j < n_notes; j++)
2093 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2094 && note_kind[j] == REG_UNUSED)
2096 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2102 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2103 if (STACK_REG_P (recog_data.operand[i]))
2107 for (j = 0; j < n_notes; j++)
2108 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2109 && note_kind[j] == REG_DEAD
2110 && TEST_HARD_REG_BIT (regstack->reg_set,
2111 REGNO (recog_data.operand[i])))
2113 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2120 /* Substitute stack hard reg numbers for stack virtual registers in
2121 INSN. Non-stack register numbers are not changed. REGSTACK is the
2122 current stack content. Insns may be emitted as needed to arrange the
2123 stack for the 387 based on the contents of the insn. */
2126 subst_stack_regs (insn, regstack)
2130 register rtx *note_link, note;
2133 if (GET_CODE (insn) == CALL_INSN)
2135 int top = regstack->top;
2137 /* If there are any floating point parameters to be passed in
2138 registers for this call, make sure they are in the right
2143 straighten_stack (PREV_INSN (insn), regstack);
2145 /* Now mark the arguments as dead after the call. */
2147 while (regstack->top >= 0)
2149 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2155 /* Do the actual substitution if any stack regs are mentioned.
2156 Since we only record whether entire insn mentions stack regs, and
2157 subst_stack_regs_pat only works for patterns that contain stack regs,
2158 we must check each pattern in a parallel here. A call_value_pop could
2161 if (stack_regs_mentioned (insn))
2163 int n_operands = asm_noperands (PATTERN (insn));
2164 if (n_operands >= 0)
2166 /* This insn is an `asm' with operands. Decode the operands,
2167 decide how many are inputs, and do register substitution.
2168 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2170 subst_asm_stack_regs (insn, regstack);
2174 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2175 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2177 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2178 subst_stack_regs_pat (insn, regstack,
2179 XVECEXP (PATTERN (insn), 0, i));
2182 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2185 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2186 REG_UNUSED will already have been dealt with, so just return. */
2188 if (GET_CODE (insn) == NOTE)
2191 /* If there is a REG_UNUSED note on a stack register on this insn,
2192 the indicated reg must be popped. The REG_UNUSED note is removed,
2193 since the form of the newly emitted pop insn references the reg,
2194 making it no longer `unset'. */
2196 note_link = ®_NOTES(insn);
2197 for (note = *note_link; note; note = XEXP (note, 1))
2198 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2200 *note_link = XEXP (note, 1);
2201 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2204 note_link = &XEXP (note, 1);
2207 /* Change the organization of the stack so that it fits a new basic
2208 block. Some registers might have to be popped, but there can never be
2209 a register live in the new block that is not now live.
2211 Insert any needed insns before or after INSN, as indicated by
2212 WHERE. OLD is the original stack layout, and NEW is the desired
2213 form. OLD is updated to reflect the code emitted, ie, it will be
2214 the same as NEW upon return.
2216 This function will not preserve block_end[]. But that information
2217 is no longer needed once this has executed. */
2220 change_stack (insn, old, new, where)
2224 enum emit_where where;
2229 /* We will be inserting new insns "backwards". If we are to insert
2230 after INSN, find the next insn, and insert before it. */
2232 if (where == EMIT_AFTER)
2234 if (current_block && current_block->end == insn)
2236 insn = NEXT_INSN (insn);
2239 /* Pop any registers that are not needed in the new block. */
2241 for (reg = old->top; reg >= 0; reg--)
2242 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2243 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2248 /* If the new block has never been processed, then it can inherit
2249 the old stack order. */
2251 new->top = old->top;
2252 memcpy (new->reg, old->reg, sizeof (new->reg));
2256 /* This block has been entered before, and we must match the
2257 previously selected stack order. */
2259 /* By now, the only difference should be the order of the stack,
2260 not their depth or liveliness. */
2262 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2265 if (old->top != new->top)
2268 /* If the stack is not empty (new->top != -1), loop here emitting
2269 swaps until the stack is correct.
2271 The worst case number of swaps emitted is N + 2, where N is the
2272 depth of the stack. In some cases, the reg at the top of
2273 stack may be correct, but swapped anyway in order to fix
2274 other regs. But since we never swap any other reg away from
2275 its correct slot, this algorithm will converge. */
2280 /* Swap the reg at top of stack into the position it is
2281 supposed to be in, until the correct top of stack appears. */
2283 while (old->reg[old->top] != new->reg[new->top])
2285 for (reg = new->top; reg >= 0; reg--)
2286 if (new->reg[reg] == old->reg[old->top])
2292 emit_swap_insn (insn, old,
2293 FP_MODE_REG (old->reg[reg], DFmode));
2296 /* See if any regs remain incorrect. If so, bring an
2297 incorrect reg to the top of stack, and let the while loop
2300 for (reg = new->top; reg >= 0; reg--)
2301 if (new->reg[reg] != old->reg[reg])
2303 emit_swap_insn (insn, old,
2304 FP_MODE_REG (old->reg[reg], DFmode));
2309 /* At this point there must be no differences. */
2311 for (reg = old->top; reg >= 0; reg--)
2312 if (old->reg[reg] != new->reg[reg])
2317 current_block->end = PREV_INSN (insn);
2320 /* Print stack configuration. */
2323 print_stack (file, s)
2331 fprintf (file, "uninitialized\n");
2332 else if (s->top == -1)
2333 fprintf (file, "empty\n");
2338 for (i = 0; i <= s->top; ++i)
2339 fprintf (file, "%d ", s->reg[i]);
2340 fputs ("]\n", file);
2344 /* This function was doing life analysis. We now let the regular live
2345 code do it's job, so we only need to check some extra invariants
2346 that reg-stack expects. Primary among these being that all registers
2347 are initialized before use.
2349 The function returns true when code was emitted to CFG edges and
2350 commit_edge_insertions needs to be called. */
2353 convert_regs_entry ()
2355 int inserted = 0, i;
2358 for (i = n_basic_blocks - 1; i >= 0; --i)
2360 basic_block block = BASIC_BLOCK (i);
2361 block_info bi = BLOCK_INFO (block);
2364 /* Set current register status at last instruction `uninitialized'. */
2365 bi->stack_in.top = -2;
2367 /* Copy live_at_end and live_at_start into temporaries. */
2368 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2370 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2371 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2372 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2373 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2377 /* Load something into each stack register live at function entry.
2378 Such live registers can be caused by uninitialized variables or
2379 functions not returning values on all paths. In order to keep
2380 the push/pop code happy, and to not scrog the register stack, we
2381 must put something in these registers. Use a QNaN.
2383 Note that we are insertting converted code here. This code is
2384 never seen by the convert_regs pass. */
2386 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2388 basic_block block = e->dest;
2389 block_info bi = BLOCK_INFO (block);
2392 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2393 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2397 bi->stack_in.reg[++top] = reg;
2399 init = gen_rtx_SET (VOIDmode,
2400 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2402 insert_insn_on_edge (init, e);
2406 bi->stack_in.top = top;
2412 /* Construct the desired stack for function exit. This will either
2413 be `empty', or the function return value at top-of-stack. */
2416 convert_regs_exit ()
2418 int value_reg_low, value_reg_high;
2422 retvalue = stack_result (current_function_decl);
2423 value_reg_low = value_reg_high = -1;
2426 value_reg_low = REGNO (retvalue);
2427 value_reg_high = value_reg_low
2428 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2431 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2432 if (value_reg_low == -1)
2433 output_stack->top = -1;
2438 output_stack->top = value_reg_high - value_reg_low;
2439 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2441 output_stack->reg[reg - value_reg_low] = reg;
2442 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2447 /* Convert stack register references in one block. */
2450 convert_regs_1 (file, block)
2454 struct stack_def regstack, tmpstack;
2455 block_info bi = BLOCK_INFO (block);
2460 current_block = block;
2464 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2465 print_stack (file, &bi->stack_in);
2468 /* Process all insns in this block. Keep track of NEXT so that we
2469 don't process insns emitted while substituting in INSN. */
2471 regstack = bi->stack_in;
2475 next = NEXT_INSN (insn);
2477 /* Ensure we have not missed a block boundary. */
2480 if (insn == block->end)
2483 /* Don't bother processing unless there is a stack reg
2484 mentioned or if it's a CALL_INSN. */
2485 if (stack_regs_mentioned (insn)
2486 || GET_CODE (insn) == CALL_INSN)
2490 fprintf (file, " insn %d input stack: ",
2492 print_stack (file, ®stack);
2494 subst_stack_regs (insn, ®stack);
2501 fprintf (file, "Expected live registers [");
2502 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2503 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2504 fprintf (file, " %d", reg);
2505 fprintf (file, " ]\nOutput stack: ");
2506 print_stack (file, ®stack);
2510 if (GET_CODE (insn) == JUMP_INSN)
2511 insn = PREV_INSN (insn);
2513 /* If the function is declared to return a value, but it returns one
2514 in only some cases, some registers might come live here. Emit
2515 necessary moves for them. */
2517 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2519 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2520 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2526 fprintf (file, "Emitting insn initializing reg %d\n",
2530 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2532 insn = emit_block_insn_after (set, insn, block);
2533 subst_stack_regs (insn, ®stack);
2537 /* Something failed if the stack lives don't match. */
2538 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2542 /* Adjust the stack of this block on exit to match the stack of the
2543 target block, or copy stack info into the stack of the successor
2544 of the successor hasn't been processed yet. */
2546 for (e = block->succ; e ; e = e->succ_next)
2548 basic_block target = e->dest;
2549 stack target_stack = &BLOCK_INFO (target)->stack_in;
2552 fprintf (file, "Edge to block %d: ", target->index);
2554 if (target_stack->top == -2)
2556 /* The target block hasn't had a stack order selected.
2557 We need merely ensure that no pops are needed. */
2558 for (reg = regstack.top; reg >= 0; --reg)
2559 if (! TEST_HARD_REG_BIT (target_stack->reg_set,
2566 fprintf (file, "new block; copying stack position\n");
2568 /* change_stack kills values in regstack. */
2569 tmpstack = regstack;
2571 change_stack (block->end, &tmpstack,
2572 target_stack, EMIT_AFTER);
2577 fprintf (file, "new block; pops needed\n");
2581 if (target_stack->top == regstack.top)
2583 for (reg = target_stack->top; reg >= 0; --reg)
2584 if (target_stack->reg[reg] != regstack.reg[reg])
2590 fprintf (file, "no changes needed\n");
2597 fprintf (file, "correcting stack to ");
2598 print_stack (file, target_stack);
2602 /* Care for non-call EH edges specially. The normal return path have
2603 values in registers. These will be popped en masse by the unwind
2605 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2606 target_stack->top = -1;
2608 /* Other calls may appear to have values live in st(0), but the
2609 abnormal return path will not have actually loaded the values. */
2610 else if (e->flags & EDGE_ABNORMAL_CALL)
2612 /* Assert that the lifetimes are as we expect -- one value
2613 live at st(0) on the end of the source block, and no
2614 values live at the beginning of the destination block. */
2617 CLEAR_HARD_REG_SET (tmp);
2618 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2622 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2623 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2627 target_stack->top = -1;
2630 /* It is better to output directly to the end of the block
2631 instead of to the edge, because emit_swap can do minimal
2632 insn scheduling. We can do this when there is only one
2633 edge out, and it is not abnormal. */
2634 else if (block->succ->succ_next == NULL
2635 && ! (e->flags & EDGE_ABNORMAL))
2637 /* change_stack kills values in regstack. */
2638 tmpstack = regstack;
2640 change_stack (block->end, &tmpstack, target_stack,
2641 (GET_CODE (block->end) == JUMP_INSN
2642 ? EMIT_BEFORE : EMIT_AFTER));
2648 /* We don't support abnormal edges. Global takes care to
2649 avoid any live register across them, so we should never
2650 have to insert instructions on such edges. */
2651 if (e->flags & EDGE_ABNORMAL)
2654 current_block = NULL;
2657 /* ??? change_stack needs some point to emit insns after.
2658 Also needed to keep gen_sequence from returning a
2659 pattern as opposed to a sequence, which would lose
2661 after = emit_note (NULL, NOTE_INSN_DELETED);
2663 tmpstack = regstack;
2664 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2666 seq = gen_sequence ();
2669 insert_insn_on_edge (seq, e);
2671 current_block = block;
2678 /* Convert registers in all blocks reachable from BLOCK. */
2681 convert_regs_2 (file, block)
2685 basic_block *stack, *sp;
2688 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2692 BLOCK_INFO (block)->done = 1;
2700 inserted |= convert_regs_1 (file, block);
2702 for (e = block->succ; e ; e = e->succ_next)
2703 if (! BLOCK_INFO (e->dest)->done)
2706 BLOCK_INFO (e->dest)->done = 1;
2709 while (sp != stack);
2714 /* Traverse all basic blocks in a function, converting the register
2715 references in each insn from the "flat" register file that gcc uses,
2716 to the stack-like registers the 387 uses. */
2725 /* Initialize uninitialized registers on function entry. */
2726 inserted = convert_regs_entry ();
2728 /* Construct the desired stack for function exit. */
2729 convert_regs_exit ();
2730 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2732 /* ??? Future: process inner loops first, and give them arbitrary
2733 initial stacks which emit_swap_insn can modify. This ought to
2734 prevent double fxch that aften appears at the head of a loop. */
2736 /* Process all blocks reachable from all entry points. */
2737 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2738 inserted |= convert_regs_2 (file, e->dest);
2740 /* ??? Process all unreachable blocks. Though there's no excuse
2741 for keeping these even when not optimizing. */
2742 for (i = 0; i < n_basic_blocks; ++i)
2744 basic_block b = BASIC_BLOCK (i);
2745 block_info bi = BLOCK_INFO (b);
2751 /* Create an arbitrary input stack. */
2752 bi->stack_in.top = -1;
2753 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2754 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2755 bi->stack_in.reg[++bi->stack_in.top] = reg;
2757 inserted |= convert_regs_2 (file, b);
2762 commit_edge_insertions ();
2769 #endif /* STACK_REGS */