1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
159 #include "function.h"
160 #include "insn-config.h"
162 #include "hard-reg-set.h"
167 #include "basic-block.h"
173 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178 If TOP is -2, REG[] is not yet initialized. Stack initialization
179 consists of placing each live reg in array `reg' and setting `top'
182 REG_SET indicates which registers are live. */
184 typedef struct stack_def
186 int top; /* index to top stack element */
187 HARD_REG_SET reg_set; /* set of live registers */
188 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
191 /* This is used to carry information about basic blocks. It is
192 attached to the AUX field of the standard CFG block. */
194 typedef struct block_info_def
196 struct stack_def stack_in; /* Input stack configuration. */
197 struct stack_def stack_out; /* Output stack configuration. */
198 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
199 int done; /* True if block already converted. */
200 int predecessors; /* Number of predecessors that needs
204 #define BLOCK_INFO(B) ((block_info) (B)->aux)
206 /* Passed to change_stack to indicate where to emit insns. */
213 /* We use this array to cache info about insns, because otherwise we
214 spend too much time in stack_regs_mentioned_p.
216 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
217 the insn uses stack registers, two indicates the insn does not use
219 static varray_type stack_regs_mentioned_data;
221 /* The block we're currently working on. */
222 static basic_block current_block;
224 /* This is the register file for all register after conversion */
226 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
228 #define FP_MODE_REG(regno,mode) \
229 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
231 /* Used to initialize uninitialized registers. */
234 /* Forward declarations */
236 static int stack_regs_mentioned_p PARAMS ((rtx pat));
237 static void straighten_stack PARAMS ((rtx, stack));
238 static void pop_stack PARAMS ((stack, int));
239 static rtx *get_true_reg PARAMS ((rtx *));
241 static int check_asm_stack_operands PARAMS ((rtx));
242 static int get_asm_operand_n_inputs PARAMS ((rtx));
243 static rtx stack_result PARAMS ((tree));
244 static void replace_reg PARAMS ((rtx *, int));
245 static void remove_regno_note PARAMS ((rtx, enum reg_note,
247 static int get_hard_regnum PARAMS ((stack, rtx));
248 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
250 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
251 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
252 static int swap_rtx_condition_1 PARAMS ((rtx));
253 static int swap_rtx_condition PARAMS ((rtx));
254 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
255 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
256 static void subst_asm_stack_regs PARAMS ((rtx, stack));
257 static void subst_stack_regs PARAMS ((rtx, stack));
258 static void change_stack PARAMS ((rtx, stack, stack,
260 static int convert_regs_entry PARAMS ((void));
261 static void convert_regs_exit PARAMS ((void));
262 static int convert_regs_1 PARAMS ((FILE *, basic_block));
263 static int convert_regs_2 PARAMS ((FILE *, basic_block));
264 static int convert_regs PARAMS ((FILE *));
265 static void print_stack PARAMS ((FILE *, stack));
266 static rtx next_flags_user PARAMS ((rtx));
267 static void record_label_references PARAMS ((rtx, rtx));
268 static bool compensate_edge PARAMS ((edge, FILE *));
270 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
273 stack_regs_mentioned_p (pat)
279 if (STACK_REG_P (pat))
282 fmt = GET_RTX_FORMAT (GET_CODE (pat));
283 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
289 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
290 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
293 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
300 /* Return nonzero if INSN mentions stacked registers, else return zero. */
303 stack_regs_mentioned (insn)
306 unsigned int uid, max;
309 if (! INSN_P (insn) || !stack_regs_mentioned_data)
312 uid = INSN_UID (insn);
313 max = VARRAY_SIZE (stack_regs_mentioned_data);
316 /* Allocate some extra size to avoid too many reallocs, but
317 do not grow too quickly. */
318 max = uid + uid / 20;
319 VARRAY_GROW (stack_regs_mentioned_data, max);
322 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
325 /* This insn has yet to be examined. Do so now. */
326 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
327 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
333 static rtx ix86_flags_rtx;
336 next_flags_user (insn)
339 /* Search forward looking for the first use of this value.
340 Stop at block boundaries. */
342 while (insn != current_block->end)
344 insn = NEXT_INSN (insn);
346 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
349 if (GET_CODE (insn) == CALL_INSN)
355 /* Reorganise the stack into ascending numbers,
359 straighten_stack (insn, regstack)
363 struct stack_def temp_stack;
366 /* If there is only a single register on the stack, then the stack is
367 already in increasing order and no reorganization is needed.
369 Similarly if the stack is empty. */
370 if (regstack->top <= 0)
373 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
375 for (top = temp_stack.top = regstack->top; top >= 0; top--)
376 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
378 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
381 /* Pop a register from the stack */
384 pop_stack (regstack, regno)
388 int top = regstack->top;
390 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
392 /* If regno was not at the top of stack then adjust stack */
393 if (regstack->reg [top] != regno)
396 for (i = regstack->top; i >= 0; i--)
397 if (regstack->reg [i] == regno)
400 for (j = i; j < top; j++)
401 regstack->reg [j] = regstack->reg [j + 1];
407 /* Convert register usage from "flat" register file usage to a "stack
408 register file. FIRST is the first insn in the function, FILE is the
411 Construct a CFG and run life analysis. Then convert each insn one
412 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
413 code duplication created when the converter inserts pop insns on
417 reg_to_stack (first, file)
424 /* Clean up previous run. */
425 if (stack_regs_mentioned_data)
427 VARRAY_FREE (stack_regs_mentioned_data);
428 stack_regs_mentioned_data = 0;
434 /* See if there is something to do. Flow analysis is quite
435 expensive so we might save some compilation time. */
436 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
437 if (regs_ever_live[i])
439 if (i > LAST_STACK_REG)
442 /* Ok, floating point instructions exist. If not optimizing,
443 build the CFG and run life analysis. */
446 find_basic_blocks (first, max_reg_num (), file);
447 count_or_remove_death_notes (NULL, 1);
448 life_analysis (first, file, PROP_DEATH_NOTES);
450 mark_dfs_back_edges ();
452 /* Set up block info for each basic block. */
453 alloc_aux_for_blocks (sizeof (struct block_info_def));
454 FOR_ALL_BB_REVERSE (bb)
457 for (e = bb->pred; e; e=e->pred_next)
458 if (!(e->flags & EDGE_DFS_BACK)
459 && e->src != ENTRY_BLOCK_PTR)
460 BLOCK_INFO (bb)->predecessors++;
463 /* Create the replacement registers up front. */
464 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
466 enum machine_mode mode;
467 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
469 mode = GET_MODE_WIDER_MODE (mode))
470 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
471 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
473 mode = GET_MODE_WIDER_MODE (mode))
474 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
477 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
479 /* A QNaN for initializing uninitialized variables.
481 ??? We can't load from constant memory in PIC mode, because
482 we're insertting these instructions before the prologue and
483 the PIC register hasn't been set up. In that case, fall back
484 on zero, which we can get from `ldz'. */
487 nan = CONST0_RTX (SFmode);
490 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
491 nan = force_const_mem (SFmode, nan);
494 /* Allocate a cache for stack_regs_mentioned. */
495 max_uid = get_max_uid ();
496 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
497 "stack_regs_mentioned cache");
501 free_aux_for_blocks ();
504 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
505 label's chain of references, and note which insn contains each
509 record_label_references (insn, pat)
512 enum rtx_code code = GET_CODE (pat);
516 if (code == LABEL_REF)
518 rtx label = XEXP (pat, 0);
521 if (GET_CODE (label) != CODE_LABEL)
524 /* If this is an undefined label, LABEL_REFS (label) contains
526 if (INSN_UID (label) == 0)
529 /* Don't make a duplicate in the code_label's chain. */
531 for (ref = LABEL_REFS (label);
533 ref = LABEL_NEXTREF (ref))
534 if (CONTAINING_INSN (ref) == insn)
537 CONTAINING_INSN (pat) = insn;
538 LABEL_NEXTREF (pat) = LABEL_REFS (label);
539 LABEL_REFS (label) = pat;
544 fmt = GET_RTX_FORMAT (code);
545 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
548 record_label_references (insn, XEXP (pat, i));
552 for (j = 0; j < XVECLEN (pat, i); j++)
553 record_label_references (insn, XVECEXP (pat, i, j));
558 /* Return a pointer to the REG expression within PAT. If PAT is not a
559 REG, possible enclosed by a conversion rtx, return the inner part of
560 PAT that stopped the search. */
567 switch (GET_CODE (*pat))
570 /* Eliminate FP subregister accesses in favour of the
571 actual FP register in use. */
574 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
576 int regno_off = subreg_regno_offset (REGNO (subreg),
580 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
589 pat = & XEXP (*pat, 0);
593 /* There are many rules that an asm statement for stack-like regs must
594 follow. Those rules are explained at the top of this file: the rule
595 numbers below refer to that explanation. */
598 check_asm_stack_operands (insn)
603 int malformed_asm = 0;
604 rtx body = PATTERN (insn);
606 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
607 char implicitly_dies[FIRST_PSEUDO_REGISTER];
610 rtx *clobber_reg = 0;
611 int n_inputs, n_outputs;
613 /* Find out what the constraints require. If no constraint
614 alternative matches, this asm is malformed. */
616 constrain_operands (1);
617 alt = which_alternative;
619 preprocess_constraints ();
621 n_inputs = get_asm_operand_n_inputs (body);
622 n_outputs = recog_data.n_operands - n_inputs;
627 /* Avoid further trouble with this insn. */
628 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
632 /* Strip SUBREGs here to make the following code simpler. */
633 for (i = 0; i < recog_data.n_operands; i++)
634 if (GET_CODE (recog_data.operand[i]) == SUBREG
635 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
636 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
638 /* Set up CLOBBER_REG. */
642 if (GET_CODE (body) == PARALLEL)
644 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
646 for (i = 0; i < XVECLEN (body, 0); i++)
647 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
649 rtx clobber = XVECEXP (body, 0, i);
650 rtx reg = XEXP (clobber, 0);
652 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
653 reg = SUBREG_REG (reg);
655 if (STACK_REG_P (reg))
657 clobber_reg[n_clobbers] = reg;
663 /* Enforce rule #4: Output operands must specifically indicate which
664 reg an output appears in after an asm. "=f" is not allowed: the
665 operand constraints must select a class with a single reg.
667 Also enforce rule #5: Output operands must start at the top of
668 the reg-stack: output operands may not "skip" a reg. */
670 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
671 for (i = 0; i < n_outputs; i++)
672 if (STACK_REG_P (recog_data.operand[i]))
674 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
676 error_for_asm (insn, "output constraint %d must specify a single register", i);
683 for (j = 0; j < n_clobbers; j++)
684 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
686 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
687 i, reg_names [REGNO (clobber_reg[j])]);
692 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
697 /* Search for first non-popped reg. */
698 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
699 if (! reg_used_as_output[i])
702 /* If there are any other popped regs, that's an error. */
703 for (; i < LAST_STACK_REG + 1; i++)
704 if (reg_used_as_output[i])
707 if (i != LAST_STACK_REG + 1)
709 error_for_asm (insn, "output regs must be grouped at top of stack");
713 /* Enforce rule #2: All implicitly popped input regs must be closer
714 to the top of the reg-stack than any input that is not implicitly
717 memset (implicitly_dies, 0, sizeof (implicitly_dies));
718 for (i = n_outputs; i < n_outputs + n_inputs; i++)
719 if (STACK_REG_P (recog_data.operand[i]))
721 /* An input reg is implicitly popped if it is tied to an
722 output, or if there is a CLOBBER for it. */
725 for (j = 0; j < n_clobbers; j++)
726 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
729 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
730 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
733 /* Search for first non-popped reg. */
734 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
735 if (! implicitly_dies[i])
738 /* If there are any other popped regs, that's an error. */
739 for (; i < LAST_STACK_REG + 1; i++)
740 if (implicitly_dies[i])
743 if (i != LAST_STACK_REG + 1)
746 "implicitly popped regs must be grouped at top of stack");
750 /* Enfore rule #3: If any input operand uses the "f" constraint, all
751 output constraints must use the "&" earlyclobber.
753 ??? Detect this more deterministically by having constrain_asm_operands
754 record any earlyclobber. */
756 for (i = n_outputs; i < n_outputs + n_inputs; i++)
757 if (recog_op_alt[i][alt].matches == -1)
761 for (j = 0; j < n_outputs; j++)
762 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
765 "output operand %d must use `&' constraint", j);
772 /* Avoid further trouble with this insn. */
773 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
780 /* Calculate the number of inputs and outputs in BODY, an
781 asm_operands. N_OPERANDS is the total number of operands, and
782 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
786 get_asm_operand_n_inputs (body)
789 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
790 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
792 else if (GET_CODE (body) == ASM_OPERANDS)
793 return ASM_OPERANDS_INPUT_LENGTH (body);
795 else if (GET_CODE (body) == PARALLEL
796 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
797 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
799 else if (GET_CODE (body) == PARALLEL
800 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
801 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
806 /* If current function returns its result in an fp stack register,
807 return the REG. Otherwise, return 0. */
815 /* If the value is supposed to be returned in memory, then clearly
816 it is not returned in a stack register. */
817 if (aggregate_value_p (DECL_RESULT (decl)))
820 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
823 #ifdef FUNCTION_OUTGOING_VALUE
825 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
827 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
831 return result != 0 && STACK_REG_P (result) ? result : 0;
836 * This section deals with stack register substitution, and forms the second
840 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
841 the desired hard REGNO. */
844 replace_reg (reg, regno)
848 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
849 || ! STACK_REG_P (*reg))
852 switch (GET_MODE_CLASS (GET_MODE (*reg)))
856 case MODE_COMPLEX_FLOAT:;
859 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
862 /* Remove a note of type NOTE, which must be found, for register
863 number REGNO from INSN. Remove only one such note. */
866 remove_regno_note (insn, note, regno)
871 rtx *note_link, this;
873 note_link = ®_NOTES (insn);
874 for (this = *note_link; this; this = XEXP (this, 1))
875 if (REG_NOTE_KIND (this) == note
876 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
878 *note_link = XEXP (this, 1);
882 note_link = &XEXP (this, 1);
887 /* Find the hard register number of virtual register REG in REGSTACK.
888 The hard register number is relative to the top of the stack. -1 is
889 returned if the register is not found. */
892 get_hard_regnum (regstack, reg)
898 if (! STACK_REG_P (reg))
901 for (i = regstack->top; i >= 0; i--)
902 if (regstack->reg[i] == REGNO (reg))
905 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
908 /* Emit an insn to pop virtual register REG before or after INSN.
909 REGSTACK is the stack state after INSN and is updated to reflect this
910 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
911 is represented as a SET whose destination is the register to be popped
912 and source is the top of stack. A death note for the top of stack
913 cases the movdf pattern to pop. */
916 emit_pop_insn (insn, regstack, reg, where)
920 enum emit_where where;
922 rtx pop_insn, pop_rtx;
925 /* For complex types take care to pop both halves. These may survive in
926 CLOBBER and USE expressions. */
927 if (COMPLEX_MODE_P (GET_MODE (reg)))
929 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
930 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
933 if (get_hard_regnum (regstack, reg1) >= 0)
934 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
935 if (get_hard_regnum (regstack, reg2) >= 0)
936 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
942 hard_regno = get_hard_regnum (regstack, reg);
944 if (hard_regno < FIRST_STACK_REG)
947 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
948 FP_MODE_REG (FIRST_STACK_REG, DFmode));
950 if (where == EMIT_AFTER)
951 pop_insn = emit_insn_after (pop_rtx, insn);
953 pop_insn = emit_insn_before (pop_rtx, insn);
956 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
957 REG_NOTES (pop_insn));
959 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
960 = regstack->reg[regstack->top];
962 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
967 /* Emit an insn before or after INSN to swap virtual register REG with
968 the top of stack. REGSTACK is the stack state before the swap, and
969 is updated to reflect the swap. A swap insn is represented as a
970 PARALLEL of two patterns: each pattern moves one reg to the other.
972 If REG is already at the top of the stack, no insn is emitted. */
975 emit_swap_insn (insn, regstack, reg)
982 int tmp, other_reg; /* swap regno temps */
983 rtx i1; /* the stack-reg insn prior to INSN */
984 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
986 hard_regno = get_hard_regnum (regstack, reg);
988 if (hard_regno < FIRST_STACK_REG)
990 if (hard_regno == FIRST_STACK_REG)
993 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
995 tmp = regstack->reg[other_reg];
996 regstack->reg[other_reg] = regstack->reg[regstack->top];
997 regstack->reg[regstack->top] = tmp;
999 /* Find the previous insn involving stack regs, but don't pass a
1002 if (current_block && insn != current_block->head)
1004 rtx tmp = PREV_INSN (insn);
1005 rtx limit = PREV_INSN (current_block->head);
1006 while (tmp != limit)
1008 if (GET_CODE (tmp) == CODE_LABEL
1009 || GET_CODE (tmp) == CALL_INSN
1010 || NOTE_INSN_BASIC_BLOCK_P (tmp)
1011 || (GET_CODE (tmp) == INSN
1012 && stack_regs_mentioned (tmp)))
1017 tmp = PREV_INSN (tmp);
1022 && (i1set = single_set (i1)) != NULL_RTX)
1024 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1025 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1027 /* If the previous register stack push was from the reg we are to
1028 swap with, omit the swap. */
1030 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1031 && GET_CODE (i1src) == REG
1032 && REGNO (i1src) == (unsigned) hard_regno - 1
1033 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1036 /* If the previous insn wrote to the reg we are to swap with,
1039 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno
1040 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1041 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1045 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1046 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1049 emit_insn_after (swap_rtx, i1);
1050 else if (current_block)
1051 emit_insn_before (swap_rtx, current_block->head);
1053 emit_insn_before (swap_rtx, insn);
1056 /* Handle a move to or from a stack register in PAT, which is in INSN.
1057 REGSTACK is the current stack. */
1060 move_for_stack_reg (insn, regstack, pat)
1065 rtx *psrc = get_true_reg (&SET_SRC (pat));
1066 rtx *pdest = get_true_reg (&SET_DEST (pat));
1070 src = *psrc; dest = *pdest;
1072 if (STACK_REG_P (src) && STACK_REG_P (dest))
1074 /* Write from one stack reg to another. If SRC dies here, then
1075 just change the register mapping and delete the insn. */
1077 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1082 /* If this is a no-op move, there must not be a REG_DEAD note. */
1083 if (REGNO (src) == REGNO (dest))
1086 for (i = regstack->top; i >= 0; i--)
1087 if (regstack->reg[i] == REGNO (src))
1090 /* The source must be live, and the dest must be dead. */
1091 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1094 /* It is possible that the dest is unused after this insn.
1095 If so, just pop the src. */
1097 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1099 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1105 regstack->reg[i] = REGNO (dest);
1107 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1108 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1115 /* The source reg does not die. */
1117 /* If this appears to be a no-op move, delete it, or else it
1118 will confuse the machine description output patterns. But if
1119 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1120 for REG_UNUSED will not work for deleted insns. */
1122 if (REGNO (src) == REGNO (dest))
1124 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1125 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1131 /* The destination ought to be dead */
1132 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1135 replace_reg (psrc, get_hard_regnum (regstack, src));
1137 regstack->reg[++regstack->top] = REGNO (dest);
1138 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1139 replace_reg (pdest, FIRST_STACK_REG);
1141 else if (STACK_REG_P (src))
1143 /* Save from a stack reg to MEM, or possibly integer reg. Since
1144 only top of stack may be saved, emit an exchange first if
1147 emit_swap_insn (insn, regstack, src);
1149 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1152 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1154 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1156 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1157 && regstack->top < REG_STACK_SIZE - 1)
1159 /* A 387 cannot write an XFmode value to a MEM without
1160 clobbering the source reg. The output code can handle
1161 this by reading back the value from the MEM.
1162 But it is more efficient to use a temp register if one is
1163 available. Push the source value here if the register
1164 stack is not full, and then write the value to memory via
1166 rtx push_rtx, push_insn;
1167 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1169 if (GET_MODE (src) == TFmode)
1170 push_rtx = gen_movtf (top_stack_reg, top_stack_reg);
1172 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1173 push_insn = emit_insn_before (push_rtx, insn);
1174 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1178 replace_reg (psrc, FIRST_STACK_REG);
1180 else if (STACK_REG_P (dest))
1182 /* Load from MEM, or possibly integer REG or constant, into the
1183 stack regs. The actual target is always the top of the
1184 stack. The stack mapping is changed to reflect that DEST is
1185 now at top of stack. */
1187 /* The destination ought to be dead */
1188 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1191 if (regstack->top >= REG_STACK_SIZE)
1194 regstack->reg[++regstack->top] = REGNO (dest);
1195 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1196 replace_reg (pdest, FIRST_STACK_REG);
1202 /* Swap the condition on a branch, if there is one. Return true if we
1203 found a condition to swap. False if the condition was not used as
1207 swap_rtx_condition_1 (pat)
1213 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1215 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1220 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1221 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1227 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1228 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1230 else if (fmt[i] == 'e')
1231 r |= swap_rtx_condition_1 (XEXP (pat, i));
1239 swap_rtx_condition (insn)
1242 rtx pat = PATTERN (insn);
1244 /* We're looking for a single set to cc0 or an HImode temporary. */
1246 if (GET_CODE (pat) == SET
1247 && GET_CODE (SET_DEST (pat)) == REG
1248 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1250 insn = next_flags_user (insn);
1251 if (insn == NULL_RTX)
1253 pat = PATTERN (insn);
1256 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1257 not doing anything with the cc value right now. We may be able to
1258 search for one though. */
1260 if (GET_CODE (pat) == SET
1261 && GET_CODE (SET_SRC (pat)) == UNSPEC
1262 && XINT (SET_SRC (pat), 1) == 9)
1264 rtx dest = SET_DEST (pat);
1266 /* Search forward looking for the first use of this value.
1267 Stop at block boundaries. */
1268 while (insn != current_block->end)
1270 insn = NEXT_INSN (insn);
1271 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1273 if (GET_CODE (insn) == CALL_INSN)
1277 /* So we've found the insn using this value. If it is anything
1278 other than sahf, aka unspec 10, or the value does not die
1279 (meaning we'd have to search further), then we must give up. */
1280 pat = PATTERN (insn);
1281 if (GET_CODE (pat) != SET
1282 || GET_CODE (SET_SRC (pat)) != UNSPEC
1283 || XINT (SET_SRC (pat), 1) != 10
1284 || ! dead_or_set_p (insn, dest))
1287 /* Now we are prepared to handle this as a normal cc0 setter. */
1288 insn = next_flags_user (insn);
1289 if (insn == NULL_RTX)
1291 pat = PATTERN (insn);
1294 if (swap_rtx_condition_1 (pat))
1297 INSN_CODE (insn) = -1;
1298 if (recog_memoized (insn) == -1)
1300 /* In case the flags don't die here, recurse to try fix
1301 following user too. */
1302 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1304 insn = next_flags_user (insn);
1305 if (!insn || !swap_rtx_condition (insn))
1310 swap_rtx_condition_1 (pat);
1318 /* Handle a comparison. Special care needs to be taken to avoid
1319 causing comparisons that a 387 cannot do correctly, such as EQ.
1321 Also, a pop insn may need to be emitted. The 387 does have an
1322 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1323 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1327 compare_for_stack_reg (insn, regstack, pat_src)
1333 rtx src1_note, src2_note;
1336 src1 = get_true_reg (&XEXP (pat_src, 0));
1337 src2 = get_true_reg (&XEXP (pat_src, 1));
1338 flags_user = next_flags_user (insn);
1340 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1341 registers that die in this insn - move those to stack top first. */
1342 if ((! STACK_REG_P (*src1)
1343 || (STACK_REG_P (*src2)
1344 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1345 && swap_rtx_condition (insn))
1348 temp = XEXP (pat_src, 0);
1349 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1350 XEXP (pat_src, 1) = temp;
1352 src1 = get_true_reg (&XEXP (pat_src, 0));
1353 src2 = get_true_reg (&XEXP (pat_src, 1));
1355 INSN_CODE (insn) = -1;
1358 /* We will fix any death note later. */
1360 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1362 if (STACK_REG_P (*src2))
1363 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1365 src2_note = NULL_RTX;
1367 emit_swap_insn (insn, regstack, *src1);
1369 replace_reg (src1, FIRST_STACK_REG);
1371 if (STACK_REG_P (*src2))
1372 replace_reg (src2, get_hard_regnum (regstack, *src2));
1376 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1377 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1380 /* If the second operand dies, handle that. But if the operands are
1381 the same stack register, don't bother, because only one death is
1382 needed, and it was just handled. */
1385 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1386 && REGNO (*src1) == REGNO (*src2)))
1388 /* As a special case, two regs may die in this insn if src2 is
1389 next to top of stack and the top of stack also dies. Since
1390 we have already popped src1, "next to top of stack" is really
1391 at top (FIRST_STACK_REG) now. */
1393 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1396 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1397 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1401 /* The 386 can only represent death of the first operand in
1402 the case handled above. In all other cases, emit a separate
1403 pop and remove the death note from here. */
1405 /* link_cc0_insns (insn); */
1407 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1409 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1415 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1416 is the current register layout. */
1419 subst_stack_regs_pat (insn, regstack, pat)
1426 switch (GET_CODE (pat))
1429 /* Deaths in USE insns can happen in non optimizing compilation.
1430 Handle them by popping the dying register. */
1431 src = get_true_reg (&XEXP (pat, 0));
1432 if (STACK_REG_P (*src)
1433 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1435 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1438 /* ??? Uninitialized USE should not happen. */
1439 else if (get_hard_regnum (regstack, *src) == -1)
1447 dest = get_true_reg (&XEXP (pat, 0));
1448 if (STACK_REG_P (*dest))
1450 note = find_reg_note (insn, REG_DEAD, *dest);
1452 if (pat != PATTERN (insn))
1454 /* The fix_truncdi_1 pattern wants to be able to allocate
1455 it's own scratch register. It does this by clobbering
1456 an fp reg so that it is assured of an empty reg-stack
1457 register. If the register is live, kill it now.
1458 Remove the DEAD/UNUSED note so we don't try to kill it
1462 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1465 note = find_reg_note (insn, REG_UNUSED, *dest);
1469 remove_note (insn, note);
1470 replace_reg (dest, LAST_STACK_REG);
1474 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1475 indicates an uninitialized value. Because reload removed
1476 all other clobbers, this must be due to a function
1477 returning without a value. Load up a NaN. */
1480 && get_hard_regnum (regstack, *dest) == -1)
1482 pat = gen_rtx_SET (VOIDmode,
1483 FP_MODE_REG (REGNO (*dest), SFmode),
1485 PATTERN (insn) = pat;
1486 move_for_stack_reg (insn, regstack, pat);
1488 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1489 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1491 pat = gen_rtx_SET (VOIDmode,
1492 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1494 PATTERN (insn) = pat;
1495 move_for_stack_reg (insn, regstack, pat);
1504 rtx *src1 = (rtx *) 0, *src2;
1505 rtx src1_note, src2_note;
1508 dest = get_true_reg (&SET_DEST (pat));
1509 src = get_true_reg (&SET_SRC (pat));
1510 pat_src = SET_SRC (pat);
1512 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1513 if (STACK_REG_P (*src)
1514 || (STACK_REG_P (*dest)
1515 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1516 || GET_CODE (*src) == CONST_DOUBLE)))
1518 move_for_stack_reg (insn, regstack, pat);
1522 switch (GET_CODE (pat_src))
1525 compare_for_stack_reg (insn, regstack, pat_src);
1531 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1534 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1535 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1538 replace_reg (dest, FIRST_STACK_REG);
1542 /* This is a `tstM2' case. */
1543 if (*dest != cc0_rtx)
1549 case FLOAT_TRUNCATE:
1553 /* These insns only operate on the top of the stack. DEST might
1554 be cc0_rtx if we're processing a tstM pattern. Also, it's
1555 possible that the tstM case results in a REG_DEAD note on the
1559 src1 = get_true_reg (&XEXP (pat_src, 0));
1561 emit_swap_insn (insn, regstack, *src1);
1563 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1565 if (STACK_REG_P (*dest))
1566 replace_reg (dest, FIRST_STACK_REG);
1570 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1572 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1575 replace_reg (src1, FIRST_STACK_REG);
1580 /* On i386, reversed forms of subM3 and divM3 exist for
1581 MODE_FLOAT, so the same code that works for addM3 and mulM3
1585 /* These insns can accept the top of stack as a destination
1586 from a stack reg or mem, or can use the top of stack as a
1587 source and some other stack register (possibly top of stack)
1588 as a destination. */
1590 src1 = get_true_reg (&XEXP (pat_src, 0));
1591 src2 = get_true_reg (&XEXP (pat_src, 1));
1593 /* We will fix any death note later. */
1595 if (STACK_REG_P (*src1))
1596 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1598 src1_note = NULL_RTX;
1599 if (STACK_REG_P (*src2))
1600 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1602 src2_note = NULL_RTX;
1604 /* If either operand is not a stack register, then the dest
1605 must be top of stack. */
1607 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1608 emit_swap_insn (insn, regstack, *dest);
1611 /* Both operands are REG. If neither operand is already
1612 at the top of stack, choose to make the one that is the dest
1613 the new top of stack. */
1615 int src1_hard_regnum, src2_hard_regnum;
1617 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1618 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1619 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1622 if (src1_hard_regnum != FIRST_STACK_REG
1623 && src2_hard_regnum != FIRST_STACK_REG)
1624 emit_swap_insn (insn, regstack, *dest);
1627 if (STACK_REG_P (*src1))
1628 replace_reg (src1, get_hard_regnum (regstack, *src1));
1629 if (STACK_REG_P (*src2))
1630 replace_reg (src2, get_hard_regnum (regstack, *src2));
1634 rtx src1_reg = XEXP (src1_note, 0);
1636 /* If the register that dies is at the top of stack, then
1637 the destination is somewhere else - merely substitute it.
1638 But if the reg that dies is not at top of stack, then
1639 move the top of stack to the dead reg, as though we had
1640 done the insn and then a store-with-pop. */
1642 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1644 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1645 replace_reg (dest, get_hard_regnum (regstack, *dest));
1649 int regno = get_hard_regnum (regstack, src1_reg);
1651 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1652 replace_reg (dest, regno);
1654 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1655 = regstack->reg[regstack->top];
1658 CLEAR_HARD_REG_BIT (regstack->reg_set,
1659 REGNO (XEXP (src1_note, 0)));
1660 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1665 rtx src2_reg = XEXP (src2_note, 0);
1666 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1668 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1669 replace_reg (dest, get_hard_regnum (regstack, *dest));
1673 int regno = get_hard_regnum (regstack, src2_reg);
1675 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1676 replace_reg (dest, regno);
1678 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1679 = regstack->reg[regstack->top];
1682 CLEAR_HARD_REG_BIT (regstack->reg_set,
1683 REGNO (XEXP (src2_note, 0)));
1684 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1689 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1690 replace_reg (dest, get_hard_regnum (regstack, *dest));
1693 /* Keep operand 1 maching with destination. */
1694 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1695 && REG_P (*src1) && REG_P (*src2)
1696 && REGNO (*src1) != REGNO (*dest))
1698 int tmp = REGNO (*src1);
1699 replace_reg (src1, REGNO (*src2));
1700 replace_reg (src2, tmp);
1705 switch (XINT (pat_src, 1))
1709 /* These insns only operate on the top of the stack. */
1711 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1713 emit_swap_insn (insn, regstack, *src1);
1715 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1717 if (STACK_REG_P (*dest))
1718 replace_reg (dest, FIRST_STACK_REG);
1722 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1724 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1727 replace_reg (src1, FIRST_STACK_REG);
1731 /* (unspec [(unspec [(compare ..)] 9)] 10)
1732 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1733 matches the PPRO fcomi instruction. */
1735 pat_src = XVECEXP (pat_src, 0, 0);
1736 if (GET_CODE (pat_src) != UNSPEC
1737 || XINT (pat_src, 1) != 9)
1742 /* (unspec [(compare ..)] 9) */
1743 /* Combined fcomp+fnstsw generated for doing well with
1744 CSE. When optimizing this would have been broken
1747 pat_src = XVECEXP (pat_src, 0, 0);
1748 if (GET_CODE (pat_src) != COMPARE)
1751 compare_for_stack_reg (insn, regstack, pat_src);
1760 /* This insn requires the top of stack to be the destination. */
1762 src1 = get_true_reg (&XEXP (pat_src, 1));
1763 src2 = get_true_reg (&XEXP (pat_src, 2));
1765 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1766 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1768 /* If the comparison operator is an FP comparison operator,
1769 it is handled correctly by compare_for_stack_reg () who
1770 will move the destination to the top of stack. But if the
1771 comparison operator is not an FP comparison operator, we
1772 have to handle it here. */
1773 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1774 && REGNO (*dest) != regstack->reg[regstack->top])
1776 /* In case one of operands is the top of stack and the operands
1777 dies, it is safe to make it the destination operand by reversing
1778 the direction of cmove and avoid fxch. */
1779 if ((REGNO (*src1) == regstack->reg[regstack->top]
1781 || (REGNO (*src2) == regstack->reg[regstack->top]
1784 int idx1 = (get_hard_regnum (regstack, *src1)
1786 int idx2 = (get_hard_regnum (regstack, *src2)
1789 /* Make reg-stack believe that the operands are already
1790 swapped on the stack */
1791 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1792 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1794 /* Reverse condition to compensate the operand swap.
1795 i386 do have comparison always reversible. */
1796 PUT_CODE (XEXP (pat_src, 0),
1797 reversed_comparison_code (XEXP (pat_src, 0), insn));
1800 emit_swap_insn (insn, regstack, *dest);
1808 src_note[1] = src1_note;
1809 src_note[2] = src2_note;
1811 if (STACK_REG_P (*src1))
1812 replace_reg (src1, get_hard_regnum (regstack, *src1));
1813 if (STACK_REG_P (*src2))
1814 replace_reg (src2, get_hard_regnum (regstack, *src2));
1816 for (i = 1; i <= 2; i++)
1819 int regno = REGNO (XEXP (src_note[i], 0));
1821 /* If the register that dies is not at the top of
1822 stack, then move the top of stack to the dead reg */
1823 if (regno != regstack->reg[regstack->top])
1825 remove_regno_note (insn, REG_DEAD, regno);
1826 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1830 /* Top of stack never dies, as it is the
1836 /* Make dest the top of stack. Add dest to regstack if
1838 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1839 regstack->reg[++regstack->top] = REGNO (*dest);
1840 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1841 replace_reg (dest, FIRST_STACK_REG);
1855 /* Substitute hard regnums for any stack regs in INSN, which has
1856 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1857 before the insn, and is updated with changes made here.
1859 There are several requirements and assumptions about the use of
1860 stack-like regs in asm statements. These rules are enforced by
1861 record_asm_stack_regs; see comments there for details. Any
1862 asm_operands left in the RTL at this point may be assume to meet the
1863 requirements, since record_asm_stack_regs removes any problem asm. */
1866 subst_asm_stack_regs (insn, regstack)
1870 rtx body = PATTERN (insn);
1873 rtx *note_reg; /* Array of note contents */
1874 rtx **note_loc; /* Address of REG field of each note */
1875 enum reg_note *note_kind; /* The type of each note */
1877 rtx *clobber_reg = 0;
1878 rtx **clobber_loc = 0;
1880 struct stack_def temp_stack;
1885 int n_inputs, n_outputs;
1887 if (! check_asm_stack_operands (insn))
1890 /* Find out what the constraints required. If no constraint
1891 alternative matches, that is a compiler bug: we should have caught
1892 such an insn in check_asm_stack_operands. */
1893 extract_insn (insn);
1894 constrain_operands (1);
1895 alt = which_alternative;
1897 preprocess_constraints ();
1899 n_inputs = get_asm_operand_n_inputs (body);
1900 n_outputs = recog_data.n_operands - n_inputs;
1905 /* Strip SUBREGs here to make the following code simpler. */
1906 for (i = 0; i < recog_data.n_operands; i++)
1907 if (GET_CODE (recog_data.operand[i]) == SUBREG
1908 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1910 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1911 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1914 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1916 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1919 note_reg = (rtx *) alloca (i * sizeof (rtx));
1920 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1921 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1924 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1926 rtx reg = XEXP (note, 0);
1927 rtx *loc = & XEXP (note, 0);
1929 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1931 loc = & SUBREG_REG (reg);
1932 reg = SUBREG_REG (reg);
1935 if (STACK_REG_P (reg)
1936 && (REG_NOTE_KIND (note) == REG_DEAD
1937 || REG_NOTE_KIND (note) == REG_UNUSED))
1939 note_reg[n_notes] = reg;
1940 note_loc[n_notes] = loc;
1941 note_kind[n_notes] = REG_NOTE_KIND (note);
1946 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1950 if (GET_CODE (body) == PARALLEL)
1952 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1953 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1955 for (i = 0; i < XVECLEN (body, 0); i++)
1956 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1958 rtx clobber = XVECEXP (body, 0, i);
1959 rtx reg = XEXP (clobber, 0);
1960 rtx *loc = & XEXP (clobber, 0);
1962 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1964 loc = & SUBREG_REG (reg);
1965 reg = SUBREG_REG (reg);
1968 if (STACK_REG_P (reg))
1970 clobber_reg[n_clobbers] = reg;
1971 clobber_loc[n_clobbers] = loc;
1977 temp_stack = *regstack;
1979 /* Put the input regs into the desired place in TEMP_STACK. */
1981 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1982 if (STACK_REG_P (recog_data.operand[i])
1983 && reg_class_subset_p (recog_op_alt[i][alt].class,
1985 && recog_op_alt[i][alt].class != FLOAT_REGS)
1987 /* If an operand needs to be in a particular reg in
1988 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1989 these constraints are for single register classes, and
1990 reload guaranteed that operand[i] is already in that class,
1991 we can just use REGNO (recog_data.operand[i]) to know which
1992 actual reg this operand needs to be in. */
1994 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
1999 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2001 /* recog_data.operand[i] is not in the right place. Find
2002 it and swap it with whatever is already in I's place.
2003 K is where recog_data.operand[i] is now. J is where it
2007 k = temp_stack.top - (regno - FIRST_STACK_REG);
2009 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2011 temp = temp_stack.reg[k];
2012 temp_stack.reg[k] = temp_stack.reg[j];
2013 temp_stack.reg[j] = temp;
2017 /* Emit insns before INSN to make sure the reg-stack is in the right
2020 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2022 /* Make the needed input register substitutions. Do death notes and
2023 clobbers too, because these are for inputs, not outputs. */
2025 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2026 if (STACK_REG_P (recog_data.operand[i]))
2028 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2033 replace_reg (recog_data.operand_loc[i], regnum);
2036 for (i = 0; i < n_notes; i++)
2037 if (note_kind[i] == REG_DEAD)
2039 int regnum = get_hard_regnum (regstack, note_reg[i]);
2044 replace_reg (note_loc[i], regnum);
2047 for (i = 0; i < n_clobbers; i++)
2049 /* It's OK for a CLOBBER to reference a reg that is not live.
2050 Don't try to replace it in that case. */
2051 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2055 /* Sigh - clobbers always have QImode. But replace_reg knows
2056 that these regs can't be MODE_INT and will abort. Just put
2057 the right reg there without calling replace_reg. */
2059 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2063 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2065 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2066 if (STACK_REG_P (recog_data.operand[i]))
2068 /* An input reg is implicitly popped if it is tied to an
2069 output, or if there is a CLOBBER for it. */
2072 for (j = 0; j < n_clobbers; j++)
2073 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2076 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2078 /* recog_data.operand[i] might not be at the top of stack.
2079 But that's OK, because all we need to do is pop the
2080 right number of regs off of the top of the reg-stack.
2081 record_asm_stack_regs guaranteed that all implicitly
2082 popped regs were grouped at the top of the reg-stack. */
2084 CLEAR_HARD_REG_BIT (regstack->reg_set,
2085 regstack->reg[regstack->top]);
2090 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2091 Note that there isn't any need to substitute register numbers.
2092 ??? Explain why this is true. */
2094 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2096 /* See if there is an output for this hard reg. */
2099 for (j = 0; j < n_outputs; j++)
2100 if (STACK_REG_P (recog_data.operand[j])
2101 && REGNO (recog_data.operand[j]) == (unsigned) i)
2103 regstack->reg[++regstack->top] = i;
2104 SET_HARD_REG_BIT (regstack->reg_set, i);
2109 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2110 input that the asm didn't implicitly pop. If the asm didn't
2111 implicitly pop an input reg, that reg will still be live.
2113 Note that we can't use find_regno_note here: the register numbers
2114 in the death notes have already been substituted. */
2116 for (i = 0; i < n_outputs; i++)
2117 if (STACK_REG_P (recog_data.operand[i]))
2121 for (j = 0; j < n_notes; j++)
2122 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2123 && note_kind[j] == REG_UNUSED)
2125 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2131 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2132 if (STACK_REG_P (recog_data.operand[i]))
2136 for (j = 0; j < n_notes; j++)
2137 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2138 && note_kind[j] == REG_DEAD
2139 && TEST_HARD_REG_BIT (regstack->reg_set,
2140 REGNO (recog_data.operand[i])))
2142 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2149 /* Substitute stack hard reg numbers for stack virtual registers in
2150 INSN. Non-stack register numbers are not changed. REGSTACK is the
2151 current stack content. Insns may be emitted as needed to arrange the
2152 stack for the 387 based on the contents of the insn. */
2155 subst_stack_regs (insn, regstack)
2159 rtx *note_link, note;
2162 if (GET_CODE (insn) == CALL_INSN)
2164 int top = regstack->top;
2166 /* If there are any floating point parameters to be passed in
2167 registers for this call, make sure they are in the right
2172 straighten_stack (PREV_INSN (insn), regstack);
2174 /* Now mark the arguments as dead after the call. */
2176 while (regstack->top >= 0)
2178 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2184 /* Do the actual substitution if any stack regs are mentioned.
2185 Since we only record whether entire insn mentions stack regs, and
2186 subst_stack_regs_pat only works for patterns that contain stack regs,
2187 we must check each pattern in a parallel here. A call_value_pop could
2190 if (stack_regs_mentioned (insn))
2192 int n_operands = asm_noperands (PATTERN (insn));
2193 if (n_operands >= 0)
2195 /* This insn is an `asm' with operands. Decode the operands,
2196 decide how many are inputs, and do register substitution.
2197 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2199 subst_asm_stack_regs (insn, regstack);
2203 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2204 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2206 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2207 subst_stack_regs_pat (insn, regstack,
2208 XVECEXP (PATTERN (insn), 0, i));
2211 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2214 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2215 REG_UNUSED will already have been dealt with, so just return. */
2217 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn))
2220 /* If there is a REG_UNUSED note on a stack register on this insn,
2221 the indicated reg must be popped. The REG_UNUSED note is removed,
2222 since the form of the newly emitted pop insn references the reg,
2223 making it no longer `unset'. */
2225 note_link = ®_NOTES (insn);
2226 for (note = *note_link; note; note = XEXP (note, 1))
2227 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2229 *note_link = XEXP (note, 1);
2230 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2233 note_link = &XEXP (note, 1);
2236 /* Change the organization of the stack so that it fits a new basic
2237 block. Some registers might have to be popped, but there can never be
2238 a register live in the new block that is not now live.
2240 Insert any needed insns before or after INSN, as indicated by
2241 WHERE. OLD is the original stack layout, and NEW is the desired
2242 form. OLD is updated to reflect the code emitted, ie, it will be
2243 the same as NEW upon return.
2245 This function will not preserve block_end[]. But that information
2246 is no longer needed once this has executed. */
2249 change_stack (insn, old, new, where)
2253 enum emit_where where;
2258 /* We will be inserting new insns "backwards". If we are to insert
2259 after INSN, find the next insn, and insert before it. */
2261 if (where == EMIT_AFTER)
2263 if (current_block && current_block->end == insn)
2265 insn = NEXT_INSN (insn);
2268 /* Pop any registers that are not needed in the new block. */
2270 for (reg = old->top; reg >= 0; reg--)
2271 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2272 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2277 /* If the new block has never been processed, then it can inherit
2278 the old stack order. */
2280 new->top = old->top;
2281 memcpy (new->reg, old->reg, sizeof (new->reg));
2285 /* This block has been entered before, and we must match the
2286 previously selected stack order. */
2288 /* By now, the only difference should be the order of the stack,
2289 not their depth or liveliness. */
2291 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2294 if (old->top != new->top)
2297 /* If the stack is not empty (new->top != -1), loop here emitting
2298 swaps until the stack is correct.
2300 The worst case number of swaps emitted is N + 2, where N is the
2301 depth of the stack. In some cases, the reg at the top of
2302 stack may be correct, but swapped anyway in order to fix
2303 other regs. But since we never swap any other reg away from
2304 its correct slot, this algorithm will converge. */
2309 /* Swap the reg at top of stack into the position it is
2310 supposed to be in, until the correct top of stack appears. */
2312 while (old->reg[old->top] != new->reg[new->top])
2314 for (reg = new->top; reg >= 0; reg--)
2315 if (new->reg[reg] == old->reg[old->top])
2321 emit_swap_insn (insn, old,
2322 FP_MODE_REG (old->reg[reg], DFmode));
2325 /* See if any regs remain incorrect. If so, bring an
2326 incorrect reg to the top of stack, and let the while loop
2329 for (reg = new->top; reg >= 0; reg--)
2330 if (new->reg[reg] != old->reg[reg])
2332 emit_swap_insn (insn, old,
2333 FP_MODE_REG (old->reg[reg], DFmode));
2338 /* At this point there must be no differences. */
2340 for (reg = old->top; reg >= 0; reg--)
2341 if (old->reg[reg] != new->reg[reg])
2346 current_block->end = PREV_INSN (insn);
2349 /* Print stack configuration. */
2352 print_stack (file, s)
2360 fprintf (file, "uninitialized\n");
2361 else if (s->top == -1)
2362 fprintf (file, "empty\n");
2367 for (i = 0; i <= s->top; ++i)
2368 fprintf (file, "%d ", s->reg[i]);
2369 fputs ("]\n", file);
2373 /* This function was doing life analysis. We now let the regular live
2374 code do it's job, so we only need to check some extra invariants
2375 that reg-stack expects. Primary among these being that all registers
2376 are initialized before use.
2378 The function returns true when code was emitted to CFG edges and
2379 commit_edge_insertions needs to be called. */
2382 convert_regs_entry ()
2388 FOR_ALL_BB_REVERSE (block)
2390 block_info bi = BLOCK_INFO (block);
2393 /* Set current register status at last instruction `uninitialized'. */
2394 bi->stack_in.top = -2;
2396 /* Copy live_at_end and live_at_start into temporaries. */
2397 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2399 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2400 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2401 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2402 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2406 /* Load something into each stack register live at function entry.
2407 Such live registers can be caused by uninitialized variables or
2408 functions not returning values on all paths. In order to keep
2409 the push/pop code happy, and to not scrog the register stack, we
2410 must put something in these registers. Use a QNaN.
2412 Note that we are insertting converted code here. This code is
2413 never seen by the convert_regs pass. */
2415 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2417 basic_block block = e->dest;
2418 block_info bi = BLOCK_INFO (block);
2421 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2422 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2426 bi->stack_in.reg[++top] = reg;
2428 init = gen_rtx_SET (VOIDmode,
2429 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2431 insert_insn_on_edge (init, e);
2435 bi->stack_in.top = top;
2441 /* Construct the desired stack for function exit. This will either
2442 be `empty', or the function return value at top-of-stack. */
2445 convert_regs_exit ()
2447 int value_reg_low, value_reg_high;
2451 retvalue = stack_result (current_function_decl);
2452 value_reg_low = value_reg_high = -1;
2455 value_reg_low = REGNO (retvalue);
2456 value_reg_high = value_reg_low
2457 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2460 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2461 if (value_reg_low == -1)
2462 output_stack->top = -1;
2467 output_stack->top = value_reg_high - value_reg_low;
2468 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2470 output_stack->reg[reg - value_reg_low] = reg;
2471 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2476 /* Adjust the stack of this block on exit to match the stack of the
2477 target block, or copy stack info into the stack of the successor
2478 of the successor hasn't been processed yet. */
2480 compensate_edge (e, file)
2484 basic_block block = e->src, target = e->dest;
2485 block_info bi = BLOCK_INFO (block);
2486 struct stack_def regstack, tmpstack;
2487 stack target_stack = &BLOCK_INFO (target)->stack_in;
2490 current_block = block;
2491 regstack = bi->stack_out;
2493 fprintf (file, "Edge %d->%d: ", block->sindex, target->sindex);
2495 if (target_stack->top == -2)
2497 /* The target block hasn't had a stack order selected.
2498 We need merely ensure that no pops are needed. */
2499 for (reg = regstack.top; reg >= 0; --reg)
2500 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2506 fprintf (file, "new block; copying stack position\n");
2508 /* change_stack kills values in regstack. */
2509 tmpstack = regstack;
2511 change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER);
2516 fprintf (file, "new block; pops needed\n");
2520 if (target_stack->top == regstack.top)
2522 for (reg = target_stack->top; reg >= 0; --reg)
2523 if (target_stack->reg[reg] != regstack.reg[reg])
2529 fprintf (file, "no changes needed\n");
2536 fprintf (file, "correcting stack to ");
2537 print_stack (file, target_stack);
2541 /* Care for non-call EH edges specially. The normal return path have
2542 values in registers. These will be popped en masse by the unwind
2544 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2545 target_stack->top = -1;
2547 /* Other calls may appear to have values live in st(0), but the
2548 abnormal return path will not have actually loaded the values. */
2549 else if (e->flags & EDGE_ABNORMAL_CALL)
2551 /* Assert that the lifetimes are as we expect -- one value
2552 live at st(0) on the end of the source block, and no
2553 values live at the beginning of the destination block. */
2556 CLEAR_HARD_REG_SET (tmp);
2557 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2561 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2562 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2566 target_stack->top = -1;
2569 /* It is better to output directly to the end of the block
2570 instead of to the edge, because emit_swap can do minimal
2571 insn scheduling. We can do this when there is only one
2572 edge out, and it is not abnormal. */
2573 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL))
2575 /* change_stack kills values in regstack. */
2576 tmpstack = regstack;
2578 change_stack (block->end, &tmpstack, target_stack,
2579 (GET_CODE (block->end) == JUMP_INSN
2580 ? EMIT_BEFORE : EMIT_AFTER));
2586 /* We don't support abnormal edges. Global takes care to
2587 avoid any live register across them, so we should never
2588 have to insert instructions on such edges. */
2589 if (e->flags & EDGE_ABNORMAL)
2592 current_block = NULL;
2595 /* ??? change_stack needs some point to emit insns after.
2596 Also needed to keep gen_sequence from returning a
2597 pattern as opposed to a sequence, which would lose
2599 after = emit_note (NULL, NOTE_INSN_DELETED);
2601 tmpstack = regstack;
2602 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2604 seq = gen_sequence ();
2607 insert_insn_on_edge (seq, e);
2613 /* Convert stack register references in one block. */
2616 convert_regs_1 (file, block)
2620 struct stack_def regstack;
2621 block_info bi = BLOCK_INFO (block);
2624 edge e, beste = NULL;
2628 /* Find the edge we will copy stack from. It should be the most frequent
2629 one as it will get cheapest after compensation code is generated,
2630 if multiple such exists, take one with largest count, prefer critical
2631 one (as splitting critical edges is more expensive), or one with lowest
2632 index, to avoid random changes with different orders of the edges. */
2633 for (e = block->pred; e ; e = e->pred_next)
2635 if (e->flags & EDGE_DFS_BACK)
2639 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2641 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2643 else if (beste->count < e->count)
2645 else if (beste->count > e->count)
2647 else if ((EDGE_CRITICAL_P (e) != 0)
2648 != (EDGE_CRITICAL_P (beste) != 0))
2650 if (EDGE_CRITICAL_P (e))
2653 else if (e->src->sindex < beste->src->sindex)
2657 /* Entry block does have stack already initialized. */
2658 if (bi->stack_in.top == -2)
2659 inserted |= compensate_edge (beste, file);
2663 current_block = block;
2667 fprintf (file, "\nBasic block %d\nInput stack: ", block->sindex);
2668 print_stack (file, &bi->stack_in);
2671 /* Process all insns in this block. Keep track of NEXT so that we
2672 don't process insns emitted while substituting in INSN. */
2674 regstack = bi->stack_in;
2678 next = NEXT_INSN (insn);
2680 /* Ensure we have not missed a block boundary. */
2683 if (insn == block->end)
2686 /* Don't bother processing unless there is a stack reg
2687 mentioned or if it's a CALL_INSN. */
2688 if (stack_regs_mentioned (insn)
2689 || GET_CODE (insn) == CALL_INSN)
2693 fprintf (file, " insn %d input stack: ",
2695 print_stack (file, ®stack);
2697 subst_stack_regs (insn, ®stack);
2704 fprintf (file, "Expected live registers [");
2705 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2706 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2707 fprintf (file, " %d", reg);
2708 fprintf (file, " ]\nOutput stack: ");
2709 print_stack (file, ®stack);
2713 if (GET_CODE (insn) == JUMP_INSN)
2714 insn = PREV_INSN (insn);
2716 /* If the function is declared to return a value, but it returns one
2717 in only some cases, some registers might come live here. Emit
2718 necessary moves for them. */
2720 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2722 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2723 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2729 fprintf (file, "Emitting insn initializing reg %d\n",
2733 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2735 insn = emit_insn_after (set, insn);
2736 subst_stack_regs (insn, ®stack);
2740 /* Something failed if the stack lives don't match. */
2741 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2744 bi->stack_out = regstack;
2746 /* Compensate the back edges, as those wasn't visited yet. */
2747 for (e = block->succ; e ; e = e->succ_next)
2749 if (e->flags & EDGE_DFS_BACK
2750 || (e->dest == EXIT_BLOCK_PTR))
2752 if (!BLOCK_INFO (e->dest)->done
2753 && e->dest != block)
2755 inserted |= compensate_edge (e, file);
2758 for (e = block->pred; e ; e = e->pred_next)
2760 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2761 && e->src != ENTRY_BLOCK_PTR)
2763 if (!BLOCK_INFO (e->src)->done)
2765 inserted |= compensate_edge (e, file);
2772 /* Convert registers in all blocks reachable from BLOCK. */
2775 convert_regs_2 (file, block)
2779 basic_block *stack, *sp;
2782 stack = (basic_block *) xmalloc (sizeof (*stack) * num_basic_blocks);
2793 inserted |= convert_regs_1 (file, block);
2794 BLOCK_INFO (block)->done = 1;
2796 for (e = block->succ; e ; e = e->succ_next)
2797 if (! (e->flags & EDGE_DFS_BACK))
2799 BLOCK_INFO (e->dest)->predecessors--;
2800 if (!BLOCK_INFO (e->dest)->predecessors)
2804 while (sp != stack);
2809 /* Traverse all basic blocks in a function, converting the register
2810 references in each insn from the "flat" register file that gcc uses,
2811 to the stack-like registers the 387 uses. */
2821 /* Initialize uninitialized registers on function entry. */
2822 inserted = convert_regs_entry ();
2824 /* Construct the desired stack for function exit. */
2825 convert_regs_exit ();
2826 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2828 /* ??? Future: process inner loops first, and give them arbitrary
2829 initial stacks which emit_swap_insn can modify. This ought to
2830 prevent double fxch that aften appears at the head of a loop. */
2832 /* Process all blocks reachable from all entry points. */
2833 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2834 inserted |= convert_regs_2 (file, e->dest);
2836 /* ??? Process all unreachable blocks. Though there's no excuse
2837 for keeping these even when not optimizing. */
2840 block_info bi = BLOCK_INFO (b);
2846 /* Create an arbitrary input stack. */
2847 bi->stack_in.top = -1;
2848 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2849 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2850 bi->stack_in.reg[++bi->stack_in.top] = reg;
2852 inserted |= convert_regs_2 (file, b);
2856 fixup_abnormal_edges ();
2858 commit_edge_insertions ();
2865 #endif /* STACK_REGS */