1 /* Local Register Allocator (LRA) intercommunication header file.
2 Copyright (C) 2010-2019 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
24 #define lra_assert(c) gcc_checking_assert (c)
26 /* The parameter used to prevent infinite reloading for an insn. Each
27 insn operands might require a reload and, if it is a memory, its
28 base and index registers might require a reload too. */
29 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
31 typedef struct lra_live_range *lra_live_range_t;
33 /* The structure describes program points where a given pseudo lives.
34 The live ranges can be used to find conflicts with other pseudos.
35 If the live ranges of two pseudos are intersected, the pseudos are
39 /* Pseudo regno whose live range is described by given
42 /* Program point range. */
44 /* Next structure describing program points where the pseudo
46 lra_live_range_t next;
47 /* Pointer to structures with the same start. */
48 lra_live_range_t start_next;
51 typedef struct lra_copy *lra_copy_t;
53 /* Copy between pseudos which affects assigning hard registers. */
56 /* True if regno1 is the destination of the copy. */
58 /* Execution frequency of the copy. */
60 /* Pseudos connected by the copy. REGNO1 < REGNO2. */
62 /* Next copy with correspondingly REGNO1 and REGNO2. */
63 lra_copy_t regno1_next, regno2_next;
66 /* Common info about a register (pseudo or hard register). */
70 /* Bitmap of UIDs of insns (including debug insns) referring the
72 bitmap_head insn_bitmap;
73 /* The following fields are defined only for pseudos. */
74 /* Hard registers with which the pseudo conflicts. */
75 HARD_REG_SET conflict_hard_regs;
76 /* We assign hard registers to reload pseudos which can occur in few
77 places. So two hard register preferences are enough for them.
78 The following fields define the preferred hard registers. If
79 there are no such hard registers the first field value is
80 negative. If there is only one preferred hard register, the 2nd
82 int preferred_hard_regno1, preferred_hard_regno2;
83 /* Profits to use the corresponding preferred hard registers. If
84 the both hard registers defined, the first hard register has not
85 less profit than the second one. */
86 int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
88 /* True if the pseudo should not be assigned to a stack register. */
91 /* Number of references and execution frequencies of the register in
95 /* rtx used to undo the inheritance. It can be non-null only
96 between subsequent inheritance and undo inheritance passes. */
98 /* Value holding by register. If the pseudos have the same value
99 they do not conflict. */
101 /* Offset from relative eliminate register to pesudo reg. */
103 /* These members are set up in lra-lives.c and updated in
105 /* The biggest size mode in which each pseudo reg is referred in
106 whole function (possibly via subreg). */
107 machine_mode biggest_mode;
108 /* Live ranges of the pseudo. */
109 lra_live_range_t live_ranges;
110 /* This member is set up in lra-lives.c for subsequent
115 /* References to the common info about each register. */
116 extern class lra_reg *lra_reg_info;
118 extern HARD_REG_SET hard_regs_spilled_into;
120 /* Static info about each insn operand (common for all insns with the
121 same ICODE). Warning: if the structure definition is changed, the
122 initializer for debug_operand_data in lra.c should be changed
124 struct lra_operand_data
126 /* The machine description constraint string of the operand. */
127 const char *constraint;
128 /* Alternatives for which early_clobber can be true. */
129 alternative_mask early_clobber_alts;
130 /* It is taken only from machine description (which is different
131 from recog_data.operand_mode) and can be of VOIDmode. */
132 ENUM_BITFIELD(machine_mode) mode : 16;
133 /* The type of the operand (in/out/inout). */
134 ENUM_BITFIELD (op_type) type : 8;
135 /* Through if accessed through STRICT_LOW. */
136 unsigned int strict_low : 1;
137 /* True if the operand is an operator. */
138 unsigned int is_operator : 1;
139 /* True if the operand is an address. */
140 unsigned int is_address : 1;
143 /* Info about register occurrence in an insn. */
146 /* Alternatives for which early_clobber can be true. */
147 alternative_mask early_clobber_alts;
148 /* The biggest mode through which the insn refers to the register
149 occurrence (remember the register can be accessed through a
150 subreg in the insn). */
151 ENUM_BITFIELD(machine_mode) biggest_mode : 16;
152 /* The type of the corresponding operand which is the register. */
153 ENUM_BITFIELD (op_type) type : 8;
154 /* True if the reg is accessed through a subreg and the subreg is
155 just a part of the register. */
156 unsigned int subreg_p : 1;
157 /* True if the reg is clobber highed by the operand. */
158 unsigned int clobber_high : 1;
159 /* The corresponding regno of the register. */
161 /* Next reg info of the same insn. */
162 struct lra_insn_reg *next;
165 /* Static part (common info for insns with the same ICODE) of LRA
166 internal insn info. It exists in at most one exemplar for each
167 non-negative ICODE. There is only one exception. Each asm insn has
168 own structure. Warning: if the structure definition is changed,
169 the initializer for debug_insn_static_data in lra.c should be
171 struct lra_static_insn_data
173 /* Static info about each insn operand. */
174 struct lra_operand_data *operand;
175 /* Each duplication refers to the number of the corresponding
176 operand which is duplicated. */
178 /* The number of an operand marked as commutative, -1 otherwise. */
180 /* Number of operands, duplications, and alternatives of the
185 /* Insns in machine description (or clobbers in asm) may contain
186 explicit hard regs which are not operands. The following list
187 describes such hard registers. */
188 struct lra_insn_reg *hard_regs;
189 /* Array [n_alternatives][n_operand] of static constraint info for
190 given operand in given alternative. This info can be changed if
191 the target reg info is changed. */
192 const struct operand_alternative *operand_alternative;
195 /* Negative insn alternative numbers used for special cases. */
196 #define LRA_UNKNOWN_ALT -1
197 #define LRA_NON_CLOBBERED_ALT -2
199 /* LRA internal info about an insn (LRA internal insn
201 class lra_insn_recog_data
206 /* The alternative should be used for the insn, LRA_UNKNOWN_ALT if
207 unknown, or we should assume any alternative, or the insn is a
208 debug insn. LRA_NON_CLOBBERED_ALT means ignoring any earlier
209 clobbers for the insn. */
210 int used_insn_alternative;
211 /* SP offset before the insn relative to one at the func start. */
212 poly_int64 sp_offset;
213 /* The insn itself. */
215 /* Common data for insns with the same ICODE. Asm insns (their
216 ICODE is negative) do not share such structures. */
217 struct lra_static_insn_data *insn_static_data;
218 /* Two arrays of size correspondingly equal to the operand and the
219 duplication numbers: */
220 rtx **operand_loc; /* The operand locations, NULL if no operands. */
221 rtx **dup_loc; /* The dup locations, NULL if no dups. */
222 /* Number of hard registers implicitly used/clobbered in given call
223 insn. The value can be NULL or points to array of the hard
224 register numbers ending with a negative value. To differ
225 clobbered and used hard regs, clobbered hard regs are incremented
226 by FIRST_PSEUDO_REGISTER. */
228 /* Cached value of get_preferred_alternatives. */
229 alternative_mask preferred_alternatives;
230 /* The following member value is always NULL for a debug insn. */
231 struct lra_insn_reg *regs;
234 typedef class lra_insn_recog_data *lra_insn_recog_data_t;
236 /* Whether the clobber is used temporary in LRA. */
237 #define LRA_TEMP_CLOBBER_P(x) \
238 (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
240 /* Cost factor for each additional reload and maximal cost reject for
241 insn reloads. One might ask about such strange numbers. Their
242 values occurred historically from former reload pass. */
243 #define LRA_LOSER_COST_FACTOR 6
244 #define LRA_MAX_REJECT 600
246 /* Maximum allowed number of assignment pass iterations after the
247 latest spill pass when any former reload pseudo was spilled. It is
248 for preventing LRA cycling in a bug case. */
249 #define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30
251 /* The maximal number of inheritance/split passes in LRA. It should
252 be more 1 in order to perform caller saves transformations and much
253 less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
254 as permitted constraint passes in some complicated cases. The
255 first inheritance/split pass has a biggest impact on generated code
256 quality. Each subsequent affects generated code in less degree.
257 For example, the 3rd pass does not change generated SPEC2000 code
259 #define LRA_MAX_INHERITANCE_PASSES 2
261 #if LRA_MAX_INHERITANCE_PASSES <= 0 \
262 || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
263 #error wrong LRA_MAX_INHERITANCE_PASSES value
266 /* Analogous macro to the above one but for rematerialization. */
267 #define LRA_MAX_REMATERIALIZATION_PASSES 2
269 #if LRA_MAX_REMATERIALIZATION_PASSES <= 0 \
270 || LRA_MAX_REMATERIALIZATION_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
271 #error wrong LRA_MAX_REMATERIALIZATION_PASSES value
276 extern FILE *lra_dump_file;
278 extern bool lra_asm_error_p;
279 extern bool lra_reg_spill_p;
281 extern HARD_REG_SET lra_no_alloc_regs;
283 extern int lra_insn_recog_data_len;
284 extern lra_insn_recog_data_t *lra_insn_recog_data;
286 extern int lra_curr_reload_num;
288 extern void lra_dump_bitmap_with_title (const char *, bitmap, int);
289 extern hashval_t lra_rtx_hash (rtx x);
290 extern void lra_push_insn (rtx_insn *);
291 extern void lra_push_insn_by_uid (unsigned int);
292 extern void lra_push_insn_and_update_insn_regno_info (rtx_insn *);
293 extern rtx_insn *lra_pop_insn (void);
294 extern unsigned int lra_insn_stack_length (void);
296 extern rtx lra_create_new_reg_with_unique_value (machine_mode, rtx,
297 enum reg_class, const char *);
298 extern void lra_set_regno_unique_value (int);
299 extern void lra_invalidate_insn_data (rtx_insn *);
300 extern void lra_set_insn_deleted (rtx_insn *);
301 extern void lra_delete_dead_insn (rtx_insn *);
302 extern void lra_emit_add (rtx, rtx, rtx);
303 extern void lra_emit_move (rtx, rtx);
304 extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
306 extern void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *,
309 extern bool lra_substitute_pseudo (rtx *, int, rtx, bool, bool);
310 extern bool lra_substitute_pseudo_within_insn (rtx_insn *, int, rtx, bool);
312 extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *);
313 extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *);
314 extern void lra_set_used_insn_alternative (rtx_insn *, int);
315 extern void lra_set_used_insn_alternative_by_uid (int, int);
317 extern void lra_invalidate_insn_regno_info (rtx_insn *);
318 extern void lra_update_insn_regno_info (rtx_insn *);
319 extern struct lra_insn_reg *lra_get_insn_regs (int);
321 extern void lra_free_copies (void);
322 extern void lra_create_copy (int, int, int);
323 extern lra_copy_t lra_get_copy (int);
324 extern bool lra_former_scratch_p (int);
325 extern bool lra_former_scratch_operand_p (rtx_insn *, int);
326 extern void lra_register_new_scratch_op (rtx_insn *, int, int);
328 extern int lra_new_regno_start;
329 extern int lra_constraint_new_regno_start;
330 extern int lra_bad_spill_regno_start;
331 extern bitmap_head lra_inheritance_pseudos;
332 extern bitmap_head lra_split_regs;
333 extern bitmap_head lra_subreg_reload_pseudos;
334 extern bitmap_head lra_optional_reload_pseudos;
336 /* lra-constraints.c: */
338 extern void lra_init_equiv (void);
339 extern int lra_constraint_offset (int, machine_mode);
341 extern int lra_constraint_iter;
342 extern bool lra_risky_transformations_p;
343 extern int lra_inheritance_iter;
344 extern int lra_undo_inheritance_iter;
345 extern bool lra_constrain_insn (rtx_insn *);
346 extern bool lra_constraints (bool);
347 extern void lra_constraints_init (void);
348 extern void lra_constraints_finish (void);
349 extern bool spill_hard_reg_in_range (int, enum reg_class, rtx_insn *, rtx_insn *);
350 extern void lra_inheritance (void);
351 extern bool lra_undo_inheritance (void);
355 extern int lra_live_max_point;
356 extern int *lra_point_freq;
358 extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
360 extern int lra_live_range_iter;
361 extern void lra_create_live_ranges (bool, bool);
362 extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
363 extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
365 extern bool lra_intersected_live_ranges_p (lra_live_range_t,
367 extern void lra_print_live_range_list (FILE *, lra_live_range_t);
368 extern void debug (lra_live_range &ref);
369 extern void debug (lra_live_range *ptr);
370 extern void lra_debug_live_range_list (lra_live_range_t);
371 extern void lra_debug_pseudo_live_ranges (int);
372 extern void lra_debug_live_ranges (void);
373 extern void lra_clear_live_ranges (void);
374 extern void lra_live_ranges_init (void);
375 extern void lra_live_ranges_finish (void);
376 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
380 extern int lra_assignment_iter;
381 extern int lra_assignment_iter_after_spill;
382 extern void lra_setup_reg_renumber (int, int, bool);
383 extern bool lra_assign (bool &);
384 extern bool lra_split_hard_reg_for (void);
386 /* lra-coalesce.c: */
388 extern int lra_coalesce_iter;
389 extern bool lra_coalesce (void);
393 extern bool lra_need_for_scratch_reg_p (void);
394 extern bool lra_need_for_spills_p (void);
395 extern void lra_spill (void);
396 extern void lra_final_code_change (void);
400 extern int lra_rematerialization_iter;
401 extern bool lra_remat (void);
403 /* lra-elimination.c: */
405 extern void lra_debug_elim_table (void);
406 extern int lra_get_elimination_hard_regno (int);
407 extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, machine_mode,
408 bool, bool, poly_int64, bool);
409 extern void eliminate_regs_in_insn (rtx_insn *insn, bool, bool, poly_int64);
410 extern void lra_eliminate (bool, bool);
412 extern void lra_eliminate_reg_if_possible (rtx *);
416 /* Return the hard register which given pseudo REGNO assigned to.
417 Negative value means that the register got memory or we don't know
420 lra_get_regno_hard_regno (int regno)
423 return reg_renumber[regno];
426 /* Change class of pseudo REGNO to NEW_CLASS. Print info about it
427 using TITLE. Output a new line if NL_P. */
429 lra_change_class (int regno, enum reg_class new_class,
430 const char *title, bool nl_p)
432 lra_assert (regno >= FIRST_PSEUDO_REGISTER);
433 if (lra_dump_file != NULL)
434 fprintf (lra_dump_file, "%s class %s for r%d",
435 title, reg_class_names[new_class], regno);
436 setup_reg_classes (regno, new_class, NO_REGS, new_class);
437 if (lra_dump_file != NULL && nl_p)
438 fprintf (lra_dump_file, "\n");
441 /* Update insn operands which are duplication of NOP operand. The
442 insn is represented by its LRA internal representation ID. */
444 lra_update_dup (lra_insn_recog_data_t id, int nop)
447 struct lra_static_insn_data *static_id = id->insn_static_data;
449 for (i = 0; i < static_id->n_dups; i++)
450 if (static_id->dup_num[i] == nop)
451 *id->dup_loc[i] = *id->operand_loc[nop];
454 /* Process operator duplications in insn with ID. We do it after the
455 operands processing. Generally speaking, we could do this probably
456 simultaneously with operands processing because a common practice
457 is to enumerate the operators after their operands. */
459 lra_update_operator_dups (lra_insn_recog_data_t id)
462 struct lra_static_insn_data *static_id = id->insn_static_data;
464 for (i = 0; i < static_id->n_dups; i++)
466 int ndup = static_id->dup_num[i];
468 if (static_id->operand[ndup].is_operator)
469 *id->dup_loc[i] = *id->operand_loc[ndup];
473 /* Return info about INSN. Set up the info if it is not done yet. */
474 static inline lra_insn_recog_data_t
475 lra_get_insn_recog_data (rtx_insn *insn)
477 lra_insn_recog_data_t data;
478 unsigned int uid = INSN_UID (insn);
480 if (lra_insn_recog_data_len > (int) uid
481 && (data = lra_insn_recog_data[uid]) != NULL)
483 /* Check that we did not change insn without updating the insn
485 lra_assert (data->insn == insn
486 && (INSN_CODE (insn) < 0
487 || data->icode == INSN_CODE (insn)));
490 return lra_set_insn_recog_data (insn);
493 /* Update offset from pseudos with VAL by INCR. */
495 lra_update_reg_val_offset (int val, poly_int64 incr)
499 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
501 if (lra_reg_info[i].val == val)
502 lra_reg_info[i].offset += incr;
506 /* Return true if register content is equal to VAL with OFFSET. */
508 lra_reg_val_equal_p (int regno, int val, poly_int64 offset)
510 if (lra_reg_info[regno].val == val
511 && known_eq (lra_reg_info[regno].offset, offset))
517 /* Assign value of register FROM to TO. */
519 lra_assign_reg_val (int from, int to)
521 lra_reg_info[to].val = lra_reg_info[from].val;
522 lra_reg_info[to].offset = lra_reg_info[from].offset;
525 #endif /* GCC_LRA_INT_H */