1 /* Code for RTL register eliminations.
2 Copyright (C) 2010-2013 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 /* Eliminable registers (like a soft argument or frame pointer) are
22 widely used in RTL. These eliminable registers should be replaced
23 by real hard registers (like the stack pointer or hard frame
24 pointer) plus some offset. The offsets usually change whenever the
25 stack is expanded. We know the final offsets only at the very end
28 Within LRA, we usually keep the RTL in such a state that the
29 eliminable registers can be replaced by just the corresponding hard
30 register (without any offset). To achieve this we should add the
31 initial elimination offset at the beginning of LRA and update the
32 offsets whenever the stack is expanded. We need to do this before
33 every constraint pass because the choice of offset often affects
34 whether a particular address or memory constraint is satisfied.
36 We keep RTL code at most time in such state that the virtual
37 registers can be changed by just the corresponding hard registers
38 (with zero offsets) and we have the right RTL code. To achieve this
39 we should add initial offset at the beginning of LRA work and update
40 offsets after each stack expanding. But actually we update virtual
41 registers to the same virtual registers + corresponding offsets
42 before every constraint pass because it affects constraint
43 satisfaction (e.g. an address displacement became too big for some
46 The final change of eliminable registers to the corresponding hard
47 registers are done at the very end of LRA when there were no change
56 #include "coretypes.h"
58 #include "hard-reg-set.h"
62 #include "insn-config.h"
63 #include "insn-codes.h"
66 #include "addresses.h"
70 #include "basic-block.h"
75 #include "rtl-error.h"
78 /* This structure is used to record information about hard register
82 /* Hard register number to be eliminated. */
84 /* Hard register number used as replacement. */
86 /* Difference between values of the two hard registers above on
87 previous iteration. */
88 HOST_WIDE_INT previous_offset;
89 /* Difference between the values on the current iteration. */
91 /* Nonzero if this elimination can be done. */
93 /* CAN_ELIMINATE since the last check. */
94 bool prev_can_eliminate;
95 /* REG rtx for the register to be eliminated. We cannot simply
96 compare the number since we might then spuriously replace a hard
97 register corresponding to a pseudo assigned to the reg to be
100 /* REG rtx for the replacement. */
104 /* The elimination table. Each array entry describes one possible way
105 of eliminating a register in favor of another. If there is more
106 than one way of eliminating a particular register, the most
107 preferred should be specified first. */
108 static struct elim_table *reg_eliminate = 0;
110 /* This is an intermediate structure to initialize the table. It has
111 exactly the members provided by ELIMINABLE_REGS. */
112 static const struct elim_table_1
116 } reg_eliminate_1[] =
118 /* If a set of eliminable hard registers was specified, define the
119 table from it. Otherwise, default to the normal case of the frame
120 pointer being replaced by the stack pointer. */
122 #ifdef ELIMINABLE_REGS
125 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}};
128 #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
130 /* Print info about elimination table to file F. */
132 print_elim_table (FILE *f)
134 struct elim_table *ep;
136 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
137 fprintf (f, "%s eliminate %d to %d (offset=" HOST_WIDE_INT_PRINT_DEC
138 ", prev_offset=" HOST_WIDE_INT_PRINT_DEC ")\n",
139 ep->can_eliminate ? "Can" : "Can't",
140 ep->from, ep->to, ep->offset, ep->previous_offset);
143 /* Print info about elimination table to stderr. */
145 lra_debug_elim_table (void)
147 print_elim_table (stderr);
150 /* Setup possibility of elimination in elimination table element EP to
151 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
152 pointer to stack pointer is not possible anymore. */
154 setup_can_eliminate (struct elim_table *ep, bool value)
156 ep->can_eliminate = ep->prev_can_eliminate = value;
158 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
159 frame_pointer_needed = 1;
162 /* Map: eliminable "from" register -> its current elimination,
163 or NULL if none. The elimination table may contain more than
164 one elimination for the same hard register, but this map specifies
165 the one that we are currently using. */
166 static struct elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
168 /* When an eliminable hard register becomes not eliminable, we use the
169 following special structure to restore original offsets for the
171 static struct elim_table self_elim_table;
173 /* Offsets should be used to restore original offsets for eliminable
174 hard register which just became not eliminable. Zero,
176 static HOST_WIDE_INT self_elim_offsets[FIRST_PSEUDO_REGISTER];
178 /* Map: hard regno -> RTL presentation. RTL presentations of all
179 potentially eliminable hard registers are stored in the map. */
180 static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
182 /* Set up ELIMINATION_MAP of the currently used eliminations. */
184 setup_elimination_map (void)
187 struct elim_table *ep;
189 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
190 elimination_map[i] = NULL;
191 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
192 if (ep->can_eliminate && elimination_map[ep->from] == NULL)
193 elimination_map[ep->from] = ep;
198 /* Compute the sum of X and Y, making canonicalizations assumed in an
199 address, namely: sum constant integers, surround the sum of two
200 constants with a CONST, put the constant as the second operand, and
201 group the constant on the outermost sum.
203 This routine assumes both inputs are already in canonical form. */
205 form_sum (rtx x, rtx y)
208 enum machine_mode mode = GET_MODE (x);
210 if (mode == VOIDmode)
213 if (mode == VOIDmode)
217 return plus_constant (mode, y, INTVAL (x));
218 else if (CONST_INT_P (y))
219 return plus_constant (mode, x, INTVAL (y));
220 else if (CONSTANT_P (x))
221 tem = x, x = y, y = tem;
223 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
224 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
226 /* Note that if the operands of Y are specified in the opposite
227 order in the recursive calls below, infinite recursion will
229 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
230 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
232 /* If both constant, encapsulate sum. Otherwise, just form sum. A
233 constant will have been placed second. */
234 if (CONSTANT_P (x) && CONSTANT_P (y))
236 if (GET_CODE (x) == CONST)
238 if (GET_CODE (y) == CONST)
241 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
244 return gen_rtx_PLUS (mode, x, y);
247 /* Return the current substitution hard register of the elimination of
248 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
250 lra_get_elimination_hard_regno (int hard_regno)
252 struct elim_table *ep;
254 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
256 if ((ep = elimination_map[hard_regno]) == NULL)
261 /* Return elimination which will be used for hard reg REG, NULL
263 static struct elim_table *
264 get_elimination (rtx reg)
267 struct elim_table *ep;
268 HOST_WIDE_INT offset;
270 lra_assert (REG_P (reg));
271 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
273 if ((ep = elimination_map[hard_regno]) != NULL)
274 return ep->from_rtx != reg ? NULL : ep;
275 if ((offset = self_elim_offsets[hard_regno]) == 0)
277 /* This is an iteration to restore offsets just after HARD_REGNO
278 stopped to be eliminable. */
279 self_elim_table.from = self_elim_table.to = hard_regno;
280 self_elim_table.from_rtx
281 = self_elim_table.to_rtx
282 = eliminable_reg_rtx[hard_regno];
283 lra_assert (self_elim_table.from_rtx != NULL);
284 self_elim_table.offset = offset;
285 return &self_elim_table;
288 /* Scan X and replace any eliminable registers (such as fp) with a
289 replacement (such as sp) if SUBST_P, plus an offset. The offset is
290 a change in the offset between the eliminable register and its
291 substitution if UPDATE_P, or the full offset if FULL_P, or
294 MEM_MODE is the mode of an enclosing MEM. We need this to know how
295 much to adjust a register for, e.g., PRE_DEC. Also, if we are
296 inside a MEM, we are allowed to replace a sum of a hard register
297 and the constant zero with the hard register, which we cannot do
298 outside a MEM. In addition, we need to record the fact that a
299 hard register is referenced outside a MEM.
301 Alternatively, INSN may be a note (an EXPR_LIST or INSN_LIST).
302 That's used when we eliminate in expressions stored in notes. */
304 lra_eliminate_regs_1 (rtx x, enum machine_mode mem_mode,
305 bool subst_p, bool update_p, bool full_p)
307 enum rtx_code code = GET_CODE (x);
308 struct elim_table *ep;
314 if (! current_function_decl)
332 /* First handle the case where we encounter a bare hard register
333 that is eliminable. Replace it with a PLUS. */
334 if ((ep = get_elimination (x)) != NULL)
336 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
339 return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
341 return plus_constant (Pmode, to, ep->offset);
348 /* If this is the sum of an eliminable register and a constant, rework
350 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
352 if ((ep = get_elimination (XEXP (x, 0))) != NULL)
354 HOST_WIDE_INT offset;
355 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
357 if (! update_p && ! full_p)
358 return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
361 ? ep->offset - ep->previous_offset : ep->offset);
362 if (CONST_INT_P (XEXP (x, 1))
363 && INTVAL (XEXP (x, 1)) == -offset)
366 return gen_rtx_PLUS (Pmode, to,
367 plus_constant (Pmode,
368 XEXP (x, 1), offset));
371 /* If the hard register is not eliminable, we are done since
372 the other operand is a constant. */
376 /* If this is part of an address, we want to bring any constant
377 to the outermost PLUS. We will do this by doing hard
378 register replacement in our operands and seeing if a constant
379 shows up in one of them.
381 Note that there is no risk of modifying the structure of the
382 insn, since we only get called for its operands, thus we are
383 either modifying the address inside a MEM, or something like
384 an address operand of a load-address insn. */
387 rtx new0 = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
388 subst_p, update_p, full_p);
389 rtx new1 = lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
390 subst_p, update_p, full_p);
392 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
393 return form_sum (new0, new1);
398 /* If this is the product of an eliminable hard register and a
399 constant, apply the distribute law and move the constant out
400 so that we have (plus (mult ..) ..). This is needed in order
401 to keep load-address insns valid. This case is pathological.
402 We ignore the possibility of overflow here. */
403 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
404 && (ep = get_elimination (XEXP (x, 0))) != NULL)
406 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
410 plus_constant (Pmode,
411 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
412 (ep->offset - ep->previous_offset)
413 * INTVAL (XEXP (x, 1)));
416 plus_constant (Pmode,
417 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
418 ep->offset * INTVAL (XEXP (x, 1)));
420 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
423 /* ... fall through ... */
427 /* See comments before PLUS about handling MINUS. */
431 case AND: case IOR: case XOR:
432 case ROTATERT: case ROTATE:
433 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
435 case GE: case GT: case GEU: case GTU:
436 case LE: case LT: case LEU: case LTU:
438 rtx new0 = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
439 subst_p, update_p, full_p);
440 rtx new1 = XEXP (x, 1)
441 ? lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
442 subst_p, update_p, full_p) : 0;
444 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
445 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
450 /* If we have something in XEXP (x, 0), the usual case,
454 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
455 subst_p, update_p, full_p);
456 if (new_rtx != XEXP (x, 0))
458 /* If this is a REG_DEAD note, it is not valid anymore.
459 Using the eliminated version could result in creating a
460 REG_DEAD note for the stack or frame pointer. */
461 if (REG_NOTE_KIND (x) == REG_DEAD)
463 ? lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
464 subst_p, update_p, full_p)
467 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
471 /* ... fall through ... */
474 /* Now do eliminations in the rest of the chain. If this was
475 an EXPR_LIST, this might result in allocating more memory than is
476 strictly needed, but it simplifies the code. */
479 new_rtx = lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
480 subst_p, update_p, full_p);
481 if (new_rtx != XEXP (x, 1))
483 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
484 XEXP (x, 0), new_rtx);
492 /* We do not support elimination of a register that is modified.
493 elimination_effects has already make sure that this does not
499 /* We do not support elimination of a hard register that is
500 modified. LRA has already make sure that this does not
501 happen. The only remaining case we need to consider here is
502 that the increment value may be an eliminable register. */
503 if (GET_CODE (XEXP (x, 1)) == PLUS
504 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
506 rtx new_rtx = lra_eliminate_regs_1 (XEXP (XEXP (x, 1), 1), mem_mode,
507 subst_p, update_p, full_p);
509 if (new_rtx != XEXP (XEXP (x, 1), 1))
510 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
511 gen_rtx_PLUS (GET_MODE (x),
512 XEXP (x, 0), new_rtx));
516 case STRICT_LOW_PART:
518 case SIGN_EXTEND: case ZERO_EXTEND:
519 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
520 case FLOAT: case FIX:
521 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
530 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
531 subst_p, update_p, full_p);
532 if (new_rtx != XEXP (x, 0))
533 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
537 new_rtx = lra_eliminate_regs_1 (SUBREG_REG (x), mem_mode,
538 subst_p, update_p, full_p);
540 if (new_rtx != SUBREG_REG (x))
542 int x_size = GET_MODE_SIZE (GET_MODE (x));
543 int new_size = GET_MODE_SIZE (GET_MODE (new_rtx));
545 if (MEM_P (new_rtx) && x_size <= new_size)
547 SUBREG_REG (x) = new_rtx;
548 alter_subreg (&x, false);
552 return simplify_gen_subreg (GET_MODE (x), new_rtx,
553 GET_MODE (new_rtx), SUBREG_BYTE (x));
559 /* Our only special processing is to pass the mode of the MEM to our
560 recursive call and copy the flags. While we are here, handle this
561 case more efficiently. */
563 replace_equiv_address_nv
565 lra_eliminate_regs_1 (XEXP (x, 0), GET_MODE (x),
566 subst_p, update_p, full_p));
569 /* Handle insn_list USE that a call to a pure function may generate. */
570 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), VOIDmode,
571 subst_p, update_p, full_p);
572 if (new_rtx != XEXP (x, 0))
573 return gen_rtx_USE (GET_MODE (x), new_rtx);
584 /* Process each of our operands recursively. If any have changed, make a
586 fmt = GET_RTX_FORMAT (code);
587 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
591 new_rtx = lra_eliminate_regs_1 (XEXP (x, i), mem_mode,
592 subst_p, update_p, full_p);
593 if (new_rtx != XEXP (x, i) && ! copied)
595 x = shallow_copy_rtx (x);
598 XEXP (x, i) = new_rtx;
600 else if (*fmt == 'E')
603 for (j = 0; j < XVECLEN (x, i); j++)
605 new_rtx = lra_eliminate_regs_1 (XVECEXP (x, i, j), mem_mode,
606 subst_p, update_p, full_p);
607 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
609 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
613 x = shallow_copy_rtx (x);
619 XVECEXP (x, i, j) = new_rtx;
627 /* This function is used externally in subsequent passes of GCC. It
628 always does a full elimination of X. */
630 lra_eliminate_regs (rtx x, enum machine_mode mem_mode,
631 rtx insn ATTRIBUTE_UNUSED)
633 return lra_eliminate_regs_1 (x, mem_mode, true, false, true);
636 /* Scan rtx X for references to elimination source or target registers
637 in contexts that would prevent the elimination from happening.
638 Update the table of eliminables to reflect the changed state.
639 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
642 mark_not_eliminable (rtx x)
644 enum rtx_code code = GET_CODE (x);
645 struct elim_table *ep;
657 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
658 /* If we modify the source of an elimination rule, disable
659 it. Do the same if it is the source and not the hard frame
661 for (ep = reg_eliminate;
662 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
664 if (ep->from_rtx == XEXP (x, 0)
665 || (ep->to_rtx == XEXP (x, 0)
666 && ep->to_rtx != hard_frame_pointer_rtx))
667 setup_can_eliminate (ep, false);
671 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
672 /* If using a hard register that is the source of an eliminate
673 we still think can be performed, note it cannot be
674 performed since we don't know how this hard register is
676 for (ep = reg_eliminate;
677 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
679 if (ep->from_rtx == XEXP (x, 0)
680 && ep->to_rtx != hard_frame_pointer_rtx)
681 setup_can_eliminate (ep, false);
685 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
686 /* If clobbering a hard register that is the replacement
687 register for an elimination we still think can be
688 performed, note that it cannot be performed. Otherwise, we
689 need not be concerned about it. */
690 for (ep = reg_eliminate;
691 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
693 if (ep->to_rtx == XEXP (x, 0)
694 && ep->to_rtx != hard_frame_pointer_rtx)
695 setup_can_eliminate (ep, false);
699 /* Check for setting a hard register that we know about. */
700 if (REG_P (SET_DEST (x)) && REGNO (SET_DEST (x)) < FIRST_PSEUDO_REGISTER)
702 /* See if this is setting the replacement hard register for
705 If DEST is the hard frame pointer, we do nothing because
706 we assume that all assignments to the frame pointer are
707 for non-local gotos and are being done at a time when
708 they are valid and do not disturb anything else. Some
709 machines want to eliminate a fake argument pointer (or
710 even a fake frame pointer) with either the real frame
711 pointer or the stack pointer. Assignments to the hard
712 frame pointer must not prevent this elimination. */
714 for (ep = reg_eliminate;
715 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
717 if (ep->to_rtx == SET_DEST (x)
718 && SET_DEST (x) != hard_frame_pointer_rtx
719 && (! (SUPPORTS_STACK_ALIGNMENT && stack_realign_fp
720 && REGNO (ep->to_rtx) == STACK_POINTER_REGNUM)
721 || GET_CODE (SET_SRC (x)) != PLUS
722 || XEXP (SET_SRC (x), 0) != SET_DEST (x)
723 || ! CONST_INT_P (XEXP (SET_SRC (x), 1))))
724 setup_can_eliminate (ep, false);
727 mark_not_eliminable (SET_DEST (x));
728 mark_not_eliminable (SET_SRC (x));
735 fmt = GET_RTX_FORMAT (code);
736 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
739 mark_not_eliminable (XEXP (x, i));
740 else if (*fmt == 'E')
741 for (j = 0; j < XVECLEN (x, i); j++)
742 mark_not_eliminable (XVECEXP (x, i, j));
748 /* Scan INSN and eliminate all eliminable hard registers in it.
750 If REPLACE_P is true, do the replacement destructively. Also
751 delete the insn as dead it if it is setting an eliminable register.
753 If REPLACE_P is false, just update the offsets while keeping the
754 base register the same. */
757 eliminate_regs_in_insn (rtx insn, bool replace_p)
759 int icode = recog_memoized (insn);
760 rtx old_set = single_set (insn);
763 rtx substed_operand[MAX_RECOG_OPERANDS];
764 rtx orig_operand[MAX_RECOG_OPERANDS];
765 struct elim_table *ep;
766 rtx plus_src, plus_cst_src;
767 lra_insn_recog_data_t id;
768 struct lra_static_insn_data *static_id;
770 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
772 lra_assert (GET_CODE (PATTERN (insn)) == USE
773 || GET_CODE (PATTERN (insn)) == CLOBBER
774 || GET_CODE (PATTERN (insn)) == ADDR_VEC
775 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
776 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
780 /* Check for setting an eliminable register. */
781 if (old_set != 0 && REG_P (SET_DEST (old_set))
782 && (ep = get_elimination (SET_DEST (old_set))) != NULL)
784 bool delete_p = replace_p;
786 #ifdef HARD_FRAME_POINTER_REGNUM
787 /* If this is setting the frame pointer register to the hardware
788 frame pointer register and this is an elimination that will
789 be done (tested above), this insn is really adjusting the
790 frame pointer downward to compensate for the adjustment done
791 before a nonlocal goto. */
792 if (ep->from == FRAME_POINTER_REGNUM
793 && ep->to == HARD_FRAME_POINTER_REGNUM)
797 SET_DEST (old_set) = ep->to_rtx;
798 lra_update_insn_recog_data (insn);
803 rtx base = SET_SRC (old_set);
804 HOST_WIDE_INT offset = 0;
805 rtx base_insn = insn;
807 while (base != ep->to_rtx)
809 rtx prev_insn, prev_set;
811 if (GET_CODE (base) == PLUS && CONST_INT_P (XEXP (base, 1)))
813 offset += INTVAL (XEXP (base, 1));
814 base = XEXP (base, 0);
816 else if ((prev_insn = prev_nonnote_insn (base_insn)) != 0
817 && (prev_set = single_set (prev_insn)) != 0
818 && rtx_equal_p (SET_DEST (prev_set), base))
820 base = SET_SRC (prev_set);
821 base_insn = prev_insn;
827 if (base == ep->to_rtx)
831 offset -= (ep->offset - ep->previous_offset);
832 src = plus_constant (Pmode, ep->to_rtx, offset);
834 /* First see if this insn remains valid when we make
835 the change. If not, keep the INSN_CODE the same
836 and let the constraint pass fit it up. */
837 validate_change (insn, &SET_SRC (old_set), src, 1);
838 validate_change (insn, &SET_DEST (old_set),
840 if (! apply_change_group ())
842 SET_SRC (old_set) = src;
843 SET_DEST (old_set) = ep->from_rtx;
845 lra_update_insn_recog_data (insn);
851 /* We can't delete this insn, but needn't process it
852 since it won't be used unless something changes. */
857 /* This insn isn't serving a useful purpose. We delete it
858 when REPLACE is set. */
860 lra_delete_dead_insn (insn);
864 /* We allow one special case which happens to work on all machines we
865 currently support: a single set with the source or a REG_EQUAL
866 note being a PLUS of an eliminable register and a constant. */
867 plus_src = plus_cst_src = 0;
868 if (old_set && REG_P (SET_DEST (old_set)))
870 if (GET_CODE (SET_SRC (old_set)) == PLUS)
871 plus_src = SET_SRC (old_set);
872 /* First see if the source is of the form (plus (...) CST). */
874 && CONST_INT_P (XEXP (plus_src, 1)))
875 plus_cst_src = plus_src;
876 /* Check that the first operand of the PLUS is a hard reg or
877 the lowpart subreg of one. */
880 rtx reg = XEXP (plus_cst_src, 0);
882 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
883 reg = SUBREG_REG (reg);
885 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
891 rtx reg = XEXP (plus_cst_src, 0);
892 HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1));
894 if (GET_CODE (reg) == SUBREG)
895 reg = SUBREG_REG (reg);
897 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
899 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
903 offset += (ep->offset - ep->previous_offset);
904 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
907 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
908 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
909 /* If we have a nonzero offset, and the source is already a
910 simple REG, the following transformation would increase
911 the cost of the insn by replacing a simple REG with (plus
912 (reg sp) CST). So try only when we already had a PLUS
914 if (offset == 0 || plus_src)
916 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
918 old_set = single_set (insn);
920 /* First see if this insn remains valid when we make the
921 change. If not, try to replace the whole pattern
922 with a simple set (this may help if the original insn
923 was a PARALLEL that was only recognized as single_set
924 due to REG_UNUSED notes). If this isn't valid
925 either, keep the INSN_CODE the same and let the
926 constraint pass fix it up. */
927 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
929 rtx new_pat = gen_rtx_SET (VOIDmode,
930 SET_DEST (old_set), new_src);
932 if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
933 SET_SRC (old_set) = new_src;
935 lra_update_insn_recog_data (insn);
936 /* This can't have an effect on elimination offsets, so skip
943 /* Eliminate all eliminable registers occurring in operands that
944 can be handled by the constraint pass. */
945 id = lra_get_insn_recog_data (insn);
946 static_id = id->insn_static_data;
948 for (i = 0; i < static_id->n_operands; i++)
950 orig_operand[i] = *id->operand_loc[i];
951 substed_operand[i] = *id->operand_loc[i];
953 /* For an asm statement, every operand is eliminable. */
954 if (icode < 0 || insn_data[icode].operand[i].eliminable)
956 /* Check for setting a hard register that we know about. */
957 if (static_id->operand[i].type != OP_IN
958 && REG_P (orig_operand[i]))
960 /* If we are assigning to a hard register that can be
961 eliminated, it must be as part of a PARALLEL, since
962 the code above handles single SETs. This reg can not
963 be longer eliminated -- it is forced by
964 mark_not_eliminable. */
965 for (ep = reg_eliminate;
966 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
968 lra_assert (ep->from_rtx != orig_operand[i]
969 || ! ep->can_eliminate);
972 /* Companion to the above plus substitution, we can allow
973 invariants as the source of a plain move. */
975 = lra_eliminate_regs_1 (*id->operand_loc[i], VOIDmode,
976 replace_p, ! replace_p, false);
977 if (substed_operand[i] != orig_operand[i])
982 /* Substitute the operands; the new values are in the substed_operand
984 for (i = 0; i < static_id->n_operands; i++)
985 *id->operand_loc[i] = substed_operand[i];
986 for (i = 0; i < static_id->n_dups; i++)
987 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
991 /* If we had a move insn but now we don't, re-recognize it.
992 This will cause spurious re-recognition if the old move had a
993 PARALLEL since the new one still will, but we can't call
994 single_set without having put new body into the insn and the
995 re-recognition won't hurt in this rare case. */
996 id = lra_update_insn_recog_data (insn);
997 static_id = id->insn_static_data;
1001 /* Spill pseudos which are assigned to hard registers in SET. Add
1002 affected insns for processing in the subsequent constraint
1005 spill_pseudos (HARD_REG_SET set)
1008 bitmap_head to_process;
1011 if (hard_reg_set_empty_p (set))
1013 if (lra_dump_file != NULL)
1015 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
1016 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1017 if (TEST_HARD_REG_BIT (set, i))
1018 fprintf (lra_dump_file, " %d", i);
1019 fprintf (lra_dump_file, "\n");
1021 bitmap_initialize (&to_process, ®_obstack);
1022 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
1023 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
1024 && overlaps_hard_reg_set_p (set,
1025 PSEUDO_REGNO_MODE (i), reg_renumber[i]))
1027 if (lra_dump_file != NULL)
1028 fprintf (lra_dump_file, " Spilling r%d(%d)\n",
1029 i, reg_renumber[i]);
1030 reg_renumber[i] = -1;
1031 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
1033 IOR_HARD_REG_SET (lra_no_alloc_regs, set);
1034 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
1035 if (bitmap_bit_p (&to_process, INSN_UID (insn)))
1037 lra_push_insn (insn);
1038 lra_set_used_insn_alternative (insn, -1);
1040 bitmap_clear (&to_process);
1043 /* Update all offsets and possibility for elimination on eliminable
1044 registers. Spill pseudos assigned to registers which became
1045 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
1046 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
1047 registers whose offsets should be changed. */
1049 update_reg_eliminate (bitmap insns_with_changed_offsets)
1052 struct elim_table *ep, *ep1;
1053 HARD_REG_SET temp_hard_reg_set;
1055 /* Clear self elimination offsets. */
1056 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1057 self_elim_offsets[ep->from] = 0;
1058 CLEAR_HARD_REG_SET (temp_hard_reg_set);
1059 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1061 /* If it is a currently used elimination: update the previous
1063 if (elimination_map[ep->from] == ep)
1064 ep->previous_offset = ep->offset;
1066 prev = ep->prev_can_eliminate;
1067 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
1068 if (ep->can_eliminate && ! prev)
1070 /* It is possible that not eliminable register becomes
1071 eliminable because we took other reasons into account to
1072 set up eliminable regs in the initial set up. Just
1073 ignore new eliminable registers. */
1074 setup_can_eliminate (ep, false);
1077 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
1079 /* We cannot use this elimination anymore -- find another
1081 if (lra_dump_file != NULL)
1082 fprintf (lra_dump_file,
1083 " Elimination %d to %d is not possible anymore\n",
1085 /* Mark that is not eliminable anymore. */
1086 elimination_map[ep->from] = NULL;
1087 for (ep1 = ep + 1; ep1 < ®_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
1088 if (ep1->can_eliminate && ep1->from == ep->from)
1090 if (ep1 < ®_eliminate[NUM_ELIMINABLE_REGS])
1092 if (lra_dump_file != NULL)
1093 fprintf (lra_dump_file, " Using elimination %d to %d now\n",
1094 ep1->from, ep1->to);
1095 /* Prevent the hard register into which we eliminate now
1096 from the usage for pseudos. */
1097 SET_HARD_REG_BIT (temp_hard_reg_set, ep1->to);
1098 lra_assert (ep1->previous_offset == 0);
1099 ep1->previous_offset = ep->offset;
1103 /* There is no elimination anymore just use the hard
1104 register `from' itself. Setup self elimination
1105 offset to restore the original offset values. */
1106 if (lra_dump_file != NULL)
1107 fprintf (lra_dump_file, " %d is not eliminable at all\n",
1109 self_elim_offsets[ep->from] = -ep->offset;
1110 SET_HARD_REG_BIT (temp_hard_reg_set, ep->from);
1111 if (ep->offset != 0)
1112 bitmap_ior_into (insns_with_changed_offsets,
1113 &lra_reg_info[ep->from].insn_bitmap);
1117 #ifdef ELIMINABLE_REGS
1118 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
1120 INITIAL_FRAME_POINTER_OFFSET (ep->offset);
1123 IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set);
1124 AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
1125 spill_pseudos (temp_hard_reg_set);
1126 setup_elimination_map ();
1127 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1128 if (elimination_map[ep->from] == ep && ep->previous_offset != ep->offset)
1129 bitmap_ior_into (insns_with_changed_offsets,
1130 &lra_reg_info[ep->from].insn_bitmap);
1133 /* Initialize the table of hard registers to eliminate.
1134 Pre-condition: global flag frame_pointer_needed has been set before
1135 calling this function. */
1137 init_elim_table (void)
1140 struct elim_table *ep;
1141 #ifdef ELIMINABLE_REGS
1142 const struct elim_table_1 *ep1;
1146 reg_eliminate = XCNEWVEC (struct elim_table, NUM_ELIMINABLE_REGS);
1148 memset (self_elim_offsets, 0, sizeof (self_elim_offsets));
1149 /* Initiate member values which will be never changed. */
1150 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
1151 self_elim_table.previous_offset = 0;
1152 #ifdef ELIMINABLE_REGS
1153 for (ep = reg_eliminate, ep1 = reg_eliminate_1;
1154 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
1156 ep->offset = ep->previous_offset = 0;
1157 ep->from = ep1->from;
1159 value_p = (targetm.can_eliminate (ep->from, ep->to)
1160 && ! (ep->to == STACK_POINTER_REGNUM
1161 && frame_pointer_needed
1162 && (! SUPPORTS_STACK_ALIGNMENT
1163 || ! stack_realign_fp)));
1164 setup_can_eliminate (ep, value_p);
1167 reg_eliminate[0].offset = reg_eliminate[0].previous_offset = 0;
1168 reg_eliminate[0].from = reg_eliminate_1[0].from;
1169 reg_eliminate[0].to = reg_eliminate_1[0].to;
1170 setup_can_eliminate (®_eliminate[0], ! frame_pointer_needed);
1173 /* Count the number of eliminable registers and build the FROM and TO
1174 REG rtx's. Note that code in gen_rtx_REG will cause, e.g.,
1175 gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to equal stack_pointer_rtx.
1176 We depend on this. */
1177 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1179 ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
1180 ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
1181 eliminable_reg_rtx[ep->from] = ep->from_rtx;
1185 /* Entry function for initialization of elimination once per
1188 lra_init_elimination (void)
1195 FOR_BB_INSNS (bb, insn)
1196 if (NONDEBUG_INSN_P (insn))
1197 mark_not_eliminable (PATTERN (insn));
1198 setup_elimination_map ();
1201 /* Eliminate hard reg given by its location LOC. */
1203 lra_eliminate_reg_if_possible (rtx *loc)
1206 struct elim_table *ep;
1208 lra_assert (REG_P (*loc));
1209 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
1210 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno))
1212 if ((ep = get_elimination (*loc)) != NULL)
1216 /* Do (final if FINAL_P) elimination in INSN. Add the insn for
1217 subsequent processing in the constraint pass, update the insn info. */
1219 process_insn_for_elimination (rtx insn, bool final_p)
1221 eliminate_regs_in_insn (insn, final_p);
1224 /* Check that insn changed its code. This is a case when a move
1225 insn becomes an add insn and we do not want to process the
1226 insn as a move anymore. */
1227 int icode = recog (PATTERN (insn), insn, 0);
1229 if (icode >= 0 && icode != INSN_CODE (insn))
1231 INSN_CODE (insn) = icode;
1232 lra_update_insn_recog_data (insn);
1234 lra_update_insn_regno_info (insn);
1235 lra_push_insn (insn);
1236 lra_set_used_insn_alternative (insn, -1);
1240 /* Entry function to do final elimination if FINAL_P or to update
1241 elimination register offsets. */
1243 lra_eliminate (bool final_p)
1247 rtx mem_loc, invariant;
1248 bitmap_head insns_with_changed_offsets;
1250 struct elim_table *ep;
1251 int regs_num = max_reg_num ();
1253 timevar_push (TV_LRA_ELIMINATE);
1255 bitmap_initialize (&insns_with_changed_offsets, ®_obstack);
1258 #ifdef ENABLE_CHECKING
1259 update_reg_eliminate (&insns_with_changed_offsets);
1260 if (! bitmap_empty_p (&insns_with_changed_offsets))
1263 /* We change eliminable hard registers in insns so we should do
1264 this for all insns containing any eliminable hard
1266 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1267 if (elimination_map[ep->from] != NULL)
1268 bitmap_ior_into (&insns_with_changed_offsets,
1269 &lra_reg_info[ep->from].insn_bitmap);
1273 update_reg_eliminate (&insns_with_changed_offsets);
1274 if (bitmap_empty_p (&insns_with_changed_offsets))
1275 goto lra_eliminate_done;
1277 if (lra_dump_file != NULL)
1279 fprintf (lra_dump_file, "New elimination table:\n");
1280 print_elim_table (lra_dump_file);
1282 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
1283 if (lra_reg_info[i].nrefs != 0)
1285 mem_loc = ira_reg_equiv[i].memory;
1286 if (mem_loc != NULL_RTX)
1287 mem_loc = lra_eliminate_regs_1 (mem_loc, VOIDmode,
1288 final_p, ! final_p, false);
1289 ira_reg_equiv[i].memory = mem_loc;
1290 invariant = ira_reg_equiv[i].invariant;
1291 if (invariant != NULL_RTX)
1292 invariant = lra_eliminate_regs_1 (invariant, VOIDmode,
1293 final_p, ! final_p, false);
1294 ira_reg_equiv[i].invariant = invariant;
1295 if (lra_dump_file != NULL
1296 && (mem_loc != NULL_RTX || invariant != NULL))
1297 fprintf (lra_dump_file,
1298 "Updating elimination of equiv for reg %d\n", i);
1300 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
1301 process_insn_for_elimination (lra_insn_recog_data[uid]->insn, final_p);
1302 bitmap_clear (&insns_with_changed_offsets);
1305 timevar_pop (TV_LRA_ELIMINATE);