1 /* Decompose multiword subregs.
2 Copyright (C) 2007 Free Software Foundation, Inc.
3 Contributed by Richard Henderson <rth@redhat.com>
4 Ian Lance Taylor <iant@google.com>
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
31 #include "insn-config.h"
33 #include "basic-block.h"
39 #include "tree-pass.h"
42 #ifdef STACK_GROWS_DOWNWARD
43 # undef STACK_GROWS_DOWNWARD
44 # define STACK_GROWS_DOWNWARD 1
46 # define STACK_GROWS_DOWNWARD 0
50 DEF_VEC_ALLOC_P (bitmap,heap);
52 /* Decompose multi-word pseudo-registers into individual
53 pseudo-registers when possible. This is possible when all the uses
54 of a multi-word register are via SUBREG, or are copies of the
55 register to another location. Breaking apart the register permits
56 more CSE and permits better register allocation. */
58 /* Bit N in this bitmap is set if regno N is used in a context in
59 which we can decompose it. */
60 static bitmap decomposable_context;
62 /* Bit N in this bitmap is set if regno N is used in a context in
63 which it can not be decomposed. */
64 static bitmap non_decomposable_context;
66 /* Bit N in the bitmap in element M of this array is set if there is a
67 copy from reg M to reg N. */
68 static VEC(bitmap,heap) *reg_copy_graph;
70 /* Return whether X is a simple object which we can take a word_mode
74 simple_move_operand (rtx x)
76 if (GET_CODE (x) == SUBREG)
82 if (GET_CODE (x) == LABEL_REF
83 || GET_CODE (x) == SYMBOL_REF
84 || GET_CODE (x) == HIGH
85 || GET_CODE (x) == CONST)
89 && (MEM_VOLATILE_P (x)
90 || mode_dependent_address_p (XEXP (x, 0))))
96 /* If INSN is a single set between two objects, return the single set.
97 Such an insn can always be decomposed. INSN should have been
98 passed to recog and extract_insn before this is called. */
101 simple_move (rtx insn)
105 enum machine_mode mode;
107 if (recog_data.n_operands != 2)
110 set = single_set (insn);
115 if (x != recog_data.operand[0] && x != recog_data.operand[1])
117 if (!simple_move_operand (x))
121 if (x != recog_data.operand[0] && x != recog_data.operand[1])
123 /* For the src we can handle ASM_OPERANDS, and it is beneficial for
124 things like x86 rdtsc which returns a DImode value. */
125 if (GET_CODE (x) != ASM_OPERANDS
126 && !simple_move_operand (x))
129 /* We try to decompose in integer modes, to avoid generating
130 inefficient code copying between integer and floating point
131 registers. That means that we can't decompose if this is a
132 non-integer mode for which there is no integer mode of the same
134 mode = GET_MODE (SET_SRC (set));
135 if (!SCALAR_INT_MODE_P (mode)
136 && (mode_for_size (GET_MODE_SIZE (mode) * BITS_PER_UNIT, MODE_INT, 0)
140 /* Reject PARTIAL_INT modes. They are used for processor specific
141 purposes and it's probably best not to tamper with them. */
142 if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
148 /* If SET is a copy from one multi-word pseudo-register to another,
149 record that in reg_copy_graph. Return whether it is such a
153 find_pseudo_copy (rtx set)
155 rtx dest = SET_DEST (set);
156 rtx src = SET_SRC (set);
160 if (!REG_P (dest) || !REG_P (src))
165 if (HARD_REGISTER_NUM_P (rd) || HARD_REGISTER_NUM_P (rs))
168 if (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
171 b = VEC_index (bitmap, reg_copy_graph, rs);
174 b = BITMAP_ALLOC (NULL);
175 VEC_replace (bitmap, reg_copy_graph, rs, b);
178 bitmap_set_bit (b, rd);
183 /* Look through the registers in DECOMPOSABLE_CONTEXT. For each case
184 where they are copied to another register, add the register to
185 which they are copied to DECOMPOSABLE_CONTEXT. Use
186 NON_DECOMPOSABLE_CONTEXT to limit this--we don't bother to track
187 copies of registers which are in NON_DECOMPOSABLE_CONTEXT. */
190 propagate_pseudo_copies (void)
192 bitmap queue, propagate;
194 queue = BITMAP_ALLOC (NULL);
195 propagate = BITMAP_ALLOC (NULL);
197 bitmap_copy (queue, decomposable_context);
200 bitmap_iterator iter;
203 bitmap_clear (propagate);
205 EXECUTE_IF_SET_IN_BITMAP (queue, 0, i, iter)
207 bitmap b = VEC_index (bitmap, reg_copy_graph, i);
209 bitmap_ior_and_compl_into (propagate, b, non_decomposable_context);
212 bitmap_and_compl (queue, propagate, decomposable_context);
213 bitmap_ior_into (decomposable_context, propagate);
215 while (!bitmap_empty_p (queue));
218 BITMAP_FREE (propagate);
221 /* A pointer to one of these values is passed to
222 find_decomposable_subregs via for_each_rtx. */
224 enum classify_move_insn
226 /* Not a simple move from one location to another. */
228 /* A simple move from one pseudo-register to another with no
230 SIMPLE_PSEUDO_REG_MOVE,
231 /* A simple move involving a non-pseudo-register, or from one
232 pseudo-register to another with a REG_RETVAL note. */
236 /* This is called via for_each_rtx. If we find a SUBREG which we
237 could use to decompose a pseudo-register, set a bit in
238 DECOMPOSABLE_CONTEXT. If we find an unadorned register which is
239 not a simple pseudo-register copy, DATA will point at the type of
240 move, and we set a bit in DECOMPOSABLE_CONTEXT or
241 NON_DECOMPOSABLE_CONTEXT as appropriate. */
244 find_decomposable_subregs (rtx *px, void *data)
246 enum classify_move_insn *pcmi = (enum classify_move_insn *) data;
252 if (GET_CODE (x) == SUBREG)
254 rtx inner = SUBREG_REG (x);
255 unsigned int regno, outer_size, inner_size, outer_words, inner_words;
260 regno = REGNO (inner);
261 if (HARD_REGISTER_NUM_P (regno))
264 outer_size = GET_MODE_SIZE (GET_MODE (x));
265 inner_size = GET_MODE_SIZE (GET_MODE (inner));
266 outer_words = (outer_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
267 inner_words = (inner_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
269 /* We only try to decompose single word subregs of multi-word
270 registers. When we find one, we return -1 to avoid iterating
271 over the inner register.
273 ??? This doesn't allow, e.g., DImode subregs of TImode values
274 on 32-bit targets. We would need to record the way the
275 pseudo-register was used, and only decompose if all the uses
276 were the same number and size of pieces. Hopefully this
277 doesn't happen much. */
279 if (outer_words == 1 && inner_words > 1)
281 bitmap_set_bit (decomposable_context, regno);
285 /* If this is a cast from one mode to another, where the modes
286 have the same size, and they are not tieable, then mark this
287 register as non-decomposable. If we decompose it we are
288 likely to mess up whatever the backend is trying to do. */
290 && outer_size == inner_size
291 && !MODES_TIEABLE_P (GET_MODE (x), GET_MODE (inner)))
293 bitmap_set_bit (non_decomposable_context, regno);
301 /* We will see an outer SUBREG before we see the inner REG, so
302 when we see a plain REG here it means a direct reference to
305 If this is not a simple copy from one location to another,
306 then we can not decompose this register. If this is a simple
307 copy from one pseudo-register to another, with no REG_RETVAL
308 note, and the mode is right, then we mark the register as
309 decomposable. Otherwise we don't say anything about this
310 register--it could be decomposed, but whether that would be
311 profitable depends upon how it is used elsewhere.
313 We only set bits in the bitmap for multi-word
314 pseudo-registers, since those are the only ones we care about
315 and it keeps the size of the bitmaps down. */
318 if (!HARD_REGISTER_NUM_P (regno)
319 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
323 case NOT_SIMPLE_MOVE:
324 bitmap_set_bit (non_decomposable_context, regno);
326 case SIMPLE_PSEUDO_REG_MOVE:
327 if (MODES_TIEABLE_P (GET_MODE (x), word_mode))
328 bitmap_set_bit (decomposable_context, regno);
339 enum classify_move_insn cmi_mem = NOT_SIMPLE_MOVE;
341 /* Any registers used in a MEM do not participate in a
342 SIMPLE_MOVE or SIMPLE_PSEUDO_REG_MOVE. Do our own recursion
343 here, and return -1 to block the parent's recursion. */
344 for_each_rtx (&XEXP (x, 0), find_decomposable_subregs, &cmi_mem);
351 /* Decompose REGNO into word-sized components. We smash the REG node
352 in place. This ensures that (1) something goes wrong quickly if we
353 fail to make some replacement, and (2) the debug information inside
354 the symbol table is automatically kept up to date. */
357 decompose_register (unsigned int regno)
360 unsigned int words, i;
363 reg = regno_reg_rtx[regno];
365 regno_reg_rtx[regno] = NULL_RTX;
367 words = GET_MODE_SIZE (GET_MODE (reg));
368 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
370 v = rtvec_alloc (words);
371 for (i = 0; i < words; ++i)
372 RTVEC_ELT (v, i) = gen_reg_rtx_offset (reg, word_mode, i * UNITS_PER_WORD);
374 PUT_CODE (reg, CONCATN);
379 fprintf (dump_file, "; Splitting reg %u ->", regno);
380 for (i = 0; i < words; ++i)
381 fprintf (dump_file, " %u", REGNO (XVECEXP (reg, 0, i)));
382 fputc ('\n', dump_file);
386 /* Get a SUBREG of a CONCATN. */
389 simplify_subreg_concatn (enum machine_mode outermode, rtx op,
392 unsigned int inner_size;
393 enum machine_mode innermode;
395 unsigned int final_offset;
397 gcc_assert (GET_CODE (op) == CONCATN);
398 gcc_assert (byte % GET_MODE_SIZE (outermode) == 0);
400 innermode = GET_MODE (op);
401 gcc_assert (byte < GET_MODE_SIZE (innermode));
402 gcc_assert (GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (innermode));
404 inner_size = GET_MODE_SIZE (innermode) / XVECLEN (op, 0);
405 part = XVECEXP (op, 0, byte / inner_size);
406 final_offset = byte % inner_size;
407 if (final_offset + GET_MODE_SIZE (outermode) > inner_size)
410 return simplify_gen_subreg (outermode, part, GET_MODE (part), final_offset);
413 /* Wrapper around simplify_gen_subreg which handles CONCATN. */
416 simplify_gen_subreg_concatn (enum machine_mode outermode, rtx op,
417 enum machine_mode innermode, unsigned int byte)
421 /* We have to handle generating a SUBREG of a SUBREG of a CONCATN.
422 If OP is a SUBREG of a CONCATN, then it must be a simple mode
423 change with the same size and offset 0, or it must extract a
424 part. We shouldn't see anything else here. */
425 if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == CONCATN)
429 if ((GET_MODE_SIZE (GET_MODE (op))
430 == GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))))
431 && SUBREG_BYTE (op) == 0)
432 return simplify_gen_subreg_concatn (outermode, SUBREG_REG (op),
433 GET_MODE (SUBREG_REG (op)), byte);
435 op2 = simplify_subreg_concatn (GET_MODE (op), SUBREG_REG (op),
439 /* We don't handle paradoxical subregs here. */
440 gcc_assert (GET_MODE_SIZE (outermode)
441 <= GET_MODE_SIZE (GET_MODE (op)));
442 gcc_assert (GET_MODE_SIZE (GET_MODE (op))
443 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))));
444 op2 = simplify_subreg_concatn (outermode, SUBREG_REG (op),
445 byte + SUBREG_BYTE (op));
446 gcc_assert (op2 != NULL_RTX);
451 gcc_assert (op != NULL_RTX);
452 gcc_assert (innermode == GET_MODE (op));
455 if (GET_CODE (op) == CONCATN)
456 return simplify_subreg_concatn (outermode, op, byte);
458 ret = simplify_gen_subreg (outermode, op, innermode, byte);
460 /* If we see an insn like (set (reg:DI) (subreg:DI (reg:SI) 0)) then
461 resolve_simple_move will ask for the high part of the paradoxical
462 subreg, which does not have a value. Just return a zero. */
464 && GET_CODE (op) == SUBREG
465 && SUBREG_BYTE (op) == 0
466 && (GET_MODE_SIZE (innermode)
467 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op)))))
468 return CONST0_RTX (outermode);
470 gcc_assert (ret != NULL_RTX);
474 /* Return whether we should resolve X into the registers into which it
478 resolve_reg_p (rtx x)
480 return GET_CODE (x) == CONCATN;
483 /* Return whether X is a SUBREG of a register which we need to
487 resolve_subreg_p (rtx x)
489 if (GET_CODE (x) != SUBREG)
491 return resolve_reg_p (SUBREG_REG (x));
494 /* This is called via for_each_rtx. Look for SUBREGs which need to be
498 resolve_subreg_use (rtx *px, void *data)
500 rtx insn = (rtx) data;
506 if (resolve_subreg_p (x))
508 x = simplify_subreg_concatn (GET_MODE (x), SUBREG_REG (x),
511 /* It is possible for a note to contain a reference which we can
512 decompose. In this case, return 1 to the caller to indicate
513 that the note must be removed. */
520 validate_change (insn, px, x, 1);
524 if (resolve_reg_p (x))
526 /* Return 1 to the caller to indicate that we found a direct
527 reference to a register which is being decomposed. This can
528 happen inside notes, multiword shift or zero-extend
536 /* We are deleting INSN. Move any EH_REGION notes to INSNS. */
539 move_eh_region_note (rtx insn, rtx insns)
543 note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
544 if (note == NULL_RTX)
547 gcc_assert (CALL_P (insn)
548 || (flag_non_call_exceptions && may_trap_p (PATTERN (insn))));
550 for (p = insns; p != NULL_RTX; p = NEXT_INSN (p))
553 || (flag_non_call_exceptions
555 && may_trap_p (PATTERN (p))))
556 REG_NOTES (p) = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (note, 0),
561 /* If there is a REG_LIBCALL note on OLD_START, move it to NEW_START,
562 and link the corresponding REG_RETVAL note to NEW_START. */
565 move_libcall_note (rtx old_start, rtx new_start)
567 rtx note0, note1, end;
569 note0 = find_reg_note (old_start, REG_LIBCALL, NULL);
570 if (note0 == NULL_RTX)
573 remove_note (old_start, note0);
574 end = XEXP (note0, 0);
575 note1 = find_reg_note (end, REG_RETVAL, NULL);
577 XEXP (note0, 1) = REG_NOTES (new_start);
578 REG_NOTES (new_start) = note0;
579 XEXP (note1, 0) = new_start;
582 /* Remove any REG_RETVAL note, the corresponding REG_LIBCALL note, and
583 any markers for a no-conflict block. We have decomposed the
584 registers so the non-conflict is now obvious. */
587 remove_retval_note (rtx insn1)
589 rtx note0, insn0, note1;
591 note1 = find_reg_note (insn1, REG_RETVAL, NULL);
592 if (note1 == NULL_RTX)
595 insn0 = XEXP (note1, 0);
596 note0 = find_reg_note (insn0, REG_LIBCALL, NULL);
598 remove_note (insn0, note0);
599 remove_note (insn1, note1);
602 /* Resolve any decomposed registers which appear in register notes on
606 resolve_reg_notes (rtx insn)
610 note = find_reg_equal_equiv_note (insn);
613 int old_count = num_validated_changes ();
614 if (for_each_rtx (&XEXP (note, 0), resolve_subreg_use, NULL))
616 remove_note (insn, note);
617 remove_retval_note (insn);
620 if (old_count != num_validated_changes ())
621 df_notes_rescan (insn);
624 pnote = ®_NOTES (insn);
625 while (*pnote != NULL_RTX)
630 switch (REG_NOTE_KIND (note))
634 if (resolve_reg_p (XEXP (note, 0)))
643 *pnote = XEXP (note, 1);
645 pnote = &XEXP (note, 1);
649 /* Return whether X can be decomposed into subwords. */
652 can_decompose_p (rtx x)
656 unsigned int regno = REGNO (x);
658 if (HARD_REGISTER_NUM_P (regno))
659 return (validate_subreg (word_mode, GET_MODE (x), x, UNITS_PER_WORD)
660 && HARD_REGNO_MODE_OK (regno, word_mode));
662 return !bitmap_bit_p (non_decomposable_context, regno);
668 /* Decompose the registers used in a simple move SET within INSN. If
669 we don't change anything, return INSN, otherwise return the start
670 of the sequence of moves. */
673 resolve_simple_move (rtx set, rtx insn)
675 rtx src, dest, real_dest, insns;
676 enum machine_mode orig_mode, dest_mode;
681 dest = SET_DEST (set);
682 orig_mode = GET_MODE (dest);
684 words = (GET_MODE_SIZE (orig_mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
690 /* We have to handle copying from a SUBREG of a decomposed reg where
691 the SUBREG is larger than word size. Rather than assume that we
692 can take a word_mode SUBREG of the destination, we copy to a new
693 register and then copy that to the destination. */
695 real_dest = NULL_RTX;
697 if (GET_CODE (src) == SUBREG
698 && resolve_reg_p (SUBREG_REG (src))
699 && (SUBREG_BYTE (src) != 0
700 || (GET_MODE_SIZE (orig_mode)
701 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))))
704 dest = gen_reg_rtx (orig_mode);
705 if (REG_P (real_dest))
706 REG_ATTRS (dest) = REG_ATTRS (real_dest);
709 /* Similarly if we are copying to a SUBREG of a decomposed reg where
710 the SUBREG is larger than word size. */
712 if (GET_CODE (dest) == SUBREG
713 && resolve_reg_p (SUBREG_REG (dest))
714 && (SUBREG_BYTE (dest) != 0
715 || (GET_MODE_SIZE (orig_mode)
716 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))))
718 rtx reg, minsn, smove;
720 reg = gen_reg_rtx (orig_mode);
721 minsn = emit_move_insn (reg, src);
722 smove = single_set (minsn);
723 gcc_assert (smove != NULL_RTX);
724 resolve_simple_move (smove, minsn);
728 /* If we didn't have any big SUBREGS of decomposed registers, and
729 neither side of the move is a register we are decomposing, then
730 we don't have to do anything here. */
732 if (src == SET_SRC (set)
733 && dest == SET_DEST (set)
734 && !resolve_reg_p (src)
735 && !resolve_subreg_p (src)
736 && !resolve_reg_p (dest)
737 && !resolve_subreg_p (dest))
743 /* It's possible for the code to use a subreg of a decomposed
744 register while forming an address. We need to handle that before
745 passing the address to emit_move_insn. We pass NULL_RTX as the
746 insn parameter to resolve_subreg_use because we can not validate
748 if (MEM_P (src) || MEM_P (dest))
753 for_each_rtx (&XEXP (src, 0), resolve_subreg_use, NULL_RTX);
755 for_each_rtx (&XEXP (dest, 0), resolve_subreg_use, NULL_RTX);
756 acg = apply_change_group ();
760 /* If SRC is a register which we can't decompose, or has side
761 effects, we need to move via a temporary register. */
763 if (!can_decompose_p (src)
764 || side_effects_p (src)
765 || GET_CODE (src) == ASM_OPERANDS)
769 reg = gen_reg_rtx (orig_mode);
770 emit_move_insn (reg, src);
774 /* If DEST is a register which we can't decompose, or has side
775 effects, we need to first move to a temporary register. We
776 handle the common case of pushing an operand directly. We also
777 go through a temporary register if it holds a floating point
778 value. This gives us better code on systems which can't move
779 data easily between integer and floating point registers. */
781 dest_mode = orig_mode;
782 pushing = push_operand (dest, dest_mode);
783 if (!can_decompose_p (dest)
784 || (side_effects_p (dest) && !pushing)
785 || (!SCALAR_INT_MODE_P (dest_mode)
786 && !resolve_reg_p (dest)
787 && !resolve_subreg_p (dest)))
789 if (real_dest == NULL_RTX)
791 if (!SCALAR_INT_MODE_P (dest_mode))
793 dest_mode = mode_for_size (GET_MODE_SIZE (dest_mode) * BITS_PER_UNIT,
795 gcc_assert (dest_mode != BLKmode);
797 dest = gen_reg_rtx (dest_mode);
798 if (REG_P (real_dest))
799 REG_ATTRS (dest) = REG_ATTRS (real_dest);
804 unsigned int i, j, jinc;
806 gcc_assert (GET_MODE_SIZE (orig_mode) % UNITS_PER_WORD == 0);
807 gcc_assert (GET_CODE (XEXP (dest, 0)) != PRE_MODIFY);
808 gcc_assert (GET_CODE (XEXP (dest, 0)) != POST_MODIFY);
810 if (WORDS_BIG_ENDIAN == STACK_GROWS_DOWNWARD)
821 for (i = 0; i < words; ++i, j += jinc)
825 temp = copy_rtx (XEXP (dest, 0));
826 temp = adjust_automodify_address_nv (dest, word_mode, temp,
828 emit_move_insn (temp,
829 simplify_gen_subreg_concatn (word_mode, src,
831 j * UNITS_PER_WORD));
838 if (REG_P (dest) && !HARD_REGISTER_NUM_P (REGNO (dest)))
839 emit_insn (gen_rtx_CLOBBER (VOIDmode, dest));
841 for (i = 0; i < words; ++i)
842 emit_move_insn (simplify_gen_subreg_concatn (word_mode, dest,
845 simplify_gen_subreg_concatn (word_mode, src,
847 i * UNITS_PER_WORD));
850 if (real_dest != NULL_RTX)
852 rtx mdest, minsn, smove;
854 if (dest_mode == orig_mode)
857 mdest = simplify_gen_subreg (orig_mode, dest, GET_MODE (dest), 0);
858 minsn = emit_move_insn (real_dest, mdest);
860 smove = single_set (minsn);
861 gcc_assert (smove != NULL_RTX);
863 resolve_simple_move (smove, minsn);
866 insns = get_insns ();
869 move_eh_region_note (insn, insns);
871 emit_insn_before (insns, insn);
873 move_libcall_note (insn, insns);
874 remove_retval_note (insn);
880 /* Change a CLOBBER of a decomposed register into a CLOBBER of the
881 component registers. Return whether we changed something. */
884 resolve_clobber (rtx pat, rtx insn)
887 enum machine_mode orig_mode;
888 unsigned int words, i;
892 if (!resolve_reg_p (reg) && !resolve_subreg_p (reg))
895 orig_mode = GET_MODE (reg);
896 words = GET_MODE_SIZE (orig_mode);
897 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
899 ret = validate_change (NULL_RTX, &XEXP (pat, 0),
900 simplify_gen_subreg_concatn (word_mode, reg,
903 df_insn_rescan (insn);
904 gcc_assert (ret != 0);
906 for (i = words - 1; i > 0; --i)
910 x = simplify_gen_subreg_concatn (word_mode, reg, orig_mode,
912 x = gen_rtx_CLOBBER (VOIDmode, x);
913 emit_insn_after (x, insn);
916 resolve_reg_notes (insn);
921 /* A USE of a decomposed register is no longer meaningful. Return
922 whether we changed something. */
925 resolve_use (rtx pat, rtx insn)
927 if (resolve_reg_p (XEXP (pat, 0)) || resolve_subreg_p (XEXP (pat, 0)))
933 resolve_reg_notes (insn);
938 /* Checks if INSN is a decomposable multiword-shift or zero-extend and
939 sets the decomposable_context bitmap accordingly. A non-zero value
940 is returned if a decomposable insn has been found. */
943 find_decomposable_shift_zext (rtx insn)
949 set = single_set (insn);
954 if (GET_CODE (op) != ASHIFT
955 && GET_CODE (op) != LSHIFTRT
956 && GET_CODE (op) != ZERO_EXTEND)
959 op_operand = XEXP (op, 0);
960 if (!REG_P (SET_DEST (set)) || !REG_P (op_operand)
961 || HARD_REGISTER_NUM_P (REGNO (SET_DEST (set)))
962 || HARD_REGISTER_NUM_P (REGNO (op_operand))
963 || !SCALAR_INT_MODE_P (GET_MODE (op)))
966 if (GET_CODE (op) == ZERO_EXTEND)
968 if (GET_MODE (op_operand) != word_mode
969 || GET_MODE_BITSIZE (GET_MODE (op)) != 2 * BITS_PER_WORD)
972 else /* left or right shift */
974 if (GET_CODE (XEXP (op, 1)) != CONST_INT
975 || INTVAL (XEXP (op, 1)) < BITS_PER_WORD
976 || GET_MODE_BITSIZE (GET_MODE (op_operand)) != 2 * BITS_PER_WORD)
980 bitmap_set_bit (decomposable_context, REGNO (SET_DEST (set)));
982 if (GET_CODE (op) != ZERO_EXTEND)
983 bitmap_set_bit (decomposable_context, REGNO (op_operand));
988 /* Decompose a more than word wide shift (in INSN) of a multiword
989 pseudo or a multiword zero-extend of a wordmode pseudo into a move
990 and 'set to zero' insn. Return a pointer to the new insn when a
991 replacement was done. */
994 resolve_shift_zext (rtx insn)
1000 rtx src_reg, dest_reg, dest_zero;
1001 int src_reg_num, dest_reg_num, offset1, offset2, src_offset;
1003 set = single_set (insn);
1008 if (GET_CODE (op) != ASHIFT
1009 && GET_CODE (op) != LSHIFTRT
1010 && GET_CODE (op) != ZERO_EXTEND)
1013 op_operand = XEXP (op, 0);
1015 if (!resolve_reg_p (SET_DEST (set)) && !resolve_reg_p (op_operand))
1018 /* src_reg_num is the number of the word mode register which we
1019 are operating on. For a left shift and a zero_extend on little
1020 endian machines this is register 0. */
1021 src_reg_num = GET_CODE (op) == LSHIFTRT ? 1 : 0;
1023 if (WORDS_BIG_ENDIAN
1024 && GET_MODE_SIZE (GET_MODE (op_operand)) > UNITS_PER_WORD)
1025 src_reg_num = 1 - src_reg_num;
1027 if (GET_CODE (op) == ZERO_EXTEND)
1028 dest_reg_num = WORDS_BIG_ENDIAN ? 1 : 0;
1030 dest_reg_num = 1 - src_reg_num;
1032 offset1 = UNITS_PER_WORD * dest_reg_num;
1033 offset2 = UNITS_PER_WORD * (1 - dest_reg_num);
1034 src_offset = UNITS_PER_WORD * src_reg_num;
1036 if (WORDS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
1038 offset1 += UNITS_PER_WORD - 1;
1039 offset2 += UNITS_PER_WORD - 1;
1040 src_offset += UNITS_PER_WORD - 1;
1045 dest_reg = simplify_gen_subreg_concatn (word_mode, SET_DEST (set),
1046 GET_MODE (SET_DEST (set)),
1048 dest_zero = simplify_gen_subreg_concatn (word_mode, SET_DEST (set),
1049 GET_MODE (SET_DEST (set)),
1051 src_reg = simplify_gen_subreg_concatn (word_mode, op_operand,
1052 GET_MODE (op_operand),
1054 if (GET_CODE (op) != ZERO_EXTEND)
1056 int shift_count = INTVAL (XEXP (op, 1));
1057 if (shift_count > BITS_PER_WORD)
1058 src_reg = expand_shift (GET_CODE (op) == ASHIFT ?
1059 LSHIFT_EXPR : RSHIFT_EXPR,
1061 build_int_cst (NULL_TREE,
1062 shift_count - BITS_PER_WORD),
1066 if (dest_reg != src_reg)
1067 emit_move_insn (dest_reg, src_reg);
1068 emit_move_insn (dest_zero, CONST0_RTX (word_mode));
1069 insns = get_insns ();
1073 emit_insn_before (insns, insn);
1078 fprintf (dump_file, "; Replacing insn: %d with insns: ", INSN_UID (insn));
1079 for (in = insns; in != insn; in = NEXT_INSN (in))
1080 fprintf (dump_file, "%d ", INSN_UID (in));
1081 fprintf (dump_file, "\n");
1088 /* Look for registers which are always accessed via word-sized SUBREGs
1089 or via copies. Decompose these registers into several word-sized
1090 pseudo-registers. */
1093 decompose_multiword_subregs (void)
1099 df_set_flags (DF_DEFER_INSN_RESCAN);
1101 max = max_reg_num ();
1103 /* First see if there are any multi-word pseudo-registers. If there
1104 aren't, there is nothing we can do. This should speed up this
1105 pass in the normal case, since it should be faster than scanning
1110 for (i = FIRST_PSEUDO_REGISTER; i < max; ++i)
1112 if (regno_reg_rtx[i] != NULL
1113 && GET_MODE_SIZE (GET_MODE (regno_reg_rtx[i])) > UNITS_PER_WORD)
1120 /* FIXME: When the dataflow branch is merged, we can change this
1121 code to look for each multi-word pseudo-register and to find each
1122 insn which sets or uses that register. That should be faster
1123 than scanning all the insns. */
1125 decomposable_context = BITMAP_ALLOC (NULL);
1126 non_decomposable_context = BITMAP_ALLOC (NULL);
1128 reg_copy_graph = VEC_alloc (bitmap, heap, max);
1129 VEC_safe_grow (bitmap, heap, reg_copy_graph, max);
1130 memset (VEC_address (bitmap, reg_copy_graph), 0, sizeof (bitmap) * max);
1136 FOR_BB_INSNS (bb, insn)
1139 enum classify_move_insn cmi;
1143 || GET_CODE (PATTERN (insn)) == CLOBBER
1144 || GET_CODE (PATTERN (insn)) == USE)
1147 if (find_decomposable_shift_zext (insn))
1150 recog_memoized (insn);
1151 extract_insn (insn);
1153 set = simple_move (insn);
1156 cmi = NOT_SIMPLE_MOVE;
1161 retval = find_reg_note (insn, REG_RETVAL, NULL_RTX) != NULL_RTX;
1163 if (find_pseudo_copy (set) && !retval)
1164 cmi = SIMPLE_PSEUDO_REG_MOVE;
1166 && REG_P (SET_SRC (set))
1167 && HARD_REGISTER_P (SET_SRC (set)))
1171 /* We don't want to decompose an assignment which
1172 copies the value returned by a libcall to a
1173 pseudo-register. Doing that will lose the RETVAL
1174 note with no real gain. */
1175 cmi = NOT_SIMPLE_MOVE;
1177 /* If we have a RETVAL note, there should be an
1178 EQUAL note. We don't want to decompose any
1179 registers which that EQUAL note refers to
1180 directly. If we do, we will no longer know the
1181 value of the libcall. */
1182 note = find_reg_equal_equiv_note (insn);
1183 if (note != NULL_RTX)
1184 for_each_rtx (&XEXP (note, 0), find_decomposable_subregs,
1191 n = recog_data.n_operands;
1192 for (i = 0; i < n; ++i)
1194 for_each_rtx (&recog_data.operand[i],
1195 find_decomposable_subregs,
1198 /* We handle ASM_OPERANDS as a special case to support
1199 things like x86 rdtsc which returns a DImode value.
1200 We can decompose the output, which will certainly be
1201 operand 0, but not the inputs. */
1203 if (cmi == SIMPLE_MOVE
1204 && GET_CODE (SET_SRC (set)) == ASM_OPERANDS)
1206 gcc_assert (i == 0);
1207 cmi = NOT_SIMPLE_MOVE;
1213 bitmap_and_compl_into (decomposable_context, non_decomposable_context);
1214 if (!bitmap_empty_p (decomposable_context))
1218 sbitmap_iterator sbi;
1219 bitmap_iterator iter;
1222 propagate_pseudo_copies ();
1224 sub_blocks = sbitmap_alloc (last_basic_block);
1225 sbitmap_zero (sub_blocks);
1227 EXECUTE_IF_SET_IN_BITMAP (decomposable_context, 0, regno, iter)
1228 decompose_register (regno);
1234 FOR_BB_INSNS (bb, insn)
1241 next = NEXT_INSN (insn);
1243 pat = PATTERN (insn);
1244 if (GET_CODE (pat) == CLOBBER)
1245 resolve_clobber (pat, insn);
1246 else if (GET_CODE (pat) == USE)
1247 resolve_use (pat, insn);
1253 recog_memoized (insn);
1254 extract_insn (insn);
1256 set = simple_move (insn);
1259 rtx orig_insn = insn;
1260 bool cfi = control_flow_insn_p (insn);
1262 /* We can end up splitting loads to multi-word pseudos
1263 into separate loads to machine word size pseudos.
1264 When this happens, we first had one load that can
1265 throw, and after resolve_simple_move we'll have a
1266 bunch of loads (at least two). All those loads may
1267 trap if we can have non-call exceptions, so they
1268 all will end the current basic block. We split the
1269 block after the outer loop over all insns, but we
1270 make sure here that we will be able to split the
1271 basic block and still produce the correct control
1272 flow graph for it. */
1274 || (flag_non_call_exceptions
1275 && can_throw_internal (insn)));
1277 insn = resolve_simple_move (set, insn);
1278 if (insn != orig_insn)
1280 remove_retval_note (insn);
1282 recog_memoized (insn);
1283 extract_insn (insn);
1286 SET_BIT (sub_blocks, bb->index);
1291 rtx decomposed_shift;
1293 decomposed_shift = resolve_shift_zext (insn);
1294 if (decomposed_shift != NULL_RTX)
1296 insn = decomposed_shift;
1297 recog_memoized (insn);
1298 extract_insn (insn);
1302 for (i = recog_data.n_operands - 1; i >= 0; --i)
1303 for_each_rtx (recog_data.operand_loc[i],
1307 resolve_reg_notes (insn);
1309 if (num_validated_changes () > 0)
1311 for (i = recog_data.n_dups - 1; i >= 0; --i)
1313 rtx *pl = recog_data.dup_loc[i];
1314 int dup_num = recog_data.dup_num[i];
1315 rtx *px = recog_data.operand_loc[dup_num];
1317 validate_unshare_change (insn, pl, *px, 1);
1320 i = apply_change_group ();
1323 remove_retval_note (insn);
1329 /* If we had insns to split that caused control flow insns in the middle
1330 of a basic block, split those blocks now. Note that we only handle
1331 the case where splitting a load has caused multiple possibly trapping
1333 EXECUTE_IF_SET_IN_SBITMAP (sub_blocks, 0, i, sbi)
1338 bb = BASIC_BLOCK (i);
1339 insn = BB_HEAD (bb);
1344 if (control_flow_insn_p (insn))
1346 /* Split the block after insn. There will be a fallthru
1347 edge, which is OK so we keep it. We have to create the
1348 exception edges ourselves. */
1349 fallthru = split_block (bb, insn);
1350 rtl_make_eh_edge (NULL, bb, BB_END (bb));
1351 bb = fallthru->dest;
1352 insn = BB_HEAD (bb);
1355 insn = NEXT_INSN (insn);
1359 sbitmap_free (sub_blocks);
1366 for (i = 0; VEC_iterate (bitmap, reg_copy_graph, i, b); ++i)
1371 VEC_free (bitmap, heap, reg_copy_graph);
1373 BITMAP_FREE (decomposable_context);
1374 BITMAP_FREE (non_decomposable_context);
1377 /* Gate function for lower subreg pass. */
1380 gate_handle_lower_subreg (void)
1382 return flag_split_wide_types != 0;
1385 /* Implement first lower subreg pass. */
1388 rest_of_handle_lower_subreg (void)
1390 decompose_multiword_subregs ();
1394 /* Implement second lower subreg pass. */
1397 rest_of_handle_lower_subreg2 (void)
1399 decompose_multiword_subregs ();
1403 struct rtl_opt_pass pass_lower_subreg =
1407 "subreg", /* name */
1408 gate_handle_lower_subreg, /* gate */
1409 rest_of_handle_lower_subreg, /* execute */
1412 0, /* static_pass_number */
1413 TV_LOWER_SUBREG, /* tv_id */
1414 0, /* properties_required */
1415 0, /* properties_provided */
1416 0, /* properties_destroyed */
1417 0, /* todo_flags_start */
1420 TODO_verify_flow /* todo_flags_finish */
1424 struct rtl_opt_pass pass_lower_subreg2 =
1428 "subreg2", /* name */
1429 gate_handle_lower_subreg, /* gate */
1430 rest_of_handle_lower_subreg2, /* execute */
1433 0, /* static_pass_number */
1434 TV_LOWER_SUBREG, /* tv_id */
1435 0, /* properties_required */
1436 0, /* properties_provided */
1437 0, /* properties_destroyed */
1438 0, /* todo_flags_start */
1439 TODO_df_finish | TODO_verify_rtl_sharing |
1442 TODO_verify_flow /* todo_flags_finish */