1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
53 /* Vector mapping INSN_UIDs to luids.
54 The luids are like uids but increase monotonically always.
55 We use them to see whether a jump comes from outside a given loop. */
59 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
60 number the insn is contained in. */
64 /* 1 + largest uid of any insn. */
68 /* 1 + luid of last insn. */
72 /* Number of loops detected in current function. Used as index to the
75 static int max_loop_num;
77 /* Indexed by loop number, contains the first and last insn of each loop. */
79 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
81 /* For each loop, gives the containing loop number, -1 if none. */
85 #ifdef HAVE_decrement_and_branch_on_count
86 /* Records whether resource in use by inner loop. */
88 int *loop_used_count_register;
89 #endif /* HAVE_decrement_and_branch_on_count */
91 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
92 really a loop (an insn outside the loop branches into it). */
94 static char *loop_invalid;
96 /* Indexed by loop number, links together all LABEL_REFs which refer to
97 code labels outside the loop. Used by routines that need to know all
98 loop exits, such as final_biv_value and final_giv_value.
100 This does not include loop exits due to return instructions. This is
101 because all bivs and givs are pseudos, and hence must be dead after a
102 return, so the presense of a return does not affect any of the
103 optimizations that use this info. It is simpler to just not include return
104 instructions on this list. */
106 rtx *loop_number_exit_labels;
108 /* Indexed by loop number, counts the number of LABEL_REFs on
109 loop_number_exit_labels for this loop and all loops nested inside it. */
111 int *loop_number_exit_count;
113 /* Nonzero if there is a subroutine call in the current loop. */
115 static int loop_has_call;
117 /* Nonzero if there is a volatile memory reference in the current
120 static int loop_has_volatile;
122 /* Nonzero if there is a tablejump in the current loop. */
124 static int loop_has_tablejump;
126 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
127 current loop. A continue statement will generate a branch to
128 NEXT_INSN (loop_continue). */
130 static rtx loop_continue;
132 /* Indexed by register number, contains the number of times the reg
133 is set during the loop being scanned.
134 During code motion, a negative value indicates a reg that has been
135 made a candidate; in particular -2 means that it is an candidate that
136 we know is equal to a constant and -1 means that it is an candidate
137 not known equal to a constant.
138 After code motion, regs moved have 0 (which is accurate now)
139 while the failed candidates have the original number of times set.
141 Therefore, at all times, == 0 indicates an invariant register;
142 < 0 a conditionally invariant one. */
144 static varray_type n_times_set;
146 /* Original value of n_times_set; same except that this value
147 is not set negative for a reg whose sets have been made candidates
148 and not set to 0 for a reg that is moved. */
150 static varray_type n_times_used;
152 /* Index by register number, 1 indicates that the register
153 cannot be moved or strength reduced. */
155 static varray_type may_not_optimize;
157 /* Nonzero means reg N has already been moved out of one loop.
158 This reduces the desire to move it out of another. */
160 static char *moved_once;
162 /* Array of MEMs that are stored in this loop. If there are too many to fit
163 here, we just turn on unknown_address_altered. */
165 #define NUM_STORES 30
166 static rtx loop_store_mems[NUM_STORES];
168 /* Index of first available slot in above array. */
169 static int loop_store_mems_idx;
171 typedef struct loop_mem_info {
172 rtx mem; /* The MEM itself. */
173 rtx reg; /* Corresponding pseudo, if any. */
174 int optimize; /* Nonzero if we can optimize access to this MEM. */
177 /* Array of MEMs that are used (read or written) in this loop, but
178 cannot be aliased by anything in this loop, except perhaps
179 themselves. In other words, if loop_mems[i] is altered during the
180 loop, it is altered by an expression that is rtx_equal_p to it. */
182 static loop_mem_info *loop_mems;
184 /* The index of the next available slot in LOOP_MEMS. */
186 static int loop_mems_idx;
188 /* The number of elements allocated in LOOP_MEMs. */
190 static int loop_mems_allocated;
192 /* Nonzero if we don't know what MEMs were changed in the current loop.
193 This happens if the loop contains a call (in which case `loop_has_call'
194 will also be set) or if we store into more than NUM_STORES MEMs. */
196 static int unknown_address_altered;
198 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
199 static int num_movables;
201 /* Count of memory write instructions discovered in the loop. */
202 static int num_mem_sets;
204 /* Number of loops contained within the current one, including itself. */
205 static int loops_enclosed;
207 /* Bound on pseudo register number before loop optimization.
208 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
209 int max_reg_before_loop;
211 /* This obstack is used in product_cheap_p to allocate its rtl. It
212 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
213 If we used the same obstack that it did, we would be deallocating
216 static struct obstack temp_obstack;
218 /* This is where the pointer to the obstack being used for RTL is stored. */
220 extern struct obstack *rtl_obstack;
222 #define obstack_chunk_alloc xmalloc
223 #define obstack_chunk_free free
225 /* During the analysis of a loop, a chain of `struct movable's
226 is made to record all the movable insns found.
227 Then the entire chain can be scanned to decide which to move. */
231 rtx insn; /* A movable insn */
232 rtx set_src; /* The expression this reg is set from. */
233 rtx set_dest; /* The destination of this SET. */
234 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
235 of any registers used within the LIBCALL. */
236 int consec; /* Number of consecutive following insns
237 that must be moved with this one. */
238 int regno; /* The register it sets */
239 short lifetime; /* lifetime of that register;
240 may be adjusted when matching movables
241 that load the same value are found. */
242 short savings; /* Number of insns we can move for this reg,
243 including other movables that force this
244 or match this one. */
245 unsigned int cond : 1; /* 1 if only conditionally movable */
246 unsigned int force : 1; /* 1 means MUST move this insn */
247 unsigned int global : 1; /* 1 means reg is live outside this loop */
248 /* If PARTIAL is 1, GLOBAL means something different:
249 that the reg is live outside the range from where it is set
250 to the following label. */
251 unsigned int done : 1; /* 1 inhibits further processing of this */
253 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
254 In particular, moving it does not make it
256 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
257 load SRC, rather than copying INSN. */
258 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
259 first insn of a consecutive sets group. */
260 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
261 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
262 that we should avoid changing when clearing
263 the rest of the reg. */
264 struct movable *match; /* First entry for same value */
265 struct movable *forces; /* An insn that must be moved if this is */
266 struct movable *next;
269 static struct movable *the_movables;
271 FILE *loop_dump_stream;
273 /* Forward declarations. */
275 static void find_and_verify_loops PROTO((rtx));
276 static void mark_loop_jump PROTO((rtx, int));
277 static void prescan_loop PROTO((rtx, rtx));
278 static int reg_in_basic_block_p PROTO((rtx, rtx));
279 static int consec_sets_invariant_p PROTO((rtx, int, rtx));
280 static rtx libcall_other_reg PROTO((rtx, rtx));
281 static int labels_in_range_p PROTO((rtx, int));
282 static void count_one_set PROTO((rtx, rtx, varray_type, rtx *));
284 static void count_loop_regs_set PROTO((rtx, rtx, varray_type, varray_type,
286 static void note_addr_stored PROTO((rtx, rtx));
287 static int loop_reg_used_before_p PROTO((rtx, rtx, rtx, rtx, rtx));
288 static void scan_loop PROTO((rtx, rtx, int, int));
290 static void replace_call_address PROTO((rtx, rtx, rtx));
292 static rtx skip_consec_insns PROTO((rtx, int));
293 static int libcall_benefit PROTO((rtx));
294 static void ignore_some_movables PROTO((struct movable *));
295 static void force_movables PROTO((struct movable *));
296 static void combine_movables PROTO((struct movable *, int));
297 static int regs_match_p PROTO((rtx, rtx, struct movable *));
298 static int rtx_equal_for_loop_p PROTO((rtx, rtx, struct movable *));
299 static void add_label_notes PROTO((rtx, rtx));
300 static void move_movables PROTO((struct movable *, int, int, rtx, rtx, int));
301 static int count_nonfixed_reads PROTO((rtx));
302 static void strength_reduce PROTO((rtx, rtx, rtx, int, rtx, rtx, int, int));
303 static void find_single_use_in_loop PROTO((rtx, rtx, varray_type));
304 static int valid_initial_value_p PROTO((rtx, rtx, int, rtx));
305 static void find_mem_givs PROTO((rtx, rtx, int, rtx, rtx));
306 static void record_biv PROTO((struct induction *, rtx, rtx, rtx, rtx, int, int));
307 static void check_final_value PROTO((struct induction *, rtx, rtx,
308 unsigned HOST_WIDE_INT));
309 static void record_giv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx, int, enum g_types, int, rtx *, rtx, rtx));
310 static void update_giv_derive PROTO((rtx));
311 static int basic_induction_var PROTO((rtx, enum machine_mode, rtx, rtx, rtx *, rtx *));
312 static rtx simplify_giv_expr PROTO((rtx, int *));
313 static int general_induction_var PROTO((rtx, rtx *, rtx *, rtx *, int, int *));
314 static int consec_sets_giv PROTO((int, rtx, rtx, rtx, rtx *, rtx *));
315 static int check_dbra_loop PROTO((rtx, int, rtx, struct loop_info *));
316 static rtx express_from_1 PROTO((rtx, rtx, rtx));
317 static rtx express_from PROTO((struct induction *, struct induction *));
318 static rtx combine_givs_p PROTO((struct induction *, struct induction *));
319 static void combine_givs PROTO((struct iv_class *));
320 static int product_cheap_p PROTO((rtx, rtx));
321 static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
322 static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
323 static int last_use_this_basic_block PROTO((rtx, rtx));
324 static void record_initial PROTO((rtx, rtx));
325 static void update_reg_last_use PROTO((rtx, rtx));
326 static rtx next_insn_in_loop PROTO((rtx, rtx, rtx, rtx));
327 static void load_mems_and_recount_loop_regs_set PROTO((rtx, rtx, rtx,
330 static void load_mems PROTO((rtx, rtx, rtx, rtx));
331 static int insert_loop_mem PROTO((rtx *, void *));
332 static int replace_loop_mem PROTO((rtx *, void *));
333 static int replace_label PROTO((rtx *, void *));
335 typedef struct rtx_and_int {
340 typedef struct rtx_pair {
345 /* Nonzero iff INSN is between START and END, inclusive. */
346 #define INSN_IN_RANGE_P(INSN, START, END) \
347 (INSN_UID (INSN) < max_uid_for_loop \
348 && INSN_LUID (INSN) >= INSN_LUID (START) \
349 && INSN_LUID (INSN) <= INSN_LUID (END))
351 #ifdef HAVE_decrement_and_branch_on_count
352 /* Test whether BCT applicable and safe. */
353 static void insert_bct PROTO((rtx, rtx, struct loop_info *));
355 /* Auxiliary function that inserts the BCT pattern into the loop. */
356 static void instrument_loop_bct PROTO((rtx, rtx, rtx));
357 #endif /* HAVE_decrement_and_branch_on_count */
359 /* Indirect_jump_in_function is computed once per function. */
360 int indirect_jump_in_function = 0;
361 static int indirect_jump_in_function_p PROTO((rtx));
364 /* Relative gain of eliminating various kinds of operations. */
367 static int shift_cost;
368 static int mult_cost;
371 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
372 copy the value of the strength reduced giv to its original register. */
373 static int copy_cost;
375 /* Cost of using a register, to normalize the benefits of a giv. */
376 static int reg_address_cost;
382 char *free_point = (char *) oballoc (1);
383 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
385 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
388 reg_address_cost = ADDRESS_COST (reg);
390 reg_address_cost = rtx_cost (reg, MEM);
393 /* We multiply by 2 to reconcile the difference in scale between
394 these two ways of computing costs. Otherwise the cost of a copy
395 will be far less than the cost of an add. */
399 /* Free the objects we just allocated. */
402 /* Initialize the obstack used for rtl in product_cheap_p. */
403 gcc_obstack_init (&temp_obstack);
406 /* Entry point of this file. Perform loop optimization
407 on the current function. F is the first insn of the function
408 and DUMPFILE is a stream for output of a trace of actions taken
409 (or 0 if none should be output). */
412 loop_optimize (f, dumpfile, unroll_p, bct_p)
413 /* f is the first instruction of a chain of insns for one function */
422 loop_dump_stream = dumpfile;
424 init_recog_no_volatile ();
426 max_reg_before_loop = max_reg_num ();
428 moved_once = (char *) alloca (max_reg_before_loop);
429 bzero (moved_once, max_reg_before_loop);
433 /* Count the number of loops. */
436 for (insn = f; insn; insn = NEXT_INSN (insn))
438 if (GET_CODE (insn) == NOTE
439 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
443 /* Don't waste time if no loops. */
444 if (max_loop_num == 0)
447 /* Get size to use for tables indexed by uids.
448 Leave some space for labels allocated by find_and_verify_loops. */
449 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
451 uid_luid = (int *) alloca (max_uid_for_loop * sizeof (int));
452 uid_loop_num = (int *) alloca (max_uid_for_loop * sizeof (int));
454 bzero ((char *) uid_luid, max_uid_for_loop * sizeof (int));
455 bzero ((char *) uid_loop_num, max_uid_for_loop * sizeof (int));
457 /* Allocate tables for recording each loop. We set each entry, so they need
459 loop_number_loop_starts = (rtx *) alloca (max_loop_num * sizeof (rtx));
460 loop_number_loop_ends = (rtx *) alloca (max_loop_num * sizeof (rtx));
461 loop_outer_loop = (int *) alloca (max_loop_num * sizeof (int));
462 loop_invalid = (char *) alloca (max_loop_num * sizeof (char));
463 loop_number_exit_labels = (rtx *) alloca (max_loop_num * sizeof (rtx));
464 loop_number_exit_count = (int *) alloca (max_loop_num * sizeof (int));
466 #ifdef HAVE_decrement_and_branch_on_count
467 /* Allocate for BCT optimization */
468 loop_used_count_register = (int *) alloca (max_loop_num * sizeof (int));
469 bzero ((char *) loop_used_count_register, max_loop_num * sizeof (int));
470 #endif /* HAVE_decrement_and_branch_on_count */
472 /* Find and process each loop.
473 First, find them, and record them in order of their beginnings. */
474 find_and_verify_loops (f);
476 /* Now find all register lifetimes. This must be done after
477 find_and_verify_loops, because it might reorder the insns in the
479 reg_scan (f, max_reg_num (), 1);
481 /* This must occur after reg_scan so that registers created by gcse
482 will have entries in the register tables.
484 We could have added a call to reg_scan after gcse_main in toplev.c,
485 but moving this call to init_alias_analysis is more efficient. */
486 init_alias_analysis ();
488 /* See if we went too far. */
489 if (get_max_uid () > max_uid_for_loop)
491 /* Now reset it to the actual size we need. See above. */
492 max_uid_for_loop = get_max_uid () + 1;
494 /* Compute the mapping from uids to luids.
495 LUIDs are numbers assigned to insns, like uids,
496 except that luids increase monotonically through the code.
497 Don't assign luids to line-number NOTEs, so that the distance in luids
498 between two insns is not affected by -g. */
500 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
503 if (GET_CODE (insn) != NOTE
504 || NOTE_LINE_NUMBER (insn) <= 0)
505 uid_luid[INSN_UID (insn)] = ++i;
507 /* Give a line number note the same luid as preceding insn. */
508 uid_luid[INSN_UID (insn)] = i;
513 /* Don't leave gaps in uid_luid for insns that have been
514 deleted. It is possible that the first or last insn
515 using some register has been deleted by cross-jumping.
516 Make sure that uid_luid for that former insn's uid
517 points to the general area where that insn used to be. */
518 for (i = 0; i < max_uid_for_loop; i++)
520 uid_luid[0] = uid_luid[i];
521 if (uid_luid[0] != 0)
524 for (i = 0; i < max_uid_for_loop; i++)
525 if (uid_luid[i] == 0)
526 uid_luid[i] = uid_luid[i - 1];
528 /* Create a mapping from loops to BLOCK tree nodes. */
529 if (unroll_p && write_symbols != NO_DEBUG)
530 find_loop_tree_blocks ();
532 /* Determine if the function has indirect jump. On some systems
533 this prevents low overhead loop instructions from being used. */
534 indirect_jump_in_function = indirect_jump_in_function_p (f);
536 /* Now scan the loops, last ones first, since this means inner ones are done
537 before outer ones. */
538 for (i = max_loop_num-1; i >= 0; i--)
539 if (! loop_invalid[i] && loop_number_loop_ends[i])
540 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
543 /* If debugging and unrolling loops, we must replicate the tree nodes
544 corresponding to the blocks inside the loop, so that the original one
545 to one mapping will remain. */
546 if (unroll_p && write_symbols != NO_DEBUG)
547 unroll_block_trees ();
549 end_alias_analysis ();
552 /* Returns the next insn, in execution order, after INSN. START and
553 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
554 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
555 insn-stream; it is used with loops that are entered near the
559 next_insn_in_loop (insn, start, end, loop_top)
565 insn = NEXT_INSN (insn);
570 /* Go to the top of the loop, and continue there. */
584 /* Optimize one loop whose start is LOOP_START and end is END.
585 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
586 NOTE_INSN_LOOP_END. */
588 /* ??? Could also move memory writes out of loops if the destination address
589 is invariant, the source is invariant, the memory write is not volatile,
590 and if we can prove that no read inside the loop can read this address
591 before the write occurs. If there is a read of this address after the
592 write, then we can also mark the memory read as invariant. */
595 scan_loop (loop_start, end, unroll_p, bct_p)
601 /* 1 if we are scanning insns that could be executed zero times. */
603 /* 1 if we are scanning insns that might never be executed
604 due to a subroutine call which might exit before they are reached. */
606 /* For a rotated loop that is entered near the bottom,
607 this is the label at the top. Otherwise it is zero. */
609 /* Jump insn that enters the loop, or 0 if control drops in. */
610 rtx loop_entry_jump = 0;
611 /* Place in the loop where control enters. */
613 /* Number of insns in the loop. */
618 /* The SET from an insn, if it is the only SET in the insn. */
620 /* Chain describing insns movable in current loop. */
621 struct movable *movables = 0;
622 /* Last element in `movables' -- so we can add elements at the end. */
623 struct movable *last_movable = 0;
624 /* Ratio of extra register life span we can justify
625 for saving an instruction. More if loop doesn't call subroutines
626 since in that case saving an insn makes more difference
627 and more registers are available. */
629 /* If we have calls, contains the insn in which a register was used
630 if it was used exactly once; contains const0_rtx if it was used more
632 varray_type reg_single_usage = 0;
633 /* Nonzero if we are scanning instructions in a sub-loop. */
637 /* Determine whether this loop starts with a jump down to a test at
638 the end. This will occur for a small number of loops with a test
639 that is too complex to duplicate in front of the loop.
641 We search for the first insn or label in the loop, skipping NOTEs.
642 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
643 (because we might have a loop executed only once that contains a
644 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
645 (in case we have a degenerate loop).
647 Note that if we mistakenly think that a loop is entered at the top
648 when, in fact, it is entered at the exit test, the only effect will be
649 slightly poorer optimization. Making the opposite error can generate
650 incorrect code. Since very few loops now start with a jump to the
651 exit test, the code here to detect that case is very conservative. */
653 for (p = NEXT_INSN (loop_start);
655 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
656 && (GET_CODE (p) != NOTE
657 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
658 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
664 /* Set up variables describing this loop. */
665 prescan_loop (loop_start, end);
666 threshold = (loop_has_call ? 1 : 2) * (1 + n_non_fixed_regs);
668 /* If loop has a jump before the first label,
669 the true entry is the target of that jump.
670 Start scan from there.
671 But record in LOOP_TOP the place where the end-test jumps
672 back to so we can scan that after the end of the loop. */
673 if (GET_CODE (p) == JUMP_INSN)
677 /* Loop entry must be unconditional jump (and not a RETURN) */
679 && JUMP_LABEL (p) != 0
680 /* Check to see whether the jump actually
681 jumps out of the loop (meaning it's no loop).
682 This case can happen for things like
683 do {..} while (0). If this label was generated previously
684 by loop, we can't tell anything about it and have to reject
686 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, end))
688 loop_top = next_label (scan_start);
689 scan_start = JUMP_LABEL (p);
693 /* If SCAN_START was an insn created by loop, we don't know its luid
694 as required by loop_reg_used_before_p. So skip such loops. (This
695 test may never be true, but it's best to play it safe.)
697 Also, skip loops where we do not start scanning at a label. This
698 test also rejects loops starting with a JUMP_INSN that failed the
701 if (INSN_UID (scan_start) >= max_uid_for_loop
702 || GET_CODE (scan_start) != CODE_LABEL)
704 if (loop_dump_stream)
705 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
706 INSN_UID (loop_start), INSN_UID (end));
710 /* Count number of times each reg is set during this loop.
711 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
712 the setting of register I. If this loop has calls, set
713 VARRAY_RTX (reg_single_usage, I). */
715 /* Allocate extra space for REGS that might be created by
716 load_mems. We allocate a little extra slop as well, in the hopes
717 that even after the moving of movables creates some new registers
718 we won't have to reallocate these arrays. However, we do grow
719 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
720 nregs = max_reg_num () + loop_mems_idx + 16;
721 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
722 VARRAY_INT_INIT (n_times_used, nregs, "n_times_used");
723 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
726 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
728 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
729 may_not_optimize, reg_single_usage, &insn_count, nregs);
731 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
733 VARRAY_CHAR (may_not_optimize, i) = 1;
734 VARRAY_INT (n_times_set, i) = 1;
737 #ifdef AVOID_CCMODE_COPIES
738 /* Don't try to move insns which set CC registers if we should not
739 create CCmode register copies. */
740 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
741 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
742 VARRAY_CHAR (may_not_optimize, i) = 1;
745 bcopy ((char *) &n_times_set->data,
746 (char *) &n_times_used->data, nregs * sizeof (int));
748 if (loop_dump_stream)
750 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
751 INSN_UID (loop_start), INSN_UID (end), insn_count);
753 fprintf (loop_dump_stream, "Continue at insn %d.\n",
754 INSN_UID (loop_continue));
757 /* Scan through the loop finding insns that are safe to move.
758 Set n_times_set negative for the reg being set, so that
759 this reg will be considered invariant for subsequent insns.
760 We consider whether subsequent insns use the reg
761 in deciding whether it is worth actually moving.
763 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
764 and therefore it is possible that the insns we are scanning
765 would never be executed. At such times, we must make sure
766 that it is safe to execute the insn once instead of zero times.
767 When MAYBE_NEVER is 0, all insns will be executed at least once
768 so that is not a problem. */
770 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
772 p = next_insn_in_loop (p, scan_start, end, loop_top))
774 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
775 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
777 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
778 && find_reg_note (p, REG_RETVAL, NULL_RTX))
781 if (GET_CODE (p) == INSN
782 && (set = single_set (p))
783 && GET_CODE (SET_DEST (set)) == REG
784 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
789 rtx src = SET_SRC (set);
790 rtx dependencies = 0;
792 /* Figure out what to use as a source of this insn. If a REG_EQUIV
793 note is given or if a REG_EQUAL note with a constant operand is
794 specified, use it as the source and mark that we should move
795 this insn by calling emit_move_insn rather that duplicating the
798 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
800 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
802 src = XEXP (temp, 0), move_insn = 1;
805 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
806 if (temp && CONSTANT_P (XEXP (temp, 0)))
807 src = XEXP (temp, 0), move_insn = 1;
808 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
810 src = XEXP (temp, 0);
811 /* A libcall block can use regs that don't appear in
812 the equivalent expression. To move the libcall,
813 we must move those regs too. */
814 dependencies = libcall_other_reg (p, src);
818 /* Don't try to optimize a register that was made
819 by loop-optimization for an inner loop.
820 We don't know its life-span, so we can't compute the benefit. */
821 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
823 else if (/* The set is not guaranteed to be executed one
824 the loop starts, or the value before the set is
825 needed before the set occurs... */
827 || loop_reg_used_before_p (set, p, loop_start,
829 /* And the register is used in basic blocks other
830 than the one where it is set (meaning that
831 something after this point in the loop might
832 depend on its value before the set). */
833 && !reg_in_basic_block_p (p, SET_DEST (set)))
834 /* It is unsafe to move the set.
836 This code used to consider it OK to move a set of a variable
837 which was not created by the user and not used in an exit test.
838 That behavior is incorrect and was removed. */
840 else if ((tem = invariant_p (src))
841 && (dependencies == 0
842 || (tem2 = invariant_p (dependencies)) != 0)
843 && (VARRAY_INT (n_times_set,
844 REGNO (SET_DEST (set))) == 1
846 = consec_sets_invariant_p
848 VARRAY_INT (n_times_set, REGNO (SET_DEST (set))),
850 /* If the insn can cause a trap (such as divide by zero),
851 can't move it unless it's guaranteed to be executed
852 once loop is entered. Even a function call might
853 prevent the trap insn from being reached
854 (since it might exit!) */
855 && ! ((maybe_never || call_passed)
856 && may_trap_p (src)))
858 register struct movable *m;
859 register int regno = REGNO (SET_DEST (set));
861 /* A potential lossage is where we have a case where two insns
862 can be combined as long as they are both in the loop, but
863 we move one of them outside the loop. For large loops,
864 this can lose. The most common case of this is the address
865 of a function being called.
867 Therefore, if this register is marked as being used exactly
868 once if we are in a loop with calls (a "large loop"), see if
869 we can replace the usage of this register with the source
870 of this SET. If we can, delete this insn.
872 Don't do this if P has a REG_RETVAL note or if we have
873 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
875 if (reg_single_usage && VARRAY_RTX (reg_single_usage, regno) != 0
876 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
877 && REGNO_FIRST_UID (regno) == INSN_UID (p)
878 && (REGNO_LAST_UID (regno)
879 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
880 && VARRAY_INT (n_times_set, regno) == 1
881 && ! side_effects_p (SET_SRC (set))
882 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
883 && (! SMALL_REGISTER_CLASSES
884 || (! (GET_CODE (SET_SRC (set)) == REG
885 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
886 /* This test is not redundant; SET_SRC (set) might be
887 a call-clobbered register and the life of REGNO
888 might span a call. */
889 && ! modified_between_p (SET_SRC (set), p,
891 (reg_single_usage, regno))
892 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
893 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
895 (reg_single_usage, regno)))
897 /* Replace any usage in a REG_EQUAL note. Must copy the
898 new source, so that we don't get rtx sharing between the
899 SET_SOURCE and REG_NOTES of insn p. */
900 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
901 = replace_rtx (REG_NOTES (VARRAY_RTX
902 (reg_single_usage, regno)),
903 SET_DEST (set), copy_rtx (SET_SRC (set)));
906 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
907 NOTE_SOURCE_FILE (p) = 0;
908 VARRAY_INT (n_times_set, regno) = 0;
912 m = (struct movable *) alloca (sizeof (struct movable));
916 m->dependencies = dependencies;
917 m->set_dest = SET_DEST (set);
919 m->consec = VARRAY_INT (n_times_set,
920 REGNO (SET_DEST (set))) - 1;
924 m->move_insn = move_insn;
925 m->move_insn_first = 0;
926 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
927 m->savemode = VOIDmode;
929 /* Set M->cond if either invariant_p or consec_sets_invariant_p
930 returned 2 (only conditionally invariant). */
931 m->cond = ((tem | tem1 | tem2) > 1);
932 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
933 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
935 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
936 - uid_luid[REGNO_FIRST_UID (regno)]);
937 m->savings = VARRAY_INT (n_times_used, regno);
938 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
939 m->savings += libcall_benefit (p);
940 VARRAY_INT (n_times_set, regno) = move_insn ? -2 : -1;
941 /* Add M to the end of the chain MOVABLES. */
945 last_movable->next = m;
950 /* It is possible for the first instruction to have a
951 REG_EQUAL note but a non-invariant SET_SRC, so we must
952 remember the status of the first instruction in case
953 the last instruction doesn't have a REG_EQUAL note. */
954 m->move_insn_first = m->move_insn;
956 /* Skip this insn, not checking REG_LIBCALL notes. */
957 p = next_nonnote_insn (p);
958 /* Skip the consecutive insns, if there are any. */
959 p = skip_consec_insns (p, m->consec);
960 /* Back up to the last insn of the consecutive group. */
961 p = prev_nonnote_insn (p);
963 /* We must now reset m->move_insn, m->is_equiv, and possibly
964 m->set_src to correspond to the effects of all the
966 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
968 m->set_src = XEXP (temp, 0), m->move_insn = 1;
971 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
972 if (temp && CONSTANT_P (XEXP (temp, 0)))
973 m->set_src = XEXP (temp, 0), m->move_insn = 1;
978 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
981 /* If this register is always set within a STRICT_LOW_PART
982 or set to zero, then its high bytes are constant.
983 So clear them outside the loop and within the loop
984 just load the low bytes.
985 We must check that the machine has an instruction to do so.
986 Also, if the value loaded into the register
987 depends on the same register, this cannot be done. */
988 else if (SET_SRC (set) == const0_rtx
989 && GET_CODE (NEXT_INSN (p)) == INSN
990 && (set1 = single_set (NEXT_INSN (p)))
991 && GET_CODE (set1) == SET
992 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
993 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
994 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
996 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
998 register int regno = REGNO (SET_DEST (set));
999 if (VARRAY_INT (n_times_set, regno) == 2)
1001 register struct movable *m;
1002 m = (struct movable *) alloca (sizeof (struct movable));
1005 m->set_dest = SET_DEST (set);
1006 m->dependencies = 0;
1012 m->move_insn_first = 0;
1014 /* If the insn may not be executed on some cycles,
1015 we can't clear the whole reg; clear just high part.
1016 Not even if the reg is used only within this loop.
1023 Clearing x before the inner loop could clobber a value
1024 being saved from the last time around the outer loop.
1025 However, if the reg is not used outside this loop
1026 and all uses of the register are in the same
1027 basic block as the store, there is no problem.
1029 If this insn was made by loop, we don't know its
1030 INSN_LUID and hence must make a conservative
1032 m->global = (INSN_UID (p) >= max_uid_for_loop
1033 || (uid_luid[REGNO_LAST_UID (regno)]
1035 || (uid_luid[REGNO_FIRST_UID (regno)]
1037 || (labels_in_range_p
1038 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1039 if (maybe_never && m->global)
1040 m->savemode = GET_MODE (SET_SRC (set1));
1042 m->savemode = VOIDmode;
1046 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1047 - uid_luid[REGNO_FIRST_UID (regno)]);
1049 VARRAY_INT (n_times_set, regno) = -1;
1050 /* Add M to the end of the chain MOVABLES. */
1054 last_movable->next = m;
1059 /* Past a call insn, we get to insns which might not be executed
1060 because the call might exit. This matters for insns that trap.
1061 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1062 so they don't count. */
1063 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1065 /* Past a label or a jump, we get to insns for which we
1066 can't count on whether or how many times they will be
1067 executed during each iteration. Therefore, we can
1068 only move out sets of trivial variables
1069 (those not used after the loop). */
1070 /* Similar code appears twice in strength_reduce. */
1071 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1072 /* If we enter the loop in the middle, and scan around to the
1073 beginning, don't set maybe_never for that. This must be an
1074 unconditional jump, otherwise the code at the top of the
1075 loop might never be executed. Unconditional jumps are
1076 followed a by barrier then loop end. */
1077 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1078 && NEXT_INSN (NEXT_INSN (p)) == end
1079 && simplejump_p (p)))
1081 else if (GET_CODE (p) == NOTE)
1083 /* At the virtual top of a converted loop, insns are again known to
1084 be executed: logically, the loop begins here even though the exit
1085 code has been duplicated. */
1086 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1087 maybe_never = call_passed = 0;
1088 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1090 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1095 /* If one movable subsumes another, ignore that other. */
1097 ignore_some_movables (movables);
1099 /* For each movable insn, see if the reg that it loads
1100 leads when it dies right into another conditionally movable insn.
1101 If so, record that the second insn "forces" the first one,
1102 since the second can be moved only if the first is. */
1104 force_movables (movables);
1106 /* See if there are multiple movable insns that load the same value.
1107 If there are, make all but the first point at the first one
1108 through the `match' field, and add the priorities of them
1109 all together as the priority of the first. */
1111 combine_movables (movables, nregs);
1113 /* Now consider each movable insn to decide whether it is worth moving.
1114 Store 0 in n_times_set for each reg that is moved.
1116 Generally this increases code size, so do not move moveables when
1117 optimizing for code size. */
1119 if (! optimize_size)
1120 move_movables (movables, threshold,
1121 insn_count, loop_start, end, nregs);
1123 /* Now candidates that still are negative are those not moved.
1124 Change n_times_set to indicate that those are not actually invariant. */
1125 for (i = 0; i < nregs; i++)
1126 if (VARRAY_INT (n_times_set, i) < 0)
1127 VARRAY_INT (n_times_set, i) = VARRAY_INT (n_times_used, i);
1129 /* Now that we've moved some things out of the loop, we able to
1130 hoist even more memory references. There's no need to pass
1131 reg_single_usage this time, since we're done with it. */
1132 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top,
1136 if (flag_strength_reduce)
1138 the_movables = movables;
1139 strength_reduce (scan_start, end, loop_top,
1140 insn_count, loop_start, end, unroll_p, bct_p);
1143 VARRAY_FREE (n_times_set);
1144 VARRAY_FREE (n_times_used);
1145 VARRAY_FREE (may_not_optimize);
1146 VARRAY_FREE (reg_single_usage);
1149 /* Add elements to *OUTPUT to record all the pseudo-regs
1150 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1153 record_excess_regs (in_this, not_in_this, output)
1154 rtx in_this, not_in_this;
1161 code = GET_CODE (in_this);
1175 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1176 && ! reg_mentioned_p (in_this, not_in_this))
1177 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1184 fmt = GET_RTX_FORMAT (code);
1185 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1192 for (j = 0; j < XVECLEN (in_this, i); j++)
1193 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1197 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1203 /* Check what regs are referred to in the libcall block ending with INSN,
1204 aside from those mentioned in the equivalent value.
1205 If there are none, return 0.
1206 If there are one or more, return an EXPR_LIST containing all of them. */
1209 libcall_other_reg (insn, equiv)
1212 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1213 rtx p = XEXP (note, 0);
1216 /* First, find all the regs used in the libcall block
1217 that are not mentioned as inputs to the result. */
1221 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1222 || GET_CODE (p) == CALL_INSN)
1223 record_excess_regs (PATTERN (p), equiv, &output);
1230 /* Return 1 if all uses of REG
1231 are between INSN and the end of the basic block. */
1234 reg_in_basic_block_p (insn, reg)
1237 int regno = REGNO (reg);
1240 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1243 /* Search this basic block for the already recorded last use of the reg. */
1244 for (p = insn; p; p = NEXT_INSN (p))
1246 switch (GET_CODE (p))
1253 /* Ordinary insn: if this is the last use, we win. */
1254 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1259 /* Jump insn: if this is the last use, we win. */
1260 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1262 /* Otherwise, it's the end of the basic block, so we lose. */
1267 /* It's the end of the basic block, so we lose. */
1275 /* The "last use" doesn't follow the "first use"?? */
1279 /* Compute the benefit of eliminating the insns in the block whose
1280 last insn is LAST. This may be a group of insns used to compute a
1281 value directly or can contain a library call. */
1284 libcall_benefit (last)
1290 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1291 insn != last; insn = NEXT_INSN (insn))
1293 if (GET_CODE (insn) == CALL_INSN)
1294 benefit += 10; /* Assume at least this many insns in a library
1296 else if (GET_CODE (insn) == INSN
1297 && GET_CODE (PATTERN (insn)) != USE
1298 && GET_CODE (PATTERN (insn)) != CLOBBER)
1305 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1308 skip_consec_insns (insn, count)
1312 for (; count > 0; count--)
1316 /* If first insn of libcall sequence, skip to end. */
1317 /* Do this at start of loop, since INSN is guaranteed to
1319 if (GET_CODE (insn) != NOTE
1320 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1321 insn = XEXP (temp, 0);
1323 do insn = NEXT_INSN (insn);
1324 while (GET_CODE (insn) == NOTE);
1330 /* Ignore any movable whose insn falls within a libcall
1331 which is part of another movable.
1332 We make use of the fact that the movable for the libcall value
1333 was made later and so appears later on the chain. */
1336 ignore_some_movables (movables)
1337 struct movable *movables;
1339 register struct movable *m, *m1;
1341 for (m = movables; m; m = m->next)
1343 /* Is this a movable for the value of a libcall? */
1344 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1348 /* Check for earlier movables inside that range,
1349 and mark them invalid. We cannot use LUIDs here because
1350 insns created by loop.c for prior loops don't have LUIDs.
1351 Rather than reject all such insns from movables, we just
1352 explicitly check each insn in the libcall (since invariant
1353 libcalls aren't that common). */
1354 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1355 for (m1 = movables; m1 != m; m1 = m1->next)
1356 if (m1->insn == insn)
1362 /* For each movable insn, see if the reg that it loads
1363 leads when it dies right into another conditionally movable insn.
1364 If so, record that the second insn "forces" the first one,
1365 since the second can be moved only if the first is. */
1368 force_movables (movables)
1369 struct movable *movables;
1371 register struct movable *m, *m1;
1372 for (m1 = movables; m1; m1 = m1->next)
1373 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1374 if (!m1->partial && !m1->done)
1376 int regno = m1->regno;
1377 for (m = m1->next; m; m = m->next)
1378 /* ??? Could this be a bug? What if CSE caused the
1379 register of M1 to be used after this insn?
1380 Since CSE does not update regno_last_uid,
1381 this insn M->insn might not be where it dies.
1382 But very likely this doesn't matter; what matters is
1383 that M's reg is computed from M1's reg. */
1384 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1387 if (m != 0 && m->set_src == m1->set_dest
1388 /* If m->consec, m->set_src isn't valid. */
1392 /* Increase the priority of the moving the first insn
1393 since it permits the second to be moved as well. */
1397 m1->lifetime += m->lifetime;
1398 m1->savings += m->savings;
1403 /* Find invariant expressions that are equal and can be combined into
1407 combine_movables (movables, nregs)
1408 struct movable *movables;
1411 register struct movable *m;
1412 char *matched_regs = (char *) alloca (nregs);
1413 enum machine_mode mode;
1415 /* Regs that are set more than once are not allowed to match
1416 or be matched. I'm no longer sure why not. */
1417 /* Perhaps testing m->consec_sets would be more appropriate here? */
1419 for (m = movables; m; m = m->next)
1420 if (m->match == 0 && VARRAY_INT (n_times_used, m->regno) == 1 && !m->partial)
1422 register struct movable *m1;
1423 int regno = m->regno;
1425 bzero (matched_regs, nregs);
1426 matched_regs[regno] = 1;
1428 /* We want later insns to match the first one. Don't make the first
1429 one match any later ones. So start this loop at m->next. */
1430 for (m1 = m->next; m1; m1 = m1->next)
1431 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_used, m1->regno) == 1
1432 /* A reg used outside the loop mustn't be eliminated. */
1434 /* A reg used for zero-extending mustn't be eliminated. */
1436 && (matched_regs[m1->regno]
1439 /* Can combine regs with different modes loaded from the
1440 same constant only if the modes are the same or
1441 if both are integer modes with M wider or the same
1442 width as M1. The check for integer is redundant, but
1443 safe, since the only case of differing destination
1444 modes with equal sources is when both sources are
1445 VOIDmode, i.e., CONST_INT. */
1446 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1447 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1448 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1449 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1450 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1451 /* See if the source of M1 says it matches M. */
1452 && ((GET_CODE (m1->set_src) == REG
1453 && matched_regs[REGNO (m1->set_src)])
1454 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1456 && ((m->dependencies == m1->dependencies)
1457 || rtx_equal_p (m->dependencies, m1->dependencies)))
1459 m->lifetime += m1->lifetime;
1460 m->savings += m1->savings;
1463 matched_regs[m1->regno] = 1;
1467 /* Now combine the regs used for zero-extension.
1468 This can be done for those not marked `global'
1469 provided their lives don't overlap. */
1471 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1472 mode = GET_MODE_WIDER_MODE (mode))
1474 register struct movable *m0 = 0;
1476 /* Combine all the registers for extension from mode MODE.
1477 Don't combine any that are used outside this loop. */
1478 for (m = movables; m; m = m->next)
1479 if (m->partial && ! m->global
1480 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1482 register struct movable *m1;
1483 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1484 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1488 /* First one: don't check for overlap, just record it. */
1493 /* Make sure they extend to the same mode.
1494 (Almost always true.) */
1495 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1498 /* We already have one: check for overlap with those
1499 already combined together. */
1500 for (m1 = movables; m1 != m; m1 = m1->next)
1501 if (m1 == m0 || (m1->partial && m1->match == m0))
1502 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1503 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1506 /* No overlap: we can combine this with the others. */
1507 m0->lifetime += m->lifetime;
1508 m0->savings += m->savings;
1517 /* Return 1 if regs X and Y will become the same if moved. */
1520 regs_match_p (x, y, movables)
1522 struct movable *movables;
1526 struct movable *mx, *my;
1528 for (mx = movables; mx; mx = mx->next)
1529 if (mx->regno == xn)
1532 for (my = movables; my; my = my->next)
1533 if (my->regno == yn)
1537 && ((mx->match == my->match && mx->match != 0)
1539 || mx == my->match));
1542 /* Return 1 if X and Y are identical-looking rtx's.
1543 This is the Lisp function EQUAL for rtx arguments.
1545 If two registers are matching movables or a movable register and an
1546 equivalent constant, consider them equal. */
1549 rtx_equal_for_loop_p (x, y, movables)
1551 struct movable *movables;
1555 register struct movable *m;
1556 register enum rtx_code code;
1561 if (x == 0 || y == 0)
1564 code = GET_CODE (x);
1566 /* If we have a register and a constant, they may sometimes be
1568 if (GET_CODE (x) == REG && VARRAY_INT (n_times_set, REGNO (x)) == -2
1571 for (m = movables; m; m = m->next)
1572 if (m->move_insn && m->regno == REGNO (x)
1573 && rtx_equal_p (m->set_src, y))
1576 else if (GET_CODE (y) == REG && VARRAY_INT (n_times_set, REGNO (y)) == -2
1579 for (m = movables; m; m = m->next)
1580 if (m->move_insn && m->regno == REGNO (y)
1581 && rtx_equal_p (m->set_src, x))
1585 /* Otherwise, rtx's of different codes cannot be equal. */
1586 if (code != GET_CODE (y))
1589 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1590 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1592 if (GET_MODE (x) != GET_MODE (y))
1595 /* These three types of rtx's can be compared nonrecursively. */
1597 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1599 if (code == LABEL_REF)
1600 return XEXP (x, 0) == XEXP (y, 0);
1601 if (code == SYMBOL_REF)
1602 return XSTR (x, 0) == XSTR (y, 0);
1604 /* Compare the elements. If any pair of corresponding elements
1605 fail to match, return 0 for the whole things. */
1607 fmt = GET_RTX_FORMAT (code);
1608 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1613 if (XWINT (x, i) != XWINT (y, i))
1618 if (XINT (x, i) != XINT (y, i))
1623 /* Two vectors must have the same length. */
1624 if (XVECLEN (x, i) != XVECLEN (y, i))
1627 /* And the corresponding elements must match. */
1628 for (j = 0; j < XVECLEN (x, i); j++)
1629 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1634 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1639 if (strcmp (XSTR (x, i), XSTR (y, i)))
1644 /* These are just backpointers, so they don't matter. */
1650 /* It is believed that rtx's at this level will never
1651 contain anything but integers and other rtx's,
1652 except for within LABEL_REFs and SYMBOL_REFs. */
1660 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1661 insns in INSNS which use thet reference. */
1664 add_label_notes (x, insns)
1668 enum rtx_code code = GET_CODE (x);
1673 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1675 /* This code used to ignore labels that referred to dispatch tables to
1676 avoid flow generating (slighly) worse code.
1678 We no longer ignore such label references (see LABEL_REF handling in
1679 mark_jump_label for additional information). */
1680 for (insn = insns; insn; insn = NEXT_INSN (insn))
1681 if (reg_mentioned_p (XEXP (x, 0), insn))
1682 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1686 fmt = GET_RTX_FORMAT (code);
1687 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1690 add_label_notes (XEXP (x, i), insns);
1691 else if (fmt[i] == 'E')
1692 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1693 add_label_notes (XVECEXP (x, i, j), insns);
1697 /* Scan MOVABLES, and move the insns that deserve to be moved.
1698 If two matching movables are combined, replace one reg with the
1699 other throughout. */
1702 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1703 struct movable *movables;
1711 register struct movable *m;
1713 /* Map of pseudo-register replacements to handle combining
1714 when we move several insns that load the same value
1715 into different pseudo-registers. */
1716 rtx *reg_map = (rtx *) alloca (nregs * sizeof (rtx));
1717 char *already_moved = (char *) alloca (nregs);
1719 bzero (already_moved, nregs);
1720 bzero ((char *) reg_map, nregs * sizeof (rtx));
1724 for (m = movables; m; m = m->next)
1726 /* Describe this movable insn. */
1728 if (loop_dump_stream)
1730 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1731 INSN_UID (m->insn), m->regno, m->lifetime);
1733 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1735 fprintf (loop_dump_stream, "cond ");
1737 fprintf (loop_dump_stream, "force ");
1739 fprintf (loop_dump_stream, "global ");
1741 fprintf (loop_dump_stream, "done ");
1743 fprintf (loop_dump_stream, "move-insn ");
1745 fprintf (loop_dump_stream, "matches %d ",
1746 INSN_UID (m->match->insn));
1748 fprintf (loop_dump_stream, "forces %d ",
1749 INSN_UID (m->forces->insn));
1752 /* Count movables. Value used in heuristics in strength_reduce. */
1755 /* Ignore the insn if it's already done (it matched something else).
1756 Otherwise, see if it is now safe to move. */
1760 || (1 == invariant_p (m->set_src)
1761 && (m->dependencies == 0
1762 || 1 == invariant_p (m->dependencies))
1764 || 1 == consec_sets_invariant_p (m->set_dest,
1767 && (! m->forces || m->forces->done))
1771 int savings = m->savings;
1773 /* We have an insn that is safe to move.
1774 Compute its desirability. */
1779 if (loop_dump_stream)
1780 fprintf (loop_dump_stream, "savings %d ", savings);
1782 if (moved_once[regno] && loop_dump_stream)
1783 fprintf (loop_dump_stream, "halved since already moved ");
1785 /* An insn MUST be moved if we already moved something else
1786 which is safe only if this one is moved too: that is,
1787 if already_moved[REGNO] is nonzero. */
1789 /* An insn is desirable to move if the new lifetime of the
1790 register is no more than THRESHOLD times the old lifetime.
1791 If it's not desirable, it means the loop is so big
1792 that moving won't speed things up much,
1793 and it is liable to make register usage worse. */
1795 /* It is also desirable to move if it can be moved at no
1796 extra cost because something else was already moved. */
1798 if (already_moved[regno]
1799 || flag_move_all_movables
1800 || (threshold * savings * m->lifetime) >=
1801 (moved_once[regno] ? insn_count * 2 : insn_count)
1802 || (m->forces && m->forces->done
1803 && VARRAY_INT (n_times_used, m->forces->regno) == 1))
1806 register struct movable *m1;
1809 /* Now move the insns that set the reg. */
1811 if (m->partial && m->match)
1815 /* Find the end of this chain of matching regs.
1816 Thus, we load each reg in the chain from that one reg.
1817 And that reg is loaded with 0 directly,
1818 since it has ->match == 0. */
1819 for (m1 = m; m1->match; m1 = m1->match);
1820 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1821 SET_DEST (PATTERN (m1->insn)));
1822 i1 = emit_insn_before (newpat, loop_start);
1824 /* Mark the moved, invariant reg as being allowed to
1825 share a hard reg with the other matching invariant. */
1826 REG_NOTES (i1) = REG_NOTES (m->insn);
1827 r1 = SET_DEST (PATTERN (m->insn));
1828 r2 = SET_DEST (PATTERN (m1->insn));
1830 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1831 gen_rtx_EXPR_LIST (VOIDmode, r2,
1833 delete_insn (m->insn);
1838 if (loop_dump_stream)
1839 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1841 /* If we are to re-generate the item being moved with a
1842 new move insn, first delete what we have and then emit
1843 the move insn before the loop. */
1844 else if (m->move_insn)
1848 for (count = m->consec; count >= 0; count--)
1850 /* If this is the first insn of a library call sequence,
1852 if (GET_CODE (p) != NOTE
1853 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1856 /* If this is the last insn of a libcall sequence, then
1857 delete every insn in the sequence except the last.
1858 The last insn is handled in the normal manner. */
1859 if (GET_CODE (p) != NOTE
1860 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1862 temp = XEXP (temp, 0);
1864 temp = delete_insn (temp);
1868 p = delete_insn (p);
1870 /* simplify_giv_expr expects that it can walk the insns
1871 at m->insn forwards and see this old sequence we are
1872 tossing here. delete_insn does preserve the next
1873 pointers, but when we skip over a NOTE we must fix
1874 it up. Otherwise that code walks into the non-deleted
1876 while (p && GET_CODE (p) == NOTE)
1877 p = NEXT_INSN (temp) = NEXT_INSN (p);
1881 emit_move_insn (m->set_dest, m->set_src);
1882 temp = get_insns ();
1885 add_label_notes (m->set_src, temp);
1887 i1 = emit_insns_before (temp, loop_start);
1888 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1890 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1891 m->set_src, REG_NOTES (i1));
1893 if (loop_dump_stream)
1894 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1896 /* The more regs we move, the less we like moving them. */
1901 for (count = m->consec; count >= 0; count--)
1905 /* If first insn of libcall sequence, skip to end. */
1906 /* Do this at start of loop, since p is guaranteed to
1908 if (GET_CODE (p) != NOTE
1909 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1912 /* If last insn of libcall sequence, move all
1913 insns except the last before the loop. The last
1914 insn is handled in the normal manner. */
1915 if (GET_CODE (p) != NOTE
1916 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1920 rtx fn_address_insn = 0;
1923 for (temp = XEXP (temp, 0); temp != p;
1924 temp = NEXT_INSN (temp))
1930 if (GET_CODE (temp) == NOTE)
1933 body = PATTERN (temp);
1935 /* Find the next insn after TEMP,
1936 not counting USE or NOTE insns. */
1937 for (next = NEXT_INSN (temp); next != p;
1938 next = NEXT_INSN (next))
1939 if (! (GET_CODE (next) == INSN
1940 && GET_CODE (PATTERN (next)) == USE)
1941 && GET_CODE (next) != NOTE)
1944 /* If that is the call, this may be the insn
1945 that loads the function address.
1947 Extract the function address from the insn
1948 that loads it into a register.
1949 If this insn was cse'd, we get incorrect code.
1951 So emit a new move insn that copies the
1952 function address into the register that the
1953 call insn will use. flow.c will delete any
1954 redundant stores that we have created. */
1955 if (GET_CODE (next) == CALL_INSN
1956 && GET_CODE (body) == SET
1957 && GET_CODE (SET_DEST (body)) == REG
1958 && (n = find_reg_note (temp, REG_EQUAL,
1961 fn_reg = SET_SRC (body);
1962 if (GET_CODE (fn_reg) != REG)
1963 fn_reg = SET_DEST (body);
1964 fn_address = XEXP (n, 0);
1965 fn_address_insn = temp;
1967 /* We have the call insn.
1968 If it uses the register we suspect it might,
1969 load it with the correct address directly. */
1970 if (GET_CODE (temp) == CALL_INSN
1972 && reg_referenced_p (fn_reg, body))
1973 emit_insn_after (gen_move_insn (fn_reg,
1977 if (GET_CODE (temp) == CALL_INSN)
1979 i1 = emit_call_insn_before (body, loop_start);
1980 /* Because the USAGE information potentially
1981 contains objects other than hard registers
1982 we need to copy it. */
1983 if (CALL_INSN_FUNCTION_USAGE (temp))
1984 CALL_INSN_FUNCTION_USAGE (i1)
1985 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1988 i1 = emit_insn_before (body, loop_start);
1991 if (temp == fn_address_insn)
1992 fn_address_insn = i1;
1993 REG_NOTES (i1) = REG_NOTES (temp);
1999 if (m->savemode != VOIDmode)
2001 /* P sets REG to zero; but we should clear only
2002 the bits that are not covered by the mode
2004 rtx reg = m->set_dest;
2010 (GET_MODE (reg), and_optab, reg,
2011 GEN_INT ((((HOST_WIDE_INT) 1
2012 << GET_MODE_BITSIZE (m->savemode)))
2014 reg, 1, OPTAB_LIB_WIDEN);
2018 emit_move_insn (reg, tem);
2019 sequence = gen_sequence ();
2021 i1 = emit_insn_before (sequence, loop_start);
2023 else if (GET_CODE (p) == CALL_INSN)
2025 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2026 /* Because the USAGE information potentially
2027 contains objects other than hard registers
2028 we need to copy it. */
2029 if (CALL_INSN_FUNCTION_USAGE (p))
2030 CALL_INSN_FUNCTION_USAGE (i1)
2031 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2033 else if (count == m->consec && m->move_insn_first)
2035 /* The SET_SRC might not be invariant, so we must
2036 use the REG_EQUAL note. */
2038 emit_move_insn (m->set_dest, m->set_src);
2039 temp = get_insns ();
2042 add_label_notes (m->set_src, temp);
2044 i1 = emit_insns_before (temp, loop_start);
2045 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2047 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2049 m->set_src, REG_NOTES (i1));
2052 i1 = emit_insn_before (PATTERN (p), loop_start);
2054 if (REG_NOTES (i1) == 0)
2056 REG_NOTES (i1) = REG_NOTES (p);
2058 /* If there is a REG_EQUAL note present whose value
2059 is not loop invariant, then delete it, since it
2060 may cause problems with later optimization passes.
2061 It is possible for cse to create such notes
2062 like this as a result of record_jump_cond. */
2064 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2065 && ! invariant_p (XEXP (temp, 0)))
2066 remove_note (i1, temp);
2072 if (loop_dump_stream)
2073 fprintf (loop_dump_stream, " moved to %d",
2076 /* If library call, now fix the REG_NOTES that contain
2077 insn pointers, namely REG_LIBCALL on FIRST
2078 and REG_RETVAL on I1. */
2079 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2081 XEXP (temp, 0) = first;
2082 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2083 XEXP (temp, 0) = i1;
2090 /* simplify_giv_expr expects that it can walk the insns
2091 at m->insn forwards and see this old sequence we are
2092 tossing here. delete_insn does preserve the next
2093 pointers, but when we skip over a NOTE we must fix
2094 it up. Otherwise that code walks into the non-deleted
2096 while (p && GET_CODE (p) == NOTE)
2097 p = NEXT_INSN (temp) = NEXT_INSN (p);
2100 /* The more regs we move, the less we like moving them. */
2104 /* Any other movable that loads the same register
2106 already_moved[regno] = 1;
2108 /* This reg has been moved out of one loop. */
2109 moved_once[regno] = 1;
2111 /* The reg set here is now invariant. */
2113 VARRAY_INT (n_times_set, regno) = 0;
2117 /* Change the length-of-life info for the register
2118 to say it lives at least the full length of this loop.
2119 This will help guide optimizations in outer loops. */
2121 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2122 /* This is the old insn before all the moved insns.
2123 We can't use the moved insn because it is out of range
2124 in uid_luid. Only the old insns have luids. */
2125 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2126 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2127 REGNO_LAST_UID (regno) = INSN_UID (end);
2129 /* Combine with this moved insn any other matching movables. */
2132 for (m1 = movables; m1; m1 = m1->next)
2137 /* Schedule the reg loaded by M1
2138 for replacement so that shares the reg of M.
2139 If the modes differ (only possible in restricted
2140 circumstances, make a SUBREG. */
2141 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2142 reg_map[m1->regno] = m->set_dest;
2145 = gen_lowpart_common (GET_MODE (m1->set_dest),
2148 /* Get rid of the matching insn
2149 and prevent further processing of it. */
2152 /* if library call, delete all insn except last, which
2154 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2157 for (temp = XEXP (temp, 0); temp != m1->insn;
2158 temp = NEXT_INSN (temp))
2161 delete_insn (m1->insn);
2163 /* Any other movable that loads the same register
2165 already_moved[m1->regno] = 1;
2167 /* The reg merged here is now invariant,
2168 if the reg it matches is invariant. */
2170 VARRAY_INT (n_times_set, m1->regno) = 0;
2173 else if (loop_dump_stream)
2174 fprintf (loop_dump_stream, "not desirable");
2176 else if (loop_dump_stream && !m->match)
2177 fprintf (loop_dump_stream, "not safe");
2179 if (loop_dump_stream)
2180 fprintf (loop_dump_stream, "\n");
2184 new_start = loop_start;
2186 /* Go through all the instructions in the loop, making
2187 all the register substitutions scheduled in REG_MAP. */
2188 for (p = new_start; p != end; p = NEXT_INSN (p))
2189 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2190 || GET_CODE (p) == CALL_INSN)
2192 replace_regs (PATTERN (p), reg_map, nregs, 0);
2193 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2199 /* Scan X and replace the address of any MEM in it with ADDR.
2200 REG is the address that MEM should have before the replacement. */
2203 replace_call_address (x, reg, addr)
2206 register enum rtx_code code;
2212 code = GET_CODE (x);
2226 /* Short cut for very common case. */
2227 replace_call_address (XEXP (x, 1), reg, addr);
2231 /* Short cut for very common case. */
2232 replace_call_address (XEXP (x, 0), reg, addr);
2236 /* If this MEM uses a reg other than the one we expected,
2237 something is wrong. */
2238 if (XEXP (x, 0) != reg)
2247 fmt = GET_RTX_FORMAT (code);
2248 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2251 replace_call_address (XEXP (x, i), reg, addr);
2255 for (j = 0; j < XVECLEN (x, i); j++)
2256 replace_call_address (XVECEXP (x, i, j), reg, addr);
2262 /* Return the number of memory refs to addresses that vary
2266 count_nonfixed_reads (x)
2269 register enum rtx_code code;
2277 code = GET_CODE (x);
2291 return ((invariant_p (XEXP (x, 0)) != 1)
2292 + count_nonfixed_reads (XEXP (x, 0)));
2299 fmt = GET_RTX_FORMAT (code);
2300 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2303 value += count_nonfixed_reads (XEXP (x, i));
2307 for (j = 0; j < XVECLEN (x, i); j++)
2308 value += count_nonfixed_reads (XVECEXP (x, i, j));
2316 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2317 Replace it with an instruction to load just the low bytes
2318 if the machine supports such an instruction,
2319 and insert above LOOP_START an instruction to clear the register. */
2322 constant_high_bytes (p, loop_start)
2326 register int insn_code_number;
2328 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2329 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2331 new = gen_rtx_SET (VOIDmode,
2332 gen_rtx_STRICT_LOW_PART (VOIDmode,
2333 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2334 SET_DEST (PATTERN (p)),
2336 XEXP (SET_SRC (PATTERN (p)), 0));
2337 insn_code_number = recog (new, p);
2339 if (insn_code_number)
2343 /* Clear destination register before the loop. */
2344 emit_insn_before (gen_rtx_SET (VOIDmode, SET_DEST (PATTERN (p)),
2348 /* Inside the loop, just load the low part. */
2354 /* Scan a loop setting the variables `unknown_address_altered',
2355 `num_mem_sets', `loop_continue', `loops_enclosed', `loop_has_call',
2356 `loop_has_volatile', and `loop_has_tablejump'.
2357 Also, fill in the arrays `loop_mems' and `loop_store_mems'. */
2360 prescan_loop (start, end)
2363 register int level = 1;
2365 int loop_has_multiple_exit_targets = 0;
2366 /* The label after END. Jumping here is just like falling off the
2367 end of the loop. We use next_nonnote_insn instead of next_label
2368 as a hedge against the (pathological) case where some actual insn
2369 might end up between the two. */
2370 rtx exit_target = next_nonnote_insn (end);
2371 if (exit_target == NULL_RTX || GET_CODE (exit_target) != CODE_LABEL)
2372 loop_has_multiple_exit_targets = 1;
2374 unknown_address_altered = 0;
2376 loop_has_volatile = 0;
2377 loop_has_tablejump = 0;
2378 loop_store_mems_idx = 0;
2385 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2386 insn = NEXT_INSN (insn))
2388 if (GET_CODE (insn) == NOTE)
2390 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2393 /* Count number of loops contained in this one. */
2396 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2405 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2408 loop_continue = insn;
2411 else if (GET_CODE (insn) == CALL_INSN)
2413 if (! CONST_CALL_P (insn))
2414 unknown_address_altered = 1;
2417 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2419 rtx label1 = NULL_RTX;
2420 rtx label2 = NULL_RTX;
2422 if (volatile_refs_p (PATTERN (insn)))
2423 loop_has_volatile = 1;
2425 if (GET_CODE (insn) == JUMP_INSN
2426 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2427 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2428 loop_has_tablejump = 1;
2430 note_stores (PATTERN (insn), note_addr_stored);
2432 if (! loop_has_multiple_exit_targets
2433 && GET_CODE (insn) == JUMP_INSN
2434 && GET_CODE (PATTERN (insn)) == SET
2435 && SET_DEST (PATTERN (insn)) == pc_rtx)
2437 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2439 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2440 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2444 label1 = SET_SRC (PATTERN (insn));
2448 if (label1 && label1 != pc_rtx)
2450 if (GET_CODE (label1) != LABEL_REF)
2452 /* Something tricky. */
2453 loop_has_multiple_exit_targets = 1;
2456 else if (XEXP (label1, 0) != exit_target
2457 && LABEL_OUTSIDE_LOOP_P (label1))
2459 /* A jump outside the current loop. */
2460 loop_has_multiple_exit_targets = 1;
2470 else if (GET_CODE (insn) == RETURN)
2471 loop_has_multiple_exit_targets = 1;
2474 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2475 if (/* We can't tell what MEMs are aliased by what. */
2476 !unknown_address_altered
2477 /* An exception thrown by a called function might land us
2480 /* We don't want loads for MEMs moved to a location before the
2481 one at which their stack memory becomes allocated. (Note
2482 that this is not a problem for malloc, etc., since those
2483 require actual function calls. */
2484 && !current_function_calls_alloca
2485 /* There are ways to leave the loop other than falling off the
2487 && !loop_has_multiple_exit_targets)
2488 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2489 insn = NEXT_INSN (insn))
2490 for_each_rtx (&insn, insert_loop_mem, 0);
2493 /* Scan the function looking for loops. Record the start and end of each loop.
2494 Also mark as invalid loops any loops that contain a setjmp or are branched
2495 to from outside the loop. */
2498 find_and_verify_loops (f)
2502 int current_loop = -1;
2506 /* If there are jumps to undefined labels,
2507 treat them as jumps out of any/all loops.
2508 This also avoids writing past end of tables when there are no loops. */
2509 uid_loop_num[0] = -1;
2511 /* Find boundaries of loops, mark which loops are contained within
2512 loops, and invalidate loops that have setjmp. */
2514 for (insn = f; insn; insn = NEXT_INSN (insn))
2516 if (GET_CODE (insn) == NOTE)
2517 switch (NOTE_LINE_NUMBER (insn))
2519 case NOTE_INSN_LOOP_BEG:
2520 loop_number_loop_starts[++next_loop] = insn;
2521 loop_number_loop_ends[next_loop] = 0;
2522 loop_outer_loop[next_loop] = current_loop;
2523 loop_invalid[next_loop] = 0;
2524 loop_number_exit_labels[next_loop] = 0;
2525 loop_number_exit_count[next_loop] = 0;
2526 current_loop = next_loop;
2529 case NOTE_INSN_SETJMP:
2530 /* In this case, we must invalidate our current loop and any
2532 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2534 loop_invalid[loop] = 1;
2535 if (loop_dump_stream)
2536 fprintf (loop_dump_stream,
2537 "\nLoop at %d ignored due to setjmp.\n",
2538 INSN_UID (loop_number_loop_starts[loop]));
2542 case NOTE_INSN_LOOP_END:
2543 if (current_loop == -1)
2546 loop_number_loop_ends[current_loop] = insn;
2547 current_loop = loop_outer_loop[current_loop];
2554 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2555 enclosing loop, but this doesn't matter. */
2556 uid_loop_num[INSN_UID (insn)] = current_loop;
2559 /* Any loop containing a label used in an initializer must be invalidated,
2560 because it can be jumped into from anywhere. */
2562 for (label = forced_labels; label; label = XEXP (label, 1))
2566 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2568 loop_num = loop_outer_loop[loop_num])
2569 loop_invalid[loop_num] = 1;
2572 /* Any loop containing a label used for an exception handler must be
2573 invalidated, because it can be jumped into from anywhere. */
2575 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2579 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2581 loop_num = loop_outer_loop[loop_num])
2582 loop_invalid[loop_num] = 1;
2585 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2586 loop that it is not contained within, that loop is marked invalid.
2587 If any INSN or CALL_INSN uses a label's address, then the loop containing
2588 that label is marked invalid, because it could be jumped into from
2591 Also look for blocks of code ending in an unconditional branch that
2592 exits the loop. If such a block is surrounded by a conditional
2593 branch around the block, move the block elsewhere (see below) and
2594 invert the jump to point to the code block. This may eliminate a
2595 label in our loop and will simplify processing by both us and a
2596 possible second cse pass. */
2598 for (insn = f; insn; insn = NEXT_INSN (insn))
2599 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2601 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2603 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2605 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2610 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2612 loop_num = loop_outer_loop[loop_num])
2613 loop_invalid[loop_num] = 1;
2617 if (GET_CODE (insn) != JUMP_INSN)
2620 mark_loop_jump (PATTERN (insn), this_loop_num);
2622 /* See if this is an unconditional branch outside the loop. */
2623 if (this_loop_num != -1
2624 && (GET_CODE (PATTERN (insn)) == RETURN
2625 || (simplejump_p (insn)
2626 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2628 && get_max_uid () < max_uid_for_loop)
2631 rtx our_next = next_real_insn (insn);
2633 int outer_loop = -1;
2635 /* Go backwards until we reach the start of the loop, a label,
2637 for (p = PREV_INSN (insn);
2638 GET_CODE (p) != CODE_LABEL
2639 && ! (GET_CODE (p) == NOTE
2640 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2641 && GET_CODE (p) != JUMP_INSN;
2645 /* Check for the case where we have a jump to an inner nested
2646 loop, and do not perform the optimization in that case. */
2648 if (JUMP_LABEL (insn))
2650 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2651 if (dest_loop != -1)
2653 for (outer_loop = dest_loop; outer_loop != -1;
2654 outer_loop = loop_outer_loop[outer_loop])
2655 if (outer_loop == this_loop_num)
2660 /* Make sure that the target of P is within the current loop. */
2662 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2663 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2664 outer_loop = this_loop_num;
2666 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2667 we have a block of code to try to move.
2669 We look backward and then forward from the target of INSN
2670 to find a BARRIER at the same loop depth as the target.
2671 If we find such a BARRIER, we make a new label for the start
2672 of the block, invert the jump in P and point it to that label,
2673 and move the block of code to the spot we found. */
2675 if (outer_loop == -1
2676 && GET_CODE (p) == JUMP_INSN
2677 && JUMP_LABEL (p) != 0
2678 /* Just ignore jumps to labels that were never emitted.
2679 These always indicate compilation errors. */
2680 && INSN_UID (JUMP_LABEL (p)) != 0
2682 && ! simplejump_p (p)
2683 && next_real_insn (JUMP_LABEL (p)) == our_next)
2686 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2687 int target_loop_num = uid_loop_num[INSN_UID (target)];
2690 for (loc = target; loc; loc = PREV_INSN (loc))
2691 if (GET_CODE (loc) == BARRIER
2692 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2696 for (loc = target; loc; loc = NEXT_INSN (loc))
2697 if (GET_CODE (loc) == BARRIER
2698 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2703 rtx cond_label = JUMP_LABEL (p);
2704 rtx new_label = get_label_after (p);
2706 /* Ensure our label doesn't go away. */
2707 LABEL_NUSES (cond_label)++;
2709 /* Verify that uid_loop_num is large enough and that
2711 if (invert_jump (p, new_label))
2715 /* If no suitable BARRIER was found, create a suitable
2716 one before TARGET. Since TARGET is a fall through
2717 path, we'll need to insert an jump around our block
2718 and a add a BARRIER before TARGET.
2720 This creates an extra unconditional jump outside
2721 the loop. However, the benefits of removing rarely
2722 executed instructions from inside the loop usually
2723 outweighs the cost of the extra unconditional jump
2724 outside the loop. */
2729 temp = gen_jump (JUMP_LABEL (insn));
2730 temp = emit_jump_insn_before (temp, target);
2731 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2732 LABEL_NUSES (JUMP_LABEL (insn))++;
2733 loc = emit_barrier_before (target);
2736 /* Include the BARRIER after INSN and copy the
2738 new_label = squeeze_notes (new_label, NEXT_INSN (insn));
2739 reorder_insns (new_label, NEXT_INSN (insn), loc);
2741 /* All those insns are now in TARGET_LOOP_NUM. */
2742 for (q = new_label; q != NEXT_INSN (NEXT_INSN (insn));
2744 uid_loop_num[INSN_UID (q)] = target_loop_num;
2746 /* The label jumped to by INSN is no longer a loop exit.
2747 Unless INSN does not have a label (e.g., it is a
2748 RETURN insn), search loop_number_exit_labels to find
2749 its label_ref, and remove it. Also turn off
2750 LABEL_OUTSIDE_LOOP_P bit. */
2751 if (JUMP_LABEL (insn))
2756 r = loop_number_exit_labels[this_loop_num];
2757 r; q = r, r = LABEL_NEXTREF (r))
2758 if (XEXP (r, 0) == JUMP_LABEL (insn))
2760 LABEL_OUTSIDE_LOOP_P (r) = 0;
2762 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2764 loop_number_exit_labels[this_loop_num]
2765 = LABEL_NEXTREF (r);
2769 for (loop_num = this_loop_num;
2770 loop_num != -1 && loop_num != target_loop_num;
2771 loop_num = loop_outer_loop[loop_num])
2772 loop_number_exit_count[loop_num]--;
2774 /* If we didn't find it, then something is wrong. */
2779 /* P is now a jump outside the loop, so it must be put
2780 in loop_number_exit_labels, and marked as such.
2781 The easiest way to do this is to just call
2782 mark_loop_jump again for P. */
2783 mark_loop_jump (PATTERN (p), this_loop_num);
2785 /* If INSN now jumps to the insn after it,
2787 if (JUMP_LABEL (insn) != 0
2788 && (next_real_insn (JUMP_LABEL (insn))
2789 == next_real_insn (insn)))
2793 /* Continue the loop after where the conditional
2794 branch used to jump, since the only branch insn
2795 in the block (if it still remains) is an inter-loop
2796 branch and hence needs no processing. */
2797 insn = NEXT_INSN (cond_label);
2799 if (--LABEL_NUSES (cond_label) == 0)
2800 delete_insn (cond_label);
2802 /* This loop will be continued with NEXT_INSN (insn). */
2803 insn = PREV_INSN (insn);
2810 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2811 loops it is contained in, mark the target loop invalid.
2813 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2816 mark_loop_jump (x, loop_num)
2824 switch (GET_CODE (x))
2837 /* There could be a label reference in here. */
2838 mark_loop_jump (XEXP (x, 0), loop_num);
2844 mark_loop_jump (XEXP (x, 0), loop_num);
2845 mark_loop_jump (XEXP (x, 1), loop_num);
2850 mark_loop_jump (XEXP (x, 0), loop_num);
2854 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
2856 /* Link together all labels that branch outside the loop. This
2857 is used by final_[bg]iv_value and the loop unrolling code. Also
2858 mark this LABEL_REF so we know that this branch should predict
2861 /* A check to make sure the label is not in an inner nested loop,
2862 since this does not count as a loop exit. */
2863 if (dest_loop != -1)
2865 for (outer_loop = dest_loop; outer_loop != -1;
2866 outer_loop = loop_outer_loop[outer_loop])
2867 if (outer_loop == loop_num)
2873 if (loop_num != -1 && outer_loop == -1)
2875 LABEL_OUTSIDE_LOOP_P (x) = 1;
2876 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2877 loop_number_exit_labels[loop_num] = x;
2879 for (outer_loop = loop_num;
2880 outer_loop != -1 && outer_loop != dest_loop;
2881 outer_loop = loop_outer_loop[outer_loop])
2882 loop_number_exit_count[outer_loop]++;
2885 /* If this is inside a loop, but not in the current loop or one enclosed
2886 by it, it invalidates at least one loop. */
2888 if (dest_loop == -1)
2891 /* We must invalidate every nested loop containing the target of this
2892 label, except those that also contain the jump insn. */
2894 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
2896 /* Stop when we reach a loop that also contains the jump insn. */
2897 for (outer_loop = loop_num; outer_loop != -1;
2898 outer_loop = loop_outer_loop[outer_loop])
2899 if (dest_loop == outer_loop)
2902 /* If we get here, we know we need to invalidate a loop. */
2903 if (loop_dump_stream && ! loop_invalid[dest_loop])
2904 fprintf (loop_dump_stream,
2905 "\nLoop at %d ignored due to multiple entry points.\n",
2906 INSN_UID (loop_number_loop_starts[dest_loop]));
2908 loop_invalid[dest_loop] = 1;
2913 /* If this is not setting pc, ignore. */
2914 if (SET_DEST (x) == pc_rtx)
2915 mark_loop_jump (SET_SRC (x), loop_num);
2919 mark_loop_jump (XEXP (x, 1), loop_num);
2920 mark_loop_jump (XEXP (x, 2), loop_num);
2925 for (i = 0; i < XVECLEN (x, 0); i++)
2926 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
2930 for (i = 0; i < XVECLEN (x, 1); i++)
2931 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
2935 /* Treat anything else (such as a symbol_ref)
2936 as a branch out of this loop, but not into any loop. */
2940 #ifdef HAVE_decrement_and_branch_on_count
2941 LABEL_OUTSIDE_LOOP_P (x) = 1;
2942 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2943 #endif /* HAVE_decrement_and_branch_on_count */
2945 loop_number_exit_labels[loop_num] = x;
2947 for (outer_loop = loop_num; outer_loop != -1;
2948 outer_loop = loop_outer_loop[outer_loop])
2949 loop_number_exit_count[outer_loop]++;
2955 /* Return nonzero if there is a label in the range from
2956 insn INSN to and including the insn whose luid is END
2957 INSN must have an assigned luid (i.e., it must not have
2958 been previously created by loop.c). */
2961 labels_in_range_p (insn, end)
2965 while (insn && INSN_LUID (insn) <= end)
2967 if (GET_CODE (insn) == CODE_LABEL)
2969 insn = NEXT_INSN (insn);
2975 /* Record that a memory reference X is being set. */
2978 note_addr_stored (x, y)
2980 rtx y ATTRIBUTE_UNUSED;
2984 if (x == 0 || GET_CODE (x) != MEM)
2987 /* Count number of memory writes.
2988 This affects heuristics in strength_reduce. */
2991 /* BLKmode MEM means all memory is clobbered. */
2992 if (GET_MODE (x) == BLKmode)
2993 unknown_address_altered = 1;
2995 if (unknown_address_altered)
2998 for (i = 0; i < loop_store_mems_idx; i++)
2999 if (rtx_equal_p (XEXP (loop_store_mems[i], 0), XEXP (x, 0))
3000 && MEM_IN_STRUCT_P (x) == MEM_IN_STRUCT_P (loop_store_mems[i]))
3002 /* We are storing at the same address as previously noted. Save the
3004 if (GET_MODE_SIZE (GET_MODE (x))
3005 > GET_MODE_SIZE (GET_MODE (loop_store_mems[i])))
3006 loop_store_mems[i] = x;
3010 if (i == NUM_STORES)
3011 unknown_address_altered = 1;
3013 else if (i == loop_store_mems_idx)
3014 loop_store_mems[loop_store_mems_idx++] = x;
3017 /* Return nonzero if the rtx X is invariant over the current loop.
3019 The value is 2 if we refer to something only conditionally invariant.
3021 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3022 Otherwise, a memory ref is invariant if it does not conflict with
3023 anything stored in `loop_store_mems'. */
3030 register enum rtx_code code;
3032 int conditional = 0;
3036 code = GET_CODE (x);
3046 /* A LABEL_REF is normally invariant, however, if we are unrolling
3047 loops, and this label is inside the loop, then it isn't invariant.
3048 This is because each unrolled copy of the loop body will have
3049 a copy of this label. If this was invariant, then an insn loading
3050 the address of this label into a register might get moved outside
3051 the loop, and then each loop body would end up using the same label.
3053 We don't know the loop bounds here though, so just fail for all
3055 if (flag_unroll_loops)
3062 case UNSPEC_VOLATILE:
3066 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3067 since the reg might be set by initialization within the loop. */
3069 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3070 || x == arg_pointer_rtx)
3071 && ! current_function_has_nonlocal_goto)
3075 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3078 if (VARRAY_INT (n_times_set, REGNO (x)) < 0)
3081 return VARRAY_INT (n_times_set, REGNO (x)) == 0;
3084 /* Volatile memory references must be rejected. Do this before
3085 checking for read-only items, so that volatile read-only items
3086 will be rejected also. */
3087 if (MEM_VOLATILE_P (x))
3090 /* Read-only items (such as constants in a constant pool) are
3091 invariant if their address is. */
3092 if (RTX_UNCHANGING_P (x))
3095 /* If we filled the table (or had a subroutine call), any location
3096 in memory could have been clobbered. */
3097 if (unknown_address_altered)
3100 /* See if there is any dependence between a store and this load. */
3101 for (i = loop_store_mems_idx - 1; i >= 0; i--)
3102 if (true_dependence (loop_store_mems[i], VOIDmode, x, rtx_varies_p))
3105 /* It's not invalidated by a store in memory
3106 but we must still verify the address is invariant. */
3110 /* Don't mess with insns declared volatile. */
3111 if (MEM_VOLATILE_P (x))
3119 fmt = GET_RTX_FORMAT (code);
3120 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3124 int tem = invariant_p (XEXP (x, i));
3130 else if (fmt[i] == 'E')
3133 for (j = 0; j < XVECLEN (x, i); j++)
3135 int tem = invariant_p (XVECEXP (x, i, j));
3145 return 1 + conditional;
3149 /* Return nonzero if all the insns in the loop that set REG
3150 are INSN and the immediately following insns,
3151 and if each of those insns sets REG in an invariant way
3152 (not counting uses of REG in them).
3154 The value is 2 if some of these insns are only conditionally invariant.
3156 We assume that INSN itself is the first set of REG
3157 and that its source is invariant. */
3160 consec_sets_invariant_p (reg, n_sets, insn)
3164 register rtx p = insn;
3165 register int regno = REGNO (reg);
3167 /* Number of sets we have to insist on finding after INSN. */
3168 int count = n_sets - 1;
3169 int old = VARRAY_INT (n_times_set, regno);
3173 /* If N_SETS hit the limit, we can't rely on its value. */
3177 VARRAY_INT (n_times_set, regno) = 0;
3181 register enum rtx_code code;
3185 code = GET_CODE (p);
3187 /* If library call, skip to end of it. */
3188 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3193 && (set = single_set (p))
3194 && GET_CODE (SET_DEST (set)) == REG
3195 && REGNO (SET_DEST (set)) == regno)
3197 this = invariant_p (SET_SRC (set));
3200 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3202 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3203 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3205 this = (CONSTANT_P (XEXP (temp, 0))
3206 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3207 && invariant_p (XEXP (temp, 0))));
3214 else if (code != NOTE)
3216 VARRAY_INT (n_times_set, regno) = old;
3221 VARRAY_INT (n_times_set, regno) = old;
3222 /* If invariant_p ever returned 2, we return 2. */
3223 return 1 + (value & 2);
3227 /* I don't think this condition is sufficient to allow INSN
3228 to be moved, so we no longer test it. */
3230 /* Return 1 if all insns in the basic block of INSN and following INSN
3231 that set REG are invariant according to TABLE. */
3234 all_sets_invariant_p (reg, insn, table)
3238 register rtx p = insn;
3239 register int regno = REGNO (reg);
3243 register enum rtx_code code;
3245 code = GET_CODE (p);
3246 if (code == CODE_LABEL || code == JUMP_INSN)
3248 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3249 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3250 && REGNO (SET_DEST (PATTERN (p))) == regno)
3252 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3259 /* Look at all uses (not sets) of registers in X. For each, if it is
3260 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3261 a different insn, set USAGE[REGNO] to const0_rtx. */
3264 find_single_use_in_loop (insn, x, usage)
3269 enum rtx_code code = GET_CODE (x);
3270 char *fmt = GET_RTX_FORMAT (code);
3274 VARRAY_RTX (usage, REGNO (x))
3275 = (VARRAY_RTX (usage, REGNO (x)) != 0
3276 && VARRAY_RTX (usage, REGNO (x)) != insn)
3277 ? const0_rtx : insn;
3279 else if (code == SET)
3281 /* Don't count SET_DEST if it is a REG; otherwise count things
3282 in SET_DEST because if a register is partially modified, it won't
3283 show up as a potential movable so we don't care how USAGE is set
3285 if (GET_CODE (SET_DEST (x)) != REG)
3286 find_single_use_in_loop (insn, SET_DEST (x), usage);
3287 find_single_use_in_loop (insn, SET_SRC (x), usage);
3290 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3292 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3293 find_single_use_in_loop (insn, XEXP (x, i), usage);
3294 else if (fmt[i] == 'E')
3295 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3296 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3300 /* Count and record any set in X which is contained in INSN. Update
3301 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3304 count_one_set (insn, x, may_not_move, last_set)
3306 varray_type may_not_move;
3309 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3310 /* Don't move a reg that has an explicit clobber.
3311 It's not worth the pain to try to do it correctly. */
3312 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3314 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3316 rtx dest = SET_DEST (x);
3317 while (GET_CODE (dest) == SUBREG
3318 || GET_CODE (dest) == ZERO_EXTRACT
3319 || GET_CODE (dest) == SIGN_EXTRACT
3320 || GET_CODE (dest) == STRICT_LOW_PART)
3321 dest = XEXP (dest, 0);
3322 if (GET_CODE (dest) == REG)
3324 register int regno = REGNO (dest);
3325 /* If this is the first setting of this reg
3326 in current basic block, and it was set before,
3327 it must be set in two basic blocks, so it cannot
3328 be moved out of the loop. */
3329 if (VARRAY_INT (n_times_set, regno) > 0
3330 && last_set[regno] == 0)
3331 VARRAY_CHAR (may_not_move, regno) = 1;
3332 /* If this is not first setting in current basic block,
3333 see if reg was used in between previous one and this.
3334 If so, neither one can be moved. */
3335 if (last_set[regno] != 0
3336 && reg_used_between_p (dest, last_set[regno], insn))
3337 VARRAY_CHAR (may_not_move, regno) = 1;
3338 if (VARRAY_INT (n_times_set, regno) < 127)
3339 ++VARRAY_INT (n_times_set, regno);
3340 last_set[regno] = insn;
3345 /* Increment N_TIMES_SET at the index of each register
3346 that is modified by an insn between FROM and TO.
3347 If the value of an element of N_TIMES_SET becomes 127 or more,
3348 stop incrementing it, to avoid overflow.
3350 Store in SINGLE_USAGE[I] the single insn in which register I is
3351 used, if it is only used once. Otherwise, it is set to 0 (for no
3352 uses) or const0_rtx for more than one use. This parameter may be zero,
3353 in which case this processing is not done.
3355 Store in *COUNT_PTR the number of actual instruction
3356 in the loop. We use this to decide what is worth moving out. */
3358 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3359 In that case, it is the insn that last set reg n. */
3362 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3363 register rtx from, to;
3364 varray_type may_not_move;
3365 varray_type single_usage;
3369 register rtx *last_set = (rtx *) alloca (nregs * sizeof (rtx));
3371 register int count = 0;
3373 bzero ((char *) last_set, nregs * sizeof (rtx));
3374 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3376 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3380 /* If requested, record registers that have exactly one use. */
3383 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3385 /* Include uses in REG_EQUAL notes. */
3386 if (REG_NOTES (insn))
3387 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3390 if (GET_CODE (PATTERN (insn)) == SET
3391 || GET_CODE (PATTERN (insn)) == CLOBBER)
3392 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3393 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3396 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3397 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3398 may_not_move, last_set);
3402 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3403 bzero ((char *) last_set, nregs * sizeof (rtx));
3408 /* Given a loop that is bounded by LOOP_START and LOOP_END
3409 and that is entered at SCAN_START,
3410 return 1 if the register set in SET contained in insn INSN is used by
3411 any insn that precedes INSN in cyclic order starting
3412 from the loop entry point.
3414 We don't want to use INSN_LUID here because if we restrict INSN to those
3415 that have a valid INSN_LUID, it means we cannot move an invariant out
3416 from an inner loop past two loops. */
3419 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3420 rtx set, insn, loop_start, scan_start, loop_end;
3422 rtx reg = SET_DEST (set);
3425 /* Scan forward checking for register usage. If we hit INSN, we
3426 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3427 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3429 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3430 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3440 /* A "basic induction variable" or biv is a pseudo reg that is set
3441 (within this loop) only by incrementing or decrementing it. */
3442 /* A "general induction variable" or giv is a pseudo reg whose
3443 value is a linear function of a biv. */
3445 /* Bivs are recognized by `basic_induction_var';
3446 Givs by `general_induction_var'. */
3448 /* Indexed by register number, indicates whether or not register is an
3449 induction variable, and if so what type. */
3451 enum iv_mode *reg_iv_type;
3453 /* Indexed by register number, contains pointer to `struct induction'
3454 if register is an induction variable. This holds general info for
3455 all induction variables. */
3457 struct induction **reg_iv_info;
3459 /* Indexed by register number, contains pointer to `struct iv_class'
3460 if register is a basic induction variable. This holds info describing
3461 the class (a related group) of induction variables that the biv belongs
3464 struct iv_class **reg_biv_class;
3466 /* The head of a list which links together (via the next field)
3467 every iv class for the current loop. */
3469 struct iv_class *loop_iv_list;
3471 /* Communication with routines called via `note_stores'. */
3473 static rtx note_insn;
3475 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3477 static rtx addr_placeholder;
3479 /* ??? Unfinished optimizations, and possible future optimizations,
3480 for the strength reduction code. */
3482 /* ??? The interaction of biv elimination, and recognition of 'constant'
3483 bivs, may cause problems. */
3485 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3486 performance problems.
3488 Perhaps don't eliminate things that can be combined with an addressing
3489 mode. Find all givs that have the same biv, mult_val, and add_val;
3490 then for each giv, check to see if its only use dies in a following
3491 memory address. If so, generate a new memory address and check to see
3492 if it is valid. If it is valid, then store the modified memory address,
3493 otherwise, mark the giv as not done so that it will get its own iv. */
3495 /* ??? Could try to optimize branches when it is known that a biv is always
3498 /* ??? When replace a biv in a compare insn, we should replace with closest
3499 giv so that an optimized branch can still be recognized by the combiner,
3500 e.g. the VAX acb insn. */
3502 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3503 was rerun in loop_optimize whenever a register was added or moved.
3504 Also, some of the optimizations could be a little less conservative. */
3506 /* Perform strength reduction and induction variable elimination.
3508 Pseudo registers created during this function will be beyond the last
3509 valid index in several tables including n_times_set and regno_last_uid.
3510 This does not cause a problem here, because the added registers cannot be
3511 givs outside of their loop, and hence will never be reconsidered.
3512 But scan_loop must check regnos to make sure they are in bounds.
3514 SCAN_START is the first instruction in the loop, as the loop would
3515 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3516 the first instruction in the loop, as it is layed out in the
3517 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG. */
3520 strength_reduce (scan_start, end, loop_top, insn_count,
3521 loop_start, loop_end, unroll_p, bct_p)
3528 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3535 /* This is 1 if current insn is not executed at least once for every loop
3537 int not_every_iteration = 0;
3538 /* This is 1 if current insn may be executed more than once for every
3540 int maybe_multiple = 0;
3541 /* Temporary list pointers for traversing loop_iv_list. */
3542 struct iv_class *bl, **backbl;
3543 /* Ratio of extra register life span we can justify
3544 for saving an instruction. More if loop doesn't call subroutines
3545 since in that case saving an insn makes more difference
3546 and more registers are available. */
3547 /* ??? could set this to last value of threshold in move_movables */
3548 int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3549 /* Map of pseudo-register replacements. */
3553 rtx end_insert_before;
3555 struct loop_info loop_iteration_info;
3556 struct loop_info *loop_info = &loop_iteration_info;
3558 reg_iv_type = (enum iv_mode *) alloca (max_reg_before_loop
3559 * sizeof (enum iv_mode));
3560 bzero ((char *) reg_iv_type, max_reg_before_loop * sizeof (enum iv_mode));
3561 reg_iv_info = (struct induction **)
3562 alloca (max_reg_before_loop * sizeof (struct induction *));
3563 bzero ((char *) reg_iv_info, (max_reg_before_loop
3564 * sizeof (struct induction *)));
3565 reg_biv_class = (struct iv_class **)
3566 alloca (max_reg_before_loop * sizeof (struct iv_class *));
3567 bzero ((char *) reg_biv_class, (max_reg_before_loop
3568 * sizeof (struct iv_class *)));
3571 addr_placeholder = gen_reg_rtx (Pmode);
3573 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3574 must be put before this insn, so that they will appear in the right
3575 order (i.e. loop order).
3577 If loop_end is the end of the current function, then emit a
3578 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3580 if (NEXT_INSN (loop_end) != 0)
3581 end_insert_before = NEXT_INSN (loop_end);
3583 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3585 /* Scan through loop to find all possible bivs. */
3587 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
3589 p = next_insn_in_loop (p, scan_start, end, loop_top))
3591 if (GET_CODE (p) == INSN
3592 && (set = single_set (p))
3593 && GET_CODE (SET_DEST (set)) == REG)
3595 dest_reg = SET_DEST (set);
3596 if (REGNO (dest_reg) < max_reg_before_loop
3597 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3598 && reg_iv_type[REGNO (dest_reg)] != NOT_BASIC_INDUCT)
3600 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3601 dest_reg, p, &inc_val, &mult_val))
3603 /* It is a possible basic induction variable.
3604 Create and initialize an induction structure for it. */
3607 = (struct induction *) alloca (sizeof (struct induction));
3609 record_biv (v, p, dest_reg, inc_val, mult_val,
3610 not_every_iteration, maybe_multiple);
3611 reg_iv_type[REGNO (dest_reg)] = BASIC_INDUCT;
3613 else if (REGNO (dest_reg) < max_reg_before_loop)
3614 reg_iv_type[REGNO (dest_reg)] = NOT_BASIC_INDUCT;
3618 /* Past CODE_LABEL, we get to insns that may be executed multiple
3619 times. The only way we can be sure that they can't is if every
3620 jump insn between here and the end of the loop either
3621 returns, exits the loop, is a forward jump, or is a jump
3622 to the loop start. */
3624 if (GET_CODE (p) == CODE_LABEL)
3632 insn = NEXT_INSN (insn);
3633 if (insn == scan_start)
3641 if (insn == scan_start)
3645 if (GET_CODE (insn) == JUMP_INSN
3646 && GET_CODE (PATTERN (insn)) != RETURN
3647 && (! condjump_p (insn)
3648 || (JUMP_LABEL (insn) != 0
3649 && JUMP_LABEL (insn) != scan_start
3650 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
3651 || INSN_UID (insn) >= max_uid_for_loop
3652 || (INSN_LUID (JUMP_LABEL (insn))
3653 < INSN_LUID (insn))))))
3661 /* Past a jump, we get to insns for which we can't count
3662 on whether they will be executed during each iteration. */
3663 /* This code appears twice in strength_reduce. There is also similar
3664 code in scan_loop. */
3665 if (GET_CODE (p) == JUMP_INSN
3666 /* If we enter the loop in the middle, and scan around to the
3667 beginning, don't set not_every_iteration for that.
3668 This can be any kind of jump, since we want to know if insns
3669 will be executed if the loop is executed. */
3670 && ! (JUMP_LABEL (p) == loop_top
3671 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3672 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3676 /* If this is a jump outside the loop, then it also doesn't
3677 matter. Check to see if the target of this branch is on the
3678 loop_number_exits_labels list. */
3680 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3682 label = LABEL_NEXTREF (label))
3683 if (XEXP (label, 0) == JUMP_LABEL (p))
3687 not_every_iteration = 1;
3690 else if (GET_CODE (p) == NOTE)
3692 /* At the virtual top of a converted loop, insns are again known to
3693 be executed each iteration: logically, the loop begins here
3694 even though the exit code has been duplicated. */
3695 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3696 not_every_iteration = 0;
3697 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3699 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3703 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3704 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3705 or not an insn is known to be executed each iteration of the
3706 loop, whether or not any iterations are known to occur.
3708 Therefore, if we have just passed a label and have no more labels
3709 between here and the test insn of the loop, we know these insns
3710 will be executed each iteration. */
3712 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3713 && no_labels_between_p (p, loop_end))
3714 not_every_iteration = 0;
3717 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3718 Make a sanity check against n_times_set. */
3719 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3721 if (reg_iv_type[bl->regno] != BASIC_INDUCT
3722 /* Above happens if register modified by subreg, etc. */
3723 /* Make sure it is not recognized as a basic induction var: */
3724 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3725 /* If never incremented, it is invariant that we decided not to
3726 move. So leave it alone. */
3727 || ! bl->incremented)
3729 if (loop_dump_stream)
3730 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3732 (reg_iv_type[bl->regno] != BASIC_INDUCT
3733 ? "not induction variable"
3734 : (! bl->incremented ? "never incremented"
3737 reg_iv_type[bl->regno] = NOT_BASIC_INDUCT;
3744 if (loop_dump_stream)
3745 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3749 /* Exit if there are no bivs. */
3752 /* Can still unroll the loop anyways, but indicate that there is no
3753 strength reduction info available. */
3755 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
3761 /* Find initial value for each biv by searching backwards from loop_start,
3762 halting at first label. Also record any test condition. */
3765 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3769 if (GET_CODE (p) == CALL_INSN)
3772 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3773 || GET_CODE (p) == CALL_INSN)
3774 note_stores (PATTERN (p), record_initial);
3776 /* Record any test of a biv that branches around the loop if no store
3777 between it and the start of loop. We only care about tests with
3778 constants and registers and only certain of those. */
3779 if (GET_CODE (p) == JUMP_INSN
3780 && JUMP_LABEL (p) != 0
3781 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3782 && (test = get_condition_for_loop (p)) != 0
3783 && GET_CODE (XEXP (test, 0)) == REG
3784 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3785 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3786 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3787 && bl->init_insn == 0)
3789 /* If an NE test, we have an initial value! */
3790 if (GET_CODE (test) == NE)
3793 bl->init_set = gen_rtx_SET (VOIDmode,
3794 XEXP (test, 0), XEXP (test, 1));
3797 bl->initial_test = test;
3801 /* Look at the each biv and see if we can say anything better about its
3802 initial value from any initializing insns set up above. (This is done
3803 in two passes to avoid missing SETs in a PARALLEL.) */
3804 for (bl = loop_iv_list; bl; bl = bl->next)
3809 if (! bl->init_insn)
3812 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3813 is a constant, use the value of that. */
3814 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3815 && CONSTANT_P (XEXP (note, 0)))
3816 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3817 && CONSTANT_P (XEXP (note, 0))))
3818 src = XEXP (note, 0);
3820 src = SET_SRC (bl->init_set);
3822 if (loop_dump_stream)
3823 fprintf (loop_dump_stream,
3824 "Biv %d initialized at insn %d: initial value ",
3825 bl->regno, INSN_UID (bl->init_insn));
3827 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3828 || GET_MODE (src) == VOIDmode)
3829 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3831 bl->initial_value = src;
3833 if (loop_dump_stream)
3835 if (GET_CODE (src) == CONST_INT)
3837 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
3838 fputc ('\n', loop_dump_stream);
3842 print_rtl (loop_dump_stream, src);
3843 fprintf (loop_dump_stream, "\n");
3849 /* Biv initial value is not simple move,
3850 so let it keep initial value of "itself". */
3852 if (loop_dump_stream)
3853 fprintf (loop_dump_stream, "is complex\n");
3857 /* Search the loop for general induction variables. */
3859 /* A register is a giv if: it is only set once, it is a function of a
3860 biv and a constant (or invariant), and it is not a biv. */
3862 not_every_iteration = 0;
3868 /* At end of a straight-in loop, we are done.
3869 At end of a loop entered at the bottom, scan the top. */
3870 if (p == scan_start)
3878 if (p == scan_start)
3882 /* Look for a general induction variable in a register. */
3883 if (GET_CODE (p) == INSN
3884 && (set = single_set (p))
3885 && GET_CODE (SET_DEST (set)) == REG
3886 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
3894 dest_reg = SET_DEST (set);
3895 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
3898 if (/* SET_SRC is a giv. */
3899 (general_induction_var (SET_SRC (set), &src_reg, &add_val,
3900 &mult_val, 0, &benefit)
3901 /* Equivalent expression is a giv. */
3902 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
3903 && general_induction_var (XEXP (regnote, 0), &src_reg,
3904 &add_val, &mult_val, 0,
3906 /* Don't try to handle any regs made by loop optimization.
3907 We have nothing on them in regno_first_uid, etc. */
3908 && REGNO (dest_reg) < max_reg_before_loop
3909 /* Don't recognize a BASIC_INDUCT_VAR here. */
3910 && dest_reg != src_reg
3911 /* This must be the only place where the register is set. */
3912 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
3913 /* or all sets must be consecutive and make a giv. */
3914 || (benefit = consec_sets_giv (benefit, p,
3916 &add_val, &mult_val))))
3920 = (struct induction *) alloca (sizeof (struct induction));
3923 /* If this is a library call, increase benefit. */
3924 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
3925 benefit += libcall_benefit (p);
3927 /* Skip the consecutive insns, if there are any. */
3928 for (count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
3931 /* If first insn of libcall sequence, skip to end.
3932 Do this at start of loop, since INSN is guaranteed to
3934 if (GET_CODE (p) != NOTE
3935 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3938 do p = NEXT_INSN (p);
3939 while (GET_CODE (p) == NOTE);
3942 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
3943 DEST_REG, not_every_iteration, NULL_PTR, loop_start,
3949 #ifndef DONT_REDUCE_ADDR
3950 /* Look for givs which are memory addresses. */
3951 /* This resulted in worse code on a VAX 8600. I wonder if it
3953 if (GET_CODE (p) == INSN)
3954 find_mem_givs (PATTERN (p), p, not_every_iteration, loop_start,
3958 /* Update the status of whether giv can derive other givs. This can
3959 change when we pass a label or an insn that updates a biv. */
3960 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3961 || GET_CODE (p) == CODE_LABEL)
3962 update_giv_derive (p);
3964 /* Past a jump, we get to insns for which we can't count
3965 on whether they will be executed during each iteration. */
3966 /* This code appears twice in strength_reduce. There is also similar
3967 code in scan_loop. */
3968 if (GET_CODE (p) == JUMP_INSN
3969 /* If we enter the loop in the middle, and scan around to the
3970 beginning, don't set not_every_iteration for that.
3971 This can be any kind of jump, since we want to know if insns
3972 will be executed if the loop is executed. */
3973 && ! (JUMP_LABEL (p) == loop_top
3974 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3975 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3979 /* If this is a jump outside the loop, then it also doesn't
3980 matter. Check to see if the target of this branch is on the
3981 loop_number_exits_labels list. */
3983 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3985 label = LABEL_NEXTREF (label))
3986 if (XEXP (label, 0) == JUMP_LABEL (p))
3990 not_every_iteration = 1;
3993 else if (GET_CODE (p) == NOTE)
3995 /* At the virtual top of a converted loop, insns are again known to
3996 be executed each iteration: logically, the loop begins here
3997 even though the exit code has been duplicated. */
3998 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3999 not_every_iteration = 0;
4000 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4002 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4006 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4007 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4008 or not an insn is known to be executed each iteration of the
4009 loop, whether or not any iterations are known to occur.
4011 Therefore, if we have just passed a label and have no more labels
4012 between here and the test insn of the loop, we know these insns
4013 will be executed each iteration. */
4015 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4016 && no_labels_between_p (p, loop_end))
4017 not_every_iteration = 0;
4020 /* Try to calculate and save the number of loop iterations. This is
4021 set to zero if the actual number can not be calculated. This must
4022 be called after all giv's have been identified, since otherwise it may
4023 fail if the iteration variable is a giv. */
4025 loop_iterations (loop_start, loop_end, loop_info);
4027 /* Now for each giv for which we still don't know whether or not it is
4028 replaceable, check to see if it is replaceable because its final value
4029 can be calculated. This must be done after loop_iterations is called,
4030 so that final_giv_value will work correctly. */
4032 for (bl = loop_iv_list; bl; bl = bl->next)
4034 struct induction *v;
4036 for (v = bl->giv; v; v = v->next_iv)
4037 if (! v->replaceable && ! v->not_replaceable)
4038 check_final_value (v, loop_start, loop_end, loop_info->n_iterations);
4041 /* Try to prove that the loop counter variable (if any) is always
4042 nonnegative; if so, record that fact with a REG_NONNEG note
4043 so that "decrement and branch until zero" insn can be used. */
4044 check_dbra_loop (loop_end, insn_count, loop_start, loop_info);
4046 /* Create reg_map to hold substitutions for replaceable giv regs. */
4047 reg_map = (rtx *) alloca (max_reg_before_loop * sizeof (rtx));
4048 bzero ((char *) reg_map, max_reg_before_loop * sizeof (rtx));
4050 /* Examine each iv class for feasibility of strength reduction/induction
4051 variable elimination. */
4053 for (bl = loop_iv_list; bl; bl = bl->next)
4055 struct induction *v;
4058 rtx final_value = 0;
4060 /* Test whether it will be possible to eliminate this biv
4061 provided all givs are reduced. This is possible if either
4062 the reg is not used outside the loop, or we can compute
4063 what its final value will be.
4065 For architectures with a decrement_and_branch_until_zero insn,
4066 don't do this if we put a REG_NONNEG note on the endtest for
4069 /* Compare against bl->init_insn rather than loop_start.
4070 We aren't concerned with any uses of the biv between
4071 init_insn and loop_start since these won't be affected
4072 by the value of the biv elsewhere in the function, so
4073 long as init_insn doesn't use the biv itself.
4074 March 14, 1989 -- self@bayes.arc.nasa.gov */
4076 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4078 && INSN_UID (bl->init_insn) < max_uid_for_loop
4079 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4080 #ifdef HAVE_decrement_and_branch_until_zero
4083 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4084 || ((final_value = final_biv_value (bl, loop_start, loop_end,
4085 loop_info->n_iterations))
4086 #ifdef HAVE_decrement_and_branch_until_zero
4090 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
4091 threshold, insn_count);
4094 if (loop_dump_stream)
4096 fprintf (loop_dump_stream,
4097 "Cannot eliminate biv %d.\n",
4099 fprintf (loop_dump_stream,
4100 "First use: insn %d, last use: insn %d.\n",
4101 REGNO_FIRST_UID (bl->regno),
4102 REGNO_LAST_UID (bl->regno));
4106 /* Combine all giv's for this iv_class. */
4109 /* This will be true at the end, if all givs which depend on this
4110 biv have been strength reduced.
4111 We can't (currently) eliminate the biv unless this is so. */
4114 /* Check each giv in this class to see if we will benefit by reducing
4115 it. Skip giv's combined with others. */
4116 for (v = bl->giv; v; v = v->next_iv)
4118 struct induction *tv;
4120 if (v->ignore || v->same)
4123 benefit = v->benefit;
4125 /* Reduce benefit if not replaceable, since we will insert
4126 a move-insn to replace the insn that calculates this giv.
4127 Don't do this unless the giv is a user variable, since it
4128 will often be marked non-replaceable because of the duplication
4129 of the exit code outside the loop. In such a case, the copies
4130 we insert are dead and will be deleted. So they don't have
4131 a cost. Similar situations exist. */
4132 /* ??? The new final_[bg]iv_value code does a much better job
4133 of finding replaceable giv's, and hence this code may no longer
4135 if (! v->replaceable && ! bl->eliminable
4136 && REG_USERVAR_P (v->dest_reg))
4137 benefit -= copy_cost;
4139 /* Decrease the benefit to count the add-insns that we will
4140 insert to increment the reduced reg for the giv. */
4141 benefit -= add_cost * bl->biv_count;
4143 /* Decide whether to strength-reduce this giv or to leave the code
4144 unchanged (recompute it from the biv each time it is used).
4145 This decision can be made independently for each giv. */
4148 /* Attempt to guess whether autoincrement will handle some of the
4149 new add insns; if so, increase BENEFIT (undo the subtraction of
4150 add_cost that was done above). */
4151 if (v->giv_type == DEST_ADDR
4152 && GET_CODE (v->mult_val) == CONST_INT)
4154 if (HAVE_POST_INCREMENT
4155 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4156 benefit += add_cost * bl->biv_count;
4157 else if (HAVE_PRE_INCREMENT
4158 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4159 benefit += add_cost * bl->biv_count;
4160 else if (HAVE_POST_DECREMENT
4161 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4162 benefit += add_cost * bl->biv_count;
4163 else if (HAVE_PRE_DECREMENT
4164 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4165 benefit += add_cost * bl->biv_count;
4169 /* If an insn is not to be strength reduced, then set its ignore
4170 flag, and clear all_reduced. */
4172 /* A giv that depends on a reversed biv must be reduced if it is
4173 used after the loop exit, otherwise, it would have the wrong
4174 value after the loop exit. To make it simple, just reduce all
4175 of such giv's whether or not we know they are used after the loop
4178 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4181 if (loop_dump_stream)
4182 fprintf (loop_dump_stream,
4183 "giv of insn %d not worth while, %d vs %d.\n",
4185 v->lifetime * threshold * benefit, insn_count);
4191 /* Check that we can increment the reduced giv without a
4192 multiply insn. If not, reject it. */
4194 for (tv = bl->biv; tv; tv = tv->next_iv)
4195 if (tv->mult_val == const1_rtx
4196 && ! product_cheap_p (tv->add_val, v->mult_val))
4198 if (loop_dump_stream)
4199 fprintf (loop_dump_stream,
4200 "giv of insn %d: would need a multiply.\n",
4201 INSN_UID (v->insn));
4209 /* Reduce each giv that we decided to reduce. */
4211 for (v = bl->giv; v; v = v->next_iv)
4213 struct induction *tv;
4214 if (! v->ignore && v->same == 0)
4216 int auto_inc_opt = 0;
4218 v->new_reg = gen_reg_rtx (v->mode);
4221 /* If the target has auto-increment addressing modes, and
4222 this is an address giv, then try to put the increment
4223 immediately after its use, so that flow can create an
4224 auto-increment addressing mode. */
4225 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4226 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4227 /* We don't handle reversed biv's because bl->biv->insn
4228 does not have a valid INSN_LUID. */
4230 && v->always_executed && ! v->maybe_multiple
4231 && INSN_UID (v->insn) < max_uid_for_loop)
4233 /* If other giv's have been combined with this one, then
4234 this will work only if all uses of the other giv's occur
4235 before this giv's insn. This is difficult to check.
4237 We simplify this by looking for the common case where
4238 there is one DEST_REG giv, and this giv's insn is the
4239 last use of the dest_reg of that DEST_REG giv. If the
4240 increment occurs after the address giv, then we can
4241 perform the optimization. (Otherwise, the increment
4242 would have to go before other_giv, and we would not be
4243 able to combine it with the address giv to get an
4244 auto-inc address.) */
4245 if (v->combined_with)
4247 struct induction *other_giv = 0;
4249 for (tv = bl->giv; tv; tv = tv->next_iv)
4257 if (! tv && other_giv
4258 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4259 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4260 == INSN_UID (v->insn))
4261 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4264 /* Check for case where increment is before the address
4265 giv. Do this test in "loop order". */
4266 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4267 && (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4268 || (INSN_LUID (bl->biv->insn)
4269 > INSN_LUID (scan_start))))
4270 || (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4271 && (INSN_LUID (scan_start)
4272 < INSN_LUID (bl->biv->insn))))
4281 /* We can't put an insn immediately after one setting
4282 cc0, or immediately before one using cc0. */
4283 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4284 || (auto_inc_opt == -1
4285 && (prev = prev_nonnote_insn (v->insn)) != 0
4286 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4287 && sets_cc0_p (PATTERN (prev))))
4293 v->auto_inc_opt = 1;
4297 /* For each place where the biv is incremented, add an insn
4298 to increment the new, reduced reg for the giv. */
4299 for (tv = bl->biv; tv; tv = tv->next_iv)
4304 insert_before = tv->insn;
4305 else if (auto_inc_opt == 1)
4306 insert_before = NEXT_INSN (v->insn);
4308 insert_before = v->insn;
4310 if (tv->mult_val == const1_rtx)
4311 emit_iv_add_mult (tv->add_val, v->mult_val,
4312 v->new_reg, v->new_reg, insert_before);
4313 else /* tv->mult_val == const0_rtx */
4314 /* A multiply is acceptable here
4315 since this is presumed to be seldom executed. */
4316 emit_iv_add_mult (tv->add_val, v->mult_val,
4317 v->add_val, v->new_reg, insert_before);
4320 /* Add code at loop start to initialize giv's reduced reg. */
4322 emit_iv_add_mult (bl->initial_value, v->mult_val,
4323 v->add_val, v->new_reg, loop_start);
4327 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4330 For each giv register that can be reduced now: if replaceable,
4331 substitute reduced reg wherever the old giv occurs;
4332 else add new move insn "giv_reg = reduced_reg".
4334 Also check for givs whose first use is their definition and whose
4335 last use is the definition of another giv. If so, it is likely
4336 dead and should not be used to eliminate a biv. */
4337 for (v = bl->giv; v; v = v->next_iv)
4339 if (v->same && v->same->ignore)
4345 if (v->giv_type == DEST_REG
4346 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4348 struct induction *v1;
4350 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4351 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4355 /* Update expression if this was combined, in case other giv was
4358 v->new_reg = replace_rtx (v->new_reg,
4359 v->same->dest_reg, v->same->new_reg);
4361 if (v->giv_type == DEST_ADDR)
4362 /* Store reduced reg as the address in the memref where we found
4364 validate_change (v->insn, v->location, v->new_reg, 0);
4365 else if (v->replaceable)
4367 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4370 /* I can no longer duplicate the original problem. Perhaps
4371 this is unnecessary now? */
4373 /* Replaceable; it isn't strictly necessary to delete the old
4374 insn and emit a new one, because v->dest_reg is now dead.
4376 However, especially when unrolling loops, the special
4377 handling for (set REG0 REG1) in the second cse pass may
4378 make v->dest_reg live again. To avoid this problem, emit
4379 an insn to set the original giv reg from the reduced giv.
4380 We can not delete the original insn, since it may be part
4381 of a LIBCALL, and the code in flow that eliminates dead
4382 libcalls will fail if it is deleted. */
4383 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4389 /* Not replaceable; emit an insn to set the original giv reg from
4390 the reduced giv, same as above. */
4391 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4395 /* When a loop is reversed, givs which depend on the reversed
4396 biv, and which are live outside the loop, must be set to their
4397 correct final value. This insn is only needed if the giv is
4398 not replaceable. The correct final value is the same as the
4399 value that the giv starts the reversed loop with. */
4400 if (bl->reversed && ! v->replaceable)
4401 emit_iv_add_mult (bl->initial_value, v->mult_val,
4402 v->add_val, v->dest_reg, end_insert_before);
4403 else if (v->final_value)
4407 /* If the loop has multiple exits, emit the insn before the
4408 loop to ensure that it will always be executed no matter
4409 how the loop exits. Otherwise, emit the insn after the loop,
4410 since this is slightly more efficient. */
4411 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4412 insert_before = loop_start;
4414 insert_before = end_insert_before;
4415 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4419 /* If the insn to set the final value of the giv was emitted
4420 before the loop, then we must delete the insn inside the loop
4421 that sets it. If this is a LIBCALL, then we must delete
4422 every insn in the libcall. Note, however, that
4423 final_giv_value will only succeed when there are multiple
4424 exits if the giv is dead at each exit, hence it does not
4425 matter that the original insn remains because it is dead
4427 /* Delete the insn inside the loop that sets the giv since
4428 the giv is now set before (or after) the loop. */
4429 delete_insn (v->insn);
4433 if (loop_dump_stream)
4435 fprintf (loop_dump_stream, "giv at %d reduced to ",
4436 INSN_UID (v->insn));
4437 print_rtl (loop_dump_stream, v->new_reg);
4438 fprintf (loop_dump_stream, "\n");
4442 /* All the givs based on the biv bl have been reduced if they
4445 /* For each giv not marked as maybe dead that has been combined with a
4446 second giv, clear any "maybe dead" mark on that second giv.
4447 v->new_reg will either be or refer to the register of the giv it
4450 Doing this clearing avoids problems in biv elimination where a
4451 giv's new_reg is a complex value that can't be put in the insn but
4452 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4453 Since the register will be used in either case, we'd prefer it be
4454 used from the simpler giv. */
4456 for (v = bl->giv; v; v = v->next_iv)
4457 if (! v->maybe_dead && v->same)
4458 v->same->maybe_dead = 0;
4460 /* Try to eliminate the biv, if it is a candidate.
4461 This won't work if ! all_reduced,
4462 since the givs we planned to use might not have been reduced.
4464 We have to be careful that we didn't initially think we could eliminate
4465 this biv because of a giv that we now think may be dead and shouldn't
4466 be used as a biv replacement.
4468 Also, there is the possibility that we may have a giv that looks
4469 like it can be used to eliminate a biv, but the resulting insn
4470 isn't valid. This can happen, for example, on the 88k, where a
4471 JUMP_INSN can compare a register only with zero. Attempts to
4472 replace it with a compare with a constant will fail.
4474 Note that in cases where this call fails, we may have replaced some
4475 of the occurrences of the biv with a giv, but no harm was done in
4476 doing so in the rare cases where it can occur. */
4478 if (all_reduced == 1 && bl->eliminable
4479 && maybe_eliminate_biv (bl, loop_start, end, 1,
4480 threshold, insn_count))
4483 /* ?? If we created a new test to bypass the loop entirely,
4484 or otherwise drop straight in, based on this test, then
4485 we might want to rewrite it also. This way some later
4486 pass has more hope of removing the initialization of this
4489 /* If final_value != 0, then the biv may be used after loop end
4490 and we must emit an insn to set it just in case.
4492 Reversed bivs already have an insn after the loop setting their
4493 value, so we don't need another one. We can't calculate the
4494 proper final value for such a biv here anyways. */
4495 if (final_value != 0 && ! bl->reversed)
4499 /* If the loop has multiple exits, emit the insn before the
4500 loop to ensure that it will always be executed no matter
4501 how the loop exits. Otherwise, emit the insn after the
4502 loop, since this is slightly more efficient. */
4503 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4504 insert_before = loop_start;
4506 insert_before = end_insert_before;
4508 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4513 /* Delete all of the instructions inside the loop which set
4514 the biv, as they are all dead. If is safe to delete them,
4515 because an insn setting a biv will never be part of a libcall. */
4516 /* However, deleting them will invalidate the regno_last_uid info,
4517 so keeping them around is more convenient. Final_biv_value
4518 will only succeed when there are multiple exits if the biv
4519 is dead at each exit, hence it does not matter that the original
4520 insn remains, because it is dead anyways. */
4521 for (v = bl->biv; v; v = v->next_iv)
4522 delete_insn (v->insn);
4525 if (loop_dump_stream)
4526 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4531 /* Go through all the instructions in the loop, making all the
4532 register substitutions scheduled in REG_MAP. */
4534 for (p = loop_start; p != end; p = NEXT_INSN (p))
4535 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4536 || GET_CODE (p) == CALL_INSN)
4538 replace_regs (PATTERN (p), reg_map, max_reg_before_loop, 0);
4539 replace_regs (REG_NOTES (p), reg_map, max_reg_before_loop, 0);
4543 /* Unroll loops from within strength reduction so that we can use the
4544 induction variable information that strength_reduce has already
4548 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
4551 #ifdef HAVE_decrement_and_branch_on_count
4552 /* Instrument the loop with BCT insn. */
4553 if (HAVE_decrement_and_branch_on_count && bct_p
4554 && flag_branch_on_count_reg)
4555 insert_bct (loop_start, loop_end, loop_info);
4556 #endif /* HAVE_decrement_and_branch_on_count */
4558 if (loop_dump_stream)
4559 fprintf (loop_dump_stream, "\n");
4562 /* Return 1 if X is a valid source for an initial value (or as value being
4563 compared against in an initial test).
4565 X must be either a register or constant and must not be clobbered between
4566 the current insn and the start of the loop.
4568 INSN is the insn containing X. */
4571 valid_initial_value_p (x, insn, call_seen, loop_start)
4580 /* Only consider pseudos we know about initialized in insns whose luids
4582 if (GET_CODE (x) != REG
4583 || REGNO (x) >= max_reg_before_loop)
4586 /* Don't use call-clobbered registers across a call which clobbers it. On
4587 some machines, don't use any hard registers at all. */
4588 if (REGNO (x) < FIRST_PSEUDO_REGISTER
4589 && (SMALL_REGISTER_CLASSES
4590 || (call_used_regs[REGNO (x)] && call_seen)))
4593 /* Don't use registers that have been clobbered before the start of the
4595 if (reg_set_between_p (x, insn, loop_start))
4601 /* Scan X for memory refs and check each memory address
4602 as a possible giv. INSN is the insn whose pattern X comes from.
4603 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4604 every loop iteration. */
4607 find_mem_givs (x, insn, not_every_iteration, loop_start, loop_end)
4610 int not_every_iteration;
4611 rtx loop_start, loop_end;
4614 register enum rtx_code code;
4620 code = GET_CODE (x);
4644 /* This code used to disable creating GIVs with mult_val == 1 and
4645 add_val == 0. However, this leads to lost optimizations when
4646 it comes time to combine a set of related DEST_ADDR GIVs, since
4647 this one would not be seen. */
4649 if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
4650 &mult_val, 1, &benefit))
4652 /* Found one; record it. */
4654 = (struct induction *) oballoc (sizeof (struct induction));
4656 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
4657 add_val, benefit, DEST_ADDR, not_every_iteration,
4658 &XEXP (x, 0), loop_start, loop_end);
4660 v->mem_mode = GET_MODE (x);
4669 /* Recursively scan the subexpressions for other mem refs. */
4671 fmt = GET_RTX_FORMAT (code);
4672 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4674 find_mem_givs (XEXP (x, i), insn, not_every_iteration, loop_start,
4676 else if (fmt[i] == 'E')
4677 for (j = 0; j < XVECLEN (x, i); j++)
4678 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
4679 loop_start, loop_end);
4682 /* Fill in the data about one biv update.
4683 V is the `struct induction' in which we record the biv. (It is
4684 allocated by the caller, with alloca.)
4685 INSN is the insn that sets it.
4686 DEST_REG is the biv's reg.
4688 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4689 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4690 being set to INC_VAL.
4692 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4693 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4694 can be executed more than once per iteration. If MAYBE_MULTIPLE
4695 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4696 executed exactly once per iteration. */
4699 record_biv (v, insn, dest_reg, inc_val, mult_val,
4700 not_every_iteration, maybe_multiple)
4701 struct induction *v;
4706 int not_every_iteration;
4709 struct iv_class *bl;
4712 v->src_reg = dest_reg;
4713 v->dest_reg = dest_reg;
4714 v->mult_val = mult_val;
4715 v->add_val = inc_val;
4716 v->mode = GET_MODE (dest_reg);
4717 v->always_computable = ! not_every_iteration;
4718 v->always_executed = ! not_every_iteration;
4719 v->maybe_multiple = maybe_multiple;
4721 /* Add this to the reg's iv_class, creating a class
4722 if this is the first incrementation of the reg. */
4724 bl = reg_biv_class[REGNO (dest_reg)];
4727 /* Create and initialize new iv_class. */
4729 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
4731 bl->regno = REGNO (dest_reg);
4737 /* Set initial value to the reg itself. */
4738 bl->initial_value = dest_reg;
4739 /* We haven't seen the initializing insn yet */
4742 bl->initial_test = 0;
4743 bl->incremented = 0;
4747 bl->total_benefit = 0;
4749 /* Add this class to loop_iv_list. */
4750 bl->next = loop_iv_list;
4753 /* Put it in the array of biv register classes. */
4754 reg_biv_class[REGNO (dest_reg)] = bl;
4757 /* Update IV_CLASS entry for this biv. */
4758 v->next_iv = bl->biv;
4761 if (mult_val == const1_rtx)
4762 bl->incremented = 1;
4764 if (loop_dump_stream)
4766 fprintf (loop_dump_stream,
4767 "Insn %d: possible biv, reg %d,",
4768 INSN_UID (insn), REGNO (dest_reg));
4769 if (GET_CODE (inc_val) == CONST_INT)
4771 fprintf (loop_dump_stream, " const =");
4772 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
4773 fputc ('\n', loop_dump_stream);
4777 fprintf (loop_dump_stream, " const = ");
4778 print_rtl (loop_dump_stream, inc_val);
4779 fprintf (loop_dump_stream, "\n");
4784 /* Fill in the data about one giv.
4785 V is the `struct induction' in which we record the giv. (It is
4786 allocated by the caller, with alloca.)
4787 INSN is the insn that sets it.
4788 BENEFIT estimates the savings from deleting this insn.
4789 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4790 into a register or is used as a memory address.
4792 SRC_REG is the biv reg which the giv is computed from.
4793 DEST_REG is the giv's reg (if the giv is stored in a reg).
4794 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4795 LOCATION points to the place where this giv's value appears in INSN. */
4798 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
4799 type, not_every_iteration, location, loop_start, loop_end)
4800 struct induction *v;
4804 rtx mult_val, add_val;
4807 int not_every_iteration;
4809 rtx loop_start, loop_end;
4811 struct induction *b;
4812 struct iv_class *bl;
4813 rtx set = single_set (insn);
4816 v->src_reg = src_reg;
4818 v->dest_reg = dest_reg;
4819 v->mult_val = mult_val;
4820 v->add_val = add_val;
4821 v->benefit = benefit;
4822 v->location = location;
4824 v->combined_with = 0;
4825 v->maybe_multiple = 0;
4827 v->derive_adjustment = 0;
4833 v->auto_inc_opt = 0;
4837 /* The v->always_computable field is used in update_giv_derive, to
4838 determine whether a giv can be used to derive another giv. For a
4839 DEST_REG giv, INSN computes a new value for the giv, so its value
4840 isn't computable if INSN insn't executed every iteration.
4841 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4842 it does not compute a new value. Hence the value is always computable
4843 regardless of whether INSN is executed each iteration. */
4845 if (type == DEST_ADDR)
4846 v->always_computable = 1;
4848 v->always_computable = ! not_every_iteration;
4850 v->always_executed = ! not_every_iteration;
4852 if (type == DEST_ADDR)
4854 v->mode = GET_MODE (*location);
4858 else /* type == DEST_REG */
4860 v->mode = GET_MODE (SET_DEST (set));
4862 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
4863 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
4865 v->times_used = VARRAY_INT (n_times_used, REGNO (dest_reg));
4867 /* If the lifetime is zero, it means that this register is
4868 really a dead store. So mark this as a giv that can be
4869 ignored. This will not prevent the biv from being eliminated. */
4870 if (v->lifetime == 0)
4873 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
4874 reg_iv_info[REGNO (dest_reg)] = v;
4877 /* Add the giv to the class of givs computed from one biv. */
4879 bl = reg_biv_class[REGNO (src_reg)];
4882 v->next_iv = bl->giv;
4884 /* Don't count DEST_ADDR. This is supposed to count the number of
4885 insns that calculate givs. */
4886 if (type == DEST_REG)
4888 bl->total_benefit += benefit;
4891 /* Fatal error, biv missing for this giv? */
4894 if (type == DEST_ADDR)
4898 /* The giv can be replaced outright by the reduced register only if all
4899 of the following conditions are true:
4900 - the insn that sets the giv is always executed on any iteration
4901 on which the giv is used at all
4902 (there are two ways to deduce this:
4903 either the insn is executed on every iteration,
4904 or all uses follow that insn in the same basic block),
4905 - the giv is not used outside the loop
4906 - no assignments to the biv occur during the giv's lifetime. */
4908 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
4909 /* Previous line always fails if INSN was moved by loop opt. */
4910 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
4911 && (! not_every_iteration
4912 || last_use_this_basic_block (dest_reg, insn)))
4914 /* Now check that there are no assignments to the biv within the
4915 giv's lifetime. This requires two separate checks. */
4917 /* Check each biv update, and fail if any are between the first
4918 and last use of the giv.
4920 If this loop contains an inner loop that was unrolled, then
4921 the insn modifying the biv may have been emitted by the loop
4922 unrolling code, and hence does not have a valid luid. Just
4923 mark the biv as not replaceable in this case. It is not very
4924 useful as a biv, because it is used in two different loops.
4925 It is very unlikely that we would be able to optimize the giv
4926 using this biv anyways. */
4929 for (b = bl->biv; b; b = b->next_iv)
4931 if (INSN_UID (b->insn) >= max_uid_for_loop
4932 || ((uid_luid[INSN_UID (b->insn)]
4933 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
4934 && (uid_luid[INSN_UID (b->insn)]
4935 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
4938 v->not_replaceable = 1;
4943 /* If there are any backwards branches that go from after the
4944 biv update to before it, then this giv is not replaceable. */
4946 for (b = bl->biv; b; b = b->next_iv)
4947 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
4950 v->not_replaceable = 1;
4956 /* May still be replaceable, we don't have enough info here to
4959 v->not_replaceable = 0;
4963 /* Record whether the add_val contains a const_int, for later use by
4968 v->no_const_addval = 1;
4969 if (tem == const0_rtx)
4971 else if (GET_CODE (tem) == CONST_INT)
4972 v->no_const_addval = 0;
4973 else if (GET_CODE (tem) == PLUS)
4977 if (GET_CODE (XEXP (tem, 0)) == PLUS)
4978 tem = XEXP (tem, 0);
4979 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
4980 tem = XEXP (tem, 1);
4984 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
4985 v->no_const_addval = 0;
4989 if (loop_dump_stream)
4991 if (type == DEST_REG)
4992 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
4993 INSN_UID (insn), REGNO (dest_reg));
4995 fprintf (loop_dump_stream, "Insn %d: dest address",
4998 fprintf (loop_dump_stream, " src reg %d benefit %d",
4999 REGNO (src_reg), v->benefit);
5000 fprintf (loop_dump_stream, " used %d lifetime %d",
5001 v->times_used, v->lifetime);
5004 fprintf (loop_dump_stream, " replaceable");
5006 if (v->no_const_addval)
5007 fprintf (loop_dump_stream, " ncav");
5009 if (GET_CODE (mult_val) == CONST_INT)
5011 fprintf (loop_dump_stream, " mult ");
5012 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5016 fprintf (loop_dump_stream, " mult ");
5017 print_rtl (loop_dump_stream, mult_val);
5020 if (GET_CODE (add_val) == CONST_INT)
5022 fprintf (loop_dump_stream, " add ");
5023 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5027 fprintf (loop_dump_stream, " add ");
5028 print_rtl (loop_dump_stream, add_val);
5032 if (loop_dump_stream)
5033 fprintf (loop_dump_stream, "\n");
5038 /* All this does is determine whether a giv can be made replaceable because
5039 its final value can be calculated. This code can not be part of record_giv
5040 above, because final_giv_value requires that the number of loop iterations
5041 be known, and that can not be accurately calculated until after all givs
5042 have been identified. */
5045 check_final_value (v, loop_start, loop_end, n_iterations)
5046 struct induction *v;
5047 rtx loop_start, loop_end;
5048 unsigned HOST_WIDE_INT n_iterations;
5050 struct iv_class *bl;
5051 rtx final_value = 0;
5053 bl = reg_biv_class[REGNO (v->src_reg)];
5055 /* DEST_ADDR givs will never reach here, because they are always marked
5056 replaceable above in record_giv. */
5058 /* The giv can be replaced outright by the reduced register only if all
5059 of the following conditions are true:
5060 - the insn that sets the giv is always executed on any iteration
5061 on which the giv is used at all
5062 (there are two ways to deduce this:
5063 either the insn is executed on every iteration,
5064 or all uses follow that insn in the same basic block),
5065 - its final value can be calculated (this condition is different
5066 than the one above in record_giv)
5067 - no assignments to the biv occur during the giv's lifetime. */
5070 /* This is only called now when replaceable is known to be false. */
5071 /* Clear replaceable, so that it won't confuse final_giv_value. */
5075 if ((final_value = final_giv_value (v, loop_start, loop_end, n_iterations))
5076 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5078 int biv_increment_seen = 0;
5084 /* When trying to determine whether or not a biv increment occurs
5085 during the lifetime of the giv, we can ignore uses of the variable
5086 outside the loop because final_value is true. Hence we can not
5087 use regno_last_uid and regno_first_uid as above in record_giv. */
5089 /* Search the loop to determine whether any assignments to the
5090 biv occur during the giv's lifetime. Start with the insn
5091 that sets the giv, and search around the loop until we come
5092 back to that insn again.
5094 Also fail if there is a jump within the giv's lifetime that jumps
5095 to somewhere outside the lifetime but still within the loop. This
5096 catches spaghetti code where the execution order is not linear, and
5097 hence the above test fails. Here we assume that the giv lifetime
5098 does not extend from one iteration of the loop to the next, so as
5099 to make the test easier. Since the lifetime isn't known yet,
5100 this requires two loops. See also record_giv above. */
5102 last_giv_use = v->insn;
5108 p = NEXT_INSN (loop_start);
5112 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5113 || GET_CODE (p) == CALL_INSN)
5115 if (biv_increment_seen)
5117 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5120 v->not_replaceable = 1;
5124 else if (reg_set_p (v->src_reg, PATTERN (p)))
5125 biv_increment_seen = 1;
5126 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5131 /* Now that the lifetime of the giv is known, check for branches
5132 from within the lifetime to outside the lifetime if it is still
5142 p = NEXT_INSN (loop_start);
5143 if (p == last_giv_use)
5146 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5147 && LABEL_NAME (JUMP_LABEL (p))
5148 && ((INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop)
5149 || (INSN_UID (v->insn) >= max_uid_for_loop)
5150 || (INSN_UID (last_giv_use) >= max_uid_for_loop)
5151 || (INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (v->insn)
5152 && INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop_start))
5153 || (INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (last_giv_use)
5154 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop_end))))
5157 v->not_replaceable = 1;
5159 if (loop_dump_stream)
5160 fprintf (loop_dump_stream,
5161 "Found branch outside giv lifetime.\n");
5168 /* If it is replaceable, then save the final value. */
5170 v->final_value = final_value;
5173 if (loop_dump_stream && v->replaceable)
5174 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5175 INSN_UID (v->insn), REGNO (v->dest_reg));
5178 /* Update the status of whether a giv can derive other givs.
5180 We need to do something special if there is or may be an update to the biv
5181 between the time the giv is defined and the time it is used to derive
5184 In addition, a giv that is only conditionally set is not allowed to
5185 derive another giv once a label has been passed.
5187 The cases we look at are when a label or an update to a biv is passed. */
5190 update_giv_derive (p)
5193 struct iv_class *bl;
5194 struct induction *biv, *giv;
5198 /* Search all IV classes, then all bivs, and finally all givs.
5200 There are three cases we are concerned with. First we have the situation
5201 of a giv that is only updated conditionally. In that case, it may not
5202 derive any givs after a label is passed.
5204 The second case is when a biv update occurs, or may occur, after the
5205 definition of a giv. For certain biv updates (see below) that are
5206 known to occur between the giv definition and use, we can adjust the
5207 giv definition. For others, or when the biv update is conditional,
5208 we must prevent the giv from deriving any other givs. There are two
5209 sub-cases within this case.
5211 If this is a label, we are concerned with any biv update that is done
5212 conditionally, since it may be done after the giv is defined followed by
5213 a branch here (actually, we need to pass both a jump and a label, but
5214 this extra tracking doesn't seem worth it).
5216 If this is a jump, we are concerned about any biv update that may be
5217 executed multiple times. We are actually only concerned about
5218 backward jumps, but it is probably not worth performing the test
5219 on the jump again here.
5221 If this is a biv update, we must adjust the giv status to show that a
5222 subsequent biv update was performed. If this adjustment cannot be done,
5223 the giv cannot derive further givs. */
5225 for (bl = loop_iv_list; bl; bl = bl->next)
5226 for (biv = bl->biv; biv; biv = biv->next_iv)
5227 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5230 for (giv = bl->giv; giv; giv = giv->next_iv)
5232 /* If cant_derive is already true, there is no point in
5233 checking all of these conditions again. */
5234 if (giv->cant_derive)
5237 /* If this giv is conditionally set and we have passed a label,
5238 it cannot derive anything. */
5239 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5240 giv->cant_derive = 1;
5242 /* Skip givs that have mult_val == 0, since
5243 they are really invariants. Also skip those that are
5244 replaceable, since we know their lifetime doesn't contain
5246 else if (giv->mult_val == const0_rtx || giv->replaceable)
5249 /* The only way we can allow this giv to derive another
5250 is if this is a biv increment and we can form the product
5251 of biv->add_val and giv->mult_val. In this case, we will
5252 be able to compute a compensation. */
5253 else if (biv->insn == p)
5257 if (biv->mult_val == const1_rtx)
5258 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
5263 if (tem && giv->derive_adjustment)
5264 tem = simplify_giv_expr (gen_rtx_PLUS (giv->mode, tem,
5265 giv->derive_adjustment),
5268 giv->derive_adjustment = tem;
5270 giv->cant_derive = 1;
5272 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5273 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5274 giv->cant_derive = 1;
5279 /* Check whether an insn is an increment legitimate for a basic induction var.
5280 X is the source of insn P, or a part of it.
5281 MODE is the mode in which X should be interpreted.
5283 DEST_REG is the putative biv, also the destination of the insn.
5284 We accept patterns of these forms:
5285 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5286 REG = INVARIANT + REG
5288 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5289 and store the additive term into *INC_VAL.
5291 If X is an assignment of an invariant into DEST_REG, we set
5292 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5294 We also want to detect a BIV when it corresponds to a variable
5295 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5296 of the variable may be a PLUS that adds a SUBREG of that variable to
5297 an invariant and then sign- or zero-extends the result of the PLUS
5300 Most GIVs in such cases will be in the promoted mode, since that is the
5301 probably the natural computation mode (and almost certainly the mode
5302 used for addresses) on the machine. So we view the pseudo-reg containing
5303 the variable as the BIV, as if it were simply incremented.
5305 Note that treating the entire pseudo as a BIV will result in making
5306 simple increments to any GIVs based on it. However, if the variable
5307 overflows in its declared mode but not its promoted mode, the result will
5308 be incorrect. This is acceptable if the variable is signed, since
5309 overflows in such cases are undefined, but not if it is unsigned, since
5310 those overflows are defined. So we only check for SIGN_EXTEND and
5313 If we cannot find a biv, we return 0. */
5316 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val)
5318 enum machine_mode mode;
5324 register enum rtx_code code;
5328 code = GET_CODE (x);
5332 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5333 || (GET_CODE (XEXP (x, 0)) == SUBREG
5334 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5335 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5337 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5338 || (GET_CODE (XEXP (x, 1)) == SUBREG
5339 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5340 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5345 if (invariant_p (arg) != 1)
5348 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5349 *mult_val = const1_rtx;
5353 /* If this is a SUBREG for a promoted variable, check the inner
5355 if (SUBREG_PROMOTED_VAR_P (x))
5356 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
5357 dest_reg, p, inc_val, mult_val);
5361 /* If this register is assigned in a previous insn, look at its
5362 source, but don't go outside the loop or past a label. */
5368 insn = PREV_INSN (insn);
5369 } while (insn && GET_CODE (insn) == NOTE
5370 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5374 set = single_set (insn);
5378 if ((SET_DEST (set) == x
5379 || (GET_CODE (SET_DEST (set)) == SUBREG
5380 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
5382 && SUBREG_REG (SET_DEST (set)) == x))
5383 && basic_induction_var (SET_SRC (set),
5384 (GET_MODE (SET_SRC (set)) == VOIDmode
5386 : GET_MODE (SET_SRC (set))),
5391 /* ... fall through ... */
5393 /* Can accept constant setting of biv only when inside inner most loop.
5394 Otherwise, a biv of an inner loop may be incorrectly recognized
5395 as a biv of the outer loop,
5396 causing code to be moved INTO the inner loop. */
5398 if (invariant_p (x) != 1)
5403 /* convert_modes aborts if we try to convert to or from CCmode, so just
5404 exclude that case. It is very unlikely that a condition code value
5405 would be a useful iterator anyways. */
5406 if (loops_enclosed == 1
5407 && GET_MODE_CLASS (mode) != MODE_CC
5408 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
5410 /* Possible bug here? Perhaps we don't know the mode of X. */
5411 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5412 *mult_val = const0_rtx;
5419 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5420 dest_reg, p, inc_val, mult_val);
5423 /* Similar, since this can be a sign extension. */
5424 for (insn = PREV_INSN (p);
5425 (insn && GET_CODE (insn) == NOTE
5426 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5427 insn = PREV_INSN (insn))
5431 set = single_set (insn);
5433 if (set && SET_DEST (set) == XEXP (x, 0)
5434 && GET_CODE (XEXP (x, 1)) == CONST_INT
5435 && INTVAL (XEXP (x, 1)) >= 0
5436 && GET_CODE (SET_SRC (set)) == ASHIFT
5437 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5438 return basic_induction_var (XEXP (SET_SRC (set), 0),
5439 GET_MODE (XEXP (x, 0)),
5440 dest_reg, insn, inc_val, mult_val);
5448 /* A general induction variable (giv) is any quantity that is a linear
5449 function of a basic induction variable,
5450 i.e. giv = biv * mult_val + add_val.
5451 The coefficients can be any loop invariant quantity.
5452 A giv need not be computed directly from the biv;
5453 it can be computed by way of other givs. */
5455 /* Determine whether X computes a giv.
5456 If it does, return a nonzero value
5457 which is the benefit from eliminating the computation of X;
5458 set *SRC_REG to the register of the biv that it is computed from;
5459 set *ADD_VAL and *MULT_VAL to the coefficients,
5460 such that the value of X is biv * mult + add; */
5463 general_induction_var (x, src_reg, add_val, mult_val, is_addr, pbenefit)
5474 /* If this is an invariant, forget it, it isn't a giv. */
5475 if (invariant_p (x) == 1)
5478 /* See if the expression could be a giv and get its form.
5479 Mark our place on the obstack in case we don't find a giv. */
5480 storage = (char *) oballoc (0);
5482 x = simplify_giv_expr (x, pbenefit);
5489 switch (GET_CODE (x))
5493 /* Since this is now an invariant and wasn't before, it must be a giv
5494 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5496 *src_reg = loop_iv_list->biv->dest_reg;
5497 *mult_val = const0_rtx;
5502 /* This is equivalent to a BIV. */
5504 *mult_val = const1_rtx;
5505 *add_val = const0_rtx;
5509 /* Either (plus (biv) (invar)) or
5510 (plus (mult (biv) (invar_1)) (invar_2)). */
5511 if (GET_CODE (XEXP (x, 0)) == MULT)
5513 *src_reg = XEXP (XEXP (x, 0), 0);
5514 *mult_val = XEXP (XEXP (x, 0), 1);
5518 *src_reg = XEXP (x, 0);
5519 *mult_val = const1_rtx;
5521 *add_val = XEXP (x, 1);
5525 /* ADD_VAL is zero. */
5526 *src_reg = XEXP (x, 0);
5527 *mult_val = XEXP (x, 1);
5528 *add_val = const0_rtx;
5535 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5536 unless they are CONST_INT). */
5537 if (GET_CODE (*add_val) == USE)
5538 *add_val = XEXP (*add_val, 0);
5539 if (GET_CODE (*mult_val) == USE)
5540 *mult_val = XEXP (*mult_val, 0);
5545 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
5547 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
5551 *pbenefit += rtx_cost (orig_x, SET);
5553 /* Always return true if this is a giv so it will be detected as such,
5554 even if the benefit is zero or negative. This allows elimination
5555 of bivs that might otherwise not be eliminated. */
5559 /* Given an expression, X, try to form it as a linear function of a biv.
5560 We will canonicalize it to be of the form
5561 (plus (mult (BIV) (invar_1))
5563 with possible degeneracies.
5565 The invariant expressions must each be of a form that can be used as a
5566 machine operand. We surround then with a USE rtx (a hack, but localized
5567 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5568 routine; it is the caller's responsibility to strip them.
5570 If no such canonicalization is possible (i.e., two biv's are used or an
5571 expression that is neither invariant nor a biv or giv), this routine
5574 For a non-zero return, the result will have a code of CONST_INT, USE,
5575 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5577 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5579 static rtx sge_plus PROTO ((enum machine_mode, rtx, rtx));
5580 static rtx sge_plus_constant PROTO ((rtx, rtx));
5583 simplify_giv_expr (x, benefit)
5587 enum machine_mode mode = GET_MODE (x);
5591 /* If this is not an integer mode, or if we cannot do arithmetic in this
5592 mode, this can't be a giv. */
5593 if (mode != VOIDmode
5594 && (GET_MODE_CLASS (mode) != MODE_INT
5595 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
5598 switch (GET_CODE (x))
5601 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5602 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5603 if (arg0 == 0 || arg1 == 0)
5606 /* Put constant last, CONST_INT last if both constant. */
5607 if ((GET_CODE (arg0) == USE
5608 || GET_CODE (arg0) == CONST_INT)
5609 && ! ((GET_CODE (arg0) == USE
5610 && GET_CODE (arg1) == USE)
5611 || GET_CODE (arg1) == CONST_INT))
5612 tem = arg0, arg0 = arg1, arg1 = tem;
5614 /* Handle addition of zero, then addition of an invariant. */
5615 if (arg1 == const0_rtx)
5617 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
5618 switch (GET_CODE (arg0))
5622 /* Adding two invariants must result in an invariant, so enclose
5623 addition operation inside a USE and return it. */
5624 if (GET_CODE (arg0) == USE)
5625 arg0 = XEXP (arg0, 0);
5626 if (GET_CODE (arg1) == USE)
5627 arg1 = XEXP (arg1, 0);
5629 if (GET_CODE (arg0) == CONST_INT)
5630 tem = arg0, arg0 = arg1, arg1 = tem;
5631 if (GET_CODE (arg1) == CONST_INT)
5632 tem = sge_plus_constant (arg0, arg1);
5634 tem = sge_plus (mode, arg0, arg1);
5636 if (GET_CODE (tem) != CONST_INT)
5637 tem = gen_rtx_USE (mode, tem);
5642 /* biv + invar or mult + invar. Return sum. */
5643 return gen_rtx_PLUS (mode, arg0, arg1);
5646 /* (a + invar_1) + invar_2. Associate. */
5647 return simplify_giv_expr (
5648 gen_rtx_PLUS (mode, XEXP (arg0, 0),
5649 gen_rtx_PLUS (mode, XEXP (arg0, 1), arg1)),
5656 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5657 MULT to reduce cases. */
5658 if (GET_CODE (arg0) == REG)
5659 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
5660 if (GET_CODE (arg1) == REG)
5661 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
5663 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5664 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5665 Recurse to associate the second PLUS. */
5666 if (GET_CODE (arg1) == MULT)
5667 tem = arg0, arg0 = arg1, arg1 = tem;
5669 if (GET_CODE (arg1) == PLUS)
5670 return simplify_giv_expr (gen_rtx_PLUS (mode,
5671 gen_rtx_PLUS (mode, arg0,
5676 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5677 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
5680 if (!rtx_equal_p (arg0, arg1))
5683 return simplify_giv_expr (gen_rtx_MULT (mode,
5691 /* Handle "a - b" as "a + b * (-1)". */
5692 return simplify_giv_expr (gen_rtx_PLUS (mode,
5694 gen_rtx_MULT (mode, XEXP (x, 1),
5699 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5700 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5701 if (arg0 == 0 || arg1 == 0)
5704 /* Put constant last, CONST_INT last if both constant. */
5705 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
5706 && GET_CODE (arg1) != CONST_INT)
5707 tem = arg0, arg0 = arg1, arg1 = tem;
5709 /* If second argument is not now constant, not giv. */
5710 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
5713 /* Handle multiply by 0 or 1. */
5714 if (arg1 == const0_rtx)
5717 else if (arg1 == const1_rtx)
5720 switch (GET_CODE (arg0))
5723 /* biv * invar. Done. */
5724 return gen_rtx_MULT (mode, arg0, arg1);
5727 /* Product of two constants. */
5728 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
5731 /* invar * invar. It is a giv, but very few of these will
5732 actually pay off, so limit to simple registers. */
5733 if (GET_CODE (arg1) != CONST_INT)
5736 arg0 = XEXP (arg0, 0);
5737 if (GET_CODE (arg0) == REG)
5738 tem = gen_rtx_MULT (mode, arg0, arg1);
5739 else if (GET_CODE (arg0) == MULT
5740 && GET_CODE (XEXP (arg0, 0)) == REG
5741 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
5743 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
5744 GEN_INT (INTVAL (XEXP (arg0, 1))
5749 return gen_rtx_USE (mode, tem);
5752 /* (a * invar_1) * invar_2. Associate. */
5753 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (arg0, 0),
5760 /* (a + invar_1) * invar_2. Distribute. */
5761 return simplify_giv_expr (gen_rtx_PLUS (mode,
5775 /* Shift by constant is multiply by power of two. */
5776 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
5779 return simplify_giv_expr (gen_rtx_MULT (mode,
5781 GEN_INT ((HOST_WIDE_INT) 1
5782 << INTVAL (XEXP (x, 1)))),
5786 /* "-a" is "a * (-1)" */
5787 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
5791 /* "~a" is "-a - 1". Silly, but easy. */
5792 return simplify_giv_expr (gen_rtx_MINUS (mode,
5793 gen_rtx_NEG (mode, XEXP (x, 0)),
5798 /* Already in proper form for invariant. */
5802 /* If this is a new register, we can't deal with it. */
5803 if (REGNO (x) >= max_reg_before_loop)
5806 /* Check for biv or giv. */
5807 switch (reg_iv_type[REGNO (x)])
5811 case GENERAL_INDUCT:
5813 struct induction *v = reg_iv_info[REGNO (x)];
5815 /* Form expression from giv and add benefit. Ensure this giv
5816 can derive another and subtract any needed adjustment if so. */
5817 *benefit += v->benefit;
5821 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode, v->src_reg,
5824 if (v->derive_adjustment)
5825 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
5826 return simplify_giv_expr (tem, benefit);
5830 /* If it isn't an induction variable, and it is invariant, we
5831 may be able to simplify things further by looking through
5832 the bits we just moved outside the loop. */
5833 if (invariant_p (x) == 1)
5837 for (m = the_movables; m ; m = m->next)
5838 if (rtx_equal_p (x, m->set_dest))
5840 /* Ok, we found a match. Substitute and simplify. */
5842 /* If we match another movable, we must use that, as
5843 this one is going away. */
5845 return simplify_giv_expr (m->match->set_dest, benefit);
5847 /* If consec is non-zero, this is a member of a group of
5848 instructions that were moved together. We handle this
5849 case only to the point of seeking to the last insn and
5850 looking for a REG_EQUAL. Fail if we don't find one. */
5855 do { tem = NEXT_INSN (tem); } while (--i > 0);
5857 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
5859 tem = XEXP (tem, 0);
5863 tem = single_set (m->insn);
5865 tem = SET_SRC (tem);
5870 /* What we are most interested in is pointer
5871 arithmetic on invariants -- only take
5872 patterns we may be able to do something with. */
5873 if (GET_CODE (tem) == PLUS
5874 || GET_CODE (tem) == MULT
5875 || GET_CODE (tem) == ASHIFT
5876 || GET_CODE (tem) == CONST_INT
5877 || GET_CODE (tem) == SYMBOL_REF)
5879 tem = simplify_giv_expr (tem, benefit);
5883 else if (GET_CODE (tem) == CONST
5884 && GET_CODE (XEXP (tem, 0)) == PLUS
5885 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
5886 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
5888 tem = simplify_giv_expr (XEXP (tem, 0), benefit);
5899 /* Fall through to general case. */
5901 /* If invariant, return as USE (unless CONST_INT).
5902 Otherwise, not giv. */
5903 if (GET_CODE (x) == USE)
5906 if (invariant_p (x) == 1)
5908 if (GET_CODE (x) == CONST_INT)
5910 if (GET_CODE (x) == CONST
5911 && GET_CODE (XEXP (x, 0)) == PLUS
5912 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
5913 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
5915 return gen_rtx_USE (mode, x);
5922 /* This routine folds invariants such that there is only ever one
5923 CONST_INT in the summation. It is only used by simplify_giv_expr. */
5926 sge_plus_constant (x, c)
5929 if (GET_CODE (x) == CONST_INT)
5930 return GEN_INT (INTVAL (x) + INTVAL (c));
5931 else if (GET_CODE (x) != PLUS)
5932 return gen_rtx_PLUS (GET_MODE (x), x, c);
5933 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5935 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
5936 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
5938 else if (GET_CODE (XEXP (x, 0)) == PLUS
5939 || GET_CODE (XEXP (x, 1)) != PLUS)
5941 return gen_rtx_PLUS (GET_MODE (x),
5942 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
5946 return gen_rtx_PLUS (GET_MODE (x),
5947 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
5952 sge_plus (mode, x, y)
5953 enum machine_mode mode;
5956 while (GET_CODE (y) == PLUS)
5958 rtx a = XEXP (y, 0);
5959 if (GET_CODE (a) == CONST_INT)
5960 x = sge_plus_constant (x, a);
5962 x = gen_rtx_PLUS (mode, x, a);
5965 if (GET_CODE (y) == CONST_INT)
5966 x = sge_plus_constant (x, y);
5968 x = gen_rtx_PLUS (mode, x, y);
5972 /* Help detect a giv that is calculated by several consecutive insns;
5976 The caller has already identified the first insn P as having a giv as dest;
5977 we check that all other insns that set the same register follow
5978 immediately after P, that they alter nothing else,
5979 and that the result of the last is still a giv.
5981 The value is 0 if the reg set in P is not really a giv.
5982 Otherwise, the value is the amount gained by eliminating
5983 all the consecutive insns that compute the value.
5985 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5986 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5988 The coefficients of the ultimate giv value are stored in
5989 *MULT_VAL and *ADD_VAL. */
5992 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
6007 /* Indicate that this is a giv so that we can update the value produced in
6008 each insn of the multi-insn sequence.
6010 This induction structure will be used only by the call to
6011 general_induction_var below, so we can allocate it on our stack.
6012 If this is a giv, our caller will replace the induct var entry with
6013 a new induction structure. */
6015 = (struct induction *) alloca (sizeof (struct induction));
6016 v->src_reg = src_reg;
6017 v->mult_val = *mult_val;
6018 v->add_val = *add_val;
6019 v->benefit = first_benefit;
6021 v->derive_adjustment = 0;
6023 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
6024 reg_iv_info[REGNO (dest_reg)] = v;
6026 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6031 code = GET_CODE (p);
6033 /* If libcall, skip to end of call sequence. */
6034 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6038 && (set = single_set (p))
6039 && GET_CODE (SET_DEST (set)) == REG
6040 && SET_DEST (set) == dest_reg
6041 && (general_induction_var (SET_SRC (set), &src_reg,
6042 add_val, mult_val, 0, &benefit)
6043 /* Giv created by equivalent expression. */
6044 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6045 && general_induction_var (XEXP (temp, 0), &src_reg,
6046 add_val, mult_val, 0, &benefit)))
6047 && src_reg == v->src_reg)
6049 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6050 benefit += libcall_benefit (p);
6053 v->mult_val = *mult_val;
6054 v->add_val = *add_val;
6055 v->benefit = benefit;
6057 else if (code != NOTE)
6059 /* Allow insns that set something other than this giv to a
6060 constant. Such insns are needed on machines which cannot
6061 include long constants and should not disqualify a giv. */
6063 && (set = single_set (p))
6064 && SET_DEST (set) != dest_reg
6065 && CONSTANT_P (SET_SRC (set)))
6068 reg_iv_type[REGNO (dest_reg)] = UNKNOWN_INDUCT;
6076 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6077 represented by G1. If no such expression can be found, or it is clear that
6078 it cannot possibly be a valid address, 0 is returned.
6080 To perform the computation, we note that
6083 where `v' is the biv.
6085 So G2 = (y/b) * G1 + (b - a*y/x).
6087 Note that MULT = y/x.
6089 Update: A and B are now allowed to be additive expressions such that
6090 B contains all variables in A. That is, computing B-A will not require
6091 subtracting variables. */
6094 express_from_1 (a, b, mult)
6097 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6099 if (mult == const0_rtx)
6102 /* If MULT is not 1, we cannot handle A with non-constants, since we
6103 would then be required to subtract multiples of the registers in A.
6104 This is theoretically possible, and may even apply to some Fortran
6105 constructs, but it is a lot of work and we do not attempt it here. */
6107 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6110 /* In general these structures are sorted top to bottom (down the PLUS
6111 chain), but not left to right across the PLUS. If B is a higher
6112 order giv than A, we can strip one level and recurse. If A is higher
6113 order, we'll eventually bail out, but won't know that until the end.
6114 If they are the same, we'll strip one level around this loop. */
6116 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6118 rtx ra, rb, oa, ob, tmp;
6120 ra = XEXP (a, 0), oa = XEXP (a, 1);
6121 if (GET_CODE (ra) == PLUS)
6122 tmp = ra, ra = oa, oa = tmp;
6124 rb = XEXP (b, 0), ob = XEXP (b, 1);
6125 if (GET_CODE (rb) == PLUS)
6126 tmp = rb, rb = ob, ob = tmp;
6128 if (rtx_equal_p (ra, rb))
6129 /* We matched: remove one reg completely. */
6131 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6132 /* An alternate match. */
6134 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6135 /* An alternate match. */
6139 /* Indicates an extra register in B. Strip one level from B and
6140 recurse, hoping B was the higher order expression. */
6141 ob = express_from_1 (a, ob, mult);
6144 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6148 /* Here we are at the last level of A, go through the cases hoping to
6149 get rid of everything but a constant. */
6151 if (GET_CODE (a) == PLUS)
6155 ra = XEXP (a, 0), oa = XEXP (a, 1);
6156 if (rtx_equal_p (oa, b))
6158 else if (!rtx_equal_p (ra, b))
6161 if (GET_CODE (oa) != CONST_INT)
6164 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6166 else if (GET_CODE (a) == CONST_INT)
6168 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6170 else if (GET_CODE (b) == PLUS)
6172 if (rtx_equal_p (a, XEXP (b, 0)))
6174 else if (rtx_equal_p (a, XEXP (b, 1)))
6179 else if (rtx_equal_p (a, b))
6186 express_from (g1, g2)
6187 struct induction *g1, *g2;
6191 /* The value that G1 will be multiplied by must be a constant integer. Also,
6192 the only chance we have of getting a valid address is if b*c/a (see above
6193 for notation) is also an integer. */
6194 if (GET_CODE (g1->mult_val) == CONST_INT
6195 && GET_CODE (g2->mult_val) == CONST_INT)
6197 if (g1->mult_val == const0_rtx
6198 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6200 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6202 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6206 /* ??? Find out if the one is a multiple of the other? */
6210 add = express_from_1 (g1->add_val, g2->add_val, mult);
6211 if (add == NULL_RTX)
6214 /* Form simplified final result. */
6215 if (mult == const0_rtx)
6217 else if (mult == const1_rtx)
6218 mult = g1->dest_reg;
6220 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6222 if (add == const0_rtx)
6226 if (GET_CODE (add) == PLUS
6227 && CONSTANT_P (XEXP (add, 1)))
6229 rtx tem = XEXP (add, 1);
6230 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6234 return gen_rtx_PLUS (g2->mode, mult, add);
6239 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6240 represented by G1. This indicates that G2 should be combined with G1 and
6241 that G2 can use (either directly or via an address expression) a register
6242 used to represent G1. */
6245 combine_givs_p (g1, g2)
6246 struct induction *g1, *g2;
6248 rtx tem = express_from (g1, g2);
6250 /* If these givs are identical, they can be combined. We use the results
6251 of express_from because the addends are not in a canonical form, so
6252 rtx_equal_p is a weaker test. */
6253 if (tem == g1->dest_reg)
6255 return g1->dest_reg;
6258 /* If G2 can be expressed as a function of G1 and that function is valid
6259 as an address and no more expensive than using a register for G2,
6260 the expression of G2 in terms of G1 can be used. */
6262 && g2->giv_type == DEST_ADDR
6263 && memory_address_p (g2->mem_mode, tem)
6264 /* ??? Looses, especially with -fforce-addr, where *g2->location
6265 will always be a register, and so anything more complicated
6269 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6271 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6282 struct combine_givs_stats
6289 cmp_combine_givs_stats (x, y)
6290 struct combine_givs_stats *x, *y;
6293 d = y->total_benefit - x->total_benefit;
6294 /* Stabilize the sort. */
6296 d = x->giv_number - y->giv_number;
6300 /* If one of these givs is a DEST_REG that was only used once, by the
6301 other giv, this is actually a single use. Return 0 if this is not
6302 the case, -1 if g1 is the DEST_REG involved, and 1 if it was g2. */
6305 combine_givs_used_once (g1, g2)
6306 struct induction *g1, *g2;
6308 if (g1->giv_type == DEST_REG
6309 && VARRAY_INT (n_times_used, REGNO (g1->dest_reg)) == 1
6310 && reg_mentioned_p (g1->dest_reg, PATTERN (g2->insn)))
6313 if (g2->giv_type == DEST_REG
6314 && VARRAY_INT (n_times_used, REGNO (g2->dest_reg)) == 1
6315 && reg_mentioned_p (g2->dest_reg, PATTERN (g1->insn)))
6322 combine_givs_benefit_from (g1, g2)
6323 struct induction *g1, *g2;
6325 int tmp = combine_givs_used_once (g1, g2);
6329 return g2->benefit - g1->benefit;
6334 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6335 any other. If so, point SAME to the giv combined with and set NEW_REG to
6336 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6337 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6341 struct iv_class *bl;
6343 struct induction *g1, *g2, **giv_array;
6344 int i, j, k, giv_count;
6345 struct combine_givs_stats *stats;
6348 /* Count givs, because bl->giv_count is incorrect here. */
6350 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6355 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
6357 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6359 giv_array[i++] = g1;
6361 stats = (struct combine_givs_stats *) alloca (giv_count * sizeof (*stats));
6362 bzero ((char *) stats, giv_count * sizeof (*stats));
6364 can_combine = (rtx *) alloca (giv_count * giv_count * sizeof(rtx));
6365 bzero ((char *) can_combine, giv_count * giv_count * sizeof(rtx));
6367 for (i = 0; i < giv_count; i++)
6373 this_benefit = g1->benefit;
6374 /* Add an additional weight for zero addends. */
6375 if (g1->no_const_addval)
6377 for (j = 0; j < giv_count; j++)
6383 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
6385 can_combine[i*giv_count + j] = this_combine;
6386 this_benefit += combine_givs_benefit_from (g1, g2);
6387 /* Add an additional weight for being reused more times. */
6391 stats[i].giv_number = i;
6392 stats[i].total_benefit = this_benefit;
6395 /* Iterate, combining until we can't. */
6397 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
6399 if (loop_dump_stream)
6401 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
6402 for (k = 0; k < giv_count; k++)
6404 g1 = giv_array[stats[k].giv_number];
6405 if (!g1->combined_with && !g1->same)
6406 fprintf (loop_dump_stream, " {%d, %d}",
6407 INSN_UID (giv_array[stats[k].giv_number]->insn),
6408 stats[k].total_benefit);
6410 putc ('\n', loop_dump_stream);
6413 for (k = 0; k < giv_count; k++)
6415 int g1_add_benefit = 0;
6417 i = stats[k].giv_number;
6420 /* If it has already been combined, skip. */
6421 if (g1->combined_with || g1->same)
6424 for (j = 0; j < giv_count; j++)
6427 if (g1 != g2 && can_combine[i*giv_count + j]
6428 /* If it has already been combined, skip. */
6429 && ! g2->same && ! g2->combined_with)
6433 g2->new_reg = can_combine[i*giv_count + j];
6435 g1->combined_with = 1;
6436 if (!combine_givs_used_once (g1, g2))
6437 g1->times_used += 1;
6438 g1->lifetime += g2->lifetime;
6440 g1_add_benefit += combine_givs_benefit_from (g1, g2);
6442 /* ??? The new final_[bg]iv_value code does a much better job
6443 of finding replaceable giv's, and hence this code may no
6444 longer be necessary. */
6445 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
6446 g1_add_benefit -= copy_cost;
6448 /* To help optimize the next set of combinations, remove
6449 this giv from the benefits of other potential mates. */
6450 for (l = 0; l < giv_count; ++l)
6452 int m = stats[l].giv_number;
6453 if (can_combine[m*giv_count + j])
6455 /* Remove additional weight for being reused. */
6456 stats[l].total_benefit -= 3 +
6457 combine_givs_benefit_from (giv_array[m], g2);
6461 if (loop_dump_stream)
6462 fprintf (loop_dump_stream,
6463 "giv at %d combined with giv at %d\n",
6464 INSN_UID (g2->insn), INSN_UID (g1->insn));
6468 /* To help optimize the next set of combinations, remove
6469 this giv from the benefits of other potential mates. */
6470 if (g1->combined_with)
6472 for (j = 0; j < giv_count; ++j)
6474 int m = stats[j].giv_number;
6475 if (can_combine[m*giv_count + j])
6477 /* Remove additional weight for being reused. */
6478 stats[j].total_benefit -= 3 +
6479 combine_givs_benefit_from (giv_array[m], g1);
6483 g1->benefit += g1_add_benefit;
6485 /* We've finished with this giv, and everything it touched.
6486 Restart the combination so that proper weights for the
6487 rest of the givs are properly taken into account. */
6488 /* ??? Ideally we would compact the arrays at this point, so
6489 as to not cover old ground. But sanely compacting
6490 can_combine is tricky. */
6496 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
6499 emit_iv_add_mult (b, m, a, reg, insert_before)
6500 rtx b; /* initial value of basic induction variable */
6501 rtx m; /* multiplicative constant */
6502 rtx a; /* additive constant */
6503 rtx reg; /* destination register */
6509 /* Prevent unexpected sharing of these rtx. */
6513 /* Increase the lifetime of any invariants moved further in code. */
6514 update_reg_last_use (a, insert_before);
6515 update_reg_last_use (b, insert_before);
6516 update_reg_last_use (m, insert_before);
6519 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
6521 emit_move_insn (reg, result);
6522 seq = gen_sequence ();
6525 emit_insn_before (seq, insert_before);
6527 /* It is entirely possible that the expansion created lots of new
6528 registers. Iterate over the sequence we just created and
6531 if (GET_CODE (seq) == SEQUENCE)
6534 for (i = 0; i < XVECLEN (seq, 0); ++i)
6536 rtx set = single_set (XVECEXP (seq, 0, i));
6537 if (set && GET_CODE (SET_DEST (set)) == REG)
6538 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
6541 else if (GET_CODE (seq) == SET
6542 && GET_CODE (SET_DEST (seq)) == REG)
6543 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
6546 /* Test whether A * B can be computed without
6547 an actual multiply insn. Value is 1 if so. */
6550 product_cheap_p (a, b)
6556 struct obstack *old_rtl_obstack = rtl_obstack;
6557 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
6560 /* If only one is constant, make it B. */
6561 if (GET_CODE (a) == CONST_INT)
6562 tmp = a, a = b, b = tmp;
6564 /* If first constant, both constant, so don't need multiply. */
6565 if (GET_CODE (a) == CONST_INT)
6568 /* If second not constant, neither is constant, so would need multiply. */
6569 if (GET_CODE (b) != CONST_INT)
6572 /* One operand is constant, so might not need multiply insn. Generate the
6573 code for the multiply and see if a call or multiply, or long sequence
6574 of insns is generated. */
6576 rtl_obstack = &temp_obstack;
6578 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
6579 tmp = gen_sequence ();
6582 if (GET_CODE (tmp) == SEQUENCE)
6584 if (XVEC (tmp, 0) == 0)
6586 else if (XVECLEN (tmp, 0) > 3)
6589 for (i = 0; i < XVECLEN (tmp, 0); i++)
6591 rtx insn = XVECEXP (tmp, 0, i);
6593 if (GET_CODE (insn) != INSN
6594 || (GET_CODE (PATTERN (insn)) == SET
6595 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
6596 || (GET_CODE (PATTERN (insn)) == PARALLEL
6597 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
6598 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
6605 else if (GET_CODE (tmp) == SET
6606 && GET_CODE (SET_SRC (tmp)) == MULT)
6608 else if (GET_CODE (tmp) == PARALLEL
6609 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
6610 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
6613 /* Free any storage we obtained in generating this multiply and restore rtl
6614 allocation to its normal obstack. */
6615 obstack_free (&temp_obstack, storage);
6616 rtl_obstack = old_rtl_obstack;
6621 /* Check to see if loop can be terminated by a "decrement and branch until
6622 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
6623 Also try reversing an increment loop to a decrement loop
6624 to see if the optimization can be performed.
6625 Value is nonzero if optimization was performed. */
6627 /* This is useful even if the architecture doesn't have such an insn,
6628 because it might change a loops which increments from 0 to n to a loop
6629 which decrements from n to 0. A loop that decrements to zero is usually
6630 faster than one that increments from zero. */
6632 /* ??? This could be rewritten to use some of the loop unrolling procedures,
6633 such as approx_final_value, biv_total_increment, loop_iterations, and
6634 final_[bg]iv_value. */
6637 check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
6641 struct loop_info *loop_info;
6643 struct iv_class *bl;
6650 rtx before_comparison;
6654 int compare_and_branch;
6656 /* If last insn is a conditional branch, and the insn before tests a
6657 register value, try to optimize it. Otherwise, we can't do anything. */
6659 jump = PREV_INSN (loop_end);
6660 comparison = get_condition_for_loop (jump);
6661 if (comparison == 0)
6664 /* Try to compute whether the compare/branch at the loop end is one or
6665 two instructions. */
6666 get_condition (jump, &first_compare);
6667 if (first_compare == jump)
6668 compare_and_branch = 1;
6669 else if (first_compare == prev_nonnote_insn (jump))
6670 compare_and_branch = 2;
6674 /* Check all of the bivs to see if the compare uses one of them.
6675 Skip biv's set more than once because we can't guarantee that
6676 it will be zero on the last iteration. Also skip if the biv is
6677 used between its update and the test insn. */
6679 for (bl = loop_iv_list; bl; bl = bl->next)
6681 if (bl->biv_count == 1
6682 && bl->biv->dest_reg == XEXP (comparison, 0)
6683 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
6691 /* Look for the case where the basic induction variable is always
6692 nonnegative, and equals zero on the last iteration.
6693 In this case, add a reg_note REG_NONNEG, which allows the
6694 m68k DBRA instruction to be used. */
6696 if (((GET_CODE (comparison) == GT
6697 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
6698 && INTVAL (XEXP (comparison, 1)) == -1)
6699 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
6700 && GET_CODE (bl->biv->add_val) == CONST_INT
6701 && INTVAL (bl->biv->add_val) < 0)
6703 /* Initial value must be greater than 0,
6704 init_val % -dec_value == 0 to ensure that it equals zero on
6705 the last iteration */
6707 if (GET_CODE (bl->initial_value) == CONST_INT
6708 && INTVAL (bl->initial_value) > 0
6709 && (INTVAL (bl->initial_value)
6710 % (-INTVAL (bl->biv->add_val))) == 0)
6712 /* register always nonnegative, add REG_NOTE to branch */
6713 REG_NOTES (PREV_INSN (loop_end))
6714 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
6715 REG_NOTES (PREV_INSN (loop_end)));
6721 /* If the decrement is 1 and the value was tested as >= 0 before
6722 the loop, then we can safely optimize. */
6723 for (p = loop_start; p; p = PREV_INSN (p))
6725 if (GET_CODE (p) == CODE_LABEL)
6727 if (GET_CODE (p) != JUMP_INSN)
6730 before_comparison = get_condition_for_loop (p);
6731 if (before_comparison
6732 && XEXP (before_comparison, 0) == bl->biv->dest_reg
6733 && GET_CODE (before_comparison) == LT
6734 && XEXP (before_comparison, 1) == const0_rtx
6735 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
6736 && INTVAL (bl->biv->add_val) == -1)
6738 REG_NOTES (PREV_INSN (loop_end))
6739 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
6740 REG_NOTES (PREV_INSN (loop_end)));
6747 else if (INTVAL (bl->biv->add_val) > 0)
6749 /* Try to change inc to dec, so can apply above optimization. */
6751 all registers modified are induction variables or invariant,
6752 all memory references have non-overlapping addresses
6753 (obviously true if only one write)
6754 allow 2 insns for the compare/jump at the end of the loop. */
6755 /* Also, we must avoid any instructions which use both the reversed
6756 biv and another biv. Such instructions will fail if the loop is
6757 reversed. We meet this condition by requiring that either
6758 no_use_except_counting is true, or else that there is only
6760 int num_nonfixed_reads = 0;
6761 /* 1 if the iteration var is used only to count iterations. */
6762 int no_use_except_counting = 0;
6763 /* 1 if the loop has no memory store, or it has a single memory store
6764 which is reversible. */
6765 int reversible_mem_store = 1;
6767 if (bl->giv_count == 0
6768 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
6770 rtx bivreg = regno_reg_rtx[bl->regno];
6772 /* If there are no givs for this biv, and the only exit is the
6773 fall through at the end of the loop, then
6774 see if perhaps there are no uses except to count. */
6775 no_use_except_counting = 1;
6776 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
6777 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6779 rtx set = single_set (p);
6781 if (set && GET_CODE (SET_DEST (set)) == REG
6782 && REGNO (SET_DEST (set)) == bl->regno)
6783 /* An insn that sets the biv is okay. */
6785 else if (p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
6786 || p == prev_nonnote_insn (loop_end))
6787 /* Don't bother about the end test. */
6789 else if (reg_mentioned_p (bivreg, PATTERN (p)))
6791 no_use_except_counting = 0;
6797 if (no_use_except_counting)
6798 ; /* no need to worry about MEMs. */
6799 else if (num_mem_sets <= 1)
6801 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
6802 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6803 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
6805 /* If the loop has a single store, and the destination address is
6806 invariant, then we can't reverse the loop, because this address
6807 might then have the wrong value at loop exit.
6808 This would work if the source was invariant also, however, in that
6809 case, the insn should have been moved out of the loop. */
6811 if (num_mem_sets == 1)
6812 reversible_mem_store
6813 = (! unknown_address_altered
6814 && ! invariant_p (XEXP (loop_store_mems[0], 0)));
6819 /* This code only acts for innermost loops. Also it simplifies
6820 the memory address check by only reversing loops with
6821 zero or one memory access.
6822 Two memory accesses could involve parts of the same array,
6823 and that can't be reversed.
6824 If the biv is used only for counting, than we don't need to worry
6825 about all these things. */
6827 if ((num_nonfixed_reads <= 1
6829 && !loop_has_volatile
6830 && reversible_mem_store
6831 && (bl->giv_count + bl->biv_count + num_mem_sets
6832 + num_movables + compare_and_branch == insn_count)
6833 && (bl == loop_iv_list && bl->next == 0))
6834 || no_use_except_counting)
6838 /* Loop can be reversed. */
6839 if (loop_dump_stream)
6840 fprintf (loop_dump_stream, "Can reverse loop\n");
6842 /* Now check other conditions:
6844 The increment must be a constant, as must the initial value,
6845 and the comparison code must be LT.
6847 This test can probably be improved since +/- 1 in the constant
6848 can be obtained by changing LT to LE and vice versa; this is
6852 /* for constants, LE gets turned into LT */
6853 && (GET_CODE (comparison) == LT
6854 || (GET_CODE (comparison) == LE
6855 && no_use_except_counting)))
6857 HOST_WIDE_INT add_val, add_adjust, comparison_val;
6858 rtx initial_value, comparison_value;
6860 enum rtx_code cmp_code;
6861 int comparison_const_width;
6862 unsigned HOST_WIDE_INT comparison_sign_mask;
6865 add_val = INTVAL (bl->biv->add_val);
6866 comparison_value = XEXP (comparison, 1);
6867 comparison_const_width
6868 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 1)));
6869 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
6870 comparison_const_width = HOST_BITS_PER_WIDE_INT;
6871 comparison_sign_mask
6872 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
6874 /* If the comparison value is not a loop invariant, then we
6875 can not reverse this loop.
6877 ??? If the insns which initialize the comparison value as
6878 a whole compute an invariant result, then we could move
6879 them out of the loop and proceed with loop reversal. */
6880 if (!invariant_p (comparison_value))
6883 if (GET_CODE (comparison_value) == CONST_INT)
6884 comparison_val = INTVAL (comparison_value);
6885 initial_value = bl->initial_value;
6887 /* Normalize the initial value if it is an integer and
6888 has no other use except as a counter. This will allow
6889 a few more loops to be reversed. */
6890 if (no_use_except_counting
6891 && GET_CODE (comparison_value) == CONST_INT
6892 && GET_CODE (initial_value) == CONST_INT)
6894 comparison_val = comparison_val - INTVAL (bl->initial_value);
6895 /* The code below requires comparison_val to be a multiple
6896 of add_val in order to do the loop reversal, so
6897 round up comparison_val to a multiple of add_val.
6898 Since comparison_value is constant, we know that the
6899 current comparison code is LT. */
6900 comparison_val = comparison_val + add_val - 1;
6902 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
6903 /* We postpone overflow checks for COMPARISON_VAL here;
6904 even if there is an overflow, we might still be able to
6905 reverse the loop, if converting the loop exit test to
6907 initial_value = const0_rtx;
6910 /* Check if there is a NOTE_INSN_LOOP_VTOP note. If there is,
6911 that means that this is a for or while style loop, with
6912 a loop exit test at the start. Thus, we can assume that
6913 the loop condition was true when the loop was entered.
6914 This allows us to change the loop exit condition to an
6916 We start at the end and search backwards for the previous
6917 NOTE. If there is no NOTE_INSN_LOOP_VTOP for this loop,
6918 the search will stop at the NOTE_INSN_LOOP_CONT. */
6921 vtop = PREV_INSN (vtop);
6922 while (GET_CODE (vtop) != NOTE
6923 || NOTE_LINE_NUMBER (vtop) > 0
6924 || NOTE_LINE_NUMBER (vtop) == NOTE_REPEATED_LINE_NUMBER
6925 || NOTE_LINE_NUMBER (vtop) == NOTE_INSN_DELETED);
6926 if (NOTE_LINE_NUMBER (vtop) != NOTE_INSN_LOOP_VTOP)
6929 /* First check if we can do a vanilla loop reversal. */
6930 if (initial_value == const0_rtx
6931 /* If we have a decrement_and_branch_on_count, prefer
6932 the NE test, since this will allow that instruction to
6933 be generated. Note that we must use a vanilla loop
6934 reversal if the biv is used to calculate a giv or has
6935 a non-counting use. */
6936 #if ! defined (HAVE_decrement_and_branch_until_zero) && defined (HAVE_decrement_and_branch_on_count)
6937 && (! (add_val == 1 && vtop
6938 && (bl->biv_count == 0
6939 || no_use_except_counting)))
6941 && GET_CODE (comparison_value) == CONST_INT
6942 /* Now do postponed overflow checks on COMPARISON_VAL. */
6943 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
6944 & comparison_sign_mask))
6946 /* Register will always be nonnegative, with value
6947 0 on last iteration */
6948 add_adjust = add_val;
6952 else if (add_val == 1 && vtop
6953 && (bl->biv_count == 0
6954 || no_use_except_counting))
6962 if (GET_CODE (comparison) == LE)
6963 add_adjust -= add_val;
6965 /* If the initial value is not zero, or if the comparison
6966 value is not an exact multiple of the increment, then we
6967 can not reverse this loop. */
6968 if (initial_value == const0_rtx
6969 && GET_CODE (comparison_value) == CONST_INT)
6971 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
6976 if (! no_use_except_counting || add_val != 1)
6980 final_value = comparison_value;
6982 /* Reset these in case we normalized the initial value
6983 and comparison value above. */
6984 if (GET_CODE (comparison_value) == CONST_INT
6985 && GET_CODE (initial_value) == CONST_INT)
6987 comparison_value = GEN_INT (comparison_val);
6989 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
6991 bl->initial_value = initial_value;
6993 /* Save some info needed to produce the new insns. */
6994 reg = bl->biv->dest_reg;
6995 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
6996 if (jump_label == pc_rtx)
6997 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
6998 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
7000 /* Set start_value; if this is not a CONST_INT, we need
7002 Initialize biv to start_value before loop start.
7003 The old initializing insn will be deleted as a
7004 dead store by flow.c. */
7005 if (initial_value == const0_rtx
7006 && GET_CODE (comparison_value) == CONST_INT)
7008 start_value = GEN_INT (comparison_val - add_adjust);
7009 emit_insn_before (gen_move_insn (reg, start_value),
7012 else if (GET_CODE (initial_value) == CONST_INT)
7014 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
7015 enum machine_mode mode = GET_MODE (reg);
7016 enum insn_code icode
7017 = add_optab->handlers[(int) mode].insn_code;
7018 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
7019 || ! ((*insn_operand_predicate[icode][1])
7020 (comparison_value, mode))
7021 || ! (*insn_operand_predicate[icode][2]) (offset, mode))
7024 = gen_rtx_PLUS (mode, comparison_value, offset);
7025 emit_insn_before ((GEN_FCN (icode)
7026 (reg, comparison_value, offset)),
7028 if (GET_CODE (comparison) == LE)
7029 final_value = gen_rtx_PLUS (mode, comparison_value,
7032 else if (! add_adjust)
7034 enum machine_mode mode = GET_MODE (reg);
7035 enum insn_code icode
7036 = sub_optab->handlers[(int) mode].insn_code;
7037 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
7038 || ! ((*insn_operand_predicate[icode][1])
7039 (comparison_value, mode))
7040 || ! ((*insn_operand_predicate[icode][2])
7041 (initial_value, mode)))
7044 = gen_rtx_MINUS (mode, comparison_value, initial_value);
7045 emit_insn_before ((GEN_FCN (icode)
7046 (reg, comparison_value, initial_value)),
7050 /* We could handle the other cases too, but it'll be
7051 better to have a testcase first. */
7054 /* We may not have a single insn which can increment a reg, so
7055 create a sequence to hold all the insns from expand_inc. */
7057 expand_inc (reg, new_add_val);
7058 tem = gen_sequence ();
7061 p = emit_insn_before (tem, bl->biv->insn);
7062 delete_insn (bl->biv->insn);
7064 /* Update biv info to reflect its new status. */
7066 bl->initial_value = start_value;
7067 bl->biv->add_val = new_add_val;
7069 /* Update loop info. */
7070 loop_info->initial_value = reg;
7071 loop_info->initial_equiv_value = reg;
7072 loop_info->final_value = const0_rtx;
7073 loop_info->final_equiv_value = const0_rtx;
7074 loop_info->comparison_value = const0_rtx;
7075 loop_info->comparison_code = cmp_code;
7076 loop_info->increment = new_add_val;
7078 /* Inc LABEL_NUSES so that delete_insn will
7079 not delete the label. */
7080 LABEL_NUSES (XEXP (jump_label, 0)) ++;
7082 /* Emit an insn after the end of the loop to set the biv's
7083 proper exit value if it is used anywhere outside the loop. */
7084 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
7086 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
7087 emit_insn_after (gen_move_insn (reg, final_value),
7090 /* Delete compare/branch at end of loop. */
7091 delete_insn (PREV_INSN (loop_end));
7092 if (compare_and_branch == 2)
7093 delete_insn (first_compare);
7095 /* Add new compare/branch insn at end of loop. */
7097 emit_cmp_insn (reg, const0_rtx, cmp_code, NULL_RTX,
7098 GET_MODE (reg), 0, 0);
7099 emit_jump_insn ((*bcc_gen_fctn[(int) cmp_code])
7100 (XEXP (jump_label, 0)));
7101 tem = gen_sequence ();
7103 emit_jump_insn_before (tem, loop_end);
7105 for (tem = PREV_INSN (loop_end);
7106 tem && GET_CODE (tem) != JUMP_INSN;
7107 tem = PREV_INSN (tem))
7111 JUMP_LABEL (tem) = XEXP (jump_label, 0);
7117 /* Increment of LABEL_NUSES done above. */
7118 /* Register is now always nonnegative,
7119 so add REG_NONNEG note to the branch. */
7120 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7126 /* Mark that this biv has been reversed. Each giv which depends
7127 on this biv, and which is also live past the end of the loop
7128 will have to be fixed up. */
7132 if (loop_dump_stream)
7133 fprintf (loop_dump_stream,
7134 "Reversed loop and added reg_nonneg\n");
7144 /* Verify whether the biv BL appears to be eliminable,
7145 based on the insns in the loop that refer to it.
7146 LOOP_START is the first insn of the loop, and END is the end insn.
7148 If ELIMINATE_P is non-zero, actually do the elimination.
7150 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
7151 determine whether invariant insns should be placed inside or at the
7152 start of the loop. */
7155 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
7156 struct iv_class *bl;
7160 int threshold, insn_count;
7162 rtx reg = bl->biv->dest_reg;
7165 /* Scan all insns in the loop, stopping if we find one that uses the
7166 biv in a way that we cannot eliminate. */
7168 for (p = loop_start; p != end; p = NEXT_INSN (p))
7170 enum rtx_code code = GET_CODE (p);
7171 rtx where = threshold >= insn_count ? loop_start : p;
7173 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
7174 && reg_mentioned_p (reg, PATTERN (p))
7175 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
7177 if (loop_dump_stream)
7178 fprintf (loop_dump_stream,
7179 "Cannot eliminate biv %d: biv used in insn %d.\n",
7180 bl->regno, INSN_UID (p));
7187 if (loop_dump_stream)
7188 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
7189 bl->regno, eliminate_p ? "was" : "can be");
7196 /* If BL appears in X (part of the pattern of INSN), see if we can
7197 eliminate its use. If so, return 1. If not, return 0.
7199 If BIV does not appear in X, return 1.
7201 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
7202 where extra insns should be added. Depending on how many items have been
7203 moved out of the loop, it will either be before INSN or at the start of
7207 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
7209 struct iv_class *bl;
7213 enum rtx_code code = GET_CODE (x);
7214 rtx reg = bl->biv->dest_reg;
7215 enum machine_mode mode = GET_MODE (reg);
7216 struct induction *v;
7228 /* If we haven't already been able to do something with this BIV,
7229 we can't eliminate it. */
7235 /* If this sets the BIV, it is not a problem. */
7236 if (SET_DEST (x) == reg)
7239 /* If this is an insn that defines a giv, it is also ok because
7240 it will go away when the giv is reduced. */
7241 for (v = bl->giv; v; v = v->next_iv)
7242 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
7246 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
7248 /* Can replace with any giv that was reduced and
7249 that has (MULT_VAL != 0) and (ADD_VAL == 0).
7250 Require a constant for MULT_VAL, so we know it's nonzero.
7251 ??? We disable this optimization to avoid potential
7254 for (v = bl->giv; v; v = v->next_iv)
7255 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
7256 && v->add_val == const0_rtx
7257 && ! v->ignore && ! v->maybe_dead && v->always_computable
7261 /* If the giv V had the auto-inc address optimization applied
7262 to it, and INSN occurs between the giv insn and the biv
7263 insn, then we must adjust the value used here.
7264 This is rare, so we don't bother to do so. */
7266 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7267 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7268 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7269 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7275 /* If the giv has the opposite direction of change,
7276 then reverse the comparison. */
7277 if (INTVAL (v->mult_val) < 0)
7278 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
7279 const0_rtx, v->new_reg);
7283 /* We can probably test that giv's reduced reg. */
7284 if (validate_change (insn, &SET_SRC (x), new, 0))
7288 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
7289 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
7290 Require a constant for MULT_VAL, so we know it's nonzero.
7291 ??? Do this only if ADD_VAL is a pointer to avoid a potential
7292 overflow problem. */
7294 for (v = bl->giv; v; v = v->next_iv)
7295 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
7296 && ! v->ignore && ! v->maybe_dead && v->always_computable
7298 && (GET_CODE (v->add_val) == SYMBOL_REF
7299 || GET_CODE (v->add_val) == LABEL_REF
7300 || GET_CODE (v->add_val) == CONST
7301 || (GET_CODE (v->add_val) == REG
7302 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
7304 /* If the giv V had the auto-inc address optimization applied
7305 to it, and INSN occurs between the giv insn and the biv
7306 insn, then we must adjust the value used here.
7307 This is rare, so we don't bother to do so. */
7309 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7310 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7311 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7312 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7318 /* If the giv has the opposite direction of change,
7319 then reverse the comparison. */
7320 if (INTVAL (v->mult_val) < 0)
7321 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
7324 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
7325 copy_rtx (v->add_val));
7327 /* Replace biv with the giv's reduced register. */
7328 update_reg_last_use (v->add_val, insn);
7329 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
7332 /* Insn doesn't support that constant or invariant. Copy it
7333 into a register (it will be a loop invariant.) */
7334 tem = gen_reg_rtx (GET_MODE (v->new_reg));
7336 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
7339 /* Substitute the new register for its invariant value in
7340 the compare expression. */
7341 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
7342 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
7351 case GT: case GE: case GTU: case GEU:
7352 case LT: case LE: case LTU: case LEU:
7353 /* See if either argument is the biv. */
7354 if (XEXP (x, 0) == reg)
7355 arg = XEXP (x, 1), arg_operand = 1;
7356 else if (XEXP (x, 1) == reg)
7357 arg = XEXP (x, 0), arg_operand = 0;
7361 if (CONSTANT_P (arg))
7363 /* First try to replace with any giv that has constant positive
7364 mult_val and constant add_val. We might be able to support
7365 negative mult_val, but it seems complex to do it in general. */
7367 for (v = bl->giv; v; v = v->next_iv)
7368 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
7369 && (GET_CODE (v->add_val) == SYMBOL_REF
7370 || GET_CODE (v->add_val) == LABEL_REF
7371 || GET_CODE (v->add_val) == CONST
7372 || (GET_CODE (v->add_val) == REG
7373 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
7374 && ! v->ignore && ! v->maybe_dead && v->always_computable
7377 /* If the giv V had the auto-inc address optimization applied
7378 to it, and INSN occurs between the giv insn and the biv
7379 insn, then we must adjust the value used here.
7380 This is rare, so we don't bother to do so. */
7382 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7383 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7384 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7385 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7391 /* Replace biv with the giv's reduced reg. */
7392 XEXP (x, 1-arg_operand) = v->new_reg;
7394 /* If all constants are actually constant integers and
7395 the derived constant can be directly placed in the COMPARE,
7397 if (GET_CODE (arg) == CONST_INT
7398 && GET_CODE (v->mult_val) == CONST_INT
7399 && GET_CODE (v->add_val) == CONST_INT
7400 && validate_change (insn, &XEXP (x, arg_operand),
7401 GEN_INT (INTVAL (arg)
7402 * INTVAL (v->mult_val)
7403 + INTVAL (v->add_val)), 0))
7406 /* Otherwise, load it into a register. */
7407 tem = gen_reg_rtx (mode);
7408 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
7409 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
7412 /* If that failed, put back the change we made above. */
7413 XEXP (x, 1-arg_operand) = reg;
7416 /* Look for giv with positive constant mult_val and nonconst add_val.
7417 Insert insns to calculate new compare value.
7418 ??? Turn this off due to possible overflow. */
7420 for (v = bl->giv; v; v = v->next_iv)
7421 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
7422 && ! v->ignore && ! v->maybe_dead && v->always_computable
7428 /* If the giv V had the auto-inc address optimization applied
7429 to it, and INSN occurs between the giv insn and the biv
7430 insn, then we must adjust the value used here.
7431 This is rare, so we don't bother to do so. */
7433 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7434 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7435 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7436 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7442 tem = gen_reg_rtx (mode);
7444 /* Replace biv with giv's reduced register. */
7445 validate_change (insn, &XEXP (x, 1 - arg_operand),
7448 /* Compute value to compare against. */
7449 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
7450 /* Use it in this insn. */
7451 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
7452 if (apply_change_group ())
7456 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
7458 if (invariant_p (arg) == 1)
7460 /* Look for giv with constant positive mult_val and nonconst
7461 add_val. Insert insns to compute new compare value.
7462 ??? Turn this off due to possible overflow. */
7464 for (v = bl->giv; v; v = v->next_iv)
7465 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
7466 && ! v->ignore && ! v->maybe_dead && v->always_computable
7472 /* If the giv V had the auto-inc address optimization applied
7473 to it, and INSN occurs between the giv insn and the biv
7474 insn, then we must adjust the value used here.
7475 This is rare, so we don't bother to do so. */
7477 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7478 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7479 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7480 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7486 tem = gen_reg_rtx (mode);
7488 /* Replace biv with giv's reduced register. */
7489 validate_change (insn, &XEXP (x, 1 - arg_operand),
7492 /* Compute value to compare against. */
7493 emit_iv_add_mult (arg, v->mult_val, v->add_val,
7495 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
7496 if (apply_change_group ())
7501 /* This code has problems. Basically, you can't know when
7502 seeing if we will eliminate BL, whether a particular giv
7503 of ARG will be reduced. If it isn't going to be reduced,
7504 we can't eliminate BL. We can try forcing it to be reduced,
7505 but that can generate poor code.
7507 The problem is that the benefit of reducing TV, below should
7508 be increased if BL can actually be eliminated, but this means
7509 we might have to do a topological sort of the order in which
7510 we try to process biv. It doesn't seem worthwhile to do
7511 this sort of thing now. */
7514 /* Otherwise the reg compared with had better be a biv. */
7515 if (GET_CODE (arg) != REG
7516 || reg_iv_type[REGNO (arg)] != BASIC_INDUCT)
7519 /* Look for a pair of givs, one for each biv,
7520 with identical coefficients. */
7521 for (v = bl->giv; v; v = v->next_iv)
7523 struct induction *tv;
7525 if (v->ignore || v->maybe_dead || v->mode != mode)
7528 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
7529 if (! tv->ignore && ! tv->maybe_dead
7530 && rtx_equal_p (tv->mult_val, v->mult_val)
7531 && rtx_equal_p (tv->add_val, v->add_val)
7532 && tv->mode == mode)
7534 /* If the giv V had the auto-inc address optimization applied
7535 to it, and INSN occurs between the giv insn and the biv
7536 insn, then we must adjust the value used here.
7537 This is rare, so we don't bother to do so. */
7539 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7540 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7541 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7542 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7548 /* Replace biv with its giv's reduced reg. */
7549 XEXP (x, 1-arg_operand) = v->new_reg;
7550 /* Replace other operand with the other giv's
7552 XEXP (x, arg_operand) = tv->new_reg;
7559 /* If we get here, the biv can't be eliminated. */
7563 /* If this address is a DEST_ADDR giv, it doesn't matter if the
7564 biv is used in it, since it will be replaced. */
7565 for (v = bl->giv; v; v = v->next_iv)
7566 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
7574 /* See if any subexpression fails elimination. */
7575 fmt = GET_RTX_FORMAT (code);
7576 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7581 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
7582 eliminate_p, where))
7587 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7588 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
7589 eliminate_p, where))
7598 /* Return nonzero if the last use of REG
7599 is in an insn following INSN in the same basic block. */
7602 last_use_this_basic_block (reg, insn)
7608 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
7611 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
7617 /* Called via `note_stores' to record the initial value of a biv. Here we
7618 just record the location of the set and process it later. */
7621 record_initial (dest, set)
7625 struct iv_class *bl;
7627 if (GET_CODE (dest) != REG
7628 || REGNO (dest) >= max_reg_before_loop
7629 || reg_iv_type[REGNO (dest)] != BASIC_INDUCT)
7632 bl = reg_biv_class[REGNO (dest)];
7634 /* If this is the first set found, record it. */
7635 if (bl->init_insn == 0)
7637 bl->init_insn = note_insn;
7642 /* If any of the registers in X are "old" and currently have a last use earlier
7643 than INSN, update them to have a last use of INSN. Their actual last use
7644 will be the previous insn but it will not have a valid uid_luid so we can't
7648 update_reg_last_use (x, insn)
7652 /* Check for the case where INSN does not have a valid luid. In this case,
7653 there is no need to modify the regno_last_uid, as this can only happen
7654 when code is inserted after the loop_end to set a pseudo's final value,
7655 and hence this insn will never be the last use of x. */
7656 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
7657 && INSN_UID (insn) < max_uid_for_loop
7658 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
7659 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
7663 register char *fmt = GET_RTX_FORMAT (GET_CODE (x));
7664 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
7667 update_reg_last_use (XEXP (x, i), insn);
7668 else if (fmt[i] == 'E')
7669 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7670 update_reg_last_use (XVECEXP (x, i, j), insn);
7675 /* Given a jump insn JUMP, return the condition that will cause it to branch
7676 to its JUMP_LABEL. If the condition cannot be understood, or is an
7677 inequality floating-point comparison which needs to be reversed, 0 will
7680 If EARLIEST is non-zero, it is a pointer to a place where the earliest
7681 insn used in locating the condition was found. If a replacement test
7682 of the condition is desired, it should be placed in front of that
7683 insn and we will be sure that the inputs are still valid.
7685 The condition will be returned in a canonical form to simplify testing by
7686 callers. Specifically:
7688 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
7689 (2) Both operands will be machine operands; (cc0) will have been replaced.
7690 (3) If an operand is a constant, it will be the second operand.
7691 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
7692 for GE, GEU, and LEU. */
7695 get_condition (jump, earliest)
7704 int reverse_code = 0;
7705 int did_reverse_condition = 0;
7706 enum machine_mode mode;
7708 /* If this is not a standard conditional jump, we can't parse it. */
7709 if (GET_CODE (jump) != JUMP_INSN
7710 || ! condjump_p (jump) || simplejump_p (jump))
7713 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
7714 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
7715 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
7716 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
7721 /* If this branches to JUMP_LABEL when the condition is false, reverse
7723 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
7724 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
7725 code = reverse_condition (code), did_reverse_condition ^= 1;
7727 /* If we are comparing a register with zero, see if the register is set
7728 in the previous insn to a COMPARE or a comparison operation. Perform
7729 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
7732 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
7734 /* Set non-zero when we find something of interest. */
7738 /* If comparison with cc0, import actual comparison from compare
7742 if ((prev = prev_nonnote_insn (prev)) == 0
7743 || GET_CODE (prev) != INSN
7744 || (set = single_set (prev)) == 0
7745 || SET_DEST (set) != cc0_rtx)
7748 op0 = SET_SRC (set);
7749 op1 = CONST0_RTX (GET_MODE (op0));
7755 /* If this is a COMPARE, pick up the two things being compared. */
7756 if (GET_CODE (op0) == COMPARE)
7758 op1 = XEXP (op0, 1);
7759 op0 = XEXP (op0, 0);
7762 else if (GET_CODE (op0) != REG)
7765 /* Go back to the previous insn. Stop if it is not an INSN. We also
7766 stop if it isn't a single set or if it has a REG_INC note because
7767 we don't want to bother dealing with it. */
7769 if ((prev = prev_nonnote_insn (prev)) == 0
7770 || GET_CODE (prev) != INSN
7771 || FIND_REG_INC_NOTE (prev, 0)
7772 || (set = single_set (prev)) == 0)
7775 /* If this is setting OP0, get what it sets it to if it looks
7777 if (rtx_equal_p (SET_DEST (set), op0))
7779 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
7781 /* ??? We may not combine comparisons done in a CCmode with
7782 comparisons not done in a CCmode. This is to aid targets
7783 like Alpha that have an IEEE compliant EQ instruction, and
7784 a non-IEEE compliant BEQ instruction. The use of CCmode is
7785 actually artificial, simply to prevent the combination, but
7786 should not affect other platforms.
7788 However, we must allow VOIDmode comparisons to match either
7789 CCmode or non-CCmode comparison, because some ports have
7790 modeless comparisons inside branch patterns.
7792 ??? This mode check should perhaps look more like the mode check
7793 in simplify_comparison in combine. */
7795 if ((GET_CODE (SET_SRC (set)) == COMPARE
7798 && GET_MODE_CLASS (inner_mode) == MODE_INT
7799 && (GET_MODE_BITSIZE (inner_mode)
7800 <= HOST_BITS_PER_WIDE_INT)
7801 && (STORE_FLAG_VALUE
7802 & ((HOST_WIDE_INT) 1
7803 << (GET_MODE_BITSIZE (inner_mode) - 1))))
7804 #ifdef FLOAT_STORE_FLAG_VALUE
7806 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
7807 && FLOAT_STORE_FLAG_VALUE < 0)
7810 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
7811 && (((GET_MODE_CLASS (mode) == MODE_CC)
7812 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
7813 || mode == VOIDmode || inner_mode == VOIDmode))
7815 else if (((code == EQ
7817 && (GET_MODE_BITSIZE (inner_mode)
7818 <= HOST_BITS_PER_WIDE_INT)
7819 && GET_MODE_CLASS (inner_mode) == MODE_INT
7820 && (STORE_FLAG_VALUE
7821 & ((HOST_WIDE_INT) 1
7822 << (GET_MODE_BITSIZE (inner_mode) - 1))))
7823 #ifdef FLOAT_STORE_FLAG_VALUE
7825 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
7826 && FLOAT_STORE_FLAG_VALUE < 0)
7829 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
7830 && (((GET_MODE_CLASS (mode) == MODE_CC)
7831 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
7832 || mode == VOIDmode || inner_mode == VOIDmode))
7835 /* We might have reversed a LT to get a GE here. But this wasn't
7836 actually the comparison of data, so we don't flag that we
7837 have had to reverse the condition. */
7838 did_reverse_condition ^= 1;
7846 else if (reg_set_p (op0, prev))
7847 /* If this sets OP0, but not directly, we have to give up. */
7852 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
7853 code = GET_CODE (x);
7856 code = reverse_condition (code);
7857 did_reverse_condition ^= 1;
7861 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
7867 /* If constant is first, put it last. */
7868 if (CONSTANT_P (op0))
7869 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
7871 /* If OP0 is the result of a comparison, we weren't able to find what
7872 was really being compared, so fail. */
7873 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
7876 /* Canonicalize any ordered comparison with integers involving equality
7877 if we can do computations in the relevant mode and we do not
7880 if (GET_CODE (op1) == CONST_INT
7881 && GET_MODE (op0) != VOIDmode
7882 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
7884 HOST_WIDE_INT const_val = INTVAL (op1);
7885 unsigned HOST_WIDE_INT uconst_val = const_val;
7886 unsigned HOST_WIDE_INT max_val
7887 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
7892 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
7893 code = LT, op1 = GEN_INT (const_val + 1);
7896 /* When cross-compiling, const_val might be sign-extended from
7897 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
7899 if ((HOST_WIDE_INT) (const_val & max_val)
7900 != (((HOST_WIDE_INT) 1
7901 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
7902 code = GT, op1 = GEN_INT (const_val - 1);
7906 if (uconst_val < max_val)
7907 code = LTU, op1 = GEN_INT (uconst_val + 1);
7911 if (uconst_val != 0)
7912 code = GTU, op1 = GEN_INT (uconst_val - 1);
7920 /* If this was floating-point and we reversed anything other than an
7921 EQ or NE, return zero. */
7922 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
7923 && did_reverse_condition && code != NE && code != EQ
7925 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
7929 /* Never return CC0; return zero instead. */
7934 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
7937 /* Similar to above routine, except that we also put an invariant last
7938 unless both operands are invariants. */
7941 get_condition_for_loop (x)
7944 rtx comparison = get_condition (x, NULL_PTR);
7947 || ! invariant_p (XEXP (comparison, 0))
7948 || invariant_p (XEXP (comparison, 1)))
7951 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
7952 XEXP (comparison, 1), XEXP (comparison, 0));
7955 #ifdef HAVE_decrement_and_branch_on_count
7956 /* Instrument loop for insertion of bct instruction. We distinguish between
7957 loops with compile-time bounds and those with run-time bounds.
7958 Information from loop_iterations() is used to compute compile-time bounds.
7959 Run-time bounds should use loop preconditioning, but currently ignored.
7963 insert_bct (loop_start, loop_end, loop_info)
7964 rtx loop_start, loop_end;
7965 struct loop_info *loop_info;
7968 unsigned HOST_WIDE_INT n_iterations;
7970 int increment_direction, compare_direction;
7972 /* If the loop condition is <= or >=, the number of iteration
7973 is 1 more than the range of the bounds of the loop. */
7974 int add_iteration = 0;
7976 enum machine_mode loop_var_mode = word_mode;
7978 int loop_num = uid_loop_num [INSN_UID (loop_start)];
7980 /* It's impossible to instrument a competely unrolled loop. */
7981 if (loop_info->unroll_number == -1)
7984 /* Make sure that the count register is not in use. */
7985 if (loop_used_count_register [loop_num])
7987 if (loop_dump_stream)
7988 fprintf (loop_dump_stream,
7989 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
7994 /* Make sure that the function has no indirect jumps. */
7995 if (indirect_jump_in_function)
7997 if (loop_dump_stream)
7998 fprintf (loop_dump_stream,
7999 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
8004 /* Make sure that the last loop insn is a conditional jump. */
8005 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
8006 || ! condjump_p (PREV_INSN (loop_end))
8007 || simplejump_p (PREV_INSN (loop_end)))
8009 if (loop_dump_stream)
8010 fprintf (loop_dump_stream,
8011 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
8016 /* Make sure that the loop does not contain a function call
8017 (the count register might be altered by the called function). */
8020 if (loop_dump_stream)
8021 fprintf (loop_dump_stream,
8022 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
8027 /* Make sure that the loop does not jump via a table.
8028 (the count register might be used to perform the branch on table). */
8029 if (loop_has_tablejump)
8031 if (loop_dump_stream)
8032 fprintf (loop_dump_stream,
8033 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
8038 /* Account for loop unrolling in instrumented iteration count. */
8039 if (loop_info->unroll_number > 1)
8040 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
8042 n_iterations = loop_info->n_iterations;
8044 if (n_iterations != 0 && n_iterations < 3)
8046 /* Allow an enclosing outer loop to benefit if possible. */
8047 if (loop_dump_stream)
8048 fprintf (loop_dump_stream,
8049 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
8054 /* Try to instrument the loop. */
8056 /* Handle the simpler case, where the bounds are known at compile time. */
8057 if (n_iterations > 0)
8059 /* Mark all enclosing loops that they cannot use count register. */
8060 for (i = loop_num; i != -1; i = loop_outer_loop[i])
8061 loop_used_count_register[i] = 1;
8062 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
8066 /* Handle the more complex case, that the bounds are NOT known
8067 at compile time. In this case we generate run_time calculation
8068 of the number of iterations. */
8070 if (loop_info->iteration_var == 0)
8072 if (loop_dump_stream)
8073 fprintf (loop_dump_stream,
8074 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
8079 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
8080 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
8082 if (loop_dump_stream)
8083 fprintf (loop_dump_stream,
8084 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
8089 /* With runtime bounds, if the compare is of the form '!=' we give up */
8090 if (loop_info->comparison_code == NE)
8092 if (loop_dump_stream)
8093 fprintf (loop_dump_stream,
8094 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
8098 /* Use common loop preconditioning code instead. */
8102 /* We rely on the existence of run-time guard to ensure that the
8103 loop executes at least once. */
8105 rtx iterations_num_reg;
8107 unsigned HOST_WIDE_INT increment_value_abs
8108 = INTVAL (increment) * increment_direction;
8110 /* make sure that the increment is a power of two, otherwise (an
8111 expensive) divide is needed. */
8112 if (exact_log2 (increment_value_abs) == -1)
8114 if (loop_dump_stream)
8115 fprintf (loop_dump_stream,
8116 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
8120 /* compute the number of iterations */
8125 /* Again, the number of iterations is calculated by:
8127 ; compare-val - initial-val + (increment -1) + additional-iteration
8128 ; num_iterations = -----------------------------------------------------------------
8131 /* ??? Do we have to call copy_rtx here before passing rtx to
8133 if (compare_direction > 0)
8135 /* <, <= :the loop variable is increasing */
8136 temp_reg = expand_binop (loop_var_mode, sub_optab,
8137 comparison_value, initial_value,
8138 NULL_RTX, 0, OPTAB_LIB_WIDEN);
8142 temp_reg = expand_binop (loop_var_mode, sub_optab,
8143 initial_value, comparison_value,
8144 NULL_RTX, 0, OPTAB_LIB_WIDEN);
8147 if (increment_value_abs - 1 + add_iteration != 0)
8148 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
8149 GEN_INT (increment_value_abs - 1
8151 NULL_RTX, 0, OPTAB_LIB_WIDEN);
8153 if (increment_value_abs != 1)
8155 /* ??? This will generate an expensive divide instruction for
8156 most targets. The original authors apparently expected this
8157 to be a shift, since they test for power-of-2 divisors above,
8158 but just naively generating a divide instruction will not give
8159 a shift. It happens to work for the PowerPC target because
8160 the rs6000.md file has a divide pattern that emits shifts.
8161 It will probably not work for any other target. */
8162 iterations_num_reg = expand_binop (loop_var_mode, sdiv_optab,
8164 GEN_INT (increment_value_abs),
8165 NULL_RTX, 0, OPTAB_LIB_WIDEN);
8168 iterations_num_reg = temp_reg;
8170 sequence = gen_sequence ();
8172 emit_insn_before (sequence, loop_start);
8173 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
8177 #endif /* Complex case */
8180 /* Instrument loop by inserting a bct in it as follows:
8181 1. A new counter register is created.
8182 2. In the head of the loop the new variable is initialized to the value
8183 passed in the loop_num_iterations parameter.
8184 3. At the end of the loop, comparison of the register with 0 is generated.
8185 The created comparison follows the pattern defined for the
8186 decrement_and_branch_on_count insn, so this insn will be generated.
8187 4. The branch on the old variable are deleted. The compare must remain
8188 because it might be used elsewhere. If the loop-variable or condition
8189 register are used elsewhere, they will be eliminated by flow. */
8192 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
8193 rtx loop_start, loop_end;
8194 rtx loop_num_iterations;
8200 if (HAVE_decrement_and_branch_on_count)
8202 if (loop_dump_stream)
8204 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
8205 if (GET_CODE (loop_num_iterations) == CONST_INT)
8206 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
8207 INTVAL (loop_num_iterations));
8209 fputs ("runtime", loop_dump_stream);
8210 fputs (" iterations)", loop_dump_stream);
8213 /* Discard original jump to continue loop. Original compare result
8214 may still be live, so it cannot be discarded explicitly. */
8215 delete_insn (PREV_INSN (loop_end));
8217 /* Insert the label which will delimit the start of the loop. */
8218 start_label = gen_label_rtx ();
8219 emit_label_after (start_label, loop_start);
8221 /* Insert initialization of the count register into the loop header. */
8223 counter_reg = gen_reg_rtx (word_mode);
8224 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
8225 sequence = gen_sequence ();
8227 emit_insn_before (sequence, loop_start);
8229 /* Insert new comparison on the count register instead of the
8230 old one, generating the needed BCT pattern (that will be
8231 later recognized by assembly generation phase). */
8232 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
8235 LABEL_NUSES (start_label)++;
8239 #endif /* HAVE_decrement_and_branch_on_count */
8241 /* Scan the function and determine whether it has indirect (computed) jumps.
8243 This is taken mostly from flow.c; similar code exists elsewhere
8244 in the compiler. It may be useful to put this into rtlanal.c. */
8246 indirect_jump_in_function_p (start)
8251 for (insn = start; insn; insn = NEXT_INSN (insn))
8252 if (computed_jump_p (insn))
8258 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
8259 documentation for LOOP_MEMS for the definition of `appropriate'.
8260 This function is called from prescan_loop via for_each_rtx. */
8263 insert_loop_mem (mem, data)
8265 void *data ATTRIBUTE_UNUSED;
8273 switch (GET_CODE (m))
8279 /* We're not interested in the MEM associated with a
8280 CONST_DOUBLE, so there's no need to traverse into this. */
8284 /* This is not a MEM. */
8288 /* See if we've already seen this MEM. */
8289 for (i = 0; i < loop_mems_idx; ++i)
8290 if (rtx_equal_p (m, loop_mems[i].mem))
8292 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
8293 /* The modes of the two memory accesses are different. If
8294 this happens, something tricky is going on, and we just
8295 don't optimize accesses to this MEM. */
8296 loop_mems[i].optimize = 0;
8301 /* Resize the array, if necessary. */
8302 if (loop_mems_idx == loop_mems_allocated)
8304 if (loop_mems_allocated != 0)
8305 loop_mems_allocated *= 2;
8307 loop_mems_allocated = 32;
8309 loop_mems = (loop_mem_info*)
8310 xrealloc (loop_mems,
8311 loop_mems_allocated * sizeof (loop_mem_info));
8314 /* Actually insert the MEM. */
8315 loop_mems[loop_mems_idx].mem = m;
8316 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
8317 because we can't put it in a register. We still store it in the
8318 table, though, so that if we see the same address later, but in a
8319 non-BLK mode, we'll not think we can optimize it at that point. */
8320 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
8321 loop_mems[loop_mems_idx].reg = NULL_RTX;
8327 /* Like load_mems, but also ensures that N_TIMES_SET,
8328 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
8329 values after load_mems. */
8332 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top, start,
8333 reg_single_usage, insn_count)
8338 varray_type reg_single_usage;
8341 int nregs = max_reg_num ();
8343 load_mems (scan_start, end, loop_top, start);
8345 /* Recalculate n_times_set and friends since load_mems may have
8346 created new registers. */
8347 if (max_reg_num () > nregs)
8353 nregs = max_reg_num ();
8355 if ((unsigned) nregs > n_times_set->num_elements)
8357 /* Grow all the arrays. */
8358 VARRAY_GROW (n_times_set, nregs);
8359 VARRAY_GROW (n_times_used, nregs);
8360 VARRAY_GROW (may_not_optimize, nregs);
8361 if (reg_single_usage)
8362 VARRAY_GROW (reg_single_usage, nregs);
8364 /* Clear the arrays */
8365 bzero ((char *) &n_times_set->data, nregs * sizeof (int));
8366 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
8367 if (reg_single_usage)
8368 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
8370 count_loop_regs_set (loop_top ? loop_top : start, end,
8371 may_not_optimize, reg_single_usage,
8374 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8376 VARRAY_CHAR (may_not_optimize, i) = 1;
8377 VARRAY_INT (n_times_set, i) = 1;
8380 #ifdef AVOID_CCMODE_COPIES
8381 /* Don't try to move insns which set CC registers if we should not
8382 create CCmode register copies. */
8383 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
8384 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
8385 VARRAY_CHAR (may_not_optimize, i) = 1;
8388 /* Set n_times_used for the new registers. */
8389 bcopy ((char *) (&n_times_set->data.i[0] + old_nregs),
8390 (char *) (&n_times_used->data.i[0] + old_nregs),
8391 (nregs - old_nregs) * sizeof (int));
8395 /* Move MEMs into registers for the duration of the loop. SCAN_START
8396 is the first instruction in the loop (as it is executed). The
8397 other parameters are as for next_insn_in_loop. */
8400 load_mems (scan_start, end, loop_top, start)
8406 int maybe_never = 0;
8409 rtx label = NULL_RTX;
8412 if (loop_mems_idx > 0)
8414 /* Nonzero if the next instruction may never be executed. */
8415 int next_maybe_never = 0;
8417 /* Check to see if it's possible that some instructions in the
8418 loop are never executed. */
8419 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
8420 p != NULL_RTX && !maybe_never;
8421 p = next_insn_in_loop (p, scan_start, end, loop_top))
8423 if (GET_CODE (p) == CODE_LABEL)
8425 else if (GET_CODE (p) == JUMP_INSN
8426 /* If we enter the loop in the middle, and scan
8427 around to the beginning, don't set maybe_never
8428 for that. This must be an unconditional jump,
8429 otherwise the code at the top of the loop might
8430 never be executed. Unconditional jumps are
8431 followed a by barrier then loop end. */
8432 && ! (GET_CODE (p) == JUMP_INSN
8433 && JUMP_LABEL (p) == loop_top
8434 && NEXT_INSN (NEXT_INSN (p)) == end
8435 && simplejump_p (p)))
8437 if (!condjump_p (p))
8438 /* Something complicated. */
8441 /* If there are any more instructions in the loop, they
8442 might not be reached. */
8443 next_maybe_never = 1;
8445 else if (next_maybe_never)
8449 /* Actually move the MEMs. */
8450 for (i = 0; i < loop_mems_idx; ++i)
8455 rtx mem = loop_mems[i].mem;
8457 if (MEM_VOLATILE_P (mem)
8458 || invariant_p (XEXP (mem, 0)) != 1)
8459 /* There's no telling whether or not MEM is modified. */
8460 loop_mems[i].optimize = 0;
8462 /* Go through the MEMs written to in the loop to see if this
8463 one is aliased by one of them. */
8464 for (j = 0; j < loop_store_mems_idx; ++j)
8466 if (rtx_equal_p (mem, loop_store_mems[j]))
8468 else if (true_dependence (loop_store_mems[j], VOIDmode,
8471 /* MEM is indeed aliased by this store. */
8472 loop_mems[i].optimize = 0;
8477 /* If this MEM is written to, we must be sure that there
8478 are no reads from another MEM that aliases this one. */
8479 if (loop_mems[i].optimize && written)
8483 for (j = 0; j < loop_mems_idx; ++j)
8487 else if (true_dependence (mem,
8492 /* It's not safe to hoist loop_mems[i] out of
8493 the loop because writes to it might not be
8494 seen by reads from loop_mems[j]. */
8495 loop_mems[i].optimize = 0;
8501 if (maybe_never && may_trap_p (mem))
8502 /* We can't access the MEM outside the loop; it might
8503 cause a trap that wouldn't have happened otherwise. */
8504 loop_mems[i].optimize = 0;
8506 if (!loop_mems[i].optimize)
8507 /* We thought we were going to lift this MEM out of the
8508 loop, but later discovered that we could not. */
8511 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
8512 order to keep scan_loop from moving stores to this MEM
8513 out of the loop just because this REG is neither a
8514 user-variable nor used in the loop test. */
8515 reg = gen_reg_rtx (GET_MODE (mem));
8516 REG_USERVAR_P (reg) = 1;
8517 loop_mems[i].reg = reg;
8519 /* Now, replace all references to the MEM with the
8520 corresponding pesudos. */
8521 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
8523 p = next_insn_in_loop (p, scan_start, end, loop_top))
8528 for_each_rtx (&p, replace_loop_mem, &ri);
8531 if (!apply_change_group ())
8532 /* We couldn't replace all occurrences of the MEM. */
8533 loop_mems[i].optimize = 0;
8538 /* Load the memory immediately before START, which is
8539 the NOTE_LOOP_BEG. */
8540 set = gen_rtx_SET (GET_MODE (reg), reg, mem);
8541 emit_insn_before (set, start);
8545 if (label == NULL_RTX)
8547 /* We must compute the former
8548 right-after-the-end label before we insert
8550 end_label = next_label (end);
8551 label = gen_label_rtx ();
8552 emit_label_after (label, end);
8555 /* Store the memory immediately after END, which is
8556 the NOTE_LOOP_END. */
8557 set = gen_rtx_SET (GET_MODE (reg), copy_rtx (mem), reg);
8558 emit_insn_after (set, label);
8561 if (loop_dump_stream)
8563 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
8564 REGNO (reg), (written ? "r/w" : "r/o"));
8565 print_rtl (loop_dump_stream, mem);
8566 fputc ('\n', loop_dump_stream);
8572 if (label != NULL_RTX)
8574 /* Now, we need to replace all references to the previous exit
8575 label with the new one. */
8580 for (p = start; p != end; p = NEXT_INSN (p))
8582 for_each_rtx (&p, replace_label, &rr);
8584 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
8585 field. This is not handled by for_each_rtx because it doesn't
8586 handle unprinted ('0') fields. We need to update JUMP_LABEL
8587 because the immediately following unroll pass will use it.
8588 replace_label would not work anyways, because that only handles
8590 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
8591 JUMP_LABEL (p) = label;
8596 /* Replace MEM with its associated pseudo register. This function is
8597 called from load_mems via for_each_rtx. DATA is actually an
8598 rtx_and_int * describing the instruction currently being scanned
8599 and the MEM we are currently replacing. */
8602 replace_loop_mem (mem, data)
8614 switch (GET_CODE (m))
8620 /* We're not interested in the MEM associated with a
8621 CONST_DOUBLE, so there's no need to traverse into one. */
8625 /* This is not a MEM. */
8629 ri = (rtx_and_int*) data;
8632 if (!rtx_equal_p (loop_mems[i].mem, m))
8633 /* This is not the MEM we are currently replacing. */
8638 /* Actually replace the MEM. */
8639 validate_change (insn, mem, loop_mems[i].reg, 1);
8644 /* Replace occurrences of the old exit label for the loop with the new
8645 one. DATA is an rtx_pair containing the old and new labels,
8649 replace_label (x, data)
8654 rtx old_label = ((rtx_pair*) data)->r1;
8655 rtx new_label = ((rtx_pair*) data)->r2;
8660 if (GET_CODE (l) != LABEL_REF)
8663 if (XEXP (l, 0) != old_label)
8666 XEXP (l, 0) = new_label;
8667 ++LABEL_NUSES (new_label);
8668 --LABEL_NUSES (old_label);