1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
53 /* Vector mapping INSN_UIDs to luids.
54 The luids are like uids but increase monotonically always.
55 We use them to see whether a jump comes from outside a given loop. */
59 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
60 number the insn is contained in. */
64 /* 1 + largest uid of any insn. */
68 /* 1 + luid of last insn. */
72 /* Number of loops detected in current function. Used as index to the
75 static int max_loop_num;
77 /* Indexed by loop number, contains the first and last insn of each loop. */
79 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
81 /* For each loop, gives the containing loop number, -1 if none. */
86 /* The main output of analyze_loop_iterations is placed here */
88 int *loop_can_insert_bct;
90 /* For each loop, determines whether some of its inner loops has used
93 int *loop_used_count_register;
95 /* loop parameters for arithmetic loops. These loops have a loop variable
96 which is initialized to loop_start_value, incremented in each iteration
97 by "loop_increment". At the end of the iteration the loop variable is
98 compared to the loop_comparison_value (using loop_comparison_code). */
101 rtx *loop_comparison_value;
102 rtx *loop_start_value;
103 enum rtx_code *loop_comparison_code;
106 /* For each loop, keep track of its unrolling factor.
110 -1: completely unrolled
111 >0: holds the unroll exact factor. */
112 int *loop_unroll_factor;
114 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
115 really a loop (an insn outside the loop branches into it). */
117 static char *loop_invalid;
119 /* Indexed by loop number, links together all LABEL_REFs which refer to
120 code labels outside the loop. Used by routines that need to know all
121 loop exits, such as final_biv_value and final_giv_value.
123 This does not include loop exits due to return instructions. This is
124 because all bivs and givs are pseudos, and hence must be dead after a
125 return, so the presense of a return does not affect any of the
126 optimizations that use this info. It is simpler to just not include return
127 instructions on this list. */
129 rtx *loop_number_exit_labels;
131 /* Indexed by loop number, counts the number of LABEL_REFs on
132 loop_number_exit_labels for this loop and all loops nested inside it. */
134 int *loop_number_exit_count;
136 /* Holds the number of loop iterations. It is zero if the number could not be
137 calculated. Must be unsigned since the number of iterations can
138 be as high as 2^wordsize-1. For loops with a wider iterator, this number
139 will be zero if the number of loop iterations is too large for an
140 unsigned integer to hold. */
142 unsigned HOST_WIDE_INT loop_n_iterations;
144 /* Nonzero if there is a subroutine call in the current loop. */
146 static int loop_has_call;
148 /* Nonzero if there is a volatile memory reference in the current
151 static int loop_has_volatile;
153 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
154 current loop. A continue statement will generate a branch to
155 NEXT_INSN (loop_continue). */
157 static rtx loop_continue;
159 /* Indexed by register number, contains the number of times the reg
160 is set during the loop being scanned.
161 During code motion, a negative value indicates a reg that has been
162 made a candidate; in particular -2 means that it is an candidate that
163 we know is equal to a constant and -1 means that it is an candidate
164 not known equal to a constant.
165 After code motion, regs moved have 0 (which is accurate now)
166 while the failed candidates have the original number of times set.
168 Therefore, at all times, == 0 indicates an invariant register;
169 < 0 a conditionally invariant one. */
171 static int *n_times_set;
173 /* Original value of n_times_set; same except that this value
174 is not set negative for a reg whose sets have been made candidates
175 and not set to 0 for a reg that is moved. */
177 static int *n_times_used;
179 /* Index by register number, 1 indicates that the register
180 cannot be moved or strength reduced. */
182 static char *may_not_optimize;
184 /* Nonzero means reg N has already been moved out of one loop.
185 This reduces the desire to move it out of another. */
187 static char *moved_once;
189 /* Array of MEMs that are stored in this loop. If there are too many to fit
190 here, we just turn on unknown_address_altered. */
192 #define NUM_STORES 30
193 static rtx loop_store_mems[NUM_STORES];
195 /* Index of first available slot in above array. */
196 static int loop_store_mems_idx;
198 typedef struct loop_mem_info {
199 rtx mem; /* The MEM itself. */
200 rtx reg; /* Corresponding pseudo, if any. */
201 int optimize; /* Nonzero if we can optimize access to this MEM. */
204 /* Array of MEMs that are used (read or written) in this loop, but
205 cannot be aliased by anything in this loop, except perhaps
206 themselves. In other words, if loop_mems[i] is altered during the
207 loop, it is altered by an expression that is rtx_equal_p to it. */
209 static loop_mem_info *loop_mems;
211 /* The index of the next available slot in LOOP_MEMS. */
213 static int loop_mems_idx;
215 /* The number of elements allocated in LOOP_MEMs. */
217 static int loop_mems_allocated;
219 /* Nonzero if we don't know what MEMs were changed in the current loop.
220 This happens if the loop contains a call (in which case `loop_has_call'
221 will also be set) or if we store into more than NUM_STORES MEMs. */
223 static int unknown_address_altered;
225 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
226 static int num_movables;
228 /* Count of memory write instructions discovered in the loop. */
229 static int num_mem_sets;
231 /* Number of loops contained within the current one, including itself. */
232 static int loops_enclosed;
234 /* Bound on pseudo register number before loop optimization.
235 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
236 int max_reg_before_loop;
238 /* This obstack is used in product_cheap_p to allocate its rtl. It
239 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
240 If we used the same obstack that it did, we would be deallocating
243 static struct obstack temp_obstack;
245 /* This is where the pointer to the obstack being used for RTL is stored. */
247 extern struct obstack *rtl_obstack;
249 #define obstack_chunk_alloc xmalloc
250 #define obstack_chunk_free free
252 /* During the analysis of a loop, a chain of `struct movable's
253 is made to record all the movable insns found.
254 Then the entire chain can be scanned to decide which to move. */
258 rtx insn; /* A movable insn */
259 rtx set_src; /* The expression this reg is set from. */
260 rtx set_dest; /* The destination of this SET. */
261 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
262 of any registers used within the LIBCALL. */
263 int consec; /* Number of consecutive following insns
264 that must be moved with this one. */
265 int regno; /* The register it sets */
266 short lifetime; /* lifetime of that register;
267 may be adjusted when matching movables
268 that load the same value are found. */
269 short savings; /* Number of insns we can move for this reg,
270 including other movables that force this
271 or match this one. */
272 unsigned int cond : 1; /* 1 if only conditionally movable */
273 unsigned int force : 1; /* 1 means MUST move this insn */
274 unsigned int global : 1; /* 1 means reg is live outside this loop */
275 /* If PARTIAL is 1, GLOBAL means something different:
276 that the reg is live outside the range from where it is set
277 to the following label. */
278 unsigned int done : 1; /* 1 inhibits further processing of this */
280 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
281 In particular, moving it does not make it
283 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
284 load SRC, rather than copying INSN. */
285 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
286 first insn of a consecutive sets group. */
287 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
288 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
289 that we should avoid changing when clearing
290 the rest of the reg. */
291 struct movable *match; /* First entry for same value */
292 struct movable *forces; /* An insn that must be moved if this is */
293 struct movable *next;
296 static struct movable *the_movables;
298 FILE *loop_dump_stream;
300 /* Forward declarations. */
302 static void find_and_verify_loops PROTO((rtx));
303 static void mark_loop_jump PROTO((rtx, int));
304 static void prescan_loop PROTO((rtx, rtx));
305 static int reg_in_basic_block_p PROTO((rtx, rtx));
306 static int consec_sets_invariant_p PROTO((rtx, int, rtx));
307 static rtx libcall_other_reg PROTO((rtx, rtx));
308 static int labels_in_range_p PROTO((rtx, int));
309 static void count_loop_regs_set PROTO((rtx, rtx, char *, rtx *, int *, int));
310 static void note_addr_stored PROTO((rtx, rtx));
311 static int loop_reg_used_before_p PROTO((rtx, rtx, rtx, rtx, rtx));
312 static void scan_loop PROTO((rtx, rtx, int));
314 static void replace_call_address PROTO((rtx, rtx, rtx));
316 static rtx skip_consec_insns PROTO((rtx, int));
317 static int libcall_benefit PROTO((rtx));
318 static void ignore_some_movables PROTO((struct movable *));
319 static void force_movables PROTO((struct movable *));
320 static void combine_movables PROTO((struct movable *, int));
321 static int regs_match_p PROTO((rtx, rtx, struct movable *));
322 static int rtx_equal_for_loop_p PROTO((rtx, rtx, struct movable *));
323 static void add_label_notes PROTO((rtx, rtx));
324 static void move_movables PROTO((struct movable *, int, int, rtx, rtx, int));
325 static int count_nonfixed_reads PROTO((rtx));
326 static void strength_reduce PROTO((rtx, rtx, rtx, int, rtx, rtx, int));
327 static void find_single_use_in_loop PROTO((rtx, rtx, rtx *));
328 static int valid_initial_value_p PROTO((rtx, rtx, int, rtx));
329 static void find_mem_givs PROTO((rtx, rtx, int, rtx, rtx));
330 static void record_biv PROTO((struct induction *, rtx, rtx, rtx, rtx, int, int));
331 static void check_final_value PROTO((struct induction *, rtx, rtx));
332 static void record_giv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx, int, enum g_types, int, rtx *, rtx, rtx));
333 static void update_giv_derive PROTO((rtx));
334 static int basic_induction_var PROTO((rtx, enum machine_mode, rtx, rtx, rtx *, rtx *));
335 static rtx simplify_giv_expr PROTO((rtx, int *));
336 static int general_induction_var PROTO((rtx, rtx *, rtx *, rtx *, int, int *));
337 static int consec_sets_giv PROTO((int, rtx, rtx, rtx, rtx *, rtx *));
338 static int check_dbra_loop PROTO((rtx, int, rtx));
339 static rtx express_from_1 PROTO((rtx, rtx, rtx));
340 static rtx express_from PROTO((struct induction *, struct induction *));
341 static rtx combine_givs_p PROTO((struct induction *, struct induction *));
342 static void combine_givs PROTO((struct iv_class *));
343 static int product_cheap_p PROTO((rtx, rtx));
344 static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
345 static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
346 static int last_use_this_basic_block PROTO((rtx, rtx));
347 static void record_initial PROTO((rtx, rtx));
348 static void update_reg_last_use PROTO((rtx, rtx));
349 static rtx next_insn_in_loop PROTO((rtx, rtx, rtx, rtx));
350 static void load_mems_and_recount_loop_regs_set PROTO((rtx, rtx, rtx,
352 static void load_mems PROTO((rtx, rtx, rtx, rtx));
353 static int insert_loop_mem PROTO((rtx *, void *));
354 static int replace_loop_mem PROTO((rtx *, void *));
355 static int replace_label PROTO((rtx *, void *));
357 typedef struct rtx_and_int {
362 typedef struct rtx_pair {
367 /* Nonzero iff INSN is between START and END, inclusive. */
368 #define INSN_IN_RANGE_P(INSN, START, END) \
369 (INSN_UID (INSN) < max_uid_for_loop \
370 && INSN_LUID (INSN) >= INSN_LUID (START) \
371 && INSN_LUID (INSN) <= INSN_LUID (END))
374 /* This is extern from unroll.c */
375 extern void iteration_info PROTO((rtx, rtx *, rtx *, rtx, rtx));
377 /* Two main functions for implementing bct:
378 first - to be called before loop unrolling, and the second - after */
379 #ifdef HAVE_decrement_and_branch_on_count
380 static void analyze_loop_iterations PROTO((rtx, rtx));
381 static void insert_bct PROTO((rtx, rtx));
383 /* Auxiliary function that inserts the bct pattern into the loop */
384 static void instrument_loop_bct PROTO((rtx, rtx, rtx));
385 #endif /* HAVE_decrement_and_branch_on_count */
388 /* Indirect_jump_in_function is computed once per function. */
389 int indirect_jump_in_function = 0;
390 static int indirect_jump_in_function_p PROTO((rtx));
393 /* Relative gain of eliminating various kinds of operations. */
396 static int shift_cost;
397 static int mult_cost;
400 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
401 copy the value of the strength reduced giv to its original register. */
402 static int copy_cost;
404 /* Cost of using a register, to normalize the benefits of a giv. */
405 static int reg_address_cost;
411 char *free_point = (char *) oballoc (1);
412 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
414 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
417 reg_address_cost = ADDRESS_COST (reg);
419 reg_address_cost = rtx_cost (reg, MEM);
422 /* We multiply by 2 to reconcile the difference in scale between
423 these two ways of computing costs. Otherwise the cost of a copy
424 will be far less than the cost of an add. */
428 /* Free the objects we just allocated. */
431 /* Initialize the obstack used for rtl in product_cheap_p. */
432 gcc_obstack_init (&temp_obstack);
435 /* Entry point of this file. Perform loop optimization
436 on the current function. F is the first insn of the function
437 and DUMPFILE is a stream for output of a trace of actions taken
438 (or 0 if none should be output). */
441 loop_optimize (f, dumpfile, unroll_p)
442 /* f is the first instruction of a chain of insns for one function */
451 loop_dump_stream = dumpfile;
453 init_recog_no_volatile ();
455 max_reg_before_loop = max_reg_num ();
457 moved_once = (char *) alloca (max_reg_before_loop);
458 bzero (moved_once, max_reg_before_loop);
462 /* Count the number of loops. */
465 for (insn = f; insn; insn = NEXT_INSN (insn))
467 if (GET_CODE (insn) == NOTE
468 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
472 /* Don't waste time if no loops. */
473 if (max_loop_num == 0)
476 /* Get size to use for tables indexed by uids.
477 Leave some space for labels allocated by find_and_verify_loops. */
478 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
480 uid_luid = (int *) alloca (max_uid_for_loop * sizeof (int));
481 uid_loop_num = (int *) alloca (max_uid_for_loop * sizeof (int));
483 bzero ((char *) uid_luid, max_uid_for_loop * sizeof (int));
484 bzero ((char *) uid_loop_num, max_uid_for_loop * sizeof (int));
486 /* Allocate tables for recording each loop. We set each entry, so they need
488 loop_number_loop_starts = (rtx *) alloca (max_loop_num * sizeof (rtx));
489 loop_number_loop_ends = (rtx *) alloca (max_loop_num * sizeof (rtx));
490 loop_outer_loop = (int *) alloca (max_loop_num * sizeof (int));
491 loop_invalid = (char *) alloca (max_loop_num * sizeof (char));
492 loop_number_exit_labels = (rtx *) alloca (max_loop_num * sizeof (rtx));
493 loop_number_exit_count = (int *) alloca (max_loop_num * sizeof (int));
495 /* This is initialized by the unrolling code, so we go ahead
496 and clear them just in case we are not performing loop
498 loop_unroll_factor = (int *) alloca (max_loop_num *sizeof (int));
499 bzero ((char *) loop_unroll_factor, max_loop_num * sizeof (int));
502 /* Allocate for BCT optimization */
503 loop_can_insert_bct = (int *) alloca (max_loop_num * sizeof (int));
504 bzero ((char *) loop_can_insert_bct, max_loop_num * sizeof (int));
506 loop_used_count_register = (int *) alloca (max_loop_num * sizeof (int));
507 bzero ((char *) loop_used_count_register, max_loop_num * sizeof (int));
509 loop_increment = (rtx *) alloca (max_loop_num * sizeof (rtx));
510 loop_comparison_value = (rtx *) alloca (max_loop_num * sizeof (rtx));
511 loop_start_value = (rtx *) alloca (max_loop_num * sizeof (rtx));
512 bzero ((char *) loop_increment, max_loop_num * sizeof (rtx));
513 bzero ((char *) loop_comparison_value, max_loop_num * sizeof (rtx));
514 bzero ((char *) loop_start_value, max_loop_num * sizeof (rtx));
517 = (enum rtx_code *) alloca (max_loop_num * sizeof (enum rtx_code));
518 bzero ((char *) loop_comparison_code, max_loop_num * sizeof (enum rtx_code));
521 /* Find and process each loop.
522 First, find them, and record them in order of their beginnings. */
523 find_and_verify_loops (f);
525 /* Now find all register lifetimes. This must be done after
526 find_and_verify_loops, because it might reorder the insns in the
528 reg_scan (f, max_reg_num (), 1);
530 /* This must occur after reg_scan so that registers created by gcse
531 will have entries in the register tables.
533 We could have added a call to reg_scan after gcse_main in toplev.c,
534 but moving this call to init_alias_analysis is more efficient. */
535 init_alias_analysis ();
537 /* See if we went too far. */
538 if (get_max_uid () > max_uid_for_loop)
540 /* Now reset it to the actual size we need. See above. */
541 max_uid_for_loop = get_max_uid () + 1;
543 /* Compute the mapping from uids to luids.
544 LUIDs are numbers assigned to insns, like uids,
545 except that luids increase monotonically through the code.
546 Don't assign luids to line-number NOTEs, so that the distance in luids
547 between two insns is not affected by -g. */
549 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
552 if (GET_CODE (insn) != NOTE
553 || NOTE_LINE_NUMBER (insn) <= 0)
554 uid_luid[INSN_UID (insn)] = ++i;
556 /* Give a line number note the same luid as preceding insn. */
557 uid_luid[INSN_UID (insn)] = i;
562 /* Don't leave gaps in uid_luid for insns that have been
563 deleted. It is possible that the first or last insn
564 using some register has been deleted by cross-jumping.
565 Make sure that uid_luid for that former insn's uid
566 points to the general area where that insn used to be. */
567 for (i = 0; i < max_uid_for_loop; i++)
569 uid_luid[0] = uid_luid[i];
570 if (uid_luid[0] != 0)
573 for (i = 0; i < max_uid_for_loop; i++)
574 if (uid_luid[i] == 0)
575 uid_luid[i] = uid_luid[i - 1];
577 /* Create a mapping from loops to BLOCK tree nodes. */
578 if (unroll_p && write_symbols != NO_DEBUG)
579 find_loop_tree_blocks ();
581 /* Determine if the function has indirect jump. On some systems
582 this prevents low overhead loop instructions from being used. */
583 indirect_jump_in_function = indirect_jump_in_function_p (f);
585 /* Now scan the loops, last ones first, since this means inner ones are done
586 before outer ones. */
587 for (i = max_loop_num-1; i >= 0; i--)
588 if (! loop_invalid[i] && loop_number_loop_ends[i])
589 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
592 /* If debugging and unrolling loops, we must replicate the tree nodes
593 corresponding to the blocks inside the loop, so that the original one
594 to one mapping will remain. */
595 if (unroll_p && write_symbols != NO_DEBUG)
596 unroll_block_trees ();
598 end_alias_analysis ();
601 /* Returns the next insn, in execution order, after INSN. START and
602 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
603 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
604 insn-stream; it is used with loops that are entered near the
608 next_insn_in_loop (insn, start, end, loop_top)
614 insn = NEXT_INSN (insn);
619 /* Go to the top of the loop, and continue there. */
633 /* Optimize one loop whose start is LOOP_START and end is END.
634 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
635 NOTE_INSN_LOOP_END. */
637 /* ??? Could also move memory writes out of loops if the destination address
638 is invariant, the source is invariant, the memory write is not volatile,
639 and if we can prove that no read inside the loop can read this address
640 before the write occurs. If there is a read of this address after the
641 write, then we can also mark the memory read as invariant. */
644 scan_loop (loop_start, end, unroll_p)
650 /* 1 if we are scanning insns that could be executed zero times. */
652 /* 1 if we are scanning insns that might never be executed
653 due to a subroutine call which might exit before they are reached. */
655 /* For a rotated loop that is entered near the bottom,
656 this is the label at the top. Otherwise it is zero. */
658 /* Jump insn that enters the loop, or 0 if control drops in. */
659 rtx loop_entry_jump = 0;
660 /* Place in the loop where control enters. */
662 /* Number of insns in the loop. */
667 /* The SET from an insn, if it is the only SET in the insn. */
669 /* Chain describing insns movable in current loop. */
670 struct movable *movables = 0;
671 /* Last element in `movables' -- so we can add elements at the end. */
672 struct movable *last_movable = 0;
673 /* Ratio of extra register life span we can justify
674 for saving an instruction. More if loop doesn't call subroutines
675 since in that case saving an insn makes more difference
676 and more registers are available. */
678 /* If we have calls, contains the insn in which a register was used
679 if it was used exactly once; contains const0_rtx if it was used more
681 rtx *reg_single_usage = 0;
682 /* Nonzero if we are scanning instructions in a sub-loop. */
686 /* Determine whether this loop starts with a jump down to a test at
687 the end. This will occur for a small number of loops with a test
688 that is too complex to duplicate in front of the loop.
690 We search for the first insn or label in the loop, skipping NOTEs.
691 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
692 (because we might have a loop executed only once that contains a
693 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
694 (in case we have a degenerate loop).
696 Note that if we mistakenly think that a loop is entered at the top
697 when, in fact, it is entered at the exit test, the only effect will be
698 slightly poorer optimization. Making the opposite error can generate
699 incorrect code. Since very few loops now start with a jump to the
700 exit test, the code here to detect that case is very conservative. */
702 for (p = NEXT_INSN (loop_start);
704 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
705 && (GET_CODE (p) != NOTE
706 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
707 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
713 /* Set up variables describing this loop. */
714 prescan_loop (loop_start, end);
715 threshold = (loop_has_call ? 1 : 2) * (1 + n_non_fixed_regs);
717 /* If loop has a jump before the first label,
718 the true entry is the target of that jump.
719 Start scan from there.
720 But record in LOOP_TOP the place where the end-test jumps
721 back to so we can scan that after the end of the loop. */
722 if (GET_CODE (p) == JUMP_INSN)
726 /* Loop entry must be unconditional jump (and not a RETURN) */
728 && JUMP_LABEL (p) != 0
729 /* Check to see whether the jump actually
730 jumps out of the loop (meaning it's no loop).
731 This case can happen for things like
732 do {..} while (0). If this label was generated previously
733 by loop, we can't tell anything about it and have to reject
735 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, end))
737 loop_top = next_label (scan_start);
738 scan_start = JUMP_LABEL (p);
742 /* If SCAN_START was an insn created by loop, we don't know its luid
743 as required by loop_reg_used_before_p. So skip such loops. (This
744 test may never be true, but it's best to play it safe.)
746 Also, skip loops where we do not start scanning at a label. This
747 test also rejects loops starting with a JUMP_INSN that failed the
750 if (INSN_UID (scan_start) >= max_uid_for_loop
751 || GET_CODE (scan_start) != CODE_LABEL)
753 if (loop_dump_stream)
754 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
755 INSN_UID (loop_start), INSN_UID (end));
759 /* Count number of times each reg is set during this loop.
760 Set may_not_optimize[I] if it is not safe to move out
761 the setting of register I. If this loop has calls, set
762 reg_single_usage[I]. */
764 /* Allocate extra space for REGS that might be created by
765 load_mems and move_movables. */
766 nregs = max_reg_num () + loop_mems_idx + 100;
767 n_times_set = (int *) alloca (nregs * sizeof (int));
768 n_times_used = (int *) alloca (nregs * sizeof (int));
769 may_not_optimize = (char *) alloca (nregs);
770 bzero ((char *) n_times_set, nregs * sizeof (int));
771 bzero (may_not_optimize, nregs);
775 reg_single_usage = (rtx *) alloca (nregs * sizeof (rtx));
776 bzero ((char *) reg_single_usage, nregs * sizeof (rtx));
779 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
780 may_not_optimize, reg_single_usage, &insn_count, nregs);
782 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
783 may_not_optimize[i] = 1, n_times_set[i] = 1;
785 #ifdef AVOID_CCMODE_COPIES
786 /* Don't try to move insns which set CC registers if we should not
787 create CCmode register copies. */
788 for (i = FIRST_PSEUDO_REGISTER; i < nregs - loop_mems_idx; i++)
789 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
790 may_not_optimize[i] = 1;
793 bcopy ((char *) n_times_set, (char *) n_times_used, nregs * sizeof (int));
795 if (loop_dump_stream)
797 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
798 INSN_UID (loop_start), INSN_UID (end), insn_count);
800 fprintf (loop_dump_stream, "Continue at insn %d.\n",
801 INSN_UID (loop_continue));
804 /* Scan through the loop finding insns that are safe to move.
805 Set n_times_set negative for the reg being set, so that
806 this reg will be considered invariant for subsequent insns.
807 We consider whether subsequent insns use the reg
808 in deciding whether it is worth actually moving.
810 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
811 and therefore it is possible that the insns we are scanning
812 would never be executed. At such times, we must make sure
813 that it is safe to execute the insn once instead of zero times.
814 When MAYBE_NEVER is 0, all insns will be executed at least once
815 so that is not a problem. */
817 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
819 p = next_insn_in_loop (p, scan_start, end, loop_top))
821 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
822 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
824 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
825 && find_reg_note (p, REG_RETVAL, NULL_RTX))
828 if (GET_CODE (p) == INSN
829 && (set = single_set (p))
830 && GET_CODE (SET_DEST (set)) == REG
831 && ! may_not_optimize[REGNO (SET_DEST (set))])
836 rtx src = SET_SRC (set);
837 rtx dependencies = 0;
839 /* Figure out what to use as a source of this insn. If a REG_EQUIV
840 note is given or if a REG_EQUAL note with a constant operand is
841 specified, use it as the source and mark that we should move
842 this insn by calling emit_move_insn rather that duplicating the
845 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
847 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
849 src = XEXP (temp, 0), move_insn = 1;
852 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
853 if (temp && CONSTANT_P (XEXP (temp, 0)))
854 src = XEXP (temp, 0), move_insn = 1;
855 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
857 src = XEXP (temp, 0);
858 /* A libcall block can use regs that don't appear in
859 the equivalent expression. To move the libcall,
860 we must move those regs too. */
861 dependencies = libcall_other_reg (p, src);
865 /* Don't try to optimize a register that was made
866 by loop-optimization for an inner loop.
867 We don't know its life-span, so we can't compute the benefit. */
868 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
870 /* In order to move a register, we need to have one of three cases:
871 (1) it is used only in the same basic block as the set
872 (2) it is not a user variable and it is not used in the
873 exit test (this can cause the variable to be used
874 before it is set just like a user-variable).
875 (3) the set is guaranteed to be executed once the loop starts,
876 and the reg is not used until after that. */
877 else if (! ((! maybe_never
878 && ! loop_reg_used_before_p (set, p, loop_start,
880 || (! REG_USERVAR_P (SET_DEST (set))
881 && ! REG_LOOP_TEST_P (SET_DEST (set)))
882 || reg_in_basic_block_p (p, SET_DEST (set))))
884 else if ((tem = invariant_p (src))
885 && (dependencies == 0
886 || (tem2 = invariant_p (dependencies)) != 0)
887 && (n_times_set[REGNO (SET_DEST (set))] == 1
889 = consec_sets_invariant_p (SET_DEST (set),
890 n_times_set[REGNO (SET_DEST (set))],
892 /* If the insn can cause a trap (such as divide by zero),
893 can't move it unless it's guaranteed to be executed
894 once loop is entered. Even a function call might
895 prevent the trap insn from being reached
896 (since it might exit!) */
897 && ! ((maybe_never || call_passed)
898 && may_trap_p (src)))
900 register struct movable *m;
901 register int regno = REGNO (SET_DEST (set));
903 /* A potential lossage is where we have a case where two insns
904 can be combined as long as they are both in the loop, but
905 we move one of them outside the loop. For large loops,
906 this can lose. The most common case of this is the address
907 of a function being called.
909 Therefore, if this register is marked as being used exactly
910 once if we are in a loop with calls (a "large loop"), see if
911 we can replace the usage of this register with the source
912 of this SET. If we can, delete this insn.
914 Don't do this if P has a REG_RETVAL note or if we have
915 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
917 if (reg_single_usage && reg_single_usage[regno] != 0
918 && reg_single_usage[regno] != const0_rtx
919 && REGNO_FIRST_UID (regno) == INSN_UID (p)
920 && (REGNO_LAST_UID (regno)
921 == INSN_UID (reg_single_usage[regno]))
922 && n_times_set[REGNO (SET_DEST (set))] == 1
923 && ! side_effects_p (SET_SRC (set))
924 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
925 && (! SMALL_REGISTER_CLASSES
926 || (! (GET_CODE (SET_SRC (set)) == REG
927 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
928 /* This test is not redundant; SET_SRC (set) might be
929 a call-clobbered register and the life of REGNO
930 might span a call. */
931 && ! modified_between_p (SET_SRC (set), p,
932 reg_single_usage[regno])
933 && no_labels_between_p (p, reg_single_usage[regno])
934 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
935 reg_single_usage[regno]))
937 /* Replace any usage in a REG_EQUAL note. Must copy the
938 new source, so that we don't get rtx sharing between the
939 SET_SOURCE and REG_NOTES of insn p. */
940 REG_NOTES (reg_single_usage[regno])
941 = replace_rtx (REG_NOTES (reg_single_usage[regno]),
942 SET_DEST (set), copy_rtx (SET_SRC (set)));
945 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
946 NOTE_SOURCE_FILE (p) = 0;
947 n_times_set[regno] = 0;
951 m = (struct movable *) alloca (sizeof (struct movable));
955 m->dependencies = dependencies;
956 m->set_dest = SET_DEST (set);
958 m->consec = n_times_set[REGNO (SET_DEST (set))] - 1;
962 m->move_insn = move_insn;
963 m->move_insn_first = 0;
964 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
965 m->savemode = VOIDmode;
967 /* Set M->cond if either invariant_p or consec_sets_invariant_p
968 returned 2 (only conditionally invariant). */
969 m->cond = ((tem | tem1 | tem2) > 1);
970 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
971 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
973 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
974 - uid_luid[REGNO_FIRST_UID (regno)]);
975 m->savings = n_times_used[regno];
976 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
977 m->savings += libcall_benefit (p);
978 n_times_set[regno] = move_insn ? -2 : -1;
979 /* Add M to the end of the chain MOVABLES. */
983 last_movable->next = m;
988 /* It is possible for the first instruction to have a
989 REG_EQUAL note but a non-invariant SET_SRC, so we must
990 remember the status of the first instruction in case
991 the last instruction doesn't have a REG_EQUAL note. */
992 m->move_insn_first = m->move_insn;
994 /* Skip this insn, not checking REG_LIBCALL notes. */
995 p = next_nonnote_insn (p);
996 /* Skip the consecutive insns, if there are any. */
997 p = skip_consec_insns (p, m->consec);
998 /* Back up to the last insn of the consecutive group. */
999 p = prev_nonnote_insn (p);
1001 /* We must now reset m->move_insn, m->is_equiv, and possibly
1002 m->set_src to correspond to the effects of all the
1004 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
1006 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1009 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
1010 if (temp && CONSTANT_P (XEXP (temp, 0)))
1011 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1016 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
1019 /* If this register is always set within a STRICT_LOW_PART
1020 or set to zero, then its high bytes are constant.
1021 So clear them outside the loop and within the loop
1022 just load the low bytes.
1023 We must check that the machine has an instruction to do so.
1024 Also, if the value loaded into the register
1025 depends on the same register, this cannot be done. */
1026 else if (SET_SRC (set) == const0_rtx
1027 && GET_CODE (NEXT_INSN (p)) == INSN
1028 && (set1 = single_set (NEXT_INSN (p)))
1029 && GET_CODE (set1) == SET
1030 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
1031 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
1032 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
1034 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1036 register int regno = REGNO (SET_DEST (set));
1037 if (n_times_set[regno] == 2)
1039 register struct movable *m;
1040 m = (struct movable *) alloca (sizeof (struct movable));
1043 m->set_dest = SET_DEST (set);
1044 m->dependencies = 0;
1050 m->move_insn_first = 0;
1052 /* If the insn may not be executed on some cycles,
1053 we can't clear the whole reg; clear just high part.
1054 Not even if the reg is used only within this loop.
1061 Clearing x before the inner loop could clobber a value
1062 being saved from the last time around the outer loop.
1063 However, if the reg is not used outside this loop
1064 and all uses of the register are in the same
1065 basic block as the store, there is no problem.
1067 If this insn was made by loop, we don't know its
1068 INSN_LUID and hence must make a conservative
1070 m->global = (INSN_UID (p) >= max_uid_for_loop
1071 || (uid_luid[REGNO_LAST_UID (regno)]
1073 || (uid_luid[REGNO_FIRST_UID (regno)]
1075 || (labels_in_range_p
1076 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1077 if (maybe_never && m->global)
1078 m->savemode = GET_MODE (SET_SRC (set1));
1080 m->savemode = VOIDmode;
1084 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1085 - uid_luid[REGNO_FIRST_UID (regno)]);
1087 n_times_set[regno] = -1;
1088 /* Add M to the end of the chain MOVABLES. */
1092 last_movable->next = m;
1097 /* Past a call insn, we get to insns which might not be executed
1098 because the call might exit. This matters for insns that trap.
1099 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1100 so they don't count. */
1101 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1103 /* Past a label or a jump, we get to insns for which we
1104 can't count on whether or how many times they will be
1105 executed during each iteration. Therefore, we can
1106 only move out sets of trivial variables
1107 (those not used after the loop). */
1108 /* Similar code appears twice in strength_reduce. */
1109 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1110 /* If we enter the loop in the middle, and scan around to the
1111 beginning, don't set maybe_never for that. This must be an
1112 unconditional jump, otherwise the code at the top of the
1113 loop might never be executed. Unconditional jumps are
1114 followed a by barrier then loop end. */
1115 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1116 && NEXT_INSN (NEXT_INSN (p)) == end
1117 && simplejump_p (p)))
1119 else if (GET_CODE (p) == NOTE)
1121 /* At the virtual top of a converted loop, insns are again known to
1122 be executed: logically, the loop begins here even though the exit
1123 code has been duplicated. */
1124 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1125 maybe_never = call_passed = 0;
1126 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1128 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1133 /* If one movable subsumes another, ignore that other. */
1135 ignore_some_movables (movables);
1137 /* For each movable insn, see if the reg that it loads
1138 leads when it dies right into another conditionally movable insn.
1139 If so, record that the second insn "forces" the first one,
1140 since the second can be moved only if the first is. */
1142 force_movables (movables);
1144 /* See if there are multiple movable insns that load the same value.
1145 If there are, make all but the first point at the first one
1146 through the `match' field, and add the priorities of them
1147 all together as the priority of the first. */
1149 combine_movables (movables, nregs);
1151 /* Now consider each movable insn to decide whether it is worth moving.
1152 Store 0 in n_times_set for each reg that is moved.
1154 Generally this increases code size, so do not move moveables when
1155 optimizing for code size. */
1157 if (! optimize_size)
1158 move_movables (movables, threshold,
1159 insn_count, loop_start, end, nregs);
1161 /* Now candidates that still are negative are those not moved.
1162 Change n_times_set to indicate that those are not actually invariant. */
1163 for (i = 0; i < nregs; i++)
1164 if (n_times_set[i] < 0)
1165 n_times_set[i] = n_times_used[i];
1167 /* Now that we've moved some things out of the loop, we able to
1168 hoist even more memory references. There's no need to pass
1169 reg_single_usage this time, since we're done with it. */
1170 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top,
1174 if (flag_strength_reduce)
1176 the_movables = movables;
1177 strength_reduce (scan_start, end, loop_top,
1178 insn_count, loop_start, end, unroll_p);
1182 /* Add elements to *OUTPUT to record all the pseudo-regs
1183 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1186 record_excess_regs (in_this, not_in_this, output)
1187 rtx in_this, not_in_this;
1194 code = GET_CODE (in_this);
1208 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1209 && ! reg_mentioned_p (in_this, not_in_this))
1210 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1217 fmt = GET_RTX_FORMAT (code);
1218 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1225 for (j = 0; j < XVECLEN (in_this, i); j++)
1226 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1230 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1236 /* Check what regs are referred to in the libcall block ending with INSN,
1237 aside from those mentioned in the equivalent value.
1238 If there are none, return 0.
1239 If there are one or more, return an EXPR_LIST containing all of them. */
1242 libcall_other_reg (insn, equiv)
1245 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1246 rtx p = XEXP (note, 0);
1249 /* First, find all the regs used in the libcall block
1250 that are not mentioned as inputs to the result. */
1254 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1255 || GET_CODE (p) == CALL_INSN)
1256 record_excess_regs (PATTERN (p), equiv, &output);
1263 /* Return 1 if all uses of REG
1264 are between INSN and the end of the basic block. */
1267 reg_in_basic_block_p (insn, reg)
1270 int regno = REGNO (reg);
1273 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1276 /* Search this basic block for the already recorded last use of the reg. */
1277 for (p = insn; p; p = NEXT_INSN (p))
1279 switch (GET_CODE (p))
1286 /* Ordinary insn: if this is the last use, we win. */
1287 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1292 /* Jump insn: if this is the last use, we win. */
1293 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1295 /* Otherwise, it's the end of the basic block, so we lose. */
1300 /* It's the end of the basic block, so we lose. */
1308 /* The "last use" doesn't follow the "first use"?? */
1312 /* Compute the benefit of eliminating the insns in the block whose
1313 last insn is LAST. This may be a group of insns used to compute a
1314 value directly or can contain a library call. */
1317 libcall_benefit (last)
1323 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1324 insn != last; insn = NEXT_INSN (insn))
1326 if (GET_CODE (insn) == CALL_INSN)
1327 benefit += 10; /* Assume at least this many insns in a library
1329 else if (GET_CODE (insn) == INSN
1330 && GET_CODE (PATTERN (insn)) != USE
1331 && GET_CODE (PATTERN (insn)) != CLOBBER)
1338 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1341 skip_consec_insns (insn, count)
1345 for (; count > 0; count--)
1349 /* If first insn of libcall sequence, skip to end. */
1350 /* Do this at start of loop, since INSN is guaranteed to
1352 if (GET_CODE (insn) != NOTE
1353 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1354 insn = XEXP (temp, 0);
1356 do insn = NEXT_INSN (insn);
1357 while (GET_CODE (insn) == NOTE);
1363 /* Ignore any movable whose insn falls within a libcall
1364 which is part of another movable.
1365 We make use of the fact that the movable for the libcall value
1366 was made later and so appears later on the chain. */
1369 ignore_some_movables (movables)
1370 struct movable *movables;
1372 register struct movable *m, *m1;
1374 for (m = movables; m; m = m->next)
1376 /* Is this a movable for the value of a libcall? */
1377 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1381 /* Check for earlier movables inside that range,
1382 and mark them invalid. We cannot use LUIDs here because
1383 insns created by loop.c for prior loops don't have LUIDs.
1384 Rather than reject all such insns from movables, we just
1385 explicitly check each insn in the libcall (since invariant
1386 libcalls aren't that common). */
1387 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1388 for (m1 = movables; m1 != m; m1 = m1->next)
1389 if (m1->insn == insn)
1395 /* For each movable insn, see if the reg that it loads
1396 leads when it dies right into another conditionally movable insn.
1397 If so, record that the second insn "forces" the first one,
1398 since the second can be moved only if the first is. */
1401 force_movables (movables)
1402 struct movable *movables;
1404 register struct movable *m, *m1;
1405 for (m1 = movables; m1; m1 = m1->next)
1406 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1407 if (!m1->partial && !m1->done)
1409 int regno = m1->regno;
1410 for (m = m1->next; m; m = m->next)
1411 /* ??? Could this be a bug? What if CSE caused the
1412 register of M1 to be used after this insn?
1413 Since CSE does not update regno_last_uid,
1414 this insn M->insn might not be where it dies.
1415 But very likely this doesn't matter; what matters is
1416 that M's reg is computed from M1's reg. */
1417 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1420 if (m != 0 && m->set_src == m1->set_dest
1421 /* If m->consec, m->set_src isn't valid. */
1425 /* Increase the priority of the moving the first insn
1426 since it permits the second to be moved as well. */
1430 m1->lifetime += m->lifetime;
1431 m1->savings += m->savings;
1436 /* Find invariant expressions that are equal and can be combined into
1440 combine_movables (movables, nregs)
1441 struct movable *movables;
1444 register struct movable *m;
1445 char *matched_regs = (char *) alloca (nregs);
1446 enum machine_mode mode;
1448 /* Regs that are set more than once are not allowed to match
1449 or be matched. I'm no longer sure why not. */
1450 /* Perhaps testing m->consec_sets would be more appropriate here? */
1452 for (m = movables; m; m = m->next)
1453 if (m->match == 0 && n_times_used[m->regno] == 1 && !m->partial)
1455 register struct movable *m1;
1456 int regno = m->regno;
1458 bzero (matched_regs, nregs);
1459 matched_regs[regno] = 1;
1461 /* We want later insns to match the first one. Don't make the first
1462 one match any later ones. So start this loop at m->next. */
1463 for (m1 = m->next; m1; m1 = m1->next)
1464 if (m != m1 && m1->match == 0 && n_times_used[m1->regno] == 1
1465 /* A reg used outside the loop mustn't be eliminated. */
1467 /* A reg used for zero-extending mustn't be eliminated. */
1469 && (matched_regs[m1->regno]
1472 /* Can combine regs with different modes loaded from the
1473 same constant only if the modes are the same or
1474 if both are integer modes with M wider or the same
1475 width as M1. The check for integer is redundant, but
1476 safe, since the only case of differing destination
1477 modes with equal sources is when both sources are
1478 VOIDmode, i.e., CONST_INT. */
1479 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1480 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1481 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1482 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1483 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1484 /* See if the source of M1 says it matches M. */
1485 && ((GET_CODE (m1->set_src) == REG
1486 && matched_regs[REGNO (m1->set_src)])
1487 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1489 && ((m->dependencies == m1->dependencies)
1490 || rtx_equal_p (m->dependencies, m1->dependencies)))
1492 m->lifetime += m1->lifetime;
1493 m->savings += m1->savings;
1496 matched_regs[m1->regno] = 1;
1500 /* Now combine the regs used for zero-extension.
1501 This can be done for those not marked `global'
1502 provided their lives don't overlap. */
1504 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1505 mode = GET_MODE_WIDER_MODE (mode))
1507 register struct movable *m0 = 0;
1509 /* Combine all the registers for extension from mode MODE.
1510 Don't combine any that are used outside this loop. */
1511 for (m = movables; m; m = m->next)
1512 if (m->partial && ! m->global
1513 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1515 register struct movable *m1;
1516 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1517 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1521 /* First one: don't check for overlap, just record it. */
1526 /* Make sure they extend to the same mode.
1527 (Almost always true.) */
1528 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1531 /* We already have one: check for overlap with those
1532 already combined together. */
1533 for (m1 = movables; m1 != m; m1 = m1->next)
1534 if (m1 == m0 || (m1->partial && m1->match == m0))
1535 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1536 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1539 /* No overlap: we can combine this with the others. */
1540 m0->lifetime += m->lifetime;
1541 m0->savings += m->savings;
1550 /* Return 1 if regs X and Y will become the same if moved. */
1553 regs_match_p (x, y, movables)
1555 struct movable *movables;
1559 struct movable *mx, *my;
1561 for (mx = movables; mx; mx = mx->next)
1562 if (mx->regno == xn)
1565 for (my = movables; my; my = my->next)
1566 if (my->regno == yn)
1570 && ((mx->match == my->match && mx->match != 0)
1572 || mx == my->match));
1575 /* Return 1 if X and Y are identical-looking rtx's.
1576 This is the Lisp function EQUAL for rtx arguments.
1578 If two registers are matching movables or a movable register and an
1579 equivalent constant, consider them equal. */
1582 rtx_equal_for_loop_p (x, y, movables)
1584 struct movable *movables;
1588 register struct movable *m;
1589 register enum rtx_code code;
1594 if (x == 0 || y == 0)
1597 code = GET_CODE (x);
1599 /* If we have a register and a constant, they may sometimes be
1601 if (GET_CODE (x) == REG && n_times_set[REGNO (x)] == -2
1604 for (m = movables; m; m = m->next)
1605 if (m->move_insn && m->regno == REGNO (x)
1606 && rtx_equal_p (m->set_src, y))
1609 else if (GET_CODE (y) == REG && n_times_set[REGNO (y)] == -2
1612 for (m = movables; m; m = m->next)
1613 if (m->move_insn && m->regno == REGNO (y)
1614 && rtx_equal_p (m->set_src, x))
1618 /* Otherwise, rtx's of different codes cannot be equal. */
1619 if (code != GET_CODE (y))
1622 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1623 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1625 if (GET_MODE (x) != GET_MODE (y))
1628 /* These three types of rtx's can be compared nonrecursively. */
1630 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1632 if (code == LABEL_REF)
1633 return XEXP (x, 0) == XEXP (y, 0);
1634 if (code == SYMBOL_REF)
1635 return XSTR (x, 0) == XSTR (y, 0);
1637 /* Compare the elements. If any pair of corresponding elements
1638 fail to match, return 0 for the whole things. */
1640 fmt = GET_RTX_FORMAT (code);
1641 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1646 if (XWINT (x, i) != XWINT (y, i))
1651 if (XINT (x, i) != XINT (y, i))
1656 /* Two vectors must have the same length. */
1657 if (XVECLEN (x, i) != XVECLEN (y, i))
1660 /* And the corresponding elements must match. */
1661 for (j = 0; j < XVECLEN (x, i); j++)
1662 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1667 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1672 if (strcmp (XSTR (x, i), XSTR (y, i)))
1677 /* These are just backpointers, so they don't matter. */
1683 /* It is believed that rtx's at this level will never
1684 contain anything but integers and other rtx's,
1685 except for within LABEL_REFs and SYMBOL_REFs. */
1693 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1694 insns in INSNS which use thet reference. */
1697 add_label_notes (x, insns)
1701 enum rtx_code code = GET_CODE (x);
1706 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1708 /* This code used to ignore labels that referred to dispatch tables to
1709 avoid flow generating (slighly) worse code.
1711 We no longer ignore such label references (see LABEL_REF handling in
1712 mark_jump_label for additional information). */
1713 for (insn = insns; insn; insn = NEXT_INSN (insn))
1714 if (reg_mentioned_p (XEXP (x, 0), insn))
1715 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1719 fmt = GET_RTX_FORMAT (code);
1720 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1723 add_label_notes (XEXP (x, i), insns);
1724 else if (fmt[i] == 'E')
1725 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1726 add_label_notes (XVECEXP (x, i, j), insns);
1730 /* Scan MOVABLES, and move the insns that deserve to be moved.
1731 If two matching movables are combined, replace one reg with the
1732 other throughout. */
1735 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1736 struct movable *movables;
1744 register struct movable *m;
1746 /* Map of pseudo-register replacements to handle combining
1747 when we move several insns that load the same value
1748 into different pseudo-registers. */
1749 rtx *reg_map = (rtx *) alloca (nregs * sizeof (rtx));
1750 char *already_moved = (char *) alloca (nregs);
1752 bzero (already_moved, nregs);
1753 bzero ((char *) reg_map, nregs * sizeof (rtx));
1757 for (m = movables; m; m = m->next)
1759 /* Describe this movable insn. */
1761 if (loop_dump_stream)
1763 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1764 INSN_UID (m->insn), m->regno, m->lifetime);
1766 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1768 fprintf (loop_dump_stream, "cond ");
1770 fprintf (loop_dump_stream, "force ");
1772 fprintf (loop_dump_stream, "global ");
1774 fprintf (loop_dump_stream, "done ");
1776 fprintf (loop_dump_stream, "move-insn ");
1778 fprintf (loop_dump_stream, "matches %d ",
1779 INSN_UID (m->match->insn));
1781 fprintf (loop_dump_stream, "forces %d ",
1782 INSN_UID (m->forces->insn));
1785 /* Count movables. Value used in heuristics in strength_reduce. */
1788 /* Ignore the insn if it's already done (it matched something else).
1789 Otherwise, see if it is now safe to move. */
1793 || (1 == invariant_p (m->set_src)
1794 && (m->dependencies == 0
1795 || 1 == invariant_p (m->dependencies))
1797 || 1 == consec_sets_invariant_p (m->set_dest,
1800 && (! m->forces || m->forces->done))
1804 int savings = m->savings;
1806 /* We have an insn that is safe to move.
1807 Compute its desirability. */
1812 if (loop_dump_stream)
1813 fprintf (loop_dump_stream, "savings %d ", savings);
1815 if (moved_once[regno])
1819 if (loop_dump_stream)
1820 fprintf (loop_dump_stream, "halved since already moved ");
1823 /* An insn MUST be moved if we already moved something else
1824 which is safe only if this one is moved too: that is,
1825 if already_moved[REGNO] is nonzero. */
1827 /* An insn is desirable to move if the new lifetime of the
1828 register is no more than THRESHOLD times the old lifetime.
1829 If it's not desirable, it means the loop is so big
1830 that moving won't speed things up much,
1831 and it is liable to make register usage worse. */
1833 /* It is also desirable to move if it can be moved at no
1834 extra cost because something else was already moved. */
1836 if (already_moved[regno]
1837 || flag_move_all_movables
1838 || (threshold * savings * m->lifetime) >= insn_count
1839 || (m->forces && m->forces->done
1840 && n_times_used[m->forces->regno] == 1))
1843 register struct movable *m1;
1846 /* Now move the insns that set the reg. */
1848 if (m->partial && m->match)
1852 /* Find the end of this chain of matching regs.
1853 Thus, we load each reg in the chain from that one reg.
1854 And that reg is loaded with 0 directly,
1855 since it has ->match == 0. */
1856 for (m1 = m; m1->match; m1 = m1->match);
1857 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1858 SET_DEST (PATTERN (m1->insn)));
1859 i1 = emit_insn_before (newpat, loop_start);
1861 /* Mark the moved, invariant reg as being allowed to
1862 share a hard reg with the other matching invariant. */
1863 REG_NOTES (i1) = REG_NOTES (m->insn);
1864 r1 = SET_DEST (PATTERN (m->insn));
1865 r2 = SET_DEST (PATTERN (m1->insn));
1867 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1868 gen_rtx_EXPR_LIST (VOIDmode, r2,
1870 delete_insn (m->insn);
1875 if (loop_dump_stream)
1876 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1878 /* If we are to re-generate the item being moved with a
1879 new move insn, first delete what we have and then emit
1880 the move insn before the loop. */
1881 else if (m->move_insn)
1885 for (count = m->consec; count >= 0; count--)
1887 /* If this is the first insn of a library call sequence,
1889 if (GET_CODE (p) != NOTE
1890 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1893 /* If this is the last insn of a libcall sequence, then
1894 delete every insn in the sequence except the last.
1895 The last insn is handled in the normal manner. */
1896 if (GET_CODE (p) != NOTE
1897 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1899 temp = XEXP (temp, 0);
1901 temp = delete_insn (temp);
1904 p = delete_insn (p);
1905 while (p && GET_CODE (p) == NOTE)
1910 emit_move_insn (m->set_dest, m->set_src);
1911 temp = get_insns ();
1914 add_label_notes (m->set_src, temp);
1916 i1 = emit_insns_before (temp, loop_start);
1917 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1919 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1920 m->set_src, REG_NOTES (i1));
1922 if (loop_dump_stream)
1923 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1925 /* The more regs we move, the less we like moving them. */
1930 for (count = m->consec; count >= 0; count--)
1934 /* If first insn of libcall sequence, skip to end. */
1935 /* Do this at start of loop, since p is guaranteed to
1937 if (GET_CODE (p) != NOTE
1938 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1941 /* If last insn of libcall sequence, move all
1942 insns except the last before the loop. The last
1943 insn is handled in the normal manner. */
1944 if (GET_CODE (p) != NOTE
1945 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1949 rtx fn_address_insn = 0;
1952 for (temp = XEXP (temp, 0); temp != p;
1953 temp = NEXT_INSN (temp))
1959 if (GET_CODE (temp) == NOTE)
1962 body = PATTERN (temp);
1964 /* Find the next insn after TEMP,
1965 not counting USE or NOTE insns. */
1966 for (next = NEXT_INSN (temp); next != p;
1967 next = NEXT_INSN (next))
1968 if (! (GET_CODE (next) == INSN
1969 && GET_CODE (PATTERN (next)) == USE)
1970 && GET_CODE (next) != NOTE)
1973 /* If that is the call, this may be the insn
1974 that loads the function address.
1976 Extract the function address from the insn
1977 that loads it into a register.
1978 If this insn was cse'd, we get incorrect code.
1980 So emit a new move insn that copies the
1981 function address into the register that the
1982 call insn will use. flow.c will delete any
1983 redundant stores that we have created. */
1984 if (GET_CODE (next) == CALL_INSN
1985 && GET_CODE (body) == SET
1986 && GET_CODE (SET_DEST (body)) == REG
1987 && (n = find_reg_note (temp, REG_EQUAL,
1990 fn_reg = SET_SRC (body);
1991 if (GET_CODE (fn_reg) != REG)
1992 fn_reg = SET_DEST (body);
1993 fn_address = XEXP (n, 0);
1994 fn_address_insn = temp;
1996 /* We have the call insn.
1997 If it uses the register we suspect it might,
1998 load it with the correct address directly. */
1999 if (GET_CODE (temp) == CALL_INSN
2001 && reg_referenced_p (fn_reg, body))
2002 emit_insn_after (gen_move_insn (fn_reg,
2006 if (GET_CODE (temp) == CALL_INSN)
2008 i1 = emit_call_insn_before (body, loop_start);
2009 /* Because the USAGE information potentially
2010 contains objects other than hard registers
2011 we need to copy it. */
2012 if (CALL_INSN_FUNCTION_USAGE (temp))
2013 CALL_INSN_FUNCTION_USAGE (i1)
2014 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2017 i1 = emit_insn_before (body, loop_start);
2020 if (temp == fn_address_insn)
2021 fn_address_insn = i1;
2022 REG_NOTES (i1) = REG_NOTES (temp);
2026 if (m->savemode != VOIDmode)
2028 /* P sets REG to zero; but we should clear only
2029 the bits that are not covered by the mode
2031 rtx reg = m->set_dest;
2037 (GET_MODE (reg), and_optab, reg,
2038 GEN_INT ((((HOST_WIDE_INT) 1
2039 << GET_MODE_BITSIZE (m->savemode)))
2041 reg, 1, OPTAB_LIB_WIDEN);
2045 emit_move_insn (reg, tem);
2046 sequence = gen_sequence ();
2048 i1 = emit_insn_before (sequence, loop_start);
2050 else if (GET_CODE (p) == CALL_INSN)
2052 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2053 /* Because the USAGE information potentially
2054 contains objects other than hard registers
2055 we need to copy it. */
2056 if (CALL_INSN_FUNCTION_USAGE (p))
2057 CALL_INSN_FUNCTION_USAGE (i1)
2058 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2060 else if (count == m->consec && m->move_insn_first)
2062 /* The SET_SRC might not be invariant, so we must
2063 use the REG_EQUAL note. */
2065 emit_move_insn (m->set_dest, m->set_src);
2066 temp = get_insns ();
2069 add_label_notes (m->set_src, temp);
2071 i1 = emit_insns_before (temp, loop_start);
2072 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2074 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2076 m->set_src, REG_NOTES (i1));
2079 i1 = emit_insn_before (PATTERN (p), loop_start);
2081 if (REG_NOTES (i1) == 0)
2083 REG_NOTES (i1) = REG_NOTES (p);
2085 /* If there is a REG_EQUAL note present whose value
2086 is not loop invariant, then delete it, since it
2087 may cause problems with later optimization passes.
2088 It is possible for cse to create such notes
2089 like this as a result of record_jump_cond. */
2091 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2092 && ! invariant_p (XEXP (temp, 0)))
2093 remove_note (i1, temp);
2099 if (loop_dump_stream)
2100 fprintf (loop_dump_stream, " moved to %d",
2103 /* If library call, now fix the REG_NOTES that contain
2104 insn pointers, namely REG_LIBCALL on FIRST
2105 and REG_RETVAL on I1. */
2106 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2108 XEXP (temp, 0) = first;
2109 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2110 XEXP (temp, 0) = i1;
2114 do p = NEXT_INSN (p);
2115 while (p && GET_CODE (p) == NOTE);
2118 /* The more regs we move, the less we like moving them. */
2122 /* Any other movable that loads the same register
2124 already_moved[regno] = 1;
2126 /* This reg has been moved out of one loop. */
2127 moved_once[regno] = 1;
2129 /* The reg set here is now invariant. */
2131 n_times_set[regno] = 0;
2135 /* Change the length-of-life info for the register
2136 to say it lives at least the full length of this loop.
2137 This will help guide optimizations in outer loops. */
2139 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2140 /* This is the old insn before all the moved insns.
2141 We can't use the moved insn because it is out of range
2142 in uid_luid. Only the old insns have luids. */
2143 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2144 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2145 REGNO_LAST_UID (regno) = INSN_UID (end);
2147 /* Combine with this moved insn any other matching movables. */
2150 for (m1 = movables; m1; m1 = m1->next)
2155 /* Schedule the reg loaded by M1
2156 for replacement so that shares the reg of M.
2157 If the modes differ (only possible in restricted
2158 circumstances, make a SUBREG. */
2159 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2160 reg_map[m1->regno] = m->set_dest;
2163 = gen_lowpart_common (GET_MODE (m1->set_dest),
2166 /* Get rid of the matching insn
2167 and prevent further processing of it. */
2170 /* if library call, delete all insn except last, which
2172 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2175 for (temp = XEXP (temp, 0); temp != m1->insn;
2176 temp = NEXT_INSN (temp))
2179 delete_insn (m1->insn);
2181 /* Any other movable that loads the same register
2183 already_moved[m1->regno] = 1;
2185 /* The reg merged here is now invariant,
2186 if the reg it matches is invariant. */
2188 n_times_set[m1->regno] = 0;
2191 else if (loop_dump_stream)
2192 fprintf (loop_dump_stream, "not desirable");
2194 else if (loop_dump_stream && !m->match)
2195 fprintf (loop_dump_stream, "not safe");
2197 if (loop_dump_stream)
2198 fprintf (loop_dump_stream, "\n");
2202 new_start = loop_start;
2204 /* Go through all the instructions in the loop, making
2205 all the register substitutions scheduled in REG_MAP. */
2206 for (p = new_start; p != end; p = NEXT_INSN (p))
2207 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2208 || GET_CODE (p) == CALL_INSN)
2210 replace_regs (PATTERN (p), reg_map, nregs, 0);
2211 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2217 /* Scan X and replace the address of any MEM in it with ADDR.
2218 REG is the address that MEM should have before the replacement. */
2221 replace_call_address (x, reg, addr)
2224 register enum rtx_code code;
2230 code = GET_CODE (x);
2244 /* Short cut for very common case. */
2245 replace_call_address (XEXP (x, 1), reg, addr);
2249 /* Short cut for very common case. */
2250 replace_call_address (XEXP (x, 0), reg, addr);
2254 /* If this MEM uses a reg other than the one we expected,
2255 something is wrong. */
2256 if (XEXP (x, 0) != reg)
2265 fmt = GET_RTX_FORMAT (code);
2266 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2269 replace_call_address (XEXP (x, i), reg, addr);
2273 for (j = 0; j < XVECLEN (x, i); j++)
2274 replace_call_address (XVECEXP (x, i, j), reg, addr);
2280 /* Return the number of memory refs to addresses that vary
2284 count_nonfixed_reads (x)
2287 register enum rtx_code code;
2295 code = GET_CODE (x);
2309 return ((invariant_p (XEXP (x, 0)) != 1)
2310 + count_nonfixed_reads (XEXP (x, 0)));
2317 fmt = GET_RTX_FORMAT (code);
2318 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2321 value += count_nonfixed_reads (XEXP (x, i));
2325 for (j = 0; j < XVECLEN (x, i); j++)
2326 value += count_nonfixed_reads (XVECEXP (x, i, j));
2334 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2335 Replace it with an instruction to load just the low bytes
2336 if the machine supports such an instruction,
2337 and insert above LOOP_START an instruction to clear the register. */
2340 constant_high_bytes (p, loop_start)
2344 register int insn_code_number;
2346 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2347 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2349 new = gen_rtx_SET (VOIDmode,
2350 gen_rtx_STRICT_LOW_PART (VOIDmode,
2351 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2352 SET_DEST (PATTERN (p)),
2354 XEXP (SET_SRC (PATTERN (p)), 0));
2355 insn_code_number = recog (new, p);
2357 if (insn_code_number)
2361 /* Clear destination register before the loop. */
2362 emit_insn_before (gen_rtx_SET (VOIDmode, SET_DEST (PATTERN (p)),
2366 /* Inside the loop, just load the low part. */
2372 /* Scan a loop setting the variables `unknown_address_altered',
2373 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2374 and `loop_has_volatile'. Also, fill in the arrays `loop_mems' and
2375 `loop_store_mems'. */
2378 prescan_loop (start, end)
2381 register int level = 1;
2383 int loop_has_multiple_exit_targets = 0;
2384 /* The label after END. Jumping here is just like falling off the
2385 end of the loop. We use next_nonnote_insn instead of next_label
2386 as a hedge against the (pathological) case where some actual insn
2387 might end up between the two. */
2388 rtx exit_target = next_nonnote_insn (end);
2389 if (exit_target == NULL_RTX || GET_CODE (exit_target) != CODE_LABEL)
2390 loop_has_multiple_exit_targets = 1;
2392 unknown_address_altered = 0;
2394 loop_has_volatile = 0;
2395 loop_store_mems_idx = 0;
2402 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2403 insn = NEXT_INSN (insn))
2405 if (GET_CODE (insn) == NOTE)
2407 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2410 /* Count number of loops contained in this one. */
2413 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2422 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2425 loop_continue = insn;
2428 else if (GET_CODE (insn) == CALL_INSN)
2430 if (! CONST_CALL_P (insn))
2431 unknown_address_altered = 1;
2434 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2436 rtx label1 = NULL_RTX;
2437 rtx label2 = NULL_RTX;
2439 if (volatile_refs_p (PATTERN (insn)))
2440 loop_has_volatile = 1;
2442 note_stores (PATTERN (insn), note_addr_stored);
2444 if (!loop_has_multiple_exit_targets
2445 && GET_CODE (insn) == JUMP_INSN
2446 && GET_CODE (PATTERN (insn)) == SET
2447 && SET_DEST (PATTERN (insn)) == pc_rtx)
2449 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2451 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2452 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2456 label1 = SET_SRC (PATTERN (insn));
2460 if (label1 && label1 != pc_rtx)
2462 if (GET_CODE (label1) != LABEL_REF)
2464 /* Something tricky. */
2465 loop_has_multiple_exit_targets = 1;
2468 else if (XEXP (label1, 0) != exit_target
2469 && LABEL_OUTSIDE_LOOP_P (label1))
2471 /* A jump outside the current loop. */
2472 loop_has_multiple_exit_targets = 1;
2482 else if (GET_CODE (insn) == RETURN)
2483 loop_has_multiple_exit_targets = 1;
2486 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2487 if (/* We can't tell what MEMs are aliased by what. */
2488 !unknown_address_altered
2489 /* An exception thrown by a called function might land us
2492 /* We don't want loads for MEMs moved to a location before the
2493 one at which their stack memory becomes allocated. (Note
2494 that this is not a problem for malloc, etc., since those
2495 require actual function calls. */
2496 && !current_function_calls_alloca
2497 /* There are ways to leave the loop other than falling off the
2499 && !loop_has_multiple_exit_targets)
2500 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2501 insn = NEXT_INSN (insn))
2502 for_each_rtx (&insn, insert_loop_mem, 0);
2505 /* Scan the function looking for loops. Record the start and end of each loop.
2506 Also mark as invalid loops any loops that contain a setjmp or are branched
2507 to from outside the loop. */
2510 find_and_verify_loops (f)
2514 int current_loop = -1;
2518 /* If there are jumps to undefined labels,
2519 treat them as jumps out of any/all loops.
2520 This also avoids writing past end of tables when there are no loops. */
2521 uid_loop_num[0] = -1;
2523 /* Find boundaries of loops, mark which loops are contained within
2524 loops, and invalidate loops that have setjmp. */
2526 for (insn = f; insn; insn = NEXT_INSN (insn))
2528 if (GET_CODE (insn) == NOTE)
2529 switch (NOTE_LINE_NUMBER (insn))
2531 case NOTE_INSN_LOOP_BEG:
2532 loop_number_loop_starts[++next_loop] = insn;
2533 loop_number_loop_ends[next_loop] = 0;
2534 loop_outer_loop[next_loop] = current_loop;
2535 loop_invalid[next_loop] = 0;
2536 loop_number_exit_labels[next_loop] = 0;
2537 loop_number_exit_count[next_loop] = 0;
2538 current_loop = next_loop;
2541 case NOTE_INSN_SETJMP:
2542 /* In this case, we must invalidate our current loop and any
2544 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2546 loop_invalid[loop] = 1;
2547 if (loop_dump_stream)
2548 fprintf (loop_dump_stream,
2549 "\nLoop at %d ignored due to setjmp.\n",
2550 INSN_UID (loop_number_loop_starts[loop]));
2554 case NOTE_INSN_LOOP_END:
2555 if (current_loop == -1)
2558 loop_number_loop_ends[current_loop] = insn;
2559 current_loop = loop_outer_loop[current_loop];
2566 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2567 enclosing loop, but this doesn't matter. */
2568 uid_loop_num[INSN_UID (insn)] = current_loop;
2571 /* Any loop containing a label used in an initializer must be invalidated,
2572 because it can be jumped into from anywhere. */
2574 for (label = forced_labels; label; label = XEXP (label, 1))
2578 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2580 loop_num = loop_outer_loop[loop_num])
2581 loop_invalid[loop_num] = 1;
2584 /* Any loop containing a label used for an exception handler must be
2585 invalidated, because it can be jumped into from anywhere. */
2587 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2591 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2593 loop_num = loop_outer_loop[loop_num])
2594 loop_invalid[loop_num] = 1;
2597 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2598 loop that it is not contained within, that loop is marked invalid.
2599 If any INSN or CALL_INSN uses a label's address, then the loop containing
2600 that label is marked invalid, because it could be jumped into from
2603 Also look for blocks of code ending in an unconditional branch that
2604 exits the loop. If such a block is surrounded by a conditional
2605 branch around the block, move the block elsewhere (see below) and
2606 invert the jump to point to the code block. This may eliminate a
2607 label in our loop and will simplify processing by both us and a
2608 possible second cse pass. */
2610 for (insn = f; insn; insn = NEXT_INSN (insn))
2611 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2613 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2615 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2617 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2622 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2624 loop_num = loop_outer_loop[loop_num])
2625 loop_invalid[loop_num] = 1;
2629 if (GET_CODE (insn) != JUMP_INSN)
2632 mark_loop_jump (PATTERN (insn), this_loop_num);
2634 /* See if this is an unconditional branch outside the loop. */
2635 if (this_loop_num != -1
2636 && (GET_CODE (PATTERN (insn)) == RETURN
2637 || (simplejump_p (insn)
2638 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2640 && get_max_uid () < max_uid_for_loop)
2643 rtx our_next = next_real_insn (insn);
2645 int outer_loop = -1;
2647 /* Go backwards until we reach the start of the loop, a label,
2649 for (p = PREV_INSN (insn);
2650 GET_CODE (p) != CODE_LABEL
2651 && ! (GET_CODE (p) == NOTE
2652 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2653 && GET_CODE (p) != JUMP_INSN;
2657 /* Check for the case where we have a jump to an inner nested
2658 loop, and do not perform the optimization in that case. */
2660 if (JUMP_LABEL (insn))
2662 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2663 if (dest_loop != -1)
2665 for (outer_loop = dest_loop; outer_loop != -1;
2666 outer_loop = loop_outer_loop[outer_loop])
2667 if (outer_loop == this_loop_num)
2672 /* Make sure that the target of P is within the current loop. */
2674 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2675 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2676 outer_loop = this_loop_num;
2678 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2679 we have a block of code to try to move.
2681 We look backward and then forward from the target of INSN
2682 to find a BARRIER at the same loop depth as the target.
2683 If we find such a BARRIER, we make a new label for the start
2684 of the block, invert the jump in P and point it to that label,
2685 and move the block of code to the spot we found. */
2687 if (outer_loop == -1
2688 && GET_CODE (p) == JUMP_INSN
2689 && JUMP_LABEL (p) != 0
2690 /* Just ignore jumps to labels that were never emitted.
2691 These always indicate compilation errors. */
2692 && INSN_UID (JUMP_LABEL (p)) != 0
2694 && ! simplejump_p (p)
2695 && next_real_insn (JUMP_LABEL (p)) == our_next)
2698 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2699 int target_loop_num = uid_loop_num[INSN_UID (target)];
2702 for (loc = target; loc; loc = PREV_INSN (loc))
2703 if (GET_CODE (loc) == BARRIER
2704 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2708 for (loc = target; loc; loc = NEXT_INSN (loc))
2709 if (GET_CODE (loc) == BARRIER
2710 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2715 rtx cond_label = JUMP_LABEL (p);
2716 rtx new_label = get_label_after (p);
2718 /* Ensure our label doesn't go away. */
2719 LABEL_NUSES (cond_label)++;
2721 /* Verify that uid_loop_num is large enough and that
2723 if (invert_jump (p, new_label))
2727 /* If no suitable BARRIER was found, create a suitable
2728 one before TARGET. Since TARGET is a fall through
2729 path, we'll need to insert an jump around our block
2730 and a add a BARRIER before TARGET.
2732 This creates an extra unconditional jump outside
2733 the loop. However, the benefits of removing rarely
2734 executed instructions from inside the loop usually
2735 outweighs the cost of the extra unconditional jump
2736 outside the loop. */
2741 temp = gen_jump (JUMP_LABEL (insn));
2742 temp = emit_jump_insn_before (temp, target);
2743 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2744 LABEL_NUSES (JUMP_LABEL (insn))++;
2745 loc = emit_barrier_before (target);
2748 /* Include the BARRIER after INSN and copy the
2750 new_label = squeeze_notes (new_label, NEXT_INSN (insn));
2751 reorder_insns (new_label, NEXT_INSN (insn), loc);
2753 /* All those insns are now in TARGET_LOOP_NUM. */
2754 for (q = new_label; q != NEXT_INSN (NEXT_INSN (insn));
2756 uid_loop_num[INSN_UID (q)] = target_loop_num;
2758 /* The label jumped to by INSN is no longer a loop exit.
2759 Unless INSN does not have a label (e.g., it is a
2760 RETURN insn), search loop_number_exit_labels to find
2761 its label_ref, and remove it. Also turn off
2762 LABEL_OUTSIDE_LOOP_P bit. */
2763 if (JUMP_LABEL (insn))
2768 r = loop_number_exit_labels[this_loop_num];
2769 r; q = r, r = LABEL_NEXTREF (r))
2770 if (XEXP (r, 0) == JUMP_LABEL (insn))
2772 LABEL_OUTSIDE_LOOP_P (r) = 0;
2774 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2776 loop_number_exit_labels[this_loop_num]
2777 = LABEL_NEXTREF (r);
2781 for (loop_num = this_loop_num;
2782 loop_num != -1 && loop_num != target_loop_num;
2783 loop_num = loop_outer_loop[loop_num])
2784 loop_number_exit_count[loop_num]--;
2786 /* If we didn't find it, then something is wrong. */
2791 /* P is now a jump outside the loop, so it must be put
2792 in loop_number_exit_labels, and marked as such.
2793 The easiest way to do this is to just call
2794 mark_loop_jump again for P. */
2795 mark_loop_jump (PATTERN (p), this_loop_num);
2797 /* If INSN now jumps to the insn after it,
2799 if (JUMP_LABEL (insn) != 0
2800 && (next_real_insn (JUMP_LABEL (insn))
2801 == next_real_insn (insn)))
2805 /* Continue the loop after where the conditional
2806 branch used to jump, since the only branch insn
2807 in the block (if it still remains) is an inter-loop
2808 branch and hence needs no processing. */
2809 insn = NEXT_INSN (cond_label);
2811 if (--LABEL_NUSES (cond_label) == 0)
2812 delete_insn (cond_label);
2814 /* This loop will be continued with NEXT_INSN (insn). */
2815 insn = PREV_INSN (insn);
2822 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2823 loops it is contained in, mark the target loop invalid.
2825 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2828 mark_loop_jump (x, loop_num)
2836 switch (GET_CODE (x))
2849 /* There could be a label reference in here. */
2850 mark_loop_jump (XEXP (x, 0), loop_num);
2856 mark_loop_jump (XEXP (x, 0), loop_num);
2857 mark_loop_jump (XEXP (x, 1), loop_num);
2862 mark_loop_jump (XEXP (x, 0), loop_num);
2866 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
2868 /* Link together all labels that branch outside the loop. This
2869 is used by final_[bg]iv_value and the loop unrolling code. Also
2870 mark this LABEL_REF so we know that this branch should predict
2873 /* A check to make sure the label is not in an inner nested loop,
2874 since this does not count as a loop exit. */
2875 if (dest_loop != -1)
2877 for (outer_loop = dest_loop; outer_loop != -1;
2878 outer_loop = loop_outer_loop[outer_loop])
2879 if (outer_loop == loop_num)
2885 if (loop_num != -1 && outer_loop == -1)
2887 LABEL_OUTSIDE_LOOP_P (x) = 1;
2888 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2889 loop_number_exit_labels[loop_num] = x;
2891 for (outer_loop = loop_num;
2892 outer_loop != -1 && outer_loop != dest_loop;
2893 outer_loop = loop_outer_loop[outer_loop])
2894 loop_number_exit_count[outer_loop]++;
2897 /* If this is inside a loop, but not in the current loop or one enclosed
2898 by it, it invalidates at least one loop. */
2900 if (dest_loop == -1)
2903 /* We must invalidate every nested loop containing the target of this
2904 label, except those that also contain the jump insn. */
2906 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
2908 /* Stop when we reach a loop that also contains the jump insn. */
2909 for (outer_loop = loop_num; outer_loop != -1;
2910 outer_loop = loop_outer_loop[outer_loop])
2911 if (dest_loop == outer_loop)
2914 /* If we get here, we know we need to invalidate a loop. */
2915 if (loop_dump_stream && ! loop_invalid[dest_loop])
2916 fprintf (loop_dump_stream,
2917 "\nLoop at %d ignored due to multiple entry points.\n",
2918 INSN_UID (loop_number_loop_starts[dest_loop]));
2920 loop_invalid[dest_loop] = 1;
2925 /* If this is not setting pc, ignore. */
2926 if (SET_DEST (x) == pc_rtx)
2927 mark_loop_jump (SET_SRC (x), loop_num);
2931 mark_loop_jump (XEXP (x, 1), loop_num);
2932 mark_loop_jump (XEXP (x, 2), loop_num);
2937 for (i = 0; i < XVECLEN (x, 0); i++)
2938 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
2942 for (i = 0; i < XVECLEN (x, 1); i++)
2943 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
2947 /* Treat anything else (such as a symbol_ref)
2948 as a branch out of this loop, but not into any loop. */
2953 LABEL_OUTSIDE_LOOP_P (x) = 1;
2954 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2957 loop_number_exit_labels[loop_num] = x;
2959 for (outer_loop = loop_num; outer_loop != -1;
2960 outer_loop = loop_outer_loop[outer_loop])
2961 loop_number_exit_count[outer_loop]++;
2967 /* Return nonzero if there is a label in the range from
2968 insn INSN to and including the insn whose luid is END
2969 INSN must have an assigned luid (i.e., it must not have
2970 been previously created by loop.c). */
2973 labels_in_range_p (insn, end)
2977 while (insn && INSN_LUID (insn) <= end)
2979 if (GET_CODE (insn) == CODE_LABEL)
2981 insn = NEXT_INSN (insn);
2987 /* Record that a memory reference X is being set. */
2990 note_addr_stored (x, y)
2992 rtx y ATTRIBUTE_UNUSED;
2996 if (x == 0 || GET_CODE (x) != MEM)
2999 /* Count number of memory writes.
3000 This affects heuristics in strength_reduce. */
3003 /* BLKmode MEM means all memory is clobbered. */
3004 if (GET_MODE (x) == BLKmode)
3005 unknown_address_altered = 1;
3007 if (unknown_address_altered)
3010 for (i = 0; i < loop_store_mems_idx; i++)
3011 if (rtx_equal_p (XEXP (loop_store_mems[i], 0), XEXP (x, 0))
3012 && MEM_IN_STRUCT_P (x) == MEM_IN_STRUCT_P (loop_store_mems[i]))
3014 /* We are storing at the same address as previously noted. Save the
3016 if (GET_MODE_SIZE (GET_MODE (x))
3017 > GET_MODE_SIZE (GET_MODE (loop_store_mems[i])))
3018 loop_store_mems[i] = x;
3022 if (i == NUM_STORES)
3023 unknown_address_altered = 1;
3025 else if (i == loop_store_mems_idx)
3026 loop_store_mems[loop_store_mems_idx++] = x;
3029 /* Return nonzero if the rtx X is invariant over the current loop.
3031 The value is 2 if we refer to something only conditionally invariant.
3033 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3034 Otherwise, a memory ref is invariant if it does not conflict with
3035 anything stored in `loop_store_mems'. */
3042 register enum rtx_code code;
3044 int conditional = 0;
3048 code = GET_CODE (x);
3058 /* A LABEL_REF is normally invariant, however, if we are unrolling
3059 loops, and this label is inside the loop, then it isn't invariant.
3060 This is because each unrolled copy of the loop body will have
3061 a copy of this label. If this was invariant, then an insn loading
3062 the address of this label into a register might get moved outside
3063 the loop, and then each loop body would end up using the same label.
3065 We don't know the loop bounds here though, so just fail for all
3067 if (flag_unroll_loops)
3074 case UNSPEC_VOLATILE:
3078 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3079 since the reg might be set by initialization within the loop. */
3081 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3082 || x == arg_pointer_rtx)
3083 && ! current_function_has_nonlocal_goto)
3087 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3090 if (n_times_set[REGNO (x)] < 0)
3093 return n_times_set[REGNO (x)] == 0;
3096 /* Volatile memory references must be rejected. Do this before
3097 checking for read-only items, so that volatile read-only items
3098 will be rejected also. */
3099 if (MEM_VOLATILE_P (x))
3102 /* Read-only items (such as constants in a constant pool) are
3103 invariant if their address is. */
3104 if (RTX_UNCHANGING_P (x))
3107 /* If we filled the table (or had a subroutine call), any location
3108 in memory could have been clobbered. */
3109 if (unknown_address_altered)
3112 /* See if there is any dependence between a store and this load. */
3113 for (i = loop_store_mems_idx - 1; i >= 0; i--)
3114 if (true_dependence (loop_store_mems[i], VOIDmode, x, rtx_varies_p))
3117 /* It's not invalidated by a store in memory
3118 but we must still verify the address is invariant. */
3122 /* Don't mess with insns declared volatile. */
3123 if (MEM_VOLATILE_P (x))
3131 fmt = GET_RTX_FORMAT (code);
3132 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3136 int tem = invariant_p (XEXP (x, i));
3142 else if (fmt[i] == 'E')
3145 for (j = 0; j < XVECLEN (x, i); j++)
3147 int tem = invariant_p (XVECEXP (x, i, j));
3157 return 1 + conditional;
3161 /* Return nonzero if all the insns in the loop that set REG
3162 are INSN and the immediately following insns,
3163 and if each of those insns sets REG in an invariant way
3164 (not counting uses of REG in them).
3166 The value is 2 if some of these insns are only conditionally invariant.
3168 We assume that INSN itself is the first set of REG
3169 and that its source is invariant. */
3172 consec_sets_invariant_p (reg, n_sets, insn)
3176 register rtx p = insn;
3177 register int regno = REGNO (reg);
3179 /* Number of sets we have to insist on finding after INSN. */
3180 int count = n_sets - 1;
3181 int old = n_times_set[regno];
3185 /* If N_SETS hit the limit, we can't rely on its value. */
3189 n_times_set[regno] = 0;
3193 register enum rtx_code code;
3197 code = GET_CODE (p);
3199 /* If library call, skip to end of it. */
3200 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3205 && (set = single_set (p))
3206 && GET_CODE (SET_DEST (set)) == REG
3207 && REGNO (SET_DEST (set)) == regno)
3209 this = invariant_p (SET_SRC (set));
3212 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3214 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3215 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3217 this = (CONSTANT_P (XEXP (temp, 0))
3218 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3219 && invariant_p (XEXP (temp, 0))));
3226 else if (code != NOTE)
3228 n_times_set[regno] = old;
3233 n_times_set[regno] = old;
3234 /* If invariant_p ever returned 2, we return 2. */
3235 return 1 + (value & 2);
3239 /* I don't think this condition is sufficient to allow INSN
3240 to be moved, so we no longer test it. */
3242 /* Return 1 if all insns in the basic block of INSN and following INSN
3243 that set REG are invariant according to TABLE. */
3246 all_sets_invariant_p (reg, insn, table)
3250 register rtx p = insn;
3251 register int regno = REGNO (reg);
3255 register enum rtx_code code;
3257 code = GET_CODE (p);
3258 if (code == CODE_LABEL || code == JUMP_INSN)
3260 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3261 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3262 && REGNO (SET_DEST (PATTERN (p))) == regno)
3264 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3271 /* Look at all uses (not sets) of registers in X. For each, if it is
3272 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3273 a different insn, set USAGE[REGNO] to const0_rtx. */
3276 find_single_use_in_loop (insn, x, usage)
3281 enum rtx_code code = GET_CODE (x);
3282 char *fmt = GET_RTX_FORMAT (code);
3287 = (usage[REGNO (x)] != 0 && usage[REGNO (x)] != insn)
3288 ? const0_rtx : insn;
3290 else if (code == SET)
3292 /* Don't count SET_DEST if it is a REG; otherwise count things
3293 in SET_DEST because if a register is partially modified, it won't
3294 show up as a potential movable so we don't care how USAGE is set
3296 if (GET_CODE (SET_DEST (x)) != REG)
3297 find_single_use_in_loop (insn, SET_DEST (x), usage);
3298 find_single_use_in_loop (insn, SET_SRC (x), usage);
3301 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3303 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3304 find_single_use_in_loop (insn, XEXP (x, i), usage);
3305 else if (fmt[i] == 'E')
3306 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3307 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3311 /* Increment N_TIMES_SET at the index of each register
3312 that is modified by an insn between FROM and TO.
3313 If the value of an element of N_TIMES_SET becomes 127 or more,
3314 stop incrementing it, to avoid overflow.
3316 Store in SINGLE_USAGE[I] the single insn in which register I is
3317 used, if it is only used once. Otherwise, it is set to 0 (for no
3318 uses) or const0_rtx for more than one use. This parameter may be zero,
3319 in which case this processing is not done.
3321 Store in *COUNT_PTR the number of actual instruction
3322 in the loop. We use this to decide what is worth moving out. */
3324 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3325 In that case, it is the insn that last set reg n. */
3328 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3329 register rtx from, to;
3335 register rtx *last_set = (rtx *) alloca (nregs * sizeof (rtx));
3337 register int count = 0;
3340 bzero ((char *) last_set, nregs * sizeof (rtx));
3341 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3343 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3347 /* If requested, record registers that have exactly one use. */
3350 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3352 /* Include uses in REG_EQUAL notes. */
3353 if (REG_NOTES (insn))
3354 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3357 if (GET_CODE (PATTERN (insn)) == CLOBBER
3358 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
3359 /* Don't move a reg that has an explicit clobber.
3360 We might do so sometimes, but it's not worth the pain. */
3361 may_not_move[REGNO (XEXP (PATTERN (insn), 0))] = 1;
3363 if (GET_CODE (PATTERN (insn)) == SET
3364 || GET_CODE (PATTERN (insn)) == CLOBBER)
3366 dest = SET_DEST (PATTERN (insn));
3367 while (GET_CODE (dest) == SUBREG
3368 || GET_CODE (dest) == ZERO_EXTRACT
3369 || GET_CODE (dest) == SIGN_EXTRACT
3370 || GET_CODE (dest) == STRICT_LOW_PART)
3371 dest = XEXP (dest, 0);
3372 if (GET_CODE (dest) == REG)
3374 register int regno = REGNO (dest);
3375 /* If this is the first setting of this reg
3376 in current basic block, and it was set before,
3377 it must be set in two basic blocks, so it cannot
3378 be moved out of the loop. */
3379 if (n_times_set[regno] > 0 && last_set[regno] == 0)
3380 may_not_move[regno] = 1;
3381 /* If this is not first setting in current basic block,
3382 see if reg was used in between previous one and this.
3383 If so, neither one can be moved. */
3384 if (last_set[regno] != 0
3385 && reg_used_between_p (dest, last_set[regno], insn))
3386 may_not_move[regno] = 1;
3387 if (n_times_set[regno] < 127)
3388 ++n_times_set[regno];
3389 last_set[regno] = insn;
3392 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3395 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3397 register rtx x = XVECEXP (PATTERN (insn), 0, i);
3398 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3399 /* Don't move a reg that has an explicit clobber.
3400 It's not worth the pain to try to do it correctly. */
3401 may_not_move[REGNO (XEXP (x, 0))] = 1;
3403 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3405 dest = SET_DEST (x);
3406 while (GET_CODE (dest) == SUBREG
3407 || GET_CODE (dest) == ZERO_EXTRACT
3408 || GET_CODE (dest) == SIGN_EXTRACT
3409 || GET_CODE (dest) == STRICT_LOW_PART)
3410 dest = XEXP (dest, 0);
3411 if (GET_CODE (dest) == REG)
3413 register int regno = REGNO (dest);
3414 if (n_times_set[regno] > 0 && last_set[regno] == 0)
3415 may_not_move[regno] = 1;
3416 if (last_set[regno] != 0
3417 && reg_used_between_p (dest, last_set[regno], insn))
3418 may_not_move[regno] = 1;
3419 if (n_times_set[regno] < 127)
3420 ++n_times_set[regno];
3421 last_set[regno] = insn;
3428 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3429 bzero ((char *) last_set, nregs * sizeof (rtx));
3434 /* Given a loop that is bounded by LOOP_START and LOOP_END
3435 and that is entered at SCAN_START,
3436 return 1 if the register set in SET contained in insn INSN is used by
3437 any insn that precedes INSN in cyclic order starting
3438 from the loop entry point.
3440 We don't want to use INSN_LUID here because if we restrict INSN to those
3441 that have a valid INSN_LUID, it means we cannot move an invariant out
3442 from an inner loop past two loops. */
3445 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3446 rtx set, insn, loop_start, scan_start, loop_end;
3448 rtx reg = SET_DEST (set);
3451 /* Scan forward checking for register usage. If we hit INSN, we
3452 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3453 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3455 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3456 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3466 /* A "basic induction variable" or biv is a pseudo reg that is set
3467 (within this loop) only by incrementing or decrementing it. */
3468 /* A "general induction variable" or giv is a pseudo reg whose
3469 value is a linear function of a biv. */
3471 /* Bivs are recognized by `basic_induction_var';
3472 Givs by `general_induction_var'. */
3474 /* Indexed by register number, indicates whether or not register is an
3475 induction variable, and if so what type. */
3477 enum iv_mode *reg_iv_type;
3479 /* Indexed by register number, contains pointer to `struct induction'
3480 if register is an induction variable. This holds general info for
3481 all induction variables. */
3483 struct induction **reg_iv_info;
3485 /* Indexed by register number, contains pointer to `struct iv_class'
3486 if register is a basic induction variable. This holds info describing
3487 the class (a related group) of induction variables that the biv belongs
3490 struct iv_class **reg_biv_class;
3492 /* The head of a list which links together (via the next field)
3493 every iv class for the current loop. */
3495 struct iv_class *loop_iv_list;
3497 /* Communication with routines called via `note_stores'. */
3499 static rtx note_insn;
3501 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3503 static rtx addr_placeholder;
3505 /* ??? Unfinished optimizations, and possible future optimizations,
3506 for the strength reduction code. */
3508 /* ??? The interaction of biv elimination, and recognition of 'constant'
3509 bivs, may cause problems. */
3511 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3512 performance problems.
3514 Perhaps don't eliminate things that can be combined with an addressing
3515 mode. Find all givs that have the same biv, mult_val, and add_val;
3516 then for each giv, check to see if its only use dies in a following
3517 memory address. If so, generate a new memory address and check to see
3518 if it is valid. If it is valid, then store the modified memory address,
3519 otherwise, mark the giv as not done so that it will get its own iv. */
3521 /* ??? Could try to optimize branches when it is known that a biv is always
3524 /* ??? When replace a biv in a compare insn, we should replace with closest
3525 giv so that an optimized branch can still be recognized by the combiner,
3526 e.g. the VAX acb insn. */
3528 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3529 was rerun in loop_optimize whenever a register was added or moved.
3530 Also, some of the optimizations could be a little less conservative. */
3532 /* Perform strength reduction and induction variable elimination.
3534 Pseudo registers created during this function will be beyond the last
3535 valid index in several tables including n_times_set and regno_last_uid.
3536 This does not cause a problem here, because the added registers cannot be
3537 givs outside of their loop, and hence will never be reconsidered.
3538 But scan_loop must check regnos to make sure they are in bounds.
3540 SCAN_START is the first instruction in the loop, as the loop would
3541 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3542 the first instruction in the loop, as it is layed out in the
3543 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG. */
3546 strength_reduce (scan_start, end, loop_top, insn_count,
3547 loop_start, loop_end, unroll_p)
3561 /* This is 1 if current insn is not executed at least once for every loop
3563 int not_every_iteration = 0;
3564 /* This is 1 if current insn may be executed more than once for every
3566 int maybe_multiple = 0;
3567 /* Temporary list pointers for traversing loop_iv_list. */
3568 struct iv_class *bl, **backbl;
3569 /* Ratio of extra register life span we can justify
3570 for saving an instruction. More if loop doesn't call subroutines
3571 since in that case saving an insn makes more difference
3572 and more registers are available. */
3573 /* ??? could set this to last value of threshold in move_movables */
3574 int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3575 /* Map of pseudo-register replacements. */
3579 rtx end_insert_before;
3582 reg_iv_type = (enum iv_mode *) alloca (max_reg_before_loop
3583 * sizeof (enum iv_mode *));
3584 bzero ((char *) reg_iv_type, max_reg_before_loop * sizeof (enum iv_mode *));
3585 reg_iv_info = (struct induction **)
3586 alloca (max_reg_before_loop * sizeof (struct induction *));
3587 bzero ((char *) reg_iv_info, (max_reg_before_loop
3588 * sizeof (struct induction *)));
3589 reg_biv_class = (struct iv_class **)
3590 alloca (max_reg_before_loop * sizeof (struct iv_class *));
3591 bzero ((char *) reg_biv_class, (max_reg_before_loop
3592 * sizeof (struct iv_class *)));
3595 addr_placeholder = gen_reg_rtx (Pmode);
3597 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3598 must be put before this insn, so that they will appear in the right
3599 order (i.e. loop order).
3601 If loop_end is the end of the current function, then emit a
3602 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3604 if (NEXT_INSN (loop_end) != 0)
3605 end_insert_before = NEXT_INSN (loop_end);
3607 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3609 /* Scan through loop to find all possible bivs. */
3611 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
3613 p = next_insn_in_loop (p, scan_start, end, loop_top))
3615 if (GET_CODE (p) == INSN
3616 && (set = single_set (p))
3617 && GET_CODE (SET_DEST (set)) == REG)
3619 dest_reg = SET_DEST (set);
3620 if (REGNO (dest_reg) < max_reg_before_loop
3621 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3622 && reg_iv_type[REGNO (dest_reg)] != NOT_BASIC_INDUCT)
3624 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3625 dest_reg, p, &inc_val, &mult_val))
3627 /* It is a possible basic induction variable.
3628 Create and initialize an induction structure for it. */
3631 = (struct induction *) alloca (sizeof (struct induction));
3633 record_biv (v, p, dest_reg, inc_val, mult_val,
3634 not_every_iteration, maybe_multiple);
3635 reg_iv_type[REGNO (dest_reg)] = BASIC_INDUCT;
3637 else if (REGNO (dest_reg) < max_reg_before_loop)
3638 reg_iv_type[REGNO (dest_reg)] = NOT_BASIC_INDUCT;
3642 /* Past CODE_LABEL, we get to insns that may be executed multiple
3643 times. The only way we can be sure that they can't is if every
3644 jump insn between here and the end of the loop either
3645 returns, exits the loop, is a forward jump, or is a jump
3646 to the loop start. */
3648 if (GET_CODE (p) == CODE_LABEL)
3656 insn = NEXT_INSN (insn);
3657 if (insn == scan_start)
3665 if (insn == scan_start)
3669 if (GET_CODE (insn) == JUMP_INSN
3670 && GET_CODE (PATTERN (insn)) != RETURN
3671 && (! condjump_p (insn)
3672 || (JUMP_LABEL (insn) != 0
3673 && JUMP_LABEL (insn) != scan_start
3674 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
3675 || INSN_UID (insn) >= max_uid_for_loop
3676 || (INSN_LUID (JUMP_LABEL (insn))
3677 < INSN_LUID (insn))))))
3685 /* Past a jump, we get to insns for which we can't count
3686 on whether they will be executed during each iteration. */
3687 /* This code appears twice in strength_reduce. There is also similar
3688 code in scan_loop. */
3689 if (GET_CODE (p) == JUMP_INSN
3690 /* If we enter the loop in the middle, and scan around to the
3691 beginning, don't set not_every_iteration for that.
3692 This can be any kind of jump, since we want to know if insns
3693 will be executed if the loop is executed. */
3694 && ! (JUMP_LABEL (p) == loop_top
3695 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3696 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3700 /* If this is a jump outside the loop, then it also doesn't
3701 matter. Check to see if the target of this branch is on the
3702 loop_number_exits_labels list. */
3704 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3706 label = LABEL_NEXTREF (label))
3707 if (XEXP (label, 0) == JUMP_LABEL (p))
3711 not_every_iteration = 1;
3714 else if (GET_CODE (p) == NOTE)
3716 /* At the virtual top of a converted loop, insns are again known to
3717 be executed each iteration: logically, the loop begins here
3718 even though the exit code has been duplicated. */
3719 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3720 not_every_iteration = 0;
3721 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3723 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3727 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3728 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3729 or not an insn is known to be executed each iteration of the
3730 loop, whether or not any iterations are known to occur.
3732 Therefore, if we have just passed a label and have no more labels
3733 between here and the test insn of the loop, we know these insns
3734 will be executed each iteration. */
3736 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3737 && no_labels_between_p (p, loop_end))
3738 not_every_iteration = 0;
3741 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3742 Make a sanity check against n_times_set. */
3743 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3745 if (reg_iv_type[bl->regno] != BASIC_INDUCT
3746 /* Above happens if register modified by subreg, etc. */
3747 /* Make sure it is not recognized as a basic induction var: */
3748 || n_times_set[bl->regno] != bl->biv_count
3749 /* If never incremented, it is invariant that we decided not to
3750 move. So leave it alone. */
3751 || ! bl->incremented)
3753 if (loop_dump_stream)
3754 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3756 (reg_iv_type[bl->regno] != BASIC_INDUCT
3757 ? "not induction variable"
3758 : (! bl->incremented ? "never incremented"
3761 reg_iv_type[bl->regno] = NOT_BASIC_INDUCT;
3768 if (loop_dump_stream)
3769 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3773 /* Exit if there are no bivs. */
3776 /* Can still unroll the loop anyways, but indicate that there is no
3777 strength reduction info available. */
3779 unroll_loop (loop_end, insn_count, loop_start, end_insert_before, 0);
3784 /* Find initial value for each biv by searching backwards from loop_start,
3785 halting at first label. Also record any test condition. */
3788 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3792 if (GET_CODE (p) == CALL_INSN)
3795 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3796 || GET_CODE (p) == CALL_INSN)
3797 note_stores (PATTERN (p), record_initial);
3799 /* Record any test of a biv that branches around the loop if no store
3800 between it and the start of loop. We only care about tests with
3801 constants and registers and only certain of those. */
3802 if (GET_CODE (p) == JUMP_INSN
3803 && JUMP_LABEL (p) != 0
3804 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3805 && (test = get_condition_for_loop (p)) != 0
3806 && GET_CODE (XEXP (test, 0)) == REG
3807 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3808 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3809 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3810 && bl->init_insn == 0)
3812 /* If an NE test, we have an initial value! */
3813 if (GET_CODE (test) == NE)
3816 bl->init_set = gen_rtx_SET (VOIDmode,
3817 XEXP (test, 0), XEXP (test, 1));
3820 bl->initial_test = test;
3824 /* Look at the each biv and see if we can say anything better about its
3825 initial value from any initializing insns set up above. (This is done
3826 in two passes to avoid missing SETs in a PARALLEL.) */
3827 for (bl = loop_iv_list; bl; bl = bl->next)
3832 if (! bl->init_insn)
3835 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3836 is a constant, use the value of that. */
3837 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3838 && CONSTANT_P (XEXP (note, 0)))
3839 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3840 && CONSTANT_P (XEXP (note, 0))))
3841 src = XEXP (note, 0);
3843 src = SET_SRC (bl->init_set);
3845 if (loop_dump_stream)
3846 fprintf (loop_dump_stream,
3847 "Biv %d initialized at insn %d: initial value ",
3848 bl->regno, INSN_UID (bl->init_insn));
3850 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3851 || GET_MODE (src) == VOIDmode)
3852 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3854 bl->initial_value = src;
3856 if (loop_dump_stream)
3858 if (GET_CODE (src) == CONST_INT)
3860 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
3861 fputc ('\n', loop_dump_stream);
3865 print_rtl (loop_dump_stream, src);
3866 fprintf (loop_dump_stream, "\n");
3872 /* Biv initial value is not simple move,
3873 so let it keep initial value of "itself". */
3875 if (loop_dump_stream)
3876 fprintf (loop_dump_stream, "is complex\n");
3880 /* Search the loop for general induction variables. */
3882 /* A register is a giv if: it is only set once, it is a function of a
3883 biv and a constant (or invariant), and it is not a biv. */
3885 not_every_iteration = 0;
3891 /* At end of a straight-in loop, we are done.
3892 At end of a loop entered at the bottom, scan the top. */
3893 if (p == scan_start)
3901 if (p == scan_start)
3905 /* Look for a general induction variable in a register. */
3906 if (GET_CODE (p) == INSN
3907 && (set = single_set (p))
3908 && GET_CODE (SET_DEST (set)) == REG
3909 && ! may_not_optimize[REGNO (SET_DEST (set))])
3917 dest_reg = SET_DEST (set);
3918 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
3921 if (/* SET_SRC is a giv. */
3922 (general_induction_var (SET_SRC (set), &src_reg, &add_val,
3923 &mult_val, 0, &benefit)
3924 /* Equivalent expression is a giv. */
3925 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
3926 && general_induction_var (XEXP (regnote, 0), &src_reg,
3927 &add_val, &mult_val, 0,
3929 /* Don't try to handle any regs made by loop optimization.
3930 We have nothing on them in regno_first_uid, etc. */
3931 && REGNO (dest_reg) < max_reg_before_loop
3932 /* Don't recognize a BASIC_INDUCT_VAR here. */
3933 && dest_reg != src_reg
3934 /* This must be the only place where the register is set. */
3935 && (n_times_set[REGNO (dest_reg)] == 1
3936 /* or all sets must be consecutive and make a giv. */
3937 || (benefit = consec_sets_giv (benefit, p,
3939 &add_val, &mult_val))))
3943 = (struct induction *) alloca (sizeof (struct induction));
3946 /* If this is a library call, increase benefit. */
3947 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
3948 benefit += libcall_benefit (p);
3950 /* Skip the consecutive insns, if there are any. */
3951 for (count = n_times_set[REGNO (dest_reg)] - 1;
3954 /* If first insn of libcall sequence, skip to end.
3955 Do this at start of loop, since INSN is guaranteed to
3957 if (GET_CODE (p) != NOTE
3958 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3961 do p = NEXT_INSN (p);
3962 while (GET_CODE (p) == NOTE);
3965 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
3966 DEST_REG, not_every_iteration, NULL_PTR, loop_start,
3972 #ifndef DONT_REDUCE_ADDR
3973 /* Look for givs which are memory addresses. */
3974 /* This resulted in worse code on a VAX 8600. I wonder if it
3976 if (GET_CODE (p) == INSN)
3977 find_mem_givs (PATTERN (p), p, not_every_iteration, loop_start,
3981 /* Update the status of whether giv can derive other givs. This can
3982 change when we pass a label or an insn that updates a biv. */
3983 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3984 || GET_CODE (p) == CODE_LABEL)
3985 update_giv_derive (p);
3987 /* Past a jump, we get to insns for which we can't count
3988 on whether they will be executed during each iteration. */
3989 /* This code appears twice in strength_reduce. There is also similar
3990 code in scan_loop. */
3991 if (GET_CODE (p) == JUMP_INSN
3992 /* If we enter the loop in the middle, and scan around to the
3993 beginning, don't set not_every_iteration for that.
3994 This can be any kind of jump, since we want to know if insns
3995 will be executed if the loop is executed. */
3996 && ! (JUMP_LABEL (p) == loop_top
3997 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3998 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
4002 /* If this is a jump outside the loop, then it also doesn't
4003 matter. Check to see if the target of this branch is on the
4004 loop_number_exits_labels list. */
4006 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
4008 label = LABEL_NEXTREF (label))
4009 if (XEXP (label, 0) == JUMP_LABEL (p))
4013 not_every_iteration = 1;
4016 else if (GET_CODE (p) == NOTE)
4018 /* At the virtual top of a converted loop, insns are again known to
4019 be executed each iteration: logically, the loop begins here
4020 even though the exit code has been duplicated. */
4021 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
4022 not_every_iteration = 0;
4023 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4025 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4029 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4030 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4031 or not an insn is known to be executed each iteration of the
4032 loop, whether or not any iterations are known to occur.
4034 Therefore, if we have just passed a label and have no more labels
4035 between here and the test insn of the loop, we know these insns
4036 will be executed each iteration. */
4038 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4039 && no_labels_between_p (p, loop_end))
4040 not_every_iteration = 0;
4043 /* Try to calculate and save the number of loop iterations. This is
4044 set to zero if the actual number can not be calculated. This must
4045 be called after all giv's have been identified, since otherwise it may
4046 fail if the iteration variable is a giv. */
4048 loop_n_iterations = loop_iterations (loop_start, loop_end);
4050 /* Now for each giv for which we still don't know whether or not it is
4051 replaceable, check to see if it is replaceable because its final value
4052 can be calculated. This must be done after loop_iterations is called,
4053 so that final_giv_value will work correctly. */
4055 for (bl = loop_iv_list; bl; bl = bl->next)
4057 struct induction *v;
4059 for (v = bl->giv; v; v = v->next_iv)
4060 if (! v->replaceable && ! v->not_replaceable)
4061 check_final_value (v, loop_start, loop_end);
4064 /* Try to prove that the loop counter variable (if any) is always
4065 nonnegative; if so, record that fact with a REG_NONNEG note
4066 so that "decrement and branch until zero" insn can be used. */
4067 check_dbra_loop (loop_end, insn_count, loop_start);
4070 /* record loop-variables relevant for BCT optimization before unrolling
4071 the loop. Unrolling may update part of this information, and the
4072 correct data will be used for generating the BCT. */
4073 #ifdef HAVE_decrement_and_branch_on_count
4074 if (HAVE_decrement_and_branch_on_count)
4075 analyze_loop_iterations (loop_start, loop_end);
4079 /* Create reg_map to hold substitutions for replaceable giv regs. */
4080 reg_map = (rtx *) alloca (max_reg_before_loop * sizeof (rtx));
4081 bzero ((char *) reg_map, max_reg_before_loop * sizeof (rtx));
4083 /* Examine each iv class for feasibility of strength reduction/induction
4084 variable elimination. */
4086 for (bl = loop_iv_list; bl; bl = bl->next)
4088 struct induction *v;
4091 rtx final_value = 0;
4093 /* Test whether it will be possible to eliminate this biv
4094 provided all givs are reduced. This is possible if either
4095 the reg is not used outside the loop, or we can compute
4096 what its final value will be.
4098 For architectures with a decrement_and_branch_until_zero insn,
4099 don't do this if we put a REG_NONNEG note on the endtest for
4102 /* Compare against bl->init_insn rather than loop_start.
4103 We aren't concerned with any uses of the biv between
4104 init_insn and loop_start since these won't be affected
4105 by the value of the biv elsewhere in the function, so
4106 long as init_insn doesn't use the biv itself.
4107 March 14, 1989 -- self@bayes.arc.nasa.gov */
4109 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4111 && INSN_UID (bl->init_insn) < max_uid_for_loop
4112 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4113 #ifdef HAVE_decrement_and_branch_until_zero
4116 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4117 || ((final_value = final_biv_value (bl, loop_start, loop_end))
4118 #ifdef HAVE_decrement_and_branch_until_zero
4122 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
4123 threshold, insn_count);
4126 if (loop_dump_stream)
4128 fprintf (loop_dump_stream,
4129 "Cannot eliminate biv %d.\n",
4131 fprintf (loop_dump_stream,
4132 "First use: insn %d, last use: insn %d.\n",
4133 REGNO_FIRST_UID (bl->regno),
4134 REGNO_LAST_UID (bl->regno));
4138 /* Combine all giv's for this iv_class. */
4141 /* This will be true at the end, if all givs which depend on this
4142 biv have been strength reduced.
4143 We can't (currently) eliminate the biv unless this is so. */
4146 /* Check each giv in this class to see if we will benefit by reducing
4147 it. Skip giv's combined with others. */
4148 for (v = bl->giv; v; v = v->next_iv)
4150 struct induction *tv;
4152 if (v->ignore || v->same)
4155 benefit = v->benefit;
4157 /* Reduce benefit if not replaceable, since we will insert
4158 a move-insn to replace the insn that calculates this giv.
4159 Don't do this unless the giv is a user variable, since it
4160 will often be marked non-replaceable because of the duplication
4161 of the exit code outside the loop. In such a case, the copies
4162 we insert are dead and will be deleted. So they don't have
4163 a cost. Similar situations exist. */
4164 /* ??? The new final_[bg]iv_value code does a much better job
4165 of finding replaceable giv's, and hence this code may no longer
4167 if (! v->replaceable && ! bl->eliminable
4168 && REG_USERVAR_P (v->dest_reg))
4169 benefit -= copy_cost;
4171 /* Decrease the benefit to count the add-insns that we will
4172 insert to increment the reduced reg for the giv. */
4173 benefit -= add_cost * bl->biv_count;
4175 /* Decide whether to strength-reduce this giv or to leave the code
4176 unchanged (recompute it from the biv each time it is used).
4177 This decision can be made independently for each giv. */
4180 /* Attempt to guess whether autoincrement will handle some of the
4181 new add insns; if so, increase BENEFIT (undo the subtraction of
4182 add_cost that was done above). */
4183 if (v->giv_type == DEST_ADDR
4184 && GET_CODE (v->mult_val) == CONST_INT)
4186 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
4187 if (INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4188 benefit += add_cost * bl->biv_count;
4190 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
4191 if (-INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4192 benefit += add_cost * bl->biv_count;
4197 /* If an insn is not to be strength reduced, then set its ignore
4198 flag, and clear all_reduced. */
4200 /* A giv that depends on a reversed biv must be reduced if it is
4201 used after the loop exit, otherwise, it would have the wrong
4202 value after the loop exit. To make it simple, just reduce all
4203 of such giv's whether or not we know they are used after the loop
4206 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4209 if (loop_dump_stream)
4210 fprintf (loop_dump_stream,
4211 "giv of insn %d not worth while, %d vs %d.\n",
4213 v->lifetime * threshold * benefit, insn_count);
4219 /* Check that we can increment the reduced giv without a
4220 multiply insn. If not, reject it. */
4222 for (tv = bl->biv; tv; tv = tv->next_iv)
4223 if (tv->mult_val == const1_rtx
4224 && ! product_cheap_p (tv->add_val, v->mult_val))
4226 if (loop_dump_stream)
4227 fprintf (loop_dump_stream,
4228 "giv of insn %d: would need a multiply.\n",
4229 INSN_UID (v->insn));
4237 /* Reduce each giv that we decided to reduce. */
4239 for (v = bl->giv; v; v = v->next_iv)
4241 struct induction *tv;
4242 if (! v->ignore && v->same == 0)
4244 int auto_inc_opt = 0;
4246 v->new_reg = gen_reg_rtx (v->mode);
4249 /* If the target has auto-increment addressing modes, and
4250 this is an address giv, then try to put the increment
4251 immediately after its use, so that flow can create an
4252 auto-increment addressing mode. */
4253 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4254 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4255 /* We don't handle reversed biv's because bl->biv->insn
4256 does not have a valid INSN_LUID. */
4258 && v->always_executed && ! v->maybe_multiple
4259 && INSN_UID (v->insn) < max_uid_for_loop)
4261 /* If other giv's have been combined with this one, then
4262 this will work only if all uses of the other giv's occur
4263 before this giv's insn. This is difficult to check.
4265 We simplify this by looking for the common case where
4266 there is one DEST_REG giv, and this giv's insn is the
4267 last use of the dest_reg of that DEST_REG giv. If the
4268 increment occurs after the address giv, then we can
4269 perform the optimization. (Otherwise, the increment
4270 would have to go before other_giv, and we would not be
4271 able to combine it with the address giv to get an
4272 auto-inc address.) */
4273 if (v->combined_with)
4275 struct induction *other_giv = 0;
4277 for (tv = bl->giv; tv; tv = tv->next_iv)
4285 if (! tv && other_giv
4286 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4287 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4288 == INSN_UID (v->insn))
4289 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4292 /* Check for case where increment is before the address
4293 giv. Do this test in "loop order". */
4294 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4295 && (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4296 || (INSN_LUID (bl->biv->insn)
4297 > INSN_LUID (scan_start))))
4298 || (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4299 && (INSN_LUID (scan_start)
4300 < INSN_LUID (bl->biv->insn))))
4309 /* We can't put an insn immediately after one setting
4310 cc0, or immediately before one using cc0. */
4311 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4312 || (auto_inc_opt == -1
4313 && (prev = prev_nonnote_insn (v->insn)) != 0
4314 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4315 && sets_cc0_p (PATTERN (prev))))
4321 v->auto_inc_opt = 1;
4325 /* For each place where the biv is incremented, add an insn
4326 to increment the new, reduced reg for the giv. */
4327 for (tv = bl->biv; tv; tv = tv->next_iv)
4332 insert_before = tv->insn;
4333 else if (auto_inc_opt == 1)
4334 insert_before = NEXT_INSN (v->insn);
4336 insert_before = v->insn;
4338 if (tv->mult_val == const1_rtx)
4339 emit_iv_add_mult (tv->add_val, v->mult_val,
4340 v->new_reg, v->new_reg, insert_before);
4341 else /* tv->mult_val == const0_rtx */
4342 /* A multiply is acceptable here
4343 since this is presumed to be seldom executed. */
4344 emit_iv_add_mult (tv->add_val, v->mult_val,
4345 v->add_val, v->new_reg, insert_before);
4348 /* Add code at loop start to initialize giv's reduced reg. */
4350 emit_iv_add_mult (bl->initial_value, v->mult_val,
4351 v->add_val, v->new_reg, loop_start);
4355 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4358 For each giv register that can be reduced now: if replaceable,
4359 substitute reduced reg wherever the old giv occurs;
4360 else add new move insn "giv_reg = reduced_reg".
4362 Also check for givs whose first use is their definition and whose
4363 last use is the definition of another giv. If so, it is likely
4364 dead and should not be used to eliminate a biv. */
4365 for (v = bl->giv; v; v = v->next_iv)
4367 if (v->same && v->same->ignore)
4373 if (v->giv_type == DEST_REG
4374 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4376 struct induction *v1;
4378 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4379 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4383 /* Update expression if this was combined, in case other giv was
4386 v->new_reg = replace_rtx (v->new_reg,
4387 v->same->dest_reg, v->same->new_reg);
4389 if (v->giv_type == DEST_ADDR)
4390 /* Store reduced reg as the address in the memref where we found
4392 validate_change (v->insn, v->location, v->new_reg, 0);
4393 else if (v->replaceable)
4395 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4398 /* I can no longer duplicate the original problem. Perhaps
4399 this is unnecessary now? */
4401 /* Replaceable; it isn't strictly necessary to delete the old
4402 insn and emit a new one, because v->dest_reg is now dead.
4404 However, especially when unrolling loops, the special
4405 handling for (set REG0 REG1) in the second cse pass may
4406 make v->dest_reg live again. To avoid this problem, emit
4407 an insn to set the original giv reg from the reduced giv.
4408 We can not delete the original insn, since it may be part
4409 of a LIBCALL, and the code in flow that eliminates dead
4410 libcalls will fail if it is deleted. */
4411 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4417 /* Not replaceable; emit an insn to set the original giv reg from
4418 the reduced giv, same as above. */
4419 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4423 /* When a loop is reversed, givs which depend on the reversed
4424 biv, and which are live outside the loop, must be set to their
4425 correct final value. This insn is only needed if the giv is
4426 not replaceable. The correct final value is the same as the
4427 value that the giv starts the reversed loop with. */
4428 if (bl->reversed && ! v->replaceable)
4429 emit_iv_add_mult (bl->initial_value, v->mult_val,
4430 v->add_val, v->dest_reg, end_insert_before);
4431 else if (v->final_value)
4435 /* If the loop has multiple exits, emit the insn before the
4436 loop to ensure that it will always be executed no matter
4437 how the loop exits. Otherwise, emit the insn after the loop,
4438 since this is slightly more efficient. */
4439 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4440 insert_before = loop_start;
4442 insert_before = end_insert_before;
4443 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4447 /* If the insn to set the final value of the giv was emitted
4448 before the loop, then we must delete the insn inside the loop
4449 that sets it. If this is a LIBCALL, then we must delete
4450 every insn in the libcall. Note, however, that
4451 final_giv_value will only succeed when there are multiple
4452 exits if the giv is dead at each exit, hence it does not
4453 matter that the original insn remains because it is dead
4455 /* Delete the insn inside the loop that sets the giv since
4456 the giv is now set before (or after) the loop. */
4457 delete_insn (v->insn);
4461 if (loop_dump_stream)
4463 fprintf (loop_dump_stream, "giv at %d reduced to ",
4464 INSN_UID (v->insn));
4465 print_rtl (loop_dump_stream, v->new_reg);
4466 fprintf (loop_dump_stream, "\n");
4470 /* All the givs based on the biv bl have been reduced if they
4473 /* For each giv not marked as maybe dead that has been combined with a
4474 second giv, clear any "maybe dead" mark on that second giv.
4475 v->new_reg will either be or refer to the register of the giv it
4478 Doing this clearing avoids problems in biv elimination where a
4479 giv's new_reg is a complex value that can't be put in the insn but
4480 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4481 Since the register will be used in either case, we'd prefer it be
4482 used from the simpler giv. */
4484 for (v = bl->giv; v; v = v->next_iv)
4485 if (! v->maybe_dead && v->same)
4486 v->same->maybe_dead = 0;
4488 /* Try to eliminate the biv, if it is a candidate.
4489 This won't work if ! all_reduced,
4490 since the givs we planned to use might not have been reduced.
4492 We have to be careful that we didn't initially think we could eliminate
4493 this biv because of a giv that we now think may be dead and shouldn't
4494 be used as a biv replacement.
4496 Also, there is the possibility that we may have a giv that looks
4497 like it can be used to eliminate a biv, but the resulting insn
4498 isn't valid. This can happen, for example, on the 88k, where a
4499 JUMP_INSN can compare a register only with zero. Attempts to
4500 replace it with a compare with a constant will fail.
4502 Note that in cases where this call fails, we may have replaced some
4503 of the occurrences of the biv with a giv, but no harm was done in
4504 doing so in the rare cases where it can occur. */
4506 if (all_reduced == 1 && bl->eliminable
4507 && maybe_eliminate_biv (bl, loop_start, end, 1,
4508 threshold, insn_count))
4511 /* ?? If we created a new test to bypass the loop entirely,
4512 or otherwise drop straight in, based on this test, then
4513 we might want to rewrite it also. This way some later
4514 pass has more hope of removing the initialization of this
4517 /* If final_value != 0, then the biv may be used after loop end
4518 and we must emit an insn to set it just in case.
4520 Reversed bivs already have an insn after the loop setting their
4521 value, so we don't need another one. We can't calculate the
4522 proper final value for such a biv here anyways. */
4523 if (final_value != 0 && ! bl->reversed)
4527 /* If the loop has multiple exits, emit the insn before the
4528 loop to ensure that it will always be executed no matter
4529 how the loop exits. Otherwise, emit the insn after the
4530 loop, since this is slightly more efficient. */
4531 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4532 insert_before = loop_start;
4534 insert_before = end_insert_before;
4536 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4541 /* Delete all of the instructions inside the loop which set
4542 the biv, as they are all dead. If is safe to delete them,
4543 because an insn setting a biv will never be part of a libcall. */
4544 /* However, deleting them will invalidate the regno_last_uid info,
4545 so keeping them around is more convenient. Final_biv_value
4546 will only succeed when there are multiple exits if the biv
4547 is dead at each exit, hence it does not matter that the original
4548 insn remains, because it is dead anyways. */
4549 for (v = bl->biv; v; v = v->next_iv)
4550 delete_insn (v->insn);
4553 if (loop_dump_stream)
4554 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4559 /* Go through all the instructions in the loop, making all the
4560 register substitutions scheduled in REG_MAP. */
4562 for (p = loop_start; p != end; p = NEXT_INSN (p))
4563 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4564 || GET_CODE (p) == CALL_INSN)
4566 replace_regs (PATTERN (p), reg_map, max_reg_before_loop, 0);
4567 replace_regs (REG_NOTES (p), reg_map, max_reg_before_loop, 0);
4571 /* Unroll loops from within strength reduction so that we can use the
4572 induction variable information that strength_reduce has already
4576 unroll_loop (loop_end, insn_count, loop_start, end_insert_before, 1);
4579 /* instrument the loop with bct insn */
4580 #ifdef HAVE_decrement_and_branch_on_count
4581 if (HAVE_decrement_and_branch_on_count)
4582 insert_bct (loop_start, loop_end);
4586 if (loop_dump_stream)
4587 fprintf (loop_dump_stream, "\n");
4590 /* Return 1 if X is a valid source for an initial value (or as value being
4591 compared against in an initial test).
4593 X must be either a register or constant and must not be clobbered between
4594 the current insn and the start of the loop.
4596 INSN is the insn containing X. */
4599 valid_initial_value_p (x, insn, call_seen, loop_start)
4608 /* Only consider pseudos we know about initialized in insns whose luids
4610 if (GET_CODE (x) != REG
4611 || REGNO (x) >= max_reg_before_loop)
4614 /* Don't use call-clobbered registers across a call which clobbers it. On
4615 some machines, don't use any hard registers at all. */
4616 if (REGNO (x) < FIRST_PSEUDO_REGISTER
4617 && (SMALL_REGISTER_CLASSES
4618 || (call_used_regs[REGNO (x)] && call_seen)))
4621 /* Don't use registers that have been clobbered before the start of the
4623 if (reg_set_between_p (x, insn, loop_start))
4629 /* Scan X for memory refs and check each memory address
4630 as a possible giv. INSN is the insn whose pattern X comes from.
4631 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4632 every loop iteration. */
4635 find_mem_givs (x, insn, not_every_iteration, loop_start, loop_end)
4638 int not_every_iteration;
4639 rtx loop_start, loop_end;
4642 register enum rtx_code code;
4648 code = GET_CODE (x);
4672 /* This code used to disable creating GIVs with mult_val == 1 and
4673 add_val == 0. However, this leads to lost optimizations when
4674 it comes time to combine a set of related DEST_ADDR GIVs, since
4675 this one would not be seen. */
4677 if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
4678 &mult_val, 1, &benefit))
4680 /* Found one; record it. */
4682 = (struct induction *) oballoc (sizeof (struct induction));
4684 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
4685 add_val, benefit, DEST_ADDR, not_every_iteration,
4686 &XEXP (x, 0), loop_start, loop_end);
4688 v->mem_mode = GET_MODE (x);
4697 /* Recursively scan the subexpressions for other mem refs. */
4699 fmt = GET_RTX_FORMAT (code);
4700 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4702 find_mem_givs (XEXP (x, i), insn, not_every_iteration, loop_start,
4704 else if (fmt[i] == 'E')
4705 for (j = 0; j < XVECLEN (x, i); j++)
4706 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
4707 loop_start, loop_end);
4710 /* Fill in the data about one biv update.
4711 V is the `struct induction' in which we record the biv. (It is
4712 allocated by the caller, with alloca.)
4713 INSN is the insn that sets it.
4714 DEST_REG is the biv's reg.
4716 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4717 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4718 being set to INC_VAL.
4720 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4721 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4722 can be executed more than once per iteration. If MAYBE_MULTIPLE
4723 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4724 executed exactly once per iteration. */
4727 record_biv (v, insn, dest_reg, inc_val, mult_val,
4728 not_every_iteration, maybe_multiple)
4729 struct induction *v;
4734 int not_every_iteration;
4737 struct iv_class *bl;
4740 v->src_reg = dest_reg;
4741 v->dest_reg = dest_reg;
4742 v->mult_val = mult_val;
4743 v->add_val = inc_val;
4744 v->mode = GET_MODE (dest_reg);
4745 v->always_computable = ! not_every_iteration;
4746 v->always_executed = ! not_every_iteration;
4747 v->maybe_multiple = maybe_multiple;
4749 /* Add this to the reg's iv_class, creating a class
4750 if this is the first incrementation of the reg. */
4752 bl = reg_biv_class[REGNO (dest_reg)];
4755 /* Create and initialize new iv_class. */
4757 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
4759 bl->regno = REGNO (dest_reg);
4765 /* Set initial value to the reg itself. */
4766 bl->initial_value = dest_reg;
4767 /* We haven't seen the initializing insn yet */
4770 bl->initial_test = 0;
4771 bl->incremented = 0;
4775 bl->total_benefit = 0;
4777 /* Add this class to loop_iv_list. */
4778 bl->next = loop_iv_list;
4781 /* Put it in the array of biv register classes. */
4782 reg_biv_class[REGNO (dest_reg)] = bl;
4785 /* Update IV_CLASS entry for this biv. */
4786 v->next_iv = bl->biv;
4789 if (mult_val == const1_rtx)
4790 bl->incremented = 1;
4792 if (loop_dump_stream)
4794 fprintf (loop_dump_stream,
4795 "Insn %d: possible biv, reg %d,",
4796 INSN_UID (insn), REGNO (dest_reg));
4797 if (GET_CODE (inc_val) == CONST_INT)
4799 fprintf (loop_dump_stream, " const =");
4800 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
4801 fputc ('\n', loop_dump_stream);
4805 fprintf (loop_dump_stream, " const = ");
4806 print_rtl (loop_dump_stream, inc_val);
4807 fprintf (loop_dump_stream, "\n");
4812 /* Fill in the data about one giv.
4813 V is the `struct induction' in which we record the giv. (It is
4814 allocated by the caller, with alloca.)
4815 INSN is the insn that sets it.
4816 BENEFIT estimates the savings from deleting this insn.
4817 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4818 into a register or is used as a memory address.
4820 SRC_REG is the biv reg which the giv is computed from.
4821 DEST_REG is the giv's reg (if the giv is stored in a reg).
4822 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4823 LOCATION points to the place where this giv's value appears in INSN. */
4826 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
4827 type, not_every_iteration, location, loop_start, loop_end)
4828 struct induction *v;
4832 rtx mult_val, add_val;
4835 int not_every_iteration;
4837 rtx loop_start, loop_end;
4839 struct induction *b;
4840 struct iv_class *bl;
4841 rtx set = single_set (insn);
4844 v->src_reg = src_reg;
4846 v->dest_reg = dest_reg;
4847 v->mult_val = mult_val;
4848 v->add_val = add_val;
4849 v->benefit = benefit;
4850 v->location = location;
4852 v->combined_with = 0;
4853 v->maybe_multiple = 0;
4855 v->derive_adjustment = 0;
4861 v->auto_inc_opt = 0;
4865 /* The v->always_computable field is used in update_giv_derive, to
4866 determine whether a giv can be used to derive another giv. For a
4867 DEST_REG giv, INSN computes a new value for the giv, so its value
4868 isn't computable if INSN insn't executed every iteration.
4869 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4870 it does not compute a new value. Hence the value is always computable
4871 regardless of whether INSN is executed each iteration. */
4873 if (type == DEST_ADDR)
4874 v->always_computable = 1;
4876 v->always_computable = ! not_every_iteration;
4878 v->always_executed = ! not_every_iteration;
4880 if (type == DEST_ADDR)
4882 v->mode = GET_MODE (*location);
4886 else /* type == DEST_REG */
4888 v->mode = GET_MODE (SET_DEST (set));
4890 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
4891 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
4893 v->times_used = n_times_used[REGNO (dest_reg)];
4895 /* If the lifetime is zero, it means that this register is
4896 really a dead store. So mark this as a giv that can be
4897 ignored. This will not prevent the biv from being eliminated. */
4898 if (v->lifetime == 0)
4901 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
4902 reg_iv_info[REGNO (dest_reg)] = v;
4905 /* Add the giv to the class of givs computed from one biv. */
4907 bl = reg_biv_class[REGNO (src_reg)];
4910 v->next_iv = bl->giv;
4912 /* Don't count DEST_ADDR. This is supposed to count the number of
4913 insns that calculate givs. */
4914 if (type == DEST_REG)
4916 bl->total_benefit += benefit;
4919 /* Fatal error, biv missing for this giv? */
4922 if (type == DEST_ADDR)
4926 /* The giv can be replaced outright by the reduced register only if all
4927 of the following conditions are true:
4928 - the insn that sets the giv is always executed on any iteration
4929 on which the giv is used at all
4930 (there are two ways to deduce this:
4931 either the insn is executed on every iteration,
4932 or all uses follow that insn in the same basic block),
4933 - the giv is not used outside the loop
4934 - no assignments to the biv occur during the giv's lifetime. */
4936 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
4937 /* Previous line always fails if INSN was moved by loop opt. */
4938 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
4939 && (! not_every_iteration
4940 || last_use_this_basic_block (dest_reg, insn)))
4942 /* Now check that there are no assignments to the biv within the
4943 giv's lifetime. This requires two separate checks. */
4945 /* Check each biv update, and fail if any are between the first
4946 and last use of the giv.
4948 If this loop contains an inner loop that was unrolled, then
4949 the insn modifying the biv may have been emitted by the loop
4950 unrolling code, and hence does not have a valid luid. Just
4951 mark the biv as not replaceable in this case. It is not very
4952 useful as a biv, because it is used in two different loops.
4953 It is very unlikely that we would be able to optimize the giv
4954 using this biv anyways. */
4957 for (b = bl->biv; b; b = b->next_iv)
4959 if (INSN_UID (b->insn) >= max_uid_for_loop
4960 || ((uid_luid[INSN_UID (b->insn)]
4961 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
4962 && (uid_luid[INSN_UID (b->insn)]
4963 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
4966 v->not_replaceable = 1;
4971 /* If there are any backwards branches that go from after the
4972 biv update to before it, then this giv is not replaceable. */
4974 for (b = bl->biv; b; b = b->next_iv)
4975 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
4978 v->not_replaceable = 1;
4984 /* May still be replaceable, we don't have enough info here to
4987 v->not_replaceable = 0;
4991 /* Record whether the add_val contains a const_int, for later use by
4996 v->no_const_addval = 1;
4997 if (tem == const0_rtx)
4999 else if (GET_CODE (tem) == CONST_INT)
5000 v->no_const_addval = 0;
5001 else if (GET_CODE (tem) == PLUS)
5005 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5006 tem = XEXP (tem, 0);
5007 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5008 tem = XEXP (tem, 1);
5012 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5013 v->no_const_addval = 0;
5017 if (loop_dump_stream)
5019 if (type == DEST_REG)
5020 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5021 INSN_UID (insn), REGNO (dest_reg));
5023 fprintf (loop_dump_stream, "Insn %d: dest address",
5026 fprintf (loop_dump_stream, " src reg %d benefit %d",
5027 REGNO (src_reg), v->benefit);
5028 fprintf (loop_dump_stream, " used %d lifetime %d",
5029 v->times_used, v->lifetime);
5032 fprintf (loop_dump_stream, " replaceable");
5034 if (v->no_const_addval)
5035 fprintf (loop_dump_stream, " ncav");
5037 if (GET_CODE (mult_val) == CONST_INT)
5039 fprintf (loop_dump_stream, " mult ");
5040 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5044 fprintf (loop_dump_stream, " mult ");
5045 print_rtl (loop_dump_stream, mult_val);
5048 if (GET_CODE (add_val) == CONST_INT)
5050 fprintf (loop_dump_stream, " add ");
5051 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5055 fprintf (loop_dump_stream, " add ");
5056 print_rtl (loop_dump_stream, add_val);
5060 if (loop_dump_stream)
5061 fprintf (loop_dump_stream, "\n");
5066 /* All this does is determine whether a giv can be made replaceable because
5067 its final value can be calculated. This code can not be part of record_giv
5068 above, because final_giv_value requires that the number of loop iterations
5069 be known, and that can not be accurately calculated until after all givs
5070 have been identified. */
5073 check_final_value (v, loop_start, loop_end)
5074 struct induction *v;
5075 rtx loop_start, loop_end;
5077 struct iv_class *bl;
5078 rtx final_value = 0;
5080 bl = reg_biv_class[REGNO (v->src_reg)];
5082 /* DEST_ADDR givs will never reach here, because they are always marked
5083 replaceable above in record_giv. */
5085 /* The giv can be replaced outright by the reduced register only if all
5086 of the following conditions are true:
5087 - the insn that sets the giv is always executed on any iteration
5088 on which the giv is used at all
5089 (there are two ways to deduce this:
5090 either the insn is executed on every iteration,
5091 or all uses follow that insn in the same basic block),
5092 - its final value can be calculated (this condition is different
5093 than the one above in record_giv)
5094 - no assignments to the biv occur during the giv's lifetime. */
5097 /* This is only called now when replaceable is known to be false. */
5098 /* Clear replaceable, so that it won't confuse final_giv_value. */
5102 if ((final_value = final_giv_value (v, loop_start, loop_end))
5103 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5105 int biv_increment_seen = 0;
5111 /* When trying to determine whether or not a biv increment occurs
5112 during the lifetime of the giv, we can ignore uses of the variable
5113 outside the loop because final_value is true. Hence we can not
5114 use regno_last_uid and regno_first_uid as above in record_giv. */
5116 /* Search the loop to determine whether any assignments to the
5117 biv occur during the giv's lifetime. Start with the insn
5118 that sets the giv, and search around the loop until we come
5119 back to that insn again.
5121 Also fail if there is a jump within the giv's lifetime that jumps
5122 to somewhere outside the lifetime but still within the loop. This
5123 catches spaghetti code where the execution order is not linear, and
5124 hence the above test fails. Here we assume that the giv lifetime
5125 does not extend from one iteration of the loop to the next, so as
5126 to make the test easier. Since the lifetime isn't known yet,
5127 this requires two loops. See also record_giv above. */
5129 last_giv_use = v->insn;
5135 p = NEXT_INSN (loop_start);
5139 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5140 || GET_CODE (p) == CALL_INSN)
5142 if (biv_increment_seen)
5144 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5147 v->not_replaceable = 1;
5151 else if (reg_set_p (v->src_reg, PATTERN (p)))
5152 biv_increment_seen = 1;
5153 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5158 /* Now that the lifetime of the giv is known, check for branches
5159 from within the lifetime to outside the lifetime if it is still
5169 p = NEXT_INSN (loop_start);
5170 if (p == last_giv_use)
5173 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5174 && LABEL_NAME (JUMP_LABEL (p))
5175 && ((INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop)
5176 || (INSN_UID (v->insn) >= max_uid_for_loop)
5177 || (INSN_UID (last_giv_use) >= max_uid_for_loop)
5178 || (INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (v->insn)
5179 && INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop_start))
5180 || (INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (last_giv_use)
5181 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop_end))))
5184 v->not_replaceable = 1;
5186 if (loop_dump_stream)
5187 fprintf (loop_dump_stream,
5188 "Found branch outside giv lifetime.\n");
5195 /* If it is replaceable, then save the final value. */
5197 v->final_value = final_value;
5200 if (loop_dump_stream && v->replaceable)
5201 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5202 INSN_UID (v->insn), REGNO (v->dest_reg));
5205 /* Update the status of whether a giv can derive other givs.
5207 We need to do something special if there is or may be an update to the biv
5208 between the time the giv is defined and the time it is used to derive
5211 In addition, a giv that is only conditionally set is not allowed to
5212 derive another giv once a label has been passed.
5214 The cases we look at are when a label or an update to a biv is passed. */
5217 update_giv_derive (p)
5220 struct iv_class *bl;
5221 struct induction *biv, *giv;
5225 /* Search all IV classes, then all bivs, and finally all givs.
5227 There are three cases we are concerned with. First we have the situation
5228 of a giv that is only updated conditionally. In that case, it may not
5229 derive any givs after a label is passed.
5231 The second case is when a biv update occurs, or may occur, after the
5232 definition of a giv. For certain biv updates (see below) that are
5233 known to occur between the giv definition and use, we can adjust the
5234 giv definition. For others, or when the biv update is conditional,
5235 we must prevent the giv from deriving any other givs. There are two
5236 sub-cases within this case.
5238 If this is a label, we are concerned with any biv update that is done
5239 conditionally, since it may be done after the giv is defined followed by
5240 a branch here (actually, we need to pass both a jump and a label, but
5241 this extra tracking doesn't seem worth it).
5243 If this is a jump, we are concerned about any biv update that may be
5244 executed multiple times. We are actually only concerned about
5245 backward jumps, but it is probably not worth performing the test
5246 on the jump again here.
5248 If this is a biv update, we must adjust the giv status to show that a
5249 subsequent biv update was performed. If this adjustment cannot be done,
5250 the giv cannot derive further givs. */
5252 for (bl = loop_iv_list; bl; bl = bl->next)
5253 for (biv = bl->biv; biv; biv = biv->next_iv)
5254 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5257 for (giv = bl->giv; giv; giv = giv->next_iv)
5259 /* If cant_derive is already true, there is no point in
5260 checking all of these conditions again. */
5261 if (giv->cant_derive)
5264 /* If this giv is conditionally set and we have passed a label,
5265 it cannot derive anything. */
5266 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5267 giv->cant_derive = 1;
5269 /* Skip givs that have mult_val == 0, since
5270 they are really invariants. Also skip those that are
5271 replaceable, since we know their lifetime doesn't contain
5273 else if (giv->mult_val == const0_rtx || giv->replaceable)
5276 /* The only way we can allow this giv to derive another
5277 is if this is a biv increment and we can form the product
5278 of biv->add_val and giv->mult_val. In this case, we will
5279 be able to compute a compensation. */
5280 else if (biv->insn == p)
5284 if (biv->mult_val == const1_rtx)
5285 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
5290 if (tem && giv->derive_adjustment)
5291 tem = simplify_giv_expr (gen_rtx_PLUS (giv->mode, tem,
5292 giv->derive_adjustment),
5295 giv->derive_adjustment = tem;
5297 giv->cant_derive = 1;
5299 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5300 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5301 giv->cant_derive = 1;
5306 /* Check whether an insn is an increment legitimate for a basic induction var.
5307 X is the source of insn P, or a part of it.
5308 MODE is the mode in which X should be interpreted.
5310 DEST_REG is the putative biv, also the destination of the insn.
5311 We accept patterns of these forms:
5312 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5313 REG = INVARIANT + REG
5315 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5316 and store the additive term into *INC_VAL.
5318 If X is an assignment of an invariant into DEST_REG, we set
5319 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5321 We also want to detect a BIV when it corresponds to a variable
5322 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5323 of the variable may be a PLUS that adds a SUBREG of that variable to
5324 an invariant and then sign- or zero-extends the result of the PLUS
5327 Most GIVs in such cases will be in the promoted mode, since that is the
5328 probably the natural computation mode (and almost certainly the mode
5329 used for addresses) on the machine. So we view the pseudo-reg containing
5330 the variable as the BIV, as if it were simply incremented.
5332 Note that treating the entire pseudo as a BIV will result in making
5333 simple increments to any GIVs based on it. However, if the variable
5334 overflows in its declared mode but not its promoted mode, the result will
5335 be incorrect. This is acceptable if the variable is signed, since
5336 overflows in such cases are undefined, but not if it is unsigned, since
5337 those overflows are defined. So we only check for SIGN_EXTEND and
5340 If we cannot find a biv, we return 0. */
5343 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val)
5345 enum machine_mode mode;
5351 register enum rtx_code code;
5355 code = GET_CODE (x);
5359 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5360 || (GET_CODE (XEXP (x, 0)) == SUBREG
5361 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5362 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5364 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5365 || (GET_CODE (XEXP (x, 1)) == SUBREG
5366 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5367 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5372 if (invariant_p (arg) != 1)
5375 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5376 *mult_val = const1_rtx;
5380 /* If this is a SUBREG for a promoted variable, check the inner
5382 if (SUBREG_PROMOTED_VAR_P (x))
5383 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
5384 dest_reg, p, inc_val, mult_val);
5388 /* If this register is assigned in a previous insn, look at its
5389 source, but don't go outside the loop or past a label. */
5395 insn = PREV_INSN (insn);
5396 } while (insn && GET_CODE (insn) == NOTE
5397 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5401 set = single_set (insn);
5405 if ((SET_DEST (set) == x
5406 || (GET_CODE (SET_DEST (set)) == SUBREG
5407 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
5409 && SUBREG_REG (SET_DEST (set)) == x))
5410 && basic_induction_var (SET_SRC (set),
5411 (GET_MODE (SET_SRC (set)) == VOIDmode
5413 : GET_MODE (SET_SRC (set))),
5418 /* ... fall through ... */
5420 /* Can accept constant setting of biv only when inside inner most loop.
5421 Otherwise, a biv of an inner loop may be incorrectly recognized
5422 as a biv of the outer loop,
5423 causing code to be moved INTO the inner loop. */
5425 if (invariant_p (x) != 1)
5430 /* convert_modes aborts if we try to convert to or from CCmode, so just
5431 exclude that case. It is very unlikely that a condition code value
5432 would be a useful iterator anyways. */
5433 if (loops_enclosed == 1
5434 && GET_MODE_CLASS (mode) != MODE_CC
5435 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
5437 /* Possible bug here? Perhaps we don't know the mode of X. */
5438 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5439 *mult_val = const0_rtx;
5446 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5447 dest_reg, p, inc_val, mult_val);
5450 /* Similar, since this can be a sign extension. */
5451 for (insn = PREV_INSN (p);
5452 (insn && GET_CODE (insn) == NOTE
5453 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5454 insn = PREV_INSN (insn))
5458 set = single_set (insn);
5460 if (set && SET_DEST (set) == XEXP (x, 0)
5461 && GET_CODE (XEXP (x, 1)) == CONST_INT
5462 && INTVAL (XEXP (x, 1)) >= 0
5463 && GET_CODE (SET_SRC (set)) == ASHIFT
5464 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5465 return basic_induction_var (XEXP (SET_SRC (set), 0),
5466 GET_MODE (XEXP (x, 0)),
5467 dest_reg, insn, inc_val, mult_val);
5475 /* A general induction variable (giv) is any quantity that is a linear
5476 function of a basic induction variable,
5477 i.e. giv = biv * mult_val + add_val.
5478 The coefficients can be any loop invariant quantity.
5479 A giv need not be computed directly from the biv;
5480 it can be computed by way of other givs. */
5482 /* Determine whether X computes a giv.
5483 If it does, return a nonzero value
5484 which is the benefit from eliminating the computation of X;
5485 set *SRC_REG to the register of the biv that it is computed from;
5486 set *ADD_VAL and *MULT_VAL to the coefficients,
5487 such that the value of X is biv * mult + add; */
5490 general_induction_var (x, src_reg, add_val, mult_val, is_addr, pbenefit)
5501 /* If this is an invariant, forget it, it isn't a giv. */
5502 if (invariant_p (x) == 1)
5505 /* See if the expression could be a giv and get its form.
5506 Mark our place on the obstack in case we don't find a giv. */
5507 storage = (char *) oballoc (0);
5509 x = simplify_giv_expr (x, pbenefit);
5516 switch (GET_CODE (x))
5520 /* Since this is now an invariant and wasn't before, it must be a giv
5521 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5523 *src_reg = loop_iv_list->biv->dest_reg;
5524 *mult_val = const0_rtx;
5529 /* This is equivalent to a BIV. */
5531 *mult_val = const1_rtx;
5532 *add_val = const0_rtx;
5536 /* Either (plus (biv) (invar)) or
5537 (plus (mult (biv) (invar_1)) (invar_2)). */
5538 if (GET_CODE (XEXP (x, 0)) == MULT)
5540 *src_reg = XEXP (XEXP (x, 0), 0);
5541 *mult_val = XEXP (XEXP (x, 0), 1);
5545 *src_reg = XEXP (x, 0);
5546 *mult_val = const1_rtx;
5548 *add_val = XEXP (x, 1);
5552 /* ADD_VAL is zero. */
5553 *src_reg = XEXP (x, 0);
5554 *mult_val = XEXP (x, 1);
5555 *add_val = const0_rtx;
5562 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5563 unless they are CONST_INT). */
5564 if (GET_CODE (*add_val) == USE)
5565 *add_val = XEXP (*add_val, 0);
5566 if (GET_CODE (*mult_val) == USE)
5567 *mult_val = XEXP (*mult_val, 0);
5572 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
5574 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
5578 *pbenefit += rtx_cost (orig_x, SET);
5580 /* Always return true if this is a giv so it will be detected as such,
5581 even if the benefit is zero or negative. This allows elimination
5582 of bivs that might otherwise not be eliminated. */
5586 /* Given an expression, X, try to form it as a linear function of a biv.
5587 We will canonicalize it to be of the form
5588 (plus (mult (BIV) (invar_1))
5590 with possible degeneracies.
5592 The invariant expressions must each be of a form that can be used as a
5593 machine operand. We surround then with a USE rtx (a hack, but localized
5594 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5595 routine; it is the caller's responsibility to strip them.
5597 If no such canonicalization is possible (i.e., two biv's are used or an
5598 expression that is neither invariant nor a biv or giv), this routine
5601 For a non-zero return, the result will have a code of CONST_INT, USE,
5602 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5604 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5606 static rtx sge_plus PROTO ((enum machine_mode, rtx, rtx));
5607 static rtx sge_plus_constant PROTO ((rtx, rtx));
5610 simplify_giv_expr (x, benefit)
5614 enum machine_mode mode = GET_MODE (x);
5618 /* If this is not an integer mode, or if we cannot do arithmetic in this
5619 mode, this can't be a giv. */
5620 if (mode != VOIDmode
5621 && (GET_MODE_CLASS (mode) != MODE_INT
5622 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
5625 switch (GET_CODE (x))
5628 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5629 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5630 if (arg0 == 0 || arg1 == 0)
5633 /* Put constant last, CONST_INT last if both constant. */
5634 if ((GET_CODE (arg0) == USE
5635 || GET_CODE (arg0) == CONST_INT)
5636 && ! ((GET_CODE (arg0) == USE
5637 && GET_CODE (arg1) == USE)
5638 || GET_CODE (arg1) == CONST_INT))
5639 tem = arg0, arg0 = arg1, arg1 = tem;
5641 /* Handle addition of zero, then addition of an invariant. */
5642 if (arg1 == const0_rtx)
5644 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
5645 switch (GET_CODE (arg0))
5649 /* Adding two invariants must result in an invariant, so enclose
5650 addition operation inside a USE and return it. */
5651 if (GET_CODE (arg0) == USE)
5652 arg0 = XEXP (arg0, 0);
5653 if (GET_CODE (arg1) == USE)
5654 arg1 = XEXP (arg1, 0);
5656 if (GET_CODE (arg0) == CONST_INT)
5657 tem = arg0, arg0 = arg1, arg1 = tem;
5658 if (GET_CODE (arg1) == CONST_INT)
5659 tem = sge_plus_constant (arg0, arg1);
5661 tem = sge_plus (mode, arg0, arg1);
5663 if (GET_CODE (tem) != CONST_INT)
5664 tem = gen_rtx_USE (mode, tem);
5669 /* biv + invar or mult + invar. Return sum. */
5670 return gen_rtx_PLUS (mode, arg0, arg1);
5673 /* (a + invar_1) + invar_2. Associate. */
5674 return simplify_giv_expr (
5675 gen_rtx_PLUS (mode, XEXP (arg0, 0),
5676 gen_rtx_PLUS (mode, XEXP (arg0, 1), arg1)),
5683 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5684 MULT to reduce cases. */
5685 if (GET_CODE (arg0) == REG)
5686 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
5687 if (GET_CODE (arg1) == REG)
5688 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
5690 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5691 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5692 Recurse to associate the second PLUS. */
5693 if (GET_CODE (arg1) == MULT)
5694 tem = arg0, arg0 = arg1, arg1 = tem;
5696 if (GET_CODE (arg1) == PLUS)
5697 return simplify_giv_expr (gen_rtx_PLUS (mode,
5698 gen_rtx_PLUS (mode, arg0,
5703 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5704 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
5707 if (!rtx_equal_p (arg0, arg1))
5710 return simplify_giv_expr (gen_rtx_MULT (mode,
5718 /* Handle "a - b" as "a + b * (-1)". */
5719 return simplify_giv_expr (gen_rtx_PLUS (mode,
5721 gen_rtx_MULT (mode, XEXP (x, 1),
5726 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5727 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5728 if (arg0 == 0 || arg1 == 0)
5731 /* Put constant last, CONST_INT last if both constant. */
5732 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
5733 && GET_CODE (arg1) != CONST_INT)
5734 tem = arg0, arg0 = arg1, arg1 = tem;
5736 /* If second argument is not now constant, not giv. */
5737 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
5740 /* Handle multiply by 0 or 1. */
5741 if (arg1 == const0_rtx)
5744 else if (arg1 == const1_rtx)
5747 switch (GET_CODE (arg0))
5750 /* biv * invar. Done. */
5751 return gen_rtx_MULT (mode, arg0, arg1);
5754 /* Product of two constants. */
5755 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
5758 /* invar * invar. It is a giv, but very few of these will
5759 actually pay off, so limit to simple registers. */
5760 if (GET_CODE (arg1) != CONST_INT)
5763 arg0 = XEXP (arg0, 0);
5764 if (GET_CODE (arg0) == REG)
5765 tem = gen_rtx_MULT (mode, arg0, arg1);
5766 else if (GET_CODE (arg0) == MULT
5767 && GET_CODE (XEXP (arg0, 0)) == REG
5768 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
5770 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
5771 GEN_INT (INTVAL (XEXP (arg0, 1))
5776 return gen_rtx_USE (mode, tem);
5779 /* (a * invar_1) * invar_2. Associate. */
5780 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (arg0, 0),
5787 /* (a + invar_1) * invar_2. Distribute. */
5788 return simplify_giv_expr (gen_rtx_PLUS (mode,
5802 /* Shift by constant is multiply by power of two. */
5803 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
5806 return simplify_giv_expr (gen_rtx_MULT (mode,
5808 GEN_INT ((HOST_WIDE_INT) 1
5809 << INTVAL (XEXP (x, 1)))),
5813 /* "-a" is "a * (-1)" */
5814 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
5818 /* "~a" is "-a - 1". Silly, but easy. */
5819 return simplify_giv_expr (gen_rtx_MINUS (mode,
5820 gen_rtx_NEG (mode, XEXP (x, 0)),
5825 /* Already in proper form for invariant. */
5829 /* If this is a new register, we can't deal with it. */
5830 if (REGNO (x) >= max_reg_before_loop)
5833 /* Check for biv or giv. */
5834 switch (reg_iv_type[REGNO (x)])
5838 case GENERAL_INDUCT:
5840 struct induction *v = reg_iv_info[REGNO (x)];
5842 /* Form expression from giv and add benefit. Ensure this giv
5843 can derive another and subtract any needed adjustment if so. */
5844 *benefit += v->benefit;
5848 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode, v->src_reg,
5851 if (v->derive_adjustment)
5852 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
5853 return simplify_giv_expr (tem, benefit);
5857 /* If it isn't an induction variable, and it is invariant, we
5858 may be able to simplify things further by looking through
5859 the bits we just moved outside the loop. */
5860 if (invariant_p (x) == 1)
5864 for (m = the_movables; m ; m = m->next)
5865 if (rtx_equal_p (x, m->set_dest))
5867 /* Ok, we found a match. Substitute and simplify. */
5869 /* If we match another movable, we must use that, as
5870 this one is going away. */
5872 return simplify_giv_expr (m->match->set_dest, benefit);
5874 /* If consec is non-zero, this is a member of a group of
5875 instructions that were moved together. We handle this
5876 case only to the point of seeking to the last insn and
5877 looking for a REG_EQUAL. Fail if we don't find one. */
5882 do { tem = NEXT_INSN (tem); } while (--i > 0);
5884 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
5886 tem = XEXP (tem, 0);
5890 tem = single_set (m->insn);
5892 tem = SET_SRC (tem);
5897 /* What we are most interested in is pointer
5898 arithmetic on invariants -- only take
5899 patterns we may be able to do something with. */
5900 if (GET_CODE (tem) == PLUS
5901 || GET_CODE (tem) == MULT
5902 || GET_CODE (tem) == ASHIFT
5903 || GET_CODE (tem) == CONST_INT
5904 || GET_CODE (tem) == SYMBOL_REF)
5906 tem = simplify_giv_expr (tem, benefit);
5910 else if (GET_CODE (tem) == CONST
5911 && GET_CODE (XEXP (tem, 0)) == PLUS
5912 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
5913 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
5915 tem = simplify_giv_expr (XEXP (tem, 0), benefit);
5926 /* Fall through to general case. */
5928 /* If invariant, return as USE (unless CONST_INT).
5929 Otherwise, not giv. */
5930 if (GET_CODE (x) == USE)
5933 if (invariant_p (x) == 1)
5935 if (GET_CODE (x) == CONST_INT)
5937 if (GET_CODE (x) == CONST
5938 && GET_CODE (XEXP (x, 0)) == PLUS
5939 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
5940 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
5942 return gen_rtx_USE (mode, x);
5949 /* This routine folds invariants such that there is only ever one
5950 CONST_INT in the summation. It is only used by simplify_giv_expr. */
5953 sge_plus_constant (x, c)
5956 if (GET_CODE (x) == CONST_INT)
5957 return GEN_INT (INTVAL (x) + INTVAL (c));
5958 else if (GET_CODE (x) != PLUS)
5959 return gen_rtx_PLUS (GET_MODE (x), x, c);
5960 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5962 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
5963 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
5965 else if (GET_CODE (XEXP (x, 0)) == PLUS
5966 || GET_CODE (XEXP (x, 1)) != PLUS)
5968 return gen_rtx_PLUS (GET_MODE (x),
5969 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
5973 return gen_rtx_PLUS (GET_MODE (x),
5974 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
5979 sge_plus (mode, x, y)
5980 enum machine_mode mode;
5983 while (GET_CODE (y) == PLUS)
5985 rtx a = XEXP (y, 0);
5986 if (GET_CODE (a) == CONST_INT)
5987 x = sge_plus_constant (x, a);
5989 x = gen_rtx_PLUS (mode, x, a);
5992 if (GET_CODE (y) == CONST_INT)
5993 x = sge_plus_constant (x, y);
5995 x = gen_rtx_PLUS (mode, x, y);
5999 /* Help detect a giv that is calculated by several consecutive insns;
6003 The caller has already identified the first insn P as having a giv as dest;
6004 we check that all other insns that set the same register follow
6005 immediately after P, that they alter nothing else,
6006 and that the result of the last is still a giv.
6008 The value is 0 if the reg set in P is not really a giv.
6009 Otherwise, the value is the amount gained by eliminating
6010 all the consecutive insns that compute the value.
6012 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6013 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6015 The coefficients of the ultimate giv value are stored in
6016 *MULT_VAL and *ADD_VAL. */
6019 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
6034 /* Indicate that this is a giv so that we can update the value produced in
6035 each insn of the multi-insn sequence.
6037 This induction structure will be used only by the call to
6038 general_induction_var below, so we can allocate it on our stack.
6039 If this is a giv, our caller will replace the induct var entry with
6040 a new induction structure. */
6042 = (struct induction *) alloca (sizeof (struct induction));
6043 v->src_reg = src_reg;
6044 v->mult_val = *mult_val;
6045 v->add_val = *add_val;
6046 v->benefit = first_benefit;
6048 v->derive_adjustment = 0;
6050 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
6051 reg_iv_info[REGNO (dest_reg)] = v;
6053 count = n_times_set[REGNO (dest_reg)] - 1;
6058 code = GET_CODE (p);
6060 /* If libcall, skip to end of call sequence. */
6061 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6065 && (set = single_set (p))
6066 && GET_CODE (SET_DEST (set)) == REG
6067 && SET_DEST (set) == dest_reg
6068 && (general_induction_var (SET_SRC (set), &src_reg,
6069 add_val, mult_val, 0, &benefit)
6070 /* Giv created by equivalent expression. */
6071 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6072 && general_induction_var (XEXP (temp, 0), &src_reg,
6073 add_val, mult_val, 0, &benefit)))
6074 && src_reg == v->src_reg)
6076 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6077 benefit += libcall_benefit (p);
6080 v->mult_val = *mult_val;
6081 v->add_val = *add_val;
6082 v->benefit = benefit;
6084 else if (code != NOTE)
6086 /* Allow insns that set something other than this giv to a
6087 constant. Such insns are needed on machines which cannot
6088 include long constants and should not disqualify a giv. */
6090 && (set = single_set (p))
6091 && SET_DEST (set) != dest_reg
6092 && CONSTANT_P (SET_SRC (set)))
6095 reg_iv_type[REGNO (dest_reg)] = UNKNOWN_INDUCT;
6103 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6104 represented by G1. If no such expression can be found, or it is clear that
6105 it cannot possibly be a valid address, 0 is returned.
6107 To perform the computation, we note that
6110 where `v' is the biv.
6112 So G2 = (y/b) * G1 + (b - a*y/x).
6114 Note that MULT = y/x.
6116 Update: A and B are now allowed to be additive expressions such that
6117 B contains all variables in A. That is, computing B-A will not require
6118 subtracting variables. */
6121 express_from_1 (a, b, mult)
6124 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6126 if (mult == const0_rtx)
6129 /* If MULT is not 1, we cannot handle A with non-constants, since we
6130 would then be required to subtract multiples of the registers in A.
6131 This is theoretically possible, and may even apply to some Fortran
6132 constructs, but it is a lot of work and we do not attempt it here. */
6134 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6137 /* In general these structures are sorted top to bottom (down the PLUS
6138 chain), but not left to right across the PLUS. If B is a higher
6139 order giv than A, we can strip one level and recurse. If A is higher
6140 order, we'll eventually bail out, but won't know that until the end.
6141 If they are the same, we'll strip one level around this loop. */
6143 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6145 rtx ra, rb, oa, ob, tmp;
6147 ra = XEXP (a, 0), oa = XEXP (a, 1);
6148 if (GET_CODE (ra) == PLUS)
6149 tmp = ra, ra = oa, oa = tmp;
6151 rb = XEXP (b, 0), ob = XEXP (b, 1);
6152 if (GET_CODE (rb) == PLUS)
6153 tmp = rb, rb = ob, ob = tmp;
6155 if (rtx_equal_p (ra, rb))
6156 /* We matched: remove one reg completely. */
6158 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6159 /* An alternate match. */
6161 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6162 /* An alternate match. */
6166 /* Indicates an extra register in B. Strip one level from B and
6167 recurse, hoping B was the higher order expression. */
6168 ob = express_from_1 (a, ob, mult);
6171 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6175 /* Here we are at the last level of A, go through the cases hoping to
6176 get rid of everything but a constant. */
6178 if (GET_CODE (a) == PLUS)
6182 ra = XEXP (a, 0), oa = XEXP (a, 1);
6183 if (rtx_equal_p (oa, b))
6185 else if (!rtx_equal_p (ra, b))
6188 if (GET_CODE (oa) != CONST_INT)
6191 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6193 else if (GET_CODE (a) == CONST_INT)
6195 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6197 else if (GET_CODE (b) == PLUS)
6199 if (rtx_equal_p (a, XEXP (b, 0)))
6201 else if (rtx_equal_p (a, XEXP (b, 1)))
6206 else if (rtx_equal_p (a, b))
6213 express_from (g1, g2)
6214 struct induction *g1, *g2;
6218 /* The value that G1 will be multiplied by must be a constant integer. Also,
6219 the only chance we have of getting a valid address is if b*c/a (see above
6220 for notation) is also an integer. */
6221 if (GET_CODE (g1->mult_val) == CONST_INT
6222 && GET_CODE (g2->mult_val) == CONST_INT)
6224 if (g1->mult_val == const0_rtx
6225 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6227 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6229 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6233 /* ??? Find out if the one is a multiple of the other? */
6237 add = express_from_1 (g1->add_val, g2->add_val, mult);
6238 if (add == NULL_RTX)
6241 /* Form simplified final result. */
6242 if (mult == const0_rtx)
6244 else if (mult == const1_rtx)
6245 mult = g1->dest_reg;
6247 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6249 if (add == const0_rtx)
6252 return gen_rtx_PLUS (g2->mode, mult, add);
6255 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
6256 (either directly or via an address expression) a register used to represent
6257 G1. Set g2->new_reg to a represtation of G1 (normally just
6261 combine_givs_p (g1, g2)
6262 struct induction *g1, *g2;
6264 rtx tem = express_from (g1, g2);
6266 /* If these givs are identical, they can be combined. We use the results
6267 of express_from because the addends are not in a canonical form, so
6268 rtx_equal_p is a weaker test. */
6269 if (tem == const0_rtx)
6271 return g1->dest_reg;
6274 /* If G2 can be expressed as a function of G1 and that function is valid
6275 as an address and no more expensive than using a register for G2,
6276 the expression of G2 in terms of G1 can be used. */
6278 && g2->giv_type == DEST_ADDR
6279 && memory_address_p (g2->mem_mode, tem)
6280 /* ??? Looses, especially with -fforce-addr, where *g2->location
6281 will always be a register, and so anything more complicated
6285 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6287 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6298 struct combine_givs_stats
6305 cmp_combine_givs_stats (x, y)
6306 struct combine_givs_stats *x, *y;
6309 d = y->total_benefit - x->total_benefit;
6310 /* Stabilize the sort. */
6312 d = x->giv_number - y->giv_number;
6316 /* If one of these givs is a DEST_REG that was only used once, by the
6317 other giv, this is actually a single use. Return 0 if this is not
6318 the case, -1 if g1 is the DEST_REG involved, and 1 if it was g2. */
6321 combine_givs_used_once (g1, g2)
6322 struct induction *g1, *g2;
6324 if (g1->giv_type == DEST_REG
6325 && n_times_used[REGNO (g1->dest_reg)] == 1
6326 && reg_mentioned_p (g1->dest_reg, PATTERN (g2->insn)))
6329 if (g2->giv_type == DEST_REG
6330 && n_times_used[REGNO (g2->dest_reg)] == 1
6331 && reg_mentioned_p (g2->dest_reg, PATTERN (g1->insn)))
6338 combine_givs_benefit_from (g1, g2)
6339 struct induction *g1, *g2;
6341 int tmp = combine_givs_used_once (g1, g2);
6345 return g2->benefit - g1->benefit;
6350 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6351 any other. If so, point SAME to the giv combined with and set NEW_REG to
6352 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6353 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6357 struct iv_class *bl;
6359 struct induction *g1, *g2, **giv_array;
6360 int i, j, k, giv_count;
6361 struct combine_givs_stats *stats;
6364 /* Count givs, because bl->giv_count is incorrect here. */
6366 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6371 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
6373 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6375 giv_array[i++] = g1;
6377 stats = (struct combine_givs_stats *) alloca (giv_count * sizeof (*stats));
6378 bzero ((char *) stats, giv_count * sizeof (*stats));
6380 can_combine = (rtx *) alloca (giv_count * giv_count * sizeof(rtx));
6381 bzero ((char *) can_combine, giv_count * giv_count * sizeof(rtx));
6383 for (i = 0; i < giv_count; i++)
6389 this_benefit = g1->benefit;
6390 /* Add an additional weight for zero addends. */
6391 if (g1->no_const_addval)
6393 for (j = 0; j < giv_count; j++)
6399 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
6401 can_combine[i*giv_count + j] = this_combine;
6402 this_benefit += combine_givs_benefit_from (g1, g2);
6403 /* Add an additional weight for being reused more times. */
6407 stats[i].giv_number = i;
6408 stats[i].total_benefit = this_benefit;
6411 /* Iterate, combining until we can't. */
6413 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
6415 if (loop_dump_stream)
6417 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
6418 for (k = 0; k < giv_count; k++)
6420 g1 = giv_array[stats[k].giv_number];
6421 if (!g1->combined_with && !g1->same)
6422 fprintf (loop_dump_stream, " {%d, %d}",
6423 INSN_UID (giv_array[stats[k].giv_number]->insn),
6424 stats[k].total_benefit);
6426 putc ('\n', loop_dump_stream);
6429 for (k = 0; k < giv_count; k++)
6431 int g1_add_benefit = 0;
6433 i = stats[k].giv_number;
6436 /* If it has already been combined, skip. */
6437 if (g1->combined_with || g1->same)
6440 for (j = 0; j < giv_count; j++)
6443 if (g1 != g2 && can_combine[i*giv_count + j]
6444 /* If it has already been combined, skip. */
6445 && ! g2->same && ! g2->combined_with)
6449 g2->new_reg = can_combine[i*giv_count + j];
6451 g1->combined_with = 1;
6452 if (!combine_givs_used_once (g1, g2))
6453 g1->times_used += 1;
6454 g1->lifetime += g2->lifetime;
6456 g1_add_benefit += combine_givs_benefit_from (g1, g2);
6458 /* ??? The new final_[bg]iv_value code does a much better job
6459 of finding replaceable giv's, and hence this code may no
6460 longer be necessary. */
6461 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
6462 g1_add_benefit -= copy_cost;
6464 /* To help optimize the next set of combinations, remove
6465 this giv from the benefits of other potential mates. */
6466 for (l = 0; l < giv_count; ++l)
6468 int m = stats[l].giv_number;
6469 if (can_combine[m*giv_count + j])
6471 /* Remove additional weight for being reused. */
6472 stats[l].total_benefit -= 3 +
6473 combine_givs_benefit_from (giv_array[m], g2);
6477 if (loop_dump_stream)
6478 fprintf (loop_dump_stream,
6479 "giv at %d combined with giv at %d\n",
6480 INSN_UID (g2->insn), INSN_UID (g1->insn));
6484 /* To help optimize the next set of combinations, remove
6485 this giv from the benefits of other potential mates. */
6486 if (g1->combined_with)
6488 for (j = 0; j < giv_count; ++j)
6490 int m = stats[j].giv_number;
6491 if (can_combine[m*giv_count + j])
6493 /* Remove additional weight for being reused. */
6494 stats[j].total_benefit -= 3 +
6495 combine_givs_benefit_from (giv_array[m], g1);
6499 g1->benefit += g1_add_benefit;
6501 /* We've finished with this giv, and everything it touched.
6502 Restart the combination so that proper weights for the
6503 rest of the givs are properly taken into account. */
6504 /* ??? Ideally we would compact the arrays at this point, so
6505 as to not cover old ground. But sanely compacting
6506 can_combine is tricky. */
6512 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
6515 emit_iv_add_mult (b, m, a, reg, insert_before)
6516 rtx b; /* initial value of basic induction variable */
6517 rtx m; /* multiplicative constant */
6518 rtx a; /* additive constant */
6519 rtx reg; /* destination register */
6525 /* Prevent unexpected sharing of these rtx. */
6529 /* Increase the lifetime of any invariants moved further in code. */
6530 update_reg_last_use (a, insert_before);
6531 update_reg_last_use (b, insert_before);
6532 update_reg_last_use (m, insert_before);
6535 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
6537 emit_move_insn (reg, result);
6538 seq = gen_sequence ();
6541 emit_insn_before (seq, insert_before);
6543 /* It is entirely possible that the expansion created lots of new
6544 registers. Iterate over the sequence we just created and
6547 if (GET_CODE (seq) == SEQUENCE)
6550 for (i = 0; i < XVECLEN (seq, 0); ++i)
6552 rtx set = single_set (XVECEXP (seq, 0, i));
6553 if (set && GET_CODE (SET_DEST (set)) == REG)
6554 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
6557 else if (GET_CODE (seq) == SET
6558 && GET_CODE (SET_DEST (seq)) == REG)
6559 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
6562 /* Test whether A * B can be computed without
6563 an actual multiply insn. Value is 1 if so. */
6566 product_cheap_p (a, b)
6572 struct obstack *old_rtl_obstack = rtl_obstack;
6573 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
6576 /* If only one is constant, make it B. */
6577 if (GET_CODE (a) == CONST_INT)
6578 tmp = a, a = b, b = tmp;
6580 /* If first constant, both constant, so don't need multiply. */
6581 if (GET_CODE (a) == CONST_INT)
6584 /* If second not constant, neither is constant, so would need multiply. */
6585 if (GET_CODE (b) != CONST_INT)
6588 /* One operand is constant, so might not need multiply insn. Generate the
6589 code for the multiply and see if a call or multiply, or long sequence
6590 of insns is generated. */
6592 rtl_obstack = &temp_obstack;
6594 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
6595 tmp = gen_sequence ();
6598 if (GET_CODE (tmp) == SEQUENCE)
6600 if (XVEC (tmp, 0) == 0)
6602 else if (XVECLEN (tmp, 0) > 3)
6605 for (i = 0; i < XVECLEN (tmp, 0); i++)
6607 rtx insn = XVECEXP (tmp, 0, i);
6609 if (GET_CODE (insn) != INSN
6610 || (GET_CODE (PATTERN (insn)) == SET
6611 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
6612 || (GET_CODE (PATTERN (insn)) == PARALLEL
6613 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
6614 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
6621 else if (GET_CODE (tmp) == SET
6622 && GET_CODE (SET_SRC (tmp)) == MULT)
6624 else if (GET_CODE (tmp) == PARALLEL
6625 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
6626 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
6629 /* Free any storage we obtained in generating this multiply and restore rtl
6630 allocation to its normal obstack. */
6631 obstack_free (&temp_obstack, storage);
6632 rtl_obstack = old_rtl_obstack;
6637 /* Check to see if loop can be terminated by a "decrement and branch until
6638 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
6639 Also try reversing an increment loop to a decrement loop
6640 to see if the optimization can be performed.
6641 Value is nonzero if optimization was performed. */
6643 /* This is useful even if the architecture doesn't have such an insn,
6644 because it might change a loops which increments from 0 to n to a loop
6645 which decrements from n to 0. A loop that decrements to zero is usually
6646 faster than one that increments from zero. */
6648 /* ??? This could be rewritten to use some of the loop unrolling procedures,
6649 such as approx_final_value, biv_total_increment, loop_iterations, and
6650 final_[bg]iv_value. */
6653 check_dbra_loop (loop_end, insn_count, loop_start)
6658 struct iv_class *bl;
6665 rtx before_comparison;
6669 int compare_and_branch;
6671 /* If last insn is a conditional branch, and the insn before tests a
6672 register value, try to optimize it. Otherwise, we can't do anything. */
6674 jump = PREV_INSN (loop_end);
6675 comparison = get_condition_for_loop (jump);
6676 if (comparison == 0)
6679 /* Try to compute whether the compare/branch at the loop end is one or
6680 two instructions. */
6681 get_condition (jump, &first_compare);
6682 if (first_compare == jump)
6683 compare_and_branch = 1;
6684 else if (first_compare == prev_nonnote_insn (jump))
6685 compare_and_branch = 2;
6689 /* Check all of the bivs to see if the compare uses one of them.
6690 Skip biv's set more than once because we can't guarantee that
6691 it will be zero on the last iteration. Also skip if the biv is
6692 used between its update and the test insn. */
6694 for (bl = loop_iv_list; bl; bl = bl->next)
6696 if (bl->biv_count == 1
6697 && bl->biv->dest_reg == XEXP (comparison, 0)
6698 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
6706 /* Look for the case where the basic induction variable is always
6707 nonnegative, and equals zero on the last iteration.
6708 In this case, add a reg_note REG_NONNEG, which allows the
6709 m68k DBRA instruction to be used. */
6711 if (((GET_CODE (comparison) == GT
6712 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
6713 && INTVAL (XEXP (comparison, 1)) == -1)
6714 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
6715 && GET_CODE (bl->biv->add_val) == CONST_INT
6716 && INTVAL (bl->biv->add_val) < 0)
6718 /* Initial value must be greater than 0,
6719 init_val % -dec_value == 0 to ensure that it equals zero on
6720 the last iteration */
6722 if (GET_CODE (bl->initial_value) == CONST_INT
6723 && INTVAL (bl->initial_value) > 0
6724 && (INTVAL (bl->initial_value)
6725 % (-INTVAL (bl->biv->add_val))) == 0)
6727 /* register always nonnegative, add REG_NOTE to branch */
6728 REG_NOTES (PREV_INSN (loop_end))
6729 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
6730 REG_NOTES (PREV_INSN (loop_end)));
6736 /* If the decrement is 1 and the value was tested as >= 0 before
6737 the loop, then we can safely optimize. */
6738 for (p = loop_start; p; p = PREV_INSN (p))
6740 if (GET_CODE (p) == CODE_LABEL)
6742 if (GET_CODE (p) != JUMP_INSN)
6745 before_comparison = get_condition_for_loop (p);
6746 if (before_comparison
6747 && XEXP (before_comparison, 0) == bl->biv->dest_reg
6748 && GET_CODE (before_comparison) == LT
6749 && XEXP (before_comparison, 1) == const0_rtx
6750 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
6751 && INTVAL (bl->biv->add_val) == -1)
6753 REG_NOTES (PREV_INSN (loop_end))
6754 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
6755 REG_NOTES (PREV_INSN (loop_end)));
6762 else if (num_mem_sets <= 1)
6764 /* Try to change inc to dec, so can apply above optimization. */
6766 all registers modified are induction variables or invariant,
6767 all memory references have non-overlapping addresses
6768 (obviously true if only one write)
6769 allow 2 insns for the compare/jump at the end of the loop. */
6770 /* Also, we must avoid any instructions which use both the reversed
6771 biv and another biv. Such instructions will fail if the loop is
6772 reversed. We meet this condition by requiring that either
6773 no_use_except_counting is true, or else that there is only
6775 int num_nonfixed_reads = 0;
6776 /* 1 if the iteration var is used only to count iterations. */
6777 int no_use_except_counting = 0;
6778 /* 1 if the loop has no memory store, or it has a single memory store
6779 which is reversible. */
6780 int reversible_mem_store = 1;
6782 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
6783 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6784 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
6786 if (bl->giv_count == 0
6787 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
6789 rtx bivreg = regno_reg_rtx[bl->regno];
6791 /* If there are no givs for this biv, and the only exit is the
6792 fall through at the end of the loop, then
6793 see if perhaps there are no uses except to count. */
6794 no_use_except_counting = 1;
6795 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
6796 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6798 rtx set = single_set (p);
6800 if (set && GET_CODE (SET_DEST (set)) == REG
6801 && REGNO (SET_DEST (set)) == bl->regno)
6802 /* An insn that sets the biv is okay. */
6804 else if (p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
6805 || p == prev_nonnote_insn (loop_end))
6806 /* Don't bother about the end test. */
6808 else if (reg_mentioned_p (bivreg, PATTERN (p)))
6809 /* Any other use of the biv is no good. */
6811 no_use_except_counting = 0;
6817 /* If the loop has a single store, and the destination address is
6818 invariant, then we can't reverse the loop, because this address
6819 might then have the wrong value at loop exit.
6820 This would work if the source was invariant also, however, in that
6821 case, the insn should have been moved out of the loop. */
6823 if (num_mem_sets == 1)
6824 reversible_mem_store
6825 = (! unknown_address_altered
6826 && ! invariant_p (XEXP (loop_store_mems[0], 0)));
6828 /* This code only acts for innermost loops. Also it simplifies
6829 the memory address check by only reversing loops with
6830 zero or one memory access.
6831 Two memory accesses could involve parts of the same array,
6832 and that can't be reversed. */
6834 if (num_nonfixed_reads <= 1
6836 && !loop_has_volatile
6837 && reversible_mem_store
6838 && (no_use_except_counting
6839 || ((bl->giv_count + bl->biv_count + num_mem_sets
6840 + num_movables + compare_and_branch == insn_count)
6841 && (bl == loop_iv_list && bl->next == 0))))
6845 /* Loop can be reversed. */
6846 if (loop_dump_stream)
6847 fprintf (loop_dump_stream, "Can reverse loop\n");
6849 /* Now check other conditions:
6851 The increment must be a constant, as must the initial value,
6852 and the comparison code must be LT.
6854 This test can probably be improved since +/- 1 in the constant
6855 can be obtained by changing LT to LE and vice versa; this is
6859 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
6860 /* LE gets turned into LT */
6861 && GET_CODE (comparison) == LT
6862 && GET_CODE (bl->initial_value) == CONST_INT)
6864 HOST_WIDE_INT add_val, comparison_val;
6867 add_val = INTVAL (bl->biv->add_val);
6868 comparison_val = INTVAL (XEXP (comparison, 1));
6869 final_value = XEXP (comparison, 1);
6870 initial_value = bl->initial_value;
6872 /* Normalize the initial value if it is an integer and
6873 has no other use except as a counter. This will allow
6874 a few more loops to be reversed. */
6875 if (no_use_except_counting
6876 && GET_CODE (initial_value) == CONST_INT)
6878 comparison_val = comparison_val - INTVAL (bl->initial_value);
6879 /* Check for overflow. If comparison_val ends up as a
6880 negative value, then we can't reverse the loop. */
6881 if (comparison_val >= 0)
6882 initial_value = const0_rtx;
6885 /* If the initial value is not zero, or if the comparison
6886 value is not an exact multiple of the increment, then we
6887 can not reverse this loop. */
6888 if (initial_value != const0_rtx
6889 || (comparison_val % add_val) != 0)
6892 /* Reset these in case we normalized the initial value
6893 and comparison value above. */
6894 bl->initial_value = initial_value;
6895 XEXP (comparison, 1) = GEN_INT (comparison_val);
6897 /* Register will always be nonnegative, with value
6898 0 on last iteration if loop reversed */
6900 /* Save some info needed to produce the new insns. */
6901 reg = bl->biv->dest_reg;
6902 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
6903 if (jump_label == pc_rtx)
6904 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
6905 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
6907 start_value = GEN_INT (INTVAL (XEXP (comparison, 1))
6908 - INTVAL (bl->biv->add_val));
6910 /* Initialize biv to start_value before loop start.
6911 The old initializing insn will be deleted as a
6912 dead store by flow.c. */
6913 emit_insn_before (gen_move_insn (reg, start_value), loop_start);
6915 /* Add insn to decrement register, and delete insn
6916 that incremented the register. */
6917 p = emit_insn_before (gen_add2_insn (reg, new_add_val),
6919 delete_insn (bl->biv->insn);
6921 /* Update biv info to reflect its new status. */
6923 bl->initial_value = start_value;
6924 bl->biv->add_val = new_add_val;
6926 /* Inc LABEL_NUSES so that delete_insn will
6927 not delete the label. */
6928 LABEL_NUSES (XEXP (jump_label, 0)) ++;
6930 /* Emit an insn after the end of the loop to set the biv's
6931 proper exit value if it is used anywhere outside the loop. */
6932 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
6934 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
6935 emit_insn_after (gen_move_insn (reg, final_value),
6938 /* Delete compare/branch at end of loop. */
6939 delete_insn (PREV_INSN (loop_end));
6940 if (compare_and_branch == 2)
6941 delete_insn (first_compare);
6943 /* Add new compare/branch insn at end of loop. */
6945 emit_cmp_insn (reg, const0_rtx, GE, NULL_RTX,
6946 GET_MODE (reg), 0, 0);
6947 emit_jump_insn (gen_bge (XEXP (jump_label, 0)));
6948 tem = gen_sequence ();
6950 emit_jump_insn_before (tem, loop_end);
6952 for (tem = PREV_INSN (loop_end);
6953 tem && GET_CODE (tem) != JUMP_INSN; tem = PREV_INSN (tem))
6957 JUMP_LABEL (tem) = XEXP (jump_label, 0);
6959 /* Increment of LABEL_NUSES done above. */
6960 /* Register is now always nonnegative,
6961 so add REG_NONNEG note to the branch. */
6962 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
6968 /* Mark that this biv has been reversed. Each giv which depends
6969 on this biv, and which is also live past the end of the loop
6970 will have to be fixed up. */
6974 if (loop_dump_stream)
6975 fprintf (loop_dump_stream,
6976 "Reversed loop and added reg_nonneg\n");
6986 /* Verify whether the biv BL appears to be eliminable,
6987 based on the insns in the loop that refer to it.
6988 LOOP_START is the first insn of the loop, and END is the end insn.
6990 If ELIMINATE_P is non-zero, actually do the elimination.
6992 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6993 determine whether invariant insns should be placed inside or at the
6994 start of the loop. */
6997 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
6998 struct iv_class *bl;
7002 int threshold, insn_count;
7004 rtx reg = bl->biv->dest_reg;
7007 /* Scan all insns in the loop, stopping if we find one that uses the
7008 biv in a way that we cannot eliminate. */
7010 for (p = loop_start; p != end; p = NEXT_INSN (p))
7012 enum rtx_code code = GET_CODE (p);
7013 rtx where = threshold >= insn_count ? loop_start : p;
7015 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
7016 && reg_mentioned_p (reg, PATTERN (p))
7017 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
7019 if (loop_dump_stream)
7020 fprintf (loop_dump_stream,
7021 "Cannot eliminate biv %d: biv used in insn %d.\n",
7022 bl->regno, INSN_UID (p));
7029 if (loop_dump_stream)
7030 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
7031 bl->regno, eliminate_p ? "was" : "can be");
7038 /* If BL appears in X (part of the pattern of INSN), see if we can
7039 eliminate its use. If so, return 1. If not, return 0.
7041 If BIV does not appear in X, return 1.
7043 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
7044 where extra insns should be added. Depending on how many items have been
7045 moved out of the loop, it will either be before INSN or at the start of
7049 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
7051 struct iv_class *bl;
7055 enum rtx_code code = GET_CODE (x);
7056 rtx reg = bl->biv->dest_reg;
7057 enum machine_mode mode = GET_MODE (reg);
7058 struct induction *v;
7070 /* If we haven't already been able to do something with this BIV,
7071 we can't eliminate it. */
7077 /* If this sets the BIV, it is not a problem. */
7078 if (SET_DEST (x) == reg)
7081 /* If this is an insn that defines a giv, it is also ok because
7082 it will go away when the giv is reduced. */
7083 for (v = bl->giv; v; v = v->next_iv)
7084 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
7088 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
7090 /* Can replace with any giv that was reduced and
7091 that has (MULT_VAL != 0) and (ADD_VAL == 0).
7092 Require a constant for MULT_VAL, so we know it's nonzero.
7093 ??? We disable this optimization to avoid potential
7096 for (v = bl->giv; v; v = v->next_iv)
7097 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
7098 && v->add_val == const0_rtx
7099 && ! v->ignore && ! v->maybe_dead && v->always_computable
7103 /* If the giv V had the auto-inc address optimization applied
7104 to it, and INSN occurs between the giv insn and the biv
7105 insn, then we must adjust the value used here.
7106 This is rare, so we don't bother to do so. */
7108 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7109 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7110 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7111 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7117 /* If the giv has the opposite direction of change,
7118 then reverse the comparison. */
7119 if (INTVAL (v->mult_val) < 0)
7120 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
7121 const0_rtx, v->new_reg);
7125 /* We can probably test that giv's reduced reg. */
7126 if (validate_change (insn, &SET_SRC (x), new, 0))
7130 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
7131 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
7132 Require a constant for MULT_VAL, so we know it's nonzero.
7133 ??? Do this only if ADD_VAL is a pointer to avoid a potential
7134 overflow problem. */
7136 for (v = bl->giv; v; v = v->next_iv)
7137 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
7138 && ! v->ignore && ! v->maybe_dead && v->always_computable
7140 && (GET_CODE (v->add_val) == SYMBOL_REF
7141 || GET_CODE (v->add_val) == LABEL_REF
7142 || GET_CODE (v->add_val) == CONST
7143 || (GET_CODE (v->add_val) == REG
7144 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
7146 /* If the giv V had the auto-inc address optimization applied
7147 to it, and INSN occurs between the giv insn and the biv
7148 insn, then we must adjust the value used here.
7149 This is rare, so we don't bother to do so. */
7151 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7152 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7153 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7154 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7160 /* If the giv has the opposite direction of change,
7161 then reverse the comparison. */
7162 if (INTVAL (v->mult_val) < 0)
7163 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
7166 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
7167 copy_rtx (v->add_val));
7169 /* Replace biv with the giv's reduced register. */
7170 update_reg_last_use (v->add_val, insn);
7171 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
7174 /* Insn doesn't support that constant or invariant. Copy it
7175 into a register (it will be a loop invariant.) */
7176 tem = gen_reg_rtx (GET_MODE (v->new_reg));
7178 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
7181 /* Substitute the new register for its invariant value in
7182 the compare expression. */
7183 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
7184 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
7193 case GT: case GE: case GTU: case GEU:
7194 case LT: case LE: case LTU: case LEU:
7195 /* See if either argument is the biv. */
7196 if (XEXP (x, 0) == reg)
7197 arg = XEXP (x, 1), arg_operand = 1;
7198 else if (XEXP (x, 1) == reg)
7199 arg = XEXP (x, 0), arg_operand = 0;
7203 if (CONSTANT_P (arg))
7205 /* First try to replace with any giv that has constant positive
7206 mult_val and constant add_val. We might be able to support
7207 negative mult_val, but it seems complex to do it in general. */
7209 for (v = bl->giv; v; v = v->next_iv)
7210 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
7211 && (GET_CODE (v->add_val) == SYMBOL_REF
7212 || GET_CODE (v->add_val) == LABEL_REF
7213 || GET_CODE (v->add_val) == CONST
7214 || (GET_CODE (v->add_val) == REG
7215 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
7216 && ! v->ignore && ! v->maybe_dead && v->always_computable
7219 /* If the giv V had the auto-inc address optimization applied
7220 to it, and INSN occurs between the giv insn and the biv
7221 insn, then we must adjust the value used here.
7222 This is rare, so we don't bother to do so. */
7224 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7225 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7226 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7227 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7233 /* Replace biv with the giv's reduced reg. */
7234 XEXP (x, 1-arg_operand) = v->new_reg;
7236 /* If all constants are actually constant integers and
7237 the derived constant can be directly placed in the COMPARE,
7239 if (GET_CODE (arg) == CONST_INT
7240 && GET_CODE (v->mult_val) == CONST_INT
7241 && GET_CODE (v->add_val) == CONST_INT
7242 && validate_change (insn, &XEXP (x, arg_operand),
7243 GEN_INT (INTVAL (arg)
7244 * INTVAL (v->mult_val)
7245 + INTVAL (v->add_val)), 0))
7248 /* Otherwise, load it into a register. */
7249 tem = gen_reg_rtx (mode);
7250 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
7251 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
7254 /* If that failed, put back the change we made above. */
7255 XEXP (x, 1-arg_operand) = reg;
7258 /* Look for giv with positive constant mult_val and nonconst add_val.
7259 Insert insns to calculate new compare value.
7260 ??? Turn this off due to possible overflow. */
7262 for (v = bl->giv; v; v = v->next_iv)
7263 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
7264 && ! v->ignore && ! v->maybe_dead && v->always_computable
7270 /* If the giv V had the auto-inc address optimization applied
7271 to it, and INSN occurs between the giv insn and the biv
7272 insn, then we must adjust the value used here.
7273 This is rare, so we don't bother to do so. */
7275 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7276 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7277 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7278 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7284 tem = gen_reg_rtx (mode);
7286 /* Replace biv with giv's reduced register. */
7287 validate_change (insn, &XEXP (x, 1 - arg_operand),
7290 /* Compute value to compare against. */
7291 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
7292 /* Use it in this insn. */
7293 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
7294 if (apply_change_group ())
7298 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
7300 if (invariant_p (arg) == 1)
7302 /* Look for giv with constant positive mult_val and nonconst
7303 add_val. Insert insns to compute new compare value.
7304 ??? Turn this off due to possible overflow. */
7306 for (v = bl->giv; v; v = v->next_iv)
7307 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
7308 && ! v->ignore && ! v->maybe_dead && v->always_computable
7314 /* If the giv V had the auto-inc address optimization applied
7315 to it, and INSN occurs between the giv insn and the biv
7316 insn, then we must adjust the value used here.
7317 This is rare, so we don't bother to do so. */
7319 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7320 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7321 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7322 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7328 tem = gen_reg_rtx (mode);
7330 /* Replace biv with giv's reduced register. */
7331 validate_change (insn, &XEXP (x, 1 - arg_operand),
7334 /* Compute value to compare against. */
7335 emit_iv_add_mult (arg, v->mult_val, v->add_val,
7337 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
7338 if (apply_change_group ())
7343 /* This code has problems. Basically, you can't know when
7344 seeing if we will eliminate BL, whether a particular giv
7345 of ARG will be reduced. If it isn't going to be reduced,
7346 we can't eliminate BL. We can try forcing it to be reduced,
7347 but that can generate poor code.
7349 The problem is that the benefit of reducing TV, below should
7350 be increased if BL can actually be eliminated, but this means
7351 we might have to do a topological sort of the order in which
7352 we try to process biv. It doesn't seem worthwhile to do
7353 this sort of thing now. */
7356 /* Otherwise the reg compared with had better be a biv. */
7357 if (GET_CODE (arg) != REG
7358 || reg_iv_type[REGNO (arg)] != BASIC_INDUCT)
7361 /* Look for a pair of givs, one for each biv,
7362 with identical coefficients. */
7363 for (v = bl->giv; v; v = v->next_iv)
7365 struct induction *tv;
7367 if (v->ignore || v->maybe_dead || v->mode != mode)
7370 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
7371 if (! tv->ignore && ! tv->maybe_dead
7372 && rtx_equal_p (tv->mult_val, v->mult_val)
7373 && rtx_equal_p (tv->add_val, v->add_val)
7374 && tv->mode == mode)
7376 /* If the giv V had the auto-inc address optimization applied
7377 to it, and INSN occurs between the giv insn and the biv
7378 insn, then we must adjust the value used here.
7379 This is rare, so we don't bother to do so. */
7381 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
7382 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
7383 || (INSN_LUID (v->insn) > INSN_LUID (insn)
7384 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
7390 /* Replace biv with its giv's reduced reg. */
7391 XEXP (x, 1-arg_operand) = v->new_reg;
7392 /* Replace other operand with the other giv's
7394 XEXP (x, arg_operand) = tv->new_reg;
7401 /* If we get here, the biv can't be eliminated. */
7405 /* If this address is a DEST_ADDR giv, it doesn't matter if the
7406 biv is used in it, since it will be replaced. */
7407 for (v = bl->giv; v; v = v->next_iv)
7408 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
7416 /* See if any subexpression fails elimination. */
7417 fmt = GET_RTX_FORMAT (code);
7418 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7423 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
7424 eliminate_p, where))
7429 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7430 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
7431 eliminate_p, where))
7440 /* Return nonzero if the last use of REG
7441 is in an insn following INSN in the same basic block. */
7444 last_use_this_basic_block (reg, insn)
7450 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
7453 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
7459 /* Called via `note_stores' to record the initial value of a biv. Here we
7460 just record the location of the set and process it later. */
7463 record_initial (dest, set)
7467 struct iv_class *bl;
7469 if (GET_CODE (dest) != REG
7470 || REGNO (dest) >= max_reg_before_loop
7471 || reg_iv_type[REGNO (dest)] != BASIC_INDUCT)
7474 bl = reg_biv_class[REGNO (dest)];
7476 /* If this is the first set found, record it. */
7477 if (bl->init_insn == 0)
7479 bl->init_insn = note_insn;
7484 /* If any of the registers in X are "old" and currently have a last use earlier
7485 than INSN, update them to have a last use of INSN. Their actual last use
7486 will be the previous insn but it will not have a valid uid_luid so we can't
7490 update_reg_last_use (x, insn)
7494 /* Check for the case where INSN does not have a valid luid. In this case,
7495 there is no need to modify the regno_last_uid, as this can only happen
7496 when code is inserted after the loop_end to set a pseudo's final value,
7497 and hence this insn will never be the last use of x. */
7498 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
7499 && INSN_UID (insn) < max_uid_for_loop
7500 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
7501 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
7505 register char *fmt = GET_RTX_FORMAT (GET_CODE (x));
7506 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
7509 update_reg_last_use (XEXP (x, i), insn);
7510 else if (fmt[i] == 'E')
7511 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7512 update_reg_last_use (XVECEXP (x, i, j), insn);
7517 /* Given a jump insn JUMP, return the condition that will cause it to branch
7518 to its JUMP_LABEL. If the condition cannot be understood, or is an
7519 inequality floating-point comparison which needs to be reversed, 0 will
7522 If EARLIEST is non-zero, it is a pointer to a place where the earliest
7523 insn used in locating the condition was found. If a replacement test
7524 of the condition is desired, it should be placed in front of that
7525 insn and we will be sure that the inputs are still valid.
7527 The condition will be returned in a canonical form to simplify testing by
7528 callers. Specifically:
7530 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
7531 (2) Both operands will be machine operands; (cc0) will have been replaced.
7532 (3) If an operand is a constant, it will be the second operand.
7533 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
7534 for GE, GEU, and LEU. */
7537 get_condition (jump, earliest)
7546 int reverse_code = 0;
7547 int did_reverse_condition = 0;
7548 enum machine_mode mode;
7550 /* If this is not a standard conditional jump, we can't parse it. */
7551 if (GET_CODE (jump) != JUMP_INSN
7552 || ! condjump_p (jump) || simplejump_p (jump))
7555 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
7556 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
7557 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
7558 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
7563 /* If this branches to JUMP_LABEL when the condition is false, reverse
7565 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
7566 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
7567 code = reverse_condition (code), did_reverse_condition ^= 1;
7569 /* If we are comparing a register with zero, see if the register is set
7570 in the previous insn to a COMPARE or a comparison operation. Perform
7571 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
7574 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
7576 /* Set non-zero when we find something of interest. */
7580 /* If comparison with cc0, import actual comparison from compare
7584 if ((prev = prev_nonnote_insn (prev)) == 0
7585 || GET_CODE (prev) != INSN
7586 || (set = single_set (prev)) == 0
7587 || SET_DEST (set) != cc0_rtx)
7590 op0 = SET_SRC (set);
7591 op1 = CONST0_RTX (GET_MODE (op0));
7597 /* If this is a COMPARE, pick up the two things being compared. */
7598 if (GET_CODE (op0) == COMPARE)
7600 op1 = XEXP (op0, 1);
7601 op0 = XEXP (op0, 0);
7604 else if (GET_CODE (op0) != REG)
7607 /* Go back to the previous insn. Stop if it is not an INSN. We also
7608 stop if it isn't a single set or if it has a REG_INC note because
7609 we don't want to bother dealing with it. */
7611 if ((prev = prev_nonnote_insn (prev)) == 0
7612 || GET_CODE (prev) != INSN
7613 || FIND_REG_INC_NOTE (prev, 0)
7614 || (set = single_set (prev)) == 0)
7617 /* If this is setting OP0, get what it sets it to if it looks
7619 if (rtx_equal_p (SET_DEST (set), op0))
7621 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
7623 /* ??? We may not combine comparisons done in a CCmode with
7624 comparisons not done in a CCmode. This is to aid targets
7625 like Alpha that have an IEEE compliant EQ instruction, and
7626 a non-IEEE compliant BEQ instruction. The use of CCmode is
7627 actually artificial, simply to prevent the combination, but
7628 should not affect other platforms. */
7630 if ((GET_CODE (SET_SRC (set)) == COMPARE
7633 && GET_MODE_CLASS (inner_mode) == MODE_INT
7634 && (GET_MODE_BITSIZE (inner_mode)
7635 <= HOST_BITS_PER_WIDE_INT)
7636 && (STORE_FLAG_VALUE
7637 & ((HOST_WIDE_INT) 1
7638 << (GET_MODE_BITSIZE (inner_mode) - 1))))
7639 #ifdef FLOAT_STORE_FLAG_VALUE
7641 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
7642 && FLOAT_STORE_FLAG_VALUE < 0)
7645 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
7646 && ((GET_MODE_CLASS (mode) == MODE_CC)
7647 != (GET_MODE_CLASS (inner_mode) == MODE_CC)))
7649 else if (((code == EQ
7651 && (GET_MODE_BITSIZE (inner_mode)
7652 <= HOST_BITS_PER_WIDE_INT)
7653 && GET_MODE_CLASS (inner_mode) == MODE_INT
7654 && (STORE_FLAG_VALUE
7655 & ((HOST_WIDE_INT) 1
7656 << (GET_MODE_BITSIZE (inner_mode) - 1))))
7657 #ifdef FLOAT_STORE_FLAG_VALUE
7659 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
7660 && FLOAT_STORE_FLAG_VALUE < 0)
7663 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
7664 && ((GET_MODE_CLASS (mode) == MODE_CC)
7665 != (GET_MODE_CLASS (inner_mode) == MODE_CC)))
7667 /* We might have reversed a LT to get a GE here. But this wasn't
7668 actually the comparison of data, so we don't flag that we
7669 have had to reverse the condition. */
7670 did_reverse_condition ^= 1;
7678 else if (reg_set_p (op0, prev))
7679 /* If this sets OP0, but not directly, we have to give up. */
7684 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
7685 code = GET_CODE (x);
7688 code = reverse_condition (code);
7689 did_reverse_condition ^= 1;
7693 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
7699 /* If constant is first, put it last. */
7700 if (CONSTANT_P (op0))
7701 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
7703 /* If OP0 is the result of a comparison, we weren't able to find what
7704 was really being compared, so fail. */
7705 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
7708 /* Canonicalize any ordered comparison with integers involving equality
7709 if we can do computations in the relevant mode and we do not
7712 if (GET_CODE (op1) == CONST_INT
7713 && GET_MODE (op0) != VOIDmode
7714 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
7716 HOST_WIDE_INT const_val = INTVAL (op1);
7717 unsigned HOST_WIDE_INT uconst_val = const_val;
7718 unsigned HOST_WIDE_INT max_val
7719 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
7724 if (const_val != max_val >> 1)
7725 code = LT, op1 = GEN_INT (const_val + 1);
7728 /* When cross-compiling, const_val might be sign-extended from
7729 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
7731 if ((const_val & max_val)
7732 != (((HOST_WIDE_INT) 1
7733 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
7734 code = GT, op1 = GEN_INT (const_val - 1);
7738 if (uconst_val < max_val)
7739 code = LTU, op1 = GEN_INT (uconst_val + 1);
7743 if (uconst_val != 0)
7744 code = GTU, op1 = GEN_INT (uconst_val - 1);
7752 /* If this was floating-point and we reversed anything other than an
7753 EQ or NE, return zero. */
7754 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
7755 && did_reverse_condition && code != NE && code != EQ
7757 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
7761 /* Never return CC0; return zero instead. */
7766 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
7769 /* Similar to above routine, except that we also put an invariant last
7770 unless both operands are invariants. */
7773 get_condition_for_loop (x)
7776 rtx comparison = get_condition (x, NULL_PTR);
7779 || ! invariant_p (XEXP (comparison, 0))
7780 || invariant_p (XEXP (comparison, 1)))
7783 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
7784 XEXP (comparison, 1), XEXP (comparison, 0));
7788 /* Analyze a loop in order to instrument it with the use of count register.
7789 loop_start and loop_end are the first and last insns of the loop.
7790 This function works in cooperation with insert_bct ().
7791 loop_can_insert_bct[loop_num] is set according to whether the optimization
7792 is applicable to the loop. When it is applicable, the following variables
7794 loop_start_value[loop_num]
7795 loop_comparison_value[loop_num]
7796 loop_increment[loop_num]
7797 loop_comparison_code[loop_num] */
7799 #ifdef HAVE_decrement_and_branch_on_count
7801 analyze_loop_iterations (loop_start, loop_end)
7802 rtx loop_start, loop_end;
7804 rtx comparison, comparison_value;
7805 rtx iteration_var, initial_value, increment;
7806 enum rtx_code comparison_code;
7812 /* loop_variable mode */
7813 enum machine_mode original_mode;
7815 /* find the number of the loop */
7816 int loop_num = uid_loop_num [INSN_UID (loop_start)];
7818 /* we change our mind only when we are sure that loop will be instrumented */
7819 loop_can_insert_bct[loop_num] = 0;
7821 /* is the optimization suppressed. */
7822 if ( !flag_branch_on_count_reg )
7825 /* make sure that count-reg is not in use */
7826 if (loop_used_count_register[loop_num]){
7827 if (loop_dump_stream)
7828 fprintf (loop_dump_stream,
7829 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7834 /* make sure that the function has no indirect jumps. */
7835 if (indirect_jump_in_function){
7836 if (loop_dump_stream)
7837 fprintf (loop_dump_stream,
7838 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7843 /* make sure that the last loop insn is a conditional jump */
7844 last_loop_insn = PREV_INSN (loop_end);
7845 if (GET_CODE (last_loop_insn) != JUMP_INSN || !condjump_p (last_loop_insn)) {
7846 if (loop_dump_stream)
7847 fprintf (loop_dump_stream,
7848 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7853 /* First find the iteration variable. If the last insn is a conditional
7854 branch, and the insn preceding it tests a register value, make that
7855 register the iteration variable. */
7857 /* We used to use prev_nonnote_insn here, but that fails because it might
7858 accidentally get the branch for a contained loop if the branch for this
7859 loop was deleted. We can only trust branches immediately before the
7862 comparison = get_condition_for_loop (last_loop_insn);
7863 /* ??? Get_condition may switch position of induction variable and
7864 invariant register when it canonicalizes the comparison. */
7866 if (comparison == 0) {
7867 if (loop_dump_stream)
7868 fprintf (loop_dump_stream,
7869 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7874 comparison_code = GET_CODE (comparison);
7875 iteration_var = XEXP (comparison, 0);
7876 comparison_value = XEXP (comparison, 1);
7878 original_mode = GET_MODE (iteration_var);
7879 if (GET_MODE_CLASS (original_mode) != MODE_INT
7880 || GET_MODE_SIZE (original_mode) != UNITS_PER_WORD) {
7881 if (loop_dump_stream)
7882 fprintf (loop_dump_stream,
7883 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7888 /* get info about loop bounds and increment */
7889 iteration_info (iteration_var, &initial_value, &increment,
7890 loop_start, loop_end);
7892 /* make sure that all required loop data were found */
7893 if (!(initial_value && increment && comparison_value
7894 && invariant_p (comparison_value) && invariant_p (increment)
7895 && ! indirect_jump_in_function))
7897 if (loop_dump_stream) {
7898 fprintf (loop_dump_stream,
7899 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num);
7900 if (!(initial_value && increment && comparison_value)) {
7901 fprintf (loop_dump_stream, "\tbounds not available: ");
7902 if ( ! initial_value )
7903 fprintf (loop_dump_stream, "initial ");
7905 fprintf (loop_dump_stream, "increment ");
7906 if ( ! comparison_value )
7907 fprintf (loop_dump_stream, "comparison ");
7908 fprintf (loop_dump_stream, "\n");
7910 if (!invariant_p (comparison_value) || !invariant_p (increment))
7911 fprintf (loop_dump_stream, "\tloop bounds not invariant\n");
7916 /* make sure that the increment is constant */
7917 if (GET_CODE (increment) != CONST_INT) {
7918 if (loop_dump_stream)
7919 fprintf (loop_dump_stream,
7920 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7925 /* make sure that the loop contains neither function call, nor jump on table.
7926 (the count register might be altered by the called function, and might
7927 be used for a branch on table). */
7928 for (insn = loop_start; insn && insn != loop_end; insn = NEXT_INSN (insn)) {
7929 if (GET_CODE (insn) == CALL_INSN){
7930 if (loop_dump_stream)
7931 fprintf (loop_dump_stream,
7932 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7937 if (GET_CODE (insn) == JUMP_INSN
7938 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
7939 || GET_CODE (PATTERN (insn)) == ADDR_VEC)){
7940 if (loop_dump_stream)
7941 fprintf (loop_dump_stream,
7942 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7948 /* At this point, we are sure that the loop can be instrumented with BCT.
7949 Some of the loops, however, will not be instrumented - the final decision
7950 is taken by insert_bct () */
7951 if (loop_dump_stream)
7952 fprintf (loop_dump_stream,
7953 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7956 /* mark all enclosing loops that they cannot use count register */
7957 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7958 marking here may prevent instrumenting an enclosing loop that could
7959 actually be instrumented. But since this is rare, it is safer to mark
7960 here in case the order of calling (analyze/insert)_bct would be changed. */
7961 for (i=loop_num; i != -1; i = loop_outer_loop[i])
7962 loop_used_count_register[i] = 1;
7964 /* Set data structures which will be used by the instrumentation phase */
7965 loop_start_value[loop_num] = initial_value;
7966 loop_comparison_value[loop_num] = comparison_value;
7967 loop_increment[loop_num] = increment;
7968 loop_comparison_code[loop_num] = comparison_code;
7969 loop_can_insert_bct[loop_num] = 1;
7973 /* instrument loop for insertion of bct instruction. We distinguish between
7974 loops with compile-time bounds, to those with run-time bounds. The loop
7975 behaviour is analized according to the following characteristics/variables:
7977 ; comparison-value: the value to which the iteration counter is compared.
7978 ; initial-value: iteration-counter initial value.
7979 ; increment: iteration-counter increment.
7980 ; Computed variables:
7981 ; increment-direction: the sign of the increment.
7982 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7983 ; range-direction: sign (comparison-value - initial-value)
7984 We give up on the following cases:
7985 ; loop variable overflow.
7986 ; run-time loop bounds with comparison code NE.
7990 insert_bct (loop_start, loop_end)
7991 rtx loop_start, loop_end;
7993 rtx initial_value, comparison_value, increment;
7994 enum rtx_code comparison_code;
7996 int increment_direction, compare_direction;
7999 /* if the loop condition is <= or >=, the number of iteration
8000 is 1 more than the range of the bounds of the loop */
8001 int add_iteration = 0;
8003 /* the only machine mode we work with - is the integer of the size that the
8005 enum machine_mode loop_var_mode = SImode;
8007 int loop_num = uid_loop_num [INSN_UID (loop_start)];
8009 /* get loop-variables. No need to check that these are valid - already
8010 checked in analyze_loop_iterations (). */
8011 comparison_code = loop_comparison_code[loop_num];
8012 initial_value = loop_start_value[loop_num];
8013 comparison_value = loop_comparison_value[loop_num];
8014 increment = loop_increment[loop_num];
8016 /* check analyze_loop_iterations decision for this loop. */
8017 if (! loop_can_insert_bct[loop_num]){
8018 if (loop_dump_stream)
8019 fprintf (loop_dump_stream,
8020 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
8025 /* It's impossible to instrument a competely unrolled loop. */
8026 if (loop_unroll_factor [loop_num] == -1)
8029 /* make sure that the last loop insn is a conditional jump .
8030 This check is repeated from analyze_loop_iterations (),
8031 because unrolling might have changed that. */
8032 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
8033 || !condjump_p (PREV_INSN (loop_end))) {
8034 if (loop_dump_stream)
8035 fprintf (loop_dump_stream,
8036 "insert_bct: not instrumenting BCT because of invalid branch\n");
8040 /* fix increment in case loop was unrolled. */
8041 if (loop_unroll_factor [loop_num] > 1)
8042 increment = GEN_INT ( INTVAL (increment) * loop_unroll_factor [loop_num] );
8044 /* determine properties and directions of the loop */
8045 increment_direction = (INTVAL (increment) > 0) ? 1:-1;
8046 switch ( comparison_code ) {
8051 compare_direction = 1;
8058 compare_direction = -1;
8062 /* in this case we cannot know the number of iterations */
8063 if (loop_dump_stream)
8064 fprintf (loop_dump_stream,
8065 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
8072 compare_direction = 1;
8078 compare_direction = -1;
8081 compare_direction = 0;
8088 /* make sure that the loop does not end by an overflow */
8089 if (compare_direction != increment_direction) {
8090 if (loop_dump_stream)
8091 fprintf (loop_dump_stream,
8092 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
8097 /* try to instrument the loop. */
8099 /* Handle the simpler case, where the bounds are known at compile time. */
8100 if (GET_CODE (initial_value) == CONST_INT && GET_CODE (comparison_value) == CONST_INT)
8103 int increment_value_abs = INTVAL (increment) * increment_direction;
8105 /* check the relation between compare-val and initial-val */
8106 int difference = INTVAL (comparison_value) - INTVAL (initial_value);
8107 int range_direction = (difference > 0) ? 1 : -1;
8109 /* make sure the loop executes enough iterations to gain from BCT */
8110 if (difference > -3 && difference < 3) {
8111 if (loop_dump_stream)
8112 fprintf (loop_dump_stream,
8113 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
8118 /* make sure that the loop executes at least once */
8119 if ((range_direction == 1 && compare_direction == -1)
8120 || (range_direction == -1 && compare_direction == 1))
8122 if (loop_dump_stream)
8123 fprintf (loop_dump_stream,
8124 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
8129 /* make sure that the loop does not end by an overflow (in compile time
8130 bounds we must have an additional check for overflow, because here
8131 we also support the compare code of 'NE'. */
8132 if (comparison_code == NE
8133 && increment_direction != range_direction) {
8134 if (loop_dump_stream)
8135 fprintf (loop_dump_stream,
8136 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
8141 /* Determine the number of iterations by:
8143 ; compare-val - initial-val + (increment -1) + additional-iteration
8144 ; num_iterations = -----------------------------------------------------------------
8147 difference = (range_direction > 0) ? difference : -difference;
8149 fprintf (stderr, "difference is: %d\n", difference); /* @*/
8150 fprintf (stderr, "increment_value_abs is: %d\n", increment_value_abs); /* @*/
8151 fprintf (stderr, "add_iteration is: %d\n", add_iteration); /* @*/
8152 fprintf (stderr, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value)); /* @*/
8153 fprintf (stderr, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value)); /* @*/
8156 if (increment_value_abs == 0) {
8157 fprintf (stderr, "insert_bct: error: increment == 0 !!!\n");
8160 n_iterations = (difference + increment_value_abs - 1 + add_iteration)
8161 / increment_value_abs;
8164 fprintf (stderr, "number of iterations is: %d\n", n_iterations); /* @*/
8166 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
8168 /* Done with this loop. */
8172 /* Handle the more complex case, that the bounds are NOT known at compile time. */
8173 /* In this case we generate run_time calculation of the number of iterations */
8175 /* With runtime bounds, if the compare is of the form '!=' we give up */
8176 if (comparison_code == NE) {
8177 if (loop_dump_stream)
8178 fprintf (loop_dump_stream,
8179 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
8185 /* We rely on the existence of run-time guard to ensure that the
8186 loop executes at least once. */
8188 rtx iterations_num_reg;
8190 int increment_value_abs = INTVAL (increment) * increment_direction;
8192 /* make sure that the increment is a power of two, otherwise (an
8193 expensive) divide is needed. */
8194 if (exact_log2 (increment_value_abs) == -1)
8196 if (loop_dump_stream)
8197 fprintf (loop_dump_stream,
8198 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
8202 /* compute the number of iterations */
8207 /* Again, the number of iterations is calculated by:
8209 ; compare-val - initial-val + (increment -1) + additional-iteration
8210 ; num_iterations = -----------------------------------------------------------------
8213 /* ??? Do we have to call copy_rtx here before passing rtx to
8215 if (compare_direction > 0) {
8216 /* <, <= :the loop variable is increasing */
8217 temp_reg = expand_binop (loop_var_mode, sub_optab, comparison_value,
8218 initial_value, NULL_RTX, 0, OPTAB_LIB_WIDEN);
8221 temp_reg = expand_binop (loop_var_mode, sub_optab, initial_value,
8222 comparison_value, NULL_RTX, 0, OPTAB_LIB_WIDEN);
8225 if (increment_value_abs - 1 + add_iteration != 0)
8226 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
8227 GEN_INT (increment_value_abs - 1 + add_iteration),
8228 NULL_RTX, 0, OPTAB_LIB_WIDEN);
8230 if (increment_value_abs != 1)
8232 /* ??? This will generate an expensive divide instruction for
8233 most targets. The original authors apparently expected this
8234 to be a shift, since they test for power-of-2 divisors above,
8235 but just naively generating a divide instruction will not give
8236 a shift. It happens to work for the PowerPC target because
8237 the rs6000.md file has a divide pattern that emits shifts.
8238 It will probably not work for any other target. */
8239 iterations_num_reg = expand_binop (loop_var_mode, sdiv_optab,
8241 GEN_INT (increment_value_abs),
8242 NULL_RTX, 0, OPTAB_LIB_WIDEN);
8245 iterations_num_reg = temp_reg;
8247 sequence = gen_sequence ();
8249 emit_insn_before (sequence, loop_start);
8250 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
8254 /* instrument loop by inserting a bct in it. This is done in the following way:
8255 1. A new register is created and assigned the hard register number of the count
8257 2. In the head of the loop the new variable is initialized by the value passed in the
8258 loop_num_iterations parameter.
8259 3. At the end of the loop, comparison of the register with 0 is generated.
8260 The created comparison follows the pattern defined for the
8261 decrement_and_branch_on_count insn, so this insn will be generated in assembly
8263 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
8264 not used elsewhere, it will be eliminated by data-flow analisys. */
8267 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
8268 rtx loop_start, loop_end;
8269 rtx loop_num_iterations;
8271 rtx temp_reg1, temp_reg2;
8275 enum machine_mode loop_var_mode = SImode;
8277 if (HAVE_decrement_and_branch_on_count)
8279 if (loop_dump_stream)
8280 fprintf (loop_dump_stream, "Loop: Inserting BCT\n");
8282 /* eliminate the check on the old variable */
8283 delete_insn (PREV_INSN (loop_end));
8284 delete_insn (PREV_INSN (loop_end));
8286 /* insert the label which will delimit the start of the loop */
8287 start_label = gen_label_rtx ();
8288 emit_label_after (start_label, loop_start);
8290 /* insert initialization of the count register into the loop header */
8292 temp_reg1 = gen_reg_rtx (loop_var_mode);
8293 emit_insn (gen_move_insn (temp_reg1, loop_num_iterations));
8295 /* this will be count register */
8296 temp_reg2 = gen_rtx_REG (loop_var_mode, COUNT_REGISTER_REGNUM);
8297 /* we have to move the value to the count register from an GPR
8298 because rtx pointed to by loop_num_iterations could contain
8299 expression which cannot be moved into count register */
8300 emit_insn (gen_move_insn (temp_reg2, temp_reg1));
8302 sequence = gen_sequence ();
8304 emit_insn_after (sequence, loop_start);
8306 /* insert new comparison on the count register instead of the
8307 old one, generating the needed BCT pattern (that will be
8308 later recognized by assembly generation phase). */
8309 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2, start_label),
8311 LABEL_NUSES (start_label)++;
8315 #endif /* HAVE_decrement_and_branch_on_count */
8319 /* Scan the function and determine whether it has indirect (computed) jumps.
8321 This is taken mostly from flow.c; similar code exists elsewhere
8322 in the compiler. It may be useful to put this into rtlanal.c. */
8324 indirect_jump_in_function_p (start)
8329 for (insn = start; insn; insn = NEXT_INSN (insn))
8330 if (computed_jump_p (insn))
8336 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
8337 documentation for LOOP_MEMS for the definition of `appropriate'.
8338 This function is called from prescan_loop via for_each_rtx. */
8341 insert_loop_mem (mem, data)
8351 switch (GET_CODE (m))
8357 /* We're not interested in the MEM associated with a
8358 CONST_DOUBLE, so there's no need to traverse into this. */
8362 /* This is not a MEM. */
8366 /* See if we've already seen this MEM. */
8367 for (i = 0; i < loop_mems_idx; ++i)
8368 if (rtx_equal_p (m, loop_mems[i].mem))
8370 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
8371 /* The modes of the two memory accesses are different. If
8372 this happens, something tricky is going on, and we just
8373 don't optimize accesses to this MEM. */
8374 loop_mems[i].optimize = 0;
8379 /* Resize the array, if necessary. */
8380 if (loop_mems_idx == loop_mems_allocated)
8382 if (loop_mems_allocated != 0)
8383 loop_mems_allocated *= 2;
8385 loop_mems_allocated = 32;
8387 loop_mems = (loop_mem_info*)
8388 xrealloc (loop_mems,
8389 loop_mems_allocated * sizeof (loop_mem_info));
8392 /* Actually insert the MEM. */
8393 loop_mems[loop_mems_idx].mem = m;
8394 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
8395 because we can't put it in a register. We still store it in the
8396 table, though, so that if we see the same address later, but in a
8397 non-BLK mode, we'll not think we can optimize it at that point. */
8398 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
8399 loop_mems[loop_mems_idx].reg = NULL_RTX;
8403 /* Like load_mems, but also ensures that N_TIMES_SET,
8404 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
8405 values after load_mems. */
8408 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top, start,
8409 reg_single_usage, insn_count)
8414 rtx *reg_single_usage;
8417 int nregs = max_reg_num ();
8419 load_mems (scan_start, end, loop_top, start);
8421 /* Recalculate n_times_set and friends since load_mems may have
8422 created new registers. */
8423 if (max_reg_num () > nregs)
8429 nregs = max_reg_num ();
8431 /* Note that we assume here that enough room was allocated in
8432 the various arrays to accomodate the extra registers created
8434 bzero ((char *) n_times_set, nregs * sizeof (int));
8435 bzero (may_not_optimize, nregs);
8436 if (loop_has_call && reg_single_usage)
8437 bzero ((char *) reg_single_usage, nregs * sizeof (rtx));
8439 count_loop_regs_set (loop_top ? loop_top : start, end,
8440 may_not_optimize, reg_single_usage,
8443 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8444 may_not_optimize[i] = 1, n_times_set[i] = 1;
8446 #ifdef AVOID_CCMODE_COPIES
8447 /* Don't try to move insns which set CC registers if we should not
8448 create CCmode register copies. */
8449 for (i = FIRST_PSEUDO_REGISTER; i < nregs - loop_mems_idx; i++)
8450 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
8451 may_not_optimize[i] = 1;
8454 /* Set n_times_used for the new registers. */
8455 bcopy ((char *) (n_times_set + old_nregs),
8456 (char *) (n_times_used + old_nregs),
8457 (nregs - old_nregs) * sizeof (int));
8461 /* Move MEMs into registers for the duration of the loop. SCAN_START
8462 is the first instruction in the loop (as it is executed). The
8463 other parameters are as for next_insn_in_loop. */
8466 load_mems (scan_start, end, loop_top, start)
8472 int maybe_never = 0;
8475 rtx label = NULL_RTX;
8478 if (loop_mems_idx > 0)
8480 /* Nonzero if the next instruction may never be executed. */
8481 int next_maybe_never = 0;
8483 /* Check to see if it's possible that some instructions in the
8484 loop are never executed. */
8485 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
8486 p != NULL_RTX && !maybe_never;
8487 p = next_insn_in_loop (p, scan_start, end, loop_top))
8489 if (GET_CODE (p) == CODE_LABEL)
8491 else if (GET_CODE (p) == JUMP_INSN
8492 /* If we enter the loop in the middle, and scan
8493 around to the beginning, don't set maybe_never
8494 for that. This must be an unconditional jump,
8495 otherwise the code at the top of the loop might
8496 never be executed. Unconditional jumps are
8497 followed a by barrier then loop end. */
8498 && ! (GET_CODE (p) == JUMP_INSN
8499 && JUMP_LABEL (p) == loop_top
8500 && NEXT_INSN (NEXT_INSN (p)) == end
8501 && simplejump_p (p)))
8503 if (!condjump_p (p))
8504 /* Something complicated. */
8507 /* If there are any more instructions in the loop, they
8508 might not be reached. */
8509 next_maybe_never = 1;
8511 else if (next_maybe_never)
8515 /* Actually move the MEMs. */
8516 for (i = 0; i < loop_mems_idx; ++i)
8521 rtx mem = loop_mems[i].mem;
8523 if (MEM_VOLATILE_P (mem)
8524 || invariant_p (XEXP (mem, 0)) != 1)
8525 /* There's no telling whether or not MEM is modified. */
8526 loop_mems[i].optimize = 0;
8528 /* Go through the MEMs written to in the loop to see if this
8529 one is aliased by one of them. */
8530 for (j = 0; j < loop_store_mems_idx; ++j)
8532 if (rtx_equal_p (mem, loop_store_mems[j]))
8534 else if (true_dependence (loop_store_mems[j], VOIDmode,
8537 /* MEM is indeed aliased by this store. */
8538 loop_mems[i].optimize = 0;
8543 /* If this MEM is written to, we must be sure that there
8544 are no reads from another MEM that aliases this one. */
8545 if (loop_mems[i].optimize && written)
8549 for (j = 0; j < loop_mems_idx; ++j)
8553 else if (true_dependence (mem,
8558 /* It's not safe to hoist loop_mems[i] out of
8559 the loop because writes to it might not be
8560 seen by reads from loop_mems[j]. */
8561 loop_mems[i].optimize = 0;
8567 if (maybe_never && may_trap_p (mem))
8568 /* We can't access the MEM outside the loop; it might
8569 cause a trap that wouldn't have happened otherwise. */
8570 loop_mems[i].optimize = 0;
8572 if (!loop_mems[i].optimize)
8573 /* We thought we were going to lift this MEM out of the
8574 loop, but later discovered that we could not. */
8577 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
8578 order to keep scan_loop from moving stores to this MEM
8579 out of the loop just because this REG is neither a
8580 user-variable nor used in the loop test. */
8581 reg = gen_reg_rtx (GET_MODE (mem));
8582 REG_USERVAR_P (reg) = 1;
8583 loop_mems[i].reg = reg;
8585 /* Now, replace all references to the MEM with the
8586 corresponding pesudos. */
8587 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
8589 p = next_insn_in_loop (p, scan_start, end, loop_top))
8594 for_each_rtx (&p, replace_loop_mem, &ri);
8597 if (!apply_change_group ())
8598 /* We couldn't replace all occurrences of the MEM. */
8599 loop_mems[i].optimize = 0;
8604 /* Load the memory immediately before START, which is
8605 the NOTE_LOOP_BEG. */
8606 set = gen_rtx_SET (GET_MODE (reg), reg, mem);
8607 emit_insn_before (set, start);
8611 if (label == NULL_RTX)
8613 /* We must compute the former
8614 right-after-the-end label before we insert
8616 end_label = next_label (end);
8617 label = gen_label_rtx ();
8618 emit_label_after (label, end);
8621 /* Store the memory immediately after END, which is
8622 the NOTE_LOOP_END. */
8623 set = gen_rtx_SET (GET_MODE (reg), mem, reg);
8624 emit_insn_after (set, label);
8627 if (loop_dump_stream)
8629 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
8630 REGNO (reg), (written ? "r/w" : "r/o"));
8631 print_rtl (loop_dump_stream, mem);
8632 fputc ('\n', loop_dump_stream);
8638 if (label != NULL_RTX)
8640 /* Now, we need to replace all references to the previous exit
8641 label with the new one. */
8646 for (p = start; p != end; p = NEXT_INSN (p))
8647 for_each_rtx (&p, replace_label, &rr);
8651 /* Replace MEM with its associated pseudo register. This function is
8652 called from load_mems via for_each_rtx. DATA is actually an
8653 rtx_and_int * describing the instruction currently being scanned
8654 and the MEM we are currently replacing. */
8657 replace_loop_mem (mem, data)
8669 switch (GET_CODE (m))
8675 /* We're not interested in the MEM associated with a
8676 CONST_DOUBLE, so there's no need to traverse into one. */
8680 /* This is not a MEM. */
8684 ri = (rtx_and_int*) data;
8687 if (!rtx_equal_p (loop_mems[i].mem, m))
8688 /* This is not the MEM we are currently replacing. */
8693 /* Actually replace the MEM. */
8694 validate_change (insn, mem, loop_mems[i].reg, 1);
8699 /* Replace occurrences of the old exit label for the loop with the new
8700 one. DATA is an rtx_pair containing the old and new labels,
8704 replace_label (x, data)
8709 rtx old_label = ((rtx_pair*) data)->r1;
8710 rtx new_label = ((rtx_pair*) data)->r2;
8715 if (GET_CODE (l) != LABEL_REF)
8718 if (XEXP (l, 0) != old_label)
8721 XEXP (l, 0) = new_label;
8722 ++LABEL_NUSES (new_label);
8723 --LABEL_NUSES (old_label);