1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
53 /* Vector mapping INSN_UIDs to luids.
54 The luids are like uids but increase monotonically always.
55 We use them to see whether a jump comes from outside a given loop. */
59 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
60 number the insn is contained in. */
64 /* 1 + largest uid of any insn. */
68 /* 1 + luid of last insn. */
72 /* Number of loops detected in current function. Used as index to the
75 static int max_loop_num;
77 /* Indexed by loop number, contains the first and last insn of each loop. */
79 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
81 /* Likewise for the continue insn */
82 static rtx *loop_number_loop_cont;
84 /* The first code_label that is reached in every loop iteration.
85 0 when not computed yet, initially const0_rtx if a jump couldn't be
87 Also set to 0 when there is no such label before the NOTE_INSN_LOOP_CONT
88 of this loop, or in verify_dominator, if a jump couldn't be followed. */
89 static rtx *loop_number_cont_dominator;
91 /* For each loop, gives the containing loop number, -1 if none. */
95 #ifdef HAVE_decrement_and_branch_on_count
96 /* Records whether resource in use by inner loop. */
98 int *loop_used_count_register;
99 #endif /* HAVE_decrement_and_branch_on_count */
101 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
102 really a loop (an insn outside the loop branches into it). */
104 static char *loop_invalid;
106 /* Indexed by loop number, links together all LABEL_REFs which refer to
107 code labels outside the loop. Used by routines that need to know all
108 loop exits, such as final_biv_value and final_giv_value.
110 This does not include loop exits due to return instructions. This is
111 because all bivs and givs are pseudos, and hence must be dead after a
112 return, so the presense of a return does not affect any of the
113 optimizations that use this info. It is simpler to just not include return
114 instructions on this list. */
116 rtx *loop_number_exit_labels;
118 /* Indexed by loop number, counts the number of LABEL_REFs on
119 loop_number_exit_labels for this loop and all loops nested inside it. */
121 int *loop_number_exit_count;
123 /* Nonzero if there is a subroutine call in the current loop. */
125 static int loop_has_call;
127 /* Nonzero if there is a volatile memory reference in the current
130 static int loop_has_volatile;
132 /* Nonzero if there is a tablejump in the current loop. */
134 static int loop_has_tablejump;
136 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
137 current loop. A continue statement will generate a branch to
138 NEXT_INSN (loop_continue). */
140 static rtx loop_continue;
142 /* Indexed by register number, contains the number of times the reg
143 is set during the loop being scanned.
144 During code motion, a negative value indicates a reg that has been
145 made a candidate; in particular -2 means that it is an candidate that
146 we know is equal to a constant and -1 means that it is an candidate
147 not known equal to a constant.
148 After code motion, regs moved have 0 (which is accurate now)
149 while the failed candidates have the original number of times set.
151 Therefore, at all times, == 0 indicates an invariant register;
152 < 0 a conditionally invariant one. */
154 static varray_type set_in_loop;
156 /* Original value of set_in_loop; same except that this value
157 is not set negative for a reg whose sets have been made candidates
158 and not set to 0 for a reg that is moved. */
160 static varray_type n_times_set;
162 /* Index by register number, 1 indicates that the register
163 cannot be moved or strength reduced. */
165 static varray_type may_not_optimize;
167 /* Nonzero means reg N has already been moved out of one loop.
168 This reduces the desire to move it out of another. */
170 static char *moved_once;
172 /* List of MEMs that are stored in this loop. */
174 static rtx loop_store_mems;
176 typedef struct loop_mem_info {
177 rtx mem; /* The MEM itself. */
178 rtx reg; /* Corresponding pseudo, if any. */
179 int optimize; /* Nonzero if we can optimize access to this MEM. */
182 /* Array of MEMs that are used (read or written) in this loop, but
183 cannot be aliased by anything in this loop, except perhaps
184 themselves. In other words, if loop_mems[i] is altered during the
185 loop, it is altered by an expression that is rtx_equal_p to it. */
187 static loop_mem_info *loop_mems;
189 /* The index of the next available slot in LOOP_MEMS. */
191 static int loop_mems_idx;
193 /* The number of elements allocated in LOOP_MEMs. */
195 static int loop_mems_allocated;
197 /* Nonzero if we don't know what MEMs were changed in the current loop.
198 This happens if the loop contains a call (in which case `loop_has_call'
199 will also be set) or if we store into more than NUM_STORES MEMs. */
201 static int unknown_address_altered;
203 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
204 static int num_movables;
206 /* Count of memory write instructions discovered in the loop. */
207 static int num_mem_sets;
209 /* Number of loops contained within the current one, including itself. */
210 static int loops_enclosed;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop;
216 /* This obstack is used in product_cheap_p to allocate its rtl. It
217 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
218 If we used the same obstack that it did, we would be deallocating
221 static struct obstack temp_obstack;
223 /* This is where the pointer to the obstack being used for RTL is stored. */
225 extern struct obstack *rtl_obstack;
227 #define obstack_chunk_alloc xmalloc
228 #define obstack_chunk_free free
230 /* During the analysis of a loop, a chain of `struct movable's
231 is made to record all the movable insns found.
232 Then the entire chain can be scanned to decide which to move. */
236 rtx insn; /* A movable insn */
237 rtx set_src; /* The expression this reg is set from. */
238 rtx set_dest; /* The destination of this SET. */
239 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
240 of any registers used within the LIBCALL. */
241 int consec; /* Number of consecutive following insns
242 that must be moved with this one. */
243 int regno; /* The register it sets */
244 short lifetime; /* lifetime of that register;
245 may be adjusted when matching movables
246 that load the same value are found. */
247 short savings; /* Number of insns we can move for this reg,
248 including other movables that force this
249 or match this one. */
250 unsigned int cond : 1; /* 1 if only conditionally movable */
251 unsigned int force : 1; /* 1 means MUST move this insn */
252 unsigned int global : 1; /* 1 means reg is live outside this loop */
253 /* If PARTIAL is 1, GLOBAL means something different:
254 that the reg is live outside the range from where it is set
255 to the following label. */
256 unsigned int done : 1; /* 1 inhibits further processing of this */
258 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
259 In particular, moving it does not make it
261 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
262 load SRC, rather than copying INSN. */
263 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
264 first insn of a consecutive sets group. */
265 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
266 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
267 that we should avoid changing when clearing
268 the rest of the reg. */
269 struct movable *match; /* First entry for same value */
270 struct movable *forces; /* An insn that must be moved if this is */
271 struct movable *next;
274 static struct movable *the_movables;
276 FILE *loop_dump_stream;
278 /* Forward declarations. */
280 static void verify_dominator PROTO((int));
281 static void find_and_verify_loops PROTO((rtx));
282 static void mark_loop_jump PROTO((rtx, int));
283 static void prescan_loop PROTO((rtx, rtx));
284 static int reg_in_basic_block_p PROTO((rtx, rtx));
285 static int consec_sets_invariant_p PROTO((rtx, int, rtx));
286 static rtx libcall_other_reg PROTO((rtx, rtx));
287 static int labels_in_range_p PROTO((rtx, int));
288 static void count_one_set PROTO((rtx, rtx, varray_type, rtx *));
290 static void count_loop_regs_set PROTO((rtx, rtx, varray_type, varray_type,
292 static void note_addr_stored PROTO((rtx, rtx));
293 static int loop_reg_used_before_p PROTO((rtx, rtx, rtx, rtx, rtx));
294 static void scan_loop PROTO((rtx, rtx, int, int));
296 static void replace_call_address PROTO((rtx, rtx, rtx));
298 static rtx skip_consec_insns PROTO((rtx, int));
299 static int libcall_benefit PROTO((rtx));
300 static void ignore_some_movables PROTO((struct movable *));
301 static void force_movables PROTO((struct movable *));
302 static void combine_movables PROTO((struct movable *, int));
303 static int regs_match_p PROTO((rtx, rtx, struct movable *));
304 static int rtx_equal_for_loop_p PROTO((rtx, rtx, struct movable *));
305 static void add_label_notes PROTO((rtx, rtx));
306 static void move_movables PROTO((struct movable *, int, int, rtx, rtx, int));
307 static int count_nonfixed_reads PROTO((rtx));
308 static void strength_reduce PROTO((rtx, rtx, rtx, int, rtx, rtx, int, int));
309 static void find_single_use_in_loop PROTO((rtx, rtx, varray_type));
310 static int valid_initial_value_p PROTO((rtx, rtx, int, rtx));
311 static void find_mem_givs PROTO((rtx, rtx, int, rtx, rtx));
312 static void record_biv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx *, int, int));
313 static void check_final_value PROTO((struct induction *, rtx, rtx,
314 unsigned HOST_WIDE_INT));
315 static void record_giv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx, int, enum g_types, int, rtx *, rtx, rtx));
316 static void update_giv_derive PROTO((rtx));
317 static int basic_induction_var PROTO((rtx, enum machine_mode, rtx, rtx, rtx *, rtx *, rtx **));
318 static rtx simplify_giv_expr PROTO((rtx, int *));
319 static int general_induction_var PROTO((rtx, rtx *, rtx *, rtx *, int, int *));
320 static int consec_sets_giv PROTO((int, rtx, rtx, rtx, rtx *, rtx *, rtx *));
321 static int check_dbra_loop PROTO((rtx, int, rtx, struct loop_info *));
322 static rtx express_from_1 PROTO((rtx, rtx, rtx));
323 static rtx express_from PROTO((struct induction *, struct induction *));
324 static rtx combine_givs_p PROTO((struct induction *, struct induction *));
325 static void combine_givs PROTO((struct iv_class *));
326 struct recombine_givs_stats;
327 static int find_life_end PROTO((rtx, struct recombine_givs_stats *, rtx, rtx));
328 static void recombine_givs PROTO((struct iv_class *, rtx, rtx, int));
329 static int product_cheap_p PROTO((rtx, rtx));
330 static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
331 static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
332 static int last_use_this_basic_block PROTO((rtx, rtx));
333 static void record_initial PROTO((rtx, rtx));
334 static void update_reg_last_use PROTO((rtx, rtx));
335 static rtx next_insn_in_loop PROTO((rtx, rtx, rtx, rtx));
336 static void load_mems_and_recount_loop_regs_set PROTO((rtx, rtx, rtx,
339 static void load_mems PROTO((rtx, rtx, rtx, rtx));
340 static int insert_loop_mem PROTO((rtx *, void *));
341 static int replace_loop_mem PROTO((rtx *, void *));
342 static int replace_label PROTO((rtx *, void *));
344 typedef struct rtx_and_int {
349 typedef struct rtx_pair {
354 /* Nonzero iff INSN is between START and END, inclusive. */
355 #define INSN_IN_RANGE_P(INSN, START, END) \
356 (INSN_UID (INSN) < max_uid_for_loop \
357 && INSN_LUID (INSN) >= INSN_LUID (START) \
358 && INSN_LUID (INSN) <= INSN_LUID (END))
360 #ifdef HAVE_decrement_and_branch_on_count
361 /* Test whether BCT applicable and safe. */
362 static void insert_bct PROTO((rtx, rtx, struct loop_info *));
364 /* Auxiliary function that inserts the BCT pattern into the loop. */
365 static void instrument_loop_bct PROTO((rtx, rtx, rtx));
366 #endif /* HAVE_decrement_and_branch_on_count */
368 /* Indirect_jump_in_function is computed once per function. */
369 int indirect_jump_in_function = 0;
370 static int indirect_jump_in_function_p PROTO((rtx));
372 static int compute_luids PROTO ((rtx, rtx, int));
374 /* Relative gain of eliminating various kinds of operations. */
377 static int shift_cost;
378 static int mult_cost;
381 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
382 copy the value of the strength reduced giv to its original register. */
383 static int copy_cost;
385 /* Cost of using a register, to normalize the benefits of a giv. */
386 static int reg_address_cost;
392 char *free_point = (char *) oballoc (1);
393 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
395 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
398 reg_address_cost = ADDRESS_COST (reg);
400 reg_address_cost = rtx_cost (reg, MEM);
403 /* We multiply by 2 to reconcile the difference in scale between
404 these two ways of computing costs. Otherwise the cost of a copy
405 will be far less than the cost of an add. */
409 /* Free the objects we just allocated. */
412 /* Initialize the obstack used for rtl in product_cheap_p. */
413 gcc_obstack_init (&temp_obstack);
416 /* Compute the mapping from uids to luids.
417 LUIDs are numbers assigned to insns, like uids,
418 except that luids increase monotonically through the code.
419 Start at insn START and stop just before END. Assign LUIDs
420 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
422 compute_luids (start, end, prev_luid)
429 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
431 if (INSN_UID (insn) >= max_uid_for_loop)
433 /* Don't assign luids to line-number NOTEs, so that the distance in
434 luids between two insns is not affected by -g. */
435 if (GET_CODE (insn) != NOTE
436 || NOTE_LINE_NUMBER (insn) <= 0)
437 uid_luid[INSN_UID (insn)] = ++i;
439 /* Give a line number note the same luid as preceding insn. */
440 uid_luid[INSN_UID (insn)] = i;
445 /* Entry point of this file. Perform loop optimization
446 on the current function. F is the first insn of the function
447 and DUMPFILE is a stream for output of a trace of actions taken
448 (or 0 if none should be output). */
451 loop_optimize (f, dumpfile, unroll_p, bct_p)
452 /* f is the first instruction of a chain of insns for one function */
460 loop_dump_stream = dumpfile;
462 init_recog_no_volatile ();
464 max_reg_before_loop = max_reg_num ();
466 moved_once = (char *) alloca (max_reg_before_loop);
467 bzero (moved_once, max_reg_before_loop);
471 /* Count the number of loops. */
474 for (insn = f; insn; insn = NEXT_INSN (insn))
476 if (GET_CODE (insn) == NOTE
477 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
481 /* Don't waste time if no loops. */
482 if (max_loop_num == 0)
485 /* Get size to use for tables indexed by uids.
486 Leave some space for labels allocated by find_and_verify_loops. */
487 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
489 uid_luid = (int *) alloca (max_uid_for_loop * sizeof (int));
490 uid_loop_num = (int *) alloca (max_uid_for_loop * sizeof (int));
492 bzero ((char *) uid_luid, max_uid_for_loop * sizeof (int));
493 bzero ((char *) uid_loop_num, max_uid_for_loop * sizeof (int));
495 /* Allocate tables for recording each loop. We set each entry, so they need
497 loop_number_loop_starts = (rtx *) alloca (max_loop_num * sizeof (rtx));
498 loop_number_loop_ends = (rtx *) alloca (max_loop_num * sizeof (rtx));
499 loop_number_loop_cont = (rtx *) alloca (max_loop_num * sizeof (rtx));
500 loop_number_cont_dominator = (rtx *) alloca (max_loop_num * sizeof (rtx));
501 loop_outer_loop = (int *) alloca (max_loop_num * sizeof (int));
502 loop_invalid = (char *) alloca (max_loop_num * sizeof (char));
503 loop_number_exit_labels = (rtx *) alloca (max_loop_num * sizeof (rtx));
504 loop_number_exit_count = (int *) alloca (max_loop_num * sizeof (int));
506 #ifdef HAVE_decrement_and_branch_on_count
507 /* Allocate for BCT optimization */
508 loop_used_count_register = (int *) alloca (max_loop_num * sizeof (int));
509 bzero ((char *) loop_used_count_register, max_loop_num * sizeof (int));
510 #endif /* HAVE_decrement_and_branch_on_count */
512 /* Find and process each loop.
513 First, find them, and record them in order of their beginnings. */
514 find_and_verify_loops (f);
516 /* Now find all register lifetimes. This must be done after
517 find_and_verify_loops, because it might reorder the insns in the
519 reg_scan (f, max_reg_num (), 1);
521 /* This must occur after reg_scan so that registers created by gcse
522 will have entries in the register tables.
524 We could have added a call to reg_scan after gcse_main in toplev.c,
525 but moving this call to init_alias_analysis is more efficient. */
526 init_alias_analysis ();
528 /* See if we went too far. */
529 if (get_max_uid () > max_uid_for_loop)
531 /* Now reset it to the actual size we need. See above. */
532 max_uid_for_loop = get_max_uid () + 1;
534 /* find_and_verify_loops has already called compute_luids, but it might
535 have rearranged code afterwards, so we need to recompute the luids now. */
536 max_luid = compute_luids (f, NULL_RTX, 0);
538 /* Don't leave gaps in uid_luid for insns that have been
539 deleted. It is possible that the first or last insn
540 using some register has been deleted by cross-jumping.
541 Make sure that uid_luid for that former insn's uid
542 points to the general area where that insn used to be. */
543 for (i = 0; i < max_uid_for_loop; i++)
545 uid_luid[0] = uid_luid[i];
546 if (uid_luid[0] != 0)
549 for (i = 0; i < max_uid_for_loop; i++)
550 if (uid_luid[i] == 0)
551 uid_luid[i] = uid_luid[i - 1];
553 /* Create a mapping from loops to BLOCK tree nodes. */
554 if (unroll_p && write_symbols != NO_DEBUG)
555 find_loop_tree_blocks ();
557 /* Determine if the function has indirect jump. On some systems
558 this prevents low overhead loop instructions from being used. */
559 indirect_jump_in_function = indirect_jump_in_function_p (f);
561 /* Now scan the loops, last ones first, since this means inner ones are done
562 before outer ones. */
563 for (i = max_loop_num-1; i >= 0; i--)
564 if (! loop_invalid[i] && loop_number_loop_ends[i])
565 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
568 /* If debugging and unrolling loops, we must replicate the tree nodes
569 corresponding to the blocks inside the loop, so that the original one
570 to one mapping will remain. */
571 if (unroll_p && write_symbols != NO_DEBUG)
572 unroll_block_trees ();
574 end_alias_analysis ();
577 /* Returns the next insn, in execution order, after INSN. START and
578 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
579 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
580 insn-stream; it is used with loops that are entered near the
584 next_insn_in_loop (insn, start, end, loop_top)
590 insn = NEXT_INSN (insn);
595 /* Go to the top of the loop, and continue there. */
609 /* Optimize one loop whose start is LOOP_START and end is END.
610 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
611 NOTE_INSN_LOOP_END. */
613 /* ??? Could also move memory writes out of loops if the destination address
614 is invariant, the source is invariant, the memory write is not volatile,
615 and if we can prove that no read inside the loop can read this address
616 before the write occurs. If there is a read of this address after the
617 write, then we can also mark the memory read as invariant. */
620 scan_loop (loop_start, end, unroll_p, bct_p)
626 /* 1 if we are scanning insns that could be executed zero times. */
628 /* 1 if we are scanning insns that might never be executed
629 due to a subroutine call which might exit before they are reached. */
631 /* For a rotated loop that is entered near the bottom,
632 this is the label at the top. Otherwise it is zero. */
634 /* Jump insn that enters the loop, or 0 if control drops in. */
635 rtx loop_entry_jump = 0;
636 /* Place in the loop where control enters. */
638 /* Number of insns in the loop. */
643 /* The SET from an insn, if it is the only SET in the insn. */
645 /* Chain describing insns movable in current loop. */
646 struct movable *movables = 0;
647 /* Last element in `movables' -- so we can add elements at the end. */
648 struct movable *last_movable = 0;
649 /* Ratio of extra register life span we can justify
650 for saving an instruction. More if loop doesn't call subroutines
651 since in that case saving an insn makes more difference
652 and more registers are available. */
654 /* If we have calls, contains the insn in which a register was used
655 if it was used exactly once; contains const0_rtx if it was used more
657 varray_type reg_single_usage = 0;
658 /* Nonzero if we are scanning instructions in a sub-loop. */
662 /* Determine whether this loop starts with a jump down to a test at
663 the end. This will occur for a small number of loops with a test
664 that is too complex to duplicate in front of the loop.
666 We search for the first insn or label in the loop, skipping NOTEs.
667 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
668 (because we might have a loop executed only once that contains a
669 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
670 (in case we have a degenerate loop).
672 Note that if we mistakenly think that a loop is entered at the top
673 when, in fact, it is entered at the exit test, the only effect will be
674 slightly poorer optimization. Making the opposite error can generate
675 incorrect code. Since very few loops now start with a jump to the
676 exit test, the code here to detect that case is very conservative. */
678 for (p = NEXT_INSN (loop_start);
680 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
681 && (GET_CODE (p) != NOTE
682 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
683 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
689 /* Set up variables describing this loop. */
690 prescan_loop (loop_start, end);
691 threshold = (loop_has_call ? 1 : 2) * (1 + n_non_fixed_regs);
693 /* If loop has a jump before the first label,
694 the true entry is the target of that jump.
695 Start scan from there.
696 But record in LOOP_TOP the place where the end-test jumps
697 back to so we can scan that after the end of the loop. */
698 if (GET_CODE (p) == JUMP_INSN)
702 /* Loop entry must be unconditional jump (and not a RETURN) */
704 && JUMP_LABEL (p) != 0
705 /* Check to see whether the jump actually
706 jumps out of the loop (meaning it's no loop).
707 This case can happen for things like
708 do {..} while (0). If this label was generated previously
709 by loop, we can't tell anything about it and have to reject
711 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, end))
713 loop_top = next_label (scan_start);
714 scan_start = JUMP_LABEL (p);
718 /* If SCAN_START was an insn created by loop, we don't know its luid
719 as required by loop_reg_used_before_p. So skip such loops. (This
720 test may never be true, but it's best to play it safe.)
722 Also, skip loops where we do not start scanning at a label. This
723 test also rejects loops starting with a JUMP_INSN that failed the
726 if (INSN_UID (scan_start) >= max_uid_for_loop
727 || GET_CODE (scan_start) != CODE_LABEL)
729 if (loop_dump_stream)
730 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
731 INSN_UID (loop_start), INSN_UID (end));
735 /* Count number of times each reg is set during this loop.
736 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
737 the setting of register I. If this loop has calls, set
738 VARRAY_RTX (reg_single_usage, I). */
740 /* Allocate extra space for REGS that might be created by
741 load_mems. We allocate a little extra slop as well, in the hopes
742 that even after the moving of movables creates some new registers
743 we won't have to reallocate these arrays. However, we do grow
744 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
745 nregs = max_reg_num () + loop_mems_idx + 16;
746 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
747 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
748 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
751 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
753 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
754 may_not_optimize, reg_single_usage, &insn_count, nregs);
756 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
758 VARRAY_CHAR (may_not_optimize, i) = 1;
759 VARRAY_INT (set_in_loop, i) = 1;
762 #ifdef AVOID_CCMODE_COPIES
763 /* Don't try to move insns which set CC registers if we should not
764 create CCmode register copies. */
765 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
766 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
767 VARRAY_CHAR (may_not_optimize, i) = 1;
770 bcopy ((char *) &set_in_loop->data,
771 (char *) &n_times_set->data, nregs * sizeof (int));
773 if (loop_dump_stream)
775 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
776 INSN_UID (loop_start), INSN_UID (end), insn_count);
778 fprintf (loop_dump_stream, "Continue at insn %d.\n",
779 INSN_UID (loop_continue));
782 /* Scan through the loop finding insns that are safe to move.
783 Set set_in_loop negative for the reg being set, so that
784 this reg will be considered invariant for subsequent insns.
785 We consider whether subsequent insns use the reg
786 in deciding whether it is worth actually moving.
788 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
789 and therefore it is possible that the insns we are scanning
790 would never be executed. At such times, we must make sure
791 that it is safe to execute the insn once instead of zero times.
792 When MAYBE_NEVER is 0, all insns will be executed at least once
793 so that is not a problem. */
795 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
797 p = next_insn_in_loop (p, scan_start, end, loop_top))
799 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
800 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
802 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
803 && find_reg_note (p, REG_RETVAL, NULL_RTX))
806 if (GET_CODE (p) == INSN
807 && (set = single_set (p))
808 && GET_CODE (SET_DEST (set)) == REG
809 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
814 rtx src = SET_SRC (set);
815 rtx dependencies = 0;
817 /* Figure out what to use as a source of this insn. If a REG_EQUIV
818 note is given or if a REG_EQUAL note with a constant operand is
819 specified, use it as the source and mark that we should move
820 this insn by calling emit_move_insn rather that duplicating the
823 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
825 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
827 src = XEXP (temp, 0), move_insn = 1;
830 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
831 if (temp && CONSTANT_P (XEXP (temp, 0)))
832 src = XEXP (temp, 0), move_insn = 1;
833 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
835 src = XEXP (temp, 0);
836 /* A libcall block can use regs that don't appear in
837 the equivalent expression. To move the libcall,
838 we must move those regs too. */
839 dependencies = libcall_other_reg (p, src);
843 /* Don't try to optimize a register that was made
844 by loop-optimization for an inner loop.
845 We don't know its life-span, so we can't compute the benefit. */
846 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
848 else if (/* The set is not guaranteed to be executed one
849 the loop starts, or the value before the set is
850 needed before the set occurs... */
852 || loop_reg_used_before_p (set, p, loop_start,
854 /* And the register is used in basic blocks other
855 than the one where it is set (meaning that
856 something after this point in the loop might
857 depend on its value before the set). */
858 && !reg_in_basic_block_p (p, SET_DEST (set)))
859 /* It is unsafe to move the set.
861 This code used to consider it OK to move a set of a variable
862 which was not created by the user and not used in an exit test.
863 That behavior is incorrect and was removed. */
865 else if ((tem = invariant_p (src))
866 && (dependencies == 0
867 || (tem2 = invariant_p (dependencies)) != 0)
868 && (VARRAY_INT (set_in_loop,
869 REGNO (SET_DEST (set))) == 1
871 = consec_sets_invariant_p
873 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
875 /* If the insn can cause a trap (such as divide by zero),
876 can't move it unless it's guaranteed to be executed
877 once loop is entered. Even a function call might
878 prevent the trap insn from being reached
879 (since it might exit!) */
880 && ! ((maybe_never || call_passed)
881 && may_trap_p (src)))
883 register struct movable *m;
884 register int regno = REGNO (SET_DEST (set));
886 /* A potential lossage is where we have a case where two insns
887 can be combined as long as they are both in the loop, but
888 we move one of them outside the loop. For large loops,
889 this can lose. The most common case of this is the address
890 of a function being called.
892 Therefore, if this register is marked as being used exactly
893 once if we are in a loop with calls (a "large loop"), see if
894 we can replace the usage of this register with the source
895 of this SET. If we can, delete this insn.
897 Don't do this if P has a REG_RETVAL note or if we have
898 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
900 if (reg_single_usage && VARRAY_RTX (reg_single_usage, regno) != 0
901 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
902 && REGNO_FIRST_UID (regno) == INSN_UID (p)
903 && (REGNO_LAST_UID (regno)
904 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
905 && VARRAY_INT (set_in_loop, regno) == 1
906 && ! side_effects_p (SET_SRC (set))
907 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
908 && (! SMALL_REGISTER_CLASSES
909 || (! (GET_CODE (SET_SRC (set)) == REG
910 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
911 /* This test is not redundant; SET_SRC (set) might be
912 a call-clobbered register and the life of REGNO
913 might span a call. */
914 && ! modified_between_p (SET_SRC (set), p,
916 (reg_single_usage, regno))
917 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
918 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
920 (reg_single_usage, regno)))
922 /* Replace any usage in a REG_EQUAL note. Must copy the
923 new source, so that we don't get rtx sharing between the
924 SET_SOURCE and REG_NOTES of insn p. */
925 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
926 = replace_rtx (REG_NOTES (VARRAY_RTX
927 (reg_single_usage, regno)),
928 SET_DEST (set), copy_rtx (SET_SRC (set)));
931 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
932 NOTE_SOURCE_FILE (p) = 0;
933 VARRAY_INT (set_in_loop, regno) = 0;
937 m = (struct movable *) alloca (sizeof (struct movable));
941 m->dependencies = dependencies;
942 m->set_dest = SET_DEST (set);
944 m->consec = VARRAY_INT (set_in_loop,
945 REGNO (SET_DEST (set))) - 1;
949 m->move_insn = move_insn;
950 m->move_insn_first = 0;
951 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
952 m->savemode = VOIDmode;
954 /* Set M->cond if either invariant_p or consec_sets_invariant_p
955 returned 2 (only conditionally invariant). */
956 m->cond = ((tem | tem1 | tem2) > 1);
957 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
958 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
960 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
961 - uid_luid[REGNO_FIRST_UID (regno)]);
962 m->savings = VARRAY_INT (n_times_set, regno);
963 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
964 m->savings += libcall_benefit (p);
965 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
966 /* Add M to the end of the chain MOVABLES. */
970 last_movable->next = m;
975 /* It is possible for the first instruction to have a
976 REG_EQUAL note but a non-invariant SET_SRC, so we must
977 remember the status of the first instruction in case
978 the last instruction doesn't have a REG_EQUAL note. */
979 m->move_insn_first = m->move_insn;
981 /* Skip this insn, not checking REG_LIBCALL notes. */
982 p = next_nonnote_insn (p);
983 /* Skip the consecutive insns, if there are any. */
984 p = skip_consec_insns (p, m->consec);
985 /* Back up to the last insn of the consecutive group. */
986 p = prev_nonnote_insn (p);
988 /* We must now reset m->move_insn, m->is_equiv, and possibly
989 m->set_src to correspond to the effects of all the
991 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
993 m->set_src = XEXP (temp, 0), m->move_insn = 1;
996 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
997 if (temp && CONSTANT_P (XEXP (temp, 0)))
998 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1003 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
1006 /* If this register is always set within a STRICT_LOW_PART
1007 or set to zero, then its high bytes are constant.
1008 So clear them outside the loop and within the loop
1009 just load the low bytes.
1010 We must check that the machine has an instruction to do so.
1011 Also, if the value loaded into the register
1012 depends on the same register, this cannot be done. */
1013 else if (SET_SRC (set) == const0_rtx
1014 && GET_CODE (NEXT_INSN (p)) == INSN
1015 && (set1 = single_set (NEXT_INSN (p)))
1016 && GET_CODE (set1) == SET
1017 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
1018 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
1019 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
1021 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1023 register int regno = REGNO (SET_DEST (set));
1024 if (VARRAY_INT (set_in_loop, regno) == 2)
1026 register struct movable *m;
1027 m = (struct movable *) alloca (sizeof (struct movable));
1030 m->set_dest = SET_DEST (set);
1031 m->dependencies = 0;
1037 m->move_insn_first = 0;
1039 /* If the insn may not be executed on some cycles,
1040 we can't clear the whole reg; clear just high part.
1041 Not even if the reg is used only within this loop.
1048 Clearing x before the inner loop could clobber a value
1049 being saved from the last time around the outer loop.
1050 However, if the reg is not used outside this loop
1051 and all uses of the register are in the same
1052 basic block as the store, there is no problem.
1054 If this insn was made by loop, we don't know its
1055 INSN_LUID and hence must make a conservative
1057 m->global = (INSN_UID (p) >= max_uid_for_loop
1058 || (uid_luid[REGNO_LAST_UID (regno)]
1060 || (uid_luid[REGNO_FIRST_UID (regno)]
1062 || (labels_in_range_p
1063 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1064 if (maybe_never && m->global)
1065 m->savemode = GET_MODE (SET_SRC (set1));
1067 m->savemode = VOIDmode;
1071 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1072 - uid_luid[REGNO_FIRST_UID (regno)]);
1074 VARRAY_INT (set_in_loop, regno) = -1;
1075 /* Add M to the end of the chain MOVABLES. */
1079 last_movable->next = m;
1084 /* Past a call insn, we get to insns which might not be executed
1085 because the call might exit. This matters for insns that trap.
1086 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1087 so they don't count. */
1088 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1090 /* Past a label or a jump, we get to insns for which we
1091 can't count on whether or how many times they will be
1092 executed during each iteration. Therefore, we can
1093 only move out sets of trivial variables
1094 (those not used after the loop). */
1095 /* Similar code appears twice in strength_reduce. */
1096 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1097 /* If we enter the loop in the middle, and scan around to the
1098 beginning, don't set maybe_never for that. This must be an
1099 unconditional jump, otherwise the code at the top of the
1100 loop might never be executed. Unconditional jumps are
1101 followed a by barrier then loop end. */
1102 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1103 && NEXT_INSN (NEXT_INSN (p)) == end
1104 && simplejump_p (p)))
1106 else if (GET_CODE (p) == NOTE)
1108 /* At the virtual top of a converted loop, insns are again known to
1109 be executed: logically, the loop begins here even though the exit
1110 code has been duplicated. */
1111 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1112 maybe_never = call_passed = 0;
1113 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1115 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1120 /* If one movable subsumes another, ignore that other. */
1122 ignore_some_movables (movables);
1124 /* For each movable insn, see if the reg that it loads
1125 leads when it dies right into another conditionally movable insn.
1126 If so, record that the second insn "forces" the first one,
1127 since the second can be moved only if the first is. */
1129 force_movables (movables);
1131 /* See if there are multiple movable insns that load the same value.
1132 If there are, make all but the first point at the first one
1133 through the `match' field, and add the priorities of them
1134 all together as the priority of the first. */
1136 combine_movables (movables, nregs);
1138 /* Now consider each movable insn to decide whether it is worth moving.
1139 Store 0 in set_in_loop for each reg that is moved.
1141 Generally this increases code size, so do not move moveables when
1142 optimizing for code size. */
1144 if (! optimize_size)
1145 move_movables (movables, threshold,
1146 insn_count, loop_start, end, nregs);
1148 /* Now candidates that still are negative are those not moved.
1149 Change set_in_loop to indicate that those are not actually invariant. */
1150 for (i = 0; i < nregs; i++)
1151 if (VARRAY_INT (set_in_loop, i) < 0)
1152 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1154 /* Now that we've moved some things out of the loop, we might be able to
1155 hoist even more memory references. There's no need to pass
1156 reg_single_usage this time, since we're done with it. */
1157 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top,
1161 /* set_in_loop is still used by invariant_p, so we can't free it now. */
1162 VARRAY_FREE (reg_single_usage);
1164 if (flag_strength_reduce)
1166 the_movables = movables;
1167 strength_reduce (scan_start, end, loop_top,
1168 insn_count, loop_start, end, unroll_p, bct_p);
1171 VARRAY_FREE (set_in_loop);
1172 VARRAY_FREE (n_times_set);
1173 VARRAY_FREE (may_not_optimize);
1176 /* Add elements to *OUTPUT to record all the pseudo-regs
1177 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1180 record_excess_regs (in_this, not_in_this, output)
1181 rtx in_this, not_in_this;
1188 code = GET_CODE (in_this);
1202 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1203 && ! reg_mentioned_p (in_this, not_in_this))
1204 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1211 fmt = GET_RTX_FORMAT (code);
1212 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1219 for (j = 0; j < XVECLEN (in_this, i); j++)
1220 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1224 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1230 /* Check what regs are referred to in the libcall block ending with INSN,
1231 aside from those mentioned in the equivalent value.
1232 If there are none, return 0.
1233 If there are one or more, return an EXPR_LIST containing all of them. */
1236 libcall_other_reg (insn, equiv)
1239 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1240 rtx p = XEXP (note, 0);
1243 /* First, find all the regs used in the libcall block
1244 that are not mentioned as inputs to the result. */
1248 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1249 || GET_CODE (p) == CALL_INSN)
1250 record_excess_regs (PATTERN (p), equiv, &output);
1257 /* Return 1 if all uses of REG
1258 are between INSN and the end of the basic block. */
1261 reg_in_basic_block_p (insn, reg)
1264 int regno = REGNO (reg);
1267 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1270 /* Search this basic block for the already recorded last use of the reg. */
1271 for (p = insn; p; p = NEXT_INSN (p))
1273 switch (GET_CODE (p))
1280 /* Ordinary insn: if this is the last use, we win. */
1281 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1286 /* Jump insn: if this is the last use, we win. */
1287 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1289 /* Otherwise, it's the end of the basic block, so we lose. */
1294 /* It's the end of the basic block, so we lose. */
1302 /* The "last use" doesn't follow the "first use"?? */
1306 /* Compute the benefit of eliminating the insns in the block whose
1307 last insn is LAST. This may be a group of insns used to compute a
1308 value directly or can contain a library call. */
1311 libcall_benefit (last)
1317 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1318 insn != last; insn = NEXT_INSN (insn))
1320 if (GET_CODE (insn) == CALL_INSN)
1321 benefit += 10; /* Assume at least this many insns in a library
1323 else if (GET_CODE (insn) == INSN
1324 && GET_CODE (PATTERN (insn)) != USE
1325 && GET_CODE (PATTERN (insn)) != CLOBBER)
1332 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1335 skip_consec_insns (insn, count)
1339 for (; count > 0; count--)
1343 /* If first insn of libcall sequence, skip to end. */
1344 /* Do this at start of loop, since INSN is guaranteed to
1346 if (GET_CODE (insn) != NOTE
1347 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1348 insn = XEXP (temp, 0);
1350 do insn = NEXT_INSN (insn);
1351 while (GET_CODE (insn) == NOTE);
1357 /* Ignore any movable whose insn falls within a libcall
1358 which is part of another movable.
1359 We make use of the fact that the movable for the libcall value
1360 was made later and so appears later on the chain. */
1363 ignore_some_movables (movables)
1364 struct movable *movables;
1366 register struct movable *m, *m1;
1368 for (m = movables; m; m = m->next)
1370 /* Is this a movable for the value of a libcall? */
1371 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1375 /* Check for earlier movables inside that range,
1376 and mark them invalid. We cannot use LUIDs here because
1377 insns created by loop.c for prior loops don't have LUIDs.
1378 Rather than reject all such insns from movables, we just
1379 explicitly check each insn in the libcall (since invariant
1380 libcalls aren't that common). */
1381 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1382 for (m1 = movables; m1 != m; m1 = m1->next)
1383 if (m1->insn == insn)
1389 /* For each movable insn, see if the reg that it loads
1390 leads when it dies right into another conditionally movable insn.
1391 If so, record that the second insn "forces" the first one,
1392 since the second can be moved only if the first is. */
1395 force_movables (movables)
1396 struct movable *movables;
1398 register struct movable *m, *m1;
1399 for (m1 = movables; m1; m1 = m1->next)
1400 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1401 if (!m1->partial && !m1->done)
1403 int regno = m1->regno;
1404 for (m = m1->next; m; m = m->next)
1405 /* ??? Could this be a bug? What if CSE caused the
1406 register of M1 to be used after this insn?
1407 Since CSE does not update regno_last_uid,
1408 this insn M->insn might not be where it dies.
1409 But very likely this doesn't matter; what matters is
1410 that M's reg is computed from M1's reg. */
1411 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1414 if (m != 0 && m->set_src == m1->set_dest
1415 /* If m->consec, m->set_src isn't valid. */
1419 /* Increase the priority of the moving the first insn
1420 since it permits the second to be moved as well. */
1424 m1->lifetime += m->lifetime;
1425 m1->savings += m->savings;
1430 /* Find invariant expressions that are equal and can be combined into
1434 combine_movables (movables, nregs)
1435 struct movable *movables;
1438 register struct movable *m;
1439 char *matched_regs = (char *) alloca (nregs);
1440 enum machine_mode mode;
1442 /* Regs that are set more than once are not allowed to match
1443 or be matched. I'm no longer sure why not. */
1444 /* Perhaps testing m->consec_sets would be more appropriate here? */
1446 for (m = movables; m; m = m->next)
1447 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1449 register struct movable *m1;
1450 int regno = m->regno;
1452 bzero (matched_regs, nregs);
1453 matched_regs[regno] = 1;
1455 /* We want later insns to match the first one. Don't make the first
1456 one match any later ones. So start this loop at m->next. */
1457 for (m1 = m->next; m1; m1 = m1->next)
1458 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1459 /* A reg used outside the loop mustn't be eliminated. */
1461 /* A reg used for zero-extending mustn't be eliminated. */
1463 && (matched_regs[m1->regno]
1466 /* Can combine regs with different modes loaded from the
1467 same constant only if the modes are the same or
1468 if both are integer modes with M wider or the same
1469 width as M1. The check for integer is redundant, but
1470 safe, since the only case of differing destination
1471 modes with equal sources is when both sources are
1472 VOIDmode, i.e., CONST_INT. */
1473 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1474 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1475 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1476 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1477 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1478 /* See if the source of M1 says it matches M. */
1479 && ((GET_CODE (m1->set_src) == REG
1480 && matched_regs[REGNO (m1->set_src)])
1481 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1483 && ((m->dependencies == m1->dependencies)
1484 || rtx_equal_p (m->dependencies, m1->dependencies)))
1486 m->lifetime += m1->lifetime;
1487 m->savings += m1->savings;
1490 matched_regs[m1->regno] = 1;
1494 /* Now combine the regs used for zero-extension.
1495 This can be done for those not marked `global'
1496 provided their lives don't overlap. */
1498 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1499 mode = GET_MODE_WIDER_MODE (mode))
1501 register struct movable *m0 = 0;
1503 /* Combine all the registers for extension from mode MODE.
1504 Don't combine any that are used outside this loop. */
1505 for (m = movables; m; m = m->next)
1506 if (m->partial && ! m->global
1507 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1509 register struct movable *m1;
1510 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1511 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1515 /* First one: don't check for overlap, just record it. */
1520 /* Make sure they extend to the same mode.
1521 (Almost always true.) */
1522 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1525 /* We already have one: check for overlap with those
1526 already combined together. */
1527 for (m1 = movables; m1 != m; m1 = m1->next)
1528 if (m1 == m0 || (m1->partial && m1->match == m0))
1529 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1530 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1533 /* No overlap: we can combine this with the others. */
1534 m0->lifetime += m->lifetime;
1535 m0->savings += m->savings;
1544 /* Return 1 if regs X and Y will become the same if moved. */
1547 regs_match_p (x, y, movables)
1549 struct movable *movables;
1553 struct movable *mx, *my;
1555 for (mx = movables; mx; mx = mx->next)
1556 if (mx->regno == xn)
1559 for (my = movables; my; my = my->next)
1560 if (my->regno == yn)
1564 && ((mx->match == my->match && mx->match != 0)
1566 || mx == my->match));
1569 /* Return 1 if X and Y are identical-looking rtx's.
1570 This is the Lisp function EQUAL for rtx arguments.
1572 If two registers are matching movables or a movable register and an
1573 equivalent constant, consider them equal. */
1576 rtx_equal_for_loop_p (x, y, movables)
1578 struct movable *movables;
1582 register struct movable *m;
1583 register enum rtx_code code;
1588 if (x == 0 || y == 0)
1591 code = GET_CODE (x);
1593 /* If we have a register and a constant, they may sometimes be
1595 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1598 for (m = movables; m; m = m->next)
1599 if (m->move_insn && m->regno == REGNO (x)
1600 && rtx_equal_p (m->set_src, y))
1603 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1606 for (m = movables; m; m = m->next)
1607 if (m->move_insn && m->regno == REGNO (y)
1608 && rtx_equal_p (m->set_src, x))
1612 /* Otherwise, rtx's of different codes cannot be equal. */
1613 if (code != GET_CODE (y))
1616 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1617 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1619 if (GET_MODE (x) != GET_MODE (y))
1622 /* These three types of rtx's can be compared nonrecursively. */
1624 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1626 if (code == LABEL_REF)
1627 return XEXP (x, 0) == XEXP (y, 0);
1628 if (code == SYMBOL_REF)
1629 return XSTR (x, 0) == XSTR (y, 0);
1631 /* Compare the elements. If any pair of corresponding elements
1632 fail to match, return 0 for the whole things. */
1634 fmt = GET_RTX_FORMAT (code);
1635 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1640 if (XWINT (x, i) != XWINT (y, i))
1645 if (XINT (x, i) != XINT (y, i))
1650 /* Two vectors must have the same length. */
1651 if (XVECLEN (x, i) != XVECLEN (y, i))
1654 /* And the corresponding elements must match. */
1655 for (j = 0; j < XVECLEN (x, i); j++)
1656 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1661 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1666 if (strcmp (XSTR (x, i), XSTR (y, i)))
1671 /* These are just backpointers, so they don't matter. */
1677 /* It is believed that rtx's at this level will never
1678 contain anything but integers and other rtx's,
1679 except for within LABEL_REFs and SYMBOL_REFs. */
1687 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1688 insns in INSNS which use thet reference. */
1691 add_label_notes (x, insns)
1695 enum rtx_code code = GET_CODE (x);
1700 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1702 /* This code used to ignore labels that referred to dispatch tables to
1703 avoid flow generating (slighly) worse code.
1705 We no longer ignore such label references (see LABEL_REF handling in
1706 mark_jump_label for additional information). */
1707 for (insn = insns; insn; insn = NEXT_INSN (insn))
1708 if (reg_mentioned_p (XEXP (x, 0), insn))
1709 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1713 fmt = GET_RTX_FORMAT (code);
1714 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1717 add_label_notes (XEXP (x, i), insns);
1718 else if (fmt[i] == 'E')
1719 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1720 add_label_notes (XVECEXP (x, i, j), insns);
1724 /* Scan MOVABLES, and move the insns that deserve to be moved.
1725 If two matching movables are combined, replace one reg with the
1726 other throughout. */
1729 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1730 struct movable *movables;
1738 register struct movable *m;
1740 /* Map of pseudo-register replacements to handle combining
1741 when we move several insns that load the same value
1742 into different pseudo-registers. */
1743 rtx *reg_map = (rtx *) alloca (nregs * sizeof (rtx));
1744 char *already_moved = (char *) alloca (nregs);
1746 bzero (already_moved, nregs);
1747 bzero ((char *) reg_map, nregs * sizeof (rtx));
1751 for (m = movables; m; m = m->next)
1753 /* Describe this movable insn. */
1755 if (loop_dump_stream)
1757 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1758 INSN_UID (m->insn), m->regno, m->lifetime);
1760 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1762 fprintf (loop_dump_stream, "cond ");
1764 fprintf (loop_dump_stream, "force ");
1766 fprintf (loop_dump_stream, "global ");
1768 fprintf (loop_dump_stream, "done ");
1770 fprintf (loop_dump_stream, "move-insn ");
1772 fprintf (loop_dump_stream, "matches %d ",
1773 INSN_UID (m->match->insn));
1775 fprintf (loop_dump_stream, "forces %d ",
1776 INSN_UID (m->forces->insn));
1779 /* Count movables. Value used in heuristics in strength_reduce. */
1782 /* Ignore the insn if it's already done (it matched something else).
1783 Otherwise, see if it is now safe to move. */
1787 || (1 == invariant_p (m->set_src)
1788 && (m->dependencies == 0
1789 || 1 == invariant_p (m->dependencies))
1791 || 1 == consec_sets_invariant_p (m->set_dest,
1794 && (! m->forces || m->forces->done))
1798 int savings = m->savings;
1800 /* We have an insn that is safe to move.
1801 Compute its desirability. */
1806 if (loop_dump_stream)
1807 fprintf (loop_dump_stream, "savings %d ", savings);
1809 if (moved_once[regno] && loop_dump_stream)
1810 fprintf (loop_dump_stream, "halved since already moved ");
1812 /* An insn MUST be moved if we already moved something else
1813 which is safe only if this one is moved too: that is,
1814 if already_moved[REGNO] is nonzero. */
1816 /* An insn is desirable to move if the new lifetime of the
1817 register is no more than THRESHOLD times the old lifetime.
1818 If it's not desirable, it means the loop is so big
1819 that moving won't speed things up much,
1820 and it is liable to make register usage worse. */
1822 /* It is also desirable to move if it can be moved at no
1823 extra cost because something else was already moved. */
1825 if (already_moved[regno]
1826 || flag_move_all_movables
1827 || (threshold * savings * m->lifetime) >=
1828 (moved_once[regno] ? insn_count * 2 : insn_count)
1829 || (m->forces && m->forces->done
1830 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1833 register struct movable *m1;
1836 /* Now move the insns that set the reg. */
1838 if (m->partial && m->match)
1842 /* Find the end of this chain of matching regs.
1843 Thus, we load each reg in the chain from that one reg.
1844 And that reg is loaded with 0 directly,
1845 since it has ->match == 0. */
1846 for (m1 = m; m1->match; m1 = m1->match);
1847 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1848 SET_DEST (PATTERN (m1->insn)));
1849 i1 = emit_insn_before (newpat, loop_start);
1851 /* Mark the moved, invariant reg as being allowed to
1852 share a hard reg with the other matching invariant. */
1853 REG_NOTES (i1) = REG_NOTES (m->insn);
1854 r1 = SET_DEST (PATTERN (m->insn));
1855 r2 = SET_DEST (PATTERN (m1->insn));
1857 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1858 gen_rtx_EXPR_LIST (VOIDmode, r2,
1860 delete_insn (m->insn);
1865 if (loop_dump_stream)
1866 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1868 /* If we are to re-generate the item being moved with a
1869 new move insn, first delete what we have and then emit
1870 the move insn before the loop. */
1871 else if (m->move_insn)
1875 for (count = m->consec; count >= 0; count--)
1877 /* If this is the first insn of a library call sequence,
1879 if (GET_CODE (p) != NOTE
1880 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1883 /* If this is the last insn of a libcall sequence, then
1884 delete every insn in the sequence except the last.
1885 The last insn is handled in the normal manner. */
1886 if (GET_CODE (p) != NOTE
1887 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1889 temp = XEXP (temp, 0);
1891 temp = delete_insn (temp);
1895 p = delete_insn (p);
1897 /* simplify_giv_expr expects that it can walk the insns
1898 at m->insn forwards and see this old sequence we are
1899 tossing here. delete_insn does preserve the next
1900 pointers, but when we skip over a NOTE we must fix
1901 it up. Otherwise that code walks into the non-deleted
1903 while (p && GET_CODE (p) == NOTE)
1904 p = NEXT_INSN (temp) = NEXT_INSN (p);
1908 emit_move_insn (m->set_dest, m->set_src);
1909 temp = get_insns ();
1912 add_label_notes (m->set_src, temp);
1914 i1 = emit_insns_before (temp, loop_start);
1915 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1917 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1918 m->set_src, REG_NOTES (i1));
1920 if (loop_dump_stream)
1921 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1923 /* The more regs we move, the less we like moving them. */
1928 for (count = m->consec; count >= 0; count--)
1932 /* If first insn of libcall sequence, skip to end. */
1933 /* Do this at start of loop, since p is guaranteed to
1935 if (GET_CODE (p) != NOTE
1936 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1939 /* If last insn of libcall sequence, move all
1940 insns except the last before the loop. The last
1941 insn is handled in the normal manner. */
1942 if (GET_CODE (p) != NOTE
1943 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1947 rtx fn_address_insn = 0;
1950 for (temp = XEXP (temp, 0); temp != p;
1951 temp = NEXT_INSN (temp))
1957 if (GET_CODE (temp) == NOTE)
1960 body = PATTERN (temp);
1962 /* Find the next insn after TEMP,
1963 not counting USE or NOTE insns. */
1964 for (next = NEXT_INSN (temp); next != p;
1965 next = NEXT_INSN (next))
1966 if (! (GET_CODE (next) == INSN
1967 && GET_CODE (PATTERN (next)) == USE)
1968 && GET_CODE (next) != NOTE)
1971 /* If that is the call, this may be the insn
1972 that loads the function address.
1974 Extract the function address from the insn
1975 that loads it into a register.
1976 If this insn was cse'd, we get incorrect code.
1978 So emit a new move insn that copies the
1979 function address into the register that the
1980 call insn will use. flow.c will delete any
1981 redundant stores that we have created. */
1982 if (GET_CODE (next) == CALL_INSN
1983 && GET_CODE (body) == SET
1984 && GET_CODE (SET_DEST (body)) == REG
1985 && (n = find_reg_note (temp, REG_EQUAL,
1988 fn_reg = SET_SRC (body);
1989 if (GET_CODE (fn_reg) != REG)
1990 fn_reg = SET_DEST (body);
1991 fn_address = XEXP (n, 0);
1992 fn_address_insn = temp;
1994 /* We have the call insn.
1995 If it uses the register we suspect it might,
1996 load it with the correct address directly. */
1997 if (GET_CODE (temp) == CALL_INSN
1999 && reg_referenced_p (fn_reg, body))
2000 emit_insn_after (gen_move_insn (fn_reg,
2004 if (GET_CODE (temp) == CALL_INSN)
2006 i1 = emit_call_insn_before (body, loop_start);
2007 /* Because the USAGE information potentially
2008 contains objects other than hard registers
2009 we need to copy it. */
2010 if (CALL_INSN_FUNCTION_USAGE (temp))
2011 CALL_INSN_FUNCTION_USAGE (i1)
2012 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2015 i1 = emit_insn_before (body, loop_start);
2018 if (temp == fn_address_insn)
2019 fn_address_insn = i1;
2020 REG_NOTES (i1) = REG_NOTES (temp);
2026 if (m->savemode != VOIDmode)
2028 /* P sets REG to zero; but we should clear only
2029 the bits that are not covered by the mode
2031 rtx reg = m->set_dest;
2037 (GET_MODE (reg), and_optab, reg,
2038 GEN_INT ((((HOST_WIDE_INT) 1
2039 << GET_MODE_BITSIZE (m->savemode)))
2041 reg, 1, OPTAB_LIB_WIDEN);
2045 emit_move_insn (reg, tem);
2046 sequence = gen_sequence ();
2048 i1 = emit_insn_before (sequence, loop_start);
2050 else if (GET_CODE (p) == CALL_INSN)
2052 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2053 /* Because the USAGE information potentially
2054 contains objects other than hard registers
2055 we need to copy it. */
2056 if (CALL_INSN_FUNCTION_USAGE (p))
2057 CALL_INSN_FUNCTION_USAGE (i1)
2058 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2060 else if (count == m->consec && m->move_insn_first)
2062 /* The SET_SRC might not be invariant, so we must
2063 use the REG_EQUAL note. */
2065 emit_move_insn (m->set_dest, m->set_src);
2066 temp = get_insns ();
2069 add_label_notes (m->set_src, temp);
2071 i1 = emit_insns_before (temp, loop_start);
2072 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2074 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2076 m->set_src, REG_NOTES (i1));
2079 i1 = emit_insn_before (PATTERN (p), loop_start);
2081 if (REG_NOTES (i1) == 0)
2083 REG_NOTES (i1) = REG_NOTES (p);
2085 /* If there is a REG_EQUAL note present whose value
2086 is not loop invariant, then delete it, since it
2087 may cause problems with later optimization passes.
2088 It is possible for cse to create such notes
2089 like this as a result of record_jump_cond. */
2091 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2092 && ! invariant_p (XEXP (temp, 0)))
2093 remove_note (i1, temp);
2099 if (loop_dump_stream)
2100 fprintf (loop_dump_stream, " moved to %d",
2103 /* If library call, now fix the REG_NOTES that contain
2104 insn pointers, namely REG_LIBCALL on FIRST
2105 and REG_RETVAL on I1. */
2106 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2108 XEXP (temp, 0) = first;
2109 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2110 XEXP (temp, 0) = i1;
2117 /* simplify_giv_expr expects that it can walk the insns
2118 at m->insn forwards and see this old sequence we are
2119 tossing here. delete_insn does preserve the next
2120 pointers, but when we skip over a NOTE we must fix
2121 it up. Otherwise that code walks into the non-deleted
2123 while (p && GET_CODE (p) == NOTE)
2124 p = NEXT_INSN (temp) = NEXT_INSN (p);
2127 /* The more regs we move, the less we like moving them. */
2131 /* Any other movable that loads the same register
2133 already_moved[regno] = 1;
2135 /* This reg has been moved out of one loop. */
2136 moved_once[regno] = 1;
2138 /* The reg set here is now invariant. */
2140 VARRAY_INT (set_in_loop, regno) = 0;
2144 /* Change the length-of-life info for the register
2145 to say it lives at least the full length of this loop.
2146 This will help guide optimizations in outer loops. */
2148 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2149 /* This is the old insn before all the moved insns.
2150 We can't use the moved insn because it is out of range
2151 in uid_luid. Only the old insns have luids. */
2152 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2153 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2154 REGNO_LAST_UID (regno) = INSN_UID (end);
2156 /* Combine with this moved insn any other matching movables. */
2159 for (m1 = movables; m1; m1 = m1->next)
2164 /* Schedule the reg loaded by M1
2165 for replacement so that shares the reg of M.
2166 If the modes differ (only possible in restricted
2167 circumstances, make a SUBREG. */
2168 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2169 reg_map[m1->regno] = m->set_dest;
2172 = gen_lowpart_common (GET_MODE (m1->set_dest),
2175 /* Get rid of the matching insn
2176 and prevent further processing of it. */
2179 /* if library call, delete all insn except last, which
2181 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2184 for (temp = XEXP (temp, 0); temp != m1->insn;
2185 temp = NEXT_INSN (temp))
2188 delete_insn (m1->insn);
2190 /* Any other movable that loads the same register
2192 already_moved[m1->regno] = 1;
2194 /* The reg merged here is now invariant,
2195 if the reg it matches is invariant. */
2197 VARRAY_INT (set_in_loop, m1->regno) = 0;
2200 else if (loop_dump_stream)
2201 fprintf (loop_dump_stream, "not desirable");
2203 else if (loop_dump_stream && !m->match)
2204 fprintf (loop_dump_stream, "not safe");
2206 if (loop_dump_stream)
2207 fprintf (loop_dump_stream, "\n");
2211 new_start = loop_start;
2213 /* Go through all the instructions in the loop, making
2214 all the register substitutions scheduled in REG_MAP. */
2215 for (p = new_start; p != end; p = NEXT_INSN (p))
2216 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2217 || GET_CODE (p) == CALL_INSN)
2219 replace_regs (PATTERN (p), reg_map, nregs, 0);
2220 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2226 /* Scan X and replace the address of any MEM in it with ADDR.
2227 REG is the address that MEM should have before the replacement. */
2230 replace_call_address (x, reg, addr)
2233 register enum rtx_code code;
2239 code = GET_CODE (x);
2253 /* Short cut for very common case. */
2254 replace_call_address (XEXP (x, 1), reg, addr);
2258 /* Short cut for very common case. */
2259 replace_call_address (XEXP (x, 0), reg, addr);
2263 /* If this MEM uses a reg other than the one we expected,
2264 something is wrong. */
2265 if (XEXP (x, 0) != reg)
2274 fmt = GET_RTX_FORMAT (code);
2275 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2278 replace_call_address (XEXP (x, i), reg, addr);
2282 for (j = 0; j < XVECLEN (x, i); j++)
2283 replace_call_address (XVECEXP (x, i, j), reg, addr);
2289 /* Return the number of memory refs to addresses that vary
2293 count_nonfixed_reads (x)
2296 register enum rtx_code code;
2304 code = GET_CODE (x);
2318 return ((invariant_p (XEXP (x, 0)) != 1)
2319 + count_nonfixed_reads (XEXP (x, 0)));
2326 fmt = GET_RTX_FORMAT (code);
2327 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2330 value += count_nonfixed_reads (XEXP (x, i));
2334 for (j = 0; j < XVECLEN (x, i); j++)
2335 value += count_nonfixed_reads (XVECEXP (x, i, j));
2343 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2344 Replace it with an instruction to load just the low bytes
2345 if the machine supports such an instruction,
2346 and insert above LOOP_START an instruction to clear the register. */
2349 constant_high_bytes (p, loop_start)
2353 register int insn_code_number;
2355 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2356 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2358 new = gen_rtx_SET (VOIDmode,
2359 gen_rtx_STRICT_LOW_PART (VOIDmode,
2360 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2361 SET_DEST (PATTERN (p)),
2363 XEXP (SET_SRC (PATTERN (p)), 0));
2364 insn_code_number = recog (new, p);
2366 if (insn_code_number)
2370 /* Clear destination register before the loop. */
2371 emit_insn_before (gen_rtx_SET (VOIDmode, SET_DEST (PATTERN (p)),
2375 /* Inside the loop, just load the low part. */
2381 /* Scan a loop setting the variables `unknown_address_altered',
2382 `num_mem_sets', `loop_continue', `loops_enclosed', `loop_has_call',
2383 `loop_has_volatile', and `loop_has_tablejump'.
2384 Also, fill in the array `loop_mems' and the list `loop_store_mems'. */
2387 prescan_loop (start, end)
2390 register int level = 1;
2392 int loop_has_multiple_exit_targets = 0;
2393 /* The label after END. Jumping here is just like falling off the
2394 end of the loop. We use next_nonnote_insn instead of next_label
2395 as a hedge against the (pathological) case where some actual insn
2396 might end up between the two. */
2397 rtx exit_target = next_nonnote_insn (end);
2398 if (exit_target == NULL_RTX || GET_CODE (exit_target) != CODE_LABEL)
2399 loop_has_multiple_exit_targets = 1;
2401 unknown_address_altered = 0;
2403 loop_has_volatile = 0;
2404 loop_has_tablejump = 0;
2405 loop_store_mems = NULL_RTX;
2412 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2413 insn = NEXT_INSN (insn))
2415 if (GET_CODE (insn) == NOTE)
2417 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2420 /* Count number of loops contained in this one. */
2423 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2432 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2435 loop_continue = insn;
2438 else if (GET_CODE (insn) == CALL_INSN)
2440 if (! CONST_CALL_P (insn))
2441 unknown_address_altered = 1;
2444 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2446 rtx label1 = NULL_RTX;
2447 rtx label2 = NULL_RTX;
2449 if (volatile_refs_p (PATTERN (insn)))
2450 loop_has_volatile = 1;
2452 if (GET_CODE (insn) == JUMP_INSN
2453 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2454 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2455 loop_has_tablejump = 1;
2457 note_stores (PATTERN (insn), note_addr_stored);
2459 if (! loop_has_multiple_exit_targets
2460 && GET_CODE (insn) == JUMP_INSN
2461 && GET_CODE (PATTERN (insn)) == SET
2462 && SET_DEST (PATTERN (insn)) == pc_rtx)
2464 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2466 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2467 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2471 label1 = SET_SRC (PATTERN (insn));
2475 if (label1 && label1 != pc_rtx)
2477 if (GET_CODE (label1) != LABEL_REF)
2479 /* Something tricky. */
2480 loop_has_multiple_exit_targets = 1;
2483 else if (XEXP (label1, 0) != exit_target
2484 && LABEL_OUTSIDE_LOOP_P (label1))
2486 /* A jump outside the current loop. */
2487 loop_has_multiple_exit_targets = 1;
2497 else if (GET_CODE (insn) == RETURN)
2498 loop_has_multiple_exit_targets = 1;
2501 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2502 if (/* We can't tell what MEMs are aliased by what. */
2503 !unknown_address_altered
2504 /* An exception thrown by a called function might land us
2507 /* We don't want loads for MEMs moved to a location before the
2508 one at which their stack memory becomes allocated. (Note
2509 that this is not a problem for malloc, etc., since those
2510 require actual function calls. */
2511 && !current_function_calls_alloca
2512 /* There are ways to leave the loop other than falling off the
2514 && !loop_has_multiple_exit_targets)
2515 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2516 insn = NEXT_INSN (insn))
2517 for_each_rtx (&insn, insert_loop_mem, 0);
2520 /* LOOP_NUMBER_CONT_DOMINATOR is now the last label between the loop start
2521 and the continue note that is a the destination of a (cond)jump after
2522 the continue note. If there is any (cond)jump between the loop start
2523 and what we have so far as LOOP_NUMBER_CONT_DOMINATOR that has a
2524 target between LOOP_DOMINATOR and the continue note, move
2525 LOOP_NUMBER_CONT_DOMINATOR forward to that label; if a jump's
2526 destination cannot be determined, clear LOOP_NUMBER_CONT_DOMINATOR. */
2529 verify_dominator (loop_number)
2534 if (! loop_number_cont_dominator[loop_number])
2535 /* This can happen for an empty loop, e.g. in
2536 gcc.c-torture/compile/920410-2.c */
2538 if (loop_number_cont_dominator[loop_number] == const0_rtx)
2540 loop_number_cont_dominator[loop_number] = 0;
2543 for (insn = loop_number_loop_starts[loop_number];
2544 insn != loop_number_cont_dominator[loop_number];
2545 insn = NEXT_INSN (insn))
2547 if (GET_CODE (insn) == JUMP_INSN
2548 && GET_CODE (PATTERN (insn)) != RETURN)
2550 rtx label = JUMP_LABEL (insn);
2551 int label_luid = INSN_LUID (label);
2553 if (! condjump_p (insn)
2554 && ! condjump_in_parallel_p (insn))
2556 loop_number_cont_dominator[loop_number] = NULL_RTX;
2559 if (label_luid < INSN_LUID (loop_number_loop_cont[loop_number])
2561 > INSN_LUID (loop_number_cont_dominator[loop_number])))
2562 loop_number_cont_dominator[loop_number] = label;
2567 /* Scan the function looking for loops. Record the start and end of each loop.
2568 Also mark as invalid loops any loops that contain a setjmp or are branched
2569 to from outside the loop. */
2572 find_and_verify_loops (f)
2576 int current_loop = -1;
2580 compute_luids (f, NULL_RTX, 0);
2582 /* If there are jumps to undefined labels,
2583 treat them as jumps out of any/all loops.
2584 This also avoids writing past end of tables when there are no loops. */
2585 uid_loop_num[0] = -1;
2587 /* Find boundaries of loops, mark which loops are contained within
2588 loops, and invalidate loops that have setjmp. */
2590 for (insn = f; insn; insn = NEXT_INSN (insn))
2592 if (GET_CODE (insn) == NOTE)
2593 switch (NOTE_LINE_NUMBER (insn))
2595 case NOTE_INSN_LOOP_BEG:
2596 loop_number_loop_starts[++next_loop] = insn;
2597 loop_number_loop_ends[next_loop] = 0;
2598 loop_number_loop_cont[next_loop] = 0;
2599 loop_number_cont_dominator[next_loop] = 0;
2600 loop_outer_loop[next_loop] = current_loop;
2601 loop_invalid[next_loop] = 0;
2602 loop_number_exit_labels[next_loop] = 0;
2603 loop_number_exit_count[next_loop] = 0;
2604 current_loop = next_loop;
2607 case NOTE_INSN_SETJMP:
2608 /* In this case, we must invalidate our current loop and any
2610 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2612 loop_invalid[loop] = 1;
2613 if (loop_dump_stream)
2614 fprintf (loop_dump_stream,
2615 "\nLoop at %d ignored due to setjmp.\n",
2616 INSN_UID (loop_number_loop_starts[loop]));
2620 case NOTE_INSN_LOOP_CONT:
2621 loop_number_loop_cont[current_loop] = insn;
2623 case NOTE_INSN_LOOP_END:
2624 if (current_loop == -1)
2627 loop_number_loop_ends[current_loop] = insn;
2628 verify_dominator (current_loop);
2629 current_loop = loop_outer_loop[current_loop];
2635 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2636 and NOTE_INSN_LOOP_END notes, update loop_number_loop_dominator. */
2637 else if (GET_CODE (insn) == JUMP_INSN
2638 && GET_CODE (PATTERN (insn)) != RETURN
2639 && current_loop >= 0)
2642 rtx label = JUMP_LABEL (insn);
2644 if (! condjump_p (insn) && ! condjump_in_parallel_p (insn))
2647 this_loop = current_loop;
2650 /* First see if we care about this loop. */
2651 if (loop_number_loop_cont[this_loop]
2652 && loop_number_cont_dominator[this_loop] != const0_rtx)
2654 /* If the jump destination is not known, invalidate
2655 loop_number_const_dominator. */
2657 loop_number_cont_dominator[this_loop] = const0_rtx;
2659 /* Check if the destination is between loop start and
2661 if ((INSN_LUID (label)
2662 < INSN_LUID (loop_number_loop_cont[this_loop]))
2663 && (INSN_LUID (label)
2664 > INSN_LUID (loop_number_loop_starts[this_loop]))
2665 /* And if there is no later destination already
2667 && (! loop_number_cont_dominator[this_loop]
2668 || (INSN_LUID (label)
2669 > INSN_LUID (loop_number_cont_dominator
2671 loop_number_cont_dominator[this_loop] = label;
2673 this_loop = loop_outer_loop[this_loop];
2675 while (this_loop >= 0);
2678 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2679 enclosing loop, but this doesn't matter. */
2680 uid_loop_num[INSN_UID (insn)] = current_loop;
2683 /* Any loop containing a label used in an initializer must be invalidated,
2684 because it can be jumped into from anywhere. */
2686 for (label = forced_labels; label; label = XEXP (label, 1))
2690 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2692 loop_num = loop_outer_loop[loop_num])
2693 loop_invalid[loop_num] = 1;
2696 /* Any loop containing a label used for an exception handler must be
2697 invalidated, because it can be jumped into from anywhere. */
2699 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2703 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2705 loop_num = loop_outer_loop[loop_num])
2706 loop_invalid[loop_num] = 1;
2709 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2710 loop that it is not contained within, that loop is marked invalid.
2711 If any INSN or CALL_INSN uses a label's address, then the loop containing
2712 that label is marked invalid, because it could be jumped into from
2715 Also look for blocks of code ending in an unconditional branch that
2716 exits the loop. If such a block is surrounded by a conditional
2717 branch around the block, move the block elsewhere (see below) and
2718 invert the jump to point to the code block. This may eliminate a
2719 label in our loop and will simplify processing by both us and a
2720 possible second cse pass. */
2722 for (insn = f; insn; insn = NEXT_INSN (insn))
2723 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2725 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2727 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2729 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2734 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2736 loop_num = loop_outer_loop[loop_num])
2737 loop_invalid[loop_num] = 1;
2741 if (GET_CODE (insn) != JUMP_INSN)
2744 mark_loop_jump (PATTERN (insn), this_loop_num);
2746 /* See if this is an unconditional branch outside the loop. */
2747 if (this_loop_num != -1
2748 && (GET_CODE (PATTERN (insn)) == RETURN
2749 || (simplejump_p (insn)
2750 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2752 && get_max_uid () < max_uid_for_loop)
2755 rtx our_next = next_real_insn (insn);
2757 int outer_loop = -1;
2759 /* Go backwards until we reach the start of the loop, a label,
2761 for (p = PREV_INSN (insn);
2762 GET_CODE (p) != CODE_LABEL
2763 && ! (GET_CODE (p) == NOTE
2764 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2765 && GET_CODE (p) != JUMP_INSN;
2769 /* Check for the case where we have a jump to an inner nested
2770 loop, and do not perform the optimization in that case. */
2772 if (JUMP_LABEL (insn))
2774 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2775 if (dest_loop != -1)
2777 for (outer_loop = dest_loop; outer_loop != -1;
2778 outer_loop = loop_outer_loop[outer_loop])
2779 if (outer_loop == this_loop_num)
2784 /* Make sure that the target of P is within the current loop. */
2786 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2787 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2788 outer_loop = this_loop_num;
2790 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2791 we have a block of code to try to move.
2793 We look backward and then forward from the target of INSN
2794 to find a BARRIER at the same loop depth as the target.
2795 If we find such a BARRIER, we make a new label for the start
2796 of the block, invert the jump in P and point it to that label,
2797 and move the block of code to the spot we found. */
2799 if (outer_loop == -1
2800 && GET_CODE (p) == JUMP_INSN
2801 && JUMP_LABEL (p) != 0
2802 /* Just ignore jumps to labels that were never emitted.
2803 These always indicate compilation errors. */
2804 && INSN_UID (JUMP_LABEL (p)) != 0
2806 && ! simplejump_p (p)
2807 && next_real_insn (JUMP_LABEL (p)) == our_next)
2810 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2811 int target_loop_num = uid_loop_num[INSN_UID (target)];
2814 for (loc = target; loc; loc = PREV_INSN (loc))
2815 if (GET_CODE (loc) == BARRIER
2816 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2820 for (loc = target; loc; loc = NEXT_INSN (loc))
2821 if (GET_CODE (loc) == BARRIER
2822 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2827 rtx cond_label = JUMP_LABEL (p);
2828 rtx new_label = get_label_after (p);
2830 /* Ensure our label doesn't go away. */
2831 LABEL_NUSES (cond_label)++;
2833 /* Verify that uid_loop_num is large enough and that
2835 if (invert_jump (p, new_label))
2839 /* If no suitable BARRIER was found, create a suitable
2840 one before TARGET. Since TARGET is a fall through
2841 path, we'll need to insert an jump around our block
2842 and a add a BARRIER before TARGET.
2844 This creates an extra unconditional jump outside
2845 the loop. However, the benefits of removing rarely
2846 executed instructions from inside the loop usually
2847 outweighs the cost of the extra unconditional jump
2848 outside the loop. */
2853 temp = gen_jump (JUMP_LABEL (insn));
2854 temp = emit_jump_insn_before (temp, target);
2855 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2856 LABEL_NUSES (JUMP_LABEL (insn))++;
2857 loc = emit_barrier_before (target);
2860 /* Include the BARRIER after INSN and copy the
2862 new_label = squeeze_notes (new_label, NEXT_INSN (insn));
2863 reorder_insns (new_label, NEXT_INSN (insn), loc);
2865 /* All those insns are now in TARGET_LOOP_NUM. */
2866 for (q = new_label; q != NEXT_INSN (NEXT_INSN (insn));
2868 uid_loop_num[INSN_UID (q)] = target_loop_num;
2870 /* The label jumped to by INSN is no longer a loop exit.
2871 Unless INSN does not have a label (e.g., it is a
2872 RETURN insn), search loop_number_exit_labels to find
2873 its label_ref, and remove it. Also turn off
2874 LABEL_OUTSIDE_LOOP_P bit. */
2875 if (JUMP_LABEL (insn))
2880 r = loop_number_exit_labels[this_loop_num];
2881 r; q = r, r = LABEL_NEXTREF (r))
2882 if (XEXP (r, 0) == JUMP_LABEL (insn))
2884 LABEL_OUTSIDE_LOOP_P (r) = 0;
2886 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2888 loop_number_exit_labels[this_loop_num]
2889 = LABEL_NEXTREF (r);
2893 for (loop_num = this_loop_num;
2894 loop_num != -1 && loop_num != target_loop_num;
2895 loop_num = loop_outer_loop[loop_num])
2896 loop_number_exit_count[loop_num]--;
2898 /* If we didn't find it, then something is wrong. */
2903 /* P is now a jump outside the loop, so it must be put
2904 in loop_number_exit_labels, and marked as such.
2905 The easiest way to do this is to just call
2906 mark_loop_jump again for P. */
2907 mark_loop_jump (PATTERN (p), this_loop_num);
2909 /* If INSN now jumps to the insn after it,
2911 if (JUMP_LABEL (insn) != 0
2912 && (next_real_insn (JUMP_LABEL (insn))
2913 == next_real_insn (insn)))
2917 /* Continue the loop after where the conditional
2918 branch used to jump, since the only branch insn
2919 in the block (if it still remains) is an inter-loop
2920 branch and hence needs no processing. */
2921 insn = NEXT_INSN (cond_label);
2923 if (--LABEL_NUSES (cond_label) == 0)
2924 delete_insn (cond_label);
2926 /* This loop will be continued with NEXT_INSN (insn). */
2927 insn = PREV_INSN (insn);
2934 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2935 loops it is contained in, mark the target loop invalid.
2937 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2940 mark_loop_jump (x, loop_num)
2948 switch (GET_CODE (x))
2961 /* There could be a label reference in here. */
2962 mark_loop_jump (XEXP (x, 0), loop_num);
2968 mark_loop_jump (XEXP (x, 0), loop_num);
2969 mark_loop_jump (XEXP (x, 1), loop_num);
2974 mark_loop_jump (XEXP (x, 0), loop_num);
2978 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
2980 /* Link together all labels that branch outside the loop. This
2981 is used by final_[bg]iv_value and the loop unrolling code. Also
2982 mark this LABEL_REF so we know that this branch should predict
2985 /* A check to make sure the label is not in an inner nested loop,
2986 since this does not count as a loop exit. */
2987 if (dest_loop != -1)
2989 for (outer_loop = dest_loop; outer_loop != -1;
2990 outer_loop = loop_outer_loop[outer_loop])
2991 if (outer_loop == loop_num)
2997 if (loop_num != -1 && outer_loop == -1)
2999 LABEL_OUTSIDE_LOOP_P (x) = 1;
3000 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
3001 loop_number_exit_labels[loop_num] = x;
3003 for (outer_loop = loop_num;
3004 outer_loop != -1 && outer_loop != dest_loop;
3005 outer_loop = loop_outer_loop[outer_loop])
3006 loop_number_exit_count[outer_loop]++;
3009 /* If this is inside a loop, but not in the current loop or one enclosed
3010 by it, it invalidates at least one loop. */
3012 if (dest_loop == -1)
3015 /* We must invalidate every nested loop containing the target of this
3016 label, except those that also contain the jump insn. */
3018 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
3020 /* Stop when we reach a loop that also contains the jump insn. */
3021 for (outer_loop = loop_num; outer_loop != -1;
3022 outer_loop = loop_outer_loop[outer_loop])
3023 if (dest_loop == outer_loop)
3026 /* If we get here, we know we need to invalidate a loop. */
3027 if (loop_dump_stream && ! loop_invalid[dest_loop])
3028 fprintf (loop_dump_stream,
3029 "\nLoop at %d ignored due to multiple entry points.\n",
3030 INSN_UID (loop_number_loop_starts[dest_loop]));
3032 loop_invalid[dest_loop] = 1;
3037 /* If this is not setting pc, ignore. */
3038 if (SET_DEST (x) == pc_rtx)
3039 mark_loop_jump (SET_SRC (x), loop_num);
3043 mark_loop_jump (XEXP (x, 1), loop_num);
3044 mark_loop_jump (XEXP (x, 2), loop_num);
3049 for (i = 0; i < XVECLEN (x, 0); i++)
3050 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
3054 for (i = 0; i < XVECLEN (x, 1); i++)
3055 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
3059 /* Treat anything else (such as a symbol_ref)
3060 as a branch out of this loop, but not into any loop. */
3064 #ifdef HAVE_decrement_and_branch_on_count
3065 LABEL_OUTSIDE_LOOP_P (x) = 1;
3066 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
3067 #endif /* HAVE_decrement_and_branch_on_count */
3069 loop_number_exit_labels[loop_num] = x;
3071 for (outer_loop = loop_num; outer_loop != -1;
3072 outer_loop = loop_outer_loop[outer_loop])
3073 loop_number_exit_count[outer_loop]++;
3079 /* Return nonzero if there is a label in the range from
3080 insn INSN to and including the insn whose luid is END
3081 INSN must have an assigned luid (i.e., it must not have
3082 been previously created by loop.c). */
3085 labels_in_range_p (insn, end)
3089 while (insn && INSN_LUID (insn) <= end)
3091 if (GET_CODE (insn) == CODE_LABEL)
3093 insn = NEXT_INSN (insn);
3099 /* Record that a memory reference X is being set. */
3102 note_addr_stored (x, y)
3104 rtx y ATTRIBUTE_UNUSED;
3106 if (x == 0 || GET_CODE (x) != MEM)
3109 /* Count number of memory writes.
3110 This affects heuristics in strength_reduce. */
3113 /* BLKmode MEM means all memory is clobbered. */
3114 if (GET_MODE (x) == BLKmode)
3115 unknown_address_altered = 1;
3117 if (unknown_address_altered)
3120 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3123 /* Return nonzero if the rtx X is invariant over the current loop.
3125 The value is 2 if we refer to something only conditionally invariant.
3127 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3128 Otherwise, a memory ref is invariant if it does not conflict with
3129 anything stored in `loop_store_mems'. */
3136 register enum rtx_code code;
3138 int conditional = 0;
3143 code = GET_CODE (x);
3153 /* A LABEL_REF is normally invariant, however, if we are unrolling
3154 loops, and this label is inside the loop, then it isn't invariant.
3155 This is because each unrolled copy of the loop body will have
3156 a copy of this label. If this was invariant, then an insn loading
3157 the address of this label into a register might get moved outside
3158 the loop, and then each loop body would end up using the same label.
3160 We don't know the loop bounds here though, so just fail for all
3162 if (flag_unroll_loops)
3169 case UNSPEC_VOLATILE:
3173 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3174 since the reg might be set by initialization within the loop. */
3176 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3177 || x == arg_pointer_rtx)
3178 && ! current_function_has_nonlocal_goto)
3182 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3185 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3188 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3191 /* Volatile memory references must be rejected. Do this before
3192 checking for read-only items, so that volatile read-only items
3193 will be rejected also. */
3194 if (MEM_VOLATILE_P (x))
3197 /* Read-only items (such as constants in a constant pool) are
3198 invariant if their address is. */
3199 if (RTX_UNCHANGING_P (x))
3202 /* If we had a subroutine call, any location in memory could have been
3204 if (unknown_address_altered)
3207 /* See if there is any dependence between a store and this load. */
3208 mem_list_entry = loop_store_mems;
3209 while (mem_list_entry)
3211 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3214 mem_list_entry = XEXP (mem_list_entry, 1);
3217 /* It's not invalidated by a store in memory
3218 but we must still verify the address is invariant. */
3222 /* Don't mess with insns declared volatile. */
3223 if (MEM_VOLATILE_P (x))
3231 fmt = GET_RTX_FORMAT (code);
3232 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3236 int tem = invariant_p (XEXP (x, i));
3242 else if (fmt[i] == 'E')
3245 for (j = 0; j < XVECLEN (x, i); j++)
3247 int tem = invariant_p (XVECEXP (x, i, j));
3257 return 1 + conditional;
3261 /* Return nonzero if all the insns in the loop that set REG
3262 are INSN and the immediately following insns,
3263 and if each of those insns sets REG in an invariant way
3264 (not counting uses of REG in them).
3266 The value is 2 if some of these insns are only conditionally invariant.
3268 We assume that INSN itself is the first set of REG
3269 and that its source is invariant. */
3272 consec_sets_invariant_p (reg, n_sets, insn)
3276 register rtx p = insn;
3277 register int regno = REGNO (reg);
3279 /* Number of sets we have to insist on finding after INSN. */
3280 int count = n_sets - 1;
3281 int old = VARRAY_INT (set_in_loop, regno);
3285 /* If N_SETS hit the limit, we can't rely on its value. */
3289 VARRAY_INT (set_in_loop, regno) = 0;
3293 register enum rtx_code code;
3297 code = GET_CODE (p);
3299 /* If library call, skip to end of it. */
3300 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3305 && (set = single_set (p))
3306 && GET_CODE (SET_DEST (set)) == REG
3307 && REGNO (SET_DEST (set)) == regno)
3309 this = invariant_p (SET_SRC (set));
3312 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3314 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3315 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3317 this = (CONSTANT_P (XEXP (temp, 0))
3318 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3319 && invariant_p (XEXP (temp, 0))));
3326 else if (code != NOTE)
3328 VARRAY_INT (set_in_loop, regno) = old;
3333 VARRAY_INT (set_in_loop, regno) = old;
3334 /* If invariant_p ever returned 2, we return 2. */
3335 return 1 + (value & 2);
3339 /* I don't think this condition is sufficient to allow INSN
3340 to be moved, so we no longer test it. */
3342 /* Return 1 if all insns in the basic block of INSN and following INSN
3343 that set REG are invariant according to TABLE. */
3346 all_sets_invariant_p (reg, insn, table)
3350 register rtx p = insn;
3351 register int regno = REGNO (reg);
3355 register enum rtx_code code;
3357 code = GET_CODE (p);
3358 if (code == CODE_LABEL || code == JUMP_INSN)
3360 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3361 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3362 && REGNO (SET_DEST (PATTERN (p))) == regno)
3364 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3371 /* Look at all uses (not sets) of registers in X. For each, if it is
3372 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3373 a different insn, set USAGE[REGNO] to const0_rtx. */
3376 find_single_use_in_loop (insn, x, usage)
3381 enum rtx_code code = GET_CODE (x);
3382 char *fmt = GET_RTX_FORMAT (code);
3386 VARRAY_RTX (usage, REGNO (x))
3387 = (VARRAY_RTX (usage, REGNO (x)) != 0
3388 && VARRAY_RTX (usage, REGNO (x)) != insn)
3389 ? const0_rtx : insn;
3391 else if (code == SET)
3393 /* Don't count SET_DEST if it is a REG; otherwise count things
3394 in SET_DEST because if a register is partially modified, it won't
3395 show up as a potential movable so we don't care how USAGE is set
3397 if (GET_CODE (SET_DEST (x)) != REG)
3398 find_single_use_in_loop (insn, SET_DEST (x), usage);
3399 find_single_use_in_loop (insn, SET_SRC (x), usage);
3402 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3404 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3405 find_single_use_in_loop (insn, XEXP (x, i), usage);
3406 else if (fmt[i] == 'E')
3407 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3408 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3412 /* Count and record any set in X which is contained in INSN. Update
3413 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3416 count_one_set (insn, x, may_not_move, last_set)
3418 varray_type may_not_move;
3421 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3422 /* Don't move a reg that has an explicit clobber.
3423 It's not worth the pain to try to do it correctly. */
3424 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3426 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3428 rtx dest = SET_DEST (x);
3429 while (GET_CODE (dest) == SUBREG
3430 || GET_CODE (dest) == ZERO_EXTRACT
3431 || GET_CODE (dest) == SIGN_EXTRACT
3432 || GET_CODE (dest) == STRICT_LOW_PART)
3433 dest = XEXP (dest, 0);
3434 if (GET_CODE (dest) == REG)
3436 register int regno = REGNO (dest);
3437 /* If this is the first setting of this reg
3438 in current basic block, and it was set before,
3439 it must be set in two basic blocks, so it cannot
3440 be moved out of the loop. */
3441 if (VARRAY_INT (set_in_loop, regno) > 0
3442 && last_set[regno] == 0)
3443 VARRAY_CHAR (may_not_move, regno) = 1;
3444 /* If this is not first setting in current basic block,
3445 see if reg was used in between previous one and this.
3446 If so, neither one can be moved. */
3447 if (last_set[regno] != 0
3448 && reg_used_between_p (dest, last_set[regno], insn))
3449 VARRAY_CHAR (may_not_move, regno) = 1;
3450 if (VARRAY_INT (set_in_loop, regno) < 127)
3451 ++VARRAY_INT (set_in_loop, regno);
3452 last_set[regno] = insn;
3457 /* Increment SET_IN_LOOP at the index of each register
3458 that is modified by an insn between FROM and TO.
3459 If the value of an element of SET_IN_LOOP becomes 127 or more,
3460 stop incrementing it, to avoid overflow.
3462 Store in SINGLE_USAGE[I] the single insn in which register I is
3463 used, if it is only used once. Otherwise, it is set to 0 (for no
3464 uses) or const0_rtx for more than one use. This parameter may be zero,
3465 in which case this processing is not done.
3467 Store in *COUNT_PTR the number of actual instruction
3468 in the loop. We use this to decide what is worth moving out. */
3470 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3471 In that case, it is the insn that last set reg n. */
3474 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3475 register rtx from, to;
3476 varray_type may_not_move;
3477 varray_type single_usage;
3481 register rtx *last_set = (rtx *) alloca (nregs * sizeof (rtx));
3483 register int count = 0;
3485 bzero ((char *) last_set, nregs * sizeof (rtx));
3486 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3488 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3492 /* If requested, record registers that have exactly one use. */
3495 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3497 /* Include uses in REG_EQUAL notes. */
3498 if (REG_NOTES (insn))
3499 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3502 if (GET_CODE (PATTERN (insn)) == SET
3503 || GET_CODE (PATTERN (insn)) == CLOBBER)
3504 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3505 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3508 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3509 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3510 may_not_move, last_set);
3514 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3515 bzero ((char *) last_set, nregs * sizeof (rtx));
3520 /* Given a loop that is bounded by LOOP_START and LOOP_END
3521 and that is entered at SCAN_START,
3522 return 1 if the register set in SET contained in insn INSN is used by
3523 any insn that precedes INSN in cyclic order starting
3524 from the loop entry point.
3526 We don't want to use INSN_LUID here because if we restrict INSN to those
3527 that have a valid INSN_LUID, it means we cannot move an invariant out
3528 from an inner loop past two loops. */
3531 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3532 rtx set, insn, loop_start, scan_start, loop_end;
3534 rtx reg = SET_DEST (set);
3537 /* Scan forward checking for register usage. If we hit INSN, we
3538 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3539 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3541 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3542 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3552 /* A "basic induction variable" or biv is a pseudo reg that is set
3553 (within this loop) only by incrementing or decrementing it. */
3554 /* A "general induction variable" or giv is a pseudo reg whose
3555 value is a linear function of a biv. */
3557 /* Bivs are recognized by `basic_induction_var';
3558 Givs by `general_induction_var'. */
3560 /* Indexed by register number, indicates whether or not register is an
3561 induction variable, and if so what type. */
3563 varray_type reg_iv_type;
3565 /* Indexed by register number, contains pointer to `struct induction'
3566 if register is an induction variable. This holds general info for
3567 all induction variables. */
3569 varray_type reg_iv_info;
3571 /* Indexed by register number, contains pointer to `struct iv_class'
3572 if register is a basic induction variable. This holds info describing
3573 the class (a related group) of induction variables that the biv belongs
3576 struct iv_class **reg_biv_class;
3578 /* The head of a list which links together (via the next field)
3579 every iv class for the current loop. */
3581 struct iv_class *loop_iv_list;
3583 /* Givs made from biv increments are always splittable for loop unrolling.
3584 Since there is no regscan info for them, we have to keep track of them
3586 int first_increment_giv, last_increment_giv;
3588 /* Communication with routines called via `note_stores'. */
3590 static rtx note_insn;
3592 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3594 static rtx addr_placeholder;
3596 /* ??? Unfinished optimizations, and possible future optimizations,
3597 for the strength reduction code. */
3599 /* ??? The interaction of biv elimination, and recognition of 'constant'
3600 bivs, may cause problems. */
3602 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3603 performance problems.
3605 Perhaps don't eliminate things that can be combined with an addressing
3606 mode. Find all givs that have the same biv, mult_val, and add_val;
3607 then for each giv, check to see if its only use dies in a following
3608 memory address. If so, generate a new memory address and check to see
3609 if it is valid. If it is valid, then store the modified memory address,
3610 otherwise, mark the giv as not done so that it will get its own iv. */
3612 /* ??? Could try to optimize branches when it is known that a biv is always
3615 /* ??? When replace a biv in a compare insn, we should replace with closest
3616 giv so that an optimized branch can still be recognized by the combiner,
3617 e.g. the VAX acb insn. */
3619 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3620 was rerun in loop_optimize whenever a register was added or moved.
3621 Also, some of the optimizations could be a little less conservative. */
3623 /* Perform strength reduction and induction variable elimination.
3625 Pseudo registers created during this function will be beyond the last
3626 valid index in several tables including n_times_set and regno_last_uid.
3627 This does not cause a problem here, because the added registers cannot be
3628 givs outside of their loop, and hence will never be reconsidered.
3629 But scan_loop must check regnos to make sure they are in bounds.
3631 SCAN_START is the first instruction in the loop, as the loop would
3632 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3633 the first instruction in the loop, as it is layed out in the
3634 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG. */
3637 strength_reduce (scan_start, end, loop_top, insn_count,
3638 loop_start, loop_end, unroll_p, bct_p)
3645 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3653 /* This is 1 if current insn is not executed at least once for every loop
3655 int not_every_iteration = 0;
3656 /* This is 1 if current insn may be executed more than once for every
3658 int maybe_multiple = 0;
3659 /* Temporary list pointers for traversing loop_iv_list. */
3660 struct iv_class *bl, **backbl;
3661 /* Ratio of extra register life span we can justify
3662 for saving an instruction. More if loop doesn't call subroutines
3663 since in that case saving an insn makes more difference
3664 and more registers are available. */
3665 /* ??? could set this to last value of threshold in move_movables */
3666 int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3667 /* Map of pseudo-register replacements. */
3671 rtx end_insert_before;
3673 int n_extra_increment;
3674 struct loop_info loop_iteration_info;
3675 struct loop_info *loop_info = &loop_iteration_info;
3677 /* If scan_start points to the loop exit test, we have to be wary of
3678 subversive use of gotos inside expression statements. */
3679 if (prev_nonnote_insn (scan_start) != prev_nonnote_insn (loop_start))
3680 maybe_multiple = back_branch_in_range_p (scan_start, loop_start, loop_end);
3682 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3683 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3684 reg_biv_class = (struct iv_class **)
3685 alloca (max_reg_before_loop * sizeof (struct iv_class *));
3686 bzero ((char *) reg_biv_class, (max_reg_before_loop
3687 * sizeof (struct iv_class *)));
3690 addr_placeholder = gen_reg_rtx (Pmode);
3692 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3693 must be put before this insn, so that they will appear in the right
3694 order (i.e. loop order).
3696 If loop_end is the end of the current function, then emit a
3697 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3699 if (NEXT_INSN (loop_end) != 0)
3700 end_insert_before = NEXT_INSN (loop_end);
3702 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3704 /* Scan through loop to find all possible bivs. */
3706 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
3708 p = next_insn_in_loop (p, scan_start, end, loop_top))
3710 if (GET_CODE (p) == INSN
3711 && (set = single_set (p))
3712 && GET_CODE (SET_DEST (set)) == REG)
3714 dest_reg = SET_DEST (set);
3715 if (REGNO (dest_reg) < max_reg_before_loop
3716 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3717 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
3719 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3720 dest_reg, p, &inc_val, &mult_val,
3723 /* It is a possible basic induction variable.
3724 Create and initialize an induction structure for it. */
3727 = (struct induction *) alloca (sizeof (struct induction));
3729 record_biv (v, p, dest_reg, inc_val, mult_val, location,
3730 not_every_iteration, maybe_multiple);
3731 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
3733 else if (REGNO (dest_reg) < max_reg_before_loop)
3734 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
3738 /* Past CODE_LABEL, we get to insns that may be executed multiple
3739 times. The only way we can be sure that they can't is if every
3740 jump insn between here and the end of the loop either
3741 returns, exits the loop, is a jump to a location that is still
3742 behind the label, or is a jump to the loop start. */
3744 if (GET_CODE (p) == CODE_LABEL)
3752 insn = NEXT_INSN (insn);
3753 if (insn == scan_start)
3761 if (insn == scan_start)
3765 if (GET_CODE (insn) == JUMP_INSN
3766 && GET_CODE (PATTERN (insn)) != RETURN
3767 && (! condjump_p (insn)
3768 || (JUMP_LABEL (insn) != 0
3769 && JUMP_LABEL (insn) != scan_start
3770 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
3771 || (INSN_UID (p) < max_uid_for_loop
3772 ? (INSN_LUID (JUMP_LABEL (insn))
3774 : (INSN_UID (insn) >= max_uid_for_loop
3775 || (INSN_LUID (JUMP_LABEL (insn))
3776 < INSN_LUID (insn))))))))
3784 /* Past a jump, we get to insns for which we can't count
3785 on whether they will be executed during each iteration. */
3786 /* This code appears twice in strength_reduce. There is also similar
3787 code in scan_loop. */
3788 if (GET_CODE (p) == JUMP_INSN
3789 /* If we enter the loop in the middle, and scan around to the
3790 beginning, don't set not_every_iteration for that.
3791 This can be any kind of jump, since we want to know if insns
3792 will be executed if the loop is executed. */
3793 && ! (JUMP_LABEL (p) == loop_top
3794 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3795 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3799 /* If this is a jump outside the loop, then it also doesn't
3800 matter. Check to see if the target of this branch is on the
3801 loop_number_exits_labels list. */
3803 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3805 label = LABEL_NEXTREF (label))
3806 if (XEXP (label, 0) == JUMP_LABEL (p))
3810 not_every_iteration = 1;
3813 else if (GET_CODE (p) == NOTE)
3815 /* At the virtual top of a converted loop, insns are again known to
3816 be executed each iteration: logically, the loop begins here
3817 even though the exit code has been duplicated. */
3818 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3819 not_every_iteration = 0;
3820 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3822 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3826 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3827 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3828 or not an insn is known to be executed each iteration of the
3829 loop, whether or not any iterations are known to occur.
3831 Therefore, if we have just passed a label and have no more labels
3832 between here and the test insn of the loop, we know these insns
3833 will be executed each iteration. */
3835 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3836 && no_labels_between_p (p, loop_end))
3837 not_every_iteration = 0;
3840 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3841 Make a sanity check against n_times_set. */
3842 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3844 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3845 /* Above happens if register modified by subreg, etc. */
3846 /* Make sure it is not recognized as a basic induction var: */
3847 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3848 /* If never incremented, it is invariant that we decided not to
3849 move. So leave it alone. */
3850 || ! bl->incremented)
3852 if (loop_dump_stream)
3853 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3855 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3856 ? "not induction variable"
3857 : (! bl->incremented ? "never incremented"
3860 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
3867 if (loop_dump_stream)
3868 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3872 /* Exit if there are no bivs. */
3875 /* Can still unroll the loop anyways, but indicate that there is no
3876 strength reduction info available. */
3878 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
3884 /* Find initial value for each biv by searching backwards from loop_start,
3885 halting at first label. Also record any test condition. */
3888 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3892 if (GET_CODE (p) == CALL_INSN)
3895 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3896 || GET_CODE (p) == CALL_INSN)
3897 note_stores (PATTERN (p), record_initial);
3899 /* Record any test of a biv that branches around the loop if no store
3900 between it and the start of loop. We only care about tests with
3901 constants and registers and only certain of those. */
3902 if (GET_CODE (p) == JUMP_INSN
3903 && JUMP_LABEL (p) != 0
3904 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3905 && (test = get_condition_for_loop (p)) != 0
3906 && GET_CODE (XEXP (test, 0)) == REG
3907 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3908 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3909 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3910 && bl->init_insn == 0)
3912 /* If an NE test, we have an initial value! */
3913 if (GET_CODE (test) == NE)
3916 bl->init_set = gen_rtx_SET (VOIDmode,
3917 XEXP (test, 0), XEXP (test, 1));
3920 bl->initial_test = test;
3924 /* Look at the each biv and see if we can say anything better about its
3925 initial value from any initializing insns set up above. (This is done
3926 in two passes to avoid missing SETs in a PARALLEL.) */
3927 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
3932 if (! bl->init_insn)
3935 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3936 is a constant, use the value of that. */
3937 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3938 && CONSTANT_P (XEXP (note, 0)))
3939 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3940 && CONSTANT_P (XEXP (note, 0))))
3941 src = XEXP (note, 0);
3943 src = SET_SRC (bl->init_set);
3945 if (loop_dump_stream)
3946 fprintf (loop_dump_stream,
3947 "Biv %d initialized at insn %d: initial value ",
3948 bl->regno, INSN_UID (bl->init_insn));
3950 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3951 || GET_MODE (src) == VOIDmode)
3952 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3954 bl->initial_value = src;
3956 if (loop_dump_stream)
3958 if (GET_CODE (src) == CONST_INT)
3960 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
3961 fputc ('\n', loop_dump_stream);
3965 print_rtl (loop_dump_stream, src);
3966 fprintf (loop_dump_stream, "\n");
3972 struct iv_class *bl2 = 0;
3975 /* Biv initial value is not a simple move. If it is the sum of
3976 another biv and a constant, check if both bivs are incremented
3977 in lockstep. Then we are actually looking at a giv.
3978 For simplicity, we only handle the case where there is but a
3979 single increment, and the register is not used elsewhere. */
3980 if (bl->biv_count == 1
3981 && bl->regno < max_reg_before_loop
3982 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
3983 && GET_CODE (src) == PLUS
3984 && GET_CODE (XEXP (src, 0)) == REG
3985 && CONSTANT_P (XEXP (src, 1))
3986 && ((increment = biv_total_increment (bl, loop_start, loop_end))
3989 int regno = REGNO (XEXP (src, 0));
3991 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
3992 if (bl2->regno == regno)
3996 /* Now, can we transform this biv into a giv? */
3998 && bl2->biv_count == 1
3999 && rtx_equal_p (increment,
4000 biv_total_increment (bl2, loop_start, loop_end))
4001 /* init_insn is only set to insns that are before loop_start
4002 without any intervening labels. */
4003 && ! reg_set_between_p (bl2->biv->src_reg,
4004 PREV_INSN (bl->init_insn), loop_start)
4005 /* The register from BL2 must be set before the register from
4006 BL is set, or we must be able to move the latter set after
4007 the former set. Currently there can't be any labels
4008 in-between when biv_toal_increment returns nonzero both times
4009 but we test it here in case some day some real cfg analysis
4010 gets used to set always_computable. */
4011 && ((insn_first_p (bl2->biv->insn, bl->biv->insn)
4012 && no_labels_between_p (bl2->biv->insn, bl->biv->insn))
4013 || (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4015 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4016 && validate_change (bl->biv->insn,
4017 &SET_SRC (single_set (bl->biv->insn)),
4020 int loop_num = uid_loop_num[INSN_UID (loop_start)];
4021 rtx dominator = loop_number_cont_dominator[loop_num];
4022 rtx giv = bl->biv->src_reg;
4023 rtx giv_insn = bl->biv->insn;
4024 rtx after_giv = NEXT_INSN (giv_insn);
4026 if (loop_dump_stream)
4027 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4028 /* Let this giv be discovered by the generic code. */
4029 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4030 /* We can get better optimization if we can move the giv setting
4031 before the first giv use. */
4033 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4035 && ! reg_used_between_p (giv, loop_start, dominator)
4036 && ! reg_used_between_p (giv, giv_insn, loop_end))
4041 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4043 if ((GET_RTX_CLASS (GET_CODE (next)) == 'i'
4044 && (reg_mentioned_p (giv, PATTERN (next))
4045 || reg_set_p (bl2->biv->src_reg, next)))
4046 || GET_CODE (next) == JUMP_INSN)
4049 if (GET_RTX_CLASS (GET_CODE (next)) != 'i'
4050 || ! sets_cc0_p (PATTERN (next)))
4054 if (loop_dump_stream)
4055 fprintf (loop_dump_stream, "move after insn %d\n",
4056 INSN_UID (dominator));
4057 /* Avoid problems with luids by actually moving the insn
4058 and adjusting all luids in the range. */
4059 reorder_insns (giv_insn, giv_insn, dominator);
4060 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4062 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4063 /* If the only purpose of the init insn is to initialize
4064 this giv, delete it. */
4065 if (single_set (bl->init_insn)
4066 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4067 delete_insn (bl->init_insn);
4069 else if (! insn_first_p (bl2->biv->insn, bl->biv->insn))
4071 rtx p = PREV_INSN (giv_insn);
4072 while (INSN_UID (p) >= max_uid_for_loop)
4074 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4075 compute_luids (after_giv, NEXT_INSN (giv_insn),
4078 /* Remove this biv from the chain. */
4088 /* If we can't make it a giv,
4089 let biv keep initial value of "itself". */
4090 else if (loop_dump_stream)
4091 fprintf (loop_dump_stream, "is complex\n");
4095 /* If a biv is unconditionally incremented several times in a row, convert
4096 all but the last increment into a giv. */
4098 /* Get an upper bound for the number of registers
4099 we might have after all bivs have been processed. */
4100 first_increment_giv = max_reg_num ();
4101 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4102 n_extra_increment += bl->biv_count - 1;
4103 if (n_extra_increment)
4105 int nregs = first_increment_giv + n_extra_increment;
4107 /* Reallocate reg_iv_type and reg_iv_info. */
4108 VARRAY_GROW (reg_iv_type, nregs);
4109 VARRAY_GROW (reg_iv_info, nregs);
4111 for (bl = loop_iv_list; bl; bl = bl->next)
4113 struct induction **vp, *v, *next;
4115 /* The biv increments lists are in reverse order. Fix this first. */
4116 for (v = bl->biv, bl->biv = 0; v; v = next)
4119 v->next_iv = bl->biv;
4123 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4125 HOST_WIDE_INT offset;
4126 rtx set, add_val, old_reg, dest_reg, last_use_insn;
4127 int old_regno, new_regno;
4129 if (! v->always_executed
4130 || v->maybe_multiple
4131 || GET_CODE (v->add_val) != CONST_INT
4132 || ! next->always_executed
4133 || next->maybe_multiple
4134 || ! CONSTANT_P (next->add_val))
4139 offset = INTVAL (v->add_val);
4140 set = single_set (v->insn);
4141 add_val = plus_constant (next->add_val, offset);
4142 old_reg = v->dest_reg;
4143 dest_reg = gen_reg_rtx (v->mode);
4145 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4146 have been allocated with some slop space, so we may not
4147 actually need to reallocate them. If we do, the following
4148 if statement will be executed just once in this loop. */
4149 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4151 /* Grow all the remaining arrays. */
4152 VARRAY_GROW (set_in_loop, nregs);
4153 VARRAY_GROW (n_times_set, nregs);
4154 VARRAY_GROW (may_not_optimize, nregs);
4157 validate_change (v->insn, &SET_DEST (set), dest_reg, 1);
4158 validate_change (next->insn, next->location, add_val, 1);
4159 if (! apply_change_group ())
4164 next->add_val = add_val;
4165 v->dest_reg = dest_reg;
4166 v->giv_type = DEST_REG;
4167 v->location = &SET_SRC (set);
4169 v->combined_with = 0;
4171 v->derive_adjustment = 0;
4177 v->auto_inc_opt = 0;
4181 v->always_computable = 1;
4182 v->always_executed = 1;
4184 v->no_const_addval = 0;
4186 old_regno = REGNO (old_reg);
4187 new_regno = REGNO (dest_reg);
4188 VARRAY_INT (set_in_loop, old_regno)--;
4189 VARRAY_INT (set_in_loop, new_regno) = 1;
4190 VARRAY_INT (n_times_set, old_regno)--;
4191 VARRAY_INT (n_times_set, new_regno) = 1;
4192 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4194 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4195 REG_IV_INFO (new_regno) = v;
4197 /* Remove the increment from the list of biv increments,
4198 and record it as a giv. */
4201 v->next_iv = bl->giv;
4204 v->benefit = rtx_cost (SET_SRC (set), SET);
4205 bl->total_benefit += v->benefit;
4207 /* Now replace the biv with DEST_REG in all insns between
4208 the replaced increment and the next increment, and
4209 remember the last insn that needed a replacement. */
4210 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4212 p = next_insn_in_loop (p, scan_start, end, loop_top))
4216 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4218 if (reg_mentioned_p (old_reg, PATTERN (p)))
4221 if (! validate_replace_rtx (old_reg, dest_reg, p))
4224 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4226 if (GET_CODE (note) == EXPR_LIST)
4228 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4232 v->last_use = last_use_insn;
4233 v->lifetime = INSN_LUID (v->insn) - INSN_LUID (last_use_insn);
4234 /* If the lifetime is zero, it means that this register is really
4235 a dead store. So mark this as a giv that can be ignored.
4236 This will not prevent the biv from being eliminated. */
4237 if (v->lifetime == 0)
4242 last_increment_giv = max_reg_num () - 1;
4244 /* Search the loop for general induction variables. */
4246 /* A register is a giv if: it is only set once, it is a function of a
4247 biv and a constant (or invariant), and it is not a biv. */
4249 not_every_iteration = 0;
4255 /* At end of a straight-in loop, we are done.
4256 At end of a loop entered at the bottom, scan the top. */
4257 if (p == scan_start)
4265 if (p == scan_start)
4269 /* Look for a general induction variable in a register. */
4270 if (GET_CODE (p) == INSN
4271 && (set = single_set (p))
4272 && GET_CODE (SET_DEST (set)) == REG
4273 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
4280 rtx last_consec_insn;
4282 dest_reg = SET_DEST (set);
4283 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4286 if (/* SET_SRC is a giv. */
4287 (general_induction_var (SET_SRC (set), &src_reg, &add_val,
4288 &mult_val, 0, &benefit)
4289 /* Equivalent expression is a giv. */
4290 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4291 && general_induction_var (XEXP (regnote, 0), &src_reg,
4292 &add_val, &mult_val, 0,
4294 /* Don't try to handle any regs made by loop optimization.
4295 We have nothing on them in regno_first_uid, etc. */
4296 && REGNO (dest_reg) < max_reg_before_loop
4297 /* Don't recognize a BASIC_INDUCT_VAR here. */
4298 && dest_reg != src_reg
4299 /* This must be the only place where the register is set. */
4300 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
4301 /* or all sets must be consecutive and make a giv. */
4302 || (benefit = consec_sets_giv (benefit, p,
4304 &add_val, &mult_val,
4305 &last_consec_insn))))
4308 = (struct induction *) alloca (sizeof (struct induction));
4310 /* If this is a library call, increase benefit. */
4311 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4312 benefit += libcall_benefit (p);
4314 /* Skip the consecutive insns, if there are any. */
4315 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
4316 p = last_consec_insn;
4318 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
4319 DEST_REG, not_every_iteration, NULL_PTR, loop_start,
4325 #ifndef DONT_REDUCE_ADDR
4326 /* Look for givs which are memory addresses. */
4327 /* This resulted in worse code on a VAX 8600. I wonder if it
4329 if (GET_CODE (p) == INSN)
4330 find_mem_givs (PATTERN (p), p, not_every_iteration, loop_start,
4334 /* Update the status of whether giv can derive other givs. This can
4335 change when we pass a label or an insn that updates a biv. */
4336 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4337 || GET_CODE (p) == CODE_LABEL)
4338 update_giv_derive (p);
4340 /* Past a jump, we get to insns for which we can't count
4341 on whether they will be executed during each iteration. */
4342 /* This code appears twice in strength_reduce. There is also similar
4343 code in scan_loop. */
4344 if (GET_CODE (p) == JUMP_INSN
4345 /* If we enter the loop in the middle, and scan around to the
4346 beginning, don't set not_every_iteration for that.
4347 This can be any kind of jump, since we want to know if insns
4348 will be executed if the loop is executed. */
4349 && ! (JUMP_LABEL (p) == loop_top
4350 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
4351 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
4355 /* If this is a jump outside the loop, then it also doesn't
4356 matter. Check to see if the target of this branch is on the
4357 loop_number_exits_labels list. */
4359 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
4361 label = LABEL_NEXTREF (label))
4362 if (XEXP (label, 0) == JUMP_LABEL (p))
4366 not_every_iteration = 1;
4369 else if (GET_CODE (p) == NOTE)
4371 /* At the virtual top of a converted loop, insns are again known to
4372 be executed each iteration: logically, the loop begins here
4373 even though the exit code has been duplicated. */
4374 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
4375 not_every_iteration = 0;
4376 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4378 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4382 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4383 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4384 or not an insn is known to be executed each iteration of the
4385 loop, whether or not any iterations are known to occur.
4387 Therefore, if we have just passed a label and have no more labels
4388 between here and the test insn of the loop, we know these insns
4389 will be executed each iteration. */
4391 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4392 && no_labels_between_p (p, loop_end))
4393 not_every_iteration = 0;
4396 /* Try to calculate and save the number of loop iterations. This is
4397 set to zero if the actual number can not be calculated. This must
4398 be called after all giv's have been identified, since otherwise it may
4399 fail if the iteration variable is a giv. */
4401 loop_iterations (loop_start, loop_end, loop_info);
4403 /* Now for each giv for which we still don't know whether or not it is
4404 replaceable, check to see if it is replaceable because its final value
4405 can be calculated. This must be done after loop_iterations is called,
4406 so that final_giv_value will work correctly. */
4408 for (bl = loop_iv_list; bl; bl = bl->next)
4410 struct induction *v;
4412 for (v = bl->giv; v; v = v->next_iv)
4413 if (! v->replaceable && ! v->not_replaceable)
4414 check_final_value (v, loop_start, loop_end, loop_info->n_iterations);
4417 /* Try to prove that the loop counter variable (if any) is always
4418 nonnegative; if so, record that fact with a REG_NONNEG note
4419 so that "decrement and branch until zero" insn can be used. */
4420 check_dbra_loop (loop_end, insn_count, loop_start, loop_info);
4422 /* Create reg_map to hold substitutions for replaceable giv regs. */
4423 reg_map = (rtx *) alloca (max_reg_before_loop * sizeof (rtx));
4424 bzero ((char *) reg_map, max_reg_before_loop * sizeof (rtx));
4426 /* Examine each iv class for feasibility of strength reduction/induction
4427 variable elimination. */
4429 for (bl = loop_iv_list; bl; bl = bl->next)
4431 struct induction *v;
4434 rtx final_value = 0;
4437 /* Test whether it will be possible to eliminate this biv
4438 provided all givs are reduced. This is possible if either
4439 the reg is not used outside the loop, or we can compute
4440 what its final value will be.
4442 For architectures with a decrement_and_branch_until_zero insn,
4443 don't do this if we put a REG_NONNEG note on the endtest for
4446 /* Compare against bl->init_insn rather than loop_start.
4447 We aren't concerned with any uses of the biv between
4448 init_insn and loop_start since these won't be affected
4449 by the value of the biv elsewhere in the function, so
4450 long as init_insn doesn't use the biv itself.
4451 March 14, 1989 -- self@bayes.arc.nasa.gov */
4453 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4455 && INSN_UID (bl->init_insn) < max_uid_for_loop
4456 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4457 #ifdef HAVE_decrement_and_branch_until_zero
4460 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4461 || ((final_value = final_biv_value (bl, loop_start, loop_end,
4462 loop_info->n_iterations))
4463 #ifdef HAVE_decrement_and_branch_until_zero
4467 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
4468 threshold, insn_count);
4471 if (loop_dump_stream)
4473 fprintf (loop_dump_stream,
4474 "Cannot eliminate biv %d.\n",
4476 fprintf (loop_dump_stream,
4477 "First use: insn %d, last use: insn %d.\n",
4478 REGNO_FIRST_UID (bl->regno),
4479 REGNO_LAST_UID (bl->regno));
4483 /* Combine all giv's for this iv_class. */
4486 /* This will be true at the end, if all givs which depend on this
4487 biv have been strength reduced.
4488 We can't (currently) eliminate the biv unless this is so. */
4491 /* Check each giv in this class to see if we will benefit by reducing
4492 it. Skip giv's combined with others. */
4493 for (v = bl->giv; v; v = v->next_iv)
4495 struct induction *tv;
4497 if (v->ignore || v->same)
4500 benefit = v->benefit;
4502 /* Reduce benefit if not replaceable, since we will insert
4503 a move-insn to replace the insn that calculates this giv.
4504 Don't do this unless the giv is a user variable, since it
4505 will often be marked non-replaceable because of the duplication
4506 of the exit code outside the loop. In such a case, the copies
4507 we insert are dead and will be deleted. So they don't have
4508 a cost. Similar situations exist. */
4509 /* ??? The new final_[bg]iv_value code does a much better job
4510 of finding replaceable giv's, and hence this code may no longer
4512 if (! v->replaceable && ! bl->eliminable
4513 && REG_USERVAR_P (v->dest_reg))
4514 benefit -= copy_cost;
4516 /* Decrease the benefit to count the add-insns that we will
4517 insert to increment the reduced reg for the giv. */
4518 benefit -= add_cost * bl->biv_count;
4520 /* Decide whether to strength-reduce this giv or to leave the code
4521 unchanged (recompute it from the biv each time it is used).
4522 This decision can be made independently for each giv. */
4525 /* Attempt to guess whether autoincrement will handle some of the
4526 new add insns; if so, increase BENEFIT (undo the subtraction of
4527 add_cost that was done above). */
4528 if (v->giv_type == DEST_ADDR
4529 && GET_CODE (v->mult_val) == CONST_INT)
4531 if (HAVE_POST_INCREMENT
4532 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4533 benefit += add_cost * bl->biv_count;
4534 else if (HAVE_PRE_INCREMENT
4535 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4536 benefit += add_cost * bl->biv_count;
4537 else if (HAVE_POST_DECREMENT
4538 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4539 benefit += add_cost * bl->biv_count;
4540 else if (HAVE_PRE_DECREMENT
4541 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4542 benefit += add_cost * bl->biv_count;
4546 /* If an insn is not to be strength reduced, then set its ignore
4547 flag, and clear all_reduced. */
4549 /* A giv that depends on a reversed biv must be reduced if it is
4550 used after the loop exit, otherwise, it would have the wrong
4551 value after the loop exit. To make it simple, just reduce all
4552 of such giv's whether or not we know they are used after the loop
4555 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4558 if (loop_dump_stream)
4559 fprintf (loop_dump_stream,
4560 "giv of insn %d not worth while, %d vs %d.\n",
4562 v->lifetime * threshold * benefit, insn_count);
4568 /* Check that we can increment the reduced giv without a
4569 multiply insn. If not, reject it. */
4571 for (tv = bl->biv; tv; tv = tv->next_iv)
4572 if (tv->mult_val == const1_rtx
4573 && ! product_cheap_p (tv->add_val, v->mult_val))
4575 if (loop_dump_stream)
4576 fprintf (loop_dump_stream,
4577 "giv of insn %d: would need a multiply.\n",
4578 INSN_UID (v->insn));
4586 /* Now that we know which givs will be reduced, try to rearrange the
4587 combinations to reduce register pressure.
4588 recombine_givs calls find_life_end, which needs reg_iv_type and
4589 reg_iv_info to be valid for all pseudos. We do the necessary
4590 reallocation here since it allows to check if there are still
4591 more bivs to process. */
4592 nregs = max_reg_num ();
4593 if (nregs > reg_iv_type->num_elements)
4595 /* If there are still more bivs to process, allocate some slack
4596 space so that we're not constantly reallocating these arrays. */
4599 /* Reallocate reg_iv_type and reg_iv_info. */
4600 VARRAY_GROW (reg_iv_type, nregs);
4601 VARRAY_GROW (reg_iv_info, nregs);
4603 recombine_givs (bl, loop_start, loop_end, unroll_p);
4605 /* Reduce each giv that we decided to reduce. */
4607 for (v = bl->giv; v; v = v->next_iv)
4609 struct induction *tv;
4610 if (! v->ignore && v->same == 0)
4612 int auto_inc_opt = 0;
4614 v->new_reg = gen_reg_rtx (v->mode);
4619 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4620 if (bl->biv_count != 1)
4622 /* For each place where the biv is incremented, add an
4623 insn to set the new, reduced reg for the giv. */
4624 for (tv = bl->biv; tv; tv = tv->next_iv)
4626 /* We always emit reduced giv increments before the
4627 biv increment when bl->biv_count != 1. So by
4628 emitting the add insns for derived givs after the
4629 biv increment, they pick up the updated value of
4631 emit_insn_after (copy_rtx (PATTERN (v->insn)),
4640 /* If the target has auto-increment addressing modes, and
4641 this is an address giv, then try to put the increment
4642 immediately after its use, so that flow can create an
4643 auto-increment addressing mode. */
4644 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4645 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4646 /* We don't handle reversed biv's because bl->biv->insn
4647 does not have a valid INSN_LUID. */
4649 && v->always_executed && ! v->maybe_multiple
4650 && INSN_UID (v->insn) < max_uid_for_loop)
4652 /* If other giv's have been combined with this one, then
4653 this will work only if all uses of the other giv's occur
4654 before this giv's insn. This is difficult to check.
4656 We simplify this by looking for the common case where
4657 there is one DEST_REG giv, and this giv's insn is the
4658 last use of the dest_reg of that DEST_REG giv. If the
4659 increment occurs after the address giv, then we can
4660 perform the optimization. (Otherwise, the increment
4661 would have to go before other_giv, and we would not be
4662 able to combine it with the address giv to get an
4663 auto-inc address.) */
4664 if (v->combined_with)
4666 struct induction *other_giv = 0;
4668 for (tv = bl->giv; tv; tv = tv->next_iv)
4676 if (! tv && other_giv
4677 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4678 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4679 == INSN_UID (v->insn))
4680 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4683 /* Check for case where increment is before the address
4684 giv. Do this test in "loop order". */
4685 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4686 && (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4687 || (INSN_LUID (bl->biv->insn)
4688 > INSN_LUID (scan_start))))
4689 || (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4690 && (INSN_LUID (scan_start)
4691 < INSN_LUID (bl->biv->insn))))
4700 /* We can't put an insn immediately after one setting
4701 cc0, or immediately before one using cc0. */
4702 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4703 || (auto_inc_opt == -1
4704 && (prev = prev_nonnote_insn (v->insn)) != 0
4705 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4706 && sets_cc0_p (PATTERN (prev))))
4712 v->auto_inc_opt = 1;
4716 /* For each place where the biv is incremented, add an insn
4717 to increment the new, reduced reg for the giv. */
4718 for (tv = bl->biv; tv; tv = tv->next_iv)
4723 insert_before = tv->insn;
4724 else if (auto_inc_opt == 1)
4725 insert_before = NEXT_INSN (v->insn);
4727 insert_before = v->insn;
4729 if (tv->mult_val == const1_rtx)
4730 emit_iv_add_mult (tv->add_val, v->mult_val,
4731 v->new_reg, v->new_reg, insert_before);
4732 else /* tv->mult_val == const0_rtx */
4733 /* A multiply is acceptable here
4734 since this is presumed to be seldom executed. */
4735 emit_iv_add_mult (tv->add_val, v->mult_val,
4736 v->add_val, v->new_reg, insert_before);
4739 /* Add code at loop start to initialize giv's reduced reg. */
4741 emit_iv_add_mult (bl->initial_value, v->mult_val,
4742 v->add_val, v->new_reg, loop_start);
4746 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4749 For each giv register that can be reduced now: if replaceable,
4750 substitute reduced reg wherever the old giv occurs;
4751 else add new move insn "giv_reg = reduced_reg".
4753 Also check for givs whose first use is their definition and whose
4754 last use is the definition of another giv. If so, it is likely
4755 dead and should not be used to eliminate a biv. */
4756 for (v = bl->giv; v; v = v->next_iv)
4758 if (v->same && v->same->ignore)
4766 struct induction *v1;
4768 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4769 if (v->last_use == v1->insn)
4772 else if (v->giv_type == DEST_REG
4773 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4775 struct induction *v1;
4777 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4778 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4782 /* Update expression if this was combined, in case other giv was
4785 v->new_reg = replace_rtx (v->new_reg,
4786 v->same->dest_reg, v->same->new_reg);
4788 if (v->giv_type == DEST_ADDR)
4789 /* Store reduced reg as the address in the memref where we found
4791 validate_change (v->insn, v->location, v->new_reg, 0);
4792 else if (v->replaceable)
4794 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4797 /* I can no longer duplicate the original problem. Perhaps
4798 this is unnecessary now? */
4800 /* Replaceable; it isn't strictly necessary to delete the old
4801 insn and emit a new one, because v->dest_reg is now dead.
4803 However, especially when unrolling loops, the special
4804 handling for (set REG0 REG1) in the second cse pass may
4805 make v->dest_reg live again. To avoid this problem, emit
4806 an insn to set the original giv reg from the reduced giv.
4807 We can not delete the original insn, since it may be part
4808 of a LIBCALL, and the code in flow that eliminates dead
4809 libcalls will fail if it is deleted. */
4810 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4816 /* Not replaceable; emit an insn to set the original giv reg from
4817 the reduced giv, same as above. */
4818 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4822 /* When a loop is reversed, givs which depend on the reversed
4823 biv, and which are live outside the loop, must be set to their
4824 correct final value. This insn is only needed if the giv is
4825 not replaceable. The correct final value is the same as the
4826 value that the giv starts the reversed loop with. */
4827 if (bl->reversed && ! v->replaceable)
4828 emit_iv_add_mult (bl->initial_value, v->mult_val,
4829 v->add_val, v->dest_reg, end_insert_before);
4830 else if (v->final_value)
4834 /* If the loop has multiple exits, emit the insn before the
4835 loop to ensure that it will always be executed no matter
4836 how the loop exits. Otherwise, emit the insn after the loop,
4837 since this is slightly more efficient. */
4838 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4839 insert_before = loop_start;
4841 insert_before = end_insert_before;
4842 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4846 /* If the insn to set the final value of the giv was emitted
4847 before the loop, then we must delete the insn inside the loop
4848 that sets it. If this is a LIBCALL, then we must delete
4849 every insn in the libcall. Note, however, that
4850 final_giv_value will only succeed when there are multiple
4851 exits if the giv is dead at each exit, hence it does not
4852 matter that the original insn remains because it is dead
4854 /* Delete the insn inside the loop that sets the giv since
4855 the giv is now set before (or after) the loop. */
4856 delete_insn (v->insn);
4860 if (loop_dump_stream)
4862 fprintf (loop_dump_stream, "giv at %d reduced to ",
4863 INSN_UID (v->insn));
4864 print_rtl (loop_dump_stream, v->new_reg);
4865 fprintf (loop_dump_stream, "\n");
4869 /* All the givs based on the biv bl have been reduced if they
4872 /* For each giv not marked as maybe dead that has been combined with a
4873 second giv, clear any "maybe dead" mark on that second giv.
4874 v->new_reg will either be or refer to the register of the giv it
4877 Doing this clearing avoids problems in biv elimination where a
4878 giv's new_reg is a complex value that can't be put in the insn but
4879 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4880 Since the register will be used in either case, we'd prefer it be
4881 used from the simpler giv. */
4883 for (v = bl->giv; v; v = v->next_iv)
4884 if (! v->maybe_dead && v->same)
4885 v->same->maybe_dead = 0;
4887 /* Try to eliminate the biv, if it is a candidate.
4888 This won't work if ! all_reduced,
4889 since the givs we planned to use might not have been reduced.
4891 We have to be careful that we didn't initially think we could eliminate
4892 this biv because of a giv that we now think may be dead and shouldn't
4893 be used as a biv replacement.
4895 Also, there is the possibility that we may have a giv that looks
4896 like it can be used to eliminate a biv, but the resulting insn
4897 isn't valid. This can happen, for example, on the 88k, where a
4898 JUMP_INSN can compare a register only with zero. Attempts to
4899 replace it with a compare with a constant will fail.
4901 Note that in cases where this call fails, we may have replaced some
4902 of the occurrences of the biv with a giv, but no harm was done in
4903 doing so in the rare cases where it can occur. */
4905 if (all_reduced == 1 && bl->eliminable
4906 && maybe_eliminate_biv (bl, loop_start, end, 1,
4907 threshold, insn_count))
4910 /* ?? If we created a new test to bypass the loop entirely,
4911 or otherwise drop straight in, based on this test, then
4912 we might want to rewrite it also. This way some later
4913 pass has more hope of removing the initialization of this
4916 /* If final_value != 0, then the biv may be used after loop end
4917 and we must emit an insn to set it just in case.
4919 Reversed bivs already have an insn after the loop setting their
4920 value, so we don't need another one. We can't calculate the
4921 proper final value for such a biv here anyways. */
4922 if (final_value != 0 && ! bl->reversed)
4926 /* If the loop has multiple exits, emit the insn before the
4927 loop to ensure that it will always be executed no matter
4928 how the loop exits. Otherwise, emit the insn after the
4929 loop, since this is slightly more efficient. */
4930 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4931 insert_before = loop_start;
4933 insert_before = end_insert_before;
4935 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4940 /* Delete all of the instructions inside the loop which set
4941 the biv, as they are all dead. If is safe to delete them,
4942 because an insn setting a biv will never be part of a libcall. */
4943 /* However, deleting them will invalidate the regno_last_uid info,
4944 so keeping them around is more convenient. Final_biv_value
4945 will only succeed when there are multiple exits if the biv
4946 is dead at each exit, hence it does not matter that the original
4947 insn remains, because it is dead anyways. */
4948 for (v = bl->biv; v; v = v->next_iv)
4949 delete_insn (v->insn);
4952 if (loop_dump_stream)
4953 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4958 /* Go through all the instructions in the loop, making all the
4959 register substitutions scheduled in REG_MAP. */
4961 for (p = loop_start; p != end; p = NEXT_INSN (p))
4962 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4963 || GET_CODE (p) == CALL_INSN)
4965 replace_regs (PATTERN (p), reg_map, max_reg_before_loop, 0);
4966 replace_regs (REG_NOTES (p), reg_map, max_reg_before_loop, 0);
4970 /* Unroll loops from within strength reduction so that we can use the
4971 induction variable information that strength_reduce has already
4975 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
4978 #ifdef HAVE_decrement_and_branch_on_count
4979 /* Instrument the loop with BCT insn. */
4980 if (HAVE_decrement_and_branch_on_count && bct_p
4981 && flag_branch_on_count_reg)
4982 insert_bct (loop_start, loop_end, loop_info);
4983 #endif /* HAVE_decrement_and_branch_on_count */
4985 if (loop_dump_stream)
4986 fprintf (loop_dump_stream, "\n");
4987 VARRAY_FREE (reg_iv_type);
4988 VARRAY_FREE (reg_iv_info);
4991 /* Return 1 if X is a valid source for an initial value (or as value being
4992 compared against in an initial test).
4994 X must be either a register or constant and must not be clobbered between
4995 the current insn and the start of the loop.
4997 INSN is the insn containing X. */
5000 valid_initial_value_p (x, insn, call_seen, loop_start)
5009 /* Only consider pseudos we know about initialized in insns whose luids
5011 if (GET_CODE (x) != REG
5012 || REGNO (x) >= max_reg_before_loop)
5015 /* Don't use call-clobbered registers across a call which clobbers it. On
5016 some machines, don't use any hard registers at all. */
5017 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5018 && (SMALL_REGISTER_CLASSES
5019 || (call_used_regs[REGNO (x)] && call_seen)))
5022 /* Don't use registers that have been clobbered before the start of the
5024 if (reg_set_between_p (x, insn, loop_start))
5030 /* Scan X for memory refs and check each memory address
5031 as a possible giv. INSN is the insn whose pattern X comes from.
5032 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5033 every loop iteration. */
5036 find_mem_givs (x, insn, not_every_iteration, loop_start, loop_end)
5039 int not_every_iteration;
5040 rtx loop_start, loop_end;
5043 register enum rtx_code code;
5049 code = GET_CODE (x);
5073 /* This code used to disable creating GIVs with mult_val == 1 and
5074 add_val == 0. However, this leads to lost optimizations when
5075 it comes time to combine a set of related DEST_ADDR GIVs, since
5076 this one would not be seen. */
5078 if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
5079 &mult_val, 1, &benefit))
5081 /* Found one; record it. */
5083 = (struct induction *) oballoc (sizeof (struct induction));
5085 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
5086 add_val, benefit, DEST_ADDR, not_every_iteration,
5087 &XEXP (x, 0), loop_start, loop_end);
5089 v->mem_mode = GET_MODE (x);
5098 /* Recursively scan the subexpressions for other mem refs. */
5100 fmt = GET_RTX_FORMAT (code);
5101 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5103 find_mem_givs (XEXP (x, i), insn, not_every_iteration, loop_start,
5105 else if (fmt[i] == 'E')
5106 for (j = 0; j < XVECLEN (x, i); j++)
5107 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
5108 loop_start, loop_end);
5111 /* Fill in the data about one biv update.
5112 V is the `struct induction' in which we record the biv. (It is
5113 allocated by the caller, with alloca.)
5114 INSN is the insn that sets it.
5115 DEST_REG is the biv's reg.
5117 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5118 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5119 being set to INC_VAL.
5121 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5122 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5123 can be executed more than once per iteration. If MAYBE_MULTIPLE
5124 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5125 executed exactly once per iteration. */
5128 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5129 not_every_iteration, maybe_multiple)
5130 struct induction *v;
5136 int not_every_iteration;
5139 struct iv_class *bl;
5142 v->src_reg = dest_reg;
5143 v->dest_reg = dest_reg;
5144 v->mult_val = mult_val;
5145 v->add_val = inc_val;
5146 v->location = location;
5147 v->mode = GET_MODE (dest_reg);
5148 v->always_computable = ! not_every_iteration;
5149 v->always_executed = ! not_every_iteration;
5150 v->maybe_multiple = maybe_multiple;
5152 /* Add this to the reg's iv_class, creating a class
5153 if this is the first incrementation of the reg. */
5155 bl = reg_biv_class[REGNO (dest_reg)];
5158 /* Create and initialize new iv_class. */
5160 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5162 bl->regno = REGNO (dest_reg);
5168 /* Set initial value to the reg itself. */
5169 bl->initial_value = dest_reg;
5170 /* We haven't seen the initializing insn yet */
5173 bl->initial_test = 0;
5174 bl->incremented = 0;
5178 bl->total_benefit = 0;
5180 /* Add this class to loop_iv_list. */
5181 bl->next = loop_iv_list;
5184 /* Put it in the array of biv register classes. */
5185 reg_biv_class[REGNO (dest_reg)] = bl;
5188 /* Update IV_CLASS entry for this biv. */
5189 v->next_iv = bl->biv;
5192 if (mult_val == const1_rtx)
5193 bl->incremented = 1;
5195 if (loop_dump_stream)
5197 fprintf (loop_dump_stream,
5198 "Insn %d: possible biv, reg %d,",
5199 INSN_UID (insn), REGNO (dest_reg));
5200 if (GET_CODE (inc_val) == CONST_INT)
5202 fprintf (loop_dump_stream, " const =");
5203 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5204 fputc ('\n', loop_dump_stream);
5208 fprintf (loop_dump_stream, " const = ");
5209 print_rtl (loop_dump_stream, inc_val);
5210 fprintf (loop_dump_stream, "\n");
5215 /* Fill in the data about one giv.
5216 V is the `struct induction' in which we record the giv. (It is
5217 allocated by the caller, with alloca.)
5218 INSN is the insn that sets it.
5219 BENEFIT estimates the savings from deleting this insn.
5220 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5221 into a register or is used as a memory address.
5223 SRC_REG is the biv reg which the giv is computed from.
5224 DEST_REG is the giv's reg (if the giv is stored in a reg).
5225 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5226 LOCATION points to the place where this giv's value appears in INSN. */
5229 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5230 type, not_every_iteration, location, loop_start, loop_end)
5231 struct induction *v;
5235 rtx mult_val, add_val;
5238 int not_every_iteration;
5240 rtx loop_start, loop_end;
5242 struct induction *b;
5243 struct iv_class *bl;
5244 rtx set = single_set (insn);
5247 v->src_reg = src_reg;
5249 v->dest_reg = dest_reg;
5250 v->mult_val = mult_val;
5251 v->add_val = add_val;
5252 v->benefit = benefit;
5253 v->location = location;
5255 v->combined_with = 0;
5256 v->maybe_multiple = 0;
5258 v->derive_adjustment = 0;
5264 v->auto_inc_opt = 0;
5270 /* The v->always_computable field is used in update_giv_derive, to
5271 determine whether a giv can be used to derive another giv. For a
5272 DEST_REG giv, INSN computes a new value for the giv, so its value
5273 isn't computable if INSN insn't executed every iteration.
5274 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5275 it does not compute a new value. Hence the value is always computable
5276 regardless of whether INSN is executed each iteration. */
5278 if (type == DEST_ADDR)
5279 v->always_computable = 1;
5281 v->always_computable = ! not_every_iteration;
5283 v->always_executed = ! not_every_iteration;
5285 if (type == DEST_ADDR)
5287 v->mode = GET_MODE (*location);
5290 else /* type == DEST_REG */
5292 v->mode = GET_MODE (SET_DEST (set));
5294 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5295 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5297 /* If the lifetime is zero, it means that this register is
5298 really a dead store. So mark this as a giv that can be
5299 ignored. This will not prevent the biv from being eliminated. */
5300 if (v->lifetime == 0)
5303 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5304 REG_IV_INFO (REGNO (dest_reg)) = v;
5307 /* Add the giv to the class of givs computed from one biv. */
5309 bl = reg_biv_class[REGNO (src_reg)];
5312 v->next_iv = bl->giv;
5314 /* Don't count DEST_ADDR. This is supposed to count the number of
5315 insns that calculate givs. */
5316 if (type == DEST_REG)
5318 bl->total_benefit += benefit;
5321 /* Fatal error, biv missing for this giv? */
5324 if (type == DEST_ADDR)
5328 /* The giv can be replaced outright by the reduced register only if all
5329 of the following conditions are true:
5330 - the insn that sets the giv is always executed on any iteration
5331 on which the giv is used at all
5332 (there are two ways to deduce this:
5333 either the insn is executed on every iteration,
5334 or all uses follow that insn in the same basic block),
5335 - the giv is not used outside the loop
5336 - no assignments to the biv occur during the giv's lifetime. */
5338 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5339 /* Previous line always fails if INSN was moved by loop opt. */
5340 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
5341 && (! not_every_iteration
5342 || last_use_this_basic_block (dest_reg, insn)))
5344 /* Now check that there are no assignments to the biv within the
5345 giv's lifetime. This requires two separate checks. */
5347 /* Check each biv update, and fail if any are between the first
5348 and last use of the giv.
5350 If this loop contains an inner loop that was unrolled, then
5351 the insn modifying the biv may have been emitted by the loop
5352 unrolling code, and hence does not have a valid luid. Just
5353 mark the biv as not replaceable in this case. It is not very
5354 useful as a biv, because it is used in two different loops.
5355 It is very unlikely that we would be able to optimize the giv
5356 using this biv anyways. */
5359 for (b = bl->biv; b; b = b->next_iv)
5361 if (INSN_UID (b->insn) >= max_uid_for_loop
5362 || ((uid_luid[INSN_UID (b->insn)]
5363 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5364 && (uid_luid[INSN_UID (b->insn)]
5365 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5368 v->not_replaceable = 1;
5373 /* If there are any backwards branches that go from after the
5374 biv update to before it, then this giv is not replaceable. */
5376 for (b = bl->biv; b; b = b->next_iv)
5377 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
5380 v->not_replaceable = 1;
5386 /* May still be replaceable, we don't have enough info here to
5389 v->not_replaceable = 0;
5393 /* Record whether the add_val contains a const_int, for later use by
5398 v->no_const_addval = 1;
5399 if (tem == const0_rtx)
5401 else if (GET_CODE (tem) == CONST_INT)
5402 v->no_const_addval = 0;
5403 else if (GET_CODE (tem) == PLUS)
5407 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5408 tem = XEXP (tem, 0);
5409 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5410 tem = XEXP (tem, 1);
5414 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5415 v->no_const_addval = 0;
5419 if (loop_dump_stream)
5421 if (type == DEST_REG)
5422 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5423 INSN_UID (insn), REGNO (dest_reg));
5425 fprintf (loop_dump_stream, "Insn %d: dest address",
5428 fprintf (loop_dump_stream, " src reg %d benefit %d",
5429 REGNO (src_reg), v->benefit);
5430 fprintf (loop_dump_stream, " lifetime %d",
5434 fprintf (loop_dump_stream, " replaceable");
5436 if (v->no_const_addval)
5437 fprintf (loop_dump_stream, " ncav");
5439 if (GET_CODE (mult_val) == CONST_INT)
5441 fprintf (loop_dump_stream, " mult ");
5442 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5446 fprintf (loop_dump_stream, " mult ");
5447 print_rtl (loop_dump_stream, mult_val);
5450 if (GET_CODE (add_val) == CONST_INT)
5452 fprintf (loop_dump_stream, " add ");
5453 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5457 fprintf (loop_dump_stream, " add ");
5458 print_rtl (loop_dump_stream, add_val);
5462 if (loop_dump_stream)
5463 fprintf (loop_dump_stream, "\n");
5468 /* All this does is determine whether a giv can be made replaceable because
5469 its final value can be calculated. This code can not be part of record_giv
5470 above, because final_giv_value requires that the number of loop iterations
5471 be known, and that can not be accurately calculated until after all givs
5472 have been identified. */
5475 check_final_value (v, loop_start, loop_end, n_iterations)
5476 struct induction *v;
5477 rtx loop_start, loop_end;
5478 unsigned HOST_WIDE_INT n_iterations;
5480 struct iv_class *bl;
5481 rtx final_value = 0;
5483 bl = reg_biv_class[REGNO (v->src_reg)];
5485 /* DEST_ADDR givs will never reach here, because they are always marked
5486 replaceable above in record_giv. */
5488 /* The giv can be replaced outright by the reduced register only if all
5489 of the following conditions are true:
5490 - the insn that sets the giv is always executed on any iteration
5491 on which the giv is used at all
5492 (there are two ways to deduce this:
5493 either the insn is executed on every iteration,
5494 or all uses follow that insn in the same basic block),
5495 - its final value can be calculated (this condition is different
5496 than the one above in record_giv)
5497 - no assignments to the biv occur during the giv's lifetime. */
5500 /* This is only called now when replaceable is known to be false. */
5501 /* Clear replaceable, so that it won't confuse final_giv_value. */
5505 if ((final_value = final_giv_value (v, loop_start, loop_end, n_iterations))
5506 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5508 int biv_increment_seen = 0;
5514 /* When trying to determine whether or not a biv increment occurs
5515 during the lifetime of the giv, we can ignore uses of the variable
5516 outside the loop because final_value is true. Hence we can not
5517 use regno_last_uid and regno_first_uid as above in record_giv. */
5519 /* Search the loop to determine whether any assignments to the
5520 biv occur during the giv's lifetime. Start with the insn
5521 that sets the giv, and search around the loop until we come
5522 back to that insn again.
5524 Also fail if there is a jump within the giv's lifetime that jumps
5525 to somewhere outside the lifetime but still within the loop. This
5526 catches spaghetti code where the execution order is not linear, and
5527 hence the above test fails. Here we assume that the giv lifetime
5528 does not extend from one iteration of the loop to the next, so as
5529 to make the test easier. Since the lifetime isn't known yet,
5530 this requires two loops. See also record_giv above. */
5532 last_giv_use = v->insn;
5538 p = NEXT_INSN (loop_start);
5542 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5543 || GET_CODE (p) == CALL_INSN)
5545 if (biv_increment_seen)
5547 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5550 v->not_replaceable = 1;
5554 else if (reg_set_p (v->src_reg, PATTERN (p)))
5555 biv_increment_seen = 1;
5556 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5561 /* Now that the lifetime of the giv is known, check for branches
5562 from within the lifetime to outside the lifetime if it is still
5572 p = NEXT_INSN (loop_start);
5573 if (p == last_giv_use)
5576 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5577 && LABEL_NAME (JUMP_LABEL (p))
5578 && ((INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop)
5579 || (INSN_UID (v->insn) >= max_uid_for_loop)
5580 || (INSN_UID (last_giv_use) >= max_uid_for_loop)
5581 || (INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (v->insn)
5582 && INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop_start))
5583 || (INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (last_giv_use)
5584 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop_end))))
5587 v->not_replaceable = 1;
5589 if (loop_dump_stream)
5590 fprintf (loop_dump_stream,
5591 "Found branch outside giv lifetime.\n");
5598 /* If it is replaceable, then save the final value. */
5600 v->final_value = final_value;
5603 if (loop_dump_stream && v->replaceable)
5604 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5605 INSN_UID (v->insn), REGNO (v->dest_reg));
5608 /* Update the status of whether a giv can derive other givs.
5610 We need to do something special if there is or may be an update to the biv
5611 between the time the giv is defined and the time it is used to derive
5614 In addition, a giv that is only conditionally set is not allowed to
5615 derive another giv once a label has been passed.
5617 The cases we look at are when a label or an update to a biv is passed. */
5620 update_giv_derive (p)
5623 struct iv_class *bl;
5624 struct induction *biv, *giv;
5628 /* Search all IV classes, then all bivs, and finally all givs.
5630 There are three cases we are concerned with. First we have the situation
5631 of a giv that is only updated conditionally. In that case, it may not
5632 derive any givs after a label is passed.
5634 The second case is when a biv update occurs, or may occur, after the
5635 definition of a giv. For certain biv updates (see below) that are
5636 known to occur between the giv definition and use, we can adjust the
5637 giv definition. For others, or when the biv update is conditional,
5638 we must prevent the giv from deriving any other givs. There are two
5639 sub-cases within this case.
5641 If this is a label, we are concerned with any biv update that is done
5642 conditionally, since it may be done after the giv is defined followed by
5643 a branch here (actually, we need to pass both a jump and a label, but
5644 this extra tracking doesn't seem worth it).
5646 If this is a jump, we are concerned about any biv update that may be
5647 executed multiple times. We are actually only concerned about
5648 backward jumps, but it is probably not worth performing the test
5649 on the jump again here.
5651 If this is a biv update, we must adjust the giv status to show that a
5652 subsequent biv update was performed. If this adjustment cannot be done,
5653 the giv cannot derive further givs. */
5655 for (bl = loop_iv_list; bl; bl = bl->next)
5656 for (biv = bl->biv; biv; biv = biv->next_iv)
5657 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5660 for (giv = bl->giv; giv; giv = giv->next_iv)
5662 /* If cant_derive is already true, there is no point in
5663 checking all of these conditions again. */
5664 if (giv->cant_derive)
5667 /* If this giv is conditionally set and we have passed a label,
5668 it cannot derive anything. */
5669 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5670 giv->cant_derive = 1;
5672 /* Skip givs that have mult_val == 0, since
5673 they are really invariants. Also skip those that are
5674 replaceable, since we know their lifetime doesn't contain
5676 else if (giv->mult_val == const0_rtx || giv->replaceable)
5679 /* The only way we can allow this giv to derive another
5680 is if this is a biv increment and we can form the product
5681 of biv->add_val and giv->mult_val. In this case, we will
5682 be able to compute a compensation. */
5683 else if (biv->insn == p)
5687 if (biv->mult_val == const1_rtx)
5688 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
5693 if (tem && giv->derive_adjustment)
5694 tem = simplify_giv_expr (gen_rtx_PLUS (giv->mode, tem,
5695 giv->derive_adjustment),
5698 giv->derive_adjustment = tem;
5700 giv->cant_derive = 1;
5702 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5703 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5704 giv->cant_derive = 1;
5709 /* Check whether an insn is an increment legitimate for a basic induction var.
5710 X is the source of insn P, or a part of it.
5711 MODE is the mode in which X should be interpreted.
5713 DEST_REG is the putative biv, also the destination of the insn.
5714 We accept patterns of these forms:
5715 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5716 REG = INVARIANT + REG
5718 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5719 store the additive term into *INC_VAL, and store the place where
5720 we found the additive term into *LOCATION.
5722 If X is an assignment of an invariant into DEST_REG, we set
5723 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5725 We also want to detect a BIV when it corresponds to a variable
5726 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5727 of the variable may be a PLUS that adds a SUBREG of that variable to
5728 an invariant and then sign- or zero-extends the result of the PLUS
5731 Most GIVs in such cases will be in the promoted mode, since that is the
5732 probably the natural computation mode (and almost certainly the mode
5733 used for addresses) on the machine. So we view the pseudo-reg containing
5734 the variable as the BIV, as if it were simply incremented.
5736 Note that treating the entire pseudo as a BIV will result in making
5737 simple increments to any GIVs based on it. However, if the variable
5738 overflows in its declared mode but not its promoted mode, the result will
5739 be incorrect. This is acceptable if the variable is signed, since
5740 overflows in such cases are undefined, but not if it is unsigned, since
5741 those overflows are defined. So we only check for SIGN_EXTEND and
5744 If we cannot find a biv, we return 0. */
5747 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val, location)
5749 enum machine_mode mode;
5756 register enum rtx_code code;
5760 code = GET_CODE (x);
5764 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5765 || (GET_CODE (XEXP (x, 0)) == SUBREG
5766 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5767 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5769 argp = &XEXP (x, 1);
5771 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5772 || (GET_CODE (XEXP (x, 1)) == SUBREG
5773 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5774 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5776 argp = &XEXP (x, 0);
5782 if (invariant_p (arg) != 1)
5785 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5786 *mult_val = const1_rtx;
5791 /* If this is a SUBREG for a promoted variable, check the inner
5793 if (SUBREG_PROMOTED_VAR_P (x))
5794 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
5795 dest_reg, p, inc_val, mult_val, location);
5799 /* If this register is assigned in a previous insn, look at its
5800 source, but don't go outside the loop or past a label. */
5806 insn = PREV_INSN (insn);
5807 } while (insn && GET_CODE (insn) == NOTE
5808 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5812 set = single_set (insn);
5816 if ((SET_DEST (set) == x
5817 || (GET_CODE (SET_DEST (set)) == SUBREG
5818 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
5820 && SUBREG_REG (SET_DEST (set)) == x))
5821 && basic_induction_var (SET_SRC (set),
5822 (GET_MODE (SET_SRC (set)) == VOIDmode
5824 : GET_MODE (SET_SRC (set))),
5826 inc_val, mult_val, location))
5829 /* ... fall through ... */
5831 /* Can accept constant setting of biv only when inside inner most loop.
5832 Otherwise, a biv of an inner loop may be incorrectly recognized
5833 as a biv of the outer loop,
5834 causing code to be moved INTO the inner loop. */
5836 if (invariant_p (x) != 1)
5841 /* convert_modes aborts if we try to convert to or from CCmode, so just
5842 exclude that case. It is very unlikely that a condition code value
5843 would be a useful iterator anyways. */
5844 if (loops_enclosed == 1
5845 && GET_MODE_CLASS (mode) != MODE_CC
5846 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
5848 /* Possible bug here? Perhaps we don't know the mode of X. */
5849 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5850 *mult_val = const0_rtx;
5857 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5858 dest_reg, p, inc_val, mult_val, location);
5861 /* Similar, since this can be a sign extension. */
5862 for (insn = PREV_INSN (p);
5863 (insn && GET_CODE (insn) == NOTE
5864 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5865 insn = PREV_INSN (insn))
5869 set = single_set (insn);
5871 if (set && SET_DEST (set) == XEXP (x, 0)
5872 && GET_CODE (XEXP (x, 1)) == CONST_INT
5873 && INTVAL (XEXP (x, 1)) >= 0
5874 && GET_CODE (SET_SRC (set)) == ASHIFT
5875 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5876 return basic_induction_var (XEXP (SET_SRC (set), 0),
5877 GET_MODE (XEXP (x, 0)),
5878 dest_reg, insn, inc_val, mult_val,
5887 /* A general induction variable (giv) is any quantity that is a linear
5888 function of a basic induction variable,
5889 i.e. giv = biv * mult_val + add_val.
5890 The coefficients can be any loop invariant quantity.
5891 A giv need not be computed directly from the biv;
5892 it can be computed by way of other givs. */
5894 /* Determine whether X computes a giv.
5895 If it does, return a nonzero value
5896 which is the benefit from eliminating the computation of X;
5897 set *SRC_REG to the register of the biv that it is computed from;
5898 set *ADD_VAL and *MULT_VAL to the coefficients,
5899 such that the value of X is biv * mult + add; */
5902 general_induction_var (x, src_reg, add_val, mult_val, is_addr, pbenefit)
5913 /* If this is an invariant, forget it, it isn't a giv. */
5914 if (invariant_p (x) == 1)
5917 /* See if the expression could be a giv and get its form.
5918 Mark our place on the obstack in case we don't find a giv. */
5919 storage = (char *) oballoc (0);
5921 x = simplify_giv_expr (x, pbenefit);
5928 switch (GET_CODE (x))
5932 /* Since this is now an invariant and wasn't before, it must be a giv
5933 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5935 *src_reg = loop_iv_list->biv->dest_reg;
5936 *mult_val = const0_rtx;
5941 /* This is equivalent to a BIV. */
5943 *mult_val = const1_rtx;
5944 *add_val = const0_rtx;
5948 /* Either (plus (biv) (invar)) or
5949 (plus (mult (biv) (invar_1)) (invar_2)). */
5950 if (GET_CODE (XEXP (x, 0)) == MULT)
5952 *src_reg = XEXP (XEXP (x, 0), 0);
5953 *mult_val = XEXP (XEXP (x, 0), 1);
5957 *src_reg = XEXP (x, 0);
5958 *mult_val = const1_rtx;
5960 *add_val = XEXP (x, 1);
5964 /* ADD_VAL is zero. */
5965 *src_reg = XEXP (x, 0);
5966 *mult_val = XEXP (x, 1);
5967 *add_val = const0_rtx;
5974 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5975 unless they are CONST_INT). */
5976 if (GET_CODE (*add_val) == USE)
5977 *add_val = XEXP (*add_val, 0);
5978 if (GET_CODE (*mult_val) == USE)
5979 *mult_val = XEXP (*mult_val, 0);
5984 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
5986 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
5990 *pbenefit += rtx_cost (orig_x, SET);
5992 /* Always return true if this is a giv so it will be detected as such,
5993 even if the benefit is zero or negative. This allows elimination
5994 of bivs that might otherwise not be eliminated. */
5998 /* Given an expression, X, try to form it as a linear function of a biv.
5999 We will canonicalize it to be of the form
6000 (plus (mult (BIV) (invar_1))
6002 with possible degeneracies.
6004 The invariant expressions must each be of a form that can be used as a
6005 machine operand. We surround then with a USE rtx (a hack, but localized
6006 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6007 routine; it is the caller's responsibility to strip them.
6009 If no such canonicalization is possible (i.e., two biv's are used or an
6010 expression that is neither invariant nor a biv or giv), this routine
6013 For a non-zero return, the result will have a code of CONST_INT, USE,
6014 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6016 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6018 static rtx sge_plus PROTO ((enum machine_mode, rtx, rtx));
6019 static rtx sge_plus_constant PROTO ((rtx, rtx));
6022 simplify_giv_expr (x, benefit)
6026 enum machine_mode mode = GET_MODE (x);
6030 /* If this is not an integer mode, or if we cannot do arithmetic in this
6031 mode, this can't be a giv. */
6032 if (mode != VOIDmode
6033 && (GET_MODE_CLASS (mode) != MODE_INT
6034 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6037 switch (GET_CODE (x))
6040 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6041 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6042 if (arg0 == 0 || arg1 == 0)
6045 /* Put constant last, CONST_INT last if both constant. */
6046 if ((GET_CODE (arg0) == USE
6047 || GET_CODE (arg0) == CONST_INT)
6048 && ! ((GET_CODE (arg0) == USE
6049 && GET_CODE (arg1) == USE)
6050 || GET_CODE (arg1) == CONST_INT))
6051 tem = arg0, arg0 = arg1, arg1 = tem;
6053 /* Handle addition of zero, then addition of an invariant. */
6054 if (arg1 == const0_rtx)
6056 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6057 switch (GET_CODE (arg0))
6061 /* Adding two invariants must result in an invariant, so enclose
6062 addition operation inside a USE and return it. */
6063 if (GET_CODE (arg0) == USE)
6064 arg0 = XEXP (arg0, 0);
6065 if (GET_CODE (arg1) == USE)
6066 arg1 = XEXP (arg1, 0);
6068 if (GET_CODE (arg0) == CONST_INT)
6069 tem = arg0, arg0 = arg1, arg1 = tem;
6070 if (GET_CODE (arg1) == CONST_INT)
6071 tem = sge_plus_constant (arg0, arg1);
6073 tem = sge_plus (mode, arg0, arg1);
6075 if (GET_CODE (tem) != CONST_INT)
6076 tem = gen_rtx_USE (mode, tem);
6081 /* biv + invar or mult + invar. Return sum. */
6082 return gen_rtx_PLUS (mode, arg0, arg1);
6085 /* (a + invar_1) + invar_2. Associate. */
6086 return simplify_giv_expr (
6087 gen_rtx_PLUS (mode, XEXP (arg0, 0),
6088 gen_rtx_PLUS (mode, XEXP (arg0, 1), arg1)),
6095 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6096 MULT to reduce cases. */
6097 if (GET_CODE (arg0) == REG)
6098 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6099 if (GET_CODE (arg1) == REG)
6100 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6102 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6103 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6104 Recurse to associate the second PLUS. */
6105 if (GET_CODE (arg1) == MULT)
6106 tem = arg0, arg0 = arg1, arg1 = tem;
6108 if (GET_CODE (arg1) == PLUS)
6109 return simplify_giv_expr (gen_rtx_PLUS (mode,
6110 gen_rtx_PLUS (mode, arg0,
6115 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6116 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6119 if (!rtx_equal_p (arg0, arg1))
6122 return simplify_giv_expr (gen_rtx_MULT (mode,
6130 /* Handle "a - b" as "a + b * (-1)". */
6131 return simplify_giv_expr (gen_rtx_PLUS (mode,
6133 gen_rtx_MULT (mode, XEXP (x, 1),
6138 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6139 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6140 if (arg0 == 0 || arg1 == 0)
6143 /* Put constant last, CONST_INT last if both constant. */
6144 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6145 && GET_CODE (arg1) != CONST_INT)
6146 tem = arg0, arg0 = arg1, arg1 = tem;
6148 /* If second argument is not now constant, not giv. */
6149 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6152 /* Handle multiply by 0 or 1. */
6153 if (arg1 == const0_rtx)
6156 else if (arg1 == const1_rtx)
6159 switch (GET_CODE (arg0))
6162 /* biv * invar. Done. */
6163 return gen_rtx_MULT (mode, arg0, arg1);
6166 /* Product of two constants. */
6167 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6170 /* invar * invar. It is a giv, but very few of these will
6171 actually pay off, so limit to simple registers. */
6172 if (GET_CODE (arg1) != CONST_INT)
6175 arg0 = XEXP (arg0, 0);
6176 if (GET_CODE (arg0) == REG)
6177 tem = gen_rtx_MULT (mode, arg0, arg1);
6178 else if (GET_CODE (arg0) == MULT
6179 && GET_CODE (XEXP (arg0, 0)) == REG
6180 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
6182 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
6183 GEN_INT (INTVAL (XEXP (arg0, 1))
6188 return gen_rtx_USE (mode, tem);
6191 /* (a * invar_1) * invar_2. Associate. */
6192 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (arg0, 0),
6199 /* (a + invar_1) * invar_2. Distribute. */
6200 return simplify_giv_expr (gen_rtx_PLUS (mode,
6214 /* Shift by constant is multiply by power of two. */
6215 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6218 return simplify_giv_expr (gen_rtx_MULT (mode,
6220 GEN_INT ((HOST_WIDE_INT) 1
6221 << INTVAL (XEXP (x, 1)))),
6225 /* "-a" is "a * (-1)" */
6226 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6230 /* "~a" is "-a - 1". Silly, but easy. */
6231 return simplify_giv_expr (gen_rtx_MINUS (mode,
6232 gen_rtx_NEG (mode, XEXP (x, 0)),
6237 /* Already in proper form for invariant. */
6241 /* If this is a new register, we can't deal with it. */
6242 if (REGNO (x) >= max_reg_before_loop)
6245 /* Check for biv or giv. */
6246 switch (REG_IV_TYPE (REGNO (x)))
6250 case GENERAL_INDUCT:
6252 struct induction *v = REG_IV_INFO (REGNO (x));
6254 /* Form expression from giv and add benefit. Ensure this giv
6255 can derive another and subtract any needed adjustment if so. */
6256 *benefit += v->benefit;
6260 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode, v->src_reg,
6263 if (v->derive_adjustment)
6264 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6265 return simplify_giv_expr (tem, benefit);
6269 /* If it isn't an induction variable, and it is invariant, we
6270 may be able to simplify things further by looking through
6271 the bits we just moved outside the loop. */
6272 if (invariant_p (x) == 1)
6276 for (m = the_movables; m ; m = m->next)
6277 if (rtx_equal_p (x, m->set_dest))
6279 /* Ok, we found a match. Substitute and simplify. */
6281 /* If we match another movable, we must use that, as
6282 this one is going away. */
6284 return simplify_giv_expr (m->match->set_dest, benefit);
6286 /* If consec is non-zero, this is a member of a group of
6287 instructions that were moved together. We handle this
6288 case only to the point of seeking to the last insn and
6289 looking for a REG_EQUAL. Fail if we don't find one. */
6294 do { tem = NEXT_INSN (tem); } while (--i > 0);
6296 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6298 tem = XEXP (tem, 0);
6302 tem = single_set (m->insn);
6304 tem = SET_SRC (tem);
6309 /* What we are most interested in is pointer
6310 arithmetic on invariants -- only take
6311 patterns we may be able to do something with. */
6312 if (GET_CODE (tem) == PLUS
6313 || GET_CODE (tem) == MULT
6314 || GET_CODE (tem) == ASHIFT
6315 || GET_CODE (tem) == CONST_INT
6316 || GET_CODE (tem) == SYMBOL_REF)
6318 tem = simplify_giv_expr (tem, benefit);
6322 else if (GET_CODE (tem) == CONST
6323 && GET_CODE (XEXP (tem, 0)) == PLUS
6324 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6325 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6327 tem = simplify_giv_expr (XEXP (tem, 0), benefit);
6338 /* Fall through to general case. */
6340 /* If invariant, return as USE (unless CONST_INT).
6341 Otherwise, not giv. */
6342 if (GET_CODE (x) == USE)
6345 if (invariant_p (x) == 1)
6347 if (GET_CODE (x) == CONST_INT)
6349 if (GET_CODE (x) == CONST
6350 && GET_CODE (XEXP (x, 0)) == PLUS
6351 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6352 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6354 return gen_rtx_USE (mode, x);
6361 /* This routine folds invariants such that there is only ever one
6362 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6365 sge_plus_constant (x, c)
6368 if (GET_CODE (x) == CONST_INT)
6369 return GEN_INT (INTVAL (x) + INTVAL (c));
6370 else if (GET_CODE (x) != PLUS)
6371 return gen_rtx_PLUS (GET_MODE (x), x, c);
6372 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6374 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6375 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6377 else if (GET_CODE (XEXP (x, 0)) == PLUS
6378 || GET_CODE (XEXP (x, 1)) != PLUS)
6380 return gen_rtx_PLUS (GET_MODE (x),
6381 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6385 return gen_rtx_PLUS (GET_MODE (x),
6386 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6391 sge_plus (mode, x, y)
6392 enum machine_mode mode;
6395 while (GET_CODE (y) == PLUS)
6397 rtx a = XEXP (y, 0);
6398 if (GET_CODE (a) == CONST_INT)
6399 x = sge_plus_constant (x, a);
6401 x = gen_rtx_PLUS (mode, x, a);
6404 if (GET_CODE (y) == CONST_INT)
6405 x = sge_plus_constant (x, y);
6407 x = gen_rtx_PLUS (mode, x, y);
6411 /* Help detect a giv that is calculated by several consecutive insns;
6415 The caller has already identified the first insn P as having a giv as dest;
6416 we check that all other insns that set the same register follow
6417 immediately after P, that they alter nothing else,
6418 and that the result of the last is still a giv.
6420 The value is 0 if the reg set in P is not really a giv.
6421 Otherwise, the value is the amount gained by eliminating
6422 all the consecutive insns that compute the value.
6424 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6425 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6427 The coefficients of the ultimate giv value are stored in
6428 *MULT_VAL and *ADD_VAL. */
6431 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
6432 add_val, mult_val, last_consec_insn)
6439 rtx *last_consec_insn;
6447 /* Indicate that this is a giv so that we can update the value produced in
6448 each insn of the multi-insn sequence.
6450 This induction structure will be used only by the call to
6451 general_induction_var below, so we can allocate it on our stack.
6452 If this is a giv, our caller will replace the induct var entry with
6453 a new induction structure. */
6455 = (struct induction *) alloca (sizeof (struct induction));
6456 v->src_reg = src_reg;
6457 v->mult_val = *mult_val;
6458 v->add_val = *add_val;
6459 v->benefit = first_benefit;
6461 v->derive_adjustment = 0;
6463 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6464 REG_IV_INFO (REGNO (dest_reg)) = v;
6466 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6471 code = GET_CODE (p);
6473 /* If libcall, skip to end of call sequence. */
6474 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6478 && (set = single_set (p))
6479 && GET_CODE (SET_DEST (set)) == REG
6480 && SET_DEST (set) == dest_reg
6481 && (general_induction_var (SET_SRC (set), &src_reg,
6482 add_val, mult_val, 0, &benefit)
6483 /* Giv created by equivalent expression. */
6484 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6485 && general_induction_var (XEXP (temp, 0), &src_reg,
6486 add_val, mult_val, 0, &benefit)))
6487 && src_reg == v->src_reg)
6489 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6490 benefit += libcall_benefit (p);
6493 v->mult_val = *mult_val;
6494 v->add_val = *add_val;
6495 v->benefit = benefit;
6497 else if (code != NOTE)
6499 /* Allow insns that set something other than this giv to a
6500 constant. Such insns are needed on machines which cannot
6501 include long constants and should not disqualify a giv. */
6503 && (set = single_set (p))
6504 && SET_DEST (set) != dest_reg
6505 && CONSTANT_P (SET_SRC (set)))
6508 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6513 *last_consec_insn = p;
6517 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6518 represented by G1. If no such expression can be found, or it is clear that
6519 it cannot possibly be a valid address, 0 is returned.
6521 To perform the computation, we note that
6524 where `v' is the biv.
6526 So G2 = (y/b) * G1 + (b - a*y/x).
6528 Note that MULT = y/x.
6530 Update: A and B are now allowed to be additive expressions such that
6531 B contains all variables in A. That is, computing B-A will not require
6532 subtracting variables. */
6535 express_from_1 (a, b, mult)
6538 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6540 if (mult == const0_rtx)
6543 /* If MULT is not 1, we cannot handle A with non-constants, since we
6544 would then be required to subtract multiples of the registers in A.
6545 This is theoretically possible, and may even apply to some Fortran
6546 constructs, but it is a lot of work and we do not attempt it here. */
6548 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6551 /* In general these structures are sorted top to bottom (down the PLUS
6552 chain), but not left to right across the PLUS. If B is a higher
6553 order giv than A, we can strip one level and recurse. If A is higher
6554 order, we'll eventually bail out, but won't know that until the end.
6555 If they are the same, we'll strip one level around this loop. */
6557 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6559 rtx ra, rb, oa, ob, tmp;
6561 ra = XEXP (a, 0), oa = XEXP (a, 1);
6562 if (GET_CODE (ra) == PLUS)
6563 tmp = ra, ra = oa, oa = tmp;
6565 rb = XEXP (b, 0), ob = XEXP (b, 1);
6566 if (GET_CODE (rb) == PLUS)
6567 tmp = rb, rb = ob, ob = tmp;
6569 if (rtx_equal_p (ra, rb))
6570 /* We matched: remove one reg completely. */
6572 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6573 /* An alternate match. */
6575 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6576 /* An alternate match. */
6580 /* Indicates an extra register in B. Strip one level from B and
6581 recurse, hoping B was the higher order expression. */
6582 ob = express_from_1 (a, ob, mult);
6585 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6589 /* Here we are at the last level of A, go through the cases hoping to
6590 get rid of everything but a constant. */
6592 if (GET_CODE (a) == PLUS)
6596 ra = XEXP (a, 0), oa = XEXP (a, 1);
6597 if (rtx_equal_p (oa, b))
6599 else if (!rtx_equal_p (ra, b))
6602 if (GET_CODE (oa) != CONST_INT)
6605 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6607 else if (GET_CODE (a) == CONST_INT)
6609 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6611 else if (GET_CODE (b) == PLUS)
6613 if (rtx_equal_p (a, XEXP (b, 0)))
6615 else if (rtx_equal_p (a, XEXP (b, 1)))
6620 else if (rtx_equal_p (a, b))
6627 express_from (g1, g2)
6628 struct induction *g1, *g2;
6632 /* The value that G1 will be multiplied by must be a constant integer. Also,
6633 the only chance we have of getting a valid address is if b*c/a (see above
6634 for notation) is also an integer. */
6635 if (GET_CODE (g1->mult_val) == CONST_INT
6636 && GET_CODE (g2->mult_val) == CONST_INT)
6638 if (g1->mult_val == const0_rtx
6639 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6641 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6643 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6647 /* ??? Find out if the one is a multiple of the other? */
6651 add = express_from_1 (g1->add_val, g2->add_val, mult);
6652 if (add == NULL_RTX)
6655 /* Form simplified final result. */
6656 if (mult == const0_rtx)
6658 else if (mult == const1_rtx)
6659 mult = g1->dest_reg;
6661 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6663 if (add == const0_rtx)
6667 if (GET_CODE (add) == PLUS
6668 && CONSTANT_P (XEXP (add, 1)))
6670 rtx tem = XEXP (add, 1);
6671 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6675 return gen_rtx_PLUS (g2->mode, mult, add);
6680 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6681 represented by G1. This indicates that G2 should be combined with G1 and
6682 that G2 can use (either directly or via an address expression) a register
6683 used to represent G1. */
6686 combine_givs_p (g1, g2)
6687 struct induction *g1, *g2;
6689 rtx tem = express_from (g1, g2);
6691 /* If these givs are identical, they can be combined. We use the results
6692 of express_from because the addends are not in a canonical form, so
6693 rtx_equal_p is a weaker test. */
6694 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6695 combination to be the other way round. */
6696 if (tem == g1->dest_reg
6697 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6699 return g1->dest_reg;
6702 /* If G2 can be expressed as a function of G1 and that function is valid
6703 as an address and no more expensive than using a register for G2,
6704 the expression of G2 in terms of G1 can be used. */
6706 && g2->giv_type == DEST_ADDR
6707 && memory_address_p (g2->mem_mode, tem)
6708 /* ??? Looses, especially with -fforce-addr, where *g2->location
6709 will always be a register, and so anything more complicated
6713 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6715 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6726 struct combine_givs_stats
6733 cmp_combine_givs_stats (x, y)
6734 struct combine_givs_stats *x, *y;
6737 d = y->total_benefit - x->total_benefit;
6738 /* Stabilize the sort. */
6740 d = x->giv_number - y->giv_number;
6744 /* If one of these givs is a DEST_REG that was used by the other giv,
6745 this is actually a single use. Return 0 if this is not
6746 the case, -1 if g1 is the DEST_REG involved, and 1 if it was g2. */
6749 combine_givs_used_by_other (g1, g2)
6750 struct induction *g1, *g2;
6752 if (g1->giv_type == DEST_REG
6753 && reg_mentioned_p (g1->dest_reg, PATTERN (g2->insn)))
6756 if (g2->giv_type == DEST_REG
6757 && reg_mentioned_p (g2->dest_reg, PATTERN (g1->insn)))
6764 combine_givs_benefit_from (g1, g2)
6765 struct induction *g1, *g2;
6767 int tmp = combine_givs_used_by_other (g1, g2);
6771 return g2->benefit - g1->benefit;
6776 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6777 any other. If so, point SAME to the giv combined with and set NEW_REG to
6778 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6779 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6783 struct iv_class *bl;
6785 struct induction *g1, *g2, **giv_array;
6786 int i, j, k, giv_count;
6787 struct combine_givs_stats *stats;
6790 /* Count givs, because bl->giv_count is incorrect here. */
6792 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6797 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
6799 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6801 giv_array[i++] = g1;
6803 stats = (struct combine_givs_stats *) alloca (giv_count * sizeof (*stats));
6804 bzero ((char *) stats, giv_count * sizeof (*stats));
6806 can_combine = (rtx *) alloca (giv_count * giv_count * sizeof(rtx));
6807 bzero ((char *) can_combine, giv_count * giv_count * sizeof(rtx));
6809 for (i = 0; i < giv_count; i++)
6815 this_benefit = g1->benefit;
6816 /* Add an additional weight for zero addends. */
6817 if (g1->no_const_addval)
6819 for (j = 0; j < giv_count; j++)
6825 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
6827 can_combine[i*giv_count + j] = this_combine;
6828 this_benefit += combine_givs_benefit_from (g1, g2);
6829 /* Add an additional weight for being reused more times. */
6833 stats[i].giv_number = i;
6834 stats[i].total_benefit = this_benefit;
6837 /* Iterate, combining until we can't. */
6839 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
6841 if (loop_dump_stream)
6843 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
6844 for (k = 0; k < giv_count; k++)
6846 g1 = giv_array[stats[k].giv_number];
6847 if (!g1->combined_with && !g1->same)
6848 fprintf (loop_dump_stream, " {%d, %d}",
6849 INSN_UID (giv_array[stats[k].giv_number]->insn),
6850 stats[k].total_benefit);
6852 putc ('\n', loop_dump_stream);
6855 for (k = 0; k < giv_count; k++)
6857 int g1_add_benefit = 0;
6859 i = stats[k].giv_number;
6862 /* If it has already been combined, skip. */
6863 if (g1->combined_with || g1->same)
6866 for (j = 0; j < giv_count; j++)
6869 if (g1 != g2 && can_combine[i*giv_count + j]
6870 /* If it has already been combined, skip. */
6871 && ! g2->same && ! g2->combined_with)
6875 g2->new_reg = can_combine[i*giv_count + j];
6877 g1->combined_with++;
6878 g1->lifetime += g2->lifetime;
6880 g1_add_benefit += combine_givs_benefit_from (g1, g2);
6882 /* ??? The new final_[bg]iv_value code does a much better job
6883 of finding replaceable giv's, and hence this code may no
6884 longer be necessary. */
6885 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
6886 g1_add_benefit -= copy_cost;
6888 /* To help optimize the next set of combinations, remove
6889 this giv from the benefits of other potential mates. */
6890 for (l = 0; l < giv_count; ++l)
6892 int m = stats[l].giv_number;
6893 if (can_combine[m*giv_count + j])
6895 /* Remove additional weight for being reused. */
6896 stats[l].total_benefit -= 3 +
6897 combine_givs_benefit_from (giv_array[m], g2);
6901 if (loop_dump_stream)
6902 fprintf (loop_dump_stream,
6903 "giv at %d combined with giv at %d\n",
6904 INSN_UID (g2->insn), INSN_UID (g1->insn));
6908 /* To help optimize the next set of combinations, remove
6909 this giv from the benefits of other potential mates. */
6910 if (g1->combined_with)
6912 for (j = 0; j < giv_count; ++j)
6914 int m = stats[j].giv_number;
6915 if (can_combine[m*giv_count + j])
6917 /* Remove additional weight for being reused. */
6918 stats[j].total_benefit -= 3 +
6919 combine_givs_benefit_from (giv_array[m], g1);
6923 g1->benefit += g1_add_benefit;
6925 /* We've finished with this giv, and everything it touched.
6926 Restart the combination so that proper weights for the
6927 rest of the givs are properly taken into account. */
6928 /* ??? Ideally we would compact the arrays at this point, so
6929 as to not cover old ground. But sanely compacting
6930 can_combine is tricky. */
6936 struct recombine_givs_stats
6939 int start_luid, end_luid;
6942 /* Used below as comparison function for qsort. We want a ascending luid
6943 when scanning the array starting at the end, thus the arguments are
6946 cmp_recombine_givs_stats (x, y)
6947 struct recombine_givs_stats *x, *y;
6950 d = y->start_luid - x->start_luid;
6951 /* Stabilize the sort. */
6953 d = y->giv_number - x->giv_number;
6957 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
6958 look for the start of life of a giv where the start has not been seen
6959 yet to unlock the search for the end of its life.
6960 Only consider givs that belong to BIV.
6961 Return the total number of lifetime ends that have been found. */
6963 find_life_end (x, stats, insn, biv)
6965 struct recombine_givs_stats *stats;
6972 code = GET_CODE (x);
6977 rtx reg = SET_DEST (x);
6978 if (GET_CODE (reg) == REG)
6980 int regno = REGNO (reg);
6981 struct induction *v = REG_IV_INFO (regno);
6983 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
6985 && v->src_reg == biv
6986 && stats[v->ix].end_luid <= 0)
6988 /* If we see a 0 here for end_luid, it means that we have
6989 scanned the entire loop without finding any use at all.
6990 We must not predicate this code on a start_luid match
6991 since that would make the test fail for givs that have
6992 been hoisted out of inner loops. */
6993 if (stats[v->ix].end_luid == 0)
6995 stats[v->ix].end_luid = stats[v->ix].start_luid;
6996 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
6998 else if (stats[v->ix].start_luid == INSN_LUID (insn))
6999 stats[v->ix].end_luid = 0;
7001 return find_life_end (SET_SRC (x), stats, insn, biv);
7007 int regno = REGNO (x);
7008 struct induction *v = REG_IV_INFO (regno);
7010 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7012 && v->src_reg == biv
7013 && stats[v->ix].end_luid == 0)
7015 while (INSN_UID (insn) >= max_uid_for_loop)
7016 insn = NEXT_INSN (insn);
7017 stats[v->ix].end_luid = INSN_LUID (insn);
7030 fmt = GET_RTX_FORMAT (code);
7032 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7035 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7037 else if (fmt[i] == 'E')
7038 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7039 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7044 /* For each giv that has been combined with another, look if
7045 we can combine it with the most recently used one instead.
7046 This tends to shorten giv lifetimes, and helps the next step:
7047 try to derive givs from other givs. */
7049 recombine_givs (bl, loop_start, loop_end, unroll_p)
7050 struct iv_class *bl;
7051 rtx loop_start, loop_end;
7054 struct induction *v, **giv_array, *last_giv;
7055 struct recombine_givs_stats *stats;
7058 int ends_need_computing;
7060 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7066 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7067 stats = (struct recombine_givs_stats *) alloca (giv_count * sizeof *stats);
7069 /* Initialize stats and set up the ix field for each giv in stats to name
7070 the corresponding index into stats. */
7071 for (i = 0, v = bl->giv; v; v = v->next_iv)
7078 stats[i].giv_number = i;
7079 /* If this giv has been hoisted out of an inner loop, use the luid of
7080 the previous insn. */
7081 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7083 stats[i].start_luid = INSN_LUID (p);
7088 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7090 /* Do the actual most-recently-used recombination. */
7091 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7093 v = giv_array[stats[i].giv_number];
7096 struct induction *old_same = v->same;
7099 /* combine_givs_p actually says if we can make this transformation.
7100 The other tests are here only to avoid keeping a giv alive
7101 that could otherwise be eliminated. */
7103 && ((old_same->maybe_dead && ! old_same->combined_with)
7104 || ! last_giv->maybe_dead
7105 || last_giv->combined_with)
7106 && (new_combine = combine_givs_p (last_giv, v)))
7108 old_same->combined_with--;
7109 v->new_reg = new_combine;
7111 last_giv->combined_with++;
7112 /* No need to update lifetimes / benefits here since we have
7113 already decided what to reduce. */
7118 else if (v->giv_type != DEST_REG)
7121 || (last_giv->maybe_dead && ! last_giv->combined_with)
7123 || v->combined_with)
7127 ends_need_computing = 0;
7128 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7129 lifetime ends from regscan info. */
7130 for (i = 0, v = bl->giv; v; v = v->next_iv)
7134 if (v->giv_type == DEST_ADDR)
7136 /* Loop unrolling of an inner loop can even create new DEST_REG
7139 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7141 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7143 stats[i].end_luid++;
7145 else /* v->giv_type == DEST_REG */
7149 stats[i].start_luid = INSN_LUID (v->insn);
7150 stats[i].end_luid = INSN_LUID (v->last_use);
7152 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7155 /* This insn has been created by loop optimization on an inner
7156 loop. We don't have a proper start_luid that will match
7157 when we see the first set. But we do know that there will
7158 be no use before the set, so we can set end_luid to 0 so that
7159 we'll start looking for the last use right away. */
7160 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7162 stats[i].start_luid = INSN_LUID (p);
7163 stats[i].end_luid = 0;
7164 ends_need_computing++;
7168 int regno = REGNO (v->dest_reg);
7169 int count = VARRAY_INT (n_times_set, regno) - 1;
7172 /* Find the first insn that sets the giv, so that we can verify
7173 if this giv's lifetime wraps around the loop. We also need
7174 the luid of the first setting insn in order to detect the
7175 last use properly. */
7178 p = prev_nonnote_insn (p);
7179 if (reg_set_p (v->dest_reg, p))
7183 stats[i].start_luid = INSN_LUID (p);
7184 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7186 stats[i].end_luid = -1;
7187 ends_need_computing++;
7191 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7192 if (stats[i].end_luid > INSN_LUID (loop_end))
7194 stats[i].end_luid = -1;
7195 ends_need_computing++;
7203 /* If the regscan information was unconclusive for one or more DEST_REG
7204 givs, scan the all insn in the loop to find out lifetime ends. */
7205 if (ends_need_computing)
7207 rtx biv = bl->biv->src_reg;
7212 if (p == loop_start)
7215 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7217 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7219 while (ends_need_computing);
7222 /* Set start_luid back to the last insn that sets the giv. This allows
7223 more combinations. */
7224 for (i = 0, v = bl->giv; v; v = v->next_iv)
7228 if (INSN_UID (v->insn) < max_uid_for_loop)
7229 stats[i].start_luid = INSN_LUID (v->insn);
7233 /* Now adjust lifetime ends by taking combined givs into account. */
7234 for (i = 0, v = bl->giv; v; v = v->next_iv)
7241 if (v->same && ! v->same->ignore)
7244 luid = stats[i].start_luid;
7245 /* Use unsigned arithmetic to model loop wrap-around. */
7246 if (luid - stats[j].start_luid
7247 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7248 stats[j].end_luid = luid;
7253 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7255 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7256 same mult_val and non-overlapping lifetime. This reduces register
7258 Once we find a DEST_REG giv that is suitable to derive others from,
7259 we set last_giv to this giv, and try to derive as many other DEST_REG
7260 givs from it without joining overlapping lifetimes. If we then
7261 encounter a DEST_REG giv that we can't derive, we set rescan to the
7262 index for this giv (unless rescan is already set).
7263 When we are finished with the current LAST_GIV (i.e. the inner loop
7264 terminates), we start again with rescan, which then becomes the new
7266 for (i = giv_count - 1; i >= 0; i = rescan)
7268 int life_start, life_end;
7270 for (last_giv = 0, rescan = -1; i >= 0; i--)
7274 v = giv_array[stats[i].giv_number];
7275 if (v->giv_type != DEST_REG || v->derived || v->same)
7280 life_start = stats[i].start_luid;
7281 life_end = stats[i].end_luid;
7284 /* Use unsigned arithmetic to model loop wrap around. */
7285 if (((unsigned) stats[i].start_luid - life_start
7286 >= (unsigned) life_end - life_start)
7287 && ((unsigned) stats[i].end_luid - life_start
7288 >= (unsigned) life_end - life_start)
7289 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7290 /* ??? Could handle libcalls, but would need more logic. */
7291 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7292 /* We would really like to know if for any giv that v
7293 is combined with, v->insn or any intervening biv increment
7294 dominates that combined giv. However, we
7295 don't have this detailed control flow information.
7296 N.B. since last_giv will be reduced, it is valid
7297 anywhere in the loop, so we don't need to check the
7298 validity of last_giv. */
7299 && (v->always_executed || ! v->combined_with)
7300 && (sum = express_from (last_giv, v))
7301 /* Make sure we don't make the add more expensive. ADD_COST
7302 doesn't take different costs of registers and constants into
7303 account, so compare the cost of the actual SET_SRCs. */
7304 && (rtx_cost (sum, SET)
7305 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7306 /* ??? unroll can't understand anything but reg + const_int
7307 sums. It would be cleaner to fix unroll. */
7308 && ((GET_CODE (sum) == PLUS
7309 && GET_CODE (XEXP (sum, 0)) == REG
7310 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7312 && validate_change (v->insn, &PATTERN (v->insn),
7313 gen_rtx_SET (GET_MODE (v->dest_reg),
7314 v->dest_reg, sum), 0))
7317 v->new_reg = v->dest_reg;
7318 life_end = stats[i].end_luid;
7320 else if (rescan < 0)
7326 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7329 emit_iv_add_mult (b, m, a, reg, insert_before)
7330 rtx b; /* initial value of basic induction variable */
7331 rtx m; /* multiplicative constant */
7332 rtx a; /* additive constant */
7333 rtx reg; /* destination register */
7339 /* Prevent unexpected sharing of these rtx. */
7343 /* Increase the lifetime of any invariants moved further in code. */
7344 update_reg_last_use (a, insert_before);
7345 update_reg_last_use (b, insert_before);
7346 update_reg_last_use (m, insert_before);
7349 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7351 emit_move_insn (reg, result);
7352 seq = gen_sequence ();
7355 emit_insn_before (seq, insert_before);
7357 /* It is entirely possible that the expansion created lots of new
7358 registers. Iterate over the sequence we just created and
7361 if (GET_CODE (seq) == SEQUENCE)
7364 for (i = 0; i < XVECLEN (seq, 0); ++i)
7366 rtx set = single_set (XVECEXP (seq, 0, i));
7367 if (set && GET_CODE (SET_DEST (set)) == REG)
7368 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7371 else if (GET_CODE (seq) == SET
7372 && GET_CODE (SET_DEST (seq)) == REG)
7373 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7376 /* Test whether A * B can be computed without
7377 an actual multiply insn. Value is 1 if so. */
7380 product_cheap_p (a, b)
7386 struct obstack *old_rtl_obstack = rtl_obstack;
7387 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7390 /* If only one is constant, make it B. */
7391 if (GET_CODE (a) == CONST_INT)
7392 tmp = a, a = b, b = tmp;
7394 /* If first constant, both constant, so don't need multiply. */
7395 if (GET_CODE (a) == CONST_INT)
7398 /* If second not constant, neither is constant, so would need multiply. */
7399 if (GET_CODE (b) != CONST_INT)
7402 /* One operand is constant, so might not need multiply insn. Generate the
7403 code for the multiply and see if a call or multiply, or long sequence
7404 of insns is generated. */
7406 rtl_obstack = &temp_obstack;
7408 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7409 tmp = gen_sequence ();
7412 if (GET_CODE (tmp) == SEQUENCE)
7414 if (XVEC (tmp, 0) == 0)
7416 else if (XVECLEN (tmp, 0) > 3)
7419 for (i = 0; i < XVECLEN (tmp, 0); i++)
7421 rtx insn = XVECEXP (tmp, 0, i);
7423 if (GET_CODE (insn) != INSN
7424 || (GET_CODE (PATTERN (insn)) == SET
7425 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7426 || (GET_CODE (PATTERN (insn)) == PARALLEL
7427 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7428 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7435 else if (GET_CODE (tmp) == SET
7436 && GET_CODE (SET_SRC (tmp)) == MULT)
7438 else if (GET_CODE (tmp) == PARALLEL
7439 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7440 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7443 /* Free any storage we obtained in generating this multiply and restore rtl
7444 allocation to its normal obstack. */
7445 obstack_free (&temp_obstack, storage);
7446 rtl_obstack = old_rtl_obstack;
7451 /* Check to see if loop can be terminated by a "decrement and branch until
7452 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7453 Also try reversing an increment loop to a decrement loop
7454 to see if the optimization can be performed.
7455 Value is nonzero if optimization was performed. */
7457 /* This is useful even if the architecture doesn't have such an insn,
7458 because it might change a loops which increments from 0 to n to a loop
7459 which decrements from n to 0. A loop that decrements to zero is usually
7460 faster than one that increments from zero. */
7462 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7463 such as approx_final_value, biv_total_increment, loop_iterations, and
7464 final_[bg]iv_value. */
7467 check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
7471 struct loop_info *loop_info;
7473 struct iv_class *bl;
7480 rtx before_comparison;
7484 int compare_and_branch;
7486 /* If last insn is a conditional branch, and the insn before tests a
7487 register value, try to optimize it. Otherwise, we can't do anything. */
7489 jump = PREV_INSN (loop_end);
7490 comparison = get_condition_for_loop (jump);
7491 if (comparison == 0)
7494 /* Try to compute whether the compare/branch at the loop end is one or
7495 two instructions. */
7496 get_condition (jump, &first_compare);
7497 if (first_compare == jump)
7498 compare_and_branch = 1;
7499 else if (first_compare == prev_nonnote_insn (jump))
7500 compare_and_branch = 2;
7504 /* Check all of the bivs to see if the compare uses one of them.
7505 Skip biv's set more than once because we can't guarantee that
7506 it will be zero on the last iteration. Also skip if the biv is
7507 used between its update and the test insn. */
7509 for (bl = loop_iv_list; bl; bl = bl->next)
7511 if (bl->biv_count == 1
7512 && bl->biv->dest_reg == XEXP (comparison, 0)
7513 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7521 /* Look for the case where the basic induction variable is always
7522 nonnegative, and equals zero on the last iteration.
7523 In this case, add a reg_note REG_NONNEG, which allows the
7524 m68k DBRA instruction to be used. */
7526 if (((GET_CODE (comparison) == GT
7527 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7528 && INTVAL (XEXP (comparison, 1)) == -1)
7529 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7530 && GET_CODE (bl->biv->add_val) == CONST_INT
7531 && INTVAL (bl->biv->add_val) < 0)
7533 /* Initial value must be greater than 0,
7534 init_val % -dec_value == 0 to ensure that it equals zero on
7535 the last iteration */
7537 if (GET_CODE (bl->initial_value) == CONST_INT
7538 && INTVAL (bl->initial_value) > 0
7539 && (INTVAL (bl->initial_value)
7540 % (-INTVAL (bl->biv->add_val))) == 0)
7542 /* register always nonnegative, add REG_NOTE to branch */
7543 REG_NOTES (PREV_INSN (loop_end))
7544 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7545 REG_NOTES (PREV_INSN (loop_end)));
7551 /* If the decrement is 1 and the value was tested as >= 0 before
7552 the loop, then we can safely optimize. */
7553 for (p = loop_start; p; p = PREV_INSN (p))
7555 if (GET_CODE (p) == CODE_LABEL)
7557 if (GET_CODE (p) != JUMP_INSN)
7560 before_comparison = get_condition_for_loop (p);
7561 if (before_comparison
7562 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7563 && GET_CODE (before_comparison) == LT
7564 && XEXP (before_comparison, 1) == const0_rtx
7565 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7566 && INTVAL (bl->biv->add_val) == -1)
7568 REG_NOTES (PREV_INSN (loop_end))
7569 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7570 REG_NOTES (PREV_INSN (loop_end)));
7577 else if (INTVAL (bl->biv->add_val) > 0)
7579 /* Try to change inc to dec, so can apply above optimization. */
7581 all registers modified are induction variables or invariant,
7582 all memory references have non-overlapping addresses
7583 (obviously true if only one write)
7584 allow 2 insns for the compare/jump at the end of the loop. */
7585 /* Also, we must avoid any instructions which use both the reversed
7586 biv and another biv. Such instructions will fail if the loop is
7587 reversed. We meet this condition by requiring that either
7588 no_use_except_counting is true, or else that there is only
7590 int num_nonfixed_reads = 0;
7591 /* 1 if the iteration var is used only to count iterations. */
7592 int no_use_except_counting = 0;
7593 /* 1 if the loop has no memory store, or it has a single memory store
7594 which is reversible. */
7595 int reversible_mem_store = 1;
7597 if (bl->giv_count == 0
7598 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
7600 rtx bivreg = regno_reg_rtx[bl->regno];
7602 /* If there are no givs for this biv, and the only exit is the
7603 fall through at the end of the loop, then
7604 see if perhaps there are no uses except to count. */
7605 no_use_except_counting = 1;
7606 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7607 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7609 rtx set = single_set (p);
7611 if (set && GET_CODE (SET_DEST (set)) == REG
7612 && REGNO (SET_DEST (set)) == bl->regno)
7613 /* An insn that sets the biv is okay. */
7615 else if (p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7616 || p == prev_nonnote_insn (loop_end))
7617 /* Don't bother about the end test. */
7619 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7621 no_use_except_counting = 0;
7627 if (no_use_except_counting)
7628 ; /* no need to worry about MEMs. */
7629 else if (num_mem_sets <= 1)
7631 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7632 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7633 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
7635 /* If the loop has a single store, and the destination address is
7636 invariant, then we can't reverse the loop, because this address
7637 might then have the wrong value at loop exit.
7638 This would work if the source was invariant also, however, in that
7639 case, the insn should have been moved out of the loop. */
7641 if (num_mem_sets == 1)
7642 reversible_mem_store
7643 = (! unknown_address_altered
7644 && ! invariant_p (XEXP (loop_store_mems, 0)));
7649 /* This code only acts for innermost loops. Also it simplifies
7650 the memory address check by only reversing loops with
7651 zero or one memory access.
7652 Two memory accesses could involve parts of the same array,
7653 and that can't be reversed.
7654 If the biv is used only for counting, than we don't need to worry
7655 about all these things. */
7657 if ((num_nonfixed_reads <= 1
7659 && !loop_has_volatile
7660 && reversible_mem_store
7661 && (bl->giv_count + bl->biv_count + num_mem_sets
7662 + num_movables + compare_and_branch == insn_count)
7663 && (bl == loop_iv_list && bl->next == 0))
7664 || no_use_except_counting)
7668 /* Loop can be reversed. */
7669 if (loop_dump_stream)
7670 fprintf (loop_dump_stream, "Can reverse loop\n");
7672 /* Now check other conditions:
7674 The increment must be a constant, as must the initial value,
7675 and the comparison code must be LT.
7677 This test can probably be improved since +/- 1 in the constant
7678 can be obtained by changing LT to LE and vice versa; this is
7682 /* for constants, LE gets turned into LT */
7683 && (GET_CODE (comparison) == LT
7684 || (GET_CODE (comparison) == LE
7685 && no_use_except_counting)))
7687 HOST_WIDE_INT add_val, add_adjust, comparison_val;
7688 rtx initial_value, comparison_value;
7690 enum rtx_code cmp_code;
7691 int comparison_const_width;
7692 unsigned HOST_WIDE_INT comparison_sign_mask;
7694 add_val = INTVAL (bl->biv->add_val);
7695 comparison_value = XEXP (comparison, 1);
7696 if (GET_MODE (comparison_value) == VOIDmode)
7697 comparison_const_width
7698 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
7700 comparison_const_width
7701 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
7702 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
7703 comparison_const_width = HOST_BITS_PER_WIDE_INT;
7704 comparison_sign_mask
7705 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
7707 /* If the comparison value is not a loop invariant, then we
7708 can not reverse this loop.
7710 ??? If the insns which initialize the comparison value as
7711 a whole compute an invariant result, then we could move
7712 them out of the loop and proceed with loop reversal. */
7713 if (!invariant_p (comparison_value))
7716 if (GET_CODE (comparison_value) == CONST_INT)
7717 comparison_val = INTVAL (comparison_value);
7718 initial_value = bl->initial_value;
7720 /* Normalize the initial value if it is an integer and
7721 has no other use except as a counter. This will allow
7722 a few more loops to be reversed. */
7723 if (no_use_except_counting
7724 && GET_CODE (comparison_value) == CONST_INT
7725 && GET_CODE (initial_value) == CONST_INT)
7727 comparison_val = comparison_val - INTVAL (bl->initial_value);
7728 /* The code below requires comparison_val to be a multiple
7729 of add_val in order to do the loop reversal, so
7730 round up comparison_val to a multiple of add_val.
7731 Since comparison_value is constant, we know that the
7732 current comparison code is LT. */
7733 comparison_val = comparison_val + add_val - 1;
7735 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
7736 /* We postpone overflow checks for COMPARISON_VAL here;
7737 even if there is an overflow, we might still be able to
7738 reverse the loop, if converting the loop exit test to
7740 initial_value = const0_rtx;
7743 /* First check if we can do a vanilla loop reversal. */
7744 if (initial_value == const0_rtx
7745 /* If we have a decrement_and_branch_on_count, prefer
7746 the NE test, since this will allow that instruction to
7747 be generated. Note that we must use a vanilla loop
7748 reversal if the biv is used to calculate a giv or has
7749 a non-counting use. */
7750 #if ! defined (HAVE_decrement_and_branch_until_zero) && defined (HAVE_decrement_and_branch_on_count)
7751 && (! (add_val == 1 && loop_info->vtop
7752 && (bl->biv_count == 0
7753 || no_use_except_counting)))
7755 && GET_CODE (comparison_value) == CONST_INT
7756 /* Now do postponed overflow checks on COMPARISON_VAL. */
7757 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
7758 & comparison_sign_mask))
7760 /* Register will always be nonnegative, with value
7761 0 on last iteration */
7762 add_adjust = add_val;
7766 else if (add_val == 1 && loop_info->vtop
7767 && (bl->biv_count == 0
7768 || no_use_except_counting))
7776 if (GET_CODE (comparison) == LE)
7777 add_adjust -= add_val;
7779 /* If the initial value is not zero, or if the comparison
7780 value is not an exact multiple of the increment, then we
7781 can not reverse this loop. */
7782 if (initial_value == const0_rtx
7783 && GET_CODE (comparison_value) == CONST_INT)
7785 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
7790 if (! no_use_except_counting || add_val != 1)
7794 final_value = comparison_value;
7796 /* Reset these in case we normalized the initial value
7797 and comparison value above. */
7798 if (GET_CODE (comparison_value) == CONST_INT
7799 && GET_CODE (initial_value) == CONST_INT)
7801 comparison_value = GEN_INT (comparison_val);
7803 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
7805 bl->initial_value = initial_value;
7807 /* Save some info needed to produce the new insns. */
7808 reg = bl->biv->dest_reg;
7809 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
7810 if (jump_label == pc_rtx)
7811 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
7812 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
7814 /* Set start_value; if this is not a CONST_INT, we need
7816 Initialize biv to start_value before loop start.
7817 The old initializing insn will be deleted as a
7818 dead store by flow.c. */
7819 if (initial_value == const0_rtx
7820 && GET_CODE (comparison_value) == CONST_INT)
7822 start_value = GEN_INT (comparison_val - add_adjust);
7823 emit_insn_before (gen_move_insn (reg, start_value),
7826 else if (GET_CODE (initial_value) == CONST_INT)
7828 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
7829 enum machine_mode mode = GET_MODE (reg);
7830 enum insn_code icode
7831 = add_optab->handlers[(int) mode].insn_code;
7832 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
7833 || ! ((*insn_operand_predicate[icode][1])
7834 (comparison_value, mode))
7835 || ! (*insn_operand_predicate[icode][2]) (offset, mode))
7838 = gen_rtx_PLUS (mode, comparison_value, offset);
7839 emit_insn_before ((GEN_FCN (icode)
7840 (reg, comparison_value, offset)),
7842 if (GET_CODE (comparison) == LE)
7843 final_value = gen_rtx_PLUS (mode, comparison_value,
7846 else if (! add_adjust)
7848 enum machine_mode mode = GET_MODE (reg);
7849 enum insn_code icode
7850 = sub_optab->handlers[(int) mode].insn_code;
7851 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
7852 || ! ((*insn_operand_predicate[icode][1])
7853 (comparison_value, mode))
7854 || ! ((*insn_operand_predicate[icode][2])
7855 (initial_value, mode)))
7858 = gen_rtx_MINUS (mode, comparison_value, initial_value);
7859 emit_insn_before ((GEN_FCN (icode)
7860 (reg, comparison_value, initial_value)),
7864 /* We could handle the other cases too, but it'll be
7865 better to have a testcase first. */
7868 /* We may not have a single insn which can increment a reg, so
7869 create a sequence to hold all the insns from expand_inc. */
7871 expand_inc (reg, new_add_val);
7872 tem = gen_sequence ();
7875 p = emit_insn_before (tem, bl->biv->insn);
7876 delete_insn (bl->biv->insn);
7878 /* Update biv info to reflect its new status. */
7880 bl->initial_value = start_value;
7881 bl->biv->add_val = new_add_val;
7883 /* Update loop info. */
7884 loop_info->initial_value = reg;
7885 loop_info->initial_equiv_value = reg;
7886 loop_info->final_value = const0_rtx;
7887 loop_info->final_equiv_value = const0_rtx;
7888 loop_info->comparison_value = const0_rtx;
7889 loop_info->comparison_code = cmp_code;
7890 loop_info->increment = new_add_val;
7892 /* Inc LABEL_NUSES so that delete_insn will
7893 not delete the label. */
7894 LABEL_NUSES (XEXP (jump_label, 0)) ++;
7896 /* Emit an insn after the end of the loop to set the biv's
7897 proper exit value if it is used anywhere outside the loop. */
7898 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
7900 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
7901 emit_insn_after (gen_move_insn (reg, final_value),
7904 /* Delete compare/branch at end of loop. */
7905 delete_insn (PREV_INSN (loop_end));
7906 if (compare_and_branch == 2)
7907 delete_insn (first_compare);
7909 /* Add new compare/branch insn at end of loop. */
7911 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
7912 GET_MODE (reg), 0, 0,
7913 XEXP (jump_label, 0));
7914 tem = gen_sequence ();
7916 emit_jump_insn_before (tem, loop_end);
7918 for (tem = PREV_INSN (loop_end);
7919 tem && GET_CODE (tem) != JUMP_INSN;
7920 tem = PREV_INSN (tem))
7924 JUMP_LABEL (tem) = XEXP (jump_label, 0);
7930 /* Increment of LABEL_NUSES done above. */
7931 /* Register is now always nonnegative,
7932 so add REG_NONNEG note to the branch. */
7933 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7939 /* Mark that this biv has been reversed. Each giv which depends
7940 on this biv, and which is also live past the end of the loop
7941 will have to be fixed up. */
7945 if (loop_dump_stream)
7946 fprintf (loop_dump_stream,
7947 "Reversed loop and added reg_nonneg\n");
7957 /* Verify whether the biv BL appears to be eliminable,
7958 based on the insns in the loop that refer to it.
7959 LOOP_START is the first insn of the loop, and END is the end insn.
7961 If ELIMINATE_P is non-zero, actually do the elimination.
7963 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
7964 determine whether invariant insns should be placed inside or at the
7965 start of the loop. */
7968 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
7969 struct iv_class *bl;
7973 int threshold, insn_count;
7975 rtx reg = bl->biv->dest_reg;
7978 /* Scan all insns in the loop, stopping if we find one that uses the
7979 biv in a way that we cannot eliminate. */
7981 for (p = loop_start; p != end; p = NEXT_INSN (p))
7983 enum rtx_code code = GET_CODE (p);
7984 rtx where = threshold >= insn_count ? loop_start : p;
7986 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
7987 && reg_mentioned_p (reg, PATTERN (p))
7988 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
7990 if (loop_dump_stream)
7991 fprintf (loop_dump_stream,
7992 "Cannot eliminate biv %d: biv used in insn %d.\n",
7993 bl->regno, INSN_UID (p));
8000 if (loop_dump_stream)
8001 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8002 bl->regno, eliminate_p ? "was" : "can be");
8009 /* If BL appears in X (part of the pattern of INSN), see if we can
8010 eliminate its use. If so, return 1. If not, return 0.
8012 If BIV does not appear in X, return 1.
8014 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8015 where extra insns should be added. Depending on how many items have been
8016 moved out of the loop, it will either be before INSN or at the start of
8020 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
8022 struct iv_class *bl;
8026 enum rtx_code code = GET_CODE (x);
8027 rtx reg = bl->biv->dest_reg;
8028 enum machine_mode mode = GET_MODE (reg);
8029 struct induction *v;
8041 /* If we haven't already been able to do something with this BIV,
8042 we can't eliminate it. */
8048 /* If this sets the BIV, it is not a problem. */
8049 if (SET_DEST (x) == reg)
8052 /* If this is an insn that defines a giv, it is also ok because
8053 it will go away when the giv is reduced. */
8054 for (v = bl->giv; v; v = v->next_iv)
8055 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8059 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8061 /* Can replace with any giv that was reduced and
8062 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8063 Require a constant for MULT_VAL, so we know it's nonzero.
8064 ??? We disable this optimization to avoid potential
8067 for (v = bl->giv; v; v = v->next_iv)
8068 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8069 && v->add_val == const0_rtx
8070 && ! v->ignore && ! v->maybe_dead && v->always_computable
8074 /* If the giv V had the auto-inc address optimization applied
8075 to it, and INSN occurs between the giv insn and the biv
8076 insn, then we must adjust the value used here.
8077 This is rare, so we don't bother to do so. */
8079 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8080 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8081 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8082 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8088 /* If the giv has the opposite direction of change,
8089 then reverse the comparison. */
8090 if (INTVAL (v->mult_val) < 0)
8091 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8092 const0_rtx, v->new_reg);
8096 /* We can probably test that giv's reduced reg. */
8097 if (validate_change (insn, &SET_SRC (x), new, 0))
8101 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8102 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8103 Require a constant for MULT_VAL, so we know it's nonzero.
8104 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8105 overflow problem. */
8107 for (v = bl->giv; v; v = v->next_iv)
8108 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8109 && ! v->ignore && ! v->maybe_dead && v->always_computable
8111 && (GET_CODE (v->add_val) == SYMBOL_REF
8112 || GET_CODE (v->add_val) == LABEL_REF
8113 || GET_CODE (v->add_val) == CONST
8114 || (GET_CODE (v->add_val) == REG
8115 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8117 /* If the giv V had the auto-inc address optimization applied
8118 to it, and INSN occurs between the giv insn and the biv
8119 insn, then we must adjust the value used here.
8120 This is rare, so we don't bother to do so. */
8122 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8123 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8124 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8125 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8131 /* If the giv has the opposite direction of change,
8132 then reverse the comparison. */
8133 if (INTVAL (v->mult_val) < 0)
8134 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8137 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8138 copy_rtx (v->add_val));
8140 /* Replace biv with the giv's reduced register. */
8141 update_reg_last_use (v->add_val, insn);
8142 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8145 /* Insn doesn't support that constant or invariant. Copy it
8146 into a register (it will be a loop invariant.) */
8147 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8149 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8152 /* Substitute the new register for its invariant value in
8153 the compare expression. */
8154 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8155 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8164 case GT: case GE: case GTU: case GEU:
8165 case LT: case LE: case LTU: case LEU:
8166 /* See if either argument is the biv. */
8167 if (XEXP (x, 0) == reg)
8168 arg = XEXP (x, 1), arg_operand = 1;
8169 else if (XEXP (x, 1) == reg)
8170 arg = XEXP (x, 0), arg_operand = 0;
8174 if (CONSTANT_P (arg))
8176 /* First try to replace with any giv that has constant positive
8177 mult_val and constant add_val. We might be able to support
8178 negative mult_val, but it seems complex to do it in general. */
8180 for (v = bl->giv; v; v = v->next_iv)
8181 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8182 && (GET_CODE (v->add_val) == SYMBOL_REF
8183 || GET_CODE (v->add_val) == LABEL_REF
8184 || GET_CODE (v->add_val) == CONST
8185 || (GET_CODE (v->add_val) == REG
8186 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8187 && ! v->ignore && ! v->maybe_dead && v->always_computable
8190 /* If the giv V had the auto-inc address optimization applied
8191 to it, and INSN occurs between the giv insn and the biv
8192 insn, then we must adjust the value used here.
8193 This is rare, so we don't bother to do so. */
8195 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8196 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8197 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8198 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8204 /* Replace biv with the giv's reduced reg. */
8205 XEXP (x, 1-arg_operand) = v->new_reg;
8207 /* If all constants are actually constant integers and
8208 the derived constant can be directly placed in the COMPARE,
8210 if (GET_CODE (arg) == CONST_INT
8211 && GET_CODE (v->mult_val) == CONST_INT
8212 && GET_CODE (v->add_val) == CONST_INT
8213 && validate_change (insn, &XEXP (x, arg_operand),
8214 GEN_INT (INTVAL (arg)
8215 * INTVAL (v->mult_val)
8216 + INTVAL (v->add_val)), 0))
8219 /* Otherwise, load it into a register. */
8220 tem = gen_reg_rtx (mode);
8221 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8222 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
8225 /* If that failed, put back the change we made above. */
8226 XEXP (x, 1-arg_operand) = reg;
8229 /* Look for giv with positive constant mult_val and nonconst add_val.
8230 Insert insns to calculate new compare value.
8231 ??? Turn this off due to possible overflow. */
8233 for (v = bl->giv; v; v = v->next_iv)
8234 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8235 && ! v->ignore && ! v->maybe_dead && v->always_computable
8241 /* If the giv V had the auto-inc address optimization applied
8242 to it, and INSN occurs between the giv insn and the biv
8243 insn, then we must adjust the value used here.
8244 This is rare, so we don't bother to do so. */
8246 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8247 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8248 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8249 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8255 tem = gen_reg_rtx (mode);
8257 /* Replace biv with giv's reduced register. */
8258 validate_change (insn, &XEXP (x, 1 - arg_operand),
8261 /* Compute value to compare against. */
8262 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8263 /* Use it in this insn. */
8264 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8265 if (apply_change_group ())
8269 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8271 if (invariant_p (arg) == 1)
8273 /* Look for giv with constant positive mult_val and nonconst
8274 add_val. Insert insns to compute new compare value.
8275 ??? Turn this off due to possible overflow. */
8277 for (v = bl->giv; v; v = v->next_iv)
8278 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8279 && ! v->ignore && ! v->maybe_dead && v->always_computable
8285 /* If the giv V had the auto-inc address optimization applied
8286 to it, and INSN occurs between the giv insn and the biv
8287 insn, then we must adjust the value used here.
8288 This is rare, so we don't bother to do so. */
8290 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8291 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8292 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8293 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8299 tem = gen_reg_rtx (mode);
8301 /* Replace biv with giv's reduced register. */
8302 validate_change (insn, &XEXP (x, 1 - arg_operand),
8305 /* Compute value to compare against. */
8306 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8308 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8309 if (apply_change_group ())
8314 /* This code has problems. Basically, you can't know when
8315 seeing if we will eliminate BL, whether a particular giv
8316 of ARG will be reduced. If it isn't going to be reduced,
8317 we can't eliminate BL. We can try forcing it to be reduced,
8318 but that can generate poor code.
8320 The problem is that the benefit of reducing TV, below should
8321 be increased if BL can actually be eliminated, but this means
8322 we might have to do a topological sort of the order in which
8323 we try to process biv. It doesn't seem worthwhile to do
8324 this sort of thing now. */
8327 /* Otherwise the reg compared with had better be a biv. */
8328 if (GET_CODE (arg) != REG
8329 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8332 /* Look for a pair of givs, one for each biv,
8333 with identical coefficients. */
8334 for (v = bl->giv; v; v = v->next_iv)
8336 struct induction *tv;
8338 if (v->ignore || v->maybe_dead || v->mode != mode)
8341 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8342 if (! tv->ignore && ! tv->maybe_dead
8343 && rtx_equal_p (tv->mult_val, v->mult_val)
8344 && rtx_equal_p (tv->add_val, v->add_val)
8345 && tv->mode == mode)
8347 /* If the giv V had the auto-inc address optimization applied
8348 to it, and INSN occurs between the giv insn and the biv
8349 insn, then we must adjust the value used here.
8350 This is rare, so we don't bother to do so. */
8352 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8353 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8354 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8355 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8361 /* Replace biv with its giv's reduced reg. */
8362 XEXP (x, 1-arg_operand) = v->new_reg;
8363 /* Replace other operand with the other giv's
8365 XEXP (x, arg_operand) = tv->new_reg;
8372 /* If we get here, the biv can't be eliminated. */
8376 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8377 biv is used in it, since it will be replaced. */
8378 for (v = bl->giv; v; v = v->next_iv)
8379 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8387 /* See if any subexpression fails elimination. */
8388 fmt = GET_RTX_FORMAT (code);
8389 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8394 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
8395 eliminate_p, where))
8400 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8401 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
8402 eliminate_p, where))
8411 /* Return nonzero if the last use of REG
8412 is in an insn following INSN in the same basic block. */
8415 last_use_this_basic_block (reg, insn)
8421 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8424 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8430 /* Called via `note_stores' to record the initial value of a biv. Here we
8431 just record the location of the set and process it later. */
8434 record_initial (dest, set)
8438 struct iv_class *bl;
8440 if (GET_CODE (dest) != REG
8441 || REGNO (dest) >= max_reg_before_loop
8442 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
8445 bl = reg_biv_class[REGNO (dest)];
8447 /* If this is the first set found, record it. */
8448 if (bl->init_insn == 0)
8450 bl->init_insn = note_insn;
8455 /* If any of the registers in X are "old" and currently have a last use earlier
8456 than INSN, update them to have a last use of INSN. Their actual last use
8457 will be the previous insn but it will not have a valid uid_luid so we can't
8461 update_reg_last_use (x, insn)
8465 /* Check for the case where INSN does not have a valid luid. In this case,
8466 there is no need to modify the regno_last_uid, as this can only happen
8467 when code is inserted after the loop_end to set a pseudo's final value,
8468 and hence this insn will never be the last use of x. */
8469 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8470 && INSN_UID (insn) < max_uid_for_loop
8471 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8472 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8476 register char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8477 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8480 update_reg_last_use (XEXP (x, i), insn);
8481 else if (fmt[i] == 'E')
8482 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8483 update_reg_last_use (XVECEXP (x, i, j), insn);
8488 /* Given a jump insn JUMP, return the condition that will cause it to branch
8489 to its JUMP_LABEL. If the condition cannot be understood, or is an
8490 inequality floating-point comparison which needs to be reversed, 0 will
8493 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8494 insn used in locating the condition was found. If a replacement test
8495 of the condition is desired, it should be placed in front of that
8496 insn and we will be sure that the inputs are still valid.
8498 The condition will be returned in a canonical form to simplify testing by
8499 callers. Specifically:
8501 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8502 (2) Both operands will be machine operands; (cc0) will have been replaced.
8503 (3) If an operand is a constant, it will be the second operand.
8504 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8505 for GE, GEU, and LEU. */
8508 get_condition (jump, earliest)
8517 int reverse_code = 0;
8518 int did_reverse_condition = 0;
8519 enum machine_mode mode;
8521 /* If this is not a standard conditional jump, we can't parse it. */
8522 if (GET_CODE (jump) != JUMP_INSN
8523 || ! condjump_p (jump) || simplejump_p (jump))
8526 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
8527 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
8528 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
8529 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
8534 /* If this branches to JUMP_LABEL when the condition is false, reverse
8536 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
8537 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
8538 code = reverse_condition (code), did_reverse_condition ^= 1;
8540 /* If we are comparing a register with zero, see if the register is set
8541 in the previous insn to a COMPARE or a comparison operation. Perform
8542 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8545 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
8547 /* Set non-zero when we find something of interest. */
8551 /* If comparison with cc0, import actual comparison from compare
8555 if ((prev = prev_nonnote_insn (prev)) == 0
8556 || GET_CODE (prev) != INSN
8557 || (set = single_set (prev)) == 0
8558 || SET_DEST (set) != cc0_rtx)
8561 op0 = SET_SRC (set);
8562 op1 = CONST0_RTX (GET_MODE (op0));
8568 /* If this is a COMPARE, pick up the two things being compared. */
8569 if (GET_CODE (op0) == COMPARE)
8571 op1 = XEXP (op0, 1);
8572 op0 = XEXP (op0, 0);
8575 else if (GET_CODE (op0) != REG)
8578 /* Go back to the previous insn. Stop if it is not an INSN. We also
8579 stop if it isn't a single set or if it has a REG_INC note because
8580 we don't want to bother dealing with it. */
8582 if ((prev = prev_nonnote_insn (prev)) == 0
8583 || GET_CODE (prev) != INSN
8584 || FIND_REG_INC_NOTE (prev, 0)
8585 || (set = single_set (prev)) == 0)
8588 /* If this is setting OP0, get what it sets it to if it looks
8590 if (rtx_equal_p (SET_DEST (set), op0))
8592 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
8594 /* ??? We may not combine comparisons done in a CCmode with
8595 comparisons not done in a CCmode. This is to aid targets
8596 like Alpha that have an IEEE compliant EQ instruction, and
8597 a non-IEEE compliant BEQ instruction. The use of CCmode is
8598 actually artificial, simply to prevent the combination, but
8599 should not affect other platforms.
8601 However, we must allow VOIDmode comparisons to match either
8602 CCmode or non-CCmode comparison, because some ports have
8603 modeless comparisons inside branch patterns.
8605 ??? This mode check should perhaps look more like the mode check
8606 in simplify_comparison in combine. */
8608 if ((GET_CODE (SET_SRC (set)) == COMPARE
8611 && GET_MODE_CLASS (inner_mode) == MODE_INT
8612 && (GET_MODE_BITSIZE (inner_mode)
8613 <= HOST_BITS_PER_WIDE_INT)
8614 && (STORE_FLAG_VALUE
8615 & ((HOST_WIDE_INT) 1
8616 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8617 #ifdef FLOAT_STORE_FLAG_VALUE
8619 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8620 && FLOAT_STORE_FLAG_VALUE < 0)
8623 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
8624 && (((GET_MODE_CLASS (mode) == MODE_CC)
8625 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8626 || mode == VOIDmode || inner_mode == VOIDmode))
8628 else if (((code == EQ
8630 && (GET_MODE_BITSIZE (inner_mode)
8631 <= HOST_BITS_PER_WIDE_INT)
8632 && GET_MODE_CLASS (inner_mode) == MODE_INT
8633 && (STORE_FLAG_VALUE
8634 & ((HOST_WIDE_INT) 1
8635 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8636 #ifdef FLOAT_STORE_FLAG_VALUE
8638 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8639 && FLOAT_STORE_FLAG_VALUE < 0)
8642 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
8643 && (((GET_MODE_CLASS (mode) == MODE_CC)
8644 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8645 || mode == VOIDmode || inner_mode == VOIDmode))
8648 /* We might have reversed a LT to get a GE here. But this wasn't
8649 actually the comparison of data, so we don't flag that we
8650 have had to reverse the condition. */
8651 did_reverse_condition ^= 1;
8659 else if (reg_set_p (op0, prev))
8660 /* If this sets OP0, but not directly, we have to give up. */
8665 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
8666 code = GET_CODE (x);
8669 code = reverse_condition (code);
8670 did_reverse_condition ^= 1;
8674 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
8680 /* If constant is first, put it last. */
8681 if (CONSTANT_P (op0))
8682 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
8684 /* If OP0 is the result of a comparison, we weren't able to find what
8685 was really being compared, so fail. */
8686 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
8689 /* Canonicalize any ordered comparison with integers involving equality
8690 if we can do computations in the relevant mode and we do not
8693 if (GET_CODE (op1) == CONST_INT
8694 && GET_MODE (op0) != VOIDmode
8695 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
8697 HOST_WIDE_INT const_val = INTVAL (op1);
8698 unsigned HOST_WIDE_INT uconst_val = const_val;
8699 unsigned HOST_WIDE_INT max_val
8700 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
8705 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
8706 code = LT, op1 = GEN_INT (const_val + 1);
8709 /* When cross-compiling, const_val might be sign-extended from
8710 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
8712 if ((HOST_WIDE_INT) (const_val & max_val)
8713 != (((HOST_WIDE_INT) 1
8714 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
8715 code = GT, op1 = GEN_INT (const_val - 1);
8719 if (uconst_val < max_val)
8720 code = LTU, op1 = GEN_INT (uconst_val + 1);
8724 if (uconst_val != 0)
8725 code = GTU, op1 = GEN_INT (uconst_val - 1);
8733 /* If this was floating-point and we reversed anything other than an
8734 EQ or NE, return zero. */
8735 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
8736 && did_reverse_condition && code != NE && code != EQ
8738 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
8742 /* Never return CC0; return zero instead. */
8747 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
8750 /* Similar to above routine, except that we also put an invariant last
8751 unless both operands are invariants. */
8754 get_condition_for_loop (x)
8757 rtx comparison = get_condition (x, NULL_PTR);
8760 || ! invariant_p (XEXP (comparison, 0))
8761 || invariant_p (XEXP (comparison, 1)))
8764 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
8765 XEXP (comparison, 1), XEXP (comparison, 0));
8768 #ifdef HAVE_decrement_and_branch_on_count
8769 /* Instrument loop for insertion of bct instruction. We distinguish between
8770 loops with compile-time bounds and those with run-time bounds.
8771 Information from loop_iterations() is used to compute compile-time bounds.
8772 Run-time bounds should use loop preconditioning, but currently ignored.
8776 insert_bct (loop_start, loop_end, loop_info)
8777 rtx loop_start, loop_end;
8778 struct loop_info *loop_info;
8781 unsigned HOST_WIDE_INT n_iterations;
8784 int increment_direction, compare_direction;
8786 /* If the loop condition is <= or >=, the number of iteration
8787 is 1 more than the range of the bounds of the loop. */
8788 int add_iteration = 0;
8790 enum machine_mode loop_var_mode = word_mode;
8793 int loop_num = uid_loop_num [INSN_UID (loop_start)];
8795 /* It's impossible to instrument a competely unrolled loop. */
8796 if (loop_info->unroll_number == -1)
8799 /* Make sure that the count register is not in use. */
8800 if (loop_used_count_register [loop_num])
8802 if (loop_dump_stream)
8803 fprintf (loop_dump_stream,
8804 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
8809 /* Make sure that the function has no indirect jumps. */
8810 if (indirect_jump_in_function)
8812 if (loop_dump_stream)
8813 fprintf (loop_dump_stream,
8814 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
8819 /* Make sure that the last loop insn is a conditional jump. */
8820 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
8821 || ! condjump_p (PREV_INSN (loop_end))
8822 || simplejump_p (PREV_INSN (loop_end)))
8824 if (loop_dump_stream)
8825 fprintf (loop_dump_stream,
8826 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
8831 /* Make sure that the loop does not contain a function call
8832 (the count register might be altered by the called function). */
8835 if (loop_dump_stream)
8836 fprintf (loop_dump_stream,
8837 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
8842 /* Make sure that the loop does not jump via a table.
8843 (the count register might be used to perform the branch on table). */
8844 if (loop_has_tablejump)
8846 if (loop_dump_stream)
8847 fprintf (loop_dump_stream,
8848 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
8853 /* Account for loop unrolling in instrumented iteration count. */
8854 if (loop_info->unroll_number > 1)
8855 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
8857 n_iterations = loop_info->n_iterations;
8859 if (n_iterations != 0 && n_iterations < 3)
8861 /* Allow an enclosing outer loop to benefit if possible. */
8862 if (loop_dump_stream)
8863 fprintf (loop_dump_stream,
8864 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
8869 /* Try to instrument the loop. */
8871 /* Handle the simpler case, where the bounds are known at compile time. */
8872 if (n_iterations > 0)
8874 /* Mark all enclosing loops that they cannot use count register. */
8875 for (i = loop_num; i != -1; i = loop_outer_loop[i])
8876 loop_used_count_register[i] = 1;
8877 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
8881 /* Handle the more complex case, that the bounds are NOT known
8882 at compile time. In this case we generate run_time calculation
8883 of the number of iterations. */
8885 if (loop_info->iteration_var == 0)
8887 if (loop_dump_stream)
8888 fprintf (loop_dump_stream,
8889 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
8894 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
8895 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
8897 if (loop_dump_stream)
8898 fprintf (loop_dump_stream,
8899 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
8904 /* With runtime bounds, if the compare is of the form '!=' we give up */
8905 if (loop_info->comparison_code == NE)
8907 if (loop_dump_stream)
8908 fprintf (loop_dump_stream,
8909 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
8913 /* Use common loop preconditioning code instead. */
8917 /* We rely on the existence of run-time guard to ensure that the
8918 loop executes at least once. */
8920 rtx iterations_num_reg;
8922 unsigned HOST_WIDE_INT increment_value_abs
8923 = INTVAL (increment) * increment_direction;
8925 /* make sure that the increment is a power of two, otherwise (an
8926 expensive) divide is needed. */
8927 if (exact_log2 (increment_value_abs) == -1)
8929 if (loop_dump_stream)
8930 fprintf (loop_dump_stream,
8931 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
8935 /* compute the number of iterations */
8940 /* Again, the number of iterations is calculated by:
8942 ; compare-val - initial-val + (increment -1) + additional-iteration
8943 ; num_iterations = -----------------------------------------------------------------
8946 /* ??? Do we have to call copy_rtx here before passing rtx to
8948 if (compare_direction > 0)
8950 /* <, <= :the loop variable is increasing */
8951 temp_reg = expand_binop (loop_var_mode, sub_optab,
8952 comparison_value, initial_value,
8953 NULL_RTX, 0, OPTAB_LIB_WIDEN);
8957 temp_reg = expand_binop (loop_var_mode, sub_optab,
8958 initial_value, comparison_value,
8959 NULL_RTX, 0, OPTAB_LIB_WIDEN);
8962 if (increment_value_abs - 1 + add_iteration != 0)
8963 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
8964 GEN_INT (increment_value_abs - 1
8966 NULL_RTX, 0, OPTAB_LIB_WIDEN);
8968 if (increment_value_abs != 1)
8970 /* ??? This will generate an expensive divide instruction for
8971 most targets. The original authors apparently expected this
8972 to be a shift, since they test for power-of-2 divisors above,
8973 but just naively generating a divide instruction will not give
8974 a shift. It happens to work for the PowerPC target because
8975 the rs6000.md file has a divide pattern that emits shifts.
8976 It will probably not work for any other target. */
8977 iterations_num_reg = expand_binop (loop_var_mode, sdiv_optab,
8979 GEN_INT (increment_value_abs),
8980 NULL_RTX, 0, OPTAB_LIB_WIDEN);
8983 iterations_num_reg = temp_reg;
8985 sequence = gen_sequence ();
8987 emit_insn_before (sequence, loop_start);
8988 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
8992 #endif /* Complex case */
8995 /* Instrument loop by inserting a bct in it as follows:
8996 1. A new counter register is created.
8997 2. In the head of the loop the new variable is initialized to the value
8998 passed in the loop_num_iterations parameter.
8999 3. At the end of the loop, comparison of the register with 0 is generated.
9000 The created comparison follows the pattern defined for the
9001 decrement_and_branch_on_count insn, so this insn will be generated.
9002 4. The branch on the old variable are deleted. The compare must remain
9003 because it might be used elsewhere. If the loop-variable or condition
9004 register are used elsewhere, they will be eliminated by flow. */
9007 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9008 rtx loop_start, loop_end;
9009 rtx loop_num_iterations;
9015 if (HAVE_decrement_and_branch_on_count)
9017 if (loop_dump_stream)
9019 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9020 if (GET_CODE (loop_num_iterations) == CONST_INT)
9021 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9022 INTVAL (loop_num_iterations));
9024 fputs ("runtime", loop_dump_stream);
9025 fputs (" iterations)", loop_dump_stream);
9028 /* Discard original jump to continue loop. Original compare result
9029 may still be live, so it cannot be discarded explicitly. */
9030 delete_insn (PREV_INSN (loop_end));
9032 /* Insert the label which will delimit the start of the loop. */
9033 start_label = gen_label_rtx ();
9034 emit_label_after (start_label, loop_start);
9036 /* Insert initialization of the count register into the loop header. */
9038 counter_reg = gen_reg_rtx (word_mode);
9039 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9040 sequence = gen_sequence ();
9042 emit_insn_before (sequence, loop_start);
9044 /* Insert new comparison on the count register instead of the
9045 old one, generating the needed BCT pattern (that will be
9046 later recognized by assembly generation phase). */
9047 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
9050 LABEL_NUSES (start_label)++;
9054 #endif /* HAVE_decrement_and_branch_on_count */
9056 /* Scan the function and determine whether it has indirect (computed) jumps.
9058 This is taken mostly from flow.c; similar code exists elsewhere
9059 in the compiler. It may be useful to put this into rtlanal.c. */
9061 indirect_jump_in_function_p (start)
9066 for (insn = start; insn; insn = NEXT_INSN (insn))
9067 if (computed_jump_p (insn))
9073 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9074 documentation for LOOP_MEMS for the definition of `appropriate'.
9075 This function is called from prescan_loop via for_each_rtx. */
9078 insert_loop_mem (mem, data)
9080 void *data ATTRIBUTE_UNUSED;
9088 switch (GET_CODE (m))
9094 /* We're not interested in the MEM associated with a
9095 CONST_DOUBLE, so there's no need to traverse into this. */
9099 /* This is not a MEM. */
9103 /* See if we've already seen this MEM. */
9104 for (i = 0; i < loop_mems_idx; ++i)
9105 if (rtx_equal_p (m, loop_mems[i].mem))
9107 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9108 /* The modes of the two memory accesses are different. If
9109 this happens, something tricky is going on, and we just
9110 don't optimize accesses to this MEM. */
9111 loop_mems[i].optimize = 0;
9116 /* Resize the array, if necessary. */
9117 if (loop_mems_idx == loop_mems_allocated)
9119 if (loop_mems_allocated != 0)
9120 loop_mems_allocated *= 2;
9122 loop_mems_allocated = 32;
9124 loop_mems = (loop_mem_info*)
9125 xrealloc (loop_mems,
9126 loop_mems_allocated * sizeof (loop_mem_info));
9129 /* Actually insert the MEM. */
9130 loop_mems[loop_mems_idx].mem = m;
9131 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9132 because we can't put it in a register. We still store it in the
9133 table, though, so that if we see the same address later, but in a
9134 non-BLK mode, we'll not think we can optimize it at that point. */
9135 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9136 loop_mems[loop_mems_idx].reg = NULL_RTX;
9142 /* Like load_mems, but also ensures that SET_IN_LOOP,
9143 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9144 values after load_mems. */
9147 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top, start,
9148 reg_single_usage, insn_count)
9153 varray_type reg_single_usage;
9156 int nregs = max_reg_num ();
9158 load_mems (scan_start, end, loop_top, start);
9160 /* Recalculate set_in_loop and friends since load_mems may have
9161 created new registers. */
9162 if (max_reg_num () > nregs)
9168 nregs = max_reg_num ();
9170 if ((unsigned) nregs > set_in_loop->num_elements)
9172 /* Grow all the arrays. */
9173 VARRAY_GROW (set_in_loop, nregs);
9174 VARRAY_GROW (n_times_set, nregs);
9175 VARRAY_GROW (may_not_optimize, nregs);
9176 if (reg_single_usage)
9177 VARRAY_GROW (reg_single_usage, nregs);
9179 /* Clear the arrays */
9180 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9181 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9182 if (reg_single_usage)
9183 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9185 count_loop_regs_set (loop_top ? loop_top : start, end,
9186 may_not_optimize, reg_single_usage,
9189 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9191 VARRAY_CHAR (may_not_optimize, i) = 1;
9192 VARRAY_INT (set_in_loop, i) = 1;
9195 #ifdef AVOID_CCMODE_COPIES
9196 /* Don't try to move insns which set CC registers if we should not
9197 create CCmode register copies. */
9198 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9199 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9200 VARRAY_CHAR (may_not_optimize, i) = 1;
9203 /* Set n_times_set for the new registers. */
9204 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9205 (char *) (&n_times_set->data.i[0] + old_nregs),
9206 (nregs - old_nregs) * sizeof (int));
9210 /* Move MEMs into registers for the duration of the loop. SCAN_START
9211 is the first instruction in the loop (as it is executed). The
9212 other parameters are as for next_insn_in_loop. */
9215 load_mems (scan_start, end, loop_top, start)
9221 int maybe_never = 0;
9224 rtx label = NULL_RTX;
9227 if (loop_mems_idx > 0)
9229 /* Nonzero if the next instruction may never be executed. */
9230 int next_maybe_never = 0;
9232 /* Check to see if it's possible that some instructions in the
9233 loop are never executed. */
9234 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9235 p != NULL_RTX && !maybe_never;
9236 p = next_insn_in_loop (p, scan_start, end, loop_top))
9238 if (GET_CODE (p) == CODE_LABEL)
9240 else if (GET_CODE (p) == JUMP_INSN
9241 /* If we enter the loop in the middle, and scan
9242 around to the beginning, don't set maybe_never
9243 for that. This must be an unconditional jump,
9244 otherwise the code at the top of the loop might
9245 never be executed. Unconditional jumps are
9246 followed a by barrier then loop end. */
9247 && ! (GET_CODE (p) == JUMP_INSN
9248 && JUMP_LABEL (p) == loop_top
9249 && NEXT_INSN (NEXT_INSN (p)) == end
9250 && simplejump_p (p)))
9252 if (!condjump_p (p))
9253 /* Something complicated. */
9256 /* If there are any more instructions in the loop, they
9257 might not be reached. */
9258 next_maybe_never = 1;
9260 else if (next_maybe_never)
9264 /* Actually move the MEMs. */
9265 for (i = 0; i < loop_mems_idx; ++i)
9269 rtx mem = loop_mems[i].mem;
9272 if (MEM_VOLATILE_P (mem)
9273 || invariant_p (XEXP (mem, 0)) != 1)
9274 /* There's no telling whether or not MEM is modified. */
9275 loop_mems[i].optimize = 0;
9277 /* Go through the MEMs written to in the loop to see if this
9278 one is aliased by one of them. */
9279 mem_list_entry = loop_store_mems;
9280 while (mem_list_entry)
9282 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9284 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9287 /* MEM is indeed aliased by this store. */
9288 loop_mems[i].optimize = 0;
9291 mem_list_entry = XEXP (mem_list_entry, 1);
9294 /* If this MEM is written to, we must be sure that there
9295 are no reads from another MEM that aliases this one. */
9296 if (loop_mems[i].optimize && written)
9300 for (j = 0; j < loop_mems_idx; ++j)
9304 else if (true_dependence (mem,
9309 /* It's not safe to hoist loop_mems[i] out of
9310 the loop because writes to it might not be
9311 seen by reads from loop_mems[j]. */
9312 loop_mems[i].optimize = 0;
9318 if (maybe_never && may_trap_p (mem))
9319 /* We can't access the MEM outside the loop; it might
9320 cause a trap that wouldn't have happened otherwise. */
9321 loop_mems[i].optimize = 0;
9323 if (!loop_mems[i].optimize)
9324 /* We thought we were going to lift this MEM out of the
9325 loop, but later discovered that we could not. */
9328 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9329 order to keep scan_loop from moving stores to this MEM
9330 out of the loop just because this REG is neither a
9331 user-variable nor used in the loop test. */
9332 reg = gen_reg_rtx (GET_MODE (mem));
9333 REG_USERVAR_P (reg) = 1;
9334 loop_mems[i].reg = reg;
9336 /* Now, replace all references to the MEM with the
9337 corresponding pesudos. */
9338 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9340 p = next_insn_in_loop (p, scan_start, end, loop_top))
9345 for_each_rtx (&p, replace_loop_mem, &ri);
9348 if (!apply_change_group ())
9349 /* We couldn't replace all occurrences of the MEM. */
9350 loop_mems[i].optimize = 0;
9355 /* Load the memory immediately before START, which is
9356 the NOTE_LOOP_BEG. */
9357 set = gen_rtx_SET (GET_MODE (reg), reg, mem);
9358 emit_insn_before (set, start);
9362 if (label == NULL_RTX)
9364 /* We must compute the former
9365 right-after-the-end label before we insert
9367 end_label = next_label (end);
9368 label = gen_label_rtx ();
9369 emit_label_after (label, end);
9372 /* Store the memory immediately after END, which is
9373 the NOTE_LOOP_END. */
9374 set = gen_rtx_SET (GET_MODE (reg), copy_rtx (mem), reg);
9375 emit_insn_after (set, label);
9378 if (loop_dump_stream)
9380 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9381 REGNO (reg), (written ? "r/w" : "r/o"));
9382 print_rtl (loop_dump_stream, mem);
9383 fputc ('\n', loop_dump_stream);
9389 if (label != NULL_RTX)
9391 /* Now, we need to replace all references to the previous exit
9392 label with the new one. */
9397 for (p = start; p != end; p = NEXT_INSN (p))
9399 for_each_rtx (&p, replace_label, &rr);
9401 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9402 field. This is not handled by for_each_rtx because it doesn't
9403 handle unprinted ('0') fields. We need to update JUMP_LABEL
9404 because the immediately following unroll pass will use it.
9405 replace_label would not work anyways, because that only handles
9407 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9408 JUMP_LABEL (p) = label;
9413 /* Replace MEM with its associated pseudo register. This function is
9414 called from load_mems via for_each_rtx. DATA is actually an
9415 rtx_and_int * describing the instruction currently being scanned
9416 and the MEM we are currently replacing. */
9419 replace_loop_mem (mem, data)
9431 switch (GET_CODE (m))
9437 /* We're not interested in the MEM associated with a
9438 CONST_DOUBLE, so there's no need to traverse into one. */
9442 /* This is not a MEM. */
9446 ri = (rtx_and_int*) data;
9449 if (!rtx_equal_p (loop_mems[i].mem, m))
9450 /* This is not the MEM we are currently replacing. */
9455 /* Actually replace the MEM. */
9456 validate_change (insn, mem, loop_mems[i].reg, 1);
9461 /* Replace occurrences of the old exit label for the loop with the new
9462 one. DATA is an rtx_pair containing the old and new labels,
9466 replace_label (x, data)
9471 rtx old_label = ((rtx_pair*) data)->r1;
9472 rtx new_label = ((rtx_pair*) data)->r2;
9477 if (GET_CODE (l) != LABEL_REF)
9480 if (XEXP (l, 0) != old_label)
9483 XEXP (l, 0) = new_label;
9484 ++LABEL_NUSES (new_label);
9485 --LABEL_NUSES (old_label);