1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
53 /* Vector mapping INSN_UIDs to luids.
54 The luids are like uids but increase monotonically always.
55 We use them to see whether a jump comes from outside a given loop. */
59 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
60 number the insn is contained in. */
64 /* 1 + largest uid of any insn. */
68 /* 1 + luid of last insn. */
72 /* Number of loops detected in current function. Used as index to the
75 static int max_loop_num;
77 /* Indexed by loop number, contains the first and last insn of each loop. */
79 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
81 /* Likewise for the continue insn */
82 static rtx *loop_number_loop_cont;
84 /* The first code_label that is reached in every loop iteration.
85 0 when not computed yet, initially const0_rtx if a jump couldn't be
87 Also set to 0 when there is no such label before the NOTE_INSN_LOOP_CONT
88 of this loop, or in verify_dominator, if a jump couldn't be followed. */
89 static rtx *loop_number_cont_dominator;
91 /* For each loop, gives the containing loop number, -1 if none. */
95 #ifdef HAVE_decrement_and_branch_on_count
96 /* Records whether resource in use by inner loop. */
98 int *loop_used_count_register;
99 #endif /* HAVE_decrement_and_branch_on_count */
101 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
102 really a loop (an insn outside the loop branches into it). */
104 static char *loop_invalid;
106 /* Indexed by loop number, links together all LABEL_REFs which refer to
107 code labels outside the loop. Used by routines that need to know all
108 loop exits, such as final_biv_value and final_giv_value.
110 This does not include loop exits due to return instructions. This is
111 because all bivs and givs are pseudos, and hence must be dead after a
112 return, so the presense of a return does not affect any of the
113 optimizations that use this info. It is simpler to just not include return
114 instructions on this list. */
116 rtx *loop_number_exit_labels;
118 /* Indexed by loop number, counts the number of LABEL_REFs on
119 loop_number_exit_labels for this loop and all loops nested inside it. */
121 int *loop_number_exit_count;
123 /* Nonzero if there is a subroutine call in the current loop. */
125 static int loop_has_call;
127 /* Nonzero if there is a volatile memory reference in the current
130 static int loop_has_volatile;
132 /* Nonzero if there is a tablejump in the current loop. */
134 static int loop_has_tablejump;
136 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
137 current loop. A continue statement will generate a branch to
138 NEXT_INSN (loop_continue). */
140 static rtx loop_continue;
142 /* Indexed by register number, contains the number of times the reg
143 is set during the loop being scanned.
144 During code motion, a negative value indicates a reg that has been
145 made a candidate; in particular -2 means that it is an candidate that
146 we know is equal to a constant and -1 means that it is an candidate
147 not known equal to a constant.
148 After code motion, regs moved have 0 (which is accurate now)
149 while the failed candidates have the original number of times set.
151 Therefore, at all times, == 0 indicates an invariant register;
152 < 0 a conditionally invariant one. */
154 static varray_type set_in_loop;
156 /* Original value of set_in_loop; same except that this value
157 is not set negative for a reg whose sets have been made candidates
158 and not set to 0 for a reg that is moved. */
160 static varray_type n_times_set;
162 /* Index by register number, 1 indicates that the register
163 cannot be moved or strength reduced. */
165 static varray_type may_not_optimize;
167 /* Contains the insn in which a register was used if it was used
168 exactly once; contains const0_rtx if it was used more than once. */
170 static varray_type reg_single_usage;
172 /* Nonzero means reg N has already been moved out of one loop.
173 This reduces the desire to move it out of another. */
175 static char *moved_once;
177 /* List of MEMs that are stored in this loop. */
179 static rtx loop_store_mems;
181 /* The insn where the first of these was found. */
182 static rtx first_loop_store_insn;
184 typedef struct loop_mem_info {
185 rtx mem; /* The MEM itself. */
186 rtx reg; /* Corresponding pseudo, if any. */
187 int optimize; /* Nonzero if we can optimize access to this MEM. */
190 /* Array of MEMs that are used (read or written) in this loop, but
191 cannot be aliased by anything in this loop, except perhaps
192 themselves. In other words, if loop_mems[i] is altered during the
193 loop, it is altered by an expression that is rtx_equal_p to it. */
195 static loop_mem_info *loop_mems;
197 /* The index of the next available slot in LOOP_MEMS. */
199 static int loop_mems_idx;
201 /* The number of elements allocated in LOOP_MEMs. */
203 static int loop_mems_allocated;
205 /* Nonzero if we don't know what MEMs were changed in the current loop.
206 This happens if the loop contains a call (in which case `loop_has_call'
207 will also be set) or if we store into more than NUM_STORES MEMs. */
209 static int unknown_address_altered;
211 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
212 static int num_movables;
214 /* Count of memory write instructions discovered in the loop. */
215 static int num_mem_sets;
217 /* Number of loops contained within the current one, including itself. */
218 static int loops_enclosed;
220 /* Bound on pseudo register number before loop optimization.
221 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
222 int max_reg_before_loop;
224 /* This obstack is used in product_cheap_p to allocate its rtl. It
225 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
226 If we used the same obstack that it did, we would be deallocating
229 static struct obstack temp_obstack;
231 /* This is where the pointer to the obstack being used for RTL is stored. */
233 extern struct obstack *rtl_obstack;
235 #define obstack_chunk_alloc xmalloc
236 #define obstack_chunk_free free
238 /* During the analysis of a loop, a chain of `struct movable's
239 is made to record all the movable insns found.
240 Then the entire chain can be scanned to decide which to move. */
244 rtx insn; /* A movable insn */
245 rtx set_src; /* The expression this reg is set from. */
246 rtx set_dest; /* The destination of this SET. */
247 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
248 of any registers used within the LIBCALL. */
249 int consec; /* Number of consecutive following insns
250 that must be moved with this one. */
251 int regno; /* The register it sets */
252 short lifetime; /* lifetime of that register;
253 may be adjusted when matching movables
254 that load the same value are found. */
255 short savings; /* Number of insns we can move for this reg,
256 including other movables that force this
257 or match this one. */
258 unsigned int cond : 1; /* 1 if only conditionally movable */
259 unsigned int force : 1; /* 1 means MUST move this insn */
260 unsigned int global : 1; /* 1 means reg is live outside this loop */
261 /* If PARTIAL is 1, GLOBAL means something different:
262 that the reg is live outside the range from where it is set
263 to the following label. */
264 unsigned int done : 1; /* 1 inhibits further processing of this */
266 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
267 In particular, moving it does not make it
269 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
270 load SRC, rather than copying INSN. */
271 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
272 first insn of a consecutive sets group. */
273 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
274 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
275 that we should avoid changing when clearing
276 the rest of the reg. */
277 struct movable *match; /* First entry for same value */
278 struct movable *forces; /* An insn that must be moved if this is */
279 struct movable *next;
282 static struct movable *the_movables;
284 FILE *loop_dump_stream;
286 /* Forward declarations. */
288 static void verify_dominator PROTO((int));
289 static void find_and_verify_loops PROTO((rtx));
290 static void mark_loop_jump PROTO((rtx, int));
291 static void prescan_loop PROTO((rtx, rtx));
292 static int reg_in_basic_block_p PROTO((rtx, rtx));
293 static int consec_sets_invariant_p PROTO((rtx, int, rtx));
294 static int labels_in_range_p PROTO((rtx, int));
295 static void count_one_set PROTO((rtx, rtx, varray_type, rtx *));
297 static void count_loop_regs_set PROTO((rtx, rtx, varray_type, varray_type,
299 static void note_addr_stored PROTO((rtx, rtx));
300 static int loop_reg_used_before_p PROTO((rtx, rtx, rtx, rtx, rtx));
301 static void scan_loop PROTO((rtx, rtx, rtx, int, int));
303 static void replace_call_address PROTO((rtx, rtx, rtx));
305 static rtx skip_consec_insns PROTO((rtx, int));
306 static int libcall_benefit PROTO((rtx));
307 static void ignore_some_movables PROTO((struct movable *));
308 static void force_movables PROTO((struct movable *));
309 static void combine_movables PROTO((struct movable *, int));
310 static int regs_match_p PROTO((rtx, rtx, struct movable *));
311 static int rtx_equal_for_loop_p PROTO((rtx, rtx, struct movable *));
312 static void add_label_notes PROTO((rtx, rtx));
313 static void move_movables PROTO((struct movable *, int, int, rtx, rtx, int));
314 static int count_nonfixed_reads PROTO((rtx));
315 static void strength_reduce PROTO((rtx, rtx, rtx, int, rtx, rtx, rtx, int, int));
316 static void find_single_use_in_loop PROTO((rtx, rtx, varray_type));
317 static int valid_initial_value_p PROTO((rtx, rtx, int, rtx));
318 static void find_mem_givs PROTO((rtx, rtx, int, rtx, rtx));
319 static void record_biv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx *, int, int));
320 static void check_final_value PROTO((struct induction *, rtx, rtx,
321 unsigned HOST_WIDE_INT));
322 static void record_giv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx, int, enum g_types, int, rtx *, rtx, rtx));
323 static void update_giv_derive PROTO((rtx));
324 static int basic_induction_var PROTO((rtx, enum machine_mode, rtx, rtx, rtx *, rtx *, rtx **));
325 static rtx simplify_giv_expr PROTO((rtx, int *));
326 static int general_induction_var PROTO((rtx, rtx *, rtx *, rtx *, int, int *));
327 static int consec_sets_giv PROTO((int, rtx, rtx, rtx, rtx *, rtx *, rtx *));
328 static int check_dbra_loop PROTO((rtx, int, rtx, struct loop_info *));
329 static rtx express_from_1 PROTO((rtx, rtx, rtx));
330 static rtx combine_givs_p PROTO((struct induction *, struct induction *));
331 static void combine_givs PROTO((struct iv_class *));
332 struct recombine_givs_stats;
333 static int find_life_end PROTO((rtx, struct recombine_givs_stats *, rtx, rtx));
334 static void recombine_givs PROTO((struct iv_class *, rtx, rtx, int));
335 static int product_cheap_p PROTO((rtx, rtx));
336 static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
337 static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
338 static int last_use_this_basic_block PROTO((rtx, rtx));
339 static void record_initial PROTO((rtx, rtx));
340 static void update_reg_last_use PROTO((rtx, rtx));
341 static rtx next_insn_in_loop PROTO((rtx, rtx, rtx, rtx));
342 static void load_mems_and_recount_loop_regs_set PROTO((rtx, rtx, rtx,
344 static void load_mems PROTO((rtx, rtx, rtx, rtx));
345 static int insert_loop_mem PROTO((rtx *, void *));
346 static int replace_loop_mem PROTO((rtx *, void *));
347 static int replace_label PROTO((rtx *, void *));
349 typedef struct rtx_and_int {
354 typedef struct rtx_pair {
359 /* Nonzero iff INSN is between START and END, inclusive. */
360 #define INSN_IN_RANGE_P(INSN, START, END) \
361 (INSN_UID (INSN) < max_uid_for_loop \
362 && INSN_LUID (INSN) >= INSN_LUID (START) \
363 && INSN_LUID (INSN) <= INSN_LUID (END))
365 #ifdef HAVE_decrement_and_branch_on_count
366 /* Test whether BCT applicable and safe. */
367 static void insert_bct PROTO((rtx, rtx, struct loop_info *));
369 /* Auxiliary function that inserts the BCT pattern into the loop. */
370 static void instrument_loop_bct PROTO((rtx, rtx, rtx));
371 #endif /* HAVE_decrement_and_branch_on_count */
373 /* Indirect_jump_in_function is computed once per function. */
374 int indirect_jump_in_function = 0;
375 static int indirect_jump_in_function_p PROTO((rtx));
377 static int compute_luids PROTO((rtx, rtx, int));
379 static int biv_elimination_giv_has_0_offset PROTO((struct induction *,
380 struct induction *, rtx));
382 /* Relative gain of eliminating various kinds of operations. */
385 static int shift_cost;
386 static int mult_cost;
389 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
390 copy the value of the strength reduced giv to its original register. */
391 static int copy_cost;
393 /* Cost of using a register, to normalize the benefits of a giv. */
394 static int reg_address_cost;
400 char *free_point = (char *) oballoc (1);
401 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
403 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
406 reg_address_cost = ADDRESS_COST (reg);
408 reg_address_cost = rtx_cost (reg, MEM);
411 /* We multiply by 2 to reconcile the difference in scale between
412 these two ways of computing costs. Otherwise the cost of a copy
413 will be far less than the cost of an add. */
417 /* Free the objects we just allocated. */
420 /* Initialize the obstack used for rtl in product_cheap_p. */
421 gcc_obstack_init (&temp_obstack);
424 /* Compute the mapping from uids to luids.
425 LUIDs are numbers assigned to insns, like uids,
426 except that luids increase monotonically through the code.
427 Start at insn START and stop just before END. Assign LUIDs
428 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
430 compute_luids (start, end, prev_luid)
437 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
439 if (INSN_UID (insn) >= max_uid_for_loop)
441 /* Don't assign luids to line-number NOTEs, so that the distance in
442 luids between two insns is not affected by -g. */
443 if (GET_CODE (insn) != NOTE
444 || NOTE_LINE_NUMBER (insn) <= 0)
445 uid_luid[INSN_UID (insn)] = ++i;
447 /* Give a line number note the same luid as preceding insn. */
448 uid_luid[INSN_UID (insn)] = i;
453 /* Entry point of this file. Perform loop optimization
454 on the current function. F is the first insn of the function
455 and DUMPFILE is a stream for output of a trace of actions taken
456 (or 0 if none should be output). */
459 loop_optimize (f, dumpfile, unroll_p, bct_p)
460 /* f is the first instruction of a chain of insns for one function */
468 loop_dump_stream = dumpfile;
470 init_recog_no_volatile ();
472 max_reg_before_loop = max_reg_num ();
474 moved_once = (char *) alloca (max_reg_before_loop);
475 bzero (moved_once, max_reg_before_loop);
479 /* Count the number of loops. */
482 for (insn = f; insn; insn = NEXT_INSN (insn))
484 if (GET_CODE (insn) == NOTE
485 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
489 /* Don't waste time if no loops. */
490 if (max_loop_num == 0)
493 /* Get size to use for tables indexed by uids.
494 Leave some space for labels allocated by find_and_verify_loops. */
495 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
497 uid_luid = (int *) alloca (max_uid_for_loop * sizeof (int));
498 uid_loop_num = (int *) alloca (max_uid_for_loop * sizeof (int));
500 bzero ((char *) uid_luid, max_uid_for_loop * sizeof (int));
501 bzero ((char *) uid_loop_num, max_uid_for_loop * sizeof (int));
503 /* Allocate tables for recording each loop. We set each entry, so they need
505 loop_number_loop_starts = (rtx *) alloca (max_loop_num * sizeof (rtx));
506 loop_number_loop_ends = (rtx *) alloca (max_loop_num * sizeof (rtx));
507 loop_number_loop_cont = (rtx *) alloca (max_loop_num * sizeof (rtx));
508 loop_number_cont_dominator = (rtx *) alloca (max_loop_num * sizeof (rtx));
509 loop_outer_loop = (int *) alloca (max_loop_num * sizeof (int));
510 loop_invalid = (char *) alloca (max_loop_num * sizeof (char));
511 loop_number_exit_labels = (rtx *) alloca (max_loop_num * sizeof (rtx));
512 loop_number_exit_count = (int *) alloca (max_loop_num * sizeof (int));
514 #ifdef HAVE_decrement_and_branch_on_count
515 /* Allocate for BCT optimization */
516 loop_used_count_register = (int *) alloca (max_loop_num * sizeof (int));
517 bzero ((char *) loop_used_count_register, max_loop_num * sizeof (int));
518 #endif /* HAVE_decrement_and_branch_on_count */
520 /* Find and process each loop.
521 First, find them, and record them in order of their beginnings. */
522 find_and_verify_loops (f);
524 /* Now find all register lifetimes. This must be done after
525 find_and_verify_loops, because it might reorder the insns in the
527 reg_scan (f, max_reg_num (), 1);
529 /* This must occur after reg_scan so that registers created by gcse
530 will have entries in the register tables.
532 We could have added a call to reg_scan after gcse_main in toplev.c,
533 but moving this call to init_alias_analysis is more efficient. */
534 init_alias_analysis ();
536 /* See if we went too far. Note that get_max_uid already returns
537 one more that the maximum uid of all insn. */
538 if (get_max_uid () > max_uid_for_loop)
540 /* Now reset it to the actual size we need. See above. */
541 max_uid_for_loop = get_max_uid ();
543 /* find_and_verify_loops has already called compute_luids, but it might
544 have rearranged code afterwards, so we need to recompute the luids now. */
545 max_luid = compute_luids (f, NULL_RTX, 0);
547 /* Don't leave gaps in uid_luid for insns that have been
548 deleted. It is possible that the first or last insn
549 using some register has been deleted by cross-jumping.
550 Make sure that uid_luid for that former insn's uid
551 points to the general area where that insn used to be. */
552 for (i = 0; i < max_uid_for_loop; i++)
554 uid_luid[0] = uid_luid[i];
555 if (uid_luid[0] != 0)
558 for (i = 0; i < max_uid_for_loop; i++)
559 if (uid_luid[i] == 0)
560 uid_luid[i] = uid_luid[i - 1];
562 /* Create a mapping from loops to BLOCK tree nodes. */
563 if (unroll_p && write_symbols != NO_DEBUG)
564 find_loop_tree_blocks ();
566 /* Determine if the function has indirect jump. On some systems
567 this prevents low overhead loop instructions from being used. */
568 indirect_jump_in_function = indirect_jump_in_function_p (f);
570 /* Now scan the loops, last ones first, since this means inner ones are done
571 before outer ones. */
572 for (i = max_loop_num-1; i >= 0; i--)
573 if (! loop_invalid[i] && loop_number_loop_ends[i])
574 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
575 loop_number_loop_cont[i], unroll_p, bct_p);
577 /* If debugging and unrolling loops, we must replicate the tree nodes
578 corresponding to the blocks inside the loop, so that the original one
579 to one mapping will remain. */
580 if (unroll_p && write_symbols != NO_DEBUG)
581 unroll_block_trees ();
583 end_alias_analysis ();
586 /* Returns the next insn, in execution order, after INSN. START and
587 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
588 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
589 insn-stream; it is used with loops that are entered near the
593 next_insn_in_loop (insn, start, end, loop_top)
599 insn = NEXT_INSN (insn);
604 /* Go to the top of the loop, and continue there. */
618 /* Optimize one loop whose start is LOOP_START and end is END.
619 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
621 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
623 /* ??? Could also move memory writes out of loops if the destination address
624 is invariant, the source is invariant, the memory write is not volatile,
625 and if we can prove that no read inside the loop can read this address
626 before the write occurs. If there is a read of this address after the
627 write, then we can also mark the memory read as invariant. */
630 scan_loop (loop_start, end, loop_cont, unroll_p, bct_p)
631 rtx loop_start, end, loop_cont;
636 /* 1 if we are scanning insns that could be executed zero times. */
638 /* 1 if we are scanning insns that might never be executed
639 due to a subroutine call which might exit before they are reached. */
641 /* For a rotated loop that is entered near the bottom,
642 this is the label at the top. Otherwise it is zero. */
644 /* Jump insn that enters the loop, or 0 if control drops in. */
645 rtx loop_entry_jump = 0;
646 /* Place in the loop where control enters. */
648 /* Number of insns in the loop. */
653 /* The SET from an insn, if it is the only SET in the insn. */
655 /* Chain describing insns movable in current loop. */
656 struct movable *movables = 0;
657 /* Last element in `movables' -- so we can add elements at the end. */
658 struct movable *last_movable = 0;
659 /* Ratio of extra register life span we can justify
660 for saving an instruction. More if loop doesn't call subroutines
661 since in that case saving an insn makes more difference
662 and more registers are available. */
664 /* Nonzero if we are scanning instructions in a sub-loop. */
668 /* Determine whether this loop starts with a jump down to a test at
669 the end. This will occur for a small number of loops with a test
670 that is too complex to duplicate in front of the loop.
672 We search for the first insn or label in the loop, skipping NOTEs.
673 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
674 (because we might have a loop executed only once that contains a
675 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
676 (in case we have a degenerate loop).
678 Note that if we mistakenly think that a loop is entered at the top
679 when, in fact, it is entered at the exit test, the only effect will be
680 slightly poorer optimization. Making the opposite error can generate
681 incorrect code. Since very few loops now start with a jump to the
682 exit test, the code here to detect that case is very conservative. */
684 for (p = NEXT_INSN (loop_start);
686 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
687 && (GET_CODE (p) != NOTE
688 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
689 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
695 /* Set up variables describing this loop. */
696 prescan_loop (loop_start, end);
697 threshold = (loop_has_call ? 1 : 2) * (1 + n_non_fixed_regs);
699 /* If loop has a jump before the first label,
700 the true entry is the target of that jump.
701 Start scan from there.
702 But record in LOOP_TOP the place where the end-test jumps
703 back to so we can scan that after the end of the loop. */
704 if (GET_CODE (p) == JUMP_INSN)
708 /* Loop entry must be unconditional jump (and not a RETURN) */
710 && JUMP_LABEL (p) != 0
711 /* Check to see whether the jump actually
712 jumps out of the loop (meaning it's no loop).
713 This case can happen for things like
714 do {..} while (0). If this label was generated previously
715 by loop, we can't tell anything about it and have to reject
717 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, end))
719 loop_top = next_label (scan_start);
720 scan_start = JUMP_LABEL (p);
724 /* If SCAN_START was an insn created by loop, we don't know its luid
725 as required by loop_reg_used_before_p. So skip such loops. (This
726 test may never be true, but it's best to play it safe.)
728 Also, skip loops where we do not start scanning at a label. This
729 test also rejects loops starting with a JUMP_INSN that failed the
732 if (INSN_UID (scan_start) >= max_uid_for_loop
733 || GET_CODE (scan_start) != CODE_LABEL)
735 if (loop_dump_stream)
736 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
737 INSN_UID (loop_start), INSN_UID (end));
741 /* Count number of times each reg is set during this loop.
742 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
743 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
745 /* Allocate extra space for REGS that might be created by
746 load_mems. We allocate a little extra slop as well, in the hopes
747 that even after the moving of movables creates some new registers
748 we won't have to reallocate these arrays. However, we do grow
749 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
750 nregs = max_reg_num () + loop_mems_idx + 16;
751 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
752 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
753 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
754 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
756 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
757 may_not_optimize, reg_single_usage, &insn_count, nregs);
759 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
761 VARRAY_CHAR (may_not_optimize, i) = 1;
762 VARRAY_INT (set_in_loop, i) = 1;
765 #ifdef AVOID_CCMODE_COPIES
766 /* Don't try to move insns which set CC registers if we should not
767 create CCmode register copies. */
768 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
769 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
770 VARRAY_CHAR (may_not_optimize, i) = 1;
773 bcopy ((char *) &set_in_loop->data,
774 (char *) &n_times_set->data, nregs * sizeof (int));
776 if (loop_dump_stream)
778 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
779 INSN_UID (loop_start), INSN_UID (end), insn_count);
781 fprintf (loop_dump_stream, "Continue at insn %d.\n",
782 INSN_UID (loop_continue));
785 /* Scan through the loop finding insns that are safe to move.
786 Set set_in_loop negative for the reg being set, so that
787 this reg will be considered invariant for subsequent insns.
788 We consider whether subsequent insns use the reg
789 in deciding whether it is worth actually moving.
791 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
792 and therefore it is possible that the insns we are scanning
793 would never be executed. At such times, we must make sure
794 that it is safe to execute the insn once instead of zero times.
795 When MAYBE_NEVER is 0, all insns will be executed at least once
796 so that is not a problem. */
798 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
800 p = next_insn_in_loop (p, scan_start, end, loop_top))
802 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
803 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
805 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
806 && find_reg_note (p, REG_RETVAL, NULL_RTX))
809 if (GET_CODE (p) == INSN
810 && (set = single_set (p))
811 && GET_CODE (SET_DEST (set)) == REG
812 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
817 rtx src = SET_SRC (set);
818 rtx dependencies = 0;
820 /* Figure out what to use as a source of this insn. If a REG_EQUIV
821 note is given or if a REG_EQUAL note with a constant operand is
822 specified, use it as the source and mark that we should move
823 this insn by calling emit_move_insn rather that duplicating the
826 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
828 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
830 src = XEXP (temp, 0), move_insn = 1;
833 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
834 if (temp && CONSTANT_P (XEXP (temp, 0)))
835 src = XEXP (temp, 0), move_insn = 1;
836 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
838 src = XEXP (temp, 0);
839 /* A libcall block can use regs that don't appear in
840 the equivalent expression. To move the libcall,
841 we must move those regs too. */
842 dependencies = libcall_other_reg (p, src);
846 /* Don't try to optimize a register that was made
847 by loop-optimization for an inner loop.
848 We don't know its life-span, so we can't compute the benefit. */
849 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
851 else if (/* The register is used in basic blocks other
852 than the one where it is set (meaning that
853 something after this point in the loop might
854 depend on its value before the set). */
855 ! reg_in_basic_block_p (p, SET_DEST (set))
856 /* And the set is not guaranteed to be executed one
857 the loop starts, or the value before the set is
858 needed before the set occurs...
860 ??? Note we have quadratic behaviour here, mitigated
861 by the fact that the previous test will often fail for
862 large loops. Rather than re-scanning the entire loop
863 each time for register usage, we should build tables
864 of the register usage and use them here instead. */
866 || loop_reg_used_before_p (set, p, loop_start,
868 /* It is unsafe to move the set.
870 This code used to consider it OK to move a set of a variable
871 which was not created by the user and not used in an exit test.
872 That behavior is incorrect and was removed. */
874 else if ((tem = invariant_p (src))
875 && (dependencies == 0
876 || (tem2 = invariant_p (dependencies)) != 0)
877 && (VARRAY_INT (set_in_loop,
878 REGNO (SET_DEST (set))) == 1
880 = consec_sets_invariant_p
882 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
884 /* If the insn can cause a trap (such as divide by zero),
885 can't move it unless it's guaranteed to be executed
886 once loop is entered. Even a function call might
887 prevent the trap insn from being reached
888 (since it might exit!) */
889 && ! ((maybe_never || call_passed)
890 && may_trap_p (src)))
892 register struct movable *m;
893 register int regno = REGNO (SET_DEST (set));
895 /* A potential lossage is where we have a case where two insns
896 can be combined as long as they are both in the loop, but
897 we move one of them outside the loop. For large loops,
898 this can lose. The most common case of this is the address
899 of a function being called.
901 Therefore, if this register is marked as being used exactly
902 once if we are in a loop with calls (a "large loop"), see if
903 we can replace the usage of this register with the source
904 of this SET. If we can, delete this insn.
906 Don't do this if P has a REG_RETVAL note or if we have
907 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
910 && VARRAY_RTX (reg_single_usage, regno) != 0
911 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
912 && REGNO_FIRST_UID (regno) == INSN_UID (p)
913 && (REGNO_LAST_UID (regno)
914 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
915 && VARRAY_INT (set_in_loop, regno) == 1
916 && ! side_effects_p (SET_SRC (set))
917 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
918 && (! SMALL_REGISTER_CLASSES
919 || (! (GET_CODE (SET_SRC (set)) == REG
920 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
921 /* This test is not redundant; SET_SRC (set) might be
922 a call-clobbered register and the life of REGNO
923 might span a call. */
924 && ! modified_between_p (SET_SRC (set), p,
926 (reg_single_usage, regno))
927 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
928 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
930 (reg_single_usage, regno)))
932 /* Replace any usage in a REG_EQUAL note. Must copy the
933 new source, so that we don't get rtx sharing between the
934 SET_SOURCE and REG_NOTES of insn p. */
935 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
936 = replace_rtx (REG_NOTES (VARRAY_RTX
937 (reg_single_usage, regno)),
938 SET_DEST (set), copy_rtx (SET_SRC (set)));
941 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
942 NOTE_SOURCE_FILE (p) = 0;
943 VARRAY_INT (set_in_loop, regno) = 0;
947 m = (struct movable *) alloca (sizeof (struct movable));
951 m->dependencies = dependencies;
952 m->set_dest = SET_DEST (set);
954 m->consec = VARRAY_INT (set_in_loop,
955 REGNO (SET_DEST (set))) - 1;
959 m->move_insn = move_insn;
960 m->move_insn_first = 0;
961 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
962 m->savemode = VOIDmode;
964 /* Set M->cond if either invariant_p or consec_sets_invariant_p
965 returned 2 (only conditionally invariant). */
966 m->cond = ((tem | tem1 | tem2) > 1);
967 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
968 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
970 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
971 - uid_luid[REGNO_FIRST_UID (regno)]);
972 m->savings = VARRAY_INT (n_times_set, regno);
973 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
974 m->savings += libcall_benefit (p);
975 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
976 /* Add M to the end of the chain MOVABLES. */
980 last_movable->next = m;
985 /* It is possible for the first instruction to have a
986 REG_EQUAL note but a non-invariant SET_SRC, so we must
987 remember the status of the first instruction in case
988 the last instruction doesn't have a REG_EQUAL note. */
989 m->move_insn_first = m->move_insn;
991 /* Skip this insn, not checking REG_LIBCALL notes. */
992 p = next_nonnote_insn (p);
993 /* Skip the consecutive insns, if there are any. */
994 p = skip_consec_insns (p, m->consec);
995 /* Back up to the last insn of the consecutive group. */
996 p = prev_nonnote_insn (p);
998 /* We must now reset m->move_insn, m->is_equiv, and possibly
999 m->set_src to correspond to the effects of all the
1001 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
1003 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1006 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
1007 if (temp && CONSTANT_P (XEXP (temp, 0)))
1008 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1013 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
1016 /* If this register is always set within a STRICT_LOW_PART
1017 or set to zero, then its high bytes are constant.
1018 So clear them outside the loop and within the loop
1019 just load the low bytes.
1020 We must check that the machine has an instruction to do so.
1021 Also, if the value loaded into the register
1022 depends on the same register, this cannot be done. */
1023 else if (SET_SRC (set) == const0_rtx
1024 && GET_CODE (NEXT_INSN (p)) == INSN
1025 && (set1 = single_set (NEXT_INSN (p)))
1026 && GET_CODE (set1) == SET
1027 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
1028 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
1029 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
1031 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1033 register int regno = REGNO (SET_DEST (set));
1034 if (VARRAY_INT (set_in_loop, regno) == 2)
1036 register struct movable *m;
1037 m = (struct movable *) alloca (sizeof (struct movable));
1040 m->set_dest = SET_DEST (set);
1041 m->dependencies = 0;
1047 m->move_insn_first = 0;
1049 /* If the insn may not be executed on some cycles,
1050 we can't clear the whole reg; clear just high part.
1051 Not even if the reg is used only within this loop.
1058 Clearing x before the inner loop could clobber a value
1059 being saved from the last time around the outer loop.
1060 However, if the reg is not used outside this loop
1061 and all uses of the register are in the same
1062 basic block as the store, there is no problem.
1064 If this insn was made by loop, we don't know its
1065 INSN_LUID and hence must make a conservative
1067 m->global = (INSN_UID (p) >= max_uid_for_loop
1068 || (uid_luid[REGNO_LAST_UID (regno)]
1070 || (uid_luid[REGNO_FIRST_UID (regno)]
1072 || (labels_in_range_p
1073 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1074 if (maybe_never && m->global)
1075 m->savemode = GET_MODE (SET_SRC (set1));
1077 m->savemode = VOIDmode;
1081 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1082 - uid_luid[REGNO_FIRST_UID (regno)]);
1084 VARRAY_INT (set_in_loop, regno) = -1;
1085 /* Add M to the end of the chain MOVABLES. */
1089 last_movable->next = m;
1094 /* Past a call insn, we get to insns which might not be executed
1095 because the call might exit. This matters for insns that trap.
1096 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1097 so they don't count. */
1098 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1100 /* Past a label or a jump, we get to insns for which we
1101 can't count on whether or how many times they will be
1102 executed during each iteration. Therefore, we can
1103 only move out sets of trivial variables
1104 (those not used after the loop). */
1105 /* Similar code appears twice in strength_reduce. */
1106 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1107 /* If we enter the loop in the middle, and scan around to the
1108 beginning, don't set maybe_never for that. This must be an
1109 unconditional jump, otherwise the code at the top of the
1110 loop might never be executed. Unconditional jumps are
1111 followed a by barrier then loop end. */
1112 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1113 && NEXT_INSN (NEXT_INSN (p)) == end
1114 && simplejump_p (p)))
1116 else if (GET_CODE (p) == NOTE)
1118 /* At the virtual top of a converted loop, insns are again known to
1119 be executed: logically, the loop begins here even though the exit
1120 code has been duplicated. */
1121 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1122 maybe_never = call_passed = 0;
1123 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1125 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1130 /* If one movable subsumes another, ignore that other. */
1132 ignore_some_movables (movables);
1134 /* For each movable insn, see if the reg that it loads
1135 leads when it dies right into another conditionally movable insn.
1136 If so, record that the second insn "forces" the first one,
1137 since the second can be moved only if the first is. */
1139 force_movables (movables);
1141 /* See if there are multiple movable insns that load the same value.
1142 If there are, make all but the first point at the first one
1143 through the `match' field, and add the priorities of them
1144 all together as the priority of the first. */
1146 combine_movables (movables, nregs);
1148 /* Now consider each movable insn to decide whether it is worth moving.
1149 Store 0 in set_in_loop for each reg that is moved.
1151 Generally this increases code size, so do not move moveables when
1152 optimizing for code size. */
1154 if (! optimize_size)
1155 move_movables (movables, threshold,
1156 insn_count, loop_start, end, nregs);
1158 /* Now candidates that still are negative are those not moved.
1159 Change set_in_loop to indicate that those are not actually invariant. */
1160 for (i = 0; i < nregs; i++)
1161 if (VARRAY_INT (set_in_loop, i) < 0)
1162 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1164 /* Now that we've moved some things out of the loop, we might be able to
1165 hoist even more memory references. */
1166 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top,
1167 loop_start, &insn_count);
1169 if (flag_strength_reduce)
1171 the_movables = movables;
1172 strength_reduce (scan_start, end, loop_top,
1173 insn_count, loop_start, end, loop_cont, unroll_p, bct_p);
1176 VARRAY_FREE (reg_single_usage);
1177 VARRAY_FREE (set_in_loop);
1178 VARRAY_FREE (n_times_set);
1179 VARRAY_FREE (may_not_optimize);
1182 /* Add elements to *OUTPUT to record all the pseudo-regs
1183 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1186 record_excess_regs (in_this, not_in_this, output)
1187 rtx in_this, not_in_this;
1194 code = GET_CODE (in_this);
1208 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1209 && ! reg_mentioned_p (in_this, not_in_this))
1210 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1217 fmt = GET_RTX_FORMAT (code);
1218 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1225 for (j = 0; j < XVECLEN (in_this, i); j++)
1226 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1230 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1236 /* Check what regs are referred to in the libcall block ending with INSN,
1237 aside from those mentioned in the equivalent value.
1238 If there are none, return 0.
1239 If there are one or more, return an EXPR_LIST containing all of them. */
1242 libcall_other_reg (insn, equiv)
1245 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1246 rtx p = XEXP (note, 0);
1249 /* First, find all the regs used in the libcall block
1250 that are not mentioned as inputs to the result. */
1254 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1255 || GET_CODE (p) == CALL_INSN)
1256 record_excess_regs (PATTERN (p), equiv, &output);
1263 /* Return 1 if all uses of REG
1264 are between INSN and the end of the basic block. */
1267 reg_in_basic_block_p (insn, reg)
1270 int regno = REGNO (reg);
1273 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1276 /* Search this basic block for the already recorded last use of the reg. */
1277 for (p = insn; p; p = NEXT_INSN (p))
1279 switch (GET_CODE (p))
1286 /* Ordinary insn: if this is the last use, we win. */
1287 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1292 /* Jump insn: if this is the last use, we win. */
1293 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1295 /* Otherwise, it's the end of the basic block, so we lose. */
1300 /* It's the end of the basic block, so we lose. */
1308 /* The "last use" doesn't follow the "first use"?? */
1312 /* Compute the benefit of eliminating the insns in the block whose
1313 last insn is LAST. This may be a group of insns used to compute a
1314 value directly or can contain a library call. */
1317 libcall_benefit (last)
1323 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1324 insn != last; insn = NEXT_INSN (insn))
1326 if (GET_CODE (insn) == CALL_INSN)
1327 benefit += 10; /* Assume at least this many insns in a library
1329 else if (GET_CODE (insn) == INSN
1330 && GET_CODE (PATTERN (insn)) != USE
1331 && GET_CODE (PATTERN (insn)) != CLOBBER)
1338 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1341 skip_consec_insns (insn, count)
1345 for (; count > 0; count--)
1349 /* If first insn of libcall sequence, skip to end. */
1350 /* Do this at start of loop, since INSN is guaranteed to
1352 if (GET_CODE (insn) != NOTE
1353 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1354 insn = XEXP (temp, 0);
1356 do insn = NEXT_INSN (insn);
1357 while (GET_CODE (insn) == NOTE);
1363 /* Ignore any movable whose insn falls within a libcall
1364 which is part of another movable.
1365 We make use of the fact that the movable for the libcall value
1366 was made later and so appears later on the chain. */
1369 ignore_some_movables (movables)
1370 struct movable *movables;
1372 register struct movable *m, *m1;
1374 for (m = movables; m; m = m->next)
1376 /* Is this a movable for the value of a libcall? */
1377 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1381 /* Check for earlier movables inside that range,
1382 and mark them invalid. We cannot use LUIDs here because
1383 insns created by loop.c for prior loops don't have LUIDs.
1384 Rather than reject all such insns from movables, we just
1385 explicitly check each insn in the libcall (since invariant
1386 libcalls aren't that common). */
1387 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1388 for (m1 = movables; m1 != m; m1 = m1->next)
1389 if (m1->insn == insn)
1395 /* For each movable insn, see if the reg that it loads
1396 leads when it dies right into another conditionally movable insn.
1397 If so, record that the second insn "forces" the first one,
1398 since the second can be moved only if the first is. */
1401 force_movables (movables)
1402 struct movable *movables;
1404 register struct movable *m, *m1;
1405 for (m1 = movables; m1; m1 = m1->next)
1406 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1407 if (!m1->partial && !m1->done)
1409 int regno = m1->regno;
1410 for (m = m1->next; m; m = m->next)
1411 /* ??? Could this be a bug? What if CSE caused the
1412 register of M1 to be used after this insn?
1413 Since CSE does not update regno_last_uid,
1414 this insn M->insn might not be where it dies.
1415 But very likely this doesn't matter; what matters is
1416 that M's reg is computed from M1's reg. */
1417 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1420 if (m != 0 && m->set_src == m1->set_dest
1421 /* If m->consec, m->set_src isn't valid. */
1425 /* Increase the priority of the moving the first insn
1426 since it permits the second to be moved as well. */
1430 m1->lifetime += m->lifetime;
1431 m1->savings += m->savings;
1436 /* Find invariant expressions that are equal and can be combined into
1440 combine_movables (movables, nregs)
1441 struct movable *movables;
1444 register struct movable *m;
1445 char *matched_regs = (char *) alloca (nregs);
1446 enum machine_mode mode;
1448 /* Regs that are set more than once are not allowed to match
1449 or be matched. I'm no longer sure why not. */
1450 /* Perhaps testing m->consec_sets would be more appropriate here? */
1452 for (m = movables; m; m = m->next)
1453 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1455 register struct movable *m1;
1456 int regno = m->regno;
1458 bzero (matched_regs, nregs);
1459 matched_regs[regno] = 1;
1461 /* We want later insns to match the first one. Don't make the first
1462 one match any later ones. So start this loop at m->next. */
1463 for (m1 = m->next; m1; m1 = m1->next)
1464 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1465 /* A reg used outside the loop mustn't be eliminated. */
1467 /* A reg used for zero-extending mustn't be eliminated. */
1469 && (matched_regs[m1->regno]
1472 /* Can combine regs with different modes loaded from the
1473 same constant only if the modes are the same or
1474 if both are integer modes with M wider or the same
1475 width as M1. The check for integer is redundant, but
1476 safe, since the only case of differing destination
1477 modes with equal sources is when both sources are
1478 VOIDmode, i.e., CONST_INT. */
1479 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1480 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1481 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1482 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1483 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1484 /* See if the source of M1 says it matches M. */
1485 && ((GET_CODE (m1->set_src) == REG
1486 && matched_regs[REGNO (m1->set_src)])
1487 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1489 && ((m->dependencies == m1->dependencies)
1490 || rtx_equal_p (m->dependencies, m1->dependencies)))
1492 m->lifetime += m1->lifetime;
1493 m->savings += m1->savings;
1496 matched_regs[m1->regno] = 1;
1500 /* Now combine the regs used for zero-extension.
1501 This can be done for those not marked `global'
1502 provided their lives don't overlap. */
1504 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1505 mode = GET_MODE_WIDER_MODE (mode))
1507 register struct movable *m0 = 0;
1509 /* Combine all the registers for extension from mode MODE.
1510 Don't combine any that are used outside this loop. */
1511 for (m = movables; m; m = m->next)
1512 if (m->partial && ! m->global
1513 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1515 register struct movable *m1;
1516 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1517 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1521 /* First one: don't check for overlap, just record it. */
1526 /* Make sure they extend to the same mode.
1527 (Almost always true.) */
1528 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1531 /* We already have one: check for overlap with those
1532 already combined together. */
1533 for (m1 = movables; m1 != m; m1 = m1->next)
1534 if (m1 == m0 || (m1->partial && m1->match == m0))
1535 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1536 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1539 /* No overlap: we can combine this with the others. */
1540 m0->lifetime += m->lifetime;
1541 m0->savings += m->savings;
1550 /* Return 1 if regs X and Y will become the same if moved. */
1553 regs_match_p (x, y, movables)
1555 struct movable *movables;
1559 struct movable *mx, *my;
1561 for (mx = movables; mx; mx = mx->next)
1562 if (mx->regno == xn)
1565 for (my = movables; my; my = my->next)
1566 if (my->regno == yn)
1570 && ((mx->match == my->match && mx->match != 0)
1572 || mx == my->match));
1575 /* Return 1 if X and Y are identical-looking rtx's.
1576 This is the Lisp function EQUAL for rtx arguments.
1578 If two registers are matching movables or a movable register and an
1579 equivalent constant, consider them equal. */
1582 rtx_equal_for_loop_p (x, y, movables)
1584 struct movable *movables;
1588 register struct movable *m;
1589 register enum rtx_code code;
1594 if (x == 0 || y == 0)
1597 code = GET_CODE (x);
1599 /* If we have a register and a constant, they may sometimes be
1601 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1604 for (m = movables; m; m = m->next)
1605 if (m->move_insn && m->regno == REGNO (x)
1606 && rtx_equal_p (m->set_src, y))
1609 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1612 for (m = movables; m; m = m->next)
1613 if (m->move_insn && m->regno == REGNO (y)
1614 && rtx_equal_p (m->set_src, x))
1618 /* Otherwise, rtx's of different codes cannot be equal. */
1619 if (code != GET_CODE (y))
1622 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1623 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1625 if (GET_MODE (x) != GET_MODE (y))
1628 /* These three types of rtx's can be compared nonrecursively. */
1630 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1632 if (code == LABEL_REF)
1633 return XEXP (x, 0) == XEXP (y, 0);
1634 if (code == SYMBOL_REF)
1635 return XSTR (x, 0) == XSTR (y, 0);
1637 /* Compare the elements. If any pair of corresponding elements
1638 fail to match, return 0 for the whole things. */
1640 fmt = GET_RTX_FORMAT (code);
1641 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1646 if (XWINT (x, i) != XWINT (y, i))
1651 if (XINT (x, i) != XINT (y, i))
1656 /* Two vectors must have the same length. */
1657 if (XVECLEN (x, i) != XVECLEN (y, i))
1660 /* And the corresponding elements must match. */
1661 for (j = 0; j < XVECLEN (x, i); j++)
1662 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1667 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1672 if (strcmp (XSTR (x, i), XSTR (y, i)))
1677 /* These are just backpointers, so they don't matter. */
1683 /* It is believed that rtx's at this level will never
1684 contain anything but integers and other rtx's,
1685 except for within LABEL_REFs and SYMBOL_REFs. */
1693 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1694 insns in INSNS which use thet reference. */
1697 add_label_notes (x, insns)
1701 enum rtx_code code = GET_CODE (x);
1706 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1708 /* This code used to ignore labels that referred to dispatch tables to
1709 avoid flow generating (slighly) worse code.
1711 We no longer ignore such label references (see LABEL_REF handling in
1712 mark_jump_label for additional information). */
1713 for (insn = insns; insn; insn = NEXT_INSN (insn))
1714 if (reg_mentioned_p (XEXP (x, 0), insn))
1715 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1719 fmt = GET_RTX_FORMAT (code);
1720 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1723 add_label_notes (XEXP (x, i), insns);
1724 else if (fmt[i] == 'E')
1725 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1726 add_label_notes (XVECEXP (x, i, j), insns);
1730 /* Scan MOVABLES, and move the insns that deserve to be moved.
1731 If two matching movables are combined, replace one reg with the
1732 other throughout. */
1735 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1736 struct movable *movables;
1744 register struct movable *m;
1746 /* Map of pseudo-register replacements to handle combining
1747 when we move several insns that load the same value
1748 into different pseudo-registers. */
1749 rtx *reg_map = (rtx *) alloca (nregs * sizeof (rtx));
1750 char *already_moved = (char *) alloca (nregs);
1752 bzero (already_moved, nregs);
1753 bzero ((char *) reg_map, nregs * sizeof (rtx));
1757 for (m = movables; m; m = m->next)
1759 /* Describe this movable insn. */
1761 if (loop_dump_stream)
1763 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1764 INSN_UID (m->insn), m->regno, m->lifetime);
1766 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1768 fprintf (loop_dump_stream, "cond ");
1770 fprintf (loop_dump_stream, "force ");
1772 fprintf (loop_dump_stream, "global ");
1774 fprintf (loop_dump_stream, "done ");
1776 fprintf (loop_dump_stream, "move-insn ");
1778 fprintf (loop_dump_stream, "matches %d ",
1779 INSN_UID (m->match->insn));
1781 fprintf (loop_dump_stream, "forces %d ",
1782 INSN_UID (m->forces->insn));
1785 /* Count movables. Value used in heuristics in strength_reduce. */
1788 /* Ignore the insn if it's already done (it matched something else).
1789 Otherwise, see if it is now safe to move. */
1793 || (1 == invariant_p (m->set_src)
1794 && (m->dependencies == 0
1795 || 1 == invariant_p (m->dependencies))
1797 || 1 == consec_sets_invariant_p (m->set_dest,
1800 && (! m->forces || m->forces->done))
1804 int savings = m->savings;
1806 /* We have an insn that is safe to move.
1807 Compute its desirability. */
1812 if (loop_dump_stream)
1813 fprintf (loop_dump_stream, "savings %d ", savings);
1815 if (moved_once[regno] && loop_dump_stream)
1816 fprintf (loop_dump_stream, "halved since already moved ");
1818 /* An insn MUST be moved if we already moved something else
1819 which is safe only if this one is moved too: that is,
1820 if already_moved[REGNO] is nonzero. */
1822 /* An insn is desirable to move if the new lifetime of the
1823 register is no more than THRESHOLD times the old lifetime.
1824 If it's not desirable, it means the loop is so big
1825 that moving won't speed things up much,
1826 and it is liable to make register usage worse. */
1828 /* It is also desirable to move if it can be moved at no
1829 extra cost because something else was already moved. */
1831 if (already_moved[regno]
1832 || flag_move_all_movables
1833 || (threshold * savings * m->lifetime) >=
1834 (moved_once[regno] ? insn_count * 2 : insn_count)
1835 || (m->forces && m->forces->done
1836 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1839 register struct movable *m1;
1842 /* Now move the insns that set the reg. */
1844 if (m->partial && m->match)
1848 /* Find the end of this chain of matching regs.
1849 Thus, we load each reg in the chain from that one reg.
1850 And that reg is loaded with 0 directly,
1851 since it has ->match == 0. */
1852 for (m1 = m; m1->match; m1 = m1->match);
1853 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1854 SET_DEST (PATTERN (m1->insn)));
1855 i1 = emit_insn_before (newpat, loop_start);
1857 /* Mark the moved, invariant reg as being allowed to
1858 share a hard reg with the other matching invariant. */
1859 REG_NOTES (i1) = REG_NOTES (m->insn);
1860 r1 = SET_DEST (PATTERN (m->insn));
1861 r2 = SET_DEST (PATTERN (m1->insn));
1863 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1864 gen_rtx_EXPR_LIST (VOIDmode, r2,
1866 delete_insn (m->insn);
1871 if (loop_dump_stream)
1872 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1874 /* If we are to re-generate the item being moved with a
1875 new move insn, first delete what we have and then emit
1876 the move insn before the loop. */
1877 else if (m->move_insn)
1881 for (count = m->consec; count >= 0; count--)
1883 /* If this is the first insn of a library call sequence,
1885 if (GET_CODE (p) != NOTE
1886 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1889 /* If this is the last insn of a libcall sequence, then
1890 delete every insn in the sequence except the last.
1891 The last insn is handled in the normal manner. */
1892 if (GET_CODE (p) != NOTE
1893 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1895 temp = XEXP (temp, 0);
1897 temp = delete_insn (temp);
1901 p = delete_insn (p);
1903 /* simplify_giv_expr expects that it can walk the insns
1904 at m->insn forwards and see this old sequence we are
1905 tossing here. delete_insn does preserve the next
1906 pointers, but when we skip over a NOTE we must fix
1907 it up. Otherwise that code walks into the non-deleted
1909 while (p && GET_CODE (p) == NOTE)
1910 p = NEXT_INSN (temp) = NEXT_INSN (p);
1914 emit_move_insn (m->set_dest, m->set_src);
1915 temp = get_insns ();
1918 add_label_notes (m->set_src, temp);
1920 i1 = emit_insns_before (temp, loop_start);
1921 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1923 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1924 m->set_src, REG_NOTES (i1));
1926 if (loop_dump_stream)
1927 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1929 /* The more regs we move, the less we like moving them. */
1934 for (count = m->consec; count >= 0; count--)
1938 /* If first insn of libcall sequence, skip to end. */
1939 /* Do this at start of loop, since p is guaranteed to
1941 if (GET_CODE (p) != NOTE
1942 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1945 /* If last insn of libcall sequence, move all
1946 insns except the last before the loop. The last
1947 insn is handled in the normal manner. */
1948 if (GET_CODE (p) != NOTE
1949 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1953 rtx fn_address_insn = 0;
1956 for (temp = XEXP (temp, 0); temp != p;
1957 temp = NEXT_INSN (temp))
1963 if (GET_CODE (temp) == NOTE)
1966 body = PATTERN (temp);
1968 /* Find the next insn after TEMP,
1969 not counting USE or NOTE insns. */
1970 for (next = NEXT_INSN (temp); next != p;
1971 next = NEXT_INSN (next))
1972 if (! (GET_CODE (next) == INSN
1973 && GET_CODE (PATTERN (next)) == USE)
1974 && GET_CODE (next) != NOTE)
1977 /* If that is the call, this may be the insn
1978 that loads the function address.
1980 Extract the function address from the insn
1981 that loads it into a register.
1982 If this insn was cse'd, we get incorrect code.
1984 So emit a new move insn that copies the
1985 function address into the register that the
1986 call insn will use. flow.c will delete any
1987 redundant stores that we have created. */
1988 if (GET_CODE (next) == CALL_INSN
1989 && GET_CODE (body) == SET
1990 && GET_CODE (SET_DEST (body)) == REG
1991 && (n = find_reg_note (temp, REG_EQUAL,
1994 fn_reg = SET_SRC (body);
1995 if (GET_CODE (fn_reg) != REG)
1996 fn_reg = SET_DEST (body);
1997 fn_address = XEXP (n, 0);
1998 fn_address_insn = temp;
2000 /* We have the call insn.
2001 If it uses the register we suspect it might,
2002 load it with the correct address directly. */
2003 if (GET_CODE (temp) == CALL_INSN
2005 && reg_referenced_p (fn_reg, body))
2006 emit_insn_after (gen_move_insn (fn_reg,
2010 if (GET_CODE (temp) == CALL_INSN)
2012 i1 = emit_call_insn_before (body, loop_start);
2013 /* Because the USAGE information potentially
2014 contains objects other than hard registers
2015 we need to copy it. */
2016 if (CALL_INSN_FUNCTION_USAGE (temp))
2017 CALL_INSN_FUNCTION_USAGE (i1)
2018 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2021 i1 = emit_insn_before (body, loop_start);
2024 if (temp == fn_address_insn)
2025 fn_address_insn = i1;
2026 REG_NOTES (i1) = REG_NOTES (temp);
2032 if (m->savemode != VOIDmode)
2034 /* P sets REG to zero; but we should clear only
2035 the bits that are not covered by the mode
2037 rtx reg = m->set_dest;
2043 (GET_MODE (reg), and_optab, reg,
2044 GEN_INT ((((HOST_WIDE_INT) 1
2045 << GET_MODE_BITSIZE (m->savemode)))
2047 reg, 1, OPTAB_LIB_WIDEN);
2051 emit_move_insn (reg, tem);
2052 sequence = gen_sequence ();
2054 i1 = emit_insn_before (sequence, loop_start);
2056 else if (GET_CODE (p) == CALL_INSN)
2058 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2059 /* Because the USAGE information potentially
2060 contains objects other than hard registers
2061 we need to copy it. */
2062 if (CALL_INSN_FUNCTION_USAGE (p))
2063 CALL_INSN_FUNCTION_USAGE (i1)
2064 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2066 else if (count == m->consec && m->move_insn_first)
2068 /* The SET_SRC might not be invariant, so we must
2069 use the REG_EQUAL note. */
2071 emit_move_insn (m->set_dest, m->set_src);
2072 temp = get_insns ();
2075 add_label_notes (m->set_src, temp);
2077 i1 = emit_insns_before (temp, loop_start);
2078 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2080 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2082 m->set_src, REG_NOTES (i1));
2085 i1 = emit_insn_before (PATTERN (p), loop_start);
2087 if (REG_NOTES (i1) == 0)
2089 REG_NOTES (i1) = REG_NOTES (p);
2091 /* If there is a REG_EQUAL note present whose value
2092 is not loop invariant, then delete it, since it
2093 may cause problems with later optimization passes.
2094 It is possible for cse to create such notes
2095 like this as a result of record_jump_cond. */
2097 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2098 && ! invariant_p (XEXP (temp, 0)))
2099 remove_note (i1, temp);
2105 if (loop_dump_stream)
2106 fprintf (loop_dump_stream, " moved to %d",
2109 /* If library call, now fix the REG_NOTES that contain
2110 insn pointers, namely REG_LIBCALL on FIRST
2111 and REG_RETVAL on I1. */
2112 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2114 XEXP (temp, 0) = first;
2115 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2116 XEXP (temp, 0) = i1;
2123 /* simplify_giv_expr expects that it can walk the insns
2124 at m->insn forwards and see this old sequence we are
2125 tossing here. delete_insn does preserve the next
2126 pointers, but when we skip over a NOTE we must fix
2127 it up. Otherwise that code walks into the non-deleted
2129 while (p && GET_CODE (p) == NOTE)
2130 p = NEXT_INSN (temp) = NEXT_INSN (p);
2133 /* The more regs we move, the less we like moving them. */
2137 /* Any other movable that loads the same register
2139 already_moved[regno] = 1;
2141 /* This reg has been moved out of one loop. */
2142 moved_once[regno] = 1;
2144 /* The reg set here is now invariant. */
2146 VARRAY_INT (set_in_loop, regno) = 0;
2150 /* Change the length-of-life info for the register
2151 to say it lives at least the full length of this loop.
2152 This will help guide optimizations in outer loops. */
2154 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2155 /* This is the old insn before all the moved insns.
2156 We can't use the moved insn because it is out of range
2157 in uid_luid. Only the old insns have luids. */
2158 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2159 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2160 REGNO_LAST_UID (regno) = INSN_UID (end);
2162 /* Combine with this moved insn any other matching movables. */
2165 for (m1 = movables; m1; m1 = m1->next)
2170 /* Schedule the reg loaded by M1
2171 for replacement so that shares the reg of M.
2172 If the modes differ (only possible in restricted
2173 circumstances, make a SUBREG. */
2174 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2175 reg_map[m1->regno] = m->set_dest;
2178 = gen_lowpart_common (GET_MODE (m1->set_dest),
2181 /* Get rid of the matching insn
2182 and prevent further processing of it. */
2185 /* if library call, delete all insn except last, which
2187 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2190 for (temp = XEXP (temp, 0); temp != m1->insn;
2191 temp = NEXT_INSN (temp))
2194 delete_insn (m1->insn);
2196 /* Any other movable that loads the same register
2198 already_moved[m1->regno] = 1;
2200 /* The reg merged here is now invariant,
2201 if the reg it matches is invariant. */
2203 VARRAY_INT (set_in_loop, m1->regno) = 0;
2206 else if (loop_dump_stream)
2207 fprintf (loop_dump_stream, "not desirable");
2209 else if (loop_dump_stream && !m->match)
2210 fprintf (loop_dump_stream, "not safe");
2212 if (loop_dump_stream)
2213 fprintf (loop_dump_stream, "\n");
2217 new_start = loop_start;
2219 /* Go through all the instructions in the loop, making
2220 all the register substitutions scheduled in REG_MAP. */
2221 for (p = new_start; p != end; p = NEXT_INSN (p))
2222 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2223 || GET_CODE (p) == CALL_INSN)
2225 replace_regs (PATTERN (p), reg_map, nregs, 0);
2226 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2232 /* Scan X and replace the address of any MEM in it with ADDR.
2233 REG is the address that MEM should have before the replacement. */
2236 replace_call_address (x, reg, addr)
2239 register enum rtx_code code;
2245 code = GET_CODE (x);
2259 /* Short cut for very common case. */
2260 replace_call_address (XEXP (x, 1), reg, addr);
2264 /* Short cut for very common case. */
2265 replace_call_address (XEXP (x, 0), reg, addr);
2269 /* If this MEM uses a reg other than the one we expected,
2270 something is wrong. */
2271 if (XEXP (x, 0) != reg)
2280 fmt = GET_RTX_FORMAT (code);
2281 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2284 replace_call_address (XEXP (x, i), reg, addr);
2288 for (j = 0; j < XVECLEN (x, i); j++)
2289 replace_call_address (XVECEXP (x, i, j), reg, addr);
2295 /* Return the number of memory refs to addresses that vary
2299 count_nonfixed_reads (x)
2302 register enum rtx_code code;
2310 code = GET_CODE (x);
2324 return ((invariant_p (XEXP (x, 0)) != 1)
2325 + count_nonfixed_reads (XEXP (x, 0)));
2332 fmt = GET_RTX_FORMAT (code);
2333 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2336 value += count_nonfixed_reads (XEXP (x, i));
2340 for (j = 0; j < XVECLEN (x, i); j++)
2341 value += count_nonfixed_reads (XVECEXP (x, i, j));
2349 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2350 Replace it with an instruction to load just the low bytes
2351 if the machine supports such an instruction,
2352 and insert above LOOP_START an instruction to clear the register. */
2355 constant_high_bytes (p, loop_start)
2359 register int insn_code_number;
2361 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2362 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2364 new = gen_rtx_SET (VOIDmode,
2365 gen_rtx_STRICT_LOW_PART (VOIDmode,
2366 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2367 SET_DEST (PATTERN (p)),
2369 XEXP (SET_SRC (PATTERN (p)), 0));
2370 insn_code_number = recog (new, p);
2372 if (insn_code_number)
2376 /* Clear destination register before the loop. */
2377 emit_insn_before (gen_rtx_SET (VOIDmode, SET_DEST (PATTERN (p)),
2381 /* Inside the loop, just load the low part. */
2387 /* Scan a loop setting the variables `unknown_address_altered',
2388 `num_mem_sets', `loop_continue', `loops_enclosed', `loop_has_call',
2389 `loop_has_volatile', and `loop_has_tablejump'.
2390 Also, fill in the array `loop_mems' and the list `loop_store_mems'. */
2393 prescan_loop (start, end)
2396 register int level = 1;
2398 int loop_has_multiple_exit_targets = 0;
2399 /* The label after END. Jumping here is just like falling off the
2400 end of the loop. We use next_nonnote_insn instead of next_label
2401 as a hedge against the (pathological) case where some actual insn
2402 might end up between the two. */
2403 rtx exit_target = next_nonnote_insn (end);
2404 if (exit_target == NULL_RTX || GET_CODE (exit_target) != CODE_LABEL)
2405 loop_has_multiple_exit_targets = 1;
2407 unknown_address_altered = 0;
2409 loop_has_volatile = 0;
2410 loop_has_tablejump = 0;
2411 loop_store_mems = NULL_RTX;
2412 first_loop_store_insn = NULL_RTX;
2419 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2420 insn = NEXT_INSN (insn))
2422 if (GET_CODE (insn) == NOTE)
2424 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2427 /* Count number of loops contained in this one. */
2430 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2439 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2442 loop_continue = insn;
2445 else if (GET_CODE (insn) == CALL_INSN)
2447 if (! CONST_CALL_P (insn))
2448 unknown_address_altered = 1;
2451 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2453 rtx label1 = NULL_RTX;
2454 rtx label2 = NULL_RTX;
2456 if (volatile_refs_p (PATTERN (insn)))
2457 loop_has_volatile = 1;
2459 if (GET_CODE (insn) == JUMP_INSN
2460 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2461 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2462 loop_has_tablejump = 1;
2464 note_stores (PATTERN (insn), note_addr_stored);
2465 if (! first_loop_store_insn && loop_store_mems)
2466 first_loop_store_insn = insn;
2468 if (! loop_has_multiple_exit_targets
2469 && GET_CODE (insn) == JUMP_INSN
2470 && GET_CODE (PATTERN (insn)) == SET
2471 && SET_DEST (PATTERN (insn)) == pc_rtx)
2473 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2475 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2476 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2480 label1 = SET_SRC (PATTERN (insn));
2484 if (label1 && label1 != pc_rtx)
2486 if (GET_CODE (label1) != LABEL_REF)
2488 /* Something tricky. */
2489 loop_has_multiple_exit_targets = 1;
2492 else if (XEXP (label1, 0) != exit_target
2493 && LABEL_OUTSIDE_LOOP_P (label1))
2495 /* A jump outside the current loop. */
2496 loop_has_multiple_exit_targets = 1;
2506 else if (GET_CODE (insn) == RETURN)
2507 loop_has_multiple_exit_targets = 1;
2510 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2511 if (/* We can't tell what MEMs are aliased by what. */
2512 !unknown_address_altered
2513 /* An exception thrown by a called function might land us
2516 /* We don't want loads for MEMs moved to a location before the
2517 one at which their stack memory becomes allocated. (Note
2518 that this is not a problem for malloc, etc., since those
2519 require actual function calls. */
2520 && !current_function_calls_alloca
2521 /* There are ways to leave the loop other than falling off the
2523 && !loop_has_multiple_exit_targets)
2524 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2525 insn = NEXT_INSN (insn))
2526 for_each_rtx (&insn, insert_loop_mem, 0);
2529 /* LOOP_NUMBER_CONT_DOMINATOR is now the last label between the loop start
2530 and the continue note that is a the destination of a (cond)jump after
2531 the continue note. If there is any (cond)jump between the loop start
2532 and what we have so far as LOOP_NUMBER_CONT_DOMINATOR that has a
2533 target between LOOP_DOMINATOR and the continue note, move
2534 LOOP_NUMBER_CONT_DOMINATOR forward to that label; if a jump's
2535 destination cannot be determined, clear LOOP_NUMBER_CONT_DOMINATOR. */
2538 verify_dominator (loop_number)
2543 if (! loop_number_cont_dominator[loop_number])
2544 /* This can happen for an empty loop, e.g. in
2545 gcc.c-torture/compile/920410-2.c */
2547 if (loop_number_cont_dominator[loop_number] == const0_rtx)
2549 loop_number_cont_dominator[loop_number] = 0;
2552 for (insn = loop_number_loop_starts[loop_number];
2553 insn != loop_number_cont_dominator[loop_number];
2554 insn = NEXT_INSN (insn))
2556 if (GET_CODE (insn) == JUMP_INSN
2557 && GET_CODE (PATTERN (insn)) != RETURN)
2559 rtx label = JUMP_LABEL (insn);
2560 int label_luid = INSN_LUID (label);
2562 if (! condjump_p (insn)
2563 && ! condjump_in_parallel_p (insn))
2565 loop_number_cont_dominator[loop_number] = NULL_RTX;
2568 if (label_luid < INSN_LUID (loop_number_loop_cont[loop_number])
2570 > INSN_LUID (loop_number_cont_dominator[loop_number])))
2571 loop_number_cont_dominator[loop_number] = label;
2576 /* Scan the function looking for loops. Record the start and end of each loop.
2577 Also mark as invalid loops any loops that contain a setjmp or are branched
2578 to from outside the loop. */
2581 find_and_verify_loops (f)
2585 int current_loop = -1;
2589 compute_luids (f, NULL_RTX, 0);
2591 /* If there are jumps to undefined labels,
2592 treat them as jumps out of any/all loops.
2593 This also avoids writing past end of tables when there are no loops. */
2594 uid_loop_num[0] = -1;
2596 /* Find boundaries of loops, mark which loops are contained within
2597 loops, and invalidate loops that have setjmp. */
2599 for (insn = f; insn; insn = NEXT_INSN (insn))
2601 if (GET_CODE (insn) == NOTE)
2602 switch (NOTE_LINE_NUMBER (insn))
2604 case NOTE_INSN_LOOP_BEG:
2605 loop_number_loop_starts[++next_loop] = insn;
2606 loop_number_loop_ends[next_loop] = 0;
2607 loop_number_loop_cont[next_loop] = 0;
2608 loop_number_cont_dominator[next_loop] = 0;
2609 loop_outer_loop[next_loop] = current_loop;
2610 loop_invalid[next_loop] = 0;
2611 loop_number_exit_labels[next_loop] = 0;
2612 loop_number_exit_count[next_loop] = 0;
2613 current_loop = next_loop;
2616 case NOTE_INSN_SETJMP:
2617 /* In this case, we must invalidate our current loop and any
2619 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2621 loop_invalid[loop] = 1;
2622 if (loop_dump_stream)
2623 fprintf (loop_dump_stream,
2624 "\nLoop at %d ignored due to setjmp.\n",
2625 INSN_UID (loop_number_loop_starts[loop]));
2629 case NOTE_INSN_LOOP_CONT:
2630 loop_number_loop_cont[current_loop] = insn;
2632 case NOTE_INSN_LOOP_END:
2633 if (current_loop == -1)
2636 loop_number_loop_ends[current_loop] = insn;
2637 verify_dominator (current_loop);
2638 current_loop = loop_outer_loop[current_loop];
2644 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2645 and NOTE_INSN_LOOP_END notes, update loop_number_loop_dominator. */
2646 else if (GET_CODE (insn) == JUMP_INSN
2647 && GET_CODE (PATTERN (insn)) != RETURN
2648 && current_loop >= 0)
2651 rtx label = JUMP_LABEL (insn);
2653 if (! condjump_p (insn) && ! condjump_in_parallel_p (insn))
2656 this_loop = current_loop;
2659 /* First see if we care about this loop. */
2660 if (loop_number_loop_cont[this_loop]
2661 && loop_number_cont_dominator[this_loop] != const0_rtx)
2663 /* If the jump destination is not known, invalidate
2664 loop_number_const_dominator. */
2666 loop_number_cont_dominator[this_loop] = const0_rtx;
2668 /* Check if the destination is between loop start and
2670 if ((INSN_LUID (label)
2671 < INSN_LUID (loop_number_loop_cont[this_loop]))
2672 && (INSN_LUID (label)
2673 > INSN_LUID (loop_number_loop_starts[this_loop]))
2674 /* And if there is no later destination already
2676 && (! loop_number_cont_dominator[this_loop]
2677 || (INSN_LUID (label)
2678 > INSN_LUID (loop_number_cont_dominator
2680 loop_number_cont_dominator[this_loop] = label;
2682 this_loop = loop_outer_loop[this_loop];
2684 while (this_loop >= 0);
2687 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2688 enclosing loop, but this doesn't matter. */
2689 uid_loop_num[INSN_UID (insn)] = current_loop;
2692 /* Any loop containing a label used in an initializer must be invalidated,
2693 because it can be jumped into from anywhere. */
2695 for (label = forced_labels; label; label = XEXP (label, 1))
2699 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2701 loop_num = loop_outer_loop[loop_num])
2702 loop_invalid[loop_num] = 1;
2705 /* Any loop containing a label used for an exception handler must be
2706 invalidated, because it can be jumped into from anywhere. */
2708 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2712 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2714 loop_num = loop_outer_loop[loop_num])
2715 loop_invalid[loop_num] = 1;
2718 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2719 loop that it is not contained within, that loop is marked invalid.
2720 If any INSN or CALL_INSN uses a label's address, then the loop containing
2721 that label is marked invalid, because it could be jumped into from
2724 Also look for blocks of code ending in an unconditional branch that
2725 exits the loop. If such a block is surrounded by a conditional
2726 branch around the block, move the block elsewhere (see below) and
2727 invert the jump to point to the code block. This may eliminate a
2728 label in our loop and will simplify processing by both us and a
2729 possible second cse pass. */
2731 for (insn = f; insn; insn = NEXT_INSN (insn))
2732 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2734 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2736 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2738 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2743 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2745 loop_num = loop_outer_loop[loop_num])
2746 loop_invalid[loop_num] = 1;
2750 if (GET_CODE (insn) != JUMP_INSN)
2753 mark_loop_jump (PATTERN (insn), this_loop_num);
2755 /* See if this is an unconditional branch outside the loop. */
2756 if (this_loop_num != -1
2757 && (GET_CODE (PATTERN (insn)) == RETURN
2758 || (simplejump_p (insn)
2759 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2761 && get_max_uid () < max_uid_for_loop)
2764 rtx our_next = next_real_insn (insn);
2766 int outer_loop = -1;
2768 /* Go backwards until we reach the start of the loop, a label,
2770 for (p = PREV_INSN (insn);
2771 GET_CODE (p) != CODE_LABEL
2772 && ! (GET_CODE (p) == NOTE
2773 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2774 && GET_CODE (p) != JUMP_INSN;
2778 /* Check for the case where we have a jump to an inner nested
2779 loop, and do not perform the optimization in that case. */
2781 if (JUMP_LABEL (insn))
2783 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2784 if (dest_loop != -1)
2786 for (outer_loop = dest_loop; outer_loop != -1;
2787 outer_loop = loop_outer_loop[outer_loop])
2788 if (outer_loop == this_loop_num)
2793 /* Make sure that the target of P is within the current loop. */
2795 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2796 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2797 outer_loop = this_loop_num;
2799 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2800 we have a block of code to try to move.
2802 We look backward and then forward from the target of INSN
2803 to find a BARRIER at the same loop depth as the target.
2804 If we find such a BARRIER, we make a new label for the start
2805 of the block, invert the jump in P and point it to that label,
2806 and move the block of code to the spot we found. */
2808 if (outer_loop == -1
2809 && GET_CODE (p) == JUMP_INSN
2810 && JUMP_LABEL (p) != 0
2811 /* Just ignore jumps to labels that were never emitted.
2812 These always indicate compilation errors. */
2813 && INSN_UID (JUMP_LABEL (p)) != 0
2815 && ! simplejump_p (p)
2816 && next_real_insn (JUMP_LABEL (p)) == our_next)
2819 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2820 int target_loop_num = uid_loop_num[INSN_UID (target)];
2823 for (loc = target; loc; loc = PREV_INSN (loc))
2824 if (GET_CODE (loc) == BARRIER
2825 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2829 for (loc = target; loc; loc = NEXT_INSN (loc))
2830 if (GET_CODE (loc) == BARRIER
2831 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2836 rtx cond_label = JUMP_LABEL (p);
2837 rtx new_label = get_label_after (p);
2839 /* Ensure our label doesn't go away. */
2840 LABEL_NUSES (cond_label)++;
2842 /* Verify that uid_loop_num is large enough and that
2844 if (invert_jump (p, new_label))
2848 /* If no suitable BARRIER was found, create a suitable
2849 one before TARGET. Since TARGET is a fall through
2850 path, we'll need to insert an jump around our block
2851 and a add a BARRIER before TARGET.
2853 This creates an extra unconditional jump outside
2854 the loop. However, the benefits of removing rarely
2855 executed instructions from inside the loop usually
2856 outweighs the cost of the extra unconditional jump
2857 outside the loop. */
2862 temp = gen_jump (JUMP_LABEL (insn));
2863 temp = emit_jump_insn_before (temp, target);
2864 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2865 LABEL_NUSES (JUMP_LABEL (insn))++;
2866 loc = emit_barrier_before (target);
2869 /* Include the BARRIER after INSN and copy the
2871 new_label = squeeze_notes (new_label, NEXT_INSN (insn));
2872 reorder_insns (new_label, NEXT_INSN (insn), loc);
2874 /* All those insns are now in TARGET_LOOP_NUM. */
2875 for (q = new_label; q != NEXT_INSN (NEXT_INSN (insn));
2877 uid_loop_num[INSN_UID (q)] = target_loop_num;
2879 /* The label jumped to by INSN is no longer a loop exit.
2880 Unless INSN does not have a label (e.g., it is a
2881 RETURN insn), search loop_number_exit_labels to find
2882 its label_ref, and remove it. Also turn off
2883 LABEL_OUTSIDE_LOOP_P bit. */
2884 if (JUMP_LABEL (insn))
2889 r = loop_number_exit_labels[this_loop_num];
2890 r; q = r, r = LABEL_NEXTREF (r))
2891 if (XEXP (r, 0) == JUMP_LABEL (insn))
2893 LABEL_OUTSIDE_LOOP_P (r) = 0;
2895 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2897 loop_number_exit_labels[this_loop_num]
2898 = LABEL_NEXTREF (r);
2902 for (loop_num = this_loop_num;
2903 loop_num != -1 && loop_num != target_loop_num;
2904 loop_num = loop_outer_loop[loop_num])
2905 loop_number_exit_count[loop_num]--;
2907 /* If we didn't find it, then something is wrong. */
2912 /* P is now a jump outside the loop, so it must be put
2913 in loop_number_exit_labels, and marked as such.
2914 The easiest way to do this is to just call
2915 mark_loop_jump again for P. */
2916 mark_loop_jump (PATTERN (p), this_loop_num);
2918 /* If INSN now jumps to the insn after it,
2920 if (JUMP_LABEL (insn) != 0
2921 && (next_real_insn (JUMP_LABEL (insn))
2922 == next_real_insn (insn)))
2926 /* Continue the loop after where the conditional
2927 branch used to jump, since the only branch insn
2928 in the block (if it still remains) is an inter-loop
2929 branch and hence needs no processing. */
2930 insn = NEXT_INSN (cond_label);
2932 if (--LABEL_NUSES (cond_label) == 0)
2933 delete_insn (cond_label);
2935 /* This loop will be continued with NEXT_INSN (insn). */
2936 insn = PREV_INSN (insn);
2943 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2944 loops it is contained in, mark the target loop invalid.
2946 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2949 mark_loop_jump (x, loop_num)
2957 switch (GET_CODE (x))
2970 /* There could be a label reference in here. */
2971 mark_loop_jump (XEXP (x, 0), loop_num);
2977 mark_loop_jump (XEXP (x, 0), loop_num);
2978 mark_loop_jump (XEXP (x, 1), loop_num);
2982 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2983 mark_loop_jump (XEXP (x, 1), loop_num);
2988 mark_loop_jump (XEXP (x, 0), loop_num);
2992 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
2994 /* Link together all labels that branch outside the loop. This
2995 is used by final_[bg]iv_value and the loop unrolling code. Also
2996 mark this LABEL_REF so we know that this branch should predict
2999 /* A check to make sure the label is not in an inner nested loop,
3000 since this does not count as a loop exit. */
3001 if (dest_loop != -1)
3003 for (outer_loop = dest_loop; outer_loop != -1;
3004 outer_loop = loop_outer_loop[outer_loop])
3005 if (outer_loop == loop_num)
3011 if (loop_num != -1 && outer_loop == -1)
3013 LABEL_OUTSIDE_LOOP_P (x) = 1;
3014 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
3015 loop_number_exit_labels[loop_num] = x;
3017 for (outer_loop = loop_num;
3018 outer_loop != -1 && outer_loop != dest_loop;
3019 outer_loop = loop_outer_loop[outer_loop])
3020 loop_number_exit_count[outer_loop]++;
3023 /* If this is inside a loop, but not in the current loop or one enclosed
3024 by it, it invalidates at least one loop. */
3026 if (dest_loop == -1)
3029 /* We must invalidate every nested loop containing the target of this
3030 label, except those that also contain the jump insn. */
3032 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
3034 /* Stop when we reach a loop that also contains the jump insn. */
3035 for (outer_loop = loop_num; outer_loop != -1;
3036 outer_loop = loop_outer_loop[outer_loop])
3037 if (dest_loop == outer_loop)
3040 /* If we get here, we know we need to invalidate a loop. */
3041 if (loop_dump_stream && ! loop_invalid[dest_loop])
3042 fprintf (loop_dump_stream,
3043 "\nLoop at %d ignored due to multiple entry points.\n",
3044 INSN_UID (loop_number_loop_starts[dest_loop]));
3046 loop_invalid[dest_loop] = 1;
3051 /* If this is not setting pc, ignore. */
3052 if (SET_DEST (x) == pc_rtx)
3053 mark_loop_jump (SET_SRC (x), loop_num);
3057 mark_loop_jump (XEXP (x, 1), loop_num);
3058 mark_loop_jump (XEXP (x, 2), loop_num);
3063 for (i = 0; i < XVECLEN (x, 0); i++)
3064 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
3068 for (i = 0; i < XVECLEN (x, 1); i++)
3069 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
3073 /* Strictly speaking this is not a jump into the loop, only a possible
3074 jump out of the loop. However, we have no way to link the destination
3075 of this jump onto the list of exit labels. To be safe we mark this
3076 loop and any containing loops as invalid. */
3079 for (outer_loop = loop_num; outer_loop != -1;
3080 outer_loop = loop_outer_loop[outer_loop])
3082 if (loop_dump_stream && ! loop_invalid[outer_loop])
3083 fprintf (loop_dump_stream,
3084 "\nLoop at %d ignored due to unknown exit jump.\n",
3085 INSN_UID (loop_number_loop_starts[outer_loop]));
3086 loop_invalid[outer_loop] = 1;
3093 /* Return nonzero if there is a label in the range from
3094 insn INSN to and including the insn whose luid is END
3095 INSN must have an assigned luid (i.e., it must not have
3096 been previously created by loop.c). */
3099 labels_in_range_p (insn, end)
3103 while (insn && INSN_LUID (insn) <= end)
3105 if (GET_CODE (insn) == CODE_LABEL)
3107 insn = NEXT_INSN (insn);
3113 /* Record that a memory reference X is being set. */
3116 note_addr_stored (x, y)
3118 rtx y ATTRIBUTE_UNUSED;
3120 if (x == 0 || GET_CODE (x) != MEM)
3123 /* Count number of memory writes.
3124 This affects heuristics in strength_reduce. */
3127 /* BLKmode MEM means all memory is clobbered. */
3128 if (GET_MODE (x) == BLKmode)
3129 unknown_address_altered = 1;
3131 if (unknown_address_altered)
3134 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3137 /* Return nonzero if the rtx X is invariant over the current loop.
3139 The value is 2 if we refer to something only conditionally invariant.
3141 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3142 Otherwise, a memory ref is invariant if it does not conflict with
3143 anything stored in `loop_store_mems'. */
3150 register enum rtx_code code;
3152 int conditional = 0;
3157 code = GET_CODE (x);
3167 /* A LABEL_REF is normally invariant, however, if we are unrolling
3168 loops, and this label is inside the loop, then it isn't invariant.
3169 This is because each unrolled copy of the loop body will have
3170 a copy of this label. If this was invariant, then an insn loading
3171 the address of this label into a register might get moved outside
3172 the loop, and then each loop body would end up using the same label.
3174 We don't know the loop bounds here though, so just fail for all
3176 if (flag_unroll_loops)
3183 case UNSPEC_VOLATILE:
3187 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3188 since the reg might be set by initialization within the loop. */
3190 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3191 || x == arg_pointer_rtx)
3192 && ! current_function_has_nonlocal_goto)
3196 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3199 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3202 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3205 /* Volatile memory references must be rejected. Do this before
3206 checking for read-only items, so that volatile read-only items
3207 will be rejected also. */
3208 if (MEM_VOLATILE_P (x))
3211 /* Read-only items (such as constants in a constant pool) are
3212 invariant if their address is. */
3213 if (RTX_UNCHANGING_P (x))
3216 /* If we had a subroutine call, any location in memory could have been
3218 if (unknown_address_altered)
3221 /* See if there is any dependence between a store and this load. */
3222 mem_list_entry = loop_store_mems;
3223 while (mem_list_entry)
3225 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3228 mem_list_entry = XEXP (mem_list_entry, 1);
3231 /* It's not invalidated by a store in memory
3232 but we must still verify the address is invariant. */
3236 /* Don't mess with insns declared volatile. */
3237 if (MEM_VOLATILE_P (x))
3245 fmt = GET_RTX_FORMAT (code);
3246 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3250 int tem = invariant_p (XEXP (x, i));
3256 else if (fmt[i] == 'E')
3259 for (j = 0; j < XVECLEN (x, i); j++)
3261 int tem = invariant_p (XVECEXP (x, i, j));
3271 return 1 + conditional;
3275 /* Return nonzero if all the insns in the loop that set REG
3276 are INSN and the immediately following insns,
3277 and if each of those insns sets REG in an invariant way
3278 (not counting uses of REG in them).
3280 The value is 2 if some of these insns are only conditionally invariant.
3282 We assume that INSN itself is the first set of REG
3283 and that its source is invariant. */
3286 consec_sets_invariant_p (reg, n_sets, insn)
3290 register rtx p = insn;
3291 register int regno = REGNO (reg);
3293 /* Number of sets we have to insist on finding after INSN. */
3294 int count = n_sets - 1;
3295 int old = VARRAY_INT (set_in_loop, regno);
3299 /* If N_SETS hit the limit, we can't rely on its value. */
3303 VARRAY_INT (set_in_loop, regno) = 0;
3307 register enum rtx_code code;
3311 code = GET_CODE (p);
3313 /* If library call, skip to end of it. */
3314 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3319 && (set = single_set (p))
3320 && GET_CODE (SET_DEST (set)) == REG
3321 && REGNO (SET_DEST (set)) == regno)
3323 this = invariant_p (SET_SRC (set));
3326 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3328 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3329 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3331 this = (CONSTANT_P (XEXP (temp, 0))
3332 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3333 && invariant_p (XEXP (temp, 0))));
3340 else if (code != NOTE)
3342 VARRAY_INT (set_in_loop, regno) = old;
3347 VARRAY_INT (set_in_loop, regno) = old;
3348 /* If invariant_p ever returned 2, we return 2. */
3349 return 1 + (value & 2);
3353 /* I don't think this condition is sufficient to allow INSN
3354 to be moved, so we no longer test it. */
3356 /* Return 1 if all insns in the basic block of INSN and following INSN
3357 that set REG are invariant according to TABLE. */
3360 all_sets_invariant_p (reg, insn, table)
3364 register rtx p = insn;
3365 register int regno = REGNO (reg);
3369 register enum rtx_code code;
3371 code = GET_CODE (p);
3372 if (code == CODE_LABEL || code == JUMP_INSN)
3374 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3375 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3376 && REGNO (SET_DEST (PATTERN (p))) == regno)
3378 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3385 /* Look at all uses (not sets) of registers in X. For each, if it is
3386 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3387 a different insn, set USAGE[REGNO] to const0_rtx. */
3390 find_single_use_in_loop (insn, x, usage)
3395 enum rtx_code code = GET_CODE (x);
3396 char *fmt = GET_RTX_FORMAT (code);
3400 VARRAY_RTX (usage, REGNO (x))
3401 = (VARRAY_RTX (usage, REGNO (x)) != 0
3402 && VARRAY_RTX (usage, REGNO (x)) != insn)
3403 ? const0_rtx : insn;
3405 else if (code == SET)
3407 /* Don't count SET_DEST if it is a REG; otherwise count things
3408 in SET_DEST because if a register is partially modified, it won't
3409 show up as a potential movable so we don't care how USAGE is set
3411 if (GET_CODE (SET_DEST (x)) != REG)
3412 find_single_use_in_loop (insn, SET_DEST (x), usage);
3413 find_single_use_in_loop (insn, SET_SRC (x), usage);
3416 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3418 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3419 find_single_use_in_loop (insn, XEXP (x, i), usage);
3420 else if (fmt[i] == 'E')
3421 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3422 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3426 /* Count and record any set in X which is contained in INSN. Update
3427 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3430 count_one_set (insn, x, may_not_move, last_set)
3432 varray_type may_not_move;
3435 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3436 /* Don't move a reg that has an explicit clobber.
3437 It's not worth the pain to try to do it correctly. */
3438 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3440 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3442 rtx dest = SET_DEST (x);
3443 while (GET_CODE (dest) == SUBREG
3444 || GET_CODE (dest) == ZERO_EXTRACT
3445 || GET_CODE (dest) == SIGN_EXTRACT
3446 || GET_CODE (dest) == STRICT_LOW_PART)
3447 dest = XEXP (dest, 0);
3448 if (GET_CODE (dest) == REG)
3450 register int regno = REGNO (dest);
3451 /* If this is the first setting of this reg
3452 in current basic block, and it was set before,
3453 it must be set in two basic blocks, so it cannot
3454 be moved out of the loop. */
3455 if (VARRAY_INT (set_in_loop, regno) > 0
3456 && last_set[regno] == 0)
3457 VARRAY_CHAR (may_not_move, regno) = 1;
3458 /* If this is not first setting in current basic block,
3459 see if reg was used in between previous one and this.
3460 If so, neither one can be moved. */
3461 if (last_set[regno] != 0
3462 && reg_used_between_p (dest, last_set[regno], insn))
3463 VARRAY_CHAR (may_not_move, regno) = 1;
3464 if (VARRAY_INT (set_in_loop, regno) < 127)
3465 ++VARRAY_INT (set_in_loop, regno);
3466 last_set[regno] = insn;
3471 /* Increment SET_IN_LOOP at the index of each register
3472 that is modified by an insn between FROM and TO.
3473 If the value of an element of SET_IN_LOOP becomes 127 or more,
3474 stop incrementing it, to avoid overflow.
3476 Store in SINGLE_USAGE[I] the single insn in which register I is
3477 used, if it is only used once. Otherwise, it is set to 0 (for no
3478 uses) or const0_rtx for more than one use. This parameter may be zero,
3479 in which case this processing is not done.
3481 Store in *COUNT_PTR the number of actual instruction
3482 in the loop. We use this to decide what is worth moving out. */
3484 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3485 In that case, it is the insn that last set reg n. */
3488 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3489 register rtx from, to;
3490 varray_type may_not_move;
3491 varray_type single_usage;
3495 register rtx *last_set = (rtx *) alloca (nregs * sizeof (rtx));
3497 register int count = 0;
3499 bzero ((char *) last_set, nregs * sizeof (rtx));
3500 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3502 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3506 /* Record registers that have exactly one use. */
3507 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3509 /* Include uses in REG_EQUAL notes. */
3510 if (REG_NOTES (insn))
3511 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3513 if (GET_CODE (PATTERN (insn)) == SET
3514 || GET_CODE (PATTERN (insn)) == CLOBBER)
3515 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3516 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3519 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3520 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3521 may_not_move, last_set);
3525 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3526 bzero ((char *) last_set, nregs * sizeof (rtx));
3531 /* Given a loop that is bounded by LOOP_START and LOOP_END
3532 and that is entered at SCAN_START,
3533 return 1 if the register set in SET contained in insn INSN is used by
3534 any insn that precedes INSN in cyclic order starting
3535 from the loop entry point.
3537 We don't want to use INSN_LUID here because if we restrict INSN to those
3538 that have a valid INSN_LUID, it means we cannot move an invariant out
3539 from an inner loop past two loops. */
3542 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3543 rtx set, insn, loop_start, scan_start, loop_end;
3545 rtx reg = SET_DEST (set);
3548 /* Scan forward checking for register usage. If we hit INSN, we
3549 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3550 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3552 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3553 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3563 /* A "basic induction variable" or biv is a pseudo reg that is set
3564 (within this loop) only by incrementing or decrementing it. */
3565 /* A "general induction variable" or giv is a pseudo reg whose
3566 value is a linear function of a biv. */
3568 /* Bivs are recognized by `basic_induction_var';
3569 Givs by `general_induction_var'. */
3571 /* Indexed by register number, indicates whether or not register is an
3572 induction variable, and if so what type. */
3574 varray_type reg_iv_type;
3576 /* Indexed by register number, contains pointer to `struct induction'
3577 if register is an induction variable. This holds general info for
3578 all induction variables. */
3580 varray_type reg_iv_info;
3582 /* Indexed by register number, contains pointer to `struct iv_class'
3583 if register is a basic induction variable. This holds info describing
3584 the class (a related group) of induction variables that the biv belongs
3587 struct iv_class **reg_biv_class;
3589 /* The head of a list which links together (via the next field)
3590 every iv class for the current loop. */
3592 struct iv_class *loop_iv_list;
3594 /* Givs made from biv increments are always splittable for loop unrolling.
3595 Since there is no regscan info for them, we have to keep track of them
3597 int first_increment_giv, last_increment_giv;
3599 /* Communication with routines called via `note_stores'. */
3601 static rtx note_insn;
3603 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3605 static rtx addr_placeholder;
3607 /* ??? Unfinished optimizations, and possible future optimizations,
3608 for the strength reduction code. */
3610 /* ??? The interaction of biv elimination, and recognition of 'constant'
3611 bivs, may cause problems. */
3613 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3614 performance problems.
3616 Perhaps don't eliminate things that can be combined with an addressing
3617 mode. Find all givs that have the same biv, mult_val, and add_val;
3618 then for each giv, check to see if its only use dies in a following
3619 memory address. If so, generate a new memory address and check to see
3620 if it is valid. If it is valid, then store the modified memory address,
3621 otherwise, mark the giv as not done so that it will get its own iv. */
3623 /* ??? Could try to optimize branches when it is known that a biv is always
3626 /* ??? When replace a biv in a compare insn, we should replace with closest
3627 giv so that an optimized branch can still be recognized by the combiner,
3628 e.g. the VAX acb insn. */
3630 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3631 was rerun in loop_optimize whenever a register was added or moved.
3632 Also, some of the optimizations could be a little less conservative. */
3634 /* Perform strength reduction and induction variable elimination.
3636 Pseudo registers created during this function will be beyond the last
3637 valid index in several tables including n_times_set and regno_last_uid.
3638 This does not cause a problem here, because the added registers cannot be
3639 givs outside of their loop, and hence will never be reconsidered.
3640 But scan_loop must check regnos to make sure they are in bounds.
3642 SCAN_START is the first instruction in the loop, as the loop would
3643 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3644 the first instruction in the loop, as it is layed out in the
3645 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG.
3646 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
3649 strength_reduce (scan_start, end, loop_top, insn_count,
3650 loop_start, loop_end, loop_cont, unroll_p, bct_p)
3658 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3666 /* This is 1 if current insn is not executed at least once for every loop
3668 int not_every_iteration = 0;
3669 /* This is 1 if current insn may be executed more than once for every
3671 int maybe_multiple = 0;
3672 /* Temporary list pointers for traversing loop_iv_list. */
3673 struct iv_class *bl, **backbl;
3674 /* Ratio of extra register life span we can justify
3675 for saving an instruction. More if loop doesn't call subroutines
3676 since in that case saving an insn makes more difference
3677 and more registers are available. */
3678 /* ??? could set this to last value of threshold in move_movables */
3679 int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3680 /* Map of pseudo-register replacements. */
3685 rtx end_insert_before;
3687 int n_extra_increment;
3688 struct loop_info loop_iteration_info;
3689 struct loop_info *loop_info = &loop_iteration_info;
3691 /* If scan_start points to the loop exit test, we have to be wary of
3692 subversive use of gotos inside expression statements. */
3693 if (prev_nonnote_insn (scan_start) != prev_nonnote_insn (loop_start))
3694 maybe_multiple = back_branch_in_range_p (scan_start, loop_start, loop_end);
3696 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3697 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3698 reg_biv_class = (struct iv_class **)
3699 alloca (max_reg_before_loop * sizeof (struct iv_class *));
3700 bzero ((char *) reg_biv_class, (max_reg_before_loop
3701 * sizeof (struct iv_class *)));
3704 addr_placeholder = gen_reg_rtx (Pmode);
3706 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3707 must be put before this insn, so that they will appear in the right
3708 order (i.e. loop order).
3710 If loop_end is the end of the current function, then emit a
3711 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3713 if (NEXT_INSN (loop_end) != 0)
3714 end_insert_before = NEXT_INSN (loop_end);
3716 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3718 /* Scan through loop to find all possible bivs. */
3720 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
3722 p = next_insn_in_loop (p, scan_start, end, loop_top))
3724 if (GET_CODE (p) == INSN
3725 && (set = single_set (p))
3726 && GET_CODE (SET_DEST (set)) == REG)
3728 dest_reg = SET_DEST (set);
3729 if (REGNO (dest_reg) < max_reg_before_loop
3730 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3731 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
3733 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3734 dest_reg, p, &inc_val, &mult_val,
3737 /* It is a possible basic induction variable.
3738 Create and initialize an induction structure for it. */
3741 = (struct induction *) alloca (sizeof (struct induction));
3743 record_biv (v, p, dest_reg, inc_val, mult_val, location,
3744 not_every_iteration, maybe_multiple);
3745 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
3747 else if (REGNO (dest_reg) < max_reg_before_loop)
3748 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
3752 /* Past CODE_LABEL, we get to insns that may be executed multiple
3753 times. The only way we can be sure that they can't is if every
3754 jump insn between here and the end of the loop either
3755 returns, exits the loop, is a jump to a location that is still
3756 behind the label, or is a jump to the loop start. */
3758 if (GET_CODE (p) == CODE_LABEL)
3766 insn = NEXT_INSN (insn);
3767 if (insn == scan_start)
3775 if (insn == scan_start)
3779 if (GET_CODE (insn) == JUMP_INSN
3780 && GET_CODE (PATTERN (insn)) != RETURN
3781 && (! condjump_p (insn)
3782 || (JUMP_LABEL (insn) != 0
3783 && JUMP_LABEL (insn) != scan_start
3784 && ! loop_insn_first_p (p, JUMP_LABEL (insn)))))
3792 /* Past a jump, we get to insns for which we can't count
3793 on whether they will be executed during each iteration. */
3794 /* This code appears twice in strength_reduce. There is also similar
3795 code in scan_loop. */
3796 if (GET_CODE (p) == JUMP_INSN
3797 /* If we enter the loop in the middle, and scan around to the
3798 beginning, don't set not_every_iteration for that.
3799 This can be any kind of jump, since we want to know if insns
3800 will be executed if the loop is executed. */
3801 && ! (JUMP_LABEL (p) == loop_top
3802 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3803 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3807 /* If this is a jump outside the loop, then it also doesn't
3808 matter. Check to see if the target of this branch is on the
3809 loop_number_exits_labels list. */
3811 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3813 label = LABEL_NEXTREF (label))
3814 if (XEXP (label, 0) == JUMP_LABEL (p))
3818 not_every_iteration = 1;
3821 else if (GET_CODE (p) == NOTE)
3823 /* At the virtual top of a converted loop, insns are again known to
3824 be executed each iteration: logically, the loop begins here
3825 even though the exit code has been duplicated.
3827 Insns are also again known to be executed each iteration at
3828 the LOOP_CONT note. */
3829 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3830 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3832 not_every_iteration = 0;
3833 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3835 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3839 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3840 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3841 or not an insn is known to be executed each iteration of the
3842 loop, whether or not any iterations are known to occur.
3844 Therefore, if we have just passed a label and have no more labels
3845 between here and the test insn of the loop, we know these insns
3846 will be executed each iteration. */
3848 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3849 && no_labels_between_p (p, loop_end)
3850 && loop_insn_first_p (p, loop_cont))
3851 not_every_iteration = 0;
3854 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3855 Make a sanity check against n_times_set. */
3856 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3858 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3859 /* Above happens if register modified by subreg, etc. */
3860 /* Make sure it is not recognized as a basic induction var: */
3861 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3862 /* If never incremented, it is invariant that we decided not to
3863 move. So leave it alone. */
3864 || ! bl->incremented)
3866 if (loop_dump_stream)
3867 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3869 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3870 ? "not induction variable"
3871 : (! bl->incremented ? "never incremented"
3874 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
3881 if (loop_dump_stream)
3882 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3886 /* Exit if there are no bivs. */
3889 /* Can still unroll the loop anyways, but indicate that there is no
3890 strength reduction info available. */
3892 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
3898 /* Find initial value for each biv by searching backwards from loop_start,
3899 halting at first label. Also record any test condition. */
3902 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3906 if (GET_CODE (p) == CALL_INSN)
3909 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3910 || GET_CODE (p) == CALL_INSN)
3911 note_stores (PATTERN (p), record_initial);
3913 /* Record any test of a biv that branches around the loop if no store
3914 between it and the start of loop. We only care about tests with
3915 constants and registers and only certain of those. */
3916 if (GET_CODE (p) == JUMP_INSN
3917 && JUMP_LABEL (p) != 0
3918 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3919 && (test = get_condition_for_loop (p)) != 0
3920 && GET_CODE (XEXP (test, 0)) == REG
3921 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3922 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3923 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3924 && bl->init_insn == 0)
3926 /* If an NE test, we have an initial value! */
3927 if (GET_CODE (test) == NE)
3930 bl->init_set = gen_rtx_SET (VOIDmode,
3931 XEXP (test, 0), XEXP (test, 1));
3934 bl->initial_test = test;
3938 /* Look at the each biv and see if we can say anything better about its
3939 initial value from any initializing insns set up above. (This is done
3940 in two passes to avoid missing SETs in a PARALLEL.) */
3941 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
3946 if (! bl->init_insn)
3949 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3950 is a constant, use the value of that. */
3951 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3952 && CONSTANT_P (XEXP (note, 0)))
3953 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3954 && CONSTANT_P (XEXP (note, 0))))
3955 src = XEXP (note, 0);
3957 src = SET_SRC (bl->init_set);
3959 if (loop_dump_stream)
3960 fprintf (loop_dump_stream,
3961 "Biv %d initialized at insn %d: initial value ",
3962 bl->regno, INSN_UID (bl->init_insn));
3964 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3965 || GET_MODE (src) == VOIDmode)
3966 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3968 bl->initial_value = src;
3970 if (loop_dump_stream)
3972 if (GET_CODE (src) == CONST_INT)
3974 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
3975 fputc ('\n', loop_dump_stream);
3979 print_rtl (loop_dump_stream, src);
3980 fprintf (loop_dump_stream, "\n");
3986 struct iv_class *bl2 = 0;
3989 /* Biv initial value is not a simple move. If it is the sum of
3990 another biv and a constant, check if both bivs are incremented
3991 in lockstep. Then we are actually looking at a giv.
3992 For simplicity, we only handle the case where there is but a
3993 single increment, and the register is not used elsewhere. */
3994 if (bl->biv_count == 1
3995 && bl->regno < max_reg_before_loop
3996 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
3997 && GET_CODE (src) == PLUS
3998 && GET_CODE (XEXP (src, 0)) == REG
3999 && CONSTANT_P (XEXP (src, 1))
4000 && ((increment = biv_total_increment (bl, loop_start, loop_end))
4003 int regno = REGNO (XEXP (src, 0));
4005 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
4006 if (bl2->regno == regno)
4010 /* Now, can we transform this biv into a giv? */
4012 && bl2->biv_count == 1
4013 && rtx_equal_p (increment,
4014 biv_total_increment (bl2, loop_start, loop_end))
4015 /* init_insn is only set to insns that are before loop_start
4016 without any intervening labels. */
4017 && ! reg_set_between_p (bl2->biv->src_reg,
4018 PREV_INSN (bl->init_insn), loop_start)
4019 /* The register from BL2 must be set before the register from
4020 BL is set, or we must be able to move the latter set after
4021 the former set. Currently there can't be any labels
4022 in-between when biv_toal_increment returns nonzero both times
4023 but we test it here in case some day some real cfg analysis
4024 gets used to set always_computable. */
4025 && ((loop_insn_first_p (bl2->biv->insn, bl->biv->insn)
4026 && no_labels_between_p (bl2->biv->insn, bl->biv->insn))
4027 || (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4029 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4030 && validate_change (bl->biv->insn,
4031 &SET_SRC (single_set (bl->biv->insn)),
4034 int loop_num = uid_loop_num[INSN_UID (loop_start)];
4035 rtx dominator = loop_number_cont_dominator[loop_num];
4036 rtx giv = bl->biv->src_reg;
4037 rtx giv_insn = bl->biv->insn;
4038 rtx after_giv = NEXT_INSN (giv_insn);
4040 if (loop_dump_stream)
4041 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4042 /* Let this giv be discovered by the generic code. */
4043 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4044 /* We can get better optimization if we can move the giv setting
4045 before the first giv use. */
4047 && ! loop_insn_first_p (dominator, scan_start)
4048 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4050 && ! reg_used_between_p (giv, loop_start, dominator)
4051 && ! reg_used_between_p (giv, giv_insn, loop_end))
4056 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4058 if ((GET_RTX_CLASS (GET_CODE (next)) == 'i'
4059 && (reg_mentioned_p (giv, PATTERN (next))
4060 || reg_set_p (bl2->biv->src_reg, next)))
4061 || GET_CODE (next) == JUMP_INSN)
4064 if (GET_RTX_CLASS (GET_CODE (next)) != 'i'
4065 || ! sets_cc0_p (PATTERN (next)))
4069 if (loop_dump_stream)
4070 fprintf (loop_dump_stream, "move after insn %d\n",
4071 INSN_UID (dominator));
4072 /* Avoid problems with luids by actually moving the insn
4073 and adjusting all luids in the range. */
4074 reorder_insns (giv_insn, giv_insn, dominator);
4075 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4077 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4078 /* If the only purpose of the init insn is to initialize
4079 this giv, delete it. */
4080 if (single_set (bl->init_insn)
4081 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4082 delete_insn (bl->init_insn);
4084 else if (! loop_insn_first_p (bl2->biv->insn, bl->biv->insn))
4086 rtx p = PREV_INSN (giv_insn);
4087 while (INSN_UID (p) >= max_uid_for_loop)
4089 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4090 compute_luids (after_giv, NEXT_INSN (giv_insn),
4093 /* Remove this biv from the chain. */
4103 /* If we can't make it a giv,
4104 let biv keep initial value of "itself". */
4105 else if (loop_dump_stream)
4106 fprintf (loop_dump_stream, "is complex\n");
4110 /* If a biv is unconditionally incremented several times in a row, convert
4111 all but the last increment into a giv. */
4113 /* Get an upper bound for the number of registers
4114 we might have after all bivs have been processed. */
4115 first_increment_giv = max_reg_num ();
4116 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4117 n_extra_increment += bl->biv_count - 1;
4118 /* XXX Temporary. */
4119 if (0 && n_extra_increment)
4121 int nregs = first_increment_giv + n_extra_increment;
4123 /* Reallocate reg_iv_type and reg_iv_info. */
4124 VARRAY_GROW (reg_iv_type, nregs);
4125 VARRAY_GROW (reg_iv_info, nregs);
4127 for (bl = loop_iv_list; bl; bl = bl->next)
4129 struct induction **vp, *v, *next;
4130 int biv_dead_after_loop = 0;
4132 /* The biv increments lists are in reverse order. Fix this first. */
4133 for (v = bl->biv, bl->biv = 0; v; v = next)
4136 v->next_iv = bl->biv;
4140 /* We must guard against the case that an early exit between v->insn
4141 and next->insn leaves the biv live after the loop, since that
4142 would mean that we'd be missing an increment for the final
4143 value. The following test to set biv_dead_after_loop is like
4144 the first part of the test to set bl->eliminable.
4145 We don't check here if we can calculate the final value, since
4146 this can't succeed if we already know that there is a jump
4147 between v->insn and next->insn, yet next->always_executed is
4148 set and next->maybe_multiple is cleared. Such a combination
4149 implies that the jump destination is outseide the loop.
4150 If we want to make this check more sophisticated, we should
4151 check each branch between v->insn and next->insn individually
4152 to see if it the biv is dead at its destination. */
4154 if (uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4156 && INSN_UID (bl->init_insn) < max_uid_for_loop
4157 && (uid_luid[REGNO_FIRST_UID (bl->regno)]
4158 >= INSN_LUID (bl->init_insn))
4159 #ifdef HAVE_decrement_and_branch_until_zero
4162 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4163 biv_dead_after_loop = 1;
4165 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4167 HOST_WIDE_INT offset;
4168 rtx set, add_val, old_reg, dest_reg, last_use_insn;
4169 int old_regno, new_regno;
4171 if (! v->always_executed
4172 || v->maybe_multiple
4173 || GET_CODE (v->add_val) != CONST_INT
4174 || ! next->always_executed
4175 || next->maybe_multiple
4176 || ! CONSTANT_P (next->add_val)
4177 || ! (biv_dead_after_loop
4178 || no_jumps_between_p (v->insn, next->insn)))
4183 offset = INTVAL (v->add_val);
4184 set = single_set (v->insn);
4185 add_val = plus_constant (next->add_val, offset);
4186 old_reg = v->dest_reg;
4187 dest_reg = gen_reg_rtx (v->mode);
4189 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4190 have been allocated with some slop space, so we may not
4191 actually need to reallocate them. If we do, the following
4192 if statement will be executed just once in this loop. */
4193 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4195 /* Grow all the remaining arrays. */
4196 VARRAY_GROW (set_in_loop, nregs);
4197 VARRAY_GROW (n_times_set, nregs);
4198 VARRAY_GROW (may_not_optimize, nregs);
4201 if (! validate_change (next->insn, next->location, add_val, 0))
4207 /* Here we can try to eliminate the increment by combining
4208 it into the uses. */
4210 /* Set last_use_insn so that we can check against it. */
4212 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4214 p = next_insn_in_loop (p, scan_start, end, loop_top))
4218 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4220 if (reg_mentioned_p (old_reg, PATTERN (p)))
4226 /* If we can't get the LUIDs for the insns, we can't
4227 calculate the lifetime. This is likely from unrolling
4228 of an inner loop, so there is little point in making this
4229 a DEST_REG giv anyways. */
4230 if (INSN_UID (v->insn) >= max_uid_for_loop
4231 || INSN_UID (last_use_insn) >= max_uid_for_loop
4232 || ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
4234 /* Change the increment at NEXT back to what it was. */
4235 if (! validate_change (next->insn, next->location,
4241 next->add_val = add_val;
4242 v->dest_reg = dest_reg;
4243 v->giv_type = DEST_REG;
4244 v->location = &SET_SRC (set);
4246 v->combined_with = 0;
4248 v->derive_adjustment = 0;
4254 v->auto_inc_opt = 0;
4257 v->derived_from = 0;
4258 v->always_computable = 1;
4259 v->always_executed = 1;
4261 v->no_const_addval = 0;
4263 old_regno = REGNO (old_reg);
4264 new_regno = REGNO (dest_reg);
4265 VARRAY_INT (set_in_loop, old_regno)--;
4266 VARRAY_INT (set_in_loop, new_regno) = 1;
4267 VARRAY_INT (n_times_set, old_regno)--;
4268 VARRAY_INT (n_times_set, new_regno) = 1;
4269 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4271 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4272 REG_IV_INFO (new_regno) = v;
4274 /* Remove the increment from the list of biv increments,
4275 and record it as a giv. */
4278 v->next_iv = bl->giv;
4281 v->benefit = rtx_cost (SET_SRC (set), SET);
4282 bl->total_benefit += v->benefit;
4284 /* Now replace the biv with DEST_REG in all insns between
4285 the replaced increment and the next increment, and
4286 remember the last insn that needed a replacement. */
4287 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4289 p = next_insn_in_loop (p, scan_start, end, loop_top))
4293 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4295 if (reg_mentioned_p (old_reg, PATTERN (p)))
4298 if (! validate_replace_rtx (old_reg, dest_reg, p))
4301 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4303 if (GET_CODE (note) == EXPR_LIST)
4305 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4309 v->last_use = last_use_insn;
4310 v->lifetime = INSN_LUID (v->insn) - INSN_LUID (last_use_insn);
4311 /* If the lifetime is zero, it means that this register is really
4312 a dead store. So mark this as a giv that can be ignored.
4313 This will not prevent the biv from being eliminated. */
4314 if (v->lifetime == 0)
4317 if (loop_dump_stream)
4318 fprintf (loop_dump_stream,
4319 "Increment %d of biv %d converted to giv %d.\n\n",
4320 INSN_UID (v->insn), old_regno, new_regno);
4324 last_increment_giv = max_reg_num () - 1;
4326 /* Search the loop for general induction variables. */
4328 /* A register is a giv if: it is only set once, it is a function of a
4329 biv and a constant (or invariant), and it is not a biv. */
4331 not_every_iteration = 0;
4337 /* At end of a straight-in loop, we are done.
4338 At end of a loop entered at the bottom, scan the top. */
4339 if (p == scan_start)
4347 if (p == scan_start)
4351 /* Look for a general induction variable in a register. */
4352 if (GET_CODE (p) == INSN
4353 && (set = single_set (p))
4354 && GET_CODE (SET_DEST (set)) == REG
4355 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
4362 rtx last_consec_insn;
4364 dest_reg = SET_DEST (set);
4365 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4368 if (/* SET_SRC is a giv. */
4369 (general_induction_var (SET_SRC (set), &src_reg, &add_val,
4370 &mult_val, 0, &benefit)
4371 /* Equivalent expression is a giv. */
4372 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4373 && general_induction_var (XEXP (regnote, 0), &src_reg,
4374 &add_val, &mult_val, 0,
4376 /* Don't try to handle any regs made by loop optimization.
4377 We have nothing on them in regno_first_uid, etc. */
4378 && REGNO (dest_reg) < max_reg_before_loop
4379 /* Don't recognize a BASIC_INDUCT_VAR here. */
4380 && dest_reg != src_reg
4381 /* This must be the only place where the register is set. */
4382 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
4383 /* or all sets must be consecutive and make a giv. */
4384 || (benefit = consec_sets_giv (benefit, p,
4386 &add_val, &mult_val,
4387 &last_consec_insn))))
4390 = (struct induction *) alloca (sizeof (struct induction));
4392 /* If this is a library call, increase benefit. */
4393 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4394 benefit += libcall_benefit (p);
4396 /* Skip the consecutive insns, if there are any. */
4397 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
4398 p = last_consec_insn;
4400 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
4401 DEST_REG, not_every_iteration, NULL_PTR, loop_start,
4407 #ifndef DONT_REDUCE_ADDR
4408 /* Look for givs which are memory addresses. */
4409 /* This resulted in worse code on a VAX 8600. I wonder if it
4411 if (GET_CODE (p) == INSN)
4412 find_mem_givs (PATTERN (p), p, not_every_iteration, loop_start,
4416 /* Update the status of whether giv can derive other givs. This can
4417 change when we pass a label or an insn that updates a biv. */
4418 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4419 || GET_CODE (p) == CODE_LABEL)
4420 update_giv_derive (p);
4422 /* Past a jump, we get to insns for which we can't count
4423 on whether they will be executed during each iteration. */
4424 /* This code appears twice in strength_reduce. There is also similar
4425 code in scan_loop. */
4426 if (GET_CODE (p) == JUMP_INSN
4427 /* If we enter the loop in the middle, and scan around to the
4428 beginning, don't set not_every_iteration for that.
4429 This can be any kind of jump, since we want to know if insns
4430 will be executed if the loop is executed. */
4431 && ! (JUMP_LABEL (p) == loop_top
4432 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
4433 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
4437 /* If this is a jump outside the loop, then it also doesn't
4438 matter. Check to see if the target of this branch is on the
4439 loop_number_exits_labels list. */
4441 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
4443 label = LABEL_NEXTREF (label))
4444 if (XEXP (label, 0) == JUMP_LABEL (p))
4448 not_every_iteration = 1;
4451 else if (GET_CODE (p) == NOTE)
4453 /* At the virtual top of a converted loop, insns are again known to
4454 be executed each iteration: logically, the loop begins here
4455 even though the exit code has been duplicated.
4457 Insns are also again known to be executed each iteration at
4458 the LOOP_CONT note. */
4459 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4460 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4462 not_every_iteration = 0;
4463 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4465 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4469 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4470 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4471 or not an insn is known to be executed each iteration of the
4472 loop, whether or not any iterations are known to occur.
4474 Therefore, if we have just passed a label and have no more labels
4475 between here and the test insn of the loop, we know these insns
4476 will be executed each iteration. */
4478 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4479 && no_labels_between_p (p, loop_end)
4480 && loop_insn_first_p (p, loop_cont))
4481 not_every_iteration = 0;
4484 /* Try to calculate and save the number of loop iterations. This is
4485 set to zero if the actual number can not be calculated. This must
4486 be called after all giv's have been identified, since otherwise it may
4487 fail if the iteration variable is a giv. */
4489 loop_iterations (loop_start, loop_end, loop_info);
4491 /* Now for each giv for which we still don't know whether or not it is
4492 replaceable, check to see if it is replaceable because its final value
4493 can be calculated. This must be done after loop_iterations is called,
4494 so that final_giv_value will work correctly. */
4496 for (bl = loop_iv_list; bl; bl = bl->next)
4498 struct induction *v;
4500 for (v = bl->giv; v; v = v->next_iv)
4501 if (! v->replaceable && ! v->not_replaceable)
4502 check_final_value (v, loop_start, loop_end, loop_info->n_iterations);
4505 /* Try to prove that the loop counter variable (if any) is always
4506 nonnegative; if so, record that fact with a REG_NONNEG note
4507 so that "decrement and branch until zero" insn can be used. */
4508 check_dbra_loop (loop_end, insn_count, loop_start, loop_info);
4510 /* Create reg_map to hold substitutions for replaceable giv regs.
4511 Some givs might have been made from biv increments, so look at
4512 reg_iv_type for a suitable size. */
4513 reg_map_size = reg_iv_type->num_elements;
4514 reg_map = (rtx *) alloca (reg_map_size * sizeof (rtx));
4515 bzero ((char *) reg_map, reg_map_size * sizeof (rtx));
4517 /* Examine each iv class for feasibility of strength reduction/induction
4518 variable elimination. */
4520 for (bl = loop_iv_list; bl; bl = bl->next)
4522 struct induction *v;
4525 rtx final_value = 0;
4528 /* Test whether it will be possible to eliminate this biv
4529 provided all givs are reduced. This is possible if either
4530 the reg is not used outside the loop, or we can compute
4531 what its final value will be.
4533 For architectures with a decrement_and_branch_until_zero insn,
4534 don't do this if we put a REG_NONNEG note on the endtest for
4537 /* Compare against bl->init_insn rather than loop_start.
4538 We aren't concerned with any uses of the biv between
4539 init_insn and loop_start since these won't be affected
4540 by the value of the biv elsewhere in the function, so
4541 long as init_insn doesn't use the biv itself.
4542 March 14, 1989 -- self@bayes.arc.nasa.gov */
4544 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4546 && INSN_UID (bl->init_insn) < max_uid_for_loop
4547 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4548 #ifdef HAVE_decrement_and_branch_until_zero
4551 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4552 || ((final_value = final_biv_value (bl, loop_start, loop_end,
4553 loop_info->n_iterations))
4554 #ifdef HAVE_decrement_and_branch_until_zero
4558 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
4559 threshold, insn_count);
4562 if (loop_dump_stream)
4564 fprintf (loop_dump_stream,
4565 "Cannot eliminate biv %d.\n",
4567 fprintf (loop_dump_stream,
4568 "First use: insn %d, last use: insn %d.\n",
4569 REGNO_FIRST_UID (bl->regno),
4570 REGNO_LAST_UID (bl->regno));
4574 /* Combine all giv's for this iv_class. */
4577 /* This will be true at the end, if all givs which depend on this
4578 biv have been strength reduced.
4579 We can't (currently) eliminate the biv unless this is so. */
4582 /* Check each giv in this class to see if we will benefit by reducing
4583 it. Skip giv's combined with others. */
4584 for (v = bl->giv; v; v = v->next_iv)
4586 struct induction *tv;
4588 if (v->ignore || v->same)
4591 benefit = v->benefit;
4593 /* Reduce benefit if not replaceable, since we will insert
4594 a move-insn to replace the insn that calculates this giv.
4595 Don't do this unless the giv is a user variable, since it
4596 will often be marked non-replaceable because of the duplication
4597 of the exit code outside the loop. In such a case, the copies
4598 we insert are dead and will be deleted. So they don't have
4599 a cost. Similar situations exist. */
4600 /* ??? The new final_[bg]iv_value code does a much better job
4601 of finding replaceable giv's, and hence this code may no longer
4603 if (! v->replaceable && ! bl->eliminable
4604 && REG_USERVAR_P (v->dest_reg))
4605 benefit -= copy_cost;
4607 /* Decrease the benefit to count the add-insns that we will
4608 insert to increment the reduced reg for the giv. */
4609 benefit -= add_cost * bl->biv_count;
4611 /* Decide whether to strength-reduce this giv or to leave the code
4612 unchanged (recompute it from the biv each time it is used).
4613 This decision can be made independently for each giv. */
4616 /* Attempt to guess whether autoincrement will handle some of the
4617 new add insns; if so, increase BENEFIT (undo the subtraction of
4618 add_cost that was done above). */
4619 if (v->giv_type == DEST_ADDR
4620 && GET_CODE (v->mult_val) == CONST_INT)
4622 if (HAVE_POST_INCREMENT
4623 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4624 benefit += add_cost * bl->biv_count;
4625 else if (HAVE_PRE_INCREMENT
4626 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4627 benefit += add_cost * bl->biv_count;
4628 else if (HAVE_POST_DECREMENT
4629 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4630 benefit += add_cost * bl->biv_count;
4631 else if (HAVE_PRE_DECREMENT
4632 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4633 benefit += add_cost * bl->biv_count;
4637 /* If an insn is not to be strength reduced, then set its ignore
4638 flag, and clear all_reduced. */
4640 /* A giv that depends on a reversed biv must be reduced if it is
4641 used after the loop exit, otherwise, it would have the wrong
4642 value after the loop exit. To make it simple, just reduce all
4643 of such giv's whether or not we know they are used after the loop
4646 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4649 if (loop_dump_stream)
4650 fprintf (loop_dump_stream,
4651 "giv of insn %d not worth while, %d vs %d.\n",
4653 v->lifetime * threshold * benefit, insn_count);
4659 /* Check that we can increment the reduced giv without a
4660 multiply insn. If not, reject it. */
4662 for (tv = bl->biv; tv; tv = tv->next_iv)
4663 if (tv->mult_val == const1_rtx
4664 && ! product_cheap_p (tv->add_val, v->mult_val))
4666 if (loop_dump_stream)
4667 fprintf (loop_dump_stream,
4668 "giv of insn %d: would need a multiply.\n",
4669 INSN_UID (v->insn));
4677 /* Check for givs whose first use is their definition and whose
4678 last use is the definition of another giv. If so, it is likely
4679 dead and should not be used to derive another giv nor to
4681 for (v = bl->giv; v; v = v->next_iv)
4684 || (v->same && v->same->ignore))
4689 struct induction *v1;
4691 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4692 if (v->last_use == v1->insn)
4695 else if (v->giv_type == DEST_REG
4696 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4698 struct induction *v1;
4700 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4701 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4707 /* XXX Temporary. */
4708 /* Now that we know which givs will be reduced, try to rearrange the
4709 combinations to reduce register pressure.
4710 recombine_givs calls find_life_end, which needs reg_iv_type and
4711 reg_iv_info to be valid for all pseudos. We do the necessary
4712 reallocation here since it allows to check if there are still
4713 more bivs to process. */
4714 nregs = max_reg_num ();
4715 if (nregs > reg_iv_type->num_elements)
4717 /* If there are still more bivs to process, allocate some slack
4718 space so that we're not constantly reallocating these arrays. */
4721 /* Reallocate reg_iv_type and reg_iv_info. */
4722 VARRAY_GROW (reg_iv_type, nregs);
4723 VARRAY_GROW (reg_iv_info, nregs);
4725 recombine_givs (bl, loop_start, loop_end, unroll_p);
4728 /* Reduce each giv that we decided to reduce. */
4730 for (v = bl->giv; v; v = v->next_iv)
4732 struct induction *tv;
4733 if (! v->ignore && v->same == 0)
4735 int auto_inc_opt = 0;
4737 /* If the code for derived givs immediately below has already
4738 allocated a new_reg, we must keep it. */
4740 v->new_reg = gen_reg_rtx (v->mode);
4742 if (v->derived_from)
4744 struct induction *d = v->derived_from;
4746 /* In case d->dest_reg is not replaceable, we have
4747 to replace it in v->insn now. */
4749 d->new_reg = gen_reg_rtx (d->mode);
4751 = replace_rtx (PATTERN (v->insn), d->dest_reg, d->new_reg);
4753 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4754 if (bl->biv_count != 1)
4756 /* For each place where the biv is incremented, add an
4757 insn to set the new, reduced reg for the giv. */
4758 for (tv = bl->biv; tv; tv = tv->next_iv)
4760 /* We always emit reduced giv increments before the
4761 biv increment when bl->biv_count != 1. So by
4762 emitting the add insns for derived givs after the
4763 biv increment, they pick up the updated value of
4765 emit_insn_after (copy_rtx (PATTERN (v->insn)),
4774 /* If the target has auto-increment addressing modes, and
4775 this is an address giv, then try to put the increment
4776 immediately after its use, so that flow can create an
4777 auto-increment addressing mode. */
4778 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4779 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4780 /* We don't handle reversed biv's because bl->biv->insn
4781 does not have a valid INSN_LUID. */
4783 && v->always_executed && ! v->maybe_multiple
4784 && INSN_UID (v->insn) < max_uid_for_loop)
4786 /* If other giv's have been combined with this one, then
4787 this will work only if all uses of the other giv's occur
4788 before this giv's insn. This is difficult to check.
4790 We simplify this by looking for the common case where
4791 there is one DEST_REG giv, and this giv's insn is the
4792 last use of the dest_reg of that DEST_REG giv. If the
4793 increment occurs after the address giv, then we can
4794 perform the optimization. (Otherwise, the increment
4795 would have to go before other_giv, and we would not be
4796 able to combine it with the address giv to get an
4797 auto-inc address.) */
4798 if (v->combined_with)
4800 struct induction *other_giv = 0;
4802 for (tv = bl->giv; tv; tv = tv->next_iv)
4810 if (! tv && other_giv
4811 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4812 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4813 == INSN_UID (v->insn))
4814 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4817 /* Check for case where increment is before the address
4818 giv. Do this test in "loop order". */
4819 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4820 && (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4821 || (INSN_LUID (bl->biv->insn)
4822 > INSN_LUID (scan_start))))
4823 || (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4824 && (INSN_LUID (scan_start)
4825 < INSN_LUID (bl->biv->insn))))
4834 /* We can't put an insn immediately after one setting
4835 cc0, or immediately before one using cc0. */
4836 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4837 || (auto_inc_opt == -1
4838 && (prev = prev_nonnote_insn (v->insn)) != 0
4839 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4840 && sets_cc0_p (PATTERN (prev))))
4846 v->auto_inc_opt = 1;
4850 /* For each place where the biv is incremented, add an insn
4851 to increment the new, reduced reg for the giv. */
4852 for (tv = bl->biv; tv; tv = tv->next_iv)
4857 insert_before = tv->insn;
4858 else if (auto_inc_opt == 1)
4859 insert_before = NEXT_INSN (v->insn);
4861 insert_before = v->insn;
4863 if (tv->mult_val == const1_rtx)
4864 emit_iv_add_mult (tv->add_val, v->mult_val,
4865 v->new_reg, v->new_reg, insert_before);
4866 else /* tv->mult_val == const0_rtx */
4867 /* A multiply is acceptable here
4868 since this is presumed to be seldom executed. */
4869 emit_iv_add_mult (tv->add_val, v->mult_val,
4870 v->add_val, v->new_reg, insert_before);
4873 /* Add code at loop start to initialize giv's reduced reg. */
4875 emit_iv_add_mult (bl->initial_value, v->mult_val,
4876 v->add_val, v->new_reg, loop_start);
4880 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4883 For each giv register that can be reduced now: if replaceable,
4884 substitute reduced reg wherever the old giv occurs;
4885 else add new move insn "giv_reg = reduced_reg". */
4887 for (v = bl->giv; v; v = v->next_iv)
4889 if (v->same && v->same->ignore)
4895 /* Update expression if this was combined, in case other giv was
4898 v->new_reg = replace_rtx (v->new_reg,
4899 v->same->dest_reg, v->same->new_reg);
4901 if (v->giv_type == DEST_ADDR)
4902 /* Store reduced reg as the address in the memref where we found
4904 validate_change (v->insn, v->location, v->new_reg, 0);
4905 else if (v->replaceable)
4907 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4910 /* I can no longer duplicate the original problem. Perhaps
4911 this is unnecessary now? */
4913 /* Replaceable; it isn't strictly necessary to delete the old
4914 insn and emit a new one, because v->dest_reg is now dead.
4916 However, especially when unrolling loops, the special
4917 handling for (set REG0 REG1) in the second cse pass may
4918 make v->dest_reg live again. To avoid this problem, emit
4919 an insn to set the original giv reg from the reduced giv.
4920 We can not delete the original insn, since it may be part
4921 of a LIBCALL, and the code in flow that eliminates dead
4922 libcalls will fail if it is deleted. */
4923 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4929 /* Not replaceable; emit an insn to set the original giv reg from
4930 the reduced giv, same as above. */
4931 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4935 /* When a loop is reversed, givs which depend on the reversed
4936 biv, and which are live outside the loop, must be set to their
4937 correct final value. This insn is only needed if the giv is
4938 not replaceable. The correct final value is the same as the
4939 value that the giv starts the reversed loop with. */
4940 if (bl->reversed && ! v->replaceable)
4941 emit_iv_add_mult (bl->initial_value, v->mult_val,
4942 v->add_val, v->dest_reg, end_insert_before);
4943 else if (v->final_value)
4947 /* If the loop has multiple exits, emit the insn before the
4948 loop to ensure that it will always be executed no matter
4949 how the loop exits. Otherwise, emit the insn after the loop,
4950 since this is slightly more efficient. */
4951 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4952 insert_before = loop_start;
4954 insert_before = end_insert_before;
4955 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4959 /* If the insn to set the final value of the giv was emitted
4960 before the loop, then we must delete the insn inside the loop
4961 that sets it. If this is a LIBCALL, then we must delete
4962 every insn in the libcall. Note, however, that
4963 final_giv_value will only succeed when there are multiple
4964 exits if the giv is dead at each exit, hence it does not
4965 matter that the original insn remains because it is dead
4967 /* Delete the insn inside the loop that sets the giv since
4968 the giv is now set before (or after) the loop. */
4969 delete_insn (v->insn);
4973 if (loop_dump_stream)
4975 fprintf (loop_dump_stream, "giv at %d reduced to ",
4976 INSN_UID (v->insn));
4977 print_rtl (loop_dump_stream, v->new_reg);
4978 fprintf (loop_dump_stream, "\n");
4982 /* All the givs based on the biv bl have been reduced if they
4985 /* For each giv not marked as maybe dead that has been combined with a
4986 second giv, clear any "maybe dead" mark on that second giv.
4987 v->new_reg will either be or refer to the register of the giv it
4990 Doing this clearing avoids problems in biv elimination where a
4991 giv's new_reg is a complex value that can't be put in the insn but
4992 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4993 Since the register will be used in either case, we'd prefer it be
4994 used from the simpler giv. */
4996 for (v = bl->giv; v; v = v->next_iv)
4997 if (! v->maybe_dead && v->same)
4998 v->same->maybe_dead = 0;
5000 /* Try to eliminate the biv, if it is a candidate.
5001 This won't work if ! all_reduced,
5002 since the givs we planned to use might not have been reduced.
5004 We have to be careful that we didn't initially think we could eliminate
5005 this biv because of a giv that we now think may be dead and shouldn't
5006 be used as a biv replacement.
5008 Also, there is the possibility that we may have a giv that looks
5009 like it can be used to eliminate a biv, but the resulting insn
5010 isn't valid. This can happen, for example, on the 88k, where a
5011 JUMP_INSN can compare a register only with zero. Attempts to
5012 replace it with a compare with a constant will fail.
5014 Note that in cases where this call fails, we may have replaced some
5015 of the occurrences of the biv with a giv, but no harm was done in
5016 doing so in the rare cases where it can occur. */
5018 if (all_reduced == 1 && bl->eliminable
5019 && maybe_eliminate_biv (bl, loop_start, end, 1,
5020 threshold, insn_count))
5023 /* ?? If we created a new test to bypass the loop entirely,
5024 or otherwise drop straight in, based on this test, then
5025 we might want to rewrite it also. This way some later
5026 pass has more hope of removing the initialization of this
5029 /* If final_value != 0, then the biv may be used after loop end
5030 and we must emit an insn to set it just in case.
5032 Reversed bivs already have an insn after the loop setting their
5033 value, so we don't need another one. We can't calculate the
5034 proper final value for such a biv here anyways. */
5035 if (final_value != 0 && ! bl->reversed)
5039 /* If the loop has multiple exits, emit the insn before the
5040 loop to ensure that it will always be executed no matter
5041 how the loop exits. Otherwise, emit the insn after the
5042 loop, since this is slightly more efficient. */
5043 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
5044 insert_before = loop_start;
5046 insert_before = end_insert_before;
5048 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
5053 /* Delete all of the instructions inside the loop which set
5054 the biv, as they are all dead. If is safe to delete them,
5055 because an insn setting a biv will never be part of a libcall. */
5056 /* However, deleting them will invalidate the regno_last_uid info,
5057 so keeping them around is more convenient. Final_biv_value
5058 will only succeed when there are multiple exits if the biv
5059 is dead at each exit, hence it does not matter that the original
5060 insn remains, because it is dead anyways. */
5061 for (v = bl->biv; v; v = v->next_iv)
5062 delete_insn (v->insn);
5065 if (loop_dump_stream)
5066 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5071 /* Go through all the instructions in the loop, making all the
5072 register substitutions scheduled in REG_MAP. */
5074 for (p = loop_start; p != end; p = NEXT_INSN (p))
5075 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5076 || GET_CODE (p) == CALL_INSN)
5078 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5079 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5083 /* Unroll loops from within strength reduction so that we can use the
5084 induction variable information that strength_reduce has already
5088 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
5091 #ifdef HAVE_decrement_and_branch_on_count
5092 /* Instrument the loop with BCT insn. */
5093 if (HAVE_decrement_and_branch_on_count && bct_p
5094 && flag_branch_on_count_reg)
5095 insert_bct (loop_start, loop_end, loop_info);
5096 #endif /* HAVE_decrement_and_branch_on_count */
5098 if (loop_dump_stream)
5099 fprintf (loop_dump_stream, "\n");
5100 VARRAY_FREE (reg_iv_type);
5101 VARRAY_FREE (reg_iv_info);
5104 /* Return 1 if X is a valid source for an initial value (or as value being
5105 compared against in an initial test).
5107 X must be either a register or constant and must not be clobbered between
5108 the current insn and the start of the loop.
5110 INSN is the insn containing X. */
5113 valid_initial_value_p (x, insn, call_seen, loop_start)
5122 /* Only consider pseudos we know about initialized in insns whose luids
5124 if (GET_CODE (x) != REG
5125 || REGNO (x) >= max_reg_before_loop)
5128 /* Don't use call-clobbered registers across a call which clobbers it. On
5129 some machines, don't use any hard registers at all. */
5130 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5131 && (SMALL_REGISTER_CLASSES
5132 || (call_used_regs[REGNO (x)] && call_seen)))
5135 /* Don't use registers that have been clobbered before the start of the
5137 if (reg_set_between_p (x, insn, loop_start))
5143 /* Scan X for memory refs and check each memory address
5144 as a possible giv. INSN is the insn whose pattern X comes from.
5145 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5146 every loop iteration. */
5149 find_mem_givs (x, insn, not_every_iteration, loop_start, loop_end)
5152 int not_every_iteration;
5153 rtx loop_start, loop_end;
5156 register enum rtx_code code;
5162 code = GET_CODE (x);
5186 /* This code used to disable creating GIVs with mult_val == 1 and
5187 add_val == 0. However, this leads to lost optimizations when
5188 it comes time to combine a set of related DEST_ADDR GIVs, since
5189 this one would not be seen. */
5191 if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
5192 &mult_val, 1, &benefit))
5194 /* Found one; record it. */
5196 = (struct induction *) oballoc (sizeof (struct induction));
5198 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
5199 add_val, benefit, DEST_ADDR, not_every_iteration,
5200 &XEXP (x, 0), loop_start, loop_end);
5202 v->mem_mode = GET_MODE (x);
5211 /* Recursively scan the subexpressions for other mem refs. */
5213 fmt = GET_RTX_FORMAT (code);
5214 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5216 find_mem_givs (XEXP (x, i), insn, not_every_iteration, loop_start,
5218 else if (fmt[i] == 'E')
5219 for (j = 0; j < XVECLEN (x, i); j++)
5220 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
5221 loop_start, loop_end);
5224 /* Fill in the data about one biv update.
5225 V is the `struct induction' in which we record the biv. (It is
5226 allocated by the caller, with alloca.)
5227 INSN is the insn that sets it.
5228 DEST_REG is the biv's reg.
5230 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5231 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5232 being set to INC_VAL.
5234 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5235 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5236 can be executed more than once per iteration. If MAYBE_MULTIPLE
5237 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5238 executed exactly once per iteration. */
5241 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5242 not_every_iteration, maybe_multiple)
5243 struct induction *v;
5249 int not_every_iteration;
5252 struct iv_class *bl;
5255 v->src_reg = dest_reg;
5256 v->dest_reg = dest_reg;
5257 v->mult_val = mult_val;
5258 v->add_val = inc_val;
5259 v->location = location;
5260 v->mode = GET_MODE (dest_reg);
5261 v->always_computable = ! not_every_iteration;
5262 v->always_executed = ! not_every_iteration;
5263 v->maybe_multiple = maybe_multiple;
5265 /* Add this to the reg's iv_class, creating a class
5266 if this is the first incrementation of the reg. */
5268 bl = reg_biv_class[REGNO (dest_reg)];
5271 /* Create and initialize new iv_class. */
5273 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5275 bl->regno = REGNO (dest_reg);
5281 /* Set initial value to the reg itself. */
5282 bl->initial_value = dest_reg;
5283 /* We haven't seen the initializing insn yet */
5286 bl->initial_test = 0;
5287 bl->incremented = 0;
5291 bl->total_benefit = 0;
5293 /* Add this class to loop_iv_list. */
5294 bl->next = loop_iv_list;
5297 /* Put it in the array of biv register classes. */
5298 reg_biv_class[REGNO (dest_reg)] = bl;
5301 /* Update IV_CLASS entry for this biv. */
5302 v->next_iv = bl->biv;
5305 if (mult_val == const1_rtx)
5306 bl->incremented = 1;
5308 if (loop_dump_stream)
5310 fprintf (loop_dump_stream,
5311 "Insn %d: possible biv, reg %d,",
5312 INSN_UID (insn), REGNO (dest_reg));
5313 if (GET_CODE (inc_val) == CONST_INT)
5315 fprintf (loop_dump_stream, " const =");
5316 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5317 fputc ('\n', loop_dump_stream);
5321 fprintf (loop_dump_stream, " const = ");
5322 print_rtl (loop_dump_stream, inc_val);
5323 fprintf (loop_dump_stream, "\n");
5328 /* Fill in the data about one giv.
5329 V is the `struct induction' in which we record the giv. (It is
5330 allocated by the caller, with alloca.)
5331 INSN is the insn that sets it.
5332 BENEFIT estimates the savings from deleting this insn.
5333 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5334 into a register or is used as a memory address.
5336 SRC_REG is the biv reg which the giv is computed from.
5337 DEST_REG is the giv's reg (if the giv is stored in a reg).
5338 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5339 LOCATION points to the place where this giv's value appears in INSN. */
5342 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5343 type, not_every_iteration, location, loop_start, loop_end)
5344 struct induction *v;
5348 rtx mult_val, add_val;
5351 int not_every_iteration;
5353 rtx loop_start, loop_end;
5355 struct induction *b;
5356 struct iv_class *bl;
5357 rtx set = single_set (insn);
5360 v->src_reg = src_reg;
5362 v->dest_reg = dest_reg;
5363 v->mult_val = mult_val;
5364 v->add_val = add_val;
5365 v->benefit = benefit;
5366 v->location = location;
5368 v->combined_with = 0;
5369 v->maybe_multiple = 0;
5371 v->derive_adjustment = 0;
5377 v->auto_inc_opt = 0;
5380 v->derived_from = 0;
5383 /* The v->always_computable field is used in update_giv_derive, to
5384 determine whether a giv can be used to derive another giv. For a
5385 DEST_REG giv, INSN computes a new value for the giv, so its value
5386 isn't computable if INSN insn't executed every iteration.
5387 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5388 it does not compute a new value. Hence the value is always computable
5389 regardless of whether INSN is executed each iteration. */
5391 if (type == DEST_ADDR)
5392 v->always_computable = 1;
5394 v->always_computable = ! not_every_iteration;
5396 v->always_executed = ! not_every_iteration;
5398 if (type == DEST_ADDR)
5400 v->mode = GET_MODE (*location);
5403 else /* type == DEST_REG */
5405 v->mode = GET_MODE (SET_DEST (set));
5407 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5408 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5410 /* If the lifetime is zero, it means that this register is
5411 really a dead store. So mark this as a giv that can be
5412 ignored. This will not prevent the biv from being eliminated. */
5413 if (v->lifetime == 0)
5416 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5417 REG_IV_INFO (REGNO (dest_reg)) = v;
5420 /* Add the giv to the class of givs computed from one biv. */
5422 bl = reg_biv_class[REGNO (src_reg)];
5425 v->next_iv = bl->giv;
5427 /* Don't count DEST_ADDR. This is supposed to count the number of
5428 insns that calculate givs. */
5429 if (type == DEST_REG)
5431 bl->total_benefit += benefit;
5434 /* Fatal error, biv missing for this giv? */
5437 if (type == DEST_ADDR)
5441 /* The giv can be replaced outright by the reduced register only if all
5442 of the following conditions are true:
5443 - the insn that sets the giv is always executed on any iteration
5444 on which the giv is used at all
5445 (there are two ways to deduce this:
5446 either the insn is executed on every iteration,
5447 or all uses follow that insn in the same basic block),
5448 - the giv is not used outside the loop
5449 - no assignments to the biv occur during the giv's lifetime. */
5451 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5452 /* Previous line always fails if INSN was moved by loop opt. */
5453 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
5454 && (! not_every_iteration
5455 || last_use_this_basic_block (dest_reg, insn)))
5457 /* Now check that there are no assignments to the biv within the
5458 giv's lifetime. This requires two separate checks. */
5460 /* Check each biv update, and fail if any are between the first
5461 and last use of the giv.
5463 If this loop contains an inner loop that was unrolled, then
5464 the insn modifying the biv may have been emitted by the loop
5465 unrolling code, and hence does not have a valid luid. Just
5466 mark the biv as not replaceable in this case. It is not very
5467 useful as a biv, because it is used in two different loops.
5468 It is very unlikely that we would be able to optimize the giv
5469 using this biv anyways. */
5472 for (b = bl->biv; b; b = b->next_iv)
5474 if (INSN_UID (b->insn) >= max_uid_for_loop
5475 || ((uid_luid[INSN_UID (b->insn)]
5476 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5477 && (uid_luid[INSN_UID (b->insn)]
5478 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5481 v->not_replaceable = 1;
5486 /* If there are any backwards branches that go from after the
5487 biv update to before it, then this giv is not replaceable. */
5489 for (b = bl->biv; b; b = b->next_iv)
5490 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
5493 v->not_replaceable = 1;
5499 /* May still be replaceable, we don't have enough info here to
5502 v->not_replaceable = 0;
5506 /* Record whether the add_val contains a const_int, for later use by
5511 v->no_const_addval = 1;
5512 if (tem == const0_rtx)
5514 else if (GET_CODE (tem) == CONST_INT)
5515 v->no_const_addval = 0;
5516 else if (GET_CODE (tem) == PLUS)
5520 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5521 tem = XEXP (tem, 0);
5522 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5523 tem = XEXP (tem, 1);
5527 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5528 v->no_const_addval = 0;
5532 if (loop_dump_stream)
5534 if (type == DEST_REG)
5535 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5536 INSN_UID (insn), REGNO (dest_reg));
5538 fprintf (loop_dump_stream, "Insn %d: dest address",
5541 fprintf (loop_dump_stream, " src reg %d benefit %d",
5542 REGNO (src_reg), v->benefit);
5543 fprintf (loop_dump_stream, " lifetime %d",
5547 fprintf (loop_dump_stream, " replaceable");
5549 if (v->no_const_addval)
5550 fprintf (loop_dump_stream, " ncav");
5552 if (GET_CODE (mult_val) == CONST_INT)
5554 fprintf (loop_dump_stream, " mult ");
5555 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5559 fprintf (loop_dump_stream, " mult ");
5560 print_rtl (loop_dump_stream, mult_val);
5563 if (GET_CODE (add_val) == CONST_INT)
5565 fprintf (loop_dump_stream, " add ");
5566 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5570 fprintf (loop_dump_stream, " add ");
5571 print_rtl (loop_dump_stream, add_val);
5575 if (loop_dump_stream)
5576 fprintf (loop_dump_stream, "\n");
5581 /* All this does is determine whether a giv can be made replaceable because
5582 its final value can be calculated. This code can not be part of record_giv
5583 above, because final_giv_value requires that the number of loop iterations
5584 be known, and that can not be accurately calculated until after all givs
5585 have been identified. */
5588 check_final_value (v, loop_start, loop_end, n_iterations)
5589 struct induction *v;
5590 rtx loop_start, loop_end;
5591 unsigned HOST_WIDE_INT n_iterations;
5593 struct iv_class *bl;
5594 rtx final_value = 0;
5596 bl = reg_biv_class[REGNO (v->src_reg)];
5598 /* DEST_ADDR givs will never reach here, because they are always marked
5599 replaceable above in record_giv. */
5601 /* The giv can be replaced outright by the reduced register only if all
5602 of the following conditions are true:
5603 - the insn that sets the giv is always executed on any iteration
5604 on which the giv is used at all
5605 (there are two ways to deduce this:
5606 either the insn is executed on every iteration,
5607 or all uses follow that insn in the same basic block),
5608 - its final value can be calculated (this condition is different
5609 than the one above in record_giv)
5610 - no assignments to the biv occur during the giv's lifetime. */
5613 /* This is only called now when replaceable is known to be false. */
5614 /* Clear replaceable, so that it won't confuse final_giv_value. */
5618 if ((final_value = final_giv_value (v, loop_start, loop_end, n_iterations))
5619 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5621 int biv_increment_seen = 0;
5627 /* When trying to determine whether or not a biv increment occurs
5628 during the lifetime of the giv, we can ignore uses of the variable
5629 outside the loop because final_value is true. Hence we can not
5630 use regno_last_uid and regno_first_uid as above in record_giv. */
5632 /* Search the loop to determine whether any assignments to the
5633 biv occur during the giv's lifetime. Start with the insn
5634 that sets the giv, and search around the loop until we come
5635 back to that insn again.
5637 Also fail if there is a jump within the giv's lifetime that jumps
5638 to somewhere outside the lifetime but still within the loop. This
5639 catches spaghetti code where the execution order is not linear, and
5640 hence the above test fails. Here we assume that the giv lifetime
5641 does not extend from one iteration of the loop to the next, so as
5642 to make the test easier. Since the lifetime isn't known yet,
5643 this requires two loops. See also record_giv above. */
5645 last_giv_use = v->insn;
5651 p = NEXT_INSN (loop_start);
5655 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5656 || GET_CODE (p) == CALL_INSN)
5658 if (biv_increment_seen)
5660 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5663 v->not_replaceable = 1;
5667 else if (reg_set_p (v->src_reg, PATTERN (p)))
5668 biv_increment_seen = 1;
5669 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5674 /* Now that the lifetime of the giv is known, check for branches
5675 from within the lifetime to outside the lifetime if it is still
5685 p = NEXT_INSN (loop_start);
5686 if (p == last_giv_use)
5689 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5690 && LABEL_NAME (JUMP_LABEL (p))
5691 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5692 && loop_insn_first_p (loop_start, JUMP_LABEL (p)))
5693 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5694 && loop_insn_first_p (JUMP_LABEL (p), loop_end))))
5697 v->not_replaceable = 1;
5699 if (loop_dump_stream)
5700 fprintf (loop_dump_stream,
5701 "Found branch outside giv lifetime.\n");
5708 /* If it is replaceable, then save the final value. */
5710 v->final_value = final_value;
5713 if (loop_dump_stream && v->replaceable)
5714 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5715 INSN_UID (v->insn), REGNO (v->dest_reg));
5718 /* Update the status of whether a giv can derive other givs.
5720 We need to do something special if there is or may be an update to the biv
5721 between the time the giv is defined and the time it is used to derive
5724 In addition, a giv that is only conditionally set is not allowed to
5725 derive another giv once a label has been passed.
5727 The cases we look at are when a label or an update to a biv is passed. */
5730 update_giv_derive (p)
5733 struct iv_class *bl;
5734 struct induction *biv, *giv;
5738 /* Search all IV classes, then all bivs, and finally all givs.
5740 There are three cases we are concerned with. First we have the situation
5741 of a giv that is only updated conditionally. In that case, it may not
5742 derive any givs after a label is passed.
5744 The second case is when a biv update occurs, or may occur, after the
5745 definition of a giv. For certain biv updates (see below) that are
5746 known to occur between the giv definition and use, we can adjust the
5747 giv definition. For others, or when the biv update is conditional,
5748 we must prevent the giv from deriving any other givs. There are two
5749 sub-cases within this case.
5751 If this is a label, we are concerned with any biv update that is done
5752 conditionally, since it may be done after the giv is defined followed by
5753 a branch here (actually, we need to pass both a jump and a label, but
5754 this extra tracking doesn't seem worth it).
5756 If this is a jump, we are concerned about any biv update that may be
5757 executed multiple times. We are actually only concerned about
5758 backward jumps, but it is probably not worth performing the test
5759 on the jump again here.
5761 If this is a biv update, we must adjust the giv status to show that a
5762 subsequent biv update was performed. If this adjustment cannot be done,
5763 the giv cannot derive further givs. */
5765 for (bl = loop_iv_list; bl; bl = bl->next)
5766 for (biv = bl->biv; biv; biv = biv->next_iv)
5767 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5770 for (giv = bl->giv; giv; giv = giv->next_iv)
5772 /* If cant_derive is already true, there is no point in
5773 checking all of these conditions again. */
5774 if (giv->cant_derive)
5777 /* If this giv is conditionally set and we have passed a label,
5778 it cannot derive anything. */
5779 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5780 giv->cant_derive = 1;
5782 /* Skip givs that have mult_val == 0, since
5783 they are really invariants. Also skip those that are
5784 replaceable, since we know their lifetime doesn't contain
5786 else if (giv->mult_val == const0_rtx || giv->replaceable)
5789 /* The only way we can allow this giv to derive another
5790 is if this is a biv increment and we can form the product
5791 of biv->add_val and giv->mult_val. In this case, we will
5792 be able to compute a compensation. */
5793 else if (biv->insn == p)
5797 if (biv->mult_val == const1_rtx)
5798 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
5803 if (tem && giv->derive_adjustment)
5804 tem = simplify_giv_expr (gen_rtx_PLUS (giv->mode, tem,
5805 giv->derive_adjustment),
5808 giv->derive_adjustment = tem;
5810 giv->cant_derive = 1;
5812 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5813 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5814 giv->cant_derive = 1;
5819 /* Check whether an insn is an increment legitimate for a basic induction var.
5820 X is the source of insn P, or a part of it.
5821 MODE is the mode in which X should be interpreted.
5823 DEST_REG is the putative biv, also the destination of the insn.
5824 We accept patterns of these forms:
5825 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5826 REG = INVARIANT + REG
5828 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5829 store the additive term into *INC_VAL, and store the place where
5830 we found the additive term into *LOCATION.
5832 If X is an assignment of an invariant into DEST_REG, we set
5833 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5835 We also want to detect a BIV when it corresponds to a variable
5836 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5837 of the variable may be a PLUS that adds a SUBREG of that variable to
5838 an invariant and then sign- or zero-extends the result of the PLUS
5841 Most GIVs in such cases will be in the promoted mode, since that is the
5842 probably the natural computation mode (and almost certainly the mode
5843 used for addresses) on the machine. So we view the pseudo-reg containing
5844 the variable as the BIV, as if it were simply incremented.
5846 Note that treating the entire pseudo as a BIV will result in making
5847 simple increments to any GIVs based on it. However, if the variable
5848 overflows in its declared mode but not its promoted mode, the result will
5849 be incorrect. This is acceptable if the variable is signed, since
5850 overflows in such cases are undefined, but not if it is unsigned, since
5851 those overflows are defined. So we only check for SIGN_EXTEND and
5854 If we cannot find a biv, we return 0. */
5857 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val, location)
5859 enum machine_mode mode;
5866 register enum rtx_code code;
5870 code = GET_CODE (x);
5874 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5875 || (GET_CODE (XEXP (x, 0)) == SUBREG
5876 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5877 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5879 argp = &XEXP (x, 1);
5881 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5882 || (GET_CODE (XEXP (x, 1)) == SUBREG
5883 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5884 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5886 argp = &XEXP (x, 0);
5892 if (invariant_p (arg) != 1)
5895 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5896 *mult_val = const1_rtx;
5901 /* If this is a SUBREG for a promoted variable, check the inner
5903 if (SUBREG_PROMOTED_VAR_P (x))
5904 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
5905 dest_reg, p, inc_val, mult_val, location);
5909 /* If this register is assigned in a previous insn, look at its
5910 source, but don't go outside the loop or past a label. */
5916 insn = PREV_INSN (insn);
5917 } while (insn && GET_CODE (insn) == NOTE
5918 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5922 set = single_set (insn);
5926 if ((SET_DEST (set) == x
5927 || (GET_CODE (SET_DEST (set)) == SUBREG
5928 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
5930 && SUBREG_REG (SET_DEST (set)) == x))
5931 && basic_induction_var (SET_SRC (set),
5932 (GET_MODE (SET_SRC (set)) == VOIDmode
5934 : GET_MODE (SET_SRC (set))),
5936 inc_val, mult_val, location))
5939 /* ... fall through ... */
5941 /* Can accept constant setting of biv only when inside inner most loop.
5942 Otherwise, a biv of an inner loop may be incorrectly recognized
5943 as a biv of the outer loop,
5944 causing code to be moved INTO the inner loop. */
5946 if (invariant_p (x) != 1)
5951 /* convert_modes aborts if we try to convert to or from CCmode, so just
5952 exclude that case. It is very unlikely that a condition code value
5953 would be a useful iterator anyways. */
5954 if (loops_enclosed == 1
5955 && GET_MODE_CLASS (mode) != MODE_CC
5956 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
5958 /* Possible bug here? Perhaps we don't know the mode of X. */
5959 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5960 *mult_val = const0_rtx;
5967 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5968 dest_reg, p, inc_val, mult_val, location);
5971 /* Similar, since this can be a sign extension. */
5972 for (insn = PREV_INSN (p);
5973 (insn && GET_CODE (insn) == NOTE
5974 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5975 insn = PREV_INSN (insn))
5979 set = single_set (insn);
5981 if (set && SET_DEST (set) == XEXP (x, 0)
5982 && GET_CODE (XEXP (x, 1)) == CONST_INT
5983 && INTVAL (XEXP (x, 1)) >= 0
5984 && GET_CODE (SET_SRC (set)) == ASHIFT
5985 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5986 return basic_induction_var (XEXP (SET_SRC (set), 0),
5987 GET_MODE (XEXP (x, 0)),
5988 dest_reg, insn, inc_val, mult_val,
5997 /* A general induction variable (giv) is any quantity that is a linear
5998 function of a basic induction variable,
5999 i.e. giv = biv * mult_val + add_val.
6000 The coefficients can be any loop invariant quantity.
6001 A giv need not be computed directly from the biv;
6002 it can be computed by way of other givs. */
6004 /* Determine whether X computes a giv.
6005 If it does, return a nonzero value
6006 which is the benefit from eliminating the computation of X;
6007 set *SRC_REG to the register of the biv that it is computed from;
6008 set *ADD_VAL and *MULT_VAL to the coefficients,
6009 such that the value of X is biv * mult + add; */
6012 general_induction_var (x, src_reg, add_val, mult_val, is_addr, pbenefit)
6023 /* If this is an invariant, forget it, it isn't a giv. */
6024 if (invariant_p (x) == 1)
6027 /* See if the expression could be a giv and get its form.
6028 Mark our place on the obstack in case we don't find a giv. */
6029 storage = (char *) oballoc (0);
6031 x = simplify_giv_expr (x, pbenefit);
6038 switch (GET_CODE (x))
6042 /* Since this is now an invariant and wasn't before, it must be a giv
6043 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6045 *src_reg = loop_iv_list->biv->dest_reg;
6046 *mult_val = const0_rtx;
6051 /* This is equivalent to a BIV. */
6053 *mult_val = const1_rtx;
6054 *add_val = const0_rtx;
6058 /* Either (plus (biv) (invar)) or
6059 (plus (mult (biv) (invar_1)) (invar_2)). */
6060 if (GET_CODE (XEXP (x, 0)) == MULT)
6062 *src_reg = XEXP (XEXP (x, 0), 0);
6063 *mult_val = XEXP (XEXP (x, 0), 1);
6067 *src_reg = XEXP (x, 0);
6068 *mult_val = const1_rtx;
6070 *add_val = XEXP (x, 1);
6074 /* ADD_VAL is zero. */
6075 *src_reg = XEXP (x, 0);
6076 *mult_val = XEXP (x, 1);
6077 *add_val = const0_rtx;
6084 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6085 unless they are CONST_INT). */
6086 if (GET_CODE (*add_val) == USE)
6087 *add_val = XEXP (*add_val, 0);
6088 if (GET_CODE (*mult_val) == USE)
6089 *mult_val = XEXP (*mult_val, 0);
6094 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
6096 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
6100 *pbenefit += rtx_cost (orig_x, SET);
6102 /* Always return true if this is a giv so it will be detected as such,
6103 even if the benefit is zero or negative. This allows elimination
6104 of bivs that might otherwise not be eliminated. */
6108 /* Given an expression, X, try to form it as a linear function of a biv.
6109 We will canonicalize it to be of the form
6110 (plus (mult (BIV) (invar_1))
6112 with possible degeneracies.
6114 The invariant expressions must each be of a form that can be used as a
6115 machine operand. We surround then with a USE rtx (a hack, but localized
6116 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6117 routine; it is the caller's responsibility to strip them.
6119 If no such canonicalization is possible (i.e., two biv's are used or an
6120 expression that is neither invariant nor a biv or giv), this routine
6123 For a non-zero return, the result will have a code of CONST_INT, USE,
6124 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6126 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6128 static rtx sge_plus PROTO ((enum machine_mode, rtx, rtx));
6129 static rtx sge_plus_constant PROTO ((rtx, rtx));
6132 simplify_giv_expr (x, benefit)
6136 enum machine_mode mode = GET_MODE (x);
6140 /* If this is not an integer mode, or if we cannot do arithmetic in this
6141 mode, this can't be a giv. */
6142 if (mode != VOIDmode
6143 && (GET_MODE_CLASS (mode) != MODE_INT
6144 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6147 switch (GET_CODE (x))
6150 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6151 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6152 if (arg0 == 0 || arg1 == 0)
6155 /* Put constant last, CONST_INT last if both constant. */
6156 if ((GET_CODE (arg0) == USE
6157 || GET_CODE (arg0) == CONST_INT)
6158 && ! ((GET_CODE (arg0) == USE
6159 && GET_CODE (arg1) == USE)
6160 || GET_CODE (arg1) == CONST_INT))
6161 tem = arg0, arg0 = arg1, arg1 = tem;
6163 /* Handle addition of zero, then addition of an invariant. */
6164 if (arg1 == const0_rtx)
6166 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6167 switch (GET_CODE (arg0))
6171 /* Adding two invariants must result in an invariant, so enclose
6172 addition operation inside a USE and return it. */
6173 if (GET_CODE (arg0) == USE)
6174 arg0 = XEXP (arg0, 0);
6175 if (GET_CODE (arg1) == USE)
6176 arg1 = XEXP (arg1, 0);
6178 if (GET_CODE (arg0) == CONST_INT)
6179 tem = arg0, arg0 = arg1, arg1 = tem;
6180 if (GET_CODE (arg1) == CONST_INT)
6181 tem = sge_plus_constant (arg0, arg1);
6183 tem = sge_plus (mode, arg0, arg1);
6185 if (GET_CODE (tem) != CONST_INT)
6186 tem = gen_rtx_USE (mode, tem);
6191 /* biv + invar or mult + invar. Return sum. */
6192 return gen_rtx_PLUS (mode, arg0, arg1);
6195 /* (a + invar_1) + invar_2. Associate. */
6196 return simplify_giv_expr (
6197 gen_rtx_PLUS (mode, XEXP (arg0, 0),
6198 gen_rtx_PLUS (mode, XEXP (arg0, 1), arg1)),
6205 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6206 MULT to reduce cases. */
6207 if (GET_CODE (arg0) == REG)
6208 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6209 if (GET_CODE (arg1) == REG)
6210 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6212 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6213 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6214 Recurse to associate the second PLUS. */
6215 if (GET_CODE (arg1) == MULT)
6216 tem = arg0, arg0 = arg1, arg1 = tem;
6218 if (GET_CODE (arg1) == PLUS)
6219 return simplify_giv_expr (gen_rtx_PLUS (mode,
6220 gen_rtx_PLUS (mode, arg0,
6225 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6226 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6229 if (!rtx_equal_p (arg0, arg1))
6232 return simplify_giv_expr (gen_rtx_MULT (mode,
6240 /* Handle "a - b" as "a + b * (-1)". */
6241 return simplify_giv_expr (gen_rtx_PLUS (mode,
6243 gen_rtx_MULT (mode, XEXP (x, 1),
6248 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6249 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6250 if (arg0 == 0 || arg1 == 0)
6253 /* Put constant last, CONST_INT last if both constant. */
6254 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6255 && GET_CODE (arg1) != CONST_INT)
6256 tem = arg0, arg0 = arg1, arg1 = tem;
6258 /* If second argument is not now constant, not giv. */
6259 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6262 /* Handle multiply by 0 or 1. */
6263 if (arg1 == const0_rtx)
6266 else if (arg1 == const1_rtx)
6269 switch (GET_CODE (arg0))
6272 /* biv * invar. Done. */
6273 return gen_rtx_MULT (mode, arg0, arg1);
6276 /* Product of two constants. */
6277 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6280 /* invar * invar. It is a giv, but very few of these will
6281 actually pay off, so limit to simple registers. */
6282 if (GET_CODE (arg1) != CONST_INT)
6285 arg0 = XEXP (arg0, 0);
6286 if (GET_CODE (arg0) == REG)
6287 tem = gen_rtx_MULT (mode, arg0, arg1);
6288 else if (GET_CODE (arg0) == MULT
6289 && GET_CODE (XEXP (arg0, 0)) == REG
6290 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
6292 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
6293 GEN_INT (INTVAL (XEXP (arg0, 1))
6298 return gen_rtx_USE (mode, tem);
6301 /* (a * invar_1) * invar_2. Associate. */
6302 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (arg0, 0),
6309 /* (a + invar_1) * invar_2. Distribute. */
6310 return simplify_giv_expr (gen_rtx_PLUS (mode,
6324 /* Shift by constant is multiply by power of two. */
6325 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6328 return simplify_giv_expr (gen_rtx_MULT (mode,
6330 GEN_INT ((HOST_WIDE_INT) 1
6331 << INTVAL (XEXP (x, 1)))),
6335 /* "-a" is "a * (-1)" */
6336 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6340 /* "~a" is "-a - 1". Silly, but easy. */
6341 return simplify_giv_expr (gen_rtx_MINUS (mode,
6342 gen_rtx_NEG (mode, XEXP (x, 0)),
6347 /* Already in proper form for invariant. */
6351 /* If this is a new register, we can't deal with it. */
6352 if (REGNO (x) >= max_reg_before_loop)
6355 /* Check for biv or giv. */
6356 switch (REG_IV_TYPE (REGNO (x)))
6360 case GENERAL_INDUCT:
6362 struct induction *v = REG_IV_INFO (REGNO (x));
6364 /* Form expression from giv and add benefit. Ensure this giv
6365 can derive another and subtract any needed adjustment if so. */
6366 *benefit += v->benefit;
6370 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode, v->src_reg,
6373 if (v->derive_adjustment)
6374 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6375 return simplify_giv_expr (tem, benefit);
6379 /* If it isn't an induction variable, and it is invariant, we
6380 may be able to simplify things further by looking through
6381 the bits we just moved outside the loop. */
6382 if (invariant_p (x) == 1)
6386 for (m = the_movables; m ; m = m->next)
6387 if (rtx_equal_p (x, m->set_dest))
6389 /* Ok, we found a match. Substitute and simplify. */
6391 /* If we match another movable, we must use that, as
6392 this one is going away. */
6394 return simplify_giv_expr (m->match->set_dest, benefit);
6396 /* If consec is non-zero, this is a member of a group of
6397 instructions that were moved together. We handle this
6398 case only to the point of seeking to the last insn and
6399 looking for a REG_EQUAL. Fail if we don't find one. */
6404 do { tem = NEXT_INSN (tem); } while (--i > 0);
6406 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6408 tem = XEXP (tem, 0);
6412 tem = single_set (m->insn);
6414 tem = SET_SRC (tem);
6419 /* What we are most interested in is pointer
6420 arithmetic on invariants -- only take
6421 patterns we may be able to do something with. */
6422 if (GET_CODE (tem) == PLUS
6423 || GET_CODE (tem) == MULT
6424 || GET_CODE (tem) == ASHIFT
6425 || GET_CODE (tem) == CONST_INT
6426 || GET_CODE (tem) == SYMBOL_REF)
6428 tem = simplify_giv_expr (tem, benefit);
6432 else if (GET_CODE (tem) == CONST
6433 && GET_CODE (XEXP (tem, 0)) == PLUS
6434 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6435 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6437 tem = simplify_giv_expr (XEXP (tem, 0), benefit);
6448 /* Fall through to general case. */
6450 /* If invariant, return as USE (unless CONST_INT).
6451 Otherwise, not giv. */
6452 if (GET_CODE (x) == USE)
6455 if (invariant_p (x) == 1)
6457 if (GET_CODE (x) == CONST_INT)
6459 if (GET_CODE (x) == CONST
6460 && GET_CODE (XEXP (x, 0)) == PLUS
6461 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6462 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6464 return gen_rtx_USE (mode, x);
6471 /* This routine folds invariants such that there is only ever one
6472 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6475 sge_plus_constant (x, c)
6478 if (GET_CODE (x) == CONST_INT)
6479 return GEN_INT (INTVAL (x) + INTVAL (c));
6480 else if (GET_CODE (x) != PLUS)
6481 return gen_rtx_PLUS (GET_MODE (x), x, c);
6482 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6484 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6485 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6487 else if (GET_CODE (XEXP (x, 0)) == PLUS
6488 || GET_CODE (XEXP (x, 1)) != PLUS)
6490 return gen_rtx_PLUS (GET_MODE (x),
6491 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6495 return gen_rtx_PLUS (GET_MODE (x),
6496 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6501 sge_plus (mode, x, y)
6502 enum machine_mode mode;
6505 while (GET_CODE (y) == PLUS)
6507 rtx a = XEXP (y, 0);
6508 if (GET_CODE (a) == CONST_INT)
6509 x = sge_plus_constant (x, a);
6511 x = gen_rtx_PLUS (mode, x, a);
6514 if (GET_CODE (y) == CONST_INT)
6515 x = sge_plus_constant (x, y);
6517 x = gen_rtx_PLUS (mode, x, y);
6521 /* Help detect a giv that is calculated by several consecutive insns;
6525 The caller has already identified the first insn P as having a giv as dest;
6526 we check that all other insns that set the same register follow
6527 immediately after P, that they alter nothing else,
6528 and that the result of the last is still a giv.
6530 The value is 0 if the reg set in P is not really a giv.
6531 Otherwise, the value is the amount gained by eliminating
6532 all the consecutive insns that compute the value.
6534 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6535 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6537 The coefficients of the ultimate giv value are stored in
6538 *MULT_VAL and *ADD_VAL. */
6541 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
6542 add_val, mult_val, last_consec_insn)
6549 rtx *last_consec_insn;
6557 /* Indicate that this is a giv so that we can update the value produced in
6558 each insn of the multi-insn sequence.
6560 This induction structure will be used only by the call to
6561 general_induction_var below, so we can allocate it on our stack.
6562 If this is a giv, our caller will replace the induct var entry with
6563 a new induction structure. */
6565 = (struct induction *) alloca (sizeof (struct induction));
6566 v->src_reg = src_reg;
6567 v->mult_val = *mult_val;
6568 v->add_val = *add_val;
6569 v->benefit = first_benefit;
6571 v->derive_adjustment = 0;
6573 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6574 REG_IV_INFO (REGNO (dest_reg)) = v;
6576 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6581 code = GET_CODE (p);
6583 /* If libcall, skip to end of call sequence. */
6584 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6588 && (set = single_set (p))
6589 && GET_CODE (SET_DEST (set)) == REG
6590 && SET_DEST (set) == dest_reg
6591 && (general_induction_var (SET_SRC (set), &src_reg,
6592 add_val, mult_val, 0, &benefit)
6593 /* Giv created by equivalent expression. */
6594 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6595 && general_induction_var (XEXP (temp, 0), &src_reg,
6596 add_val, mult_val, 0, &benefit)))
6597 && src_reg == v->src_reg)
6599 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6600 benefit += libcall_benefit (p);
6603 v->mult_val = *mult_val;
6604 v->add_val = *add_val;
6605 v->benefit = benefit;
6607 else if (code != NOTE)
6609 /* Allow insns that set something other than this giv to a
6610 constant. Such insns are needed on machines which cannot
6611 include long constants and should not disqualify a giv. */
6613 && (set = single_set (p))
6614 && SET_DEST (set) != dest_reg
6615 && CONSTANT_P (SET_SRC (set)))
6618 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6623 *last_consec_insn = p;
6627 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6628 represented by G1. If no such expression can be found, or it is clear that
6629 it cannot possibly be a valid address, 0 is returned.
6631 To perform the computation, we note that
6634 where `v' is the biv.
6636 So G2 = (y/b) * G1 + (b - a*y/x).
6638 Note that MULT = y/x.
6640 Update: A and B are now allowed to be additive expressions such that
6641 B contains all variables in A. That is, computing B-A will not require
6642 subtracting variables. */
6645 express_from_1 (a, b, mult)
6648 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6650 if (mult == const0_rtx)
6653 /* If MULT is not 1, we cannot handle A with non-constants, since we
6654 would then be required to subtract multiples of the registers in A.
6655 This is theoretically possible, and may even apply to some Fortran
6656 constructs, but it is a lot of work and we do not attempt it here. */
6658 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6661 /* In general these structures are sorted top to bottom (down the PLUS
6662 chain), but not left to right across the PLUS. If B is a higher
6663 order giv than A, we can strip one level and recurse. If A is higher
6664 order, we'll eventually bail out, but won't know that until the end.
6665 If they are the same, we'll strip one level around this loop. */
6667 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6669 rtx ra, rb, oa, ob, tmp;
6671 ra = XEXP (a, 0), oa = XEXP (a, 1);
6672 if (GET_CODE (ra) == PLUS)
6673 tmp = ra, ra = oa, oa = tmp;
6675 rb = XEXP (b, 0), ob = XEXP (b, 1);
6676 if (GET_CODE (rb) == PLUS)
6677 tmp = rb, rb = ob, ob = tmp;
6679 if (rtx_equal_p (ra, rb))
6680 /* We matched: remove one reg completely. */
6682 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6683 /* An alternate match. */
6685 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6686 /* An alternate match. */
6690 /* Indicates an extra register in B. Strip one level from B and
6691 recurse, hoping B was the higher order expression. */
6692 ob = express_from_1 (a, ob, mult);
6695 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6699 /* Here we are at the last level of A, go through the cases hoping to
6700 get rid of everything but a constant. */
6702 if (GET_CODE (a) == PLUS)
6706 ra = XEXP (a, 0), oa = XEXP (a, 1);
6707 if (rtx_equal_p (oa, b))
6709 else if (!rtx_equal_p (ra, b))
6712 if (GET_CODE (oa) != CONST_INT)
6715 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6717 else if (GET_CODE (a) == CONST_INT)
6719 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6721 else if (GET_CODE (b) == PLUS)
6723 if (rtx_equal_p (a, XEXP (b, 0)))
6725 else if (rtx_equal_p (a, XEXP (b, 1)))
6730 else if (rtx_equal_p (a, b))
6737 express_from (g1, g2)
6738 struct induction *g1, *g2;
6742 /* The value that G1 will be multiplied by must be a constant integer. Also,
6743 the only chance we have of getting a valid address is if b*c/a (see above
6744 for notation) is also an integer. */
6745 if (GET_CODE (g1->mult_val) == CONST_INT
6746 && GET_CODE (g2->mult_val) == CONST_INT)
6748 if (g1->mult_val == const0_rtx
6749 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6751 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6753 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6757 /* ??? Find out if the one is a multiple of the other? */
6761 add = express_from_1 (g1->add_val, g2->add_val, mult);
6762 if (add == NULL_RTX)
6765 /* Form simplified final result. */
6766 if (mult == const0_rtx)
6768 else if (mult == const1_rtx)
6769 mult = g1->dest_reg;
6771 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6773 if (add == const0_rtx)
6777 if (GET_CODE (add) == PLUS
6778 && CONSTANT_P (XEXP (add, 1)))
6780 rtx tem = XEXP (add, 1);
6781 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6785 return gen_rtx_PLUS (g2->mode, mult, add);
6790 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6791 represented by G1. This indicates that G2 should be combined with G1 and
6792 that G2 can use (either directly or via an address expression) a register
6793 used to represent G1. */
6796 combine_givs_p (g1, g2)
6797 struct induction *g1, *g2;
6799 rtx tem = express_from (g1, g2);
6801 /* If these givs are identical, they can be combined. We use the results
6802 of express_from because the addends are not in a canonical form, so
6803 rtx_equal_p is a weaker test. */
6804 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6805 combination to be the other way round. */
6806 if (tem == g1->dest_reg
6807 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6809 return g1->dest_reg;
6812 /* If G2 can be expressed as a function of G1 and that function is valid
6813 as an address and no more expensive than using a register for G2,
6814 the expression of G2 in terms of G1 can be used. */
6816 && g2->giv_type == DEST_ADDR
6817 && memory_address_p (g2->mem_mode, tem)
6818 /* ??? Looses, especially with -fforce-addr, where *g2->location
6819 will always be a register, and so anything more complicated
6823 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6825 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6836 struct combine_givs_stats
6843 cmp_combine_givs_stats (x, y)
6844 struct combine_givs_stats *x, *y;
6847 d = y->total_benefit - x->total_benefit;
6848 /* Stabilize the sort. */
6850 d = x->giv_number - y->giv_number;
6854 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6855 any other. If so, point SAME to the giv combined with and set NEW_REG to
6856 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6857 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6861 struct iv_class *bl;
6863 /* Additional benefit to add for being combined multiple times. */
6864 const int extra_benefit = 3;
6866 struct induction *g1, *g2, **giv_array;
6867 int i, j, k, giv_count;
6868 struct combine_givs_stats *stats;
6871 /* Count givs, because bl->giv_count is incorrect here. */
6873 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6878 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
6880 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6882 giv_array[i++] = g1;
6884 stats = (struct combine_givs_stats *) alloca (giv_count * sizeof (*stats));
6885 bzero ((char *) stats, giv_count * sizeof (*stats));
6887 can_combine = (rtx *) alloca (giv_count * giv_count * sizeof(rtx));
6888 bzero ((char *) can_combine, giv_count * giv_count * sizeof(rtx));
6890 for (i = 0; i < giv_count; i++)
6896 stats[i].giv_number = i;
6898 /* If a DEST_REG GIV is used only once, do not allow it to combine
6899 with anything, for in doing so we will gain nothing that cannot
6900 be had by simply letting the GIV with which we would have combined
6901 to be reduced on its own. The losage shows up in particular with
6902 DEST_ADDR targets on hosts with reg+reg addressing, though it can
6903 be seen elsewhere as well. */
6904 if (g1->giv_type == DEST_REG
6905 && (single_use = VARRAY_RTX (reg_single_usage, REGNO (g1->dest_reg)))
6906 && single_use != const0_rtx)
6909 this_benefit = g1->benefit;
6910 /* Add an additional weight for zero addends. */
6911 if (g1->no_const_addval)
6914 for (j = 0; j < giv_count; j++)
6920 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
6922 can_combine[i*giv_count + j] = this_combine;
6923 this_benefit += g2->benefit + extra_benefit;
6926 stats[i].total_benefit = this_benefit;
6929 /* Iterate, combining until we can't. */
6931 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
6933 if (loop_dump_stream)
6935 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
6936 for (k = 0; k < giv_count; k++)
6938 g1 = giv_array[stats[k].giv_number];
6939 if (!g1->combined_with && !g1->same)
6940 fprintf (loop_dump_stream, " {%d, %d}",
6941 INSN_UID (giv_array[stats[k].giv_number]->insn),
6942 stats[k].total_benefit);
6944 putc ('\n', loop_dump_stream);
6947 for (k = 0; k < giv_count; k++)
6949 int g1_add_benefit = 0;
6951 i = stats[k].giv_number;
6954 /* If it has already been combined, skip. */
6955 if (g1->combined_with || g1->same)
6958 for (j = 0; j < giv_count; j++)
6961 if (g1 != g2 && can_combine[i*giv_count + j]
6962 /* If it has already been combined, skip. */
6963 && ! g2->same && ! g2->combined_with)
6967 g2->new_reg = can_combine[i*giv_count + j];
6969 g1->combined_with++;
6970 g1->lifetime += g2->lifetime;
6972 g1_add_benefit += g2->benefit;
6974 /* ??? The new final_[bg]iv_value code does a much better job
6975 of finding replaceable giv's, and hence this code may no
6976 longer be necessary. */
6977 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
6978 g1_add_benefit -= copy_cost;
6980 /* To help optimize the next set of combinations, remove
6981 this giv from the benefits of other potential mates. */
6982 for (l = 0; l < giv_count; ++l)
6984 int m = stats[l].giv_number;
6985 if (can_combine[m*giv_count + j])
6986 stats[l].total_benefit -= g2->benefit + extra_benefit;
6989 if (loop_dump_stream)
6990 fprintf (loop_dump_stream,
6991 "giv at %d combined with giv at %d\n",
6992 INSN_UID (g2->insn), INSN_UID (g1->insn));
6996 /* To help optimize the next set of combinations, remove
6997 this giv from the benefits of other potential mates. */
6998 if (g1->combined_with)
7000 for (j = 0; j < giv_count; ++j)
7002 int m = stats[j].giv_number;
7003 if (can_combine[m*giv_count + j])
7004 stats[j].total_benefit -= g1->benefit + extra_benefit;
7007 g1->benefit += g1_add_benefit;
7009 /* We've finished with this giv, and everything it touched.
7010 Restart the combination so that proper weights for the
7011 rest of the givs are properly taken into account. */
7012 /* ??? Ideally we would compact the arrays at this point, so
7013 as to not cover old ground. But sanely compacting
7014 can_combine is tricky. */
7020 struct recombine_givs_stats
7023 int start_luid, end_luid;
7026 /* Used below as comparison function for qsort. We want a ascending luid
7027 when scanning the array starting at the end, thus the arguments are
7030 cmp_recombine_givs_stats (x, y)
7031 struct recombine_givs_stats *x, *y;
7034 d = y->start_luid - x->start_luid;
7035 /* Stabilize the sort. */
7037 d = y->giv_number - x->giv_number;
7041 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7042 look for the start of life of a giv where the start has not been seen
7043 yet to unlock the search for the end of its life.
7044 Only consider givs that belong to BIV.
7045 Return the total number of lifetime ends that have been found. */
7047 find_life_end (x, stats, insn, biv)
7049 struct recombine_givs_stats *stats;
7056 code = GET_CODE (x);
7061 rtx reg = SET_DEST (x);
7062 if (GET_CODE (reg) == REG)
7064 int regno = REGNO (reg);
7065 struct induction *v = REG_IV_INFO (regno);
7067 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7069 && v->src_reg == biv
7070 && stats[v->ix].end_luid <= 0)
7072 /* If we see a 0 here for end_luid, it means that we have
7073 scanned the entire loop without finding any use at all.
7074 We must not predicate this code on a start_luid match
7075 since that would make the test fail for givs that have
7076 been hoisted out of inner loops. */
7077 if (stats[v->ix].end_luid == 0)
7079 stats[v->ix].end_luid = stats[v->ix].start_luid;
7080 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7082 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7083 stats[v->ix].end_luid = 0;
7085 return find_life_end (SET_SRC (x), stats, insn, biv);
7091 int regno = REGNO (x);
7092 struct induction *v = REG_IV_INFO (regno);
7094 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7096 && v->src_reg == biv
7097 && stats[v->ix].end_luid == 0)
7099 while (INSN_UID (insn) >= max_uid_for_loop)
7100 insn = NEXT_INSN (insn);
7101 stats[v->ix].end_luid = INSN_LUID (insn);
7114 fmt = GET_RTX_FORMAT (code);
7116 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7119 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7121 else if (fmt[i] == 'E')
7122 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7123 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7128 /* For each giv that has been combined with another, look if
7129 we can combine it with the most recently used one instead.
7130 This tends to shorten giv lifetimes, and helps the next step:
7131 try to derive givs from other givs. */
7133 recombine_givs (bl, loop_start, loop_end, unroll_p)
7134 struct iv_class *bl;
7135 rtx loop_start, loop_end;
7138 struct induction *v, **giv_array, *last_giv;
7139 struct recombine_givs_stats *stats;
7142 int ends_need_computing;
7144 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7150 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7151 stats = (struct recombine_givs_stats *) alloca (giv_count * sizeof *stats);
7153 /* Initialize stats and set up the ix field for each giv in stats to name
7154 the corresponding index into stats. */
7155 for (i = 0, v = bl->giv; v; v = v->next_iv)
7162 stats[i].giv_number = i;
7163 /* If this giv has been hoisted out of an inner loop, use the luid of
7164 the previous insn. */
7165 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7167 stats[i].start_luid = INSN_LUID (p);
7172 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7174 /* Do the actual most-recently-used recombination. */
7175 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7177 v = giv_array[stats[i].giv_number];
7180 struct induction *old_same = v->same;
7183 /* combine_givs_p actually says if we can make this transformation.
7184 The other tests are here only to avoid keeping a giv alive
7185 that could otherwise be eliminated. */
7187 && ((old_same->maybe_dead && ! old_same->combined_with)
7188 || ! last_giv->maybe_dead
7189 || last_giv->combined_with)
7190 && (new_combine = combine_givs_p (last_giv, v)))
7192 old_same->combined_with--;
7193 v->new_reg = new_combine;
7195 last_giv->combined_with++;
7196 /* No need to update lifetimes / benefits here since we have
7197 already decided what to reduce. */
7199 if (loop_dump_stream)
7201 fprintf (loop_dump_stream,
7202 "giv at %d recombined with giv at %d as ",
7203 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7204 print_rtl (loop_dump_stream, v->new_reg);
7205 putc ('\n', loop_dump_stream);
7211 else if (v->giv_type != DEST_REG)
7214 || (last_giv->maybe_dead && ! last_giv->combined_with)
7216 || v->combined_with)
7220 ends_need_computing = 0;
7221 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7222 lifetime ends from regscan info. */
7223 for (i = 0, v = bl->giv; v; v = v->next_iv)
7227 if (v->giv_type == DEST_ADDR)
7229 /* Loop unrolling of an inner loop can even create new DEST_REG
7232 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7234 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7236 stats[i].end_luid++;
7238 else /* v->giv_type == DEST_REG */
7242 stats[i].start_luid = INSN_LUID (v->insn);
7243 stats[i].end_luid = INSN_LUID (v->last_use);
7245 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7248 /* This insn has been created by loop optimization on an inner
7249 loop. We don't have a proper start_luid that will match
7250 when we see the first set. But we do know that there will
7251 be no use before the set, so we can set end_luid to 0 so that
7252 we'll start looking for the last use right away. */
7253 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7255 stats[i].start_luid = INSN_LUID (p);
7256 stats[i].end_luid = 0;
7257 ends_need_computing++;
7261 int regno = REGNO (v->dest_reg);
7262 int count = VARRAY_INT (n_times_set, regno) - 1;
7265 /* Find the first insn that sets the giv, so that we can verify
7266 if this giv's lifetime wraps around the loop. We also need
7267 the luid of the first setting insn in order to detect the
7268 last use properly. */
7271 p = prev_nonnote_insn (p);
7272 if (reg_set_p (v->dest_reg, p))
7276 stats[i].start_luid = INSN_LUID (p);
7277 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7279 stats[i].end_luid = -1;
7280 ends_need_computing++;
7284 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7285 if (stats[i].end_luid > INSN_LUID (loop_end))
7287 stats[i].end_luid = -1;
7288 ends_need_computing++;
7296 /* If the regscan information was unconclusive for one or more DEST_REG
7297 givs, scan the all insn in the loop to find out lifetime ends. */
7298 if (ends_need_computing)
7300 rtx biv = bl->biv->src_reg;
7305 if (p == loop_start)
7308 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7310 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7312 while (ends_need_computing);
7315 /* Set start_luid back to the last insn that sets the giv. This allows
7316 more combinations. */
7317 for (i = 0, v = bl->giv; v; v = v->next_iv)
7321 if (INSN_UID (v->insn) < max_uid_for_loop)
7322 stats[i].start_luid = INSN_LUID (v->insn);
7326 /* Now adjust lifetime ends by taking combined givs into account. */
7327 for (i = 0, v = bl->giv; v; v = v->next_iv)
7334 if (v->same && ! v->same->ignore)
7337 luid = stats[i].start_luid;
7338 /* Use unsigned arithmetic to model loop wrap-around. */
7339 if (luid - stats[j].start_luid
7340 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7341 stats[j].end_luid = luid;
7346 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7348 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7349 same mult_val and non-overlapping lifetime. This reduces register
7351 Once we find a DEST_REG giv that is suitable to derive others from,
7352 we set last_giv to this giv, and try to derive as many other DEST_REG
7353 givs from it without joining overlapping lifetimes. If we then
7354 encounter a DEST_REG giv that we can't derive, we set rescan to the
7355 index for this giv (unless rescan is already set).
7356 When we are finished with the current LAST_GIV (i.e. the inner loop
7357 terminates), we start again with rescan, which then becomes the new
7359 for (i = giv_count - 1; i >= 0; i = rescan)
7361 int life_start, life_end;
7363 for (last_giv = 0, rescan = -1; i >= 0; i--)
7367 v = giv_array[stats[i].giv_number];
7368 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7372 /* Don't use a giv that's likely to be dead to derive
7373 others - that would be likely to keep that giv alive. */
7374 if (! v->maybe_dead || v->combined_with)
7377 life_start = stats[i].start_luid;
7378 life_end = stats[i].end_luid;
7382 /* Use unsigned arithmetic to model loop wrap around. */
7383 if (((unsigned) stats[i].start_luid - life_start
7384 >= (unsigned) life_end - life_start)
7385 && ((unsigned) stats[i].end_luid - life_start
7386 > (unsigned) life_end - life_start)
7387 /* Check that the giv insn we're about to use for deriving
7388 precedes all uses of that giv. Note that initializing the
7389 derived giv would defeat the purpose of reducing register
7391 ??? We could arrange to move the insn. */
7392 && ((unsigned) stats[i].end_luid - INSN_LUID (loop_start)
7393 > (unsigned) stats[i].start_luid - INSN_LUID (loop_start))
7394 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7395 /* ??? Could handle libcalls, but would need more logic. */
7396 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7397 /* We would really like to know if for any giv that v
7398 is combined with, v->insn or any intervening biv increment
7399 dominates that combined giv. However, we
7400 don't have this detailed control flow information.
7401 N.B. since last_giv will be reduced, it is valid
7402 anywhere in the loop, so we don't need to check the
7403 validity of last_giv.
7404 We rely here on the fact that v->always_executed implies that
7405 there is no jump to someplace else in the loop before the
7406 giv insn, and hence any insn that is executed before the
7407 giv insn in the loop will have a lower luid. */
7408 && (v->always_executed || ! v->combined_with)
7409 && (sum = express_from (last_giv, v))
7410 /* Make sure we don't make the add more expensive. ADD_COST
7411 doesn't take different costs of registers and constants into
7412 account, so compare the cost of the actual SET_SRCs. */
7413 && (rtx_cost (sum, SET)
7414 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7415 /* ??? unroll can't understand anything but reg + const_int
7416 sums. It would be cleaner to fix unroll. */
7417 && ((GET_CODE (sum) == PLUS
7418 && GET_CODE (XEXP (sum, 0)) == REG
7419 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7421 && validate_change (v->insn, &PATTERN (v->insn),
7422 gen_rtx_SET (VOIDmode, v->dest_reg, sum), 0))
7424 v->derived_from = last_giv;
7425 life_end = stats[i].end_luid;
7427 if (loop_dump_stream)
7429 fprintf (loop_dump_stream,
7430 "giv at %d derived from %d as ",
7431 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7432 print_rtl (loop_dump_stream, sum);
7433 putc ('\n', loop_dump_stream);
7436 else if (rescan < 0)
7442 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7445 emit_iv_add_mult (b, m, a, reg, insert_before)
7446 rtx b; /* initial value of basic induction variable */
7447 rtx m; /* multiplicative constant */
7448 rtx a; /* additive constant */
7449 rtx reg; /* destination register */
7455 /* Prevent unexpected sharing of these rtx. */
7459 /* Increase the lifetime of any invariants moved further in code. */
7460 update_reg_last_use (a, insert_before);
7461 update_reg_last_use (b, insert_before);
7462 update_reg_last_use (m, insert_before);
7465 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7467 emit_move_insn (reg, result);
7468 seq = gen_sequence ();
7471 emit_insn_before (seq, insert_before);
7473 /* It is entirely possible that the expansion created lots of new
7474 registers. Iterate over the sequence we just created and
7477 if (GET_CODE (seq) == SEQUENCE)
7480 for (i = 0; i < XVECLEN (seq, 0); ++i)
7482 rtx set = single_set (XVECEXP (seq, 0, i));
7483 if (set && GET_CODE (SET_DEST (set)) == REG)
7484 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7487 else if (GET_CODE (seq) == SET
7488 && GET_CODE (SET_DEST (seq)) == REG)
7489 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7492 /* Test whether A * B can be computed without
7493 an actual multiply insn. Value is 1 if so. */
7496 product_cheap_p (a, b)
7502 struct obstack *old_rtl_obstack = rtl_obstack;
7503 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7506 /* If only one is constant, make it B. */
7507 if (GET_CODE (a) == CONST_INT)
7508 tmp = a, a = b, b = tmp;
7510 /* If first constant, both constant, so don't need multiply. */
7511 if (GET_CODE (a) == CONST_INT)
7514 /* If second not constant, neither is constant, so would need multiply. */
7515 if (GET_CODE (b) != CONST_INT)
7518 /* One operand is constant, so might not need multiply insn. Generate the
7519 code for the multiply and see if a call or multiply, or long sequence
7520 of insns is generated. */
7522 rtl_obstack = &temp_obstack;
7524 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7525 tmp = gen_sequence ();
7528 if (GET_CODE (tmp) == SEQUENCE)
7530 if (XVEC (tmp, 0) == 0)
7532 else if (XVECLEN (tmp, 0) > 3)
7535 for (i = 0; i < XVECLEN (tmp, 0); i++)
7537 rtx insn = XVECEXP (tmp, 0, i);
7539 if (GET_CODE (insn) != INSN
7540 || (GET_CODE (PATTERN (insn)) == SET
7541 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7542 || (GET_CODE (PATTERN (insn)) == PARALLEL
7543 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7544 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7551 else if (GET_CODE (tmp) == SET
7552 && GET_CODE (SET_SRC (tmp)) == MULT)
7554 else if (GET_CODE (tmp) == PARALLEL
7555 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7556 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7559 /* Free any storage we obtained in generating this multiply and restore rtl
7560 allocation to its normal obstack. */
7561 obstack_free (&temp_obstack, storage);
7562 rtl_obstack = old_rtl_obstack;
7567 /* Check to see if loop can be terminated by a "decrement and branch until
7568 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7569 Also try reversing an increment loop to a decrement loop
7570 to see if the optimization can be performed.
7571 Value is nonzero if optimization was performed. */
7573 /* This is useful even if the architecture doesn't have such an insn,
7574 because it might change a loops which increments from 0 to n to a loop
7575 which decrements from n to 0. A loop that decrements to zero is usually
7576 faster than one that increments from zero. */
7578 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7579 such as approx_final_value, biv_total_increment, loop_iterations, and
7580 final_[bg]iv_value. */
7583 check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
7587 struct loop_info *loop_info;
7589 struct iv_class *bl;
7596 rtx before_comparison;
7600 int compare_and_branch;
7602 /* If last insn is a conditional branch, and the insn before tests a
7603 register value, try to optimize it. Otherwise, we can't do anything. */
7605 jump = PREV_INSN (loop_end);
7606 comparison = get_condition_for_loop (jump);
7607 if (comparison == 0)
7610 /* Try to compute whether the compare/branch at the loop end is one or
7611 two instructions. */
7612 get_condition (jump, &first_compare);
7613 if (first_compare == jump)
7614 compare_and_branch = 1;
7615 else if (first_compare == prev_nonnote_insn (jump))
7616 compare_and_branch = 2;
7620 /* Check all of the bivs to see if the compare uses one of them.
7621 Skip biv's set more than once because we can't guarantee that
7622 it will be zero on the last iteration. Also skip if the biv is
7623 used between its update and the test insn. */
7625 for (bl = loop_iv_list; bl; bl = bl->next)
7627 if (bl->biv_count == 1
7628 && bl->biv->dest_reg == XEXP (comparison, 0)
7629 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7637 /* Look for the case where the basic induction variable is always
7638 nonnegative, and equals zero on the last iteration.
7639 In this case, add a reg_note REG_NONNEG, which allows the
7640 m68k DBRA instruction to be used. */
7642 if (((GET_CODE (comparison) == GT
7643 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7644 && INTVAL (XEXP (comparison, 1)) == -1)
7645 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7646 && GET_CODE (bl->biv->add_val) == CONST_INT
7647 && INTVAL (bl->biv->add_val) < 0)
7649 /* Initial value must be greater than 0,
7650 init_val % -dec_value == 0 to ensure that it equals zero on
7651 the last iteration */
7653 if (GET_CODE (bl->initial_value) == CONST_INT
7654 && INTVAL (bl->initial_value) > 0
7655 && (INTVAL (bl->initial_value)
7656 % (-INTVAL (bl->biv->add_val))) == 0)
7658 /* register always nonnegative, add REG_NOTE to branch */
7659 REG_NOTES (PREV_INSN (loop_end))
7660 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7661 REG_NOTES (PREV_INSN (loop_end)));
7667 /* If the decrement is 1 and the value was tested as >= 0 before
7668 the loop, then we can safely optimize. */
7669 for (p = loop_start; p; p = PREV_INSN (p))
7671 if (GET_CODE (p) == CODE_LABEL)
7673 if (GET_CODE (p) != JUMP_INSN)
7676 before_comparison = get_condition_for_loop (p);
7677 if (before_comparison
7678 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7679 && GET_CODE (before_comparison) == LT
7680 && XEXP (before_comparison, 1) == const0_rtx
7681 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7682 && INTVAL (bl->biv->add_val) == -1)
7684 REG_NOTES (PREV_INSN (loop_end))
7685 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7686 REG_NOTES (PREV_INSN (loop_end)));
7693 else if (INTVAL (bl->biv->add_val) > 0)
7695 /* Try to change inc to dec, so can apply above optimization. */
7697 all registers modified are induction variables or invariant,
7698 all memory references have non-overlapping addresses
7699 (obviously true if only one write)
7700 allow 2 insns for the compare/jump at the end of the loop. */
7701 /* Also, we must avoid any instructions which use both the reversed
7702 biv and another biv. Such instructions will fail if the loop is
7703 reversed. We meet this condition by requiring that either
7704 no_use_except_counting is true, or else that there is only
7706 int num_nonfixed_reads = 0;
7707 /* 1 if the iteration var is used only to count iterations. */
7708 int no_use_except_counting = 0;
7709 /* 1 if the loop has no memory store, or it has a single memory store
7710 which is reversible. */
7711 int reversible_mem_store = 1;
7713 if (bl->giv_count == 0
7714 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
7716 rtx bivreg = regno_reg_rtx[bl->regno];
7718 /* If there are no givs for this biv, and the only exit is the
7719 fall through at the end of the loop, then
7720 see if perhaps there are no uses except to count. */
7721 no_use_except_counting = 1;
7722 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7723 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7725 rtx set = single_set (p);
7727 if (set && GET_CODE (SET_DEST (set)) == REG
7728 && REGNO (SET_DEST (set)) == bl->regno)
7729 /* An insn that sets the biv is okay. */
7731 else if (p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7732 || p == prev_nonnote_insn (loop_end))
7733 /* Don't bother about the end test. */
7735 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7737 no_use_except_counting = 0;
7743 if (no_use_except_counting)
7744 ; /* no need to worry about MEMs. */
7745 else if (num_mem_sets <= 1)
7747 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7748 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7749 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
7751 /* If the loop has a single store, and the destination address is
7752 invariant, then we can't reverse the loop, because this address
7753 might then have the wrong value at loop exit.
7754 This would work if the source was invariant also, however, in that
7755 case, the insn should have been moved out of the loop. */
7757 if (num_mem_sets == 1)
7759 struct induction *v;
7761 reversible_mem_store
7762 = (! unknown_address_altered
7763 && ! invariant_p (XEXP (loop_store_mems, 0)));
7765 /* If the store depends on a register that is set after the
7766 store, it depends on the initial value, and is thus not
7768 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
7770 if (v->giv_type == DEST_REG
7771 && reg_mentioned_p (v->dest_reg,
7772 XEXP (loop_store_mems, 0))
7773 && loop_insn_first_p (first_loop_store_insn, v->insn))
7774 reversible_mem_store = 0;
7781 /* This code only acts for innermost loops. Also it simplifies
7782 the memory address check by only reversing loops with
7783 zero or one memory access.
7784 Two memory accesses could involve parts of the same array,
7785 and that can't be reversed.
7786 If the biv is used only for counting, than we don't need to worry
7787 about all these things. */
7789 if ((num_nonfixed_reads <= 1
7791 && !loop_has_volatile
7792 && reversible_mem_store
7793 && (bl->giv_count + bl->biv_count + num_mem_sets
7794 + num_movables + compare_and_branch == insn_count)
7795 && (bl == loop_iv_list && bl->next == 0))
7796 || no_use_except_counting)
7800 /* Loop can be reversed. */
7801 if (loop_dump_stream)
7802 fprintf (loop_dump_stream, "Can reverse loop\n");
7804 /* Now check other conditions:
7806 The increment must be a constant, as must the initial value,
7807 and the comparison code must be LT.
7809 This test can probably be improved since +/- 1 in the constant
7810 can be obtained by changing LT to LE and vice versa; this is
7814 /* for constants, LE gets turned into LT */
7815 && (GET_CODE (comparison) == LT
7816 || (GET_CODE (comparison) == LE
7817 && no_use_except_counting)))
7819 HOST_WIDE_INT add_val, add_adjust, comparison_val;
7820 rtx initial_value, comparison_value;
7822 enum rtx_code cmp_code;
7823 int comparison_const_width;
7824 unsigned HOST_WIDE_INT comparison_sign_mask;
7826 add_val = INTVAL (bl->biv->add_val);
7827 comparison_value = XEXP (comparison, 1);
7828 if (GET_MODE (comparison_value) == VOIDmode)
7829 comparison_const_width
7830 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
7832 comparison_const_width
7833 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
7834 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
7835 comparison_const_width = HOST_BITS_PER_WIDE_INT;
7836 comparison_sign_mask
7837 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
7839 /* If the comparison value is not a loop invariant, then we
7840 can not reverse this loop.
7842 ??? If the insns which initialize the comparison value as
7843 a whole compute an invariant result, then we could move
7844 them out of the loop and proceed with loop reversal. */
7845 if (!invariant_p (comparison_value))
7848 if (GET_CODE (comparison_value) == CONST_INT)
7849 comparison_val = INTVAL (comparison_value);
7850 initial_value = bl->initial_value;
7852 /* Normalize the initial value if it is an integer and
7853 has no other use except as a counter. This will allow
7854 a few more loops to be reversed. */
7855 if (no_use_except_counting
7856 && GET_CODE (comparison_value) == CONST_INT
7857 && GET_CODE (initial_value) == CONST_INT)
7859 comparison_val = comparison_val - INTVAL (bl->initial_value);
7860 /* The code below requires comparison_val to be a multiple
7861 of add_val in order to do the loop reversal, so
7862 round up comparison_val to a multiple of add_val.
7863 Since comparison_value is constant, we know that the
7864 current comparison code is LT. */
7865 comparison_val = comparison_val + add_val - 1;
7867 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
7868 /* We postpone overflow checks for COMPARISON_VAL here;
7869 even if there is an overflow, we might still be able to
7870 reverse the loop, if converting the loop exit test to
7872 initial_value = const0_rtx;
7875 /* First check if we can do a vanilla loop reversal. */
7876 if (initial_value == const0_rtx
7877 /* If we have a decrement_and_branch_on_count, prefer
7878 the NE test, since this will allow that instruction to
7879 be generated. Note that we must use a vanilla loop
7880 reversal if the biv is used to calculate a giv or has
7881 a non-counting use. */
7882 #if ! defined (HAVE_decrement_and_branch_until_zero) && defined (HAVE_decrement_and_branch_on_count)
7883 && (! (add_val == 1 && loop_info->vtop
7884 && (bl->biv_count == 0
7885 || no_use_except_counting)))
7887 && GET_CODE (comparison_value) == CONST_INT
7888 /* Now do postponed overflow checks on COMPARISON_VAL. */
7889 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
7890 & comparison_sign_mask))
7892 /* Register will always be nonnegative, with value
7893 0 on last iteration */
7894 add_adjust = add_val;
7898 else if (add_val == 1 && loop_info->vtop
7899 && (bl->biv_count == 0
7900 || no_use_except_counting))
7908 if (GET_CODE (comparison) == LE)
7909 add_adjust -= add_val;
7911 /* If the initial value is not zero, or if the comparison
7912 value is not an exact multiple of the increment, then we
7913 can not reverse this loop. */
7914 if (initial_value == const0_rtx
7915 && GET_CODE (comparison_value) == CONST_INT)
7917 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
7922 if (! no_use_except_counting || add_val != 1)
7926 final_value = comparison_value;
7928 /* Reset these in case we normalized the initial value
7929 and comparison value above. */
7930 if (GET_CODE (comparison_value) == CONST_INT
7931 && GET_CODE (initial_value) == CONST_INT)
7933 comparison_value = GEN_INT (comparison_val);
7935 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
7937 bl->initial_value = initial_value;
7939 /* Save some info needed to produce the new insns. */
7940 reg = bl->biv->dest_reg;
7941 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
7942 if (jump_label == pc_rtx)
7943 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
7944 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
7946 /* Set start_value; if this is not a CONST_INT, we need
7948 Initialize biv to start_value before loop start.
7949 The old initializing insn will be deleted as a
7950 dead store by flow.c. */
7951 if (initial_value == const0_rtx
7952 && GET_CODE (comparison_value) == CONST_INT)
7954 start_value = GEN_INT (comparison_val - add_adjust);
7955 emit_insn_before (gen_move_insn (reg, start_value),
7958 else if (GET_CODE (initial_value) == CONST_INT)
7960 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
7961 enum machine_mode mode = GET_MODE (reg);
7962 enum insn_code icode
7963 = add_optab->handlers[(int) mode].insn_code;
7964 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
7965 || ! ((*insn_operand_predicate[icode][1])
7966 (comparison_value, mode))
7967 || ! (*insn_operand_predicate[icode][2]) (offset, mode))
7970 = gen_rtx_PLUS (mode, comparison_value, offset);
7971 emit_insn_before ((GEN_FCN (icode)
7972 (reg, comparison_value, offset)),
7974 if (GET_CODE (comparison) == LE)
7975 final_value = gen_rtx_PLUS (mode, comparison_value,
7978 else if (! add_adjust)
7980 enum machine_mode mode = GET_MODE (reg);
7981 enum insn_code icode
7982 = sub_optab->handlers[(int) mode].insn_code;
7983 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
7984 || ! ((*insn_operand_predicate[icode][1])
7985 (comparison_value, mode))
7986 || ! ((*insn_operand_predicate[icode][2])
7987 (initial_value, mode)))
7990 = gen_rtx_MINUS (mode, comparison_value, initial_value);
7991 emit_insn_before ((GEN_FCN (icode)
7992 (reg, comparison_value, initial_value)),
7996 /* We could handle the other cases too, but it'll be
7997 better to have a testcase first. */
8000 /* We may not have a single insn which can increment a reg, so
8001 create a sequence to hold all the insns from expand_inc. */
8003 expand_inc (reg, new_add_val);
8004 tem = gen_sequence ();
8007 p = emit_insn_before (tem, bl->biv->insn);
8008 delete_insn (bl->biv->insn);
8010 /* Update biv info to reflect its new status. */
8012 bl->initial_value = start_value;
8013 bl->biv->add_val = new_add_val;
8015 /* Update loop info. */
8016 loop_info->initial_value = reg;
8017 loop_info->initial_equiv_value = reg;
8018 loop_info->final_value = const0_rtx;
8019 loop_info->final_equiv_value = const0_rtx;
8020 loop_info->comparison_value = const0_rtx;
8021 loop_info->comparison_code = cmp_code;
8022 loop_info->increment = new_add_val;
8024 /* Inc LABEL_NUSES so that delete_insn will
8025 not delete the label. */
8026 LABEL_NUSES (XEXP (jump_label, 0)) ++;
8028 /* Emit an insn after the end of the loop to set the biv's
8029 proper exit value if it is used anywhere outside the loop. */
8030 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8032 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8033 emit_insn_after (gen_move_insn (reg, final_value),
8036 /* Delete compare/branch at end of loop. */
8037 delete_insn (PREV_INSN (loop_end));
8038 if (compare_and_branch == 2)
8039 delete_insn (first_compare);
8041 /* Add new compare/branch insn at end of loop. */
8043 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8044 GET_MODE (reg), 0, 0,
8045 XEXP (jump_label, 0));
8046 tem = gen_sequence ();
8048 emit_jump_insn_before (tem, loop_end);
8050 for (tem = PREV_INSN (loop_end);
8051 tem && GET_CODE (tem) != JUMP_INSN;
8052 tem = PREV_INSN (tem))
8056 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8062 /* Increment of LABEL_NUSES done above. */
8063 /* Register is now always nonnegative,
8064 so add REG_NONNEG note to the branch. */
8065 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
8071 /* Mark that this biv has been reversed. Each giv which depends
8072 on this biv, and which is also live past the end of the loop
8073 will have to be fixed up. */
8077 if (loop_dump_stream)
8078 fprintf (loop_dump_stream,
8079 "Reversed loop and added reg_nonneg\n");
8089 /* Verify whether the biv BL appears to be eliminable,
8090 based on the insns in the loop that refer to it.
8091 LOOP_START is the first insn of the loop, and END is the end insn.
8093 If ELIMINATE_P is non-zero, actually do the elimination.
8095 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8096 determine whether invariant insns should be placed inside or at the
8097 start of the loop. */
8100 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
8101 struct iv_class *bl;
8105 int threshold, insn_count;
8107 rtx reg = bl->biv->dest_reg;
8110 /* Scan all insns in the loop, stopping if we find one that uses the
8111 biv in a way that we cannot eliminate. */
8113 for (p = loop_start; p != end; p = NEXT_INSN (p))
8115 enum rtx_code code = GET_CODE (p);
8116 rtx where = threshold >= insn_count ? loop_start : p;
8118 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8119 && reg_mentioned_p (reg, PATTERN (p))
8120 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
8122 if (loop_dump_stream)
8123 fprintf (loop_dump_stream,
8124 "Cannot eliminate biv %d: biv used in insn %d.\n",
8125 bl->regno, INSN_UID (p));
8132 if (loop_dump_stream)
8133 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8134 bl->regno, eliminate_p ? "was" : "can be");
8141 /* INSN and REFERENCE are instructions in the same insn chain.
8142 Return non-zero if INSN is first. */
8145 loop_insn_first_p (insn, reference)
8146 rtx insn, reference;
8150 for (p = insn, q = reference; ;)
8152 /* Start with test for not first so that INSN == REFERENCE yields not
8154 if (q == insn || ! p)
8156 if (p == reference || ! q)
8159 if (INSN_UID (p) < max_uid_for_loop
8160 && INSN_UID (q) < max_uid_for_loop)
8161 return INSN_LUID (p) < INSN_LUID (q);
8163 if (INSN_UID (p) >= max_uid_for_loop)
8165 if (INSN_UID (q) >= max_uid_for_loop)
8170 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8171 the offset that we have to take into account due to auto-increment /
8172 div derivation is zero. */
8174 biv_elimination_giv_has_0_offset (biv, giv, insn)
8175 struct induction *biv, *giv;
8178 /* If the giv V had the auto-inc address optimization applied
8179 to it, and INSN occurs between the giv insn and the biv
8180 insn, then we'd have to adjust the value used here.
8181 This is rare, so we don't bother to make this possible. */
8182 if (giv->auto_inc_opt
8183 && ((loop_insn_first_p (giv->insn, insn)
8184 && loop_insn_first_p (insn, biv->insn))
8185 || (loop_insn_first_p (biv->insn, insn)
8186 && loop_insn_first_p (insn, giv->insn))))
8189 /* If the giv V was derived from another giv, and INSN does
8190 not occur between the giv insn and the biv insn, then we'd
8191 have to adjust the value used here. This is rare, so we don't
8192 bother to make this possible. */
8193 if (giv->derived_from
8194 && ! (giv->always_executed
8195 && loop_insn_first_p (giv->insn, insn)
8196 && loop_insn_first_p (insn, biv->insn)))
8199 && giv->same->derived_from
8200 && ! (giv->same->always_executed
8201 && loop_insn_first_p (giv->same->insn, insn)
8202 && loop_insn_first_p (insn, biv->insn)))
8208 /* If BL appears in X (part of the pattern of INSN), see if we can
8209 eliminate its use. If so, return 1. If not, return 0.
8211 If BIV does not appear in X, return 1.
8213 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8214 where extra insns should be added. Depending on how many items have been
8215 moved out of the loop, it will either be before INSN or at the start of
8219 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
8221 struct iv_class *bl;
8225 enum rtx_code code = GET_CODE (x);
8226 rtx reg = bl->biv->dest_reg;
8227 enum machine_mode mode = GET_MODE (reg);
8228 struct induction *v;
8240 /* If we haven't already been able to do something with this BIV,
8241 we can't eliminate it. */
8247 /* If this sets the BIV, it is not a problem. */
8248 if (SET_DEST (x) == reg)
8251 /* If this is an insn that defines a giv, it is also ok because
8252 it will go away when the giv is reduced. */
8253 for (v = bl->giv; v; v = v->next_iv)
8254 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8258 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8260 /* Can replace with any giv that was reduced and
8261 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8262 Require a constant for MULT_VAL, so we know it's nonzero.
8263 ??? We disable this optimization to avoid potential
8266 for (v = bl->giv; v; v = v->next_iv)
8267 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8268 && v->add_val == const0_rtx
8269 && ! v->ignore && ! v->maybe_dead && v->always_computable
8273 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8279 /* If the giv has the opposite direction of change,
8280 then reverse the comparison. */
8281 if (INTVAL (v->mult_val) < 0)
8282 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8283 const0_rtx, v->new_reg);
8287 /* We can probably test that giv's reduced reg. */
8288 if (validate_change (insn, &SET_SRC (x), new, 0))
8292 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8293 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8294 Require a constant for MULT_VAL, so we know it's nonzero.
8295 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8296 overflow problem. */
8298 for (v = bl->giv; v; v = v->next_iv)
8299 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8300 && ! v->ignore && ! v->maybe_dead && v->always_computable
8302 && (GET_CODE (v->add_val) == SYMBOL_REF
8303 || GET_CODE (v->add_val) == LABEL_REF
8304 || GET_CODE (v->add_val) == CONST
8305 || (GET_CODE (v->add_val) == REG
8306 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8308 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8314 /* If the giv has the opposite direction of change,
8315 then reverse the comparison. */
8316 if (INTVAL (v->mult_val) < 0)
8317 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8320 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8321 copy_rtx (v->add_val));
8323 /* Replace biv with the giv's reduced register. */
8324 update_reg_last_use (v->add_val, insn);
8325 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8328 /* Insn doesn't support that constant or invariant. Copy it
8329 into a register (it will be a loop invariant.) */
8330 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8332 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8335 /* Substitute the new register for its invariant value in
8336 the compare expression. */
8337 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8338 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8347 case GT: case GE: case GTU: case GEU:
8348 case LT: case LE: case LTU: case LEU:
8349 /* See if either argument is the biv. */
8350 if (XEXP (x, 0) == reg)
8351 arg = XEXP (x, 1), arg_operand = 1;
8352 else if (XEXP (x, 1) == reg)
8353 arg = XEXP (x, 0), arg_operand = 0;
8357 if (CONSTANT_P (arg))
8359 /* First try to replace with any giv that has constant positive
8360 mult_val and constant add_val. We might be able to support
8361 negative mult_val, but it seems complex to do it in general. */
8363 for (v = bl->giv; v; v = v->next_iv)
8364 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8365 && (GET_CODE (v->add_val) == SYMBOL_REF
8366 || GET_CODE (v->add_val) == LABEL_REF
8367 || GET_CODE (v->add_val) == CONST
8368 || (GET_CODE (v->add_val) == REG
8369 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8370 && ! v->ignore && ! v->maybe_dead && v->always_computable
8373 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8379 /* Replace biv with the giv's reduced reg. */
8380 XEXP (x, 1-arg_operand) = v->new_reg;
8382 /* If all constants are actually constant integers and
8383 the derived constant can be directly placed in the COMPARE,
8385 if (GET_CODE (arg) == CONST_INT
8386 && GET_CODE (v->mult_val) == CONST_INT
8387 && GET_CODE (v->add_val) == CONST_INT
8388 && validate_change (insn, &XEXP (x, arg_operand),
8389 GEN_INT (INTVAL (arg)
8390 * INTVAL (v->mult_val)
8391 + INTVAL (v->add_val)), 0))
8394 /* Otherwise, load it into a register. */
8395 tem = gen_reg_rtx (mode);
8396 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8397 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
8400 /* If that failed, put back the change we made above. */
8401 XEXP (x, 1-arg_operand) = reg;
8404 /* Look for giv with positive constant mult_val and nonconst add_val.
8405 Insert insns to calculate new compare value.
8406 ??? Turn this off due to possible overflow. */
8408 for (v = bl->giv; v; v = v->next_iv)
8409 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8410 && ! v->ignore && ! v->maybe_dead && v->always_computable
8416 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8422 tem = gen_reg_rtx (mode);
8424 /* Replace biv with giv's reduced register. */
8425 validate_change (insn, &XEXP (x, 1 - arg_operand),
8428 /* Compute value to compare against. */
8429 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8430 /* Use it in this insn. */
8431 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8432 if (apply_change_group ())
8436 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8438 if (invariant_p (arg) == 1)
8440 /* Look for giv with constant positive mult_val and nonconst
8441 add_val. Insert insns to compute new compare value.
8442 ??? Turn this off due to possible overflow. */
8444 for (v = bl->giv; v; v = v->next_iv)
8445 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8446 && ! v->ignore && ! v->maybe_dead && v->always_computable
8452 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8458 tem = gen_reg_rtx (mode);
8460 /* Replace biv with giv's reduced register. */
8461 validate_change (insn, &XEXP (x, 1 - arg_operand),
8464 /* Compute value to compare against. */
8465 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8467 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8468 if (apply_change_group ())
8473 /* This code has problems. Basically, you can't know when
8474 seeing if we will eliminate BL, whether a particular giv
8475 of ARG will be reduced. If it isn't going to be reduced,
8476 we can't eliminate BL. We can try forcing it to be reduced,
8477 but that can generate poor code.
8479 The problem is that the benefit of reducing TV, below should
8480 be increased if BL can actually be eliminated, but this means
8481 we might have to do a topological sort of the order in which
8482 we try to process biv. It doesn't seem worthwhile to do
8483 this sort of thing now. */
8486 /* Otherwise the reg compared with had better be a biv. */
8487 if (GET_CODE (arg) != REG
8488 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8491 /* Look for a pair of givs, one for each biv,
8492 with identical coefficients. */
8493 for (v = bl->giv; v; v = v->next_iv)
8495 struct induction *tv;
8497 if (v->ignore || v->maybe_dead || v->mode != mode)
8500 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8501 if (! tv->ignore && ! tv->maybe_dead
8502 && rtx_equal_p (tv->mult_val, v->mult_val)
8503 && rtx_equal_p (tv->add_val, v->add_val)
8504 && tv->mode == mode)
8506 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8512 /* Replace biv with its giv's reduced reg. */
8513 XEXP (x, 1-arg_operand) = v->new_reg;
8514 /* Replace other operand with the other giv's
8516 XEXP (x, arg_operand) = tv->new_reg;
8523 /* If we get here, the biv can't be eliminated. */
8527 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8528 biv is used in it, since it will be replaced. */
8529 for (v = bl->giv; v; v = v->next_iv)
8530 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8538 /* See if any subexpression fails elimination. */
8539 fmt = GET_RTX_FORMAT (code);
8540 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8545 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
8546 eliminate_p, where))
8551 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8552 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
8553 eliminate_p, where))
8562 /* Return nonzero if the last use of REG
8563 is in an insn following INSN in the same basic block. */
8566 last_use_this_basic_block (reg, insn)
8572 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8575 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8581 /* Called via `note_stores' to record the initial value of a biv. Here we
8582 just record the location of the set and process it later. */
8585 record_initial (dest, set)
8589 struct iv_class *bl;
8591 if (GET_CODE (dest) != REG
8592 || REGNO (dest) >= max_reg_before_loop
8593 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
8596 bl = reg_biv_class[REGNO (dest)];
8598 /* If this is the first set found, record it. */
8599 if (bl->init_insn == 0)
8601 bl->init_insn = note_insn;
8606 /* If any of the registers in X are "old" and currently have a last use earlier
8607 than INSN, update them to have a last use of INSN. Their actual last use
8608 will be the previous insn but it will not have a valid uid_luid so we can't
8612 update_reg_last_use (x, insn)
8616 /* Check for the case where INSN does not have a valid luid. In this case,
8617 there is no need to modify the regno_last_uid, as this can only happen
8618 when code is inserted after the loop_end to set a pseudo's final value,
8619 and hence this insn will never be the last use of x. */
8620 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8621 && INSN_UID (insn) < max_uid_for_loop
8622 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8623 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8627 register char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8628 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8631 update_reg_last_use (XEXP (x, i), insn);
8632 else if (fmt[i] == 'E')
8633 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8634 update_reg_last_use (XVECEXP (x, i, j), insn);
8639 /* Given a jump insn JUMP, return the condition that will cause it to branch
8640 to its JUMP_LABEL. If the condition cannot be understood, or is an
8641 inequality floating-point comparison which needs to be reversed, 0 will
8644 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8645 insn used in locating the condition was found. If a replacement test
8646 of the condition is desired, it should be placed in front of that
8647 insn and we will be sure that the inputs are still valid.
8649 The condition will be returned in a canonical form to simplify testing by
8650 callers. Specifically:
8652 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8653 (2) Both operands will be machine operands; (cc0) will have been replaced.
8654 (3) If an operand is a constant, it will be the second operand.
8655 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8656 for GE, GEU, and LEU. */
8659 get_condition (jump, earliest)
8668 int reverse_code = 0;
8669 int did_reverse_condition = 0;
8670 enum machine_mode mode;
8672 /* If this is not a standard conditional jump, we can't parse it. */
8673 if (GET_CODE (jump) != JUMP_INSN
8674 || ! condjump_p (jump) || simplejump_p (jump))
8677 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
8678 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
8679 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
8680 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
8685 /* If this branches to JUMP_LABEL when the condition is false, reverse
8687 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
8688 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
8689 code = reverse_condition (code), did_reverse_condition ^= 1;
8691 /* If we are comparing a register with zero, see if the register is set
8692 in the previous insn to a COMPARE or a comparison operation. Perform
8693 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8696 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
8698 /* Set non-zero when we find something of interest. */
8702 /* If comparison with cc0, import actual comparison from compare
8706 if ((prev = prev_nonnote_insn (prev)) == 0
8707 || GET_CODE (prev) != INSN
8708 || (set = single_set (prev)) == 0
8709 || SET_DEST (set) != cc0_rtx)
8712 op0 = SET_SRC (set);
8713 op1 = CONST0_RTX (GET_MODE (op0));
8719 /* If this is a COMPARE, pick up the two things being compared. */
8720 if (GET_CODE (op0) == COMPARE)
8722 op1 = XEXP (op0, 1);
8723 op0 = XEXP (op0, 0);
8726 else if (GET_CODE (op0) != REG)
8729 /* Go back to the previous insn. Stop if it is not an INSN. We also
8730 stop if it isn't a single set or if it has a REG_INC note because
8731 we don't want to bother dealing with it. */
8733 if ((prev = prev_nonnote_insn (prev)) == 0
8734 || GET_CODE (prev) != INSN
8735 || FIND_REG_INC_NOTE (prev, 0)
8736 || (set = single_set (prev)) == 0)
8739 /* If this is setting OP0, get what it sets it to if it looks
8741 if (rtx_equal_p (SET_DEST (set), op0))
8743 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
8745 /* ??? We may not combine comparisons done in a CCmode with
8746 comparisons not done in a CCmode. This is to aid targets
8747 like Alpha that have an IEEE compliant EQ instruction, and
8748 a non-IEEE compliant BEQ instruction. The use of CCmode is
8749 actually artificial, simply to prevent the combination, but
8750 should not affect other platforms.
8752 However, we must allow VOIDmode comparisons to match either
8753 CCmode or non-CCmode comparison, because some ports have
8754 modeless comparisons inside branch patterns.
8756 ??? This mode check should perhaps look more like the mode check
8757 in simplify_comparison in combine. */
8759 if ((GET_CODE (SET_SRC (set)) == COMPARE
8762 && GET_MODE_CLASS (inner_mode) == MODE_INT
8763 && (GET_MODE_BITSIZE (inner_mode)
8764 <= HOST_BITS_PER_WIDE_INT)
8765 && (STORE_FLAG_VALUE
8766 & ((HOST_WIDE_INT) 1
8767 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8768 #ifdef FLOAT_STORE_FLAG_VALUE
8770 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8771 && FLOAT_STORE_FLAG_VALUE < 0)
8774 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
8775 && (((GET_MODE_CLASS (mode) == MODE_CC)
8776 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8777 || mode == VOIDmode || inner_mode == VOIDmode))
8779 else if (((code == EQ
8781 && (GET_MODE_BITSIZE (inner_mode)
8782 <= HOST_BITS_PER_WIDE_INT)
8783 && GET_MODE_CLASS (inner_mode) == MODE_INT
8784 && (STORE_FLAG_VALUE
8785 & ((HOST_WIDE_INT) 1
8786 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8787 #ifdef FLOAT_STORE_FLAG_VALUE
8789 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8790 && FLOAT_STORE_FLAG_VALUE < 0)
8793 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
8794 && (((GET_MODE_CLASS (mode) == MODE_CC)
8795 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8796 || mode == VOIDmode || inner_mode == VOIDmode))
8799 /* We might have reversed a LT to get a GE here. But this wasn't
8800 actually the comparison of data, so we don't flag that we
8801 have had to reverse the condition. */
8802 did_reverse_condition ^= 1;
8810 else if (reg_set_p (op0, prev))
8811 /* If this sets OP0, but not directly, we have to give up. */
8816 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
8817 code = GET_CODE (x);
8820 code = reverse_condition (code);
8821 did_reverse_condition ^= 1;
8825 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
8831 /* If constant is first, put it last. */
8832 if (CONSTANT_P (op0))
8833 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
8835 /* If OP0 is the result of a comparison, we weren't able to find what
8836 was really being compared, so fail. */
8837 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
8840 /* Canonicalize any ordered comparison with integers involving equality
8841 if we can do computations in the relevant mode and we do not
8844 if (GET_CODE (op1) == CONST_INT
8845 && GET_MODE (op0) != VOIDmode
8846 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
8848 HOST_WIDE_INT const_val = INTVAL (op1);
8849 unsigned HOST_WIDE_INT uconst_val = const_val;
8850 unsigned HOST_WIDE_INT max_val
8851 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
8856 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
8857 code = LT, op1 = GEN_INT (const_val + 1);
8860 /* When cross-compiling, const_val might be sign-extended from
8861 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
8863 if ((HOST_WIDE_INT) (const_val & max_val)
8864 != (((HOST_WIDE_INT) 1
8865 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
8866 code = GT, op1 = GEN_INT (const_val - 1);
8870 if (uconst_val < max_val)
8871 code = LTU, op1 = GEN_INT (uconst_val + 1);
8875 if (uconst_val != 0)
8876 code = GTU, op1 = GEN_INT (uconst_val - 1);
8884 /* If this was floating-point and we reversed anything other than an
8885 EQ or NE, return zero. */
8886 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
8887 && did_reverse_condition && code != NE && code != EQ
8889 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
8893 /* Never return CC0; return zero instead. */
8898 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
8901 /* Similar to above routine, except that we also put an invariant last
8902 unless both operands are invariants. */
8905 get_condition_for_loop (x)
8908 rtx comparison = get_condition (x, NULL_PTR);
8911 || ! invariant_p (XEXP (comparison, 0))
8912 || invariant_p (XEXP (comparison, 1)))
8915 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
8916 XEXP (comparison, 1), XEXP (comparison, 0));
8919 #ifdef HAVE_decrement_and_branch_on_count
8920 /* Instrument loop for insertion of bct instruction. We distinguish between
8921 loops with compile-time bounds and those with run-time bounds.
8922 Information from loop_iterations() is used to compute compile-time bounds.
8923 Run-time bounds should use loop preconditioning, but currently ignored.
8927 insert_bct (loop_start, loop_end, loop_info)
8928 rtx loop_start, loop_end;
8929 struct loop_info *loop_info;
8932 unsigned HOST_WIDE_INT n_iterations;
8934 int increment_direction, compare_direction;
8936 /* If the loop condition is <= or >=, the number of iteration
8937 is 1 more than the range of the bounds of the loop. */
8938 int add_iteration = 0;
8940 enum machine_mode loop_var_mode = word_mode;
8942 int loop_num = uid_loop_num [INSN_UID (loop_start)];
8944 /* It's impossible to instrument a competely unrolled loop. */
8945 if (loop_info->unroll_number == -1)
8948 /* Make sure that the count register is not in use. */
8949 if (loop_used_count_register [loop_num])
8951 if (loop_dump_stream)
8952 fprintf (loop_dump_stream,
8953 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
8958 /* Make sure that the function has no indirect jumps. */
8959 if (indirect_jump_in_function)
8961 if (loop_dump_stream)
8962 fprintf (loop_dump_stream,
8963 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
8968 /* Make sure that the last loop insn is a conditional jump. */
8969 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
8970 || ! condjump_p (PREV_INSN (loop_end))
8971 || simplejump_p (PREV_INSN (loop_end)))
8973 if (loop_dump_stream)
8974 fprintf (loop_dump_stream,
8975 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
8980 /* Make sure that the loop does not contain a function call
8981 (the count register might be altered by the called function). */
8984 if (loop_dump_stream)
8985 fprintf (loop_dump_stream,
8986 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
8991 /* Make sure that the loop does not jump via a table.
8992 (the count register might be used to perform the branch on table). */
8993 if (loop_has_tablejump)
8995 if (loop_dump_stream)
8996 fprintf (loop_dump_stream,
8997 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9002 /* Account for loop unrolling in instrumented iteration count. */
9003 if (loop_info->unroll_number > 1)
9004 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
9006 n_iterations = loop_info->n_iterations;
9008 if (n_iterations != 0 && n_iterations < 3)
9010 /* Allow an enclosing outer loop to benefit if possible. */
9011 if (loop_dump_stream)
9012 fprintf (loop_dump_stream,
9013 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9018 /* Try to instrument the loop. */
9020 /* Handle the simpler case, where the bounds are known at compile time. */
9021 if (n_iterations > 0)
9023 /* Mark all enclosing loops that they cannot use count register. */
9024 for (i = loop_num; i != -1; i = loop_outer_loop[i])
9025 loop_used_count_register[i] = 1;
9026 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
9030 /* Handle the more complex case, that the bounds are NOT known
9031 at compile time. In this case we generate run_time calculation
9032 of the number of iterations. */
9034 if (loop_info->iteration_var == 0)
9036 if (loop_dump_stream)
9037 fprintf (loop_dump_stream,
9038 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9043 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
9044 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
9046 if (loop_dump_stream)
9047 fprintf (loop_dump_stream,
9048 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9053 /* With runtime bounds, if the compare is of the form '!=' we give up */
9054 if (loop_info->comparison_code == NE)
9056 if (loop_dump_stream)
9057 fprintf (loop_dump_stream,
9058 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9062 /* Use common loop preconditioning code instead. */
9066 /* We rely on the existence of run-time guard to ensure that the
9067 loop executes at least once. */
9069 rtx iterations_num_reg;
9071 unsigned HOST_WIDE_INT increment_value_abs
9072 = INTVAL (increment) * increment_direction;
9074 /* make sure that the increment is a power of two, otherwise (an
9075 expensive) divide is needed. */
9076 if (exact_log2 (increment_value_abs) == -1)
9078 if (loop_dump_stream)
9079 fprintf (loop_dump_stream,
9080 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9084 /* compute the number of iterations */
9089 /* Again, the number of iterations is calculated by:
9091 ; compare-val - initial-val + (increment -1) + additional-iteration
9092 ; num_iterations = -----------------------------------------------------------------
9095 /* ??? Do we have to call copy_rtx here before passing rtx to
9097 if (compare_direction > 0)
9099 /* <, <= :the loop variable is increasing */
9100 temp_reg = expand_binop (loop_var_mode, sub_optab,
9101 comparison_value, initial_value,
9102 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9106 temp_reg = expand_binop (loop_var_mode, sub_optab,
9107 initial_value, comparison_value,
9108 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9111 if (increment_value_abs - 1 + add_iteration != 0)
9112 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
9113 GEN_INT (increment_value_abs - 1
9115 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9117 if (increment_value_abs != 1)
9119 /* ??? This will generate an expensive divide instruction for
9120 most targets. The original authors apparently expected this
9121 to be a shift, since they test for power-of-2 divisors above,
9122 but just naively generating a divide instruction will not give
9123 a shift. It happens to work for the PowerPC target because
9124 the rs6000.md file has a divide pattern that emits shifts.
9125 It will probably not work for any other target. */
9126 iterations_num_reg = expand_binop (loop_var_mode, sdiv_optab,
9128 GEN_INT (increment_value_abs),
9129 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9132 iterations_num_reg = temp_reg;
9134 sequence = gen_sequence ();
9136 emit_insn_before (sequence, loop_start);
9137 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
9141 #endif /* Complex case */
9144 /* Instrument loop by inserting a bct in it as follows:
9145 1. A new counter register is created.
9146 2. In the head of the loop the new variable is initialized to the value
9147 passed in the loop_num_iterations parameter.
9148 3. At the end of the loop, comparison of the register with 0 is generated.
9149 The created comparison follows the pattern defined for the
9150 decrement_and_branch_on_count insn, so this insn will be generated.
9151 4. The branch on the old variable are deleted. The compare must remain
9152 because it might be used elsewhere. If the loop-variable or condition
9153 register are used elsewhere, they will be eliminated by flow. */
9156 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9157 rtx loop_start, loop_end;
9158 rtx loop_num_iterations;
9164 if (HAVE_decrement_and_branch_on_count)
9166 if (loop_dump_stream)
9168 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9169 if (GET_CODE (loop_num_iterations) == CONST_INT)
9170 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9171 INTVAL (loop_num_iterations));
9173 fputs ("runtime", loop_dump_stream);
9174 fputs (" iterations)", loop_dump_stream);
9177 /* Discard original jump to continue loop. Original compare result
9178 may still be live, so it cannot be discarded explicitly. */
9179 delete_insn (PREV_INSN (loop_end));
9181 /* Insert the label which will delimit the start of the loop. */
9182 start_label = gen_label_rtx ();
9183 emit_label_after (start_label, loop_start);
9185 /* Insert initialization of the count register into the loop header. */
9187 counter_reg = gen_reg_rtx (word_mode);
9188 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9189 sequence = gen_sequence ();
9191 emit_insn_before (sequence, loop_start);
9193 /* Insert new comparison on the count register instead of the
9194 old one, generating the needed BCT pattern (that will be
9195 later recognized by assembly generation phase). */
9196 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
9199 LABEL_NUSES (start_label)++;
9203 #endif /* HAVE_decrement_and_branch_on_count */
9205 /* Scan the function and determine whether it has indirect (computed) jumps.
9207 This is taken mostly from flow.c; similar code exists elsewhere
9208 in the compiler. It may be useful to put this into rtlanal.c. */
9210 indirect_jump_in_function_p (start)
9215 for (insn = start; insn; insn = NEXT_INSN (insn))
9216 if (computed_jump_p (insn))
9222 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9223 documentation for LOOP_MEMS for the definition of `appropriate'.
9224 This function is called from prescan_loop via for_each_rtx. */
9227 insert_loop_mem (mem, data)
9229 void *data ATTRIBUTE_UNUSED;
9237 switch (GET_CODE (m))
9243 /* We're not interested in the MEM associated with a
9244 CONST_DOUBLE, so there's no need to traverse into this. */
9248 /* This is not a MEM. */
9252 /* See if we've already seen this MEM. */
9253 for (i = 0; i < loop_mems_idx; ++i)
9254 if (rtx_equal_p (m, loop_mems[i].mem))
9256 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9257 /* The modes of the two memory accesses are different. If
9258 this happens, something tricky is going on, and we just
9259 don't optimize accesses to this MEM. */
9260 loop_mems[i].optimize = 0;
9265 /* Resize the array, if necessary. */
9266 if (loop_mems_idx == loop_mems_allocated)
9268 if (loop_mems_allocated != 0)
9269 loop_mems_allocated *= 2;
9271 loop_mems_allocated = 32;
9273 loop_mems = (loop_mem_info*)
9274 xrealloc (loop_mems,
9275 loop_mems_allocated * sizeof (loop_mem_info));
9278 /* Actually insert the MEM. */
9279 loop_mems[loop_mems_idx].mem = m;
9280 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9281 because we can't put it in a register. We still store it in the
9282 table, though, so that if we see the same address later, but in a
9283 non-BLK mode, we'll not think we can optimize it at that point. */
9284 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9285 loop_mems[loop_mems_idx].reg = NULL_RTX;
9291 /* Like load_mems, but also ensures that SET_IN_LOOP,
9292 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9293 values after load_mems. */
9296 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top, start,
9304 int nregs = max_reg_num ();
9306 load_mems (scan_start, end, loop_top, start);
9308 /* Recalculate set_in_loop and friends since load_mems may have
9309 created new registers. */
9310 if (max_reg_num () > nregs)
9316 nregs = max_reg_num ();
9318 if ((unsigned) nregs > set_in_loop->num_elements)
9320 /* Grow all the arrays. */
9321 VARRAY_GROW (set_in_loop, nregs);
9322 VARRAY_GROW (n_times_set, nregs);
9323 VARRAY_GROW (may_not_optimize, nregs);
9324 VARRAY_GROW (reg_single_usage, nregs);
9326 /* Clear the arrays */
9327 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9328 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9329 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9331 count_loop_regs_set (loop_top ? loop_top : start, end,
9332 may_not_optimize, reg_single_usage,
9335 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9337 VARRAY_CHAR (may_not_optimize, i) = 1;
9338 VARRAY_INT (set_in_loop, i) = 1;
9341 #ifdef AVOID_CCMODE_COPIES
9342 /* Don't try to move insns which set CC registers if we should not
9343 create CCmode register copies. */
9344 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9345 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9346 VARRAY_CHAR (may_not_optimize, i) = 1;
9349 /* Set n_times_set for the new registers. */
9350 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9351 (char *) (&n_times_set->data.i[0] + old_nregs),
9352 (nregs - old_nregs) * sizeof (int));
9356 /* Move MEMs into registers for the duration of the loop. SCAN_START
9357 is the first instruction in the loop (as it is executed). The
9358 other parameters are as for next_insn_in_loop. */
9361 load_mems (scan_start, end, loop_top, start)
9367 int maybe_never = 0;
9370 rtx label = NULL_RTX;
9373 if (loop_mems_idx > 0)
9375 /* Nonzero if the next instruction may never be executed. */
9376 int next_maybe_never = 0;
9378 /* Check to see if it's possible that some instructions in the
9379 loop are never executed. */
9380 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9381 p != NULL_RTX && !maybe_never;
9382 p = next_insn_in_loop (p, scan_start, end, loop_top))
9384 if (GET_CODE (p) == CODE_LABEL)
9386 else if (GET_CODE (p) == JUMP_INSN
9387 /* If we enter the loop in the middle, and scan
9388 around to the beginning, don't set maybe_never
9389 for that. This must be an unconditional jump,
9390 otherwise the code at the top of the loop might
9391 never be executed. Unconditional jumps are
9392 followed a by barrier then loop end. */
9393 && ! (GET_CODE (p) == JUMP_INSN
9394 && JUMP_LABEL (p) == loop_top
9395 && NEXT_INSN (NEXT_INSN (p)) == end
9396 && simplejump_p (p)))
9398 if (!condjump_p (p))
9399 /* Something complicated. */
9402 /* If there are any more instructions in the loop, they
9403 might not be reached. */
9404 next_maybe_never = 1;
9406 else if (next_maybe_never)
9410 /* Actually move the MEMs. */
9411 for (i = 0; i < loop_mems_idx; ++i)
9415 rtx mem = loop_mems[i].mem;
9418 if (MEM_VOLATILE_P (mem)
9419 || invariant_p (XEXP (mem, 0)) != 1)
9420 /* There's no telling whether or not MEM is modified. */
9421 loop_mems[i].optimize = 0;
9423 /* Go through the MEMs written to in the loop to see if this
9424 one is aliased by one of them. */
9425 mem_list_entry = loop_store_mems;
9426 while (mem_list_entry)
9428 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9430 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9433 /* MEM is indeed aliased by this store. */
9434 loop_mems[i].optimize = 0;
9437 mem_list_entry = XEXP (mem_list_entry, 1);
9440 /* If this MEM is written to, we must be sure that there
9441 are no reads from another MEM that aliases this one. */
9442 if (loop_mems[i].optimize && written)
9446 for (j = 0; j < loop_mems_idx; ++j)
9450 else if (true_dependence (mem,
9455 /* It's not safe to hoist loop_mems[i] out of
9456 the loop because writes to it might not be
9457 seen by reads from loop_mems[j]. */
9458 loop_mems[i].optimize = 0;
9464 if (maybe_never && may_trap_p (mem))
9465 /* We can't access the MEM outside the loop; it might
9466 cause a trap that wouldn't have happened otherwise. */
9467 loop_mems[i].optimize = 0;
9469 if (!loop_mems[i].optimize)
9470 /* We thought we were going to lift this MEM out of the
9471 loop, but later discovered that we could not. */
9474 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9475 order to keep scan_loop from moving stores to this MEM
9476 out of the loop just because this REG is neither a
9477 user-variable nor used in the loop test. */
9478 reg = gen_reg_rtx (GET_MODE (mem));
9479 REG_USERVAR_P (reg) = 1;
9480 loop_mems[i].reg = reg;
9482 /* Now, replace all references to the MEM with the
9483 corresponding pesudos. */
9484 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9486 p = next_insn_in_loop (p, scan_start, end, loop_top))
9491 for_each_rtx (&p, replace_loop_mem, &ri);
9494 if (!apply_change_group ())
9495 /* We couldn't replace all occurrences of the MEM. */
9496 loop_mems[i].optimize = 0;
9501 /* Load the memory immediately before START, which is
9502 the NOTE_LOOP_BEG. */
9503 set = gen_move_insn (reg, mem);
9504 emit_insn_before (set, start);
9508 if (label == NULL_RTX)
9510 /* We must compute the former
9511 right-after-the-end label before we insert
9513 end_label = next_label (end);
9514 label = gen_label_rtx ();
9515 emit_label_after (label, end);
9518 /* Store the memory immediately after END, which is
9519 the NOTE_LOOP_END. */
9520 set = gen_move_insn (copy_rtx (mem), reg);
9521 emit_insn_after (set, label);
9524 if (loop_dump_stream)
9526 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9527 REGNO (reg), (written ? "r/w" : "r/o"));
9528 print_rtl (loop_dump_stream, mem);
9529 fputc ('\n', loop_dump_stream);
9535 if (label != NULL_RTX)
9537 /* Now, we need to replace all references to the previous exit
9538 label with the new one. */
9543 for (p = start; p != end; p = NEXT_INSN (p))
9545 for_each_rtx (&p, replace_label, &rr);
9547 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9548 field. This is not handled by for_each_rtx because it doesn't
9549 handle unprinted ('0') fields. We need to update JUMP_LABEL
9550 because the immediately following unroll pass will use it.
9551 replace_label would not work anyways, because that only handles
9553 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9554 JUMP_LABEL (p) = label;
9559 /* Replace MEM with its associated pseudo register. This function is
9560 called from load_mems via for_each_rtx. DATA is actually an
9561 rtx_and_int * describing the instruction currently being scanned
9562 and the MEM we are currently replacing. */
9565 replace_loop_mem (mem, data)
9577 switch (GET_CODE (m))
9583 /* We're not interested in the MEM associated with a
9584 CONST_DOUBLE, so there's no need to traverse into one. */
9588 /* This is not a MEM. */
9592 ri = (rtx_and_int*) data;
9595 if (!rtx_equal_p (loop_mems[i].mem, m))
9596 /* This is not the MEM we are currently replacing. */
9601 /* Actually replace the MEM. */
9602 validate_change (insn, mem, loop_mems[i].reg, 1);
9607 /* Replace occurrences of the old exit label for the loop with the new
9608 one. DATA is an rtx_pair containing the old and new labels,
9612 replace_label (x, data)
9617 rtx old_label = ((rtx_pair*) data)->r1;
9618 rtx new_label = ((rtx_pair*) data)->r2;
9623 if (GET_CODE (l) != LABEL_REF)
9626 if (XEXP (l, 0) != old_label)
9629 XEXP (l, 0) = new_label;
9630 ++LABEL_NUSES (new_label);
9631 --LABEL_NUSES (old_label);