1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
30 #include "insn-config.h"
35 #include "cfgcleanup.h"
46 #include "insn-codes.h"
48 #include "diagnostic-core.h"
52 #include "tree-pass.h"
54 #include "shrink-wrap.h"
64 #ifndef MAX_CONDITIONAL_EXECUTE
65 #define MAX_CONDITIONAL_EXECUTE \
66 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
70 #ifndef HAVE_cbranchcc4
71 #define HAVE_cbranchcc4 0
74 #define IFCVT_MULTIPLE_DUMPS 1
76 #define NULL_BLOCK ((basic_block) NULL)
78 /* True if after combine pass. */
79 static bool ifcvt_after_combine;
81 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
82 static int num_possible_if_blocks;
84 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
86 static int num_updated_if_blocks;
88 /* # of changes made. */
89 static int num_true_changes;
91 /* Whether conditional execution changes were made. */
92 static int cond_exec_changed_p;
94 /* Forward references. */
95 static int count_bb_insns (const_basic_block);
96 static bool cheap_bb_rtx_cost_p (const_basic_block, int, int);
97 static rtx_insn *first_active_insn (basic_block);
98 static rtx_insn *last_active_insn (basic_block, int);
99 static rtx_insn *find_active_insn_before (basic_block, rtx_insn *);
100 static rtx_insn *find_active_insn_after (basic_block, rtx_insn *);
101 static basic_block block_fallthru (basic_block);
102 static int cond_exec_process_insns (ce_if_block *, rtx_insn *, rtx, rtx, int,
104 static rtx cond_exec_get_condition (rtx_insn *);
105 static rtx noce_get_condition (rtx_insn *, rtx_insn **, bool);
106 static int noce_operand_ok (const_rtx);
107 static void merge_if_block (ce_if_block *);
108 static int find_cond_trap (basic_block, edge, edge);
109 static basic_block find_if_header (basic_block, int);
110 static int block_jumps_and_fallthru_p (basic_block, basic_block);
111 static int noce_find_if_block (basic_block, edge, edge, int);
112 static int cond_exec_find_if_block (ce_if_block *);
113 static int find_if_case_1 (basic_block, edge, edge);
114 static int find_if_case_2 (basic_block, edge, edge);
115 static int dead_or_predicable (basic_block, basic_block, basic_block,
117 static void noce_emit_move_insn (rtx, rtx);
118 static rtx_insn *block_has_only_trap (basic_block);
120 /* Count the number of non-jump active insns in BB. */
123 count_bb_insns (const_basic_block bb)
126 rtx_insn *insn = BB_HEAD (bb);
130 if (active_insn_p (insn) && !JUMP_P (insn))
133 if (insn == BB_END (bb))
135 insn = NEXT_INSN (insn);
141 /* Determine whether the total insn_rtx_cost on non-jump insns in
142 basic block BB is less than MAX_COST. This function returns
143 false if the cost of any instruction could not be estimated.
145 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
146 as those insns are being speculated. MAX_COST is scaled with SCALE
147 plus a small fudge factor. */
150 cheap_bb_rtx_cost_p (const_basic_block bb, int scale, int max_cost)
153 rtx_insn *insn = BB_HEAD (bb);
154 bool speed = optimize_bb_for_speed_p (bb);
156 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
157 applied to insn_rtx_cost when optimizing for size. Only do
158 this after combine because if-conversion might interfere with
159 passes before combine.
161 Use optimize_function_for_speed_p instead of the pre-defined
162 variable speed to make sure it is set to same value for all
163 basic blocks in one if-conversion transformation. */
164 if (!optimize_function_for_speed_p (cfun) && ifcvt_after_combine)
165 scale = REG_BR_PROB_BASE;
166 /* Our branch probability/scaling factors are just estimates and don't
167 account for cases where we can get speculation for free and other
168 secondary benefits. So we fudge the scale factor to make speculating
169 appear a little more profitable when optimizing for performance. */
171 scale += REG_BR_PROB_BASE / 8;
178 if (NONJUMP_INSN_P (insn))
180 int cost = insn_rtx_cost (PATTERN (insn), speed) * REG_BR_PROB_BASE;
184 /* If this instruction is the load or set of a "stack" register,
185 such as a floating point register on x87, then the cost of
186 speculatively executing this insn may need to include
187 the additional cost of popping its result off of the
188 register stack. Unfortunately, correctly recognizing and
189 accounting for this additional overhead is tricky, so for
190 now we simply prohibit such speculative execution. */
193 rtx set = single_set (insn);
194 if (set && STACK_REG_P (SET_DEST (set)))
200 if (count >= max_cost)
203 else if (CALL_P (insn))
206 if (insn == BB_END (bb))
208 insn = NEXT_INSN (insn);
214 /* Return the first non-jump active insn in the basic block. */
217 first_active_insn (basic_block bb)
219 rtx_insn *insn = BB_HEAD (bb);
223 if (insn == BB_END (bb))
225 insn = NEXT_INSN (insn);
228 while (NOTE_P (insn) || DEBUG_INSN_P (insn))
230 if (insn == BB_END (bb))
232 insn = NEXT_INSN (insn);
241 /* Return the last non-jump active (non-jump) insn in the basic block. */
244 last_active_insn (basic_block bb, int skip_use_p)
246 rtx_insn *insn = BB_END (bb);
247 rtx_insn *head = BB_HEAD (bb);
251 || DEBUG_INSN_P (insn)
253 && NONJUMP_INSN_P (insn)
254 && GET_CODE (PATTERN (insn)) == USE))
258 insn = PREV_INSN (insn);
267 /* Return the active insn before INSN inside basic block CURR_BB. */
270 find_active_insn_before (basic_block curr_bb, rtx_insn *insn)
272 if (!insn || insn == BB_HEAD (curr_bb))
275 while ((insn = PREV_INSN (insn)) != NULL_RTX)
277 if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn))
280 /* No other active insn all the way to the start of the basic block. */
281 if (insn == BB_HEAD (curr_bb))
288 /* Return the active insn after INSN inside basic block CURR_BB. */
291 find_active_insn_after (basic_block curr_bb, rtx_insn *insn)
293 if (!insn || insn == BB_END (curr_bb))
296 while ((insn = NEXT_INSN (insn)) != NULL_RTX)
298 if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn))
301 /* No other active insn all the way to the end of the basic block. */
302 if (insn == BB_END (curr_bb))
309 /* Return the basic block reached by falling though the basic block BB. */
312 block_fallthru (basic_block bb)
314 edge e = find_fallthru_edge (bb->succs);
316 return (e) ? e->dest : NULL_BLOCK;
319 /* Return true if RTXs A and B can be safely interchanged. */
322 rtx_interchangeable_p (const_rtx a, const_rtx b)
324 if (!rtx_equal_p (a, b))
327 if (GET_CODE (a) != MEM)
330 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
331 reference is not. Interchanging a dead type-unsafe memory reference with
332 a live type-safe one creates a live type-unsafe memory reference, in other
333 words, it makes the program illegal.
334 We check here conservatively whether the two memory references have equal
335 memory attributes. */
337 return mem_attrs_eq_p (get_mem_attrs (a), get_mem_attrs (b));
341 /* Go through a bunch of insns, converting them to conditional
342 execution format if possible. Return TRUE if all of the non-note
343 insns were processed. */
346 cond_exec_process_insns (ce_if_block *ce_info ATTRIBUTE_UNUSED,
347 /* if block information */rtx_insn *start,
348 /* first insn to look at */rtx end,
349 /* last insn to look at */rtx test,
350 /* conditional execution test */int prob_val,
351 /* probability of branch taken. */int mod_ok)
353 int must_be_last = FALSE;
361 for (insn = start; ; insn = NEXT_INSN (insn))
363 /* dwarf2out can't cope with conditional prologues. */
364 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_PROLOGUE_END)
367 if (NOTE_P (insn) || DEBUG_INSN_P (insn))
370 gcc_assert (NONJUMP_INSN_P (insn) || CALL_P (insn));
372 /* dwarf2out can't cope with conditional unwind info. */
373 if (RTX_FRAME_RELATED_P (insn))
376 /* Remove USE insns that get in the way. */
377 if (reload_completed && GET_CODE (PATTERN (insn)) == USE)
379 /* ??? Ug. Actually unlinking the thing is problematic,
380 given what we'd have to coordinate with our callers. */
381 SET_INSN_DELETED (insn);
385 /* Last insn wasn't last? */
389 if (modified_in_p (test, insn))
396 /* Now build the conditional form of the instruction. */
397 pattern = PATTERN (insn);
398 xtest = copy_rtx (test);
400 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
402 if (GET_CODE (pattern) == COND_EXEC)
404 if (GET_MODE (xtest) != GET_MODE (COND_EXEC_TEST (pattern)))
407 xtest = gen_rtx_AND (GET_MODE (xtest), xtest,
408 COND_EXEC_TEST (pattern));
409 pattern = COND_EXEC_CODE (pattern);
412 pattern = gen_rtx_COND_EXEC (VOIDmode, xtest, pattern);
414 /* If the machine needs to modify the insn being conditionally executed,
415 say for example to force a constant integer operand into a temp
416 register, do so here. */
417 #ifdef IFCVT_MODIFY_INSN
418 IFCVT_MODIFY_INSN (ce_info, pattern, insn);
423 validate_change (insn, &PATTERN (insn), pattern, 1);
425 if (CALL_P (insn) && prob_val >= 0)
426 validate_change (insn, ®_NOTES (insn),
427 gen_rtx_INT_LIST ((machine_mode) REG_BR_PROB,
428 prob_val, REG_NOTES (insn)), 1);
438 /* Return the condition for a jump. Do not do any special processing. */
441 cond_exec_get_condition (rtx_insn *jump)
445 if (any_condjump_p (jump))
446 test_if = SET_SRC (pc_set (jump));
449 cond = XEXP (test_if, 0);
451 /* If this branches to JUMP_LABEL when the condition is false,
452 reverse the condition. */
453 if (GET_CODE (XEXP (test_if, 2)) == LABEL_REF
454 && LABEL_REF_LABEL (XEXP (test_if, 2)) == JUMP_LABEL (jump))
456 enum rtx_code rev = reversed_comparison_code (cond, jump);
460 cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0),
467 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
468 to conditional execution. Return TRUE if we were successful at
469 converting the block. */
472 cond_exec_process_if_block (ce_if_block * ce_info,
473 /* if block information */int do_multiple_p)
475 basic_block test_bb = ce_info->test_bb; /* last test block */
476 basic_block then_bb = ce_info->then_bb; /* THEN */
477 basic_block else_bb = ce_info->else_bb; /* ELSE or NULL */
478 rtx test_expr; /* expression in IF_THEN_ELSE that is tested */
479 rtx_insn *then_start; /* first insn in THEN block */
480 rtx_insn *then_end; /* last insn + 1 in THEN block */
481 rtx_insn *else_start = NULL; /* first insn in ELSE block or NULL */
482 rtx_insn *else_end = NULL; /* last insn + 1 in ELSE block */
483 int max; /* max # of insns to convert. */
484 int then_mod_ok; /* whether conditional mods are ok in THEN */
485 rtx true_expr; /* test for else block insns */
486 rtx false_expr; /* test for then block insns */
487 int true_prob_val; /* probability of else block */
488 int false_prob_val; /* probability of then block */
489 rtx_insn *then_last_head = NULL; /* Last match at the head of THEN */
490 rtx_insn *else_last_head = NULL; /* Last match at the head of ELSE */
491 rtx_insn *then_first_tail = NULL; /* First match at the tail of THEN */
492 rtx_insn *else_first_tail = NULL; /* First match at the tail of ELSE */
493 int then_n_insns, else_n_insns, n_insns;
494 enum rtx_code false_code;
497 /* If test is comprised of && or || elements, and we've failed at handling
498 all of them together, just use the last test if it is the special case of
499 && elements without an ELSE block. */
500 if (!do_multiple_p && ce_info->num_multiple_test_blocks)
502 if (else_bb || ! ce_info->and_and_p)
505 ce_info->test_bb = test_bb = ce_info->last_test_bb;
506 ce_info->num_multiple_test_blocks = 0;
507 ce_info->num_and_and_blocks = 0;
508 ce_info->num_or_or_blocks = 0;
511 /* Find the conditional jump to the ELSE or JOIN part, and isolate
513 test_expr = cond_exec_get_condition (BB_END (test_bb));
517 /* If the conditional jump is more than just a conditional jump,
518 then we can not do conditional execution conversion on this block. */
519 if (! onlyjump_p (BB_END (test_bb)))
522 /* Collect the bounds of where we're to search, skipping any labels, jumps
523 and notes at the beginning and end of the block. Then count the total
524 number of insns and see if it is small enough to convert. */
525 then_start = first_active_insn (then_bb);
526 then_end = last_active_insn (then_bb, TRUE);
527 then_n_insns = ce_info->num_then_insns = count_bb_insns (then_bb);
528 n_insns = then_n_insns;
529 max = MAX_CONDITIONAL_EXECUTE;
536 else_start = first_active_insn (else_bb);
537 else_end = last_active_insn (else_bb, TRUE);
538 else_n_insns = ce_info->num_else_insns = count_bb_insns (else_bb);
539 n_insns += else_n_insns;
541 /* Look for matching sequences at the head and tail of the two blocks,
542 and limit the range of insns to be converted if possible. */
543 n_matching = flow_find_cross_jump (then_bb, else_bb,
544 &then_first_tail, &else_first_tail,
546 if (then_first_tail == BB_HEAD (then_bb))
547 then_start = then_end = NULL;
548 if (else_first_tail == BB_HEAD (else_bb))
549 else_start = else_end = NULL;
554 then_end = find_active_insn_before (then_bb, then_first_tail);
556 else_end = find_active_insn_before (else_bb, else_first_tail);
557 n_insns -= 2 * n_matching;
562 && then_n_insns > n_matching
563 && else_n_insns > n_matching)
565 int longest_match = MIN (then_n_insns - n_matching,
566 else_n_insns - n_matching);
568 = flow_find_head_matching_sequence (then_bb, else_bb,
577 /* We won't pass the insns in the head sequence to
578 cond_exec_process_insns, so we need to test them here
579 to make sure that they don't clobber the condition. */
580 for (insn = BB_HEAD (then_bb);
581 insn != NEXT_INSN (then_last_head);
582 insn = NEXT_INSN (insn))
583 if (!LABEL_P (insn) && !NOTE_P (insn)
584 && !DEBUG_INSN_P (insn)
585 && modified_in_p (test_expr, insn))
589 if (then_last_head == then_end)
590 then_start = then_end = NULL;
591 if (else_last_head == else_end)
592 else_start = else_end = NULL;
597 then_start = find_active_insn_after (then_bb, then_last_head);
599 else_start = find_active_insn_after (else_bb, else_last_head);
600 n_insns -= 2 * n_matching;
608 /* Map test_expr/test_jump into the appropriate MD tests to use on
609 the conditionally executed code. */
611 true_expr = test_expr;
613 false_code = reversed_comparison_code (true_expr, BB_END (test_bb));
614 if (false_code != UNKNOWN)
615 false_expr = gen_rtx_fmt_ee (false_code, GET_MODE (true_expr),
616 XEXP (true_expr, 0), XEXP (true_expr, 1));
618 false_expr = NULL_RTX;
620 #ifdef IFCVT_MODIFY_TESTS
621 /* If the machine description needs to modify the tests, such as setting a
622 conditional execution register from a comparison, it can do so here. */
623 IFCVT_MODIFY_TESTS (ce_info, true_expr, false_expr);
625 /* See if the conversion failed. */
626 if (!true_expr || !false_expr)
630 note = find_reg_note (BB_END (test_bb), REG_BR_PROB, NULL_RTX);
633 true_prob_val = XINT (note, 0);
634 false_prob_val = REG_BR_PROB_BASE - true_prob_val;
642 /* If we have && or || tests, do them here. These tests are in the adjacent
643 blocks after the first block containing the test. */
644 if (ce_info->num_multiple_test_blocks > 0)
646 basic_block bb = test_bb;
647 basic_block last_test_bb = ce_info->last_test_bb;
654 rtx_insn *start, *end;
656 enum rtx_code f_code;
658 bb = block_fallthru (bb);
659 start = first_active_insn (bb);
660 end = last_active_insn (bb, TRUE);
662 && ! cond_exec_process_insns (ce_info, start, end, false_expr,
663 false_prob_val, FALSE))
666 /* If the conditional jump is more than just a conditional jump, then
667 we can not do conditional execution conversion on this block. */
668 if (! onlyjump_p (BB_END (bb)))
671 /* Find the conditional jump and isolate the test. */
672 t = cond_exec_get_condition (BB_END (bb));
676 f_code = reversed_comparison_code (t, BB_END (bb));
677 if (f_code == UNKNOWN)
680 f = gen_rtx_fmt_ee (f_code, GET_MODE (t), XEXP (t, 0), XEXP (t, 1));
681 if (ce_info->and_and_p)
683 t = gen_rtx_AND (GET_MODE (t), true_expr, t);
684 f = gen_rtx_IOR (GET_MODE (t), false_expr, f);
688 t = gen_rtx_IOR (GET_MODE (t), true_expr, t);
689 f = gen_rtx_AND (GET_MODE (t), false_expr, f);
692 /* If the machine description needs to modify the tests, such as
693 setting a conditional execution register from a comparison, it can
695 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
696 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info, bb, t, f);
698 /* See if the conversion failed. */
706 while (bb != last_test_bb);
709 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
710 on then THEN block. */
711 then_mod_ok = (else_bb == NULL_BLOCK);
713 /* Go through the THEN and ELSE blocks converting the insns if possible
714 to conditional execution. */
718 || ! cond_exec_process_insns (ce_info, then_start, then_end,
719 false_expr, false_prob_val,
723 if (else_bb && else_end
724 && ! cond_exec_process_insns (ce_info, else_start, else_end,
725 true_expr, true_prob_val, TRUE))
728 /* If we cannot apply the changes, fail. Do not go through the normal fail
729 processing, since apply_change_group will call cancel_changes. */
730 if (! apply_change_group ())
732 #ifdef IFCVT_MODIFY_CANCEL
733 /* Cancel any machine dependent changes. */
734 IFCVT_MODIFY_CANCEL (ce_info);
739 #ifdef IFCVT_MODIFY_FINAL
740 /* Do any machine dependent final modifications. */
741 IFCVT_MODIFY_FINAL (ce_info);
744 /* Conversion succeeded. */
746 fprintf (dump_file, "%d insn%s converted to conditional execution.\n",
747 n_insns, (n_insns == 1) ? " was" : "s were");
749 /* Merge the blocks! If we had matching sequences, make sure to delete one
750 copy at the appropriate location first: delete the copy in the THEN branch
751 for a tail sequence so that the remaining one is executed last for both
752 branches, and delete the copy in the ELSE branch for a head sequence so
753 that the remaining one is executed first for both branches. */
756 rtx_insn *from = then_first_tail;
758 from = find_active_insn_after (then_bb, from);
759 delete_insn_chain (from, BB_END (then_bb), false);
762 delete_insn_chain (first_active_insn (else_bb), else_last_head, false);
764 merge_if_block (ce_info);
765 cond_exec_changed_p = TRUE;
769 #ifdef IFCVT_MODIFY_CANCEL
770 /* Cancel any machine dependent changes. */
771 IFCVT_MODIFY_CANCEL (ce_info);
778 /* Used by noce_process_if_block to communicate with its subroutines.
780 The subroutines know that A and B may be evaluated freely. They
781 know that X is a register. They should insert new instructions
782 before cond_earliest. */
786 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
787 basic_block test_bb, then_bb, else_bb, join_bb;
789 /* The jump that ends TEST_BB. */
792 /* The jump condition. */
795 /* New insns should be inserted before this one. */
796 rtx_insn *cond_earliest;
798 /* Insns in the THEN and ELSE block. There is always just this
799 one insns in those blocks. The insns are single_set insns.
800 If there was no ELSE block, INSN_B is the last insn before
801 COND_EARLIEST, or NULL_RTX. In the former case, the insn
802 operands are still valid, as if INSN_B was moved down below
804 rtx_insn *insn_a, *insn_b;
806 /* The SET_SRC of INSN_A and INSN_B. */
809 /* The SET_DEST of INSN_A. */
812 /* True if this if block is not canonical. In the canonical form of
813 if blocks, the THEN_BB is the block reached via the fallthru edge
814 from TEST_BB. For the noce transformations, we allow the symmetric
816 bool then_else_reversed;
818 /* Estimated cost of the particular branch instruction. */
822 static rtx noce_emit_store_flag (struct noce_if_info *, rtx, int, int);
823 static int noce_try_move (struct noce_if_info *);
824 static int noce_try_store_flag (struct noce_if_info *);
825 static int noce_try_addcc (struct noce_if_info *);
826 static int noce_try_store_flag_constants (struct noce_if_info *);
827 static int noce_try_store_flag_mask (struct noce_if_info *);
828 static rtx noce_emit_cmove (struct noce_if_info *, rtx, enum rtx_code, rtx,
830 static int noce_try_cmove (struct noce_if_info *);
831 static int noce_try_cmove_arith (struct noce_if_info *);
832 static rtx noce_get_alt_condition (struct noce_if_info *, rtx, rtx_insn **);
833 static int noce_try_minmax (struct noce_if_info *);
834 static int noce_try_abs (struct noce_if_info *);
835 static int noce_try_sign_mask (struct noce_if_info *);
837 /* Helper function for noce_try_store_flag*. */
840 noce_emit_store_flag (struct noce_if_info *if_info, rtx x, int reversep,
843 rtx cond = if_info->cond;
847 cond_complex = (! general_operand (XEXP (cond, 0), VOIDmode)
848 || ! general_operand (XEXP (cond, 1), VOIDmode));
850 /* If earliest == jump, or when the condition is complex, try to
851 build the store_flag insn directly. */
855 rtx set = pc_set (if_info->jump);
856 cond = XEXP (SET_SRC (set), 0);
857 if (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
858 && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump))
859 reversep = !reversep;
860 if (if_info->then_else_reversed)
861 reversep = !reversep;
865 code = reversed_comparison_code (cond, if_info->jump);
867 code = GET_CODE (cond);
869 if ((if_info->cond_earliest == if_info->jump || cond_complex)
870 && (normalize == 0 || STORE_FLAG_VALUE == normalize))
872 rtx src = gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (cond, 0),
874 rtx set = gen_rtx_SET (x, src);
877 rtx_insn *insn = emit_insn (set);
879 if (recog_memoized (insn) >= 0)
881 rtx_insn *seq = get_insns ();
885 if_info->cond_earliest = if_info->jump;
893 /* Don't even try if the comparison operands or the mode of X are weird. */
894 if (cond_complex || !SCALAR_INT_MODE_P (GET_MODE (x)))
897 return emit_store_flag (x, code, XEXP (cond, 0),
898 XEXP (cond, 1), VOIDmode,
899 (code == LTU || code == LEU
900 || code == GEU || code == GTU), normalize);
903 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
904 X is the destination/target and Y is the value to copy. */
907 noce_emit_move_insn (rtx x, rtx y)
909 machine_mode outmode;
913 if (GET_CODE (x) != STRICT_LOW_PART)
915 rtx_insn *seq, *insn;
920 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
921 otherwise construct a suitable SET pattern ourselves. */
922 insn = (OBJECT_P (y) || CONSTANT_P (y) || GET_CODE (y) == SUBREG)
923 ? emit_move_insn (x, y)
924 : emit_insn (gen_rtx_SET (x, y));
928 if (recog_memoized (insn) <= 0)
930 if (GET_CODE (x) == ZERO_EXTRACT)
932 rtx op = XEXP (x, 0);
933 unsigned HOST_WIDE_INT size = INTVAL (XEXP (x, 1));
934 unsigned HOST_WIDE_INT start = INTVAL (XEXP (x, 2));
936 /* store_bit_field expects START to be relative to
937 BYTES_BIG_ENDIAN and adjusts this value for machines with
938 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
939 invoke store_bit_field again it is necessary to have the START
940 value from the first call. */
941 if (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
944 start = BITS_PER_UNIT - start - size;
947 gcc_assert (REG_P (op));
948 start = BITS_PER_WORD - start - size;
952 gcc_assert (start < (MEM_P (op) ? BITS_PER_UNIT : BITS_PER_WORD));
953 store_bit_field (op, size, start, 0, 0, GET_MODE (x), y);
957 switch (GET_RTX_CLASS (GET_CODE (y)))
960 ot = code_to_optab (GET_CODE (y));
964 target = expand_unop (GET_MODE (y), ot, XEXP (y, 0), x, 0);
965 if (target != NULL_RTX)
968 emit_move_insn (x, target);
977 ot = code_to_optab (GET_CODE (y));
981 target = expand_binop (GET_MODE (y), ot,
982 XEXP (y, 0), XEXP (y, 1),
984 if (target != NULL_RTX)
987 emit_move_insn (x, target);
1003 outer = XEXP (x, 0);
1004 inner = XEXP (outer, 0);
1005 outmode = GET_MODE (outer);
1006 bitpos = SUBREG_BYTE (outer) * BITS_PER_UNIT;
1007 store_bit_field (inner, GET_MODE_BITSIZE (outmode), bitpos,
1011 /* Return the CC reg if it is used in COND. */
1014 cc_in_cond (rtx cond)
1016 if (HAVE_cbranchcc4 && cond
1017 && GET_MODE_CLASS (GET_MODE (XEXP (cond, 0))) == MODE_CC)
1018 return XEXP (cond, 0);
1023 /* Return sequence of instructions generated by if conversion. This
1024 function calls end_sequence() to end the current stream, ensures
1025 that the instructions are unshared, recognizable non-jump insns.
1026 On failure, this function returns a NULL_RTX. */
1029 end_ifcvt_sequence (struct noce_if_info *if_info)
1032 rtx_insn *seq = get_insns ();
1033 rtx cc = cc_in_cond (if_info->cond);
1035 set_used_flags (if_info->x);
1036 set_used_flags (if_info->cond);
1037 set_used_flags (if_info->a);
1038 set_used_flags (if_info->b);
1039 unshare_all_rtl_in_chain (seq);
1042 /* Make sure that all of the instructions emitted are recognizable,
1043 and that we haven't introduced a new jump instruction.
1044 As an exercise for the reader, build a general mechanism that
1045 allows proper placement of required clobbers. */
1046 for (insn = seq; insn; insn = NEXT_INSN (insn))
1048 || recog_memoized (insn) == -1
1049 /* Make sure new generated code does not clobber CC. */
1050 || (cc && set_of (cc, insn)))
1056 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1057 "if (a == b) x = a; else x = b" into "x = b". */
1060 noce_try_move (struct noce_if_info *if_info)
1062 rtx cond = if_info->cond;
1063 enum rtx_code code = GET_CODE (cond);
1067 if (code != NE && code != EQ)
1070 /* This optimization isn't valid if either A or B could be a NaN
1071 or a signed zero. */
1072 if (HONOR_NANS (if_info->x)
1073 || HONOR_SIGNED_ZEROS (if_info->x))
1076 /* Check whether the operands of the comparison are A and in
1078 if ((rtx_equal_p (if_info->a, XEXP (cond, 0))
1079 && rtx_equal_p (if_info->b, XEXP (cond, 1)))
1080 || (rtx_equal_p (if_info->a, XEXP (cond, 1))
1081 && rtx_equal_p (if_info->b, XEXP (cond, 0))))
1083 if (!rtx_interchangeable_p (if_info->a, if_info->b))
1086 y = (code == EQ) ? if_info->a : if_info->b;
1088 /* Avoid generating the move if the source is the destination. */
1089 if (! rtx_equal_p (if_info->x, y))
1092 noce_emit_move_insn (if_info->x, y);
1093 seq = end_ifcvt_sequence (if_info);
1097 emit_insn_before_setloc (seq, if_info->jump,
1098 INSN_LOCATION (if_info->insn_a));
1105 /* Convert "if (test) x = 1; else x = 0".
1107 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1108 tried in noce_try_store_flag_constants after noce_try_cmove has had
1109 a go at the conversion. */
1112 noce_try_store_flag (struct noce_if_info *if_info)
1118 if (CONST_INT_P (if_info->b)
1119 && INTVAL (if_info->b) == STORE_FLAG_VALUE
1120 && if_info->a == const0_rtx)
1122 else if (if_info->b == const0_rtx
1123 && CONST_INT_P (if_info->a)
1124 && INTVAL (if_info->a) == STORE_FLAG_VALUE
1125 && (reversed_comparison_code (if_info->cond, if_info->jump)
1133 target = noce_emit_store_flag (if_info, if_info->x, reversep, 0);
1136 if (target != if_info->x)
1137 noce_emit_move_insn (if_info->x, target);
1139 seq = end_ifcvt_sequence (if_info);
1143 emit_insn_before_setloc (seq, if_info->jump,
1144 INSN_LOCATION (if_info->insn_a));
1154 /* Convert "if (test) x = a; else x = b", for A and B constant. */
1157 noce_try_store_flag_constants (struct noce_if_info *if_info)
1162 HOST_WIDE_INT itrue, ifalse, diff, tmp;
1163 int normalize, can_reverse;
1166 if (CONST_INT_P (if_info->a)
1167 && CONST_INT_P (if_info->b))
1169 mode = GET_MODE (if_info->x);
1170 ifalse = INTVAL (if_info->a);
1171 itrue = INTVAL (if_info->b);
1173 diff = (unsigned HOST_WIDE_INT) itrue - ifalse;
1174 /* Make sure we can represent the difference between the two values. */
1176 != ((ifalse < 0) != (itrue < 0) ? ifalse < 0 : ifalse < itrue))
1179 diff = trunc_int_for_mode (diff, mode);
1181 can_reverse = (reversed_comparison_code (if_info->cond, if_info->jump)
1185 if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE)
1187 else if (ifalse == 0 && exact_log2 (itrue) >= 0
1188 && (STORE_FLAG_VALUE == 1
1189 || if_info->branch_cost >= 2))
1191 else if (itrue == 0 && exact_log2 (ifalse) >= 0 && can_reverse
1192 && (STORE_FLAG_VALUE == 1 || if_info->branch_cost >= 2))
1193 normalize = 1, reversep = 1;
1194 else if (itrue == -1
1195 && (STORE_FLAG_VALUE == -1
1196 || if_info->branch_cost >= 2))
1198 else if (ifalse == -1 && can_reverse
1199 && (STORE_FLAG_VALUE == -1 || if_info->branch_cost >= 2))
1200 normalize = -1, reversep = 1;
1201 else if ((if_info->branch_cost >= 2 && STORE_FLAG_VALUE == -1)
1202 || if_info->branch_cost >= 3)
1209 std::swap (itrue, ifalse);
1210 diff = trunc_int_for_mode (-(unsigned HOST_WIDE_INT) diff, mode);
1214 target = noce_emit_store_flag (if_info, if_info->x, reversep, normalize);
1221 /* if (test) x = 3; else x = 4;
1222 => x = 3 + (test == 0); */
1223 if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE)
1225 target = expand_simple_binop (mode,
1226 (diff == STORE_FLAG_VALUE
1228 gen_int_mode (ifalse, mode), target,
1229 if_info->x, 0, OPTAB_WIDEN);
1232 /* if (test) x = 8; else x = 0;
1233 => x = (test != 0) << 3; */
1234 else if (ifalse == 0 && (tmp = exact_log2 (itrue)) >= 0)
1236 target = expand_simple_binop (mode, ASHIFT,
1237 target, GEN_INT (tmp), if_info->x, 0,
1241 /* if (test) x = -1; else x = b;
1242 => x = -(test != 0) | b; */
1243 else if (itrue == -1)
1245 target = expand_simple_binop (mode, IOR,
1246 target, gen_int_mode (ifalse, mode),
1247 if_info->x, 0, OPTAB_WIDEN);
1250 /* if (test) x = a; else x = b;
1251 => x = (-(test != 0) & (b - a)) + a; */
1254 target = expand_simple_binop (mode, AND,
1255 target, gen_int_mode (diff, mode),
1256 if_info->x, 0, OPTAB_WIDEN);
1258 target = expand_simple_binop (mode, PLUS,
1259 target, gen_int_mode (ifalse, mode),
1260 if_info->x, 0, OPTAB_WIDEN);
1269 if (target != if_info->x)
1270 noce_emit_move_insn (if_info->x, target);
1272 seq = end_ifcvt_sequence (if_info);
1276 emit_insn_before_setloc (seq, if_info->jump,
1277 INSN_LOCATION (if_info->insn_a));
1284 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1285 similarly for "foo--". */
1288 noce_try_addcc (struct noce_if_info *if_info)
1292 int subtract, normalize;
1294 if (GET_CODE (if_info->a) == PLUS
1295 && rtx_equal_p (XEXP (if_info->a, 0), if_info->b)
1296 && (reversed_comparison_code (if_info->cond, if_info->jump)
1299 rtx cond = if_info->cond;
1300 enum rtx_code code = reversed_comparison_code (cond, if_info->jump);
1302 /* First try to use addcc pattern. */
1303 if (general_operand (XEXP (cond, 0), VOIDmode)
1304 && general_operand (XEXP (cond, 1), VOIDmode))
1307 target = emit_conditional_add (if_info->x, code,
1312 XEXP (if_info->a, 1),
1313 GET_MODE (if_info->x),
1314 (code == LTU || code == GEU
1315 || code == LEU || code == GTU));
1318 if (target != if_info->x)
1319 noce_emit_move_insn (if_info->x, target);
1321 seq = end_ifcvt_sequence (if_info);
1325 emit_insn_before_setloc (seq, if_info->jump,
1326 INSN_LOCATION (if_info->insn_a));
1332 /* If that fails, construct conditional increment or decrement using
1334 if (if_info->branch_cost >= 2
1335 && (XEXP (if_info->a, 1) == const1_rtx
1336 || XEXP (if_info->a, 1) == constm1_rtx))
1339 if (STORE_FLAG_VALUE == INTVAL (XEXP (if_info->a, 1)))
1340 subtract = 0, normalize = 0;
1341 else if (-STORE_FLAG_VALUE == INTVAL (XEXP (if_info->a, 1)))
1342 subtract = 1, normalize = 0;
1344 subtract = 0, normalize = INTVAL (XEXP (if_info->a, 1));
1347 target = noce_emit_store_flag (if_info,
1348 gen_reg_rtx (GET_MODE (if_info->x)),
1352 target = expand_simple_binop (GET_MODE (if_info->x),
1353 subtract ? MINUS : PLUS,
1354 if_info->b, target, if_info->x,
1358 if (target != if_info->x)
1359 noce_emit_move_insn (if_info->x, target);
1361 seq = end_ifcvt_sequence (if_info);
1365 emit_insn_before_setloc (seq, if_info->jump,
1366 INSN_LOCATION (if_info->insn_a));
1376 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1379 noce_try_store_flag_mask (struct noce_if_info *if_info)
1386 if ((if_info->branch_cost >= 2
1387 || STORE_FLAG_VALUE == -1)
1388 && ((if_info->a == const0_rtx
1389 && rtx_equal_p (if_info->b, if_info->x))
1390 || ((reversep = (reversed_comparison_code (if_info->cond,
1393 && if_info->b == const0_rtx
1394 && rtx_equal_p (if_info->a, if_info->x))))
1397 target = noce_emit_store_flag (if_info,
1398 gen_reg_rtx (GET_MODE (if_info->x)),
1401 target = expand_simple_binop (GET_MODE (if_info->x), AND,
1403 target, if_info->x, 0,
1408 int old_cost, new_cost, insn_cost;
1411 if (target != if_info->x)
1412 noce_emit_move_insn (if_info->x, target);
1414 seq = end_ifcvt_sequence (if_info);
1418 speed_p = optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info->insn_a));
1419 insn_cost = insn_rtx_cost (PATTERN (if_info->insn_a), speed_p);
1420 old_cost = COSTS_N_INSNS (if_info->branch_cost) + insn_cost;
1421 new_cost = seq_cost (seq, speed_p);
1423 if (new_cost > old_cost)
1426 emit_insn_before_setloc (seq, if_info->jump,
1427 INSN_LOCATION (if_info->insn_a));
1437 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1440 noce_emit_cmove (struct noce_if_info *if_info, rtx x, enum rtx_code code,
1441 rtx cmp_a, rtx cmp_b, rtx vfalse, rtx vtrue)
1443 rtx target ATTRIBUTE_UNUSED;
1444 int unsignedp ATTRIBUTE_UNUSED;
1446 /* If earliest == jump, try to build the cmove insn directly.
1447 This is helpful when combine has created some complex condition
1448 (like for alpha's cmovlbs) that we can't hope to regenerate
1449 through the normal interface. */
1451 if (if_info->cond_earliest == if_info->jump)
1453 rtx cond = gen_rtx_fmt_ee (code, GET_MODE (if_info->cond), cmp_a, cmp_b);
1454 rtx if_then_else = gen_rtx_IF_THEN_ELSE (GET_MODE (x),
1455 cond, vtrue, vfalse);
1456 rtx set = gen_rtx_SET (x, if_then_else);
1459 rtx_insn *insn = emit_insn (set);
1461 if (recog_memoized (insn) >= 0)
1463 rtx_insn *seq = get_insns ();
1473 /* Don't even try if the comparison operands are weird
1474 except that the target supports cbranchcc4. */
1475 if (! general_operand (cmp_a, GET_MODE (cmp_a))
1476 || ! general_operand (cmp_b, GET_MODE (cmp_b)))
1478 if (!(HAVE_cbranchcc4)
1479 || GET_MODE_CLASS (GET_MODE (cmp_a)) != MODE_CC
1480 || cmp_b != const0_rtx)
1484 unsignedp = (code == LTU || code == GEU
1485 || code == LEU || code == GTU);
1487 target = emit_conditional_move (x, code, cmp_a, cmp_b, VOIDmode,
1488 vtrue, vfalse, GET_MODE (x),
1493 /* We might be faced with a situation like:
1496 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1497 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1499 We can't do a conditional move in mode M, but it's possible that we
1500 could do a conditional move in mode N instead and take a subreg of
1503 If we can't create new pseudos, though, don't bother. */
1504 if (reload_completed)
1507 if (GET_CODE (vtrue) == SUBREG && GET_CODE (vfalse) == SUBREG)
1509 rtx reg_vtrue = SUBREG_REG (vtrue);
1510 rtx reg_vfalse = SUBREG_REG (vfalse);
1511 unsigned int byte_vtrue = SUBREG_BYTE (vtrue);
1512 unsigned int byte_vfalse = SUBREG_BYTE (vfalse);
1513 rtx promoted_target;
1515 if (GET_MODE (reg_vtrue) != GET_MODE (reg_vfalse)
1516 || byte_vtrue != byte_vfalse
1517 || (SUBREG_PROMOTED_VAR_P (vtrue)
1518 != SUBREG_PROMOTED_VAR_P (vfalse))
1519 || (SUBREG_PROMOTED_GET (vtrue)
1520 != SUBREG_PROMOTED_GET (vfalse)))
1523 promoted_target = gen_reg_rtx (GET_MODE (reg_vtrue));
1525 target = emit_conditional_move (promoted_target, code, cmp_a, cmp_b,
1526 VOIDmode, reg_vtrue, reg_vfalse,
1527 GET_MODE (reg_vtrue), unsignedp);
1528 /* Nope, couldn't do it in that mode either. */
1532 target = gen_rtx_SUBREG (GET_MODE (vtrue), promoted_target, byte_vtrue);
1533 SUBREG_PROMOTED_VAR_P (target) = SUBREG_PROMOTED_VAR_P (vtrue);
1534 SUBREG_PROMOTED_SET (target, SUBREG_PROMOTED_GET (vtrue));
1535 emit_move_insn (x, target);
1542 /* Try only simple constants and registers here. More complex cases
1543 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1544 has had a go at it. */
1547 noce_try_cmove (struct noce_if_info *if_info)
1553 if ((CONSTANT_P (if_info->a) || register_operand (if_info->a, VOIDmode))
1554 && (CONSTANT_P (if_info->b) || register_operand (if_info->b, VOIDmode)))
1558 code = GET_CODE (if_info->cond);
1559 target = noce_emit_cmove (if_info, if_info->x, code,
1560 XEXP (if_info->cond, 0),
1561 XEXP (if_info->cond, 1),
1562 if_info->a, if_info->b);
1566 if (target != if_info->x)
1567 noce_emit_move_insn (if_info->x, target);
1569 seq = end_ifcvt_sequence (if_info);
1573 emit_insn_before_setloc (seq, if_info->jump,
1574 INSN_LOCATION (if_info->insn_a));
1587 /* Try more complex cases involving conditional_move. */
1590 noce_try_cmove_arith (struct noce_if_info *if_info)
1596 rtx_insn *insn_a, *insn_b;
1601 rtx_insn *ifcvt_seq;
1603 /* A conditional move from two memory sources is equivalent to a
1604 conditional on their addresses followed by a load. Don't do this
1605 early because it'll screw alias analysis. Note that we've
1606 already checked for no side effects. */
1607 /* ??? FIXME: Magic number 5. */
1608 if (cse_not_expected
1609 && MEM_P (a) && MEM_P (b)
1610 && MEM_ADDR_SPACE (a) == MEM_ADDR_SPACE (b)
1611 && if_info->branch_cost >= 5)
1613 machine_mode address_mode = get_address_mode (a);
1617 x = gen_reg_rtx (address_mode);
1621 /* ??? We could handle this if we knew that a load from A or B could
1622 not trap or fault. This is also true if we've already loaded
1623 from the address along the path from ENTRY. */
1624 else if (may_trap_or_fault_p (a) || may_trap_or_fault_p (b))
1627 /* if (test) x = a + b; else x = c - d;
1634 code = GET_CODE (if_info->cond);
1635 insn_a = if_info->insn_a;
1636 insn_b = if_info->insn_b;
1638 /* Total insn_rtx_cost should be smaller than branch cost. Exit
1639 if insn_rtx_cost can't be estimated. */
1643 = insn_rtx_cost (PATTERN (insn_a),
1644 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_a)));
1645 if (insn_cost == 0 || insn_cost > COSTS_N_INSNS (if_info->branch_cost))
1654 += insn_rtx_cost (PATTERN (insn_b),
1655 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_b)));
1656 if (insn_cost == 0 || insn_cost > COSTS_N_INSNS (if_info->branch_cost))
1660 /* Possibly rearrange operands to make things come out more natural. */
1661 if (reversed_comparison_code (if_info->cond, if_info->jump) != UNKNOWN)
1664 if (rtx_equal_p (b, x))
1666 else if (general_operand (b, GET_MODE (b)))
1671 code = reversed_comparison_code (if_info->cond, if_info->jump);
1673 std::swap (insn_a, insn_b);
1682 /* If either operand is complex, load it into a register first.
1683 The best way to do this is to copy the original insn. In this
1684 way we preserve any clobbers etc that the insn may have had.
1685 This is of course not possible in the IS_MEM case. */
1686 if (! general_operand (a, GET_MODE (a)))
1692 rtx reg = gen_reg_rtx (GET_MODE (a));
1693 insn = emit_insn (gen_rtx_SET (reg, a));
1696 goto end_seq_and_fail;
1699 a = gen_reg_rtx (GET_MODE (a));
1700 rtx_insn *copy_of_a = as_a <rtx_insn *> (copy_rtx (insn_a));
1701 rtx set = single_set (copy_of_a);
1703 insn = emit_insn (PATTERN (copy_of_a));
1705 if (recog_memoized (insn) < 0)
1706 goto end_seq_and_fail;
1708 if (! general_operand (b, GET_MODE (b)))
1716 rtx reg = gen_reg_rtx (GET_MODE (b));
1717 pat = gen_rtx_SET (reg, b);
1720 goto end_seq_and_fail;
1723 b = gen_reg_rtx (GET_MODE (b));
1724 rtx_insn *copy_of_insn_b = as_a <rtx_insn *> (copy_rtx (insn_b));
1725 rtx set = single_set (copy_of_insn_b);
1727 pat = PATTERN (copy_of_insn_b);
1730 /* If insn to set up A clobbers any registers B depends on, try to
1731 swap insn that sets up A with the one that sets up B. If even
1732 that doesn't help, punt. */
1733 last = get_last_insn ();
1734 if (last && modified_in_p (orig_b, last))
1736 new_insn = emit_insn_before (pat, get_insns ());
1737 if (modified_in_p (orig_a, new_insn))
1738 goto end_seq_and_fail;
1741 new_insn = emit_insn (pat);
1743 if (recog_memoized (new_insn) < 0)
1744 goto end_seq_and_fail;
1747 target = noce_emit_cmove (if_info, x, code, XEXP (if_info->cond, 0),
1748 XEXP (if_info->cond, 1), a, b);
1751 goto end_seq_and_fail;
1753 /* If we're handling a memory for above, emit the load now. */
1756 rtx mem = gen_rtx_MEM (GET_MODE (if_info->x), target);
1758 /* Copy over flags as appropriate. */
1759 if (MEM_VOLATILE_P (if_info->a) || MEM_VOLATILE_P (if_info->b))
1760 MEM_VOLATILE_P (mem) = 1;
1761 if (MEM_ALIAS_SET (if_info->a) == MEM_ALIAS_SET (if_info->b))
1762 set_mem_alias_set (mem, MEM_ALIAS_SET (if_info->a));
1764 MIN (MEM_ALIGN (if_info->a), MEM_ALIGN (if_info->b)));
1766 gcc_assert (MEM_ADDR_SPACE (if_info->a) == MEM_ADDR_SPACE (if_info->b));
1767 set_mem_addr_space (mem, MEM_ADDR_SPACE (if_info->a));
1769 noce_emit_move_insn (if_info->x, mem);
1771 else if (target != x)
1772 noce_emit_move_insn (x, target);
1774 ifcvt_seq = end_ifcvt_sequence (if_info);
1778 emit_insn_before_setloc (ifcvt_seq, if_info->jump,
1779 INSN_LOCATION (if_info->insn_a));
1787 /* For most cases, the simplified condition we found is the best
1788 choice, but this is not the case for the min/max/abs transforms.
1789 For these we wish to know that it is A or B in the condition. */
1792 noce_get_alt_condition (struct noce_if_info *if_info, rtx target,
1793 rtx_insn **earliest)
1799 /* If target is already mentioned in the known condition, return it. */
1800 if (reg_mentioned_p (target, if_info->cond))
1802 *earliest = if_info->cond_earliest;
1803 return if_info->cond;
1806 set = pc_set (if_info->jump);
1807 cond = XEXP (SET_SRC (set), 0);
1809 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
1810 && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump);
1811 if (if_info->then_else_reversed)
1814 /* If we're looking for a constant, try to make the conditional
1815 have that constant in it. There are two reasons why it may
1816 not have the constant we want:
1818 1. GCC may have needed to put the constant in a register, because
1819 the target can't compare directly against that constant. For
1820 this case, we look for a SET immediately before the comparison
1821 that puts a constant in that register.
1823 2. GCC may have canonicalized the conditional, for example
1824 replacing "if x < 4" with "if x <= 3". We can undo that (or
1825 make equivalent types of changes) to get the constants we need
1826 if they're off by one in the right direction. */
1828 if (CONST_INT_P (target))
1830 enum rtx_code code = GET_CODE (if_info->cond);
1831 rtx op_a = XEXP (if_info->cond, 0);
1832 rtx op_b = XEXP (if_info->cond, 1);
1833 rtx_insn *prev_insn;
1835 /* First, look to see if we put a constant in a register. */
1836 prev_insn = prev_nonnote_insn (if_info->cond_earliest);
1838 && BLOCK_FOR_INSN (prev_insn)
1839 == BLOCK_FOR_INSN (if_info->cond_earliest)
1840 && INSN_P (prev_insn)
1841 && GET_CODE (PATTERN (prev_insn)) == SET)
1843 rtx src = find_reg_equal_equiv_note (prev_insn);
1845 src = SET_SRC (PATTERN (prev_insn));
1846 if (CONST_INT_P (src))
1848 if (rtx_equal_p (op_a, SET_DEST (PATTERN (prev_insn))))
1850 else if (rtx_equal_p (op_b, SET_DEST (PATTERN (prev_insn))))
1853 if (CONST_INT_P (op_a))
1855 std::swap (op_a, op_b);
1856 code = swap_condition (code);
1861 /* Now, look to see if we can get the right constant by
1862 adjusting the conditional. */
1863 if (CONST_INT_P (op_b))
1865 HOST_WIDE_INT desired_val = INTVAL (target);
1866 HOST_WIDE_INT actual_val = INTVAL (op_b);
1871 if (actual_val == desired_val + 1)
1874 op_b = GEN_INT (desired_val);
1878 if (actual_val == desired_val - 1)
1881 op_b = GEN_INT (desired_val);
1885 if (actual_val == desired_val - 1)
1888 op_b = GEN_INT (desired_val);
1892 if (actual_val == desired_val + 1)
1895 op_b = GEN_INT (desired_val);
1903 /* If we made any changes, generate a new conditional that is
1904 equivalent to what we started with, but has the right
1906 if (code != GET_CODE (if_info->cond)
1907 || op_a != XEXP (if_info->cond, 0)
1908 || op_b != XEXP (if_info->cond, 1))
1910 cond = gen_rtx_fmt_ee (code, GET_MODE (cond), op_a, op_b);
1911 *earliest = if_info->cond_earliest;
1916 cond = canonicalize_condition (if_info->jump, cond, reverse,
1917 earliest, target, HAVE_cbranchcc4, true);
1918 if (! cond || ! reg_mentioned_p (target, cond))
1921 /* We almost certainly searched back to a different place.
1922 Need to re-verify correct lifetimes. */
1924 /* X may not be mentioned in the range (cond_earliest, jump]. */
1925 for (insn = if_info->jump; insn != *earliest; insn = PREV_INSN (insn))
1926 if (INSN_P (insn) && reg_overlap_mentioned_p (if_info->x, PATTERN (insn)))
1929 /* A and B may not be modified in the range [cond_earliest, jump). */
1930 for (insn = *earliest; insn != if_info->jump; insn = NEXT_INSN (insn))
1932 && (modified_in_p (if_info->a, insn)
1933 || modified_in_p (if_info->b, insn)))
1939 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
1942 noce_try_minmax (struct noce_if_info *if_info)
1945 rtx_insn *earliest, *seq;
1946 enum rtx_code code, op;
1949 /* ??? Reject modes with NaNs or signed zeros since we don't know how
1950 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
1951 to get the target to tell us... */
1952 if (HONOR_SIGNED_ZEROS (if_info->x)
1953 || HONOR_NANS (if_info->x))
1956 cond = noce_get_alt_condition (if_info, if_info->a, &earliest);
1960 /* Verify the condition is of the form we expect, and canonicalize
1961 the comparison code. */
1962 code = GET_CODE (cond);
1963 if (rtx_equal_p (XEXP (cond, 0), if_info->a))
1965 if (! rtx_equal_p (XEXP (cond, 1), if_info->b))
1968 else if (rtx_equal_p (XEXP (cond, 1), if_info->a))
1970 if (! rtx_equal_p (XEXP (cond, 0), if_info->b))
1972 code = swap_condition (code);
1977 /* Determine what sort of operation this is. Note that the code is for
1978 a taken branch, so the code->operation mapping appears backwards. */
2011 target = expand_simple_binop (GET_MODE (if_info->x), op,
2012 if_info->a, if_info->b,
2013 if_info->x, unsignedp, OPTAB_WIDEN);
2019 if (target != if_info->x)
2020 noce_emit_move_insn (if_info->x, target);
2022 seq = end_ifcvt_sequence (if_info);
2026 emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
2027 if_info->cond = cond;
2028 if_info->cond_earliest = earliest;
2033 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2034 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2038 noce_try_abs (struct noce_if_info *if_info)
2040 rtx cond, target, a, b, c;
2041 rtx_insn *earliest, *seq;
2043 bool one_cmpl = false;
2045 /* Reject modes with signed zeros. */
2046 if (HONOR_SIGNED_ZEROS (if_info->x))
2049 /* Recognize A and B as constituting an ABS or NABS. The canonical
2050 form is a branch around the negation, taken when the object is the
2051 first operand of a comparison against 0 that evaluates to true. */
2054 if (GET_CODE (a) == NEG && rtx_equal_p (XEXP (a, 0), b))
2056 else if (GET_CODE (b) == NEG && rtx_equal_p (XEXP (b, 0), a))
2061 else if (GET_CODE (a) == NOT && rtx_equal_p (XEXP (a, 0), b))
2066 else if (GET_CODE (b) == NOT && rtx_equal_p (XEXP (b, 0), a))
2075 cond = noce_get_alt_condition (if_info, b, &earliest);
2079 /* Verify the condition is of the form we expect. */
2080 if (rtx_equal_p (XEXP (cond, 0), b))
2082 else if (rtx_equal_p (XEXP (cond, 1), b))
2090 /* Verify that C is zero. Search one step backward for a
2091 REG_EQUAL note or a simple source if necessary. */
2095 rtx_insn *insn = prev_nonnote_insn (earliest);
2097 && BLOCK_FOR_INSN (insn) == BLOCK_FOR_INSN (earliest)
2098 && (set = single_set (insn))
2099 && rtx_equal_p (SET_DEST (set), c))
2101 rtx note = find_reg_equal_equiv_note (insn);
2111 && GET_CODE (XEXP (c, 0)) == SYMBOL_REF
2112 && CONSTANT_POOL_ADDRESS_P (XEXP (c, 0)))
2113 c = get_pool_constant (XEXP (c, 0));
2115 /* Work around funny ideas get_condition has wrt canonicalization.
2116 Note that these rtx constants are known to be CONST_INT, and
2117 therefore imply integer comparisons. */
2118 if (c == constm1_rtx && GET_CODE (cond) == GT)
2120 else if (c == const1_rtx && GET_CODE (cond) == LT)
2122 else if (c != CONST0_RTX (GET_MODE (b)))
2125 /* Determine what sort of operation this is. */
2126 switch (GET_CODE (cond))
2145 target = expand_one_cmpl_abs_nojump (GET_MODE (if_info->x), b,
2148 target = expand_abs_nojump (GET_MODE (if_info->x), b, if_info->x, 1);
2150 /* ??? It's a quandary whether cmove would be better here, especially
2151 for integers. Perhaps combine will clean things up. */
2152 if (target && negate)
2155 target = expand_simple_unop (GET_MODE (target), NOT, target,
2158 target = expand_simple_unop (GET_MODE (target), NEG, target,
2168 if (target != if_info->x)
2169 noce_emit_move_insn (if_info->x, target);
2171 seq = end_ifcvt_sequence (if_info);
2175 emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
2176 if_info->cond = cond;
2177 if_info->cond_earliest = earliest;
2182 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2185 noce_try_sign_mask (struct noce_if_info *if_info)
2191 bool t_unconditional;
2193 cond = if_info->cond;
2194 code = GET_CODE (cond);
2199 if (if_info->a == const0_rtx)
2201 if ((code == LT && c == const0_rtx)
2202 || (code == LE && c == constm1_rtx))
2205 else if (if_info->b == const0_rtx)
2207 if ((code == GE && c == const0_rtx)
2208 || (code == GT && c == constm1_rtx))
2212 if (! t || side_effects_p (t))
2215 /* We currently don't handle different modes. */
2216 mode = GET_MODE (t);
2217 if (GET_MODE (m) != mode)
2220 /* This is only profitable if T is unconditionally executed/evaluated in the
2221 original insn sequence or T is cheap. The former happens if B is the
2222 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2223 INSN_B which can happen for e.g. conditional stores to memory. For the
2224 cost computation use the block TEST_BB where the evaluation will end up
2225 after the transformation. */
2228 && (if_info->insn_b == NULL_RTX
2229 || BLOCK_FOR_INSN (if_info->insn_b) == if_info->test_bb));
2230 if (!(t_unconditional
2231 || (set_src_cost (t, optimize_bb_for_speed_p (if_info->test_bb))
2232 < COSTS_N_INSNS (2))))
2236 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2237 "(signed) m >> 31" directly. This benefits targets with specialized
2238 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2239 m = emit_store_flag (gen_reg_rtx (mode), LT, m, const0_rtx, mode, 0, -1);
2240 t = m ? expand_binop (mode, and_optab, m, t, NULL_RTX, 0, OPTAB_DIRECT)
2249 noce_emit_move_insn (if_info->x, t);
2251 seq = end_ifcvt_sequence (if_info);
2255 emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
2260 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2264 noce_try_bitop (struct noce_if_info *if_info)
2266 rtx cond, x, a, result;
2273 cond = if_info->cond;
2274 code = GET_CODE (cond);
2276 /* Check for no else condition. */
2277 if (! rtx_equal_p (x, if_info->b))
2280 /* Check for a suitable condition. */
2281 if (code != NE && code != EQ)
2283 if (XEXP (cond, 1) != const0_rtx)
2285 cond = XEXP (cond, 0);
2287 /* ??? We could also handle AND here. */
2288 if (GET_CODE (cond) == ZERO_EXTRACT)
2290 if (XEXP (cond, 1) != const1_rtx
2291 || !CONST_INT_P (XEXP (cond, 2))
2292 || ! rtx_equal_p (x, XEXP (cond, 0)))
2294 bitnum = INTVAL (XEXP (cond, 2));
2295 mode = GET_MODE (x);
2296 if (BITS_BIG_ENDIAN)
2297 bitnum = GET_MODE_BITSIZE (mode) - 1 - bitnum;
2298 if (bitnum < 0 || bitnum >= HOST_BITS_PER_WIDE_INT)
2305 if (GET_CODE (a) == IOR || GET_CODE (a) == XOR)
2307 /* Check for "if (X & C) x = x op C". */
2308 if (! rtx_equal_p (x, XEXP (a, 0))
2309 || !CONST_INT_P (XEXP (a, 1))
2310 || (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode))
2311 != (unsigned HOST_WIDE_INT) 1 << bitnum)
2314 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2315 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2316 if (GET_CODE (a) == IOR)
2317 result = (code == NE) ? a : NULL_RTX;
2318 else if (code == NE)
2320 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2321 result = gen_int_mode ((HOST_WIDE_INT) 1 << bitnum, mode);
2322 result = simplify_gen_binary (IOR, mode, x, result);
2326 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2327 result = gen_int_mode (~((HOST_WIDE_INT) 1 << bitnum), mode);
2328 result = simplify_gen_binary (AND, mode, x, result);
2331 else if (GET_CODE (a) == AND)
2333 /* Check for "if (X & C) x &= ~C". */
2334 if (! rtx_equal_p (x, XEXP (a, 0))
2335 || !CONST_INT_P (XEXP (a, 1))
2336 || (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode))
2337 != (~((HOST_WIDE_INT) 1 << bitnum) & GET_MODE_MASK (mode)))
2340 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2341 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2342 result = (code == EQ) ? a : NULL_RTX;
2350 noce_emit_move_insn (x, result);
2351 seq = end_ifcvt_sequence (if_info);
2355 emit_insn_before_setloc (seq, if_info->jump,
2356 INSN_LOCATION (if_info->insn_a));
2362 /* Similar to get_condition, only the resulting condition must be
2363 valid at JUMP, instead of at EARLIEST.
2365 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2366 THEN block of the caller, and we have to reverse the condition. */
2369 noce_get_condition (rtx_insn *jump, rtx_insn **earliest, bool then_else_reversed)
2374 if (! any_condjump_p (jump))
2377 set = pc_set (jump);
2379 /* If this branches to JUMP_LABEL when the condition is false,
2380 reverse the condition. */
2381 reverse = (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
2382 && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (jump));
2384 /* We may have to reverse because the caller's if block is not canonical,
2385 i.e. the THEN block isn't the fallthrough block for the TEST block
2386 (see find_if_header). */
2387 if (then_else_reversed)
2390 /* If the condition variable is a register and is MODE_INT, accept it. */
2392 cond = XEXP (SET_SRC (set), 0);
2393 tmp = XEXP (cond, 0);
2394 if (REG_P (tmp) && GET_MODE_CLASS (GET_MODE (tmp)) == MODE_INT
2395 && (GET_MODE (tmp) != BImode
2396 || !targetm.small_register_classes_for_mode_p (BImode)))
2401 cond = gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond)),
2402 GET_MODE (cond), tmp, XEXP (cond, 1));
2406 /* Otherwise, fall back on canonicalize_condition to do the dirty
2407 work of manipulating MODE_CC values and COMPARE rtx codes. */
2408 tmp = canonicalize_condition (jump, cond, reverse, earliest,
2409 NULL_RTX, HAVE_cbranchcc4, true);
2411 /* We don't handle side-effects in the condition, like handling
2412 REG_INC notes and making sure no duplicate conditions are emitted. */
2413 if (tmp != NULL_RTX && side_effects_p (tmp))
2419 /* Return true if OP is ok for if-then-else processing. */
2422 noce_operand_ok (const_rtx op)
2424 if (side_effects_p (op))
2427 /* We special-case memories, so handle any of them with
2428 no address side effects. */
2430 return ! side_effects_p (XEXP (op, 0));
2432 return ! may_trap_p (op);
2435 /* Return true if a write into MEM may trap or fault. */
2438 noce_mem_write_may_trap_or_fault_p (const_rtx mem)
2442 if (MEM_READONLY_P (mem))
2445 if (may_trap_or_fault_p (mem))
2448 addr = XEXP (mem, 0);
2450 /* Call target hook to avoid the effects of -fpic etc.... */
2451 addr = targetm.delegitimize_address (addr);
2454 switch (GET_CODE (addr))
2462 addr = XEXP (addr, 0);
2466 addr = XEXP (addr, 1);
2469 if (CONST_INT_P (XEXP (addr, 1)))
2470 addr = XEXP (addr, 0);
2477 if (SYMBOL_REF_DECL (addr)
2478 && decl_readonly_section (SYMBOL_REF_DECL (addr), 0))
2488 /* Return whether we can use store speculation for MEM. TOP_BB is the
2489 basic block above the conditional block where we are considering
2490 doing the speculative store. We look for whether MEM is set
2491 unconditionally later in the function. */
2494 noce_can_store_speculate_p (basic_block top_bb, const_rtx mem)
2496 basic_block dominator;
2498 for (dominator = get_immediate_dominator (CDI_POST_DOMINATORS, top_bb);
2500 dominator = get_immediate_dominator (CDI_POST_DOMINATORS, dominator))
2504 FOR_BB_INSNS (dominator, insn)
2506 /* If we see something that might be a memory barrier, we
2507 have to stop looking. Even if the MEM is set later in
2508 the function, we still don't want to set it
2509 unconditionally before the barrier. */
2511 && (volatile_insn_p (PATTERN (insn))
2512 || (CALL_P (insn) && (!RTL_CONST_CALL_P (insn)))))
2515 if (memory_must_be_modified_in_insn_p (mem, insn))
2517 if (modified_in_p (XEXP (mem, 0), insn))
2526 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2527 it without using conditional execution. Return TRUE if we were successful
2528 at converting the block. */
2531 noce_process_if_block (struct noce_if_info *if_info)
2533 basic_block test_bb = if_info->test_bb; /* test block */
2534 basic_block then_bb = if_info->then_bb; /* THEN */
2535 basic_block else_bb = if_info->else_bb; /* ELSE or NULL */
2536 basic_block join_bb = if_info->join_bb; /* JOIN */
2537 rtx_insn *jump = if_info->jump;
2538 rtx cond = if_info->cond;
2539 rtx_insn *insn_a, *insn_b;
2541 rtx orig_x, x, a, b;
2544 /* We're looking for patterns of the form
2546 (1) if (...) x = a; else x = b;
2547 (2) x = b; if (...) x = a;
2548 (3) if (...) x = a; // as if with an initial x = x.
2550 The later patterns require jumps to be more expensive.
2552 ??? For future expansion, look for multiple X in such patterns. */
2554 /* Look for one of the potential sets. */
2555 insn_a = first_active_insn (then_bb);
2557 || insn_a != last_active_insn (then_bb, FALSE)
2558 || (set_a = single_set (insn_a)) == NULL_RTX)
2561 x = SET_DEST (set_a);
2562 a = SET_SRC (set_a);
2564 /* Look for the other potential set. Make sure we've got equivalent
2566 /* ??? This is overconservative. Storing to two different mems is
2567 as easy as conditionally computing the address. Storing to a
2568 single mem merely requires a scratch memory to use as one of the
2569 destination addresses; often the memory immediately below the
2570 stack pointer is available for this. */
2574 insn_b = first_active_insn (else_bb);
2576 || insn_b != last_active_insn (else_bb, FALSE)
2577 || (set_b = single_set (insn_b)) == NULL_RTX
2578 || ! rtx_interchangeable_p (x, SET_DEST (set_b)))
2583 insn_b = prev_nonnote_nondebug_insn (if_info->cond_earliest);
2584 /* We're going to be moving the evaluation of B down from above
2585 COND_EARLIEST to JUMP. Make sure the relevant data is still
2588 || BLOCK_FOR_INSN (insn_b) != BLOCK_FOR_INSN (if_info->cond_earliest)
2589 || !NONJUMP_INSN_P (insn_b)
2590 || (set_b = single_set (insn_b)) == NULL_RTX
2591 || ! rtx_interchangeable_p (x, SET_DEST (set_b))
2592 || ! noce_operand_ok (SET_SRC (set_b))
2593 || reg_overlap_mentioned_p (x, SET_SRC (set_b))
2594 || modified_between_p (SET_SRC (set_b), insn_b, jump)
2595 /* Avoid extending the lifetime of hard registers on small
2596 register class machines. */
2597 || (REG_P (SET_SRC (set_b))
2598 && HARD_REGISTER_P (SET_SRC (set_b))
2599 && targetm.small_register_classes_for_mode_p
2600 (GET_MODE (SET_SRC (set_b))))
2601 /* Likewise with X. In particular this can happen when
2602 noce_get_condition looks farther back in the instruction
2603 stream than one might expect. */
2604 || reg_overlap_mentioned_p (x, cond)
2605 || reg_overlap_mentioned_p (x, a)
2606 || modified_between_p (x, insn_b, jump))
2613 /* If x has side effects then only the if-then-else form is safe to
2614 convert. But even in that case we would need to restore any notes
2615 (such as REG_INC) at then end. That can be tricky if
2616 noce_emit_move_insn expands to more than one insn, so disable the
2617 optimization entirely for now if there are side effects. */
2618 if (side_effects_p (x))
2621 b = (set_b ? SET_SRC (set_b) : x);
2623 /* Only operate on register destinations, and even then avoid extending
2624 the lifetime of hard registers on small register class machines. */
2627 || (HARD_REGISTER_P (x)
2628 && targetm.small_register_classes_for_mode_p (GET_MODE (x))))
2630 if (GET_MODE (x) == BLKmode)
2633 if (GET_CODE (x) == ZERO_EXTRACT
2634 && (!CONST_INT_P (XEXP (x, 1))
2635 || !CONST_INT_P (XEXP (x, 2))))
2638 x = gen_reg_rtx (GET_MODE (GET_CODE (x) == STRICT_LOW_PART
2639 ? XEXP (x, 0) : x));
2642 /* Don't operate on sources that may trap or are volatile. */
2643 if (! noce_operand_ok (a) || ! noce_operand_ok (b))
2647 /* Set up the info block for our subroutines. */
2648 if_info->insn_a = insn_a;
2649 if_info->insn_b = insn_b;
2654 /* Skip it if the instruction to be moved might clobber CC. */
2655 cc = cc_in_cond (cond);
2657 && (set_of (cc, insn_a)
2658 || (insn_b && set_of (cc, insn_b))))
2661 /* Try optimizations in some approximation of a useful order. */
2662 /* ??? Should first look to see if X is live incoming at all. If it
2663 isn't, we don't need anything but an unconditional set. */
2665 /* Look and see if A and B are really the same. Avoid creating silly
2666 cmove constructs that no one will fix up later. */
2667 if (rtx_interchangeable_p (a, b))
2669 /* If we have an INSN_B, we don't have to create any new rtl. Just
2670 move the instruction that we already have. If we don't have an
2671 INSN_B, that means that A == X, and we've got a noop move. In
2672 that case don't do anything and let the code below delete INSN_A. */
2673 if (insn_b && else_bb)
2677 if (else_bb && insn_b == BB_END (else_bb))
2678 BB_END (else_bb) = PREV_INSN (insn_b);
2679 reorder_insns (insn_b, insn_b, PREV_INSN (jump));
2681 /* If there was a REG_EQUAL note, delete it since it may have been
2682 true due to this insn being after a jump. */
2683 if ((note = find_reg_note (insn_b, REG_EQUAL, NULL_RTX)) != 0)
2684 remove_note (insn_b, note);
2688 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
2689 x must be executed twice. */
2690 else if (insn_b && side_effects_p (orig_x))
2697 if (!set_b && MEM_P (orig_x))
2699 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
2700 for optimizations if writing to x may trap or fault,
2701 i.e. it's a memory other than a static var or a stack slot,
2702 is misaligned on strict aligned machines or is read-only. If
2703 x is a read-only memory, then the program is valid only if we
2704 avoid the store into it. If there are stores on both the
2705 THEN and ELSE arms, then we can go ahead with the conversion;
2706 either the program is broken, or the condition is always
2707 false such that the other memory is selected. */
2708 if (noce_mem_write_may_trap_or_fault_p (orig_x))
2711 /* Avoid store speculation: given "if (...) x = a" where x is a
2712 MEM, we only want to do the store if x is always set
2713 somewhere in the function. This avoids cases like
2714 if (pthread_mutex_trylock(mutex))
2716 where we only want global_variable to be changed if the mutex
2717 is held. FIXME: This should ideally be expressed directly in
2719 if (!noce_can_store_speculate_p (test_bb, orig_x))
2723 if (noce_try_move (if_info))
2725 if (noce_try_store_flag (if_info))
2727 if (noce_try_bitop (if_info))
2729 if (noce_try_minmax (if_info))
2731 if (noce_try_abs (if_info))
2733 if (HAVE_conditional_move
2734 && noce_try_cmove (if_info))
2736 if (! targetm.have_conditional_execution ())
2738 if (noce_try_store_flag_constants (if_info))
2740 if (noce_try_addcc (if_info))
2742 if (noce_try_store_flag_mask (if_info))
2744 if (HAVE_conditional_move
2745 && noce_try_cmove_arith (if_info))
2747 if (noce_try_sign_mask (if_info))
2751 if (!else_bb && set_b)
2763 /* If we used a temporary, fix it up now. */
2769 noce_emit_move_insn (orig_x, x);
2771 set_used_flags (orig_x);
2772 unshare_all_rtl_in_chain (seq);
2775 emit_insn_before_setloc (seq, BB_END (test_bb), INSN_LOCATION (insn_a));
2778 /* The original THEN and ELSE blocks may now be removed. The test block
2779 must now jump to the join block. If the test block and the join block
2780 can be merged, do so. */
2783 delete_basic_block (else_bb);
2787 remove_edge (find_edge (test_bb, join_bb));
2789 remove_edge (find_edge (then_bb, join_bb));
2790 redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb);
2791 delete_basic_block (then_bb);
2794 if (can_merge_blocks_p (test_bb, join_bb))
2796 merge_blocks (test_bb, join_bb);
2800 num_updated_if_blocks++;
2804 /* Check whether a block is suitable for conditional move conversion.
2805 Every insn must be a simple set of a register to a constant or a
2806 register. For each assignment, store the value in the pointer map
2807 VALS, keyed indexed by register pointer, then store the register
2808 pointer in REGS. COND is the condition we will test. */
2811 check_cond_move_block (basic_block bb,
2812 hash_map<rtx, rtx> *vals,
2817 rtx cc = cc_in_cond (cond);
2819 /* We can only handle simple jumps at the end of the basic block.
2820 It is almost impossible to update the CFG otherwise. */
2822 if (JUMP_P (insn) && !onlyjump_p (insn))
2825 FOR_BB_INSNS (bb, insn)
2829 if (!NONDEBUG_INSN_P (insn) || JUMP_P (insn))
2831 set = single_set (insn);
2835 dest = SET_DEST (set);
2836 src = SET_SRC (set);
2838 || (HARD_REGISTER_P (dest)
2839 && targetm.small_register_classes_for_mode_p (GET_MODE (dest))))
2842 if (!CONSTANT_P (src) && !register_operand (src, VOIDmode))
2845 if (side_effects_p (src) || side_effects_p (dest))
2848 if (may_trap_p (src) || may_trap_p (dest))
2851 /* Don't try to handle this if the source register was
2852 modified earlier in the block. */
2855 || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src))
2856 && vals->get (SUBREG_REG (src))))
2859 /* Don't try to handle this if the destination register was
2860 modified earlier in the block. */
2861 if (vals->get (dest))
2864 /* Don't try to handle this if the condition uses the
2865 destination register. */
2866 if (reg_overlap_mentioned_p (dest, cond))
2869 /* Don't try to handle this if the source register is modified
2870 later in the block. */
2871 if (!CONSTANT_P (src)
2872 && modified_between_p (src, insn, NEXT_INSN (BB_END (bb))))
2875 /* Skip it if the instruction to be moved might clobber CC. */
2876 if (cc && set_of (cc, insn))
2879 vals->put (dest, src);
2881 regs->safe_push (dest);
2887 /* Given a basic block BB suitable for conditional move conversion,
2888 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
2889 the register values depending on COND, emit the insns in the block as
2890 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
2891 processed. The caller has started a sequence for the conversion.
2892 Return true if successful, false if something goes wrong. */
2895 cond_move_convert_if_block (struct noce_if_info *if_infop,
2896 basic_block bb, rtx cond,
2897 hash_map<rtx, rtx> *then_vals,
2898 hash_map<rtx, rtx> *else_vals,
2903 rtx cond_arg0, cond_arg1;
2905 code = GET_CODE (cond);
2906 cond_arg0 = XEXP (cond, 0);
2907 cond_arg1 = XEXP (cond, 1);
2909 FOR_BB_INSNS (bb, insn)
2911 rtx set, target, dest, t, e;
2913 /* ??? Maybe emit conditional debug insn? */
2914 if (!NONDEBUG_INSN_P (insn) || JUMP_P (insn))
2916 set = single_set (insn);
2917 gcc_assert (set && REG_P (SET_DEST (set)));
2919 dest = SET_DEST (set);
2921 rtx *then_slot = then_vals->get (dest);
2922 rtx *else_slot = else_vals->get (dest);
2923 t = then_slot ? *then_slot : NULL_RTX;
2924 e = else_slot ? *else_slot : NULL_RTX;
2928 /* If this register was set in the then block, we already
2929 handled this case there. */
2942 target = noce_emit_cmove (if_infop, dest, code, cond_arg0, cond_arg1,
2948 noce_emit_move_insn (dest, target);
2954 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2955 it using only conditional moves. Return TRUE if we were successful at
2956 converting the block. */
2959 cond_move_process_if_block (struct noce_if_info *if_info)
2961 basic_block test_bb = if_info->test_bb;
2962 basic_block then_bb = if_info->then_bb;
2963 basic_block else_bb = if_info->else_bb;
2964 basic_block join_bb = if_info->join_bb;
2965 rtx_insn *jump = if_info->jump;
2966 rtx cond = if_info->cond;
2967 rtx_insn *seq, *loc_insn;
2970 vec<rtx> then_regs = vNULL;
2971 vec<rtx> else_regs = vNULL;
2973 int success_p = FALSE;
2975 /* Build a mapping for each block to the value used for each
2977 hash_map<rtx, rtx> then_vals;
2978 hash_map<rtx, rtx> else_vals;
2980 /* Make sure the blocks are suitable. */
2981 if (!check_cond_move_block (then_bb, &then_vals, &then_regs, cond)
2983 && !check_cond_move_block (else_bb, &else_vals, &else_regs, cond)))
2986 /* Make sure the blocks can be used together. If the same register
2987 is set in both blocks, and is not set to a constant in both
2988 cases, then both blocks must set it to the same register. We
2989 have already verified that if it is set to a register, that the
2990 source register does not change after the assignment. Also count
2991 the number of registers set in only one of the blocks. */
2993 FOR_EACH_VEC_ELT (then_regs, i, reg)
2995 rtx *then_slot = then_vals.get (reg);
2996 rtx *else_slot = else_vals.get (reg);
2998 gcc_checking_assert (then_slot);
3003 rtx then_val = *then_slot;
3004 rtx else_val = *else_slot;
3005 if (!CONSTANT_P (then_val) && !CONSTANT_P (else_val)
3006 && !rtx_equal_p (then_val, else_val))
3011 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3012 FOR_EACH_VEC_ELT (else_regs, i, reg)
3014 gcc_checking_assert (else_vals.get (reg));
3015 if (!then_vals.get (reg))
3019 /* Make sure it is reasonable to convert this block. What matters
3020 is the number of assignments currently made in only one of the
3021 branches, since if we convert we are going to always execute
3023 if (c > MAX_CONDITIONAL_EXECUTE)
3026 /* Try to emit the conditional moves. First do the then block,
3027 then do anything left in the else blocks. */
3029 if (!cond_move_convert_if_block (if_info, then_bb, cond,
3030 &then_vals, &else_vals, false)
3032 && !cond_move_convert_if_block (if_info, else_bb, cond,
3033 &then_vals, &else_vals, true)))
3038 seq = end_ifcvt_sequence (if_info);
3042 loc_insn = first_active_insn (then_bb);
3045 loc_insn = first_active_insn (else_bb);
3046 gcc_assert (loc_insn);
3048 emit_insn_before_setloc (seq, jump, INSN_LOCATION (loc_insn));
3052 delete_basic_block (else_bb);
3056 remove_edge (find_edge (test_bb, join_bb));
3058 remove_edge (find_edge (then_bb, join_bb));
3059 redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb);
3060 delete_basic_block (then_bb);
3063 if (can_merge_blocks_p (test_bb, join_bb))
3065 merge_blocks (test_bb, join_bb);
3069 num_updated_if_blocks++;
3074 then_regs.release ();
3075 else_regs.release ();
3080 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3081 IF-THEN-ELSE-JOIN block.
3083 If so, we'll try to convert the insns to not require the branch,
3084 using only transformations that do not require conditional execution.
3086 Return TRUE if we were successful at converting the block. */
3089 noce_find_if_block (basic_block test_bb, edge then_edge, edge else_edge,
3092 basic_block then_bb, else_bb, join_bb;
3093 bool then_else_reversed = false;
3096 rtx_insn *cond_earliest;
3097 struct noce_if_info if_info;
3099 /* We only ever should get here before reload. */
3100 gcc_assert (!reload_completed);
3102 /* Recognize an IF-THEN-ELSE-JOIN block. */
3103 if (single_pred_p (then_edge->dest)
3104 && single_succ_p (then_edge->dest)
3105 && single_pred_p (else_edge->dest)
3106 && single_succ_p (else_edge->dest)
3107 && single_succ (then_edge->dest) == single_succ (else_edge->dest))
3109 then_bb = then_edge->dest;
3110 else_bb = else_edge->dest;
3111 join_bb = single_succ (then_bb);
3113 /* Recognize an IF-THEN-JOIN block. */
3114 else if (single_pred_p (then_edge->dest)
3115 && single_succ_p (then_edge->dest)
3116 && single_succ (then_edge->dest) == else_edge->dest)
3118 then_bb = then_edge->dest;
3119 else_bb = NULL_BLOCK;
3120 join_bb = else_edge->dest;
3122 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3123 of basic blocks in cfglayout mode does not matter, so the fallthrough
3124 edge can go to any basic block (and not just to bb->next_bb, like in
3126 else if (single_pred_p (else_edge->dest)
3127 && single_succ_p (else_edge->dest)
3128 && single_succ (else_edge->dest) == then_edge->dest)
3130 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3131 To make this work, we have to invert the THEN and ELSE blocks
3132 and reverse the jump condition. */
3133 then_bb = else_edge->dest;
3134 else_bb = NULL_BLOCK;
3135 join_bb = single_succ (then_bb);
3136 then_else_reversed = true;
3139 /* Not a form we can handle. */
3142 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3143 if (single_succ_edge (then_bb)->flags & EDGE_COMPLEX)
3146 && single_succ_edge (else_bb)->flags & EDGE_COMPLEX)
3149 num_possible_if_blocks++;
3154 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3155 (else_bb) ? "-ELSE" : "",
3156 pass, test_bb->index, then_bb->index);
3159 fprintf (dump_file, ", else %d", else_bb->index);
3161 fprintf (dump_file, ", join %d\n", join_bb->index);
3164 /* If the conditional jump is more than just a conditional
3165 jump, then we can not do if-conversion on this block. */
3166 jump = BB_END (test_bb);
3167 if (! onlyjump_p (jump))
3170 /* If this is not a standard conditional jump, we can't parse it. */
3171 cond = noce_get_condition (jump, &cond_earliest, then_else_reversed);
3175 /* We must be comparing objects whose modes imply the size. */
3176 if (GET_MODE (XEXP (cond, 0)) == BLKmode)
3179 /* Initialize an IF_INFO struct to pass around. */
3180 memset (&if_info, 0, sizeof if_info);
3181 if_info.test_bb = test_bb;
3182 if_info.then_bb = then_bb;
3183 if_info.else_bb = else_bb;
3184 if_info.join_bb = join_bb;
3185 if_info.cond = cond;
3186 if_info.cond_earliest = cond_earliest;
3187 if_info.jump = jump;
3188 if_info.then_else_reversed = then_else_reversed;
3189 if_info.branch_cost = BRANCH_COST (optimize_bb_for_speed_p (test_bb),
3190 predictable_edge_p (then_edge));
3192 /* Do the real work. */
3194 if (noce_process_if_block (&if_info))
3197 if (HAVE_conditional_move
3198 && cond_move_process_if_block (&if_info))
3205 /* Merge the blocks and mark for local life update. */
3208 merge_if_block (struct ce_if_block * ce_info)
3210 basic_block test_bb = ce_info->test_bb; /* last test block */
3211 basic_block then_bb = ce_info->then_bb; /* THEN */
3212 basic_block else_bb = ce_info->else_bb; /* ELSE or NULL */
3213 basic_block join_bb = ce_info->join_bb; /* join block */
3214 basic_block combo_bb;
3216 /* All block merging is done into the lower block numbers. */
3219 df_set_bb_dirty (test_bb);
3221 /* Merge any basic blocks to handle && and || subtests. Each of
3222 the blocks are on the fallthru path from the predecessor block. */
3223 if (ce_info->num_multiple_test_blocks > 0)
3225 basic_block bb = test_bb;
3226 basic_block last_test_bb = ce_info->last_test_bb;
3227 basic_block fallthru = block_fallthru (bb);
3232 fallthru = block_fallthru (bb);
3233 merge_blocks (combo_bb, bb);
3236 while (bb != last_test_bb);
3239 /* Merge TEST block into THEN block. Normally the THEN block won't have a
3240 label, but it might if there were || tests. That label's count should be
3241 zero, and it normally should be removed. */
3245 /* If THEN_BB has no successors, then there's a BARRIER after it.
3246 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
3247 is no longer needed, and in fact it is incorrect to leave it in
3249 if (EDGE_COUNT (then_bb->succs) == 0
3250 && EDGE_COUNT (combo_bb->succs) > 1)
3252 rtx_insn *end = NEXT_INSN (BB_END (then_bb));
3253 while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end))
3254 end = NEXT_INSN (end);
3256 if (end && BARRIER_P (end))
3259 merge_blocks (combo_bb, then_bb);
3263 /* The ELSE block, if it existed, had a label. That label count
3264 will almost always be zero, but odd things can happen when labels
3265 get their addresses taken. */
3268 /* If ELSE_BB has no successors, then there's a BARRIER after it.
3269 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
3270 is no longer needed, and in fact it is incorrect to leave it in
3272 if (EDGE_COUNT (else_bb->succs) == 0
3273 && EDGE_COUNT (combo_bb->succs) > 1)
3275 rtx_insn *end = NEXT_INSN (BB_END (else_bb));
3276 while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end))
3277 end = NEXT_INSN (end);
3279 if (end && BARRIER_P (end))
3282 merge_blocks (combo_bb, else_bb);
3286 /* If there was no join block reported, that means it was not adjacent
3287 to the others, and so we cannot merge them. */
3291 rtx_insn *last = BB_END (combo_bb);
3293 /* The outgoing edge for the current COMBO block should already
3294 be correct. Verify this. */
3295 if (EDGE_COUNT (combo_bb->succs) == 0)
3296 gcc_assert (find_reg_note (last, REG_NORETURN, NULL)
3297 || (NONJUMP_INSN_P (last)
3298 && GET_CODE (PATTERN (last)) == TRAP_IF
3299 && (TRAP_CONDITION (PATTERN (last))
3300 == const_true_rtx)));
3303 /* There should still be something at the end of the THEN or ELSE
3304 blocks taking us to our final destination. */
3305 gcc_assert (JUMP_P (last)
3306 || (EDGE_SUCC (combo_bb, 0)->dest
3307 == EXIT_BLOCK_PTR_FOR_FN (cfun)
3309 && SIBLING_CALL_P (last))
3310 || ((EDGE_SUCC (combo_bb, 0)->flags & EDGE_EH)
3311 && can_throw_internal (last)));
3314 /* The JOIN block may have had quite a number of other predecessors too.
3315 Since we've already merged the TEST, THEN and ELSE blocks, we should
3316 have only one remaining edge from our if-then-else diamond. If there
3317 is more than one remaining edge, it must come from elsewhere. There
3318 may be zero incoming edges if the THEN block didn't actually join
3319 back up (as with a call to a non-return function). */
3320 else if (EDGE_COUNT (join_bb->preds) < 2
3321 && join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
3323 /* We can merge the JOIN cleanly and update the dataflow try
3324 again on this pass.*/
3325 merge_blocks (combo_bb, join_bb);
3330 /* We cannot merge the JOIN. */
3332 /* The outgoing edge for the current COMBO block should already
3333 be correct. Verify this. */
3334 gcc_assert (single_succ_p (combo_bb)
3335 && single_succ (combo_bb) == join_bb);
3337 /* Remove the jump and cruft from the end of the COMBO block. */
3338 if (join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
3339 tidy_fallthru_edge (single_succ_edge (combo_bb));
3342 num_updated_if_blocks++;
3345 /* Find a block ending in a simple IF condition and try to transform it
3346 in some way. When converting a multi-block condition, put the new code
3347 in the first such block and delete the rest. Return a pointer to this
3348 first block if some transformation was done. Return NULL otherwise. */
3351 find_if_header (basic_block test_bb, int pass)
3353 ce_if_block ce_info;
3357 /* The kind of block we're looking for has exactly two successors. */
3358 if (EDGE_COUNT (test_bb->succs) != 2)
3361 then_edge = EDGE_SUCC (test_bb, 0);
3362 else_edge = EDGE_SUCC (test_bb, 1);
3364 if (df_get_bb_dirty (then_edge->dest))
3366 if (df_get_bb_dirty (else_edge->dest))
3369 /* Neither edge should be abnormal. */
3370 if ((then_edge->flags & EDGE_COMPLEX)
3371 || (else_edge->flags & EDGE_COMPLEX))
3374 /* Nor exit the loop. */
3375 if ((then_edge->flags & EDGE_LOOP_EXIT)
3376 || (else_edge->flags & EDGE_LOOP_EXIT))
3379 /* The THEN edge is canonically the one that falls through. */
3380 if (then_edge->flags & EDGE_FALLTHRU)
3382 else if (else_edge->flags & EDGE_FALLTHRU)
3383 std::swap (then_edge, else_edge);
3385 /* Otherwise this must be a multiway branch of some sort. */
3388 memset (&ce_info, 0, sizeof (ce_info));
3389 ce_info.test_bb = test_bb;
3390 ce_info.then_bb = then_edge->dest;
3391 ce_info.else_bb = else_edge->dest;
3392 ce_info.pass = pass;
3394 #ifdef IFCVT_MACHDEP_INIT
3395 IFCVT_MACHDEP_INIT (&ce_info);
3398 if (!reload_completed
3399 && noce_find_if_block (test_bb, then_edge, else_edge, pass))
3402 if (reload_completed
3403 && targetm.have_conditional_execution ()
3404 && cond_exec_find_if_block (&ce_info))
3407 if (targetm.have_trap ()
3408 && optab_handler (ctrap_optab, word_mode) != CODE_FOR_nothing
3409 && find_cond_trap (test_bb, then_edge, else_edge))
3412 if (dom_info_state (CDI_POST_DOMINATORS) >= DOM_NO_FAST_QUERY
3413 && (reload_completed || !targetm.have_conditional_execution ()))
3415 if (find_if_case_1 (test_bb, then_edge, else_edge))
3417 if (find_if_case_2 (test_bb, then_edge, else_edge))
3425 fprintf (dump_file, "Conversion succeeded on pass %d.\n", pass);
3426 /* Set this so we continue looking. */
3427 cond_exec_changed_p = TRUE;
3428 return ce_info.test_bb;
3431 /* Return true if a block has two edges, one of which falls through to the next
3432 block, and the other jumps to a specific block, so that we can tell if the
3433 block is part of an && test or an || test. Returns either -1 or the number
3434 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
3437 block_jumps_and_fallthru_p (basic_block cur_bb, basic_block target_bb)
3440 int fallthru_p = FALSE;
3447 if (!cur_bb || !target_bb)
3450 /* If no edges, obviously it doesn't jump or fallthru. */
3451 if (EDGE_COUNT (cur_bb->succs) == 0)
3454 FOR_EACH_EDGE (cur_edge, ei, cur_bb->succs)
3456 if (cur_edge->flags & EDGE_COMPLEX)
3457 /* Anything complex isn't what we want. */
3460 else if (cur_edge->flags & EDGE_FALLTHRU)
3463 else if (cur_edge->dest == target_bb)
3470 if ((jump_p & fallthru_p) == 0)
3473 /* Don't allow calls in the block, since this is used to group && and ||
3474 together for conditional execution support. ??? we should support
3475 conditional execution support across calls for IA-64 some day, but
3476 for now it makes the code simpler. */
3477 end = BB_END (cur_bb);
3478 insn = BB_HEAD (cur_bb);
3480 while (insn != NULL_RTX)
3487 && !DEBUG_INSN_P (insn)
3488 && GET_CODE (PATTERN (insn)) != USE
3489 && GET_CODE (PATTERN (insn)) != CLOBBER)
3495 insn = NEXT_INSN (insn);
3501 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
3502 block. If so, we'll try to convert the insns to not require the branch.
3503 Return TRUE if we were successful at converting the block. */
3506 cond_exec_find_if_block (struct ce_if_block * ce_info)
3508 basic_block test_bb = ce_info->test_bb;
3509 basic_block then_bb = ce_info->then_bb;
3510 basic_block else_bb = ce_info->else_bb;
3511 basic_block join_bb = NULL_BLOCK;
3516 ce_info->last_test_bb = test_bb;
3518 /* We only ever should get here after reload,
3519 and if we have conditional execution. */
3520 gcc_assert (reload_completed && targetm.have_conditional_execution ());
3522 /* Discover if any fall through predecessors of the current test basic block
3523 were && tests (which jump to the else block) or || tests (which jump to
3525 if (single_pred_p (test_bb)
3526 && single_pred_edge (test_bb)->flags == EDGE_FALLTHRU)
3528 basic_block bb = single_pred (test_bb);
3529 basic_block target_bb;
3530 int max_insns = MAX_CONDITIONAL_EXECUTE;
3533 /* Determine if the preceding block is an && or || block. */
3534 if ((n_insns = block_jumps_and_fallthru_p (bb, else_bb)) >= 0)
3536 ce_info->and_and_p = TRUE;
3537 target_bb = else_bb;
3539 else if ((n_insns = block_jumps_and_fallthru_p (bb, then_bb)) >= 0)
3541 ce_info->and_and_p = FALSE;
3542 target_bb = then_bb;
3545 target_bb = NULL_BLOCK;
3547 if (target_bb && n_insns <= max_insns)
3549 int total_insns = 0;
3552 ce_info->last_test_bb = test_bb;
3554 /* Found at least one && or || block, look for more. */
3557 ce_info->test_bb = test_bb = bb;
3558 total_insns += n_insns;
3561 if (!single_pred_p (bb))
3564 bb = single_pred (bb);
3565 n_insns = block_jumps_and_fallthru_p (bb, target_bb);
3567 while (n_insns >= 0 && (total_insns + n_insns) <= max_insns);
3569 ce_info->num_multiple_test_blocks = blocks;
3570 ce_info->num_multiple_test_insns = total_insns;
3572 if (ce_info->and_and_p)
3573 ce_info->num_and_and_blocks = blocks;
3575 ce_info->num_or_or_blocks = blocks;
3579 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
3580 other than any || blocks which jump to the THEN block. */
3581 if ((EDGE_COUNT (then_bb->preds) - ce_info->num_or_or_blocks) != 1)
3584 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3585 FOR_EACH_EDGE (cur_edge, ei, then_bb->preds)
3587 if (cur_edge->flags & EDGE_COMPLEX)
3591 FOR_EACH_EDGE (cur_edge, ei, else_bb->preds)
3593 if (cur_edge->flags & EDGE_COMPLEX)
3597 /* The THEN block of an IF-THEN combo must have zero or one successors. */
3598 if (EDGE_COUNT (then_bb->succs) > 0
3599 && (!single_succ_p (then_bb)
3600 || (single_succ_edge (then_bb)->flags & EDGE_COMPLEX)
3601 || (epilogue_completed
3602 && tablejump_p (BB_END (then_bb), NULL, NULL))))
3605 /* If the THEN block has no successors, conditional execution can still
3606 make a conditional call. Don't do this unless the ELSE block has
3607 only one incoming edge -- the CFG manipulation is too ugly otherwise.
3608 Check for the last insn of the THEN block being an indirect jump, which
3609 is listed as not having any successors, but confuses the rest of the CE
3610 code processing. ??? we should fix this in the future. */
3611 if (EDGE_COUNT (then_bb->succs) == 0)
3613 if (single_pred_p (else_bb) && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
3615 rtx_insn *last_insn = BB_END (then_bb);
3618 && NOTE_P (last_insn)
3619 && last_insn != BB_HEAD (then_bb))
3620 last_insn = PREV_INSN (last_insn);
3623 && JUMP_P (last_insn)
3624 && ! simplejump_p (last_insn))
3628 else_bb = NULL_BLOCK;
3634 /* If the THEN block's successor is the other edge out of the TEST block,
3635 then we have an IF-THEN combo without an ELSE. */
3636 else if (single_succ (then_bb) == else_bb)
3639 else_bb = NULL_BLOCK;
3642 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
3643 has exactly one predecessor and one successor, and the outgoing edge
3644 is not complex, then we have an IF-THEN-ELSE combo. */
3645 else if (single_succ_p (else_bb)
3646 && single_succ (then_bb) == single_succ (else_bb)
3647 && single_pred_p (else_bb)
3648 && !(single_succ_edge (else_bb)->flags & EDGE_COMPLEX)
3649 && !(epilogue_completed
3650 && tablejump_p (BB_END (else_bb), NULL, NULL)))
3651 join_bb = single_succ (else_bb);
3653 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
3657 num_possible_if_blocks++;
3662 "\nIF-THEN%s block found, pass %d, start block %d "
3663 "[insn %d], then %d [%d]",
3664 (else_bb) ? "-ELSE" : "",
3667 BB_HEAD (test_bb) ? (int)INSN_UID (BB_HEAD (test_bb)) : -1,
3669 BB_HEAD (then_bb) ? (int)INSN_UID (BB_HEAD (then_bb)) : -1);
3672 fprintf (dump_file, ", else %d [%d]",
3674 BB_HEAD (else_bb) ? (int)INSN_UID (BB_HEAD (else_bb)) : -1);
3676 fprintf (dump_file, ", join %d [%d]",
3678 BB_HEAD (join_bb) ? (int)INSN_UID (BB_HEAD (join_bb)) : -1);
3680 if (ce_info->num_multiple_test_blocks > 0)
3681 fprintf (dump_file, ", %d %s block%s last test %d [%d]",
3682 ce_info->num_multiple_test_blocks,
3683 (ce_info->and_and_p) ? "&&" : "||",
3684 (ce_info->num_multiple_test_blocks == 1) ? "" : "s",
3685 ce_info->last_test_bb->index,
3686 ((BB_HEAD (ce_info->last_test_bb))
3687 ? (int)INSN_UID (BB_HEAD (ce_info->last_test_bb))
3690 fputc ('\n', dump_file);
3693 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
3694 first condition for free, since we've already asserted that there's a
3695 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
3696 we checked the FALLTHRU flag, those are already adjacent to the last IF
3698 /* ??? As an enhancement, move the ELSE block. Have to deal with
3699 BLOCK notes, if by no other means than backing out the merge if they
3700 exist. Sticky enough I don't want to think about it now. */
3702 if (else_bb && (next = next->next_bb) != else_bb)
3704 if ((next = next->next_bb) != join_bb
3705 && join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
3713 /* Do the real work. */
3715 ce_info->else_bb = else_bb;
3716 ce_info->join_bb = join_bb;
3718 /* If we have && and || tests, try to first handle combining the && and ||
3719 tests into the conditional code, and if that fails, go back and handle
3720 it without the && and ||, which at present handles the && case if there
3721 was no ELSE block. */
3722 if (cond_exec_process_if_block (ce_info, TRUE))
3725 if (ce_info->num_multiple_test_blocks)
3729 if (cond_exec_process_if_block (ce_info, FALSE))
3736 /* Convert a branch over a trap, or a branch
3737 to a trap, into a conditional trap. */
3740 find_cond_trap (basic_block test_bb, edge then_edge, edge else_edge)
3742 basic_block then_bb = then_edge->dest;
3743 basic_block else_bb = else_edge->dest;
3744 basic_block other_bb, trap_bb;
3745 rtx_insn *trap, *jump;
3747 rtx_insn *cond_earliest;
3750 /* Locate the block with the trap instruction. */
3751 /* ??? While we look for no successors, we really ought to allow
3752 EH successors. Need to fix merge_if_block for that to work. */
3753 if ((trap = block_has_only_trap (then_bb)) != NULL)
3754 trap_bb = then_bb, other_bb = else_bb;
3755 else if ((trap = block_has_only_trap (else_bb)) != NULL)
3756 trap_bb = else_bb, other_bb = then_bb;
3762 fprintf (dump_file, "\nTRAP-IF block found, start %d, trap %d\n",
3763 test_bb->index, trap_bb->index);
3766 /* If this is not a standard conditional jump, we can't parse it. */
3767 jump = BB_END (test_bb);
3768 cond = noce_get_condition (jump, &cond_earliest, false);
3772 /* If the conditional jump is more than just a conditional jump, then
3773 we can not do if-conversion on this block. */
3774 if (! onlyjump_p (jump))
3777 /* We must be comparing objects whose modes imply the size. */
3778 if (GET_MODE (XEXP (cond, 0)) == BLKmode)
3781 /* Reverse the comparison code, if necessary. */
3782 code = GET_CODE (cond);
3783 if (then_bb == trap_bb)
3785 code = reversed_comparison_code (cond, jump);
3786 if (code == UNKNOWN)
3790 /* Attempt to generate the conditional trap. */
3791 rtx_insn *seq = gen_cond_trap (code, copy_rtx (XEXP (cond, 0)),
3792 copy_rtx (XEXP (cond, 1)),
3793 TRAP_CODE (PATTERN (trap)));
3797 /* Emit the new insns before cond_earliest. */
3798 emit_insn_before_setloc (seq, cond_earliest, INSN_LOCATION (trap));
3800 /* Delete the trap block if possible. */
3801 remove_edge (trap_bb == then_bb ? then_edge : else_edge);
3802 df_set_bb_dirty (test_bb);
3803 df_set_bb_dirty (then_bb);
3804 df_set_bb_dirty (else_bb);
3806 if (EDGE_COUNT (trap_bb->preds) == 0)
3808 delete_basic_block (trap_bb);
3812 /* Wire together the blocks again. */
3813 if (current_ir_type () == IR_RTL_CFGLAYOUT)
3814 single_succ_edge (test_bb)->flags |= EDGE_FALLTHRU;
3815 else if (trap_bb == then_bb)
3817 rtx lab = JUMP_LABEL (jump);
3818 rtx_insn *seq = targetm.gen_jump (lab);
3819 rtx_jump_insn *newjump = emit_jump_insn_after (seq, jump);
3820 LABEL_NUSES (lab) += 1;
3821 JUMP_LABEL (newjump) = lab;
3822 emit_barrier_after (newjump);
3826 if (can_merge_blocks_p (test_bb, other_bb))
3828 merge_blocks (test_bb, other_bb);
3832 num_updated_if_blocks++;
3836 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
3840 block_has_only_trap (basic_block bb)
3844 /* We're not the exit block. */
3845 if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
3848 /* The block must have no successors. */
3849 if (EDGE_COUNT (bb->succs) > 0)
3852 /* The only instruction in the THEN block must be the trap. */
3853 trap = first_active_insn (bb);
3854 if (! (trap == BB_END (bb)
3855 && GET_CODE (PATTERN (trap)) == TRAP_IF
3856 && TRAP_CONDITION (PATTERN (trap)) == const_true_rtx))
3862 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
3863 transformable, but not necessarily the other. There need be no
3866 Return TRUE if we were successful at converting the block.
3868 Cases we'd like to look at:
3871 if (test) goto over; // x not live
3879 if (! test) goto label;
3882 if (test) goto E; // x not live
3896 (3) // This one's really only interesting for targets that can do
3897 // multiway branching, e.g. IA-64 BBB bundles. For other targets
3898 // it results in multiple branches on a cache line, which often
3899 // does not sit well with predictors.
3901 if (test1) goto E; // predicted not taken
3917 (A) Don't do (2) if the branch is predicted against the block we're
3918 eliminating. Do it anyway if we can eliminate a branch; this requires
3919 that the sole successor of the eliminated block postdominate the other
3922 (B) With CE, on (3) we can steal from both sides of the if, creating
3931 Again, this is most useful if J postdominates.
3933 (C) CE substitutes for helpful life information.
3935 (D) These heuristics need a lot of work. */
3937 /* Tests for case 1 above. */
3940 find_if_case_1 (basic_block test_bb, edge then_edge, edge else_edge)
3942 basic_block then_bb = then_edge->dest;
3943 basic_block else_bb = else_edge->dest;
3945 int then_bb_index, then_prob;
3946 rtx else_target = NULL_RTX;
3948 /* If we are partitioning hot/cold basic blocks, we don't want to
3949 mess up unconditional or indirect jumps that cross between hot
3952 Basic block partitioning may result in some jumps that appear to
3953 be optimizable (or blocks that appear to be mergeable), but which really
3954 must be left untouched (they are required to make it safely across
3955 partition boundaries). See the comments at the top of
3956 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
3958 if ((BB_END (then_bb)
3959 && JUMP_P (BB_END (then_bb))
3960 && CROSSING_JUMP_P (BB_END (then_bb)))
3961 || (BB_END (test_bb)
3962 && JUMP_P (BB_END (test_bb))
3963 && CROSSING_JUMP_P (BB_END (test_bb)))
3964 || (BB_END (else_bb)
3965 && JUMP_P (BB_END (else_bb))
3966 && CROSSING_JUMP_P (BB_END (else_bb))))
3969 /* THEN has one successor. */
3970 if (!single_succ_p (then_bb))
3973 /* THEN does not fall through, but is not strange either. */
3974 if (single_succ_edge (then_bb)->flags & (EDGE_COMPLEX | EDGE_FALLTHRU))
3977 /* THEN has one predecessor. */
3978 if (!single_pred_p (then_bb))
3981 /* THEN must do something. */
3982 if (forwarder_block_p (then_bb))
3985 num_possible_if_blocks++;
3988 "\nIF-CASE-1 found, start %d, then %d\n",
3989 test_bb->index, then_bb->index);
3991 if (then_edge->probability)
3992 then_prob = REG_BR_PROB_BASE - then_edge->probability;
3994 then_prob = REG_BR_PROB_BASE / 2;
3996 /* We're speculating from the THEN path, we want to make sure the cost
3997 of speculation is within reason. */
3998 if (! cheap_bb_rtx_cost_p (then_bb, then_prob,
3999 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge->src),
4000 predictable_edge_p (then_edge)))))
4003 if (else_bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
4005 rtx_insn *jump = BB_END (else_edge->src);
4006 gcc_assert (JUMP_P (jump));
4007 else_target = JUMP_LABEL (jump);
4010 /* Registers set are dead, or are predicable. */
4011 if (! dead_or_predicable (test_bb, then_bb, else_bb,
4012 single_succ_edge (then_bb), 1))
4015 /* Conversion went ok, including moving the insns and fixing up the
4016 jump. Adjust the CFG to match. */
4018 /* We can avoid creating a new basic block if then_bb is immediately
4019 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4020 through to else_bb. */
4022 if (then_bb->next_bb == else_bb
4023 && then_bb->prev_bb == test_bb
4024 && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
4026 redirect_edge_succ (FALLTHRU_EDGE (test_bb), else_bb);
4029 else if (else_bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
4030 new_bb = force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb),
4031 else_bb, else_target);
4033 new_bb = redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb),
4036 df_set_bb_dirty (test_bb);
4037 df_set_bb_dirty (else_bb);
4039 then_bb_index = then_bb->index;
4040 delete_basic_block (then_bb);
4042 /* Make rest of code believe that the newly created block is the THEN_BB
4043 block we removed. */
4046 df_bb_replace (then_bb_index, new_bb);
4047 /* This should have been done above via force_nonfallthru_and_redirect
4048 (possibly called from redirect_edge_and_branch_force). */
4049 gcc_checking_assert (BB_PARTITION (new_bb) == BB_PARTITION (test_bb));
4053 num_updated_if_blocks++;
4058 /* Test for case 2 above. */
4061 find_if_case_2 (basic_block test_bb, edge then_edge, edge else_edge)
4063 basic_block then_bb = then_edge->dest;
4064 basic_block else_bb = else_edge->dest;
4066 int then_prob, else_prob;
4068 /* We do not want to speculate (empty) loop latches. */
4070 && else_bb->loop_father->latch == else_bb)
4073 /* If we are partitioning hot/cold basic blocks, we don't want to
4074 mess up unconditional or indirect jumps that cross between hot
4077 Basic block partitioning may result in some jumps that appear to
4078 be optimizable (or blocks that appear to be mergeable), but which really
4079 must be left untouched (they are required to make it safely across
4080 partition boundaries). See the comments at the top of
4081 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4083 if ((BB_END (then_bb)
4084 && JUMP_P (BB_END (then_bb))
4085 && CROSSING_JUMP_P (BB_END (then_bb)))
4086 || (BB_END (test_bb)
4087 && JUMP_P (BB_END (test_bb))
4088 && CROSSING_JUMP_P (BB_END (test_bb)))
4089 || (BB_END (else_bb)
4090 && JUMP_P (BB_END (else_bb))
4091 && CROSSING_JUMP_P (BB_END (else_bb))))
4094 /* ELSE has one successor. */
4095 if (!single_succ_p (else_bb))
4098 else_succ = single_succ_edge (else_bb);
4100 /* ELSE outgoing edge is not complex. */
4101 if (else_succ->flags & EDGE_COMPLEX)
4104 /* ELSE has one predecessor. */
4105 if (!single_pred_p (else_bb))
4108 /* THEN is not EXIT. */
4109 if (then_bb->index < NUM_FIXED_BLOCKS)
4112 if (else_edge->probability)
4114 else_prob = else_edge->probability;
4115 then_prob = REG_BR_PROB_BASE - else_prob;
4119 else_prob = REG_BR_PROB_BASE / 2;
4120 then_prob = REG_BR_PROB_BASE / 2;
4123 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4124 if (else_prob > then_prob)
4126 else if (else_succ->dest->index < NUM_FIXED_BLOCKS
4127 || dominated_by_p (CDI_POST_DOMINATORS, then_bb,
4133 num_possible_if_blocks++;
4136 "\nIF-CASE-2 found, start %d, else %d\n",
4137 test_bb->index, else_bb->index);
4139 /* We're speculating from the ELSE path, we want to make sure the cost
4140 of speculation is within reason. */
4141 if (! cheap_bb_rtx_cost_p (else_bb, else_prob,
4142 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge->src),
4143 predictable_edge_p (else_edge)))))
4146 /* Registers set are dead, or are predicable. */
4147 if (! dead_or_predicable (test_bb, else_bb, then_bb, else_succ, 0))
4150 /* Conversion went ok, including moving the insns and fixing up the
4151 jump. Adjust the CFG to match. */
4153 df_set_bb_dirty (test_bb);
4154 df_set_bb_dirty (then_bb);
4155 delete_basic_block (else_bb);
4158 num_updated_if_blocks++;
4160 /* ??? We may now fallthru from one of THEN's successors into a join
4161 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4166 /* Used by the code above to perform the actual rtl transformations.
4167 Return TRUE if successful.
4169 TEST_BB is the block containing the conditional branch. MERGE_BB
4170 is the block containing the code to manipulate. DEST_EDGE is an
4171 edge representing a jump to the join block; after the conversion,
4172 TEST_BB should be branching to its destination.
4173 REVERSEP is true if the sense of the branch should be reversed. */
4176 dead_or_predicable (basic_block test_bb, basic_block merge_bb,
4177 basic_block other_bb, edge dest_edge, int reversep)
4179 basic_block new_dest = dest_edge->dest;
4180 rtx_insn *head, *end, *jump;
4181 rtx_insn *earliest = NULL;
4183 bitmap merge_set = NULL;
4184 /* Number of pending changes. */
4185 int n_validated_changes = 0;
4186 rtx new_dest_label = NULL_RTX;
4188 jump = BB_END (test_bb);
4190 /* Find the extent of the real code in the merge block. */
4191 head = BB_HEAD (merge_bb);
4192 end = BB_END (merge_bb);
4194 while (DEBUG_INSN_P (end) && end != head)
4195 end = PREV_INSN (end);
4197 /* If merge_bb ends with a tablejump, predicating/moving insn's
4198 into test_bb and then deleting merge_bb will result in the jumptable
4199 that follows merge_bb being removed along with merge_bb and then we
4200 get an unresolved reference to the jumptable. */
4201 if (tablejump_p (end, NULL, NULL))
4205 head = NEXT_INSN (head);
4206 while (DEBUG_INSN_P (head) && head != end)
4207 head = NEXT_INSN (head);
4215 head = NEXT_INSN (head);
4216 while (DEBUG_INSN_P (head) && head != end)
4217 head = NEXT_INSN (head);
4222 if (!onlyjump_p (end))
4229 end = PREV_INSN (end);
4230 while (DEBUG_INSN_P (end) && end != head)
4231 end = PREV_INSN (end);
4234 /* Don't move frame-related insn across the conditional branch. This
4235 can lead to one of the paths of the branch having wrong unwind info. */
4236 if (epilogue_completed)
4238 rtx_insn *insn = head;
4241 if (INSN_P (insn) && RTX_FRAME_RELATED_P (insn))
4245 insn = NEXT_INSN (insn);
4249 /* Disable handling dead code by conditional execution if the machine needs
4250 to do anything funny with the tests, etc. */
4251 #ifndef IFCVT_MODIFY_TESTS
4252 if (targetm.have_conditional_execution ())
4254 /* In the conditional execution case, we have things easy. We know
4255 the condition is reversible. We don't have to check life info
4256 because we're going to conditionally execute the code anyway.
4257 All that's left is making sure the insns involved can actually
4262 cond = cond_exec_get_condition (jump);
4266 rtx note = find_reg_note (jump, REG_BR_PROB, NULL_RTX);
4267 int prob_val = (note ? XINT (note, 0) : -1);
4271 enum rtx_code rev = reversed_comparison_code (cond, jump);
4274 cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0),
4277 prob_val = REG_BR_PROB_BASE - prob_val;
4280 if (cond_exec_process_insns (NULL, head, end, cond, prob_val, 0)
4281 && verify_changes (0))
4282 n_validated_changes = num_validated_changes ();
4290 /* If we allocated new pseudos (e.g. in the conditional move
4291 expander called from noce_emit_cmove), we must resize the
4293 if (max_regno < max_reg_num ())
4294 max_regno = max_reg_num ();
4296 /* Try the NCE path if the CE path did not result in any changes. */
4297 if (n_validated_changes == 0)
4304 /* In the non-conditional execution case, we have to verify that there
4305 are no trapping operations, no calls, no references to memory, and
4306 that any registers modified are dead at the branch site. */
4308 if (!any_condjump_p (jump))
4311 /* Find the extent of the conditional. */
4312 cond = noce_get_condition (jump, &earliest, false);
4316 live = BITMAP_ALLOC (®_obstack);
4317 simulate_backwards_to_point (merge_bb, live, end);
4318 success = can_move_insns_across (head, end, earliest, jump,
4320 df_get_live_in (other_bb), NULL);
4325 /* Collect the set of registers set in MERGE_BB. */
4326 merge_set = BITMAP_ALLOC (®_obstack);
4328 FOR_BB_INSNS (merge_bb, insn)
4329 if (NONDEBUG_INSN_P (insn))
4330 df_simulate_find_defs (insn, merge_set);
4332 /* If shrink-wrapping, disable this optimization when test_bb is
4333 the first basic block and merge_bb exits. The idea is to not
4334 move code setting up a return register as that may clobber a
4335 register used to pass function parameters, which then must be
4336 saved in caller-saved regs. A caller-saved reg requires the
4337 prologue, killing a shrink-wrap opportunity. */
4338 if ((SHRINK_WRAPPING_ENABLED && !epilogue_completed)
4339 && ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb == test_bb
4340 && single_succ_p (new_dest)
4341 && single_succ (new_dest) == EXIT_BLOCK_PTR_FOR_FN (cfun)
4342 && bitmap_intersect_p (df_get_live_in (new_dest), merge_set))
4347 return_regs = BITMAP_ALLOC (®_obstack);
4349 /* Start off with the intersection of regs used to pass
4350 params and regs used to return values. */
4351 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4352 if (FUNCTION_ARG_REGNO_P (i)
4353 && targetm.calls.function_value_regno_p (i))
4354 bitmap_set_bit (return_regs, INCOMING_REGNO (i));
4356 bitmap_and_into (return_regs,
4357 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun)));
4358 bitmap_and_into (return_regs,
4359 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun)));
4360 if (!bitmap_empty_p (return_regs))
4362 FOR_BB_INSNS_REVERSE (new_dest, insn)
4363 if (NONDEBUG_INSN_P (insn))
4367 /* If this insn sets any reg in return_regs, add all
4368 reg uses to the set of regs we're interested in. */
4369 FOR_EACH_INSN_DEF (def, insn)
4370 if (bitmap_bit_p (return_regs, DF_REF_REGNO (def)))
4372 df_simulate_uses (insn, return_regs);
4376 if (bitmap_intersect_p (merge_set, return_regs))
4378 BITMAP_FREE (return_regs);
4379 BITMAP_FREE (merge_set);
4383 BITMAP_FREE (return_regs);
4388 /* We don't want to use normal invert_jump or redirect_jump because
4389 we don't want to delete_insn called. Also, we want to do our own
4390 change group management. */
4392 old_dest = JUMP_LABEL (jump);
4393 if (other_bb != new_dest)
4395 if (!any_condjump_p (jump))
4398 if (JUMP_P (BB_END (dest_edge->src)))
4399 new_dest_label = JUMP_LABEL (BB_END (dest_edge->src));
4400 else if (new_dest == EXIT_BLOCK_PTR_FOR_FN (cfun))
4401 new_dest_label = ret_rtx;
4403 new_dest_label = block_label (new_dest);
4405 rtx_jump_insn *jump_insn = as_a <rtx_jump_insn *> (jump);
4407 ? ! invert_jump_1 (jump_insn, new_dest_label)
4408 : ! redirect_jump_1 (jump_insn, new_dest_label))
4412 if (verify_changes (n_validated_changes))
4413 confirm_change_group ();
4417 if (other_bb != new_dest)
4419 redirect_jump_2 (as_a <rtx_jump_insn *> (jump), old_dest, new_dest_label,
4422 redirect_edge_succ (BRANCH_EDGE (test_bb), new_dest);
4425 std::swap (BRANCH_EDGE (test_bb)->count,
4426 FALLTHRU_EDGE (test_bb)->count);
4427 std::swap (BRANCH_EDGE (test_bb)->probability,
4428 FALLTHRU_EDGE (test_bb)->probability);
4429 update_br_prob_note (test_bb);
4433 /* Move the insns out of MERGE_BB to before the branch. */
4438 if (end == BB_END (merge_bb))
4439 BB_END (merge_bb) = PREV_INSN (head);
4441 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
4442 notes being moved might become invalid. */
4448 if (! INSN_P (insn))
4450 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
4453 remove_note (insn, note);
4454 } while (insn != end && (insn = NEXT_INSN (insn)));
4456 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
4457 notes referring to the registers being set might become invalid. */
4463 EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi)
4464 remove_reg_equal_equiv_notes_for_regno (i);
4466 BITMAP_FREE (merge_set);
4469 reorder_insns (head, end, PREV_INSN (earliest));
4472 /* Remove the jump and edge if we can. */
4473 if (other_bb == new_dest)
4476 remove_edge (BRANCH_EDGE (test_bb));
4477 /* ??? Can't merge blocks here, as then_bb is still in use.
4478 At minimum, the merge will get done just before bb-reorder. */
4487 BITMAP_FREE (merge_set);
4492 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
4493 we are after combine pass. */
4496 if_convert (bool after_combine)
4503 df_live_add_problem ();
4504 df_live_set_all_dirty ();
4507 /* Record whether we are after combine pass. */
4508 ifcvt_after_combine = after_combine;
4509 num_possible_if_blocks = 0;
4510 num_updated_if_blocks = 0;
4511 num_true_changes = 0;
4513 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
4514 mark_loop_exit_edges ();
4515 loop_optimizer_finalize ();
4516 free_dominance_info (CDI_DOMINATORS);
4518 /* Compute postdominators. */
4519 calculate_dominance_info (CDI_POST_DOMINATORS);
4521 df_set_flags (DF_LR_RUN_DCE);
4523 /* Go through each of the basic blocks looking for things to convert. If we
4524 have conditional execution, we make multiple passes to allow us to handle
4525 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
4530 /* Only need to do dce on the first pass. */
4531 df_clear_flags (DF_LR_RUN_DCE);
4532 cond_exec_changed_p = FALSE;
4535 #ifdef IFCVT_MULTIPLE_DUMPS
4536 if (dump_file && pass > 1)
4537 fprintf (dump_file, "\n\n========== Pass %d ==========\n", pass);
4540 FOR_EACH_BB_FN (bb, cfun)
4543 while (!df_get_bb_dirty (bb)
4544 && (new_bb = find_if_header (bb, pass)) != NULL)
4548 #ifdef IFCVT_MULTIPLE_DUMPS
4549 if (dump_file && cond_exec_changed_p)
4550 print_rtl_with_bb (dump_file, get_insns (), dump_flags);
4553 while (cond_exec_changed_p);
4555 #ifdef IFCVT_MULTIPLE_DUMPS
4557 fprintf (dump_file, "\n\n========== no more changes\n");
4560 free_dominance_info (CDI_POST_DOMINATORS);
4565 clear_aux_for_blocks ();
4567 /* If we allocated new pseudos, we must resize the array for sched1. */
4568 if (max_regno < max_reg_num ())
4569 max_regno = max_reg_num ();
4571 /* Write the final stats. */
4572 if (dump_file && num_possible_if_blocks > 0)
4575 "\n%d possible IF blocks searched.\n",
4576 num_possible_if_blocks);
4578 "%d IF blocks converted.\n",
4579 num_updated_if_blocks);
4581 "%d true changes made.\n\n\n",
4586 df_remove_problem (df_live);
4588 #ifdef ENABLE_CHECKING
4589 verify_flow_info ();
4593 /* If-conversion and CFG cleanup. */
4595 rest_of_handle_if_conversion (void)
4597 if (flag_if_conversion)
4601 dump_reg_info (dump_file);
4602 dump_flow_info (dump_file, dump_flags);
4604 cleanup_cfg (CLEANUP_EXPENSIVE);
4614 const pass_data pass_data_rtl_ifcvt =
4616 RTL_PASS, /* type */
4618 OPTGROUP_NONE, /* optinfo_flags */
4619 TV_IFCVT, /* tv_id */
4620 0, /* properties_required */
4621 0, /* properties_provided */
4622 0, /* properties_destroyed */
4623 0, /* todo_flags_start */
4624 TODO_df_finish, /* todo_flags_finish */
4627 class pass_rtl_ifcvt : public rtl_opt_pass
4630 pass_rtl_ifcvt (gcc::context *ctxt)
4631 : rtl_opt_pass (pass_data_rtl_ifcvt, ctxt)
4634 /* opt_pass methods: */
4635 virtual bool gate (function *)
4637 return (optimize > 0) && dbg_cnt (if_conversion);
4640 virtual unsigned int execute (function *)
4642 return rest_of_handle_if_conversion ();
4645 }; // class pass_rtl_ifcvt
4650 make_pass_rtl_ifcvt (gcc::context *ctxt)
4652 return new pass_rtl_ifcvt (ctxt);
4656 /* Rerun if-conversion, as combine may have simplified things enough
4657 to now meet sequence length restrictions. */
4661 const pass_data pass_data_if_after_combine =
4663 RTL_PASS, /* type */
4665 OPTGROUP_NONE, /* optinfo_flags */
4666 TV_IFCVT, /* tv_id */
4667 0, /* properties_required */
4668 0, /* properties_provided */
4669 0, /* properties_destroyed */
4670 0, /* todo_flags_start */
4671 TODO_df_finish, /* todo_flags_finish */
4674 class pass_if_after_combine : public rtl_opt_pass
4677 pass_if_after_combine (gcc::context *ctxt)
4678 : rtl_opt_pass (pass_data_if_after_combine, ctxt)
4681 /* opt_pass methods: */
4682 virtual bool gate (function *)
4684 return optimize > 0 && flag_if_conversion
4685 && dbg_cnt (if_after_combine);
4688 virtual unsigned int execute (function *)
4694 }; // class pass_if_after_combine
4699 make_pass_if_after_combine (gcc::context *ctxt)
4701 return new pass_if_after_combine (ctxt);
4707 const pass_data pass_data_if_after_reload =
4709 RTL_PASS, /* type */
4711 OPTGROUP_NONE, /* optinfo_flags */
4712 TV_IFCVT2, /* tv_id */
4713 0, /* properties_required */
4714 0, /* properties_provided */
4715 0, /* properties_destroyed */
4716 0, /* todo_flags_start */
4717 TODO_df_finish, /* todo_flags_finish */
4720 class pass_if_after_reload : public rtl_opt_pass
4723 pass_if_after_reload (gcc::context *ctxt)
4724 : rtl_opt_pass (pass_data_if_after_reload, ctxt)
4727 /* opt_pass methods: */
4728 virtual bool gate (function *)
4730 return optimize > 0 && flag_if_conversion2
4731 && dbg_cnt (if_after_reload);
4734 virtual unsigned int execute (function *)
4740 }; // class pass_if_after_reload
4745 make_pass_if_after_reload (gcc::context *ctxt)
4747 return new pass_if_after_reload (ctxt);