1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "cfgcleanup.h"
42 #include "tree-pass.h"
44 #include "shrink-wrap.h"
48 #ifndef MAX_CONDITIONAL_EXECUTE
49 #define MAX_CONDITIONAL_EXECUTE \
50 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
54 #define IFCVT_MULTIPLE_DUMPS 1
56 #define NULL_BLOCK ((basic_block) NULL)
58 /* True if after combine pass. */
59 static bool ifcvt_after_combine;
61 /* True if the target has the cbranchcc4 optab. */
62 static bool have_cbranchcc4;
64 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
65 static int num_possible_if_blocks;
67 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
69 static int num_updated_if_blocks;
71 /* # of changes made. */
72 static int num_true_changes;
74 /* Whether conditional execution changes were made. */
75 static int cond_exec_changed_p;
77 /* Forward references. */
78 static int count_bb_insns (const_basic_block);
79 static bool cheap_bb_rtx_cost_p (const_basic_block, int, int);
80 static rtx_insn *first_active_insn (basic_block);
81 static rtx_insn *last_active_insn (basic_block, int);
82 static rtx_insn *find_active_insn_before (basic_block, rtx_insn *);
83 static rtx_insn *find_active_insn_after (basic_block, rtx_insn *);
84 static basic_block block_fallthru (basic_block);
85 static int cond_exec_process_insns (ce_if_block *, rtx_insn *, rtx, rtx, int,
87 static rtx cond_exec_get_condition (rtx_insn *);
88 static rtx noce_get_condition (rtx_insn *, rtx_insn **, bool);
89 static int noce_operand_ok (const_rtx);
90 static void merge_if_block (ce_if_block *);
91 static int find_cond_trap (basic_block, edge, edge);
92 static basic_block find_if_header (basic_block, int);
93 static int block_jumps_and_fallthru_p (basic_block, basic_block);
94 static int noce_find_if_block (basic_block, edge, edge, int);
95 static int cond_exec_find_if_block (ce_if_block *);
96 static int find_if_case_1 (basic_block, edge, edge);
97 static int find_if_case_2 (basic_block, edge, edge);
98 static int dead_or_predicable (basic_block, basic_block, basic_block,
100 static void noce_emit_move_insn (rtx, rtx);
101 static rtx_insn *block_has_only_trap (basic_block);
103 /* Count the number of non-jump active insns in BB. */
106 count_bb_insns (const_basic_block bb)
109 rtx_insn *insn = BB_HEAD (bb);
113 if (active_insn_p (insn) && !JUMP_P (insn))
116 if (insn == BB_END (bb))
118 insn = NEXT_INSN (insn);
124 /* Determine whether the total insn_rtx_cost on non-jump insns in
125 basic block BB is less than MAX_COST. This function returns
126 false if the cost of any instruction could not be estimated.
128 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
129 as those insns are being speculated. MAX_COST is scaled with SCALE
130 plus a small fudge factor. */
133 cheap_bb_rtx_cost_p (const_basic_block bb, int scale, int max_cost)
136 rtx_insn *insn = BB_HEAD (bb);
137 bool speed = optimize_bb_for_speed_p (bb);
139 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
140 applied to insn_rtx_cost when optimizing for size. Only do
141 this after combine because if-conversion might interfere with
142 passes before combine.
144 Use optimize_function_for_speed_p instead of the pre-defined
145 variable speed to make sure it is set to same value for all
146 basic blocks in one if-conversion transformation. */
147 if (!optimize_function_for_speed_p (cfun) && ifcvt_after_combine)
148 scale = REG_BR_PROB_BASE;
149 /* Our branch probability/scaling factors are just estimates and don't
150 account for cases where we can get speculation for free and other
151 secondary benefits. So we fudge the scale factor to make speculating
152 appear a little more profitable when optimizing for performance. */
154 scale += REG_BR_PROB_BASE / 8;
161 if (NONJUMP_INSN_P (insn))
163 int cost = insn_rtx_cost (PATTERN (insn), speed) * REG_BR_PROB_BASE;
167 /* If this instruction is the load or set of a "stack" register,
168 such as a floating point register on x87, then the cost of
169 speculatively executing this insn may need to include
170 the additional cost of popping its result off of the
171 register stack. Unfortunately, correctly recognizing and
172 accounting for this additional overhead is tricky, so for
173 now we simply prohibit such speculative execution. */
176 rtx set = single_set (insn);
177 if (set && STACK_REG_P (SET_DEST (set)))
183 if (count >= max_cost)
186 else if (CALL_P (insn))
189 if (insn == BB_END (bb))
191 insn = NEXT_INSN (insn);
197 /* Return the first non-jump active insn in the basic block. */
200 first_active_insn (basic_block bb)
202 rtx_insn *insn = BB_HEAD (bb);
206 if (insn == BB_END (bb))
208 insn = NEXT_INSN (insn);
211 while (NOTE_P (insn) || DEBUG_INSN_P (insn))
213 if (insn == BB_END (bb))
215 insn = NEXT_INSN (insn);
224 /* Return the last non-jump active (non-jump) insn in the basic block. */
227 last_active_insn (basic_block bb, int skip_use_p)
229 rtx_insn *insn = BB_END (bb);
230 rtx_insn *head = BB_HEAD (bb);
234 || DEBUG_INSN_P (insn)
236 && NONJUMP_INSN_P (insn)
237 && GET_CODE (PATTERN (insn)) == USE))
241 insn = PREV_INSN (insn);
250 /* Return the active insn before INSN inside basic block CURR_BB. */
253 find_active_insn_before (basic_block curr_bb, rtx_insn *insn)
255 if (!insn || insn == BB_HEAD (curr_bb))
258 while ((insn = PREV_INSN (insn)) != NULL_RTX)
260 if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn))
263 /* No other active insn all the way to the start of the basic block. */
264 if (insn == BB_HEAD (curr_bb))
271 /* Return the active insn after INSN inside basic block CURR_BB. */
274 find_active_insn_after (basic_block curr_bb, rtx_insn *insn)
276 if (!insn || insn == BB_END (curr_bb))
279 while ((insn = NEXT_INSN (insn)) != NULL_RTX)
281 if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn))
284 /* No other active insn all the way to the end of the basic block. */
285 if (insn == BB_END (curr_bb))
292 /* Return the basic block reached by falling though the basic block BB. */
295 block_fallthru (basic_block bb)
297 edge e = find_fallthru_edge (bb->succs);
299 return (e) ? e->dest : NULL_BLOCK;
302 /* Return true if RTXs A and B can be safely interchanged. */
305 rtx_interchangeable_p (const_rtx a, const_rtx b)
307 if (!rtx_equal_p (a, b))
310 if (GET_CODE (a) != MEM)
313 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
314 reference is not. Interchanging a dead type-unsafe memory reference with
315 a live type-safe one creates a live type-unsafe memory reference, in other
316 words, it makes the program illegal.
317 We check here conservatively whether the two memory references have equal
318 memory attributes. */
320 return mem_attrs_eq_p (get_mem_attrs (a), get_mem_attrs (b));
324 /* Go through a bunch of insns, converting them to conditional
325 execution format if possible. Return TRUE if all of the non-note
326 insns were processed. */
329 cond_exec_process_insns (ce_if_block *ce_info ATTRIBUTE_UNUSED,
330 /* if block information */rtx_insn *start,
331 /* first insn to look at */rtx end,
332 /* last insn to look at */rtx test,
333 /* conditional execution test */int prob_val,
334 /* probability of branch taken. */int mod_ok)
336 int must_be_last = FALSE;
344 for (insn = start; ; insn = NEXT_INSN (insn))
346 /* dwarf2out can't cope with conditional prologues. */
347 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_PROLOGUE_END)
350 if (NOTE_P (insn) || DEBUG_INSN_P (insn))
353 gcc_assert (NONJUMP_INSN_P (insn) || CALL_P (insn));
355 /* dwarf2out can't cope with conditional unwind info. */
356 if (RTX_FRAME_RELATED_P (insn))
359 /* Remove USE insns that get in the way. */
360 if (reload_completed && GET_CODE (PATTERN (insn)) == USE)
362 /* ??? Ug. Actually unlinking the thing is problematic,
363 given what we'd have to coordinate with our callers. */
364 SET_INSN_DELETED (insn);
368 /* Last insn wasn't last? */
372 if (modified_in_p (test, insn))
379 /* Now build the conditional form of the instruction. */
380 pattern = PATTERN (insn);
381 xtest = copy_rtx (test);
383 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
385 if (GET_CODE (pattern) == COND_EXEC)
387 if (GET_MODE (xtest) != GET_MODE (COND_EXEC_TEST (pattern)))
390 xtest = gen_rtx_AND (GET_MODE (xtest), xtest,
391 COND_EXEC_TEST (pattern));
392 pattern = COND_EXEC_CODE (pattern);
395 pattern = gen_rtx_COND_EXEC (VOIDmode, xtest, pattern);
397 /* If the machine needs to modify the insn being conditionally executed,
398 say for example to force a constant integer operand into a temp
399 register, do so here. */
400 #ifdef IFCVT_MODIFY_INSN
401 IFCVT_MODIFY_INSN (ce_info, pattern, insn);
406 validate_change (insn, &PATTERN (insn), pattern, 1);
408 if (CALL_P (insn) && prob_val >= 0)
409 validate_change (insn, ®_NOTES (insn),
410 gen_rtx_INT_LIST ((machine_mode) REG_BR_PROB,
411 prob_val, REG_NOTES (insn)), 1);
421 /* Return the condition for a jump. Do not do any special processing. */
424 cond_exec_get_condition (rtx_insn *jump)
428 if (any_condjump_p (jump))
429 test_if = SET_SRC (pc_set (jump));
432 cond = XEXP (test_if, 0);
434 /* If this branches to JUMP_LABEL when the condition is false,
435 reverse the condition. */
436 if (GET_CODE (XEXP (test_if, 2)) == LABEL_REF
437 && LABEL_REF_LABEL (XEXP (test_if, 2)) == JUMP_LABEL (jump))
439 enum rtx_code rev = reversed_comparison_code (cond, jump);
443 cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0),
450 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
451 to conditional execution. Return TRUE if we were successful at
452 converting the block. */
455 cond_exec_process_if_block (ce_if_block * ce_info,
456 /* if block information */int do_multiple_p)
458 basic_block test_bb = ce_info->test_bb; /* last test block */
459 basic_block then_bb = ce_info->then_bb; /* THEN */
460 basic_block else_bb = ce_info->else_bb; /* ELSE or NULL */
461 rtx test_expr; /* expression in IF_THEN_ELSE that is tested */
462 rtx_insn *then_start; /* first insn in THEN block */
463 rtx_insn *then_end; /* last insn + 1 in THEN block */
464 rtx_insn *else_start = NULL; /* first insn in ELSE block or NULL */
465 rtx_insn *else_end = NULL; /* last insn + 1 in ELSE block */
466 int max; /* max # of insns to convert. */
467 int then_mod_ok; /* whether conditional mods are ok in THEN */
468 rtx true_expr; /* test for else block insns */
469 rtx false_expr; /* test for then block insns */
470 int true_prob_val; /* probability of else block */
471 int false_prob_val; /* probability of then block */
472 rtx_insn *then_last_head = NULL; /* Last match at the head of THEN */
473 rtx_insn *else_last_head = NULL; /* Last match at the head of ELSE */
474 rtx_insn *then_first_tail = NULL; /* First match at the tail of THEN */
475 rtx_insn *else_first_tail = NULL; /* First match at the tail of ELSE */
476 int then_n_insns, else_n_insns, n_insns;
477 enum rtx_code false_code;
480 /* If test is comprised of && or || elements, and we've failed at handling
481 all of them together, just use the last test if it is the special case of
482 && elements without an ELSE block. */
483 if (!do_multiple_p && ce_info->num_multiple_test_blocks)
485 if (else_bb || ! ce_info->and_and_p)
488 ce_info->test_bb = test_bb = ce_info->last_test_bb;
489 ce_info->num_multiple_test_blocks = 0;
490 ce_info->num_and_and_blocks = 0;
491 ce_info->num_or_or_blocks = 0;
494 /* Find the conditional jump to the ELSE or JOIN part, and isolate
496 test_expr = cond_exec_get_condition (BB_END (test_bb));
500 /* If the conditional jump is more than just a conditional jump,
501 then we can not do conditional execution conversion on this block. */
502 if (! onlyjump_p (BB_END (test_bb)))
505 /* Collect the bounds of where we're to search, skipping any labels, jumps
506 and notes at the beginning and end of the block. Then count the total
507 number of insns and see if it is small enough to convert. */
508 then_start = first_active_insn (then_bb);
509 then_end = last_active_insn (then_bb, TRUE);
510 then_n_insns = ce_info->num_then_insns = count_bb_insns (then_bb);
511 n_insns = then_n_insns;
512 max = MAX_CONDITIONAL_EXECUTE;
519 else_start = first_active_insn (else_bb);
520 else_end = last_active_insn (else_bb, TRUE);
521 else_n_insns = ce_info->num_else_insns = count_bb_insns (else_bb);
522 n_insns += else_n_insns;
524 /* Look for matching sequences at the head and tail of the two blocks,
525 and limit the range of insns to be converted if possible. */
526 n_matching = flow_find_cross_jump (then_bb, else_bb,
527 &then_first_tail, &else_first_tail,
529 if (then_first_tail == BB_HEAD (then_bb))
530 then_start = then_end = NULL;
531 if (else_first_tail == BB_HEAD (else_bb))
532 else_start = else_end = NULL;
537 then_end = find_active_insn_before (then_bb, then_first_tail);
539 else_end = find_active_insn_before (else_bb, else_first_tail);
540 n_insns -= 2 * n_matching;
545 && then_n_insns > n_matching
546 && else_n_insns > n_matching)
548 int longest_match = MIN (then_n_insns - n_matching,
549 else_n_insns - n_matching);
551 = flow_find_head_matching_sequence (then_bb, else_bb,
560 /* We won't pass the insns in the head sequence to
561 cond_exec_process_insns, so we need to test them here
562 to make sure that they don't clobber the condition. */
563 for (insn = BB_HEAD (then_bb);
564 insn != NEXT_INSN (then_last_head);
565 insn = NEXT_INSN (insn))
566 if (!LABEL_P (insn) && !NOTE_P (insn)
567 && !DEBUG_INSN_P (insn)
568 && modified_in_p (test_expr, insn))
572 if (then_last_head == then_end)
573 then_start = then_end = NULL;
574 if (else_last_head == else_end)
575 else_start = else_end = NULL;
580 then_start = find_active_insn_after (then_bb, then_last_head);
582 else_start = find_active_insn_after (else_bb, else_last_head);
583 n_insns -= 2 * n_matching;
591 /* Map test_expr/test_jump into the appropriate MD tests to use on
592 the conditionally executed code. */
594 true_expr = test_expr;
596 false_code = reversed_comparison_code (true_expr, BB_END (test_bb));
597 if (false_code != UNKNOWN)
598 false_expr = gen_rtx_fmt_ee (false_code, GET_MODE (true_expr),
599 XEXP (true_expr, 0), XEXP (true_expr, 1));
601 false_expr = NULL_RTX;
603 #ifdef IFCVT_MODIFY_TESTS
604 /* If the machine description needs to modify the tests, such as setting a
605 conditional execution register from a comparison, it can do so here. */
606 IFCVT_MODIFY_TESTS (ce_info, true_expr, false_expr);
608 /* See if the conversion failed. */
609 if (!true_expr || !false_expr)
613 note = find_reg_note (BB_END (test_bb), REG_BR_PROB, NULL_RTX);
616 true_prob_val = XINT (note, 0);
617 false_prob_val = REG_BR_PROB_BASE - true_prob_val;
625 /* If we have && or || tests, do them here. These tests are in the adjacent
626 blocks after the first block containing the test. */
627 if (ce_info->num_multiple_test_blocks > 0)
629 basic_block bb = test_bb;
630 basic_block last_test_bb = ce_info->last_test_bb;
637 rtx_insn *start, *end;
639 enum rtx_code f_code;
641 bb = block_fallthru (bb);
642 start = first_active_insn (bb);
643 end = last_active_insn (bb, TRUE);
645 && ! cond_exec_process_insns (ce_info, start, end, false_expr,
646 false_prob_val, FALSE))
649 /* If the conditional jump is more than just a conditional jump, then
650 we can not do conditional execution conversion on this block. */
651 if (! onlyjump_p (BB_END (bb)))
654 /* Find the conditional jump and isolate the test. */
655 t = cond_exec_get_condition (BB_END (bb));
659 f_code = reversed_comparison_code (t, BB_END (bb));
660 if (f_code == UNKNOWN)
663 f = gen_rtx_fmt_ee (f_code, GET_MODE (t), XEXP (t, 0), XEXP (t, 1));
664 if (ce_info->and_and_p)
666 t = gen_rtx_AND (GET_MODE (t), true_expr, t);
667 f = gen_rtx_IOR (GET_MODE (t), false_expr, f);
671 t = gen_rtx_IOR (GET_MODE (t), true_expr, t);
672 f = gen_rtx_AND (GET_MODE (t), false_expr, f);
675 /* If the machine description needs to modify the tests, such as
676 setting a conditional execution register from a comparison, it can
678 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
679 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info, bb, t, f);
681 /* See if the conversion failed. */
689 while (bb != last_test_bb);
692 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
693 on then THEN block. */
694 then_mod_ok = (else_bb == NULL_BLOCK);
696 /* Go through the THEN and ELSE blocks converting the insns if possible
697 to conditional execution. */
701 || ! cond_exec_process_insns (ce_info, then_start, then_end,
702 false_expr, false_prob_val,
706 if (else_bb && else_end
707 && ! cond_exec_process_insns (ce_info, else_start, else_end,
708 true_expr, true_prob_val, TRUE))
711 /* If we cannot apply the changes, fail. Do not go through the normal fail
712 processing, since apply_change_group will call cancel_changes. */
713 if (! apply_change_group ())
715 #ifdef IFCVT_MODIFY_CANCEL
716 /* Cancel any machine dependent changes. */
717 IFCVT_MODIFY_CANCEL (ce_info);
722 #ifdef IFCVT_MODIFY_FINAL
723 /* Do any machine dependent final modifications. */
724 IFCVT_MODIFY_FINAL (ce_info);
727 /* Conversion succeeded. */
729 fprintf (dump_file, "%d insn%s converted to conditional execution.\n",
730 n_insns, (n_insns == 1) ? " was" : "s were");
732 /* Merge the blocks! If we had matching sequences, make sure to delete one
733 copy at the appropriate location first: delete the copy in the THEN branch
734 for a tail sequence so that the remaining one is executed last for both
735 branches, and delete the copy in the ELSE branch for a head sequence so
736 that the remaining one is executed first for both branches. */
739 rtx_insn *from = then_first_tail;
741 from = find_active_insn_after (then_bb, from);
742 delete_insn_chain (from, BB_END (then_bb), false);
745 delete_insn_chain (first_active_insn (else_bb), else_last_head, false);
747 merge_if_block (ce_info);
748 cond_exec_changed_p = TRUE;
752 #ifdef IFCVT_MODIFY_CANCEL
753 /* Cancel any machine dependent changes. */
754 IFCVT_MODIFY_CANCEL (ce_info);
761 /* Used by noce_process_if_block to communicate with its subroutines.
763 The subroutines know that A and B may be evaluated freely. They
764 know that X is a register. They should insert new instructions
765 before cond_earliest. */
769 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
770 basic_block test_bb, then_bb, else_bb, join_bb;
772 /* The jump that ends TEST_BB. */
775 /* The jump condition. */
778 /* New insns should be inserted before this one. */
779 rtx_insn *cond_earliest;
781 /* Insns in the THEN and ELSE block. There is always just this
782 one insns in those blocks. The insns are single_set insns.
783 If there was no ELSE block, INSN_B is the last insn before
784 COND_EARLIEST, or NULL_RTX. In the former case, the insn
785 operands are still valid, as if INSN_B was moved down below
787 rtx_insn *insn_a, *insn_b;
789 /* The SET_SRC of INSN_A and INSN_B. */
792 /* The SET_DEST of INSN_A. */
795 /* True if this if block is not canonical. In the canonical form of
796 if blocks, the THEN_BB is the block reached via the fallthru edge
797 from TEST_BB. For the noce transformations, we allow the symmetric
799 bool then_else_reversed;
801 /* True if the contents of then_bb and else_bb are a
802 simple single set instruction. */
806 /* The total rtx cost of the instructions in then_bb and else_bb. */
807 unsigned int then_cost;
808 unsigned int else_cost;
810 /* Estimated cost of the particular branch instruction. */
811 unsigned int branch_cost;
814 static rtx noce_emit_store_flag (struct noce_if_info *, rtx, int, int);
815 static int noce_try_move (struct noce_if_info *);
816 static int noce_try_store_flag (struct noce_if_info *);
817 static int noce_try_addcc (struct noce_if_info *);
818 static int noce_try_store_flag_constants (struct noce_if_info *);
819 static int noce_try_store_flag_mask (struct noce_if_info *);
820 static rtx noce_emit_cmove (struct noce_if_info *, rtx, enum rtx_code, rtx,
822 static int noce_try_cmove (struct noce_if_info *);
823 static int noce_try_cmove_arith (struct noce_if_info *);
824 static rtx noce_get_alt_condition (struct noce_if_info *, rtx, rtx_insn **);
825 static int noce_try_minmax (struct noce_if_info *);
826 static int noce_try_abs (struct noce_if_info *);
827 static int noce_try_sign_mask (struct noce_if_info *);
829 /* Helper function for noce_try_store_flag*. */
832 noce_emit_store_flag (struct noce_if_info *if_info, rtx x, int reversep,
835 rtx cond = if_info->cond;
839 cond_complex = (! general_operand (XEXP (cond, 0), VOIDmode)
840 || ! general_operand (XEXP (cond, 1), VOIDmode));
842 /* If earliest == jump, or when the condition is complex, try to
843 build the store_flag insn directly. */
847 rtx set = pc_set (if_info->jump);
848 cond = XEXP (SET_SRC (set), 0);
849 if (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
850 && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump))
851 reversep = !reversep;
852 if (if_info->then_else_reversed)
853 reversep = !reversep;
857 code = reversed_comparison_code (cond, if_info->jump);
859 code = GET_CODE (cond);
861 if ((if_info->cond_earliest == if_info->jump || cond_complex)
862 && (normalize == 0 || STORE_FLAG_VALUE == normalize))
864 rtx src = gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (cond, 0),
866 rtx set = gen_rtx_SET (x, src);
869 rtx_insn *insn = emit_insn (set);
871 if (recog_memoized (insn) >= 0)
873 rtx_insn *seq = get_insns ();
877 if_info->cond_earliest = if_info->jump;
885 /* Don't even try if the comparison operands or the mode of X are weird. */
886 if (cond_complex || !SCALAR_INT_MODE_P (GET_MODE (x)))
889 return emit_store_flag (x, code, XEXP (cond, 0),
890 XEXP (cond, 1), VOIDmode,
891 (code == LTU || code == LEU
892 || code == GEU || code == GTU), normalize);
895 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
896 X is the destination/target and Y is the value to copy. */
899 noce_emit_move_insn (rtx x, rtx y)
901 machine_mode outmode;
905 if (GET_CODE (x) != STRICT_LOW_PART)
907 rtx_insn *seq, *insn;
912 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
913 otherwise construct a suitable SET pattern ourselves. */
914 insn = (OBJECT_P (y) || CONSTANT_P (y) || GET_CODE (y) == SUBREG)
915 ? emit_move_insn (x, y)
916 : emit_insn (gen_rtx_SET (x, y));
920 if (recog_memoized (insn) <= 0)
922 if (GET_CODE (x) == ZERO_EXTRACT)
924 rtx op = XEXP (x, 0);
925 unsigned HOST_WIDE_INT size = INTVAL (XEXP (x, 1));
926 unsigned HOST_WIDE_INT start = INTVAL (XEXP (x, 2));
928 /* store_bit_field expects START to be relative to
929 BYTES_BIG_ENDIAN and adjusts this value for machines with
930 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
931 invoke store_bit_field again it is necessary to have the START
932 value from the first call. */
933 if (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
936 start = BITS_PER_UNIT - start - size;
939 gcc_assert (REG_P (op));
940 start = BITS_PER_WORD - start - size;
944 gcc_assert (start < (MEM_P (op) ? BITS_PER_UNIT : BITS_PER_WORD));
945 store_bit_field (op, size, start, 0, 0, GET_MODE (x), y, false);
949 switch (GET_RTX_CLASS (GET_CODE (y)))
952 ot = code_to_optab (GET_CODE (y));
956 target = expand_unop (GET_MODE (y), ot, XEXP (y, 0), x, 0);
957 if (target != NULL_RTX)
960 emit_move_insn (x, target);
969 ot = code_to_optab (GET_CODE (y));
973 target = expand_binop (GET_MODE (y), ot,
974 XEXP (y, 0), XEXP (y, 1),
976 if (target != NULL_RTX)
979 emit_move_insn (x, target);
996 inner = XEXP (outer, 0);
997 outmode = GET_MODE (outer);
998 bitpos = SUBREG_BYTE (outer) * BITS_PER_UNIT;
999 store_bit_field (inner, GET_MODE_BITSIZE (outmode), bitpos,
1000 0, 0, outmode, y, false);
1003 /* Return the CC reg if it is used in COND. */
1006 cc_in_cond (rtx cond)
1008 if (have_cbranchcc4 && cond
1009 && GET_MODE_CLASS (GET_MODE (XEXP (cond, 0))) == MODE_CC)
1010 return XEXP (cond, 0);
1015 /* Return sequence of instructions generated by if conversion. This
1016 function calls end_sequence() to end the current stream, ensures
1017 that the instructions are unshared, recognizable non-jump insns.
1018 On failure, this function returns a NULL_RTX. */
1021 end_ifcvt_sequence (struct noce_if_info *if_info)
1024 rtx_insn *seq = get_insns ();
1025 rtx cc = cc_in_cond (if_info->cond);
1027 set_used_flags (if_info->x);
1028 set_used_flags (if_info->cond);
1029 set_used_flags (if_info->a);
1030 set_used_flags (if_info->b);
1032 for (insn = seq; insn; insn = NEXT_INSN (insn))
1033 set_used_flags (insn);
1035 unshare_all_rtl_in_chain (seq);
1038 /* Make sure that all of the instructions emitted are recognizable,
1039 and that we haven't introduced a new jump instruction.
1040 As an exercise for the reader, build a general mechanism that
1041 allows proper placement of required clobbers. */
1042 for (insn = seq; insn; insn = NEXT_INSN (insn))
1044 || recog_memoized (insn) == -1
1045 /* Make sure new generated code does not clobber CC. */
1046 || (cc && set_of (cc, insn)))
1052 /* Return true iff the then and else basic block (if it exists)
1053 consist of a single simple set instruction. */
1056 noce_simple_bbs (struct noce_if_info *if_info)
1058 if (!if_info->then_simple)
1061 if (if_info->else_bb)
1062 return if_info->else_simple;
1067 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1068 "if (a == b) x = a; else x = b" into "x = b". */
1071 noce_try_move (struct noce_if_info *if_info)
1073 rtx cond = if_info->cond;
1074 enum rtx_code code = GET_CODE (cond);
1078 if (code != NE && code != EQ)
1081 if (!noce_simple_bbs (if_info))
1084 /* This optimization isn't valid if either A or B could be a NaN
1085 or a signed zero. */
1086 if (HONOR_NANS (if_info->x)
1087 || HONOR_SIGNED_ZEROS (if_info->x))
1090 /* Check whether the operands of the comparison are A and in
1092 if ((rtx_equal_p (if_info->a, XEXP (cond, 0))
1093 && rtx_equal_p (if_info->b, XEXP (cond, 1)))
1094 || (rtx_equal_p (if_info->a, XEXP (cond, 1))
1095 && rtx_equal_p (if_info->b, XEXP (cond, 0))))
1097 if (!rtx_interchangeable_p (if_info->a, if_info->b))
1100 y = (code == EQ) ? if_info->a : if_info->b;
1102 /* Avoid generating the move if the source is the destination. */
1103 if (! rtx_equal_p (if_info->x, y))
1106 noce_emit_move_insn (if_info->x, y);
1107 seq = end_ifcvt_sequence (if_info);
1111 emit_insn_before_setloc (seq, if_info->jump,
1112 INSN_LOCATION (if_info->insn_a));
1119 /* Convert "if (test) x = 1; else x = 0".
1121 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1122 tried in noce_try_store_flag_constants after noce_try_cmove has had
1123 a go at the conversion. */
1126 noce_try_store_flag (struct noce_if_info *if_info)
1132 if (!noce_simple_bbs (if_info))
1135 if (CONST_INT_P (if_info->b)
1136 && INTVAL (if_info->b) == STORE_FLAG_VALUE
1137 && if_info->a == const0_rtx)
1139 else if (if_info->b == const0_rtx
1140 && CONST_INT_P (if_info->a)
1141 && INTVAL (if_info->a) == STORE_FLAG_VALUE
1142 && (reversed_comparison_code (if_info->cond, if_info->jump)
1150 target = noce_emit_store_flag (if_info, if_info->x, reversep, 0);
1153 if (target != if_info->x)
1154 noce_emit_move_insn (if_info->x, target);
1156 seq = end_ifcvt_sequence (if_info);
1160 emit_insn_before_setloc (seq, if_info->jump,
1161 INSN_LOCATION (if_info->insn_a));
1172 /* Convert "if (test) x = -A; else x = A" into
1173 x = A; if (test) x = -x if the machine can do the
1174 conditional negate form of this cheaply.
1175 Try this before noce_try_cmove that will just load the
1176 immediates into two registers and do a conditional select
1177 between them. If the target has a conditional negate or
1178 conditional invert operation we can save a potentially
1179 expensive constant synthesis. */
1182 noce_try_inverse_constants (struct noce_if_info *if_info)
1184 if (!noce_simple_bbs (if_info))
1187 if (!CONST_INT_P (if_info->a)
1188 || !CONST_INT_P (if_info->b)
1189 || !REG_P (if_info->x))
1192 machine_mode mode = GET_MODE (if_info->x);
1194 HOST_WIDE_INT val_a = INTVAL (if_info->a);
1195 HOST_WIDE_INT val_b = INTVAL (if_info->b);
1197 rtx cond = if_info->cond;
1205 if (val_b != HOST_WIDE_INT_MIN && val_a == -val_b)
1207 else if (val_a == ~val_b)
1215 rtx tmp = gen_reg_rtx (mode);
1216 noce_emit_move_insn (tmp, if_info->a);
1218 target = emit_conditional_neg_or_complement (x, code, mode, cond, tmp, tmp);
1222 rtx_insn *seq = get_insns ();
1230 if (target != if_info->x)
1231 noce_emit_move_insn (if_info->x, target);
1233 seq = end_ifcvt_sequence (if_info);
1238 emit_insn_before_setloc (seq, if_info->jump,
1239 INSN_LOCATION (if_info->insn_a));
1248 /* Convert "if (test) x = a; else x = b", for A and B constant.
1249 Also allow A = y + c1, B = y + c2, with a common y between A
1253 noce_try_store_flag_constants (struct noce_if_info *if_info)
1258 HOST_WIDE_INT itrue, ifalse, diff, tmp;
1261 machine_mode mode = GET_MODE (if_info->x);;
1262 rtx common = NULL_RTX;
1267 /* Handle cases like x := test ? y + 3 : y + 4. */
1268 if (GET_CODE (a) == PLUS
1269 && GET_CODE (b) == PLUS
1270 && CONST_INT_P (XEXP (a, 1))
1271 && CONST_INT_P (XEXP (b, 1))
1272 && rtx_equal_p (XEXP (a, 0), XEXP (b, 0))
1273 && noce_operand_ok (XEXP (a, 0))
1274 && if_info->branch_cost >= 2)
1276 common = XEXP (a, 0);
1281 if (!noce_simple_bbs (if_info))
1287 ifalse = INTVAL (a);
1289 bool subtract_flag_p = false;
1291 diff = (unsigned HOST_WIDE_INT) itrue - ifalse;
1292 /* Make sure we can represent the difference between the two values. */
1294 != ((ifalse < 0) != (itrue < 0) ? ifalse < 0 : ifalse < itrue))
1297 diff = trunc_int_for_mode (diff, mode);
1299 can_reverse = (reversed_comparison_code (if_info->cond, if_info->jump)
1303 if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE)
1306 /* We could collapse these cases but it is easier to follow the
1307 diff/STORE_FLAG_VALUE combinations when they are listed
1311 => 4 + (test != 0). */
1312 if (diff < 0 && STORE_FLAG_VALUE < 0)
1315 => can_reverse | 4 + (test == 0)
1316 !can_reverse | 3 - (test != 0). */
1317 else if (diff > 0 && STORE_FLAG_VALUE < 0)
1319 reversep = can_reverse;
1320 subtract_flag_p = !can_reverse;
1321 /* If we need to subtract the flag and we have PLUS-immediate
1322 A and B then it is unlikely to be beneficial to play tricks
1324 if (subtract_flag_p && common)
1328 => can_reverse | 3 + (test == 0)
1329 !can_reverse | 4 - (test != 0). */
1330 else if (diff < 0 && STORE_FLAG_VALUE > 0)
1332 reversep = can_reverse;
1333 subtract_flag_p = !can_reverse;
1334 /* If we need to subtract the flag and we have PLUS-immediate
1335 A and B then it is unlikely to be beneficial to play tricks
1337 if (subtract_flag_p && common)
1341 => 4 + (test != 0). */
1342 else if (diff > 0 && STORE_FLAG_VALUE > 0)
1347 else if (ifalse == 0 && exact_log2 (itrue) >= 0
1348 && (STORE_FLAG_VALUE == 1
1349 || if_info->branch_cost >= 2))
1351 else if (itrue == 0 && exact_log2 (ifalse) >= 0 && can_reverse
1352 && (STORE_FLAG_VALUE == 1 || if_info->branch_cost >= 2))
1357 else if (itrue == -1
1358 && (STORE_FLAG_VALUE == -1
1359 || if_info->branch_cost >= 2))
1361 else if (ifalse == -1 && can_reverse
1362 && (STORE_FLAG_VALUE == -1 || if_info->branch_cost >= 2))
1372 std::swap (itrue, ifalse);
1373 diff = trunc_int_for_mode (-(unsigned HOST_WIDE_INT) diff, mode);
1378 /* If we have x := test ? x + 3 : x + 4 then move the original
1379 x out of the way while we store flags. */
1380 if (common && rtx_equal_p (common, if_info->x))
1382 common = gen_reg_rtx (mode);
1383 noce_emit_move_insn (common, if_info->x);
1386 target = noce_emit_store_flag (if_info, if_info->x, reversep, normalize);
1393 /* if (test) x = 3; else x = 4;
1394 => x = 3 + (test == 0); */
1395 if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE)
1397 /* Add the common part now. This may allow combine to merge this
1398 with the store flag operation earlier into some sort of conditional
1399 increment/decrement if the target allows it. */
1401 target = expand_simple_binop (mode, PLUS,
1403 target, 0, OPTAB_WIDEN);
1405 /* Always use ifalse here. It should have been swapped with itrue
1406 when appropriate when reversep is true. */
1407 target = expand_simple_binop (mode, subtract_flag_p ? MINUS : PLUS,
1408 gen_int_mode (ifalse, mode), target,
1409 if_info->x, 0, OPTAB_WIDEN);
1411 /* Other cases are not beneficial when the original A and B are PLUS
1418 /* if (test) x = 8; else x = 0;
1419 => x = (test != 0) << 3; */
1420 else if (ifalse == 0 && (tmp = exact_log2 (itrue)) >= 0)
1422 target = expand_simple_binop (mode, ASHIFT,
1423 target, GEN_INT (tmp), if_info->x, 0,
1427 /* if (test) x = -1; else x = b;
1428 => x = -(test != 0) | b; */
1429 else if (itrue == -1)
1431 target = expand_simple_binop (mode, IOR,
1432 target, gen_int_mode (ifalse, mode),
1433 if_info->x, 0, OPTAB_WIDEN);
1447 if (target != if_info->x)
1448 noce_emit_move_insn (if_info->x, target);
1450 seq = end_ifcvt_sequence (if_info);
1454 emit_insn_before_setloc (seq, if_info->jump,
1455 INSN_LOCATION (if_info->insn_a));
1462 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1463 similarly for "foo--". */
1466 noce_try_addcc (struct noce_if_info *if_info)
1470 int subtract, normalize;
1472 if (!noce_simple_bbs (if_info))
1475 if (GET_CODE (if_info->a) == PLUS
1476 && rtx_equal_p (XEXP (if_info->a, 0), if_info->b)
1477 && (reversed_comparison_code (if_info->cond, if_info->jump)
1480 rtx cond = if_info->cond;
1481 enum rtx_code code = reversed_comparison_code (cond, if_info->jump);
1483 /* First try to use addcc pattern. */
1484 if (general_operand (XEXP (cond, 0), VOIDmode)
1485 && general_operand (XEXP (cond, 1), VOIDmode))
1488 target = emit_conditional_add (if_info->x, code,
1493 XEXP (if_info->a, 1),
1494 GET_MODE (if_info->x),
1495 (code == LTU || code == GEU
1496 || code == LEU || code == GTU));
1499 if (target != if_info->x)
1500 noce_emit_move_insn (if_info->x, target);
1502 seq = end_ifcvt_sequence (if_info);
1506 emit_insn_before_setloc (seq, if_info->jump,
1507 INSN_LOCATION (if_info->insn_a));
1513 /* If that fails, construct conditional increment or decrement using
1515 if (if_info->branch_cost >= 2
1516 && (XEXP (if_info->a, 1) == const1_rtx
1517 || XEXP (if_info->a, 1) == constm1_rtx))
1520 if (STORE_FLAG_VALUE == INTVAL (XEXP (if_info->a, 1)))
1521 subtract = 0, normalize = 0;
1522 else if (-STORE_FLAG_VALUE == INTVAL (XEXP (if_info->a, 1)))
1523 subtract = 1, normalize = 0;
1525 subtract = 0, normalize = INTVAL (XEXP (if_info->a, 1));
1528 target = noce_emit_store_flag (if_info,
1529 gen_reg_rtx (GET_MODE (if_info->x)),
1533 target = expand_simple_binop (GET_MODE (if_info->x),
1534 subtract ? MINUS : PLUS,
1535 if_info->b, target, if_info->x,
1539 if (target != if_info->x)
1540 noce_emit_move_insn (if_info->x, target);
1542 seq = end_ifcvt_sequence (if_info);
1546 emit_insn_before_setloc (seq, if_info->jump,
1547 INSN_LOCATION (if_info->insn_a));
1557 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1560 noce_try_store_flag_mask (struct noce_if_info *if_info)
1566 if (!noce_simple_bbs (if_info))
1570 if ((if_info->branch_cost >= 2
1571 || STORE_FLAG_VALUE == -1)
1572 && ((if_info->a == const0_rtx
1573 && rtx_equal_p (if_info->b, if_info->x))
1574 || ((reversep = (reversed_comparison_code (if_info->cond,
1577 && if_info->b == const0_rtx
1578 && rtx_equal_p (if_info->a, if_info->x))))
1581 target = noce_emit_store_flag (if_info,
1582 gen_reg_rtx (GET_MODE (if_info->x)),
1585 target = expand_simple_binop (GET_MODE (if_info->x), AND,
1587 target, if_info->x, 0,
1592 int old_cost, new_cost, insn_cost;
1595 if (target != if_info->x)
1596 noce_emit_move_insn (if_info->x, target);
1598 seq = end_ifcvt_sequence (if_info);
1602 speed_p = optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info->insn_a));
1603 insn_cost = insn_rtx_cost (PATTERN (if_info->insn_a), speed_p);
1604 old_cost = COSTS_N_INSNS (if_info->branch_cost) + insn_cost;
1605 new_cost = seq_cost (seq, speed_p);
1607 if (new_cost > old_cost)
1610 emit_insn_before_setloc (seq, if_info->jump,
1611 INSN_LOCATION (if_info->insn_a));
1621 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1624 noce_emit_cmove (struct noce_if_info *if_info, rtx x, enum rtx_code code,
1625 rtx cmp_a, rtx cmp_b, rtx vfalse, rtx vtrue)
1627 rtx target ATTRIBUTE_UNUSED;
1628 int unsignedp ATTRIBUTE_UNUSED;
1630 /* If earliest == jump, try to build the cmove insn directly.
1631 This is helpful when combine has created some complex condition
1632 (like for alpha's cmovlbs) that we can't hope to regenerate
1633 through the normal interface. */
1635 if (if_info->cond_earliest == if_info->jump)
1637 rtx cond = gen_rtx_fmt_ee (code, GET_MODE (if_info->cond), cmp_a, cmp_b);
1638 rtx if_then_else = gen_rtx_IF_THEN_ELSE (GET_MODE (x),
1639 cond, vtrue, vfalse);
1640 rtx set = gen_rtx_SET (x, if_then_else);
1643 rtx_insn *insn = emit_insn (set);
1645 if (recog_memoized (insn) >= 0)
1647 rtx_insn *seq = get_insns ();
1657 /* Don't even try if the comparison operands are weird
1658 except that the target supports cbranchcc4. */
1659 if (! general_operand (cmp_a, GET_MODE (cmp_a))
1660 || ! general_operand (cmp_b, GET_MODE (cmp_b)))
1662 if (!have_cbranchcc4
1663 || GET_MODE_CLASS (GET_MODE (cmp_a)) != MODE_CC
1664 || cmp_b != const0_rtx)
1668 unsignedp = (code == LTU || code == GEU
1669 || code == LEU || code == GTU);
1671 target = emit_conditional_move (x, code, cmp_a, cmp_b, VOIDmode,
1672 vtrue, vfalse, GET_MODE (x),
1677 /* We might be faced with a situation like:
1680 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1681 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1683 We can't do a conditional move in mode M, but it's possible that we
1684 could do a conditional move in mode N instead and take a subreg of
1687 If we can't create new pseudos, though, don't bother. */
1688 if (reload_completed)
1691 if (GET_CODE (vtrue) == SUBREG && GET_CODE (vfalse) == SUBREG)
1693 rtx reg_vtrue = SUBREG_REG (vtrue);
1694 rtx reg_vfalse = SUBREG_REG (vfalse);
1695 unsigned int byte_vtrue = SUBREG_BYTE (vtrue);
1696 unsigned int byte_vfalse = SUBREG_BYTE (vfalse);
1697 rtx promoted_target;
1699 if (GET_MODE (reg_vtrue) != GET_MODE (reg_vfalse)
1700 || byte_vtrue != byte_vfalse
1701 || (SUBREG_PROMOTED_VAR_P (vtrue)
1702 != SUBREG_PROMOTED_VAR_P (vfalse))
1703 || (SUBREG_PROMOTED_GET (vtrue)
1704 != SUBREG_PROMOTED_GET (vfalse)))
1707 promoted_target = gen_reg_rtx (GET_MODE (reg_vtrue));
1709 target = emit_conditional_move (promoted_target, code, cmp_a, cmp_b,
1710 VOIDmode, reg_vtrue, reg_vfalse,
1711 GET_MODE (reg_vtrue), unsignedp);
1712 /* Nope, couldn't do it in that mode either. */
1716 target = gen_rtx_SUBREG (GET_MODE (vtrue), promoted_target, byte_vtrue);
1717 SUBREG_PROMOTED_VAR_P (target) = SUBREG_PROMOTED_VAR_P (vtrue);
1718 SUBREG_PROMOTED_SET (target, SUBREG_PROMOTED_GET (vtrue));
1719 emit_move_insn (x, target);
1726 /* Try only simple constants and registers here. More complex cases
1727 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1728 has had a go at it. */
1731 noce_try_cmove (struct noce_if_info *if_info)
1737 if (!noce_simple_bbs (if_info))
1740 if ((CONSTANT_P (if_info->a) || register_operand (if_info->a, VOIDmode))
1741 && (CONSTANT_P (if_info->b) || register_operand (if_info->b, VOIDmode)))
1745 code = GET_CODE (if_info->cond);
1746 target = noce_emit_cmove (if_info, if_info->x, code,
1747 XEXP (if_info->cond, 0),
1748 XEXP (if_info->cond, 1),
1749 if_info->a, if_info->b);
1753 if (target != if_info->x)
1754 noce_emit_move_insn (if_info->x, target);
1756 seq = end_ifcvt_sequence (if_info);
1760 emit_insn_before_setloc (seq, if_info->jump,
1761 INSN_LOCATION (if_info->insn_a));
1764 /* If both a and b are constants try a last-ditch transformation:
1765 if (test) x = a; else x = b;
1766 => x = (-(test != 0) & (b - a)) + a;
1767 Try this only if the target-specific expansion above has failed.
1768 The target-specific expander may want to generate sequences that
1769 we don't know about, so give them a chance before trying this
1771 else if (!targetm.have_conditional_execution ()
1772 && CONST_INT_P (if_info->a) && CONST_INT_P (if_info->b)
1773 && ((if_info->branch_cost >= 2 && STORE_FLAG_VALUE == -1)
1774 || if_info->branch_cost >= 3))
1776 machine_mode mode = GET_MODE (if_info->x);
1777 HOST_WIDE_INT ifalse = INTVAL (if_info->a);
1778 HOST_WIDE_INT itrue = INTVAL (if_info->b);
1779 rtx target = noce_emit_store_flag (if_info, if_info->x, false, -1);
1786 HOST_WIDE_INT diff = (unsigned HOST_WIDE_INT) itrue - ifalse;
1787 /* Make sure we can represent the difference
1788 between the two values. */
1790 != ((ifalse < 0) != (itrue < 0) ? ifalse < 0 : ifalse < itrue))
1796 diff = trunc_int_for_mode (diff, mode);
1797 target = expand_simple_binop (mode, AND,
1798 target, gen_int_mode (diff, mode),
1799 if_info->x, 0, OPTAB_WIDEN);
1801 target = expand_simple_binop (mode, PLUS,
1802 target, gen_int_mode (ifalse, mode),
1803 if_info->x, 0, OPTAB_WIDEN);
1806 if (target != if_info->x)
1807 noce_emit_move_insn (if_info->x, target);
1809 seq = end_ifcvt_sequence (if_info);
1813 emit_insn_before_setloc (seq, if_info->jump,
1814 INSN_LOCATION (if_info->insn_a));
1830 /* Return true if X contains a conditional code mode rtx. */
1833 contains_ccmode_rtx_p (rtx x)
1835 subrtx_iterator::array_type array;
1836 FOR_EACH_SUBRTX (iter, array, x, ALL)
1837 if (GET_MODE_CLASS (GET_MODE (*iter)) == MODE_CC)
1843 /* Helper for bb_valid_for_noce_process_p. Validate that
1844 the rtx insn INSN is a single set that does not set
1845 the conditional register CC and is in general valid for
1849 insn_valid_noce_process_p (rtx_insn *insn, rtx cc)
1852 || !NONJUMP_INSN_P (insn)
1853 || (cc && set_of (cc, insn)))
1856 rtx sset = single_set (insn);
1858 /* Currently support only simple single sets in test_bb. */
1860 || !noce_operand_ok (SET_DEST (sset))
1861 || contains_ccmode_rtx_p (SET_DEST (sset))
1862 || !noce_operand_ok (SET_SRC (sset)))
1869 /* Return true iff the registers that the insns in BB_A set do not
1870 get used in BB_B. */
1873 bbs_ok_for_cmove_arith (basic_block bb_a, basic_block bb_b)
1876 bitmap bba_sets = BITMAP_ALLOC (®_obstack);
1881 FOR_BB_INSNS (bb_a, a_insn)
1883 if (!active_insn_p (a_insn))
1886 rtx sset_a = single_set (a_insn);
1890 BITMAP_FREE (bba_sets);
1894 /* Record all registers that BB_A sets. */
1895 FOR_EACH_INSN_DEF (def, a_insn)
1896 bitmap_set_bit (bba_sets, DF_REF_REGNO (def));
1901 FOR_BB_INSNS (bb_b, b_insn)
1903 if (!active_insn_p (b_insn))
1906 rtx sset_b = single_set (b_insn);
1910 BITMAP_FREE (bba_sets);
1914 /* Make sure this is a REG and not some instance
1915 of ZERO_EXTRACT or SUBREG or other dangerous stuff. */
1916 if (!REG_P (SET_DEST (sset_b)))
1918 BITMAP_FREE (bba_sets);
1922 /* If the insn uses a reg set in BB_A return false. */
1923 FOR_EACH_INSN_USE (use, b_insn)
1925 if (bitmap_bit_p (bba_sets, DF_REF_REGNO (use)))
1927 BITMAP_FREE (bba_sets);
1934 BITMAP_FREE (bba_sets);
1938 /* Emit copies of all the active instructions in BB except the last.
1939 This is a helper for noce_try_cmove_arith. */
1942 noce_emit_all_but_last (basic_block bb)
1944 rtx_insn *last = last_active_insn (bb, FALSE);
1946 FOR_BB_INSNS (bb, insn)
1948 if (insn != last && active_insn_p (insn))
1950 rtx_insn *to_emit = as_a <rtx_insn *> (copy_rtx (insn));
1952 emit_insn (PATTERN (to_emit));
1957 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
1958 the resulting insn or NULL if it's not a valid insn. */
1961 noce_emit_insn (rtx to_emit)
1963 gcc_assert (to_emit);
1964 rtx_insn *insn = emit_insn (to_emit);
1966 if (recog_memoized (insn) < 0)
1972 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
1973 and including the penultimate one in BB if it is not simple
1974 (as indicated by SIMPLE). Then emit LAST_INSN as the last
1975 insn in the block. The reason for that is that LAST_INSN may
1976 have been modified by the preparation in noce_try_cmove_arith. */
1979 noce_emit_bb (rtx last_insn, basic_block bb, bool simple)
1982 noce_emit_all_but_last (bb);
1984 if (last_insn && !noce_emit_insn (last_insn))
1990 /* Try more complex cases involving conditional_move. */
1993 noce_try_cmove_arith (struct noce_if_info *if_info)
1999 rtx_insn *insn_a, *insn_b;
2000 bool a_simple = if_info->then_simple;
2001 bool b_simple = if_info->else_simple;
2002 basic_block then_bb = if_info->then_bb;
2003 basic_block else_bb = if_info->else_bb;
2007 rtx_insn *ifcvt_seq;
2009 /* A conditional move from two memory sources is equivalent to a
2010 conditional on their addresses followed by a load. Don't do this
2011 early because it'll screw alias analysis. Note that we've
2012 already checked for no side effects. */
2013 /* ??? FIXME: Magic number 5. */
2014 if (cse_not_expected
2015 && MEM_P (a) && MEM_P (b)
2016 && MEM_ADDR_SPACE (a) == MEM_ADDR_SPACE (b)
2017 && if_info->branch_cost >= 5)
2019 machine_mode address_mode = get_address_mode (a);
2023 x = gen_reg_rtx (address_mode);
2027 /* ??? We could handle this if we knew that a load from A or B could
2028 not trap or fault. This is also true if we've already loaded
2029 from the address along the path from ENTRY. */
2030 else if (may_trap_or_fault_p (a) || may_trap_or_fault_p (b))
2033 /* if (test) x = a + b; else x = c - d;
2040 code = GET_CODE (if_info->cond);
2041 insn_a = if_info->insn_a;
2042 insn_b = if_info->insn_b;
2044 machine_mode x_mode = GET_MODE (x);
2046 if (!can_conditionally_move_p (x_mode))
2049 unsigned int then_cost;
2050 unsigned int else_cost;
2052 then_cost = if_info->then_cost;
2057 else_cost = if_info->else_cost;
2061 /* We're going to execute one of the basic blocks anyway, so
2062 bail out if the most expensive of the two blocks is unacceptable. */
2063 if (MAX (then_cost, else_cost) > COSTS_N_INSNS (if_info->branch_cost))
2066 /* Possibly rearrange operands to make things come out more natural. */
2067 if (reversed_comparison_code (if_info->cond, if_info->jump) != UNKNOWN)
2070 if (rtx_equal_p (b, x))
2072 else if (general_operand (b, GET_MODE (b)))
2077 code = reversed_comparison_code (if_info->cond, if_info->jump);
2079 std::swap (insn_a, insn_b);
2080 std::swap (a_simple, b_simple);
2081 std::swap (then_bb, else_bb);
2085 if (then_bb && else_bb && !a_simple && !b_simple
2086 && (!bbs_ok_for_cmove_arith (then_bb, else_bb)
2087 || !bbs_ok_for_cmove_arith (else_bb, then_bb)))
2092 /* If one of the blocks is empty then the corresponding B or A value
2093 came from the test block. The non-empty complex block that we will
2094 emit might clobber the register used by B or A, so move it to a pseudo
2097 rtx tmp_a = NULL_RTX;
2098 rtx tmp_b = NULL_RTX;
2100 if (b_simple || !else_bb)
2101 tmp_b = gen_reg_rtx (x_mode);
2103 if (a_simple || !then_bb)
2104 tmp_a = gen_reg_rtx (x_mode);
2109 rtx emit_a = NULL_RTX;
2110 rtx emit_b = NULL_RTX;
2111 rtx_insn *tmp_insn = NULL;
2112 bool modified_in_a = false;
2113 bool modified_in_b = false;
2114 /* If either operand is complex, load it into a register first.
2115 The best way to do this is to copy the original insn. In this
2116 way we preserve any clobbers etc that the insn may have had.
2117 This is of course not possible in the IS_MEM case. */
2119 if (! general_operand (a, GET_MODE (a)) || tmp_a)
2124 rtx reg = gen_reg_rtx (GET_MODE (a));
2125 emit_a = gen_rtx_SET (reg, a);
2131 a = tmp_a ? tmp_a : gen_reg_rtx (GET_MODE (a));
2133 rtx_insn *copy_of_a = as_a <rtx_insn *> (copy_rtx (insn_a));
2134 rtx set = single_set (copy_of_a);
2137 emit_a = PATTERN (copy_of_a);
2141 rtx tmp_reg = tmp_a ? tmp_a : gen_reg_rtx (GET_MODE (a));
2142 emit_a = gen_rtx_SET (tmp_reg, a);
2148 if (! general_operand (b, GET_MODE (b)) || tmp_b)
2152 rtx reg = gen_reg_rtx (GET_MODE (b));
2153 emit_b = gen_rtx_SET (reg, b);
2159 b = tmp_b ? tmp_b : gen_reg_rtx (GET_MODE (b));
2160 rtx_insn *copy_of_b = as_a <rtx_insn *> (copy_rtx (insn_b));
2161 rtx set = single_set (copy_of_b);
2164 emit_b = PATTERN (copy_of_b);
2168 rtx tmp_reg = tmp_b ? tmp_b : gen_reg_rtx (GET_MODE (b));
2169 emit_b = gen_rtx_SET (tmp_reg, b);
2175 /* If insn to set up A clobbers any registers B depends on, try to
2176 swap insn that sets up A with the one that sets up B. If even
2177 that doesn't help, punt. */
2179 modified_in_a = emit_a != NULL_RTX && modified_in_p (orig_b, emit_a);
2180 if (tmp_b && then_bb)
2182 FOR_BB_INSNS (then_bb, tmp_insn)
2183 /* Don't check inside insn_a. We will have changed it to emit_a
2184 with a destination that doesn't conflict. */
2185 if (!(insn_a && tmp_insn == insn_a)
2186 && modified_in_p (orig_b, tmp_insn))
2188 modified_in_a = true;
2193 if (emit_a && modified_in_a)
2195 modified_in_b = emit_b != NULL_RTX && modified_in_p (orig_a, emit_b);
2196 if (tmp_b && else_bb)
2198 FOR_BB_INSNS (else_bb, tmp_insn)
2199 /* Don't check inside insn_b. We will have changed it to emit_b
2200 with a destination that doesn't conflict. */
2201 if (!(insn_b && tmp_insn == insn_b)
2202 && modified_in_p (orig_a, tmp_insn))
2204 modified_in_b = true;
2210 goto end_seq_and_fail;
2212 if (!noce_emit_bb (emit_b, else_bb, b_simple))
2213 goto end_seq_and_fail;
2215 if (!noce_emit_bb (emit_a, then_bb, a_simple))
2216 goto end_seq_and_fail;
2220 if (!noce_emit_bb (emit_a, then_bb, a_simple))
2221 goto end_seq_and_fail;
2223 if (!noce_emit_bb (emit_b, else_bb, b_simple))
2224 goto end_seq_and_fail;
2228 target = noce_emit_cmove (if_info, x, code, XEXP (if_info->cond, 0),
2229 XEXP (if_info->cond, 1), a, b);
2232 goto end_seq_and_fail;
2234 /* If we're handling a memory for above, emit the load now. */
2237 rtx mem = gen_rtx_MEM (GET_MODE (if_info->x), target);
2239 /* Copy over flags as appropriate. */
2240 if (MEM_VOLATILE_P (if_info->a) || MEM_VOLATILE_P (if_info->b))
2241 MEM_VOLATILE_P (mem) = 1;
2242 if (MEM_ALIAS_SET (if_info->a) == MEM_ALIAS_SET (if_info->b))
2243 set_mem_alias_set (mem, MEM_ALIAS_SET (if_info->a));
2245 MIN (MEM_ALIGN (if_info->a), MEM_ALIGN (if_info->b)));
2247 gcc_assert (MEM_ADDR_SPACE (if_info->a) == MEM_ADDR_SPACE (if_info->b));
2248 set_mem_addr_space (mem, MEM_ADDR_SPACE (if_info->a));
2250 noce_emit_move_insn (if_info->x, mem);
2252 else if (target != x)
2253 noce_emit_move_insn (x, target);
2255 ifcvt_seq = end_ifcvt_sequence (if_info);
2259 emit_insn_before_setloc (ifcvt_seq, if_info->jump,
2260 INSN_LOCATION (if_info->insn_a));
2268 /* For most cases, the simplified condition we found is the best
2269 choice, but this is not the case for the min/max/abs transforms.
2270 For these we wish to know that it is A or B in the condition. */
2273 noce_get_alt_condition (struct noce_if_info *if_info, rtx target,
2274 rtx_insn **earliest)
2280 /* If target is already mentioned in the known condition, return it. */
2281 if (reg_mentioned_p (target, if_info->cond))
2283 *earliest = if_info->cond_earliest;
2284 return if_info->cond;
2287 set = pc_set (if_info->jump);
2288 cond = XEXP (SET_SRC (set), 0);
2290 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
2291 && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump);
2292 if (if_info->then_else_reversed)
2295 /* If we're looking for a constant, try to make the conditional
2296 have that constant in it. There are two reasons why it may
2297 not have the constant we want:
2299 1. GCC may have needed to put the constant in a register, because
2300 the target can't compare directly against that constant. For
2301 this case, we look for a SET immediately before the comparison
2302 that puts a constant in that register.
2304 2. GCC may have canonicalized the conditional, for example
2305 replacing "if x < 4" with "if x <= 3". We can undo that (or
2306 make equivalent types of changes) to get the constants we need
2307 if they're off by one in the right direction. */
2309 if (CONST_INT_P (target))
2311 enum rtx_code code = GET_CODE (if_info->cond);
2312 rtx op_a = XEXP (if_info->cond, 0);
2313 rtx op_b = XEXP (if_info->cond, 1);
2314 rtx_insn *prev_insn;
2316 /* First, look to see if we put a constant in a register. */
2317 prev_insn = prev_nonnote_insn (if_info->cond_earliest);
2319 && BLOCK_FOR_INSN (prev_insn)
2320 == BLOCK_FOR_INSN (if_info->cond_earliest)
2321 && INSN_P (prev_insn)
2322 && GET_CODE (PATTERN (prev_insn)) == SET)
2324 rtx src = find_reg_equal_equiv_note (prev_insn);
2326 src = SET_SRC (PATTERN (prev_insn));
2327 if (CONST_INT_P (src))
2329 if (rtx_equal_p (op_a, SET_DEST (PATTERN (prev_insn))))
2331 else if (rtx_equal_p (op_b, SET_DEST (PATTERN (prev_insn))))
2334 if (CONST_INT_P (op_a))
2336 std::swap (op_a, op_b);
2337 code = swap_condition (code);
2342 /* Now, look to see if we can get the right constant by
2343 adjusting the conditional. */
2344 if (CONST_INT_P (op_b))
2346 HOST_WIDE_INT desired_val = INTVAL (target);
2347 HOST_WIDE_INT actual_val = INTVAL (op_b);
2352 if (actual_val == desired_val + 1)
2355 op_b = GEN_INT (desired_val);
2359 if (actual_val == desired_val - 1)
2362 op_b = GEN_INT (desired_val);
2366 if (actual_val == desired_val - 1)
2369 op_b = GEN_INT (desired_val);
2373 if (actual_val == desired_val + 1)
2376 op_b = GEN_INT (desired_val);
2384 /* If we made any changes, generate a new conditional that is
2385 equivalent to what we started with, but has the right
2387 if (code != GET_CODE (if_info->cond)
2388 || op_a != XEXP (if_info->cond, 0)
2389 || op_b != XEXP (if_info->cond, 1))
2391 cond = gen_rtx_fmt_ee (code, GET_MODE (cond), op_a, op_b);
2392 *earliest = if_info->cond_earliest;
2397 cond = canonicalize_condition (if_info->jump, cond, reverse,
2398 earliest, target, have_cbranchcc4, true);
2399 if (! cond || ! reg_mentioned_p (target, cond))
2402 /* We almost certainly searched back to a different place.
2403 Need to re-verify correct lifetimes. */
2405 /* X may not be mentioned in the range (cond_earliest, jump]. */
2406 for (insn = if_info->jump; insn != *earliest; insn = PREV_INSN (insn))
2407 if (INSN_P (insn) && reg_overlap_mentioned_p (if_info->x, PATTERN (insn)))
2410 /* A and B may not be modified in the range [cond_earliest, jump). */
2411 for (insn = *earliest; insn != if_info->jump; insn = NEXT_INSN (insn))
2413 && (modified_in_p (if_info->a, insn)
2414 || modified_in_p (if_info->b, insn)))
2420 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2423 noce_try_minmax (struct noce_if_info *if_info)
2426 rtx_insn *earliest, *seq;
2427 enum rtx_code code, op;
2430 if (!noce_simple_bbs (if_info))
2433 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2434 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2435 to get the target to tell us... */
2436 if (HONOR_SIGNED_ZEROS (if_info->x)
2437 || HONOR_NANS (if_info->x))
2440 cond = noce_get_alt_condition (if_info, if_info->a, &earliest);
2444 /* Verify the condition is of the form we expect, and canonicalize
2445 the comparison code. */
2446 code = GET_CODE (cond);
2447 if (rtx_equal_p (XEXP (cond, 0), if_info->a))
2449 if (! rtx_equal_p (XEXP (cond, 1), if_info->b))
2452 else if (rtx_equal_p (XEXP (cond, 1), if_info->a))
2454 if (! rtx_equal_p (XEXP (cond, 0), if_info->b))
2456 code = swap_condition (code);
2461 /* Determine what sort of operation this is. Note that the code is for
2462 a taken branch, so the code->operation mapping appears backwards. */
2495 target = expand_simple_binop (GET_MODE (if_info->x), op,
2496 if_info->a, if_info->b,
2497 if_info->x, unsignedp, OPTAB_WIDEN);
2503 if (target != if_info->x)
2504 noce_emit_move_insn (if_info->x, target);
2506 seq = end_ifcvt_sequence (if_info);
2510 emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
2511 if_info->cond = cond;
2512 if_info->cond_earliest = earliest;
2517 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2518 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2522 noce_try_abs (struct noce_if_info *if_info)
2524 rtx cond, target, a, b, c;
2525 rtx_insn *earliest, *seq;
2527 bool one_cmpl = false;
2529 if (!noce_simple_bbs (if_info))
2532 /* Reject modes with signed zeros. */
2533 if (HONOR_SIGNED_ZEROS (if_info->x))
2536 /* Recognize A and B as constituting an ABS or NABS. The canonical
2537 form is a branch around the negation, taken when the object is the
2538 first operand of a comparison against 0 that evaluates to true. */
2541 if (GET_CODE (a) == NEG && rtx_equal_p (XEXP (a, 0), b))
2543 else if (GET_CODE (b) == NEG && rtx_equal_p (XEXP (b, 0), a))
2548 else if (GET_CODE (a) == NOT && rtx_equal_p (XEXP (a, 0), b))
2553 else if (GET_CODE (b) == NOT && rtx_equal_p (XEXP (b, 0), a))
2562 cond = noce_get_alt_condition (if_info, b, &earliest);
2566 /* Verify the condition is of the form we expect. */
2567 if (rtx_equal_p (XEXP (cond, 0), b))
2569 else if (rtx_equal_p (XEXP (cond, 1), b))
2577 /* Verify that C is zero. Search one step backward for a
2578 REG_EQUAL note or a simple source if necessary. */
2582 rtx_insn *insn = prev_nonnote_insn (earliest);
2584 && BLOCK_FOR_INSN (insn) == BLOCK_FOR_INSN (earliest)
2585 && (set = single_set (insn))
2586 && rtx_equal_p (SET_DEST (set), c))
2588 rtx note = find_reg_equal_equiv_note (insn);
2598 && GET_CODE (XEXP (c, 0)) == SYMBOL_REF
2599 && CONSTANT_POOL_ADDRESS_P (XEXP (c, 0)))
2600 c = get_pool_constant (XEXP (c, 0));
2602 /* Work around funny ideas get_condition has wrt canonicalization.
2603 Note that these rtx constants are known to be CONST_INT, and
2604 therefore imply integer comparisons.
2605 The one_cmpl case is more complicated, as we want to handle
2606 only x < 0 ? ~x : x or x >= 0 ? ~x : x but not
2607 x <= 0 ? ~x : x or x > 0 ? ~x : x, as the latter two
2608 have different result for x == 0. */
2609 if (c == constm1_rtx && GET_CODE (cond) == GT)
2611 if (one_cmpl && negate)
2614 else if (c == const1_rtx && GET_CODE (cond) == LT)
2616 if (one_cmpl && !negate)
2619 else if (c == CONST0_RTX (GET_MODE (b)))
2622 switch (GET_CODE (cond))
2629 /* >= 0 is the same case as above > -1. */
2638 /* <= 0 is the same case as above < 1. */
2649 /* Determine what sort of operation this is. */
2650 switch (GET_CODE (cond))
2669 target = expand_one_cmpl_abs_nojump (GET_MODE (if_info->x), b,
2672 target = expand_abs_nojump (GET_MODE (if_info->x), b, if_info->x, 1);
2674 /* ??? It's a quandary whether cmove would be better here, especially
2675 for integers. Perhaps combine will clean things up. */
2676 if (target && negate)
2679 target = expand_simple_unop (GET_MODE (target), NOT, target,
2682 target = expand_simple_unop (GET_MODE (target), NEG, target,
2692 if (target != if_info->x)
2693 noce_emit_move_insn (if_info->x, target);
2695 seq = end_ifcvt_sequence (if_info);
2699 emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
2700 if_info->cond = cond;
2701 if_info->cond_earliest = earliest;
2706 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2709 noce_try_sign_mask (struct noce_if_info *if_info)
2715 bool t_unconditional;
2717 if (!noce_simple_bbs (if_info))
2720 cond = if_info->cond;
2721 code = GET_CODE (cond);
2726 if (if_info->a == const0_rtx)
2728 if ((code == LT && c == const0_rtx)
2729 || (code == LE && c == constm1_rtx))
2732 else if (if_info->b == const0_rtx)
2734 if ((code == GE && c == const0_rtx)
2735 || (code == GT && c == constm1_rtx))
2739 if (! t || side_effects_p (t))
2742 /* We currently don't handle different modes. */
2743 mode = GET_MODE (t);
2744 if (GET_MODE (m) != mode)
2747 /* This is only profitable if T is unconditionally executed/evaluated in the
2748 original insn sequence or T is cheap. The former happens if B is the
2749 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2750 INSN_B which can happen for e.g. conditional stores to memory. For the
2751 cost computation use the block TEST_BB where the evaluation will end up
2752 after the transformation. */
2755 && (if_info->insn_b == NULL_RTX
2756 || BLOCK_FOR_INSN (if_info->insn_b) == if_info->test_bb));
2757 if (!(t_unconditional
2758 || (set_src_cost (t, mode, optimize_bb_for_speed_p (if_info->test_bb))
2759 < COSTS_N_INSNS (2))))
2763 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2764 "(signed) m >> 31" directly. This benefits targets with specialized
2765 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2766 m = emit_store_flag (gen_reg_rtx (mode), LT, m, const0_rtx, mode, 0, -1);
2767 t = m ? expand_binop (mode, and_optab, m, t, NULL_RTX, 0, OPTAB_DIRECT)
2776 noce_emit_move_insn (if_info->x, t);
2778 seq = end_ifcvt_sequence (if_info);
2782 emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
2787 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2791 noce_try_bitop (struct noce_if_info *if_info)
2793 rtx cond, x, a, result;
2800 cond = if_info->cond;
2801 code = GET_CODE (cond);
2803 if (!noce_simple_bbs (if_info))
2806 /* Check for no else condition. */
2807 if (! rtx_equal_p (x, if_info->b))
2810 /* Check for a suitable condition. */
2811 if (code != NE && code != EQ)
2813 if (XEXP (cond, 1) != const0_rtx)
2815 cond = XEXP (cond, 0);
2817 /* ??? We could also handle AND here. */
2818 if (GET_CODE (cond) == ZERO_EXTRACT)
2820 if (XEXP (cond, 1) != const1_rtx
2821 || !CONST_INT_P (XEXP (cond, 2))
2822 || ! rtx_equal_p (x, XEXP (cond, 0)))
2824 bitnum = INTVAL (XEXP (cond, 2));
2825 mode = GET_MODE (x);
2826 if (BITS_BIG_ENDIAN)
2827 bitnum = GET_MODE_BITSIZE (mode) - 1 - bitnum;
2828 if (bitnum < 0 || bitnum >= HOST_BITS_PER_WIDE_INT)
2835 if (GET_CODE (a) == IOR || GET_CODE (a) == XOR)
2837 /* Check for "if (X & C) x = x op C". */
2838 if (! rtx_equal_p (x, XEXP (a, 0))
2839 || !CONST_INT_P (XEXP (a, 1))
2840 || (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode))
2841 != (unsigned HOST_WIDE_INT) 1 << bitnum)
2844 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2845 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2846 if (GET_CODE (a) == IOR)
2847 result = (code == NE) ? a : NULL_RTX;
2848 else if (code == NE)
2850 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2851 result = gen_int_mode ((HOST_WIDE_INT) 1 << bitnum, mode);
2852 result = simplify_gen_binary (IOR, mode, x, result);
2856 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2857 result = gen_int_mode (~((HOST_WIDE_INT) 1 << bitnum), mode);
2858 result = simplify_gen_binary (AND, mode, x, result);
2861 else if (GET_CODE (a) == AND)
2863 /* Check for "if (X & C) x &= ~C". */
2864 if (! rtx_equal_p (x, XEXP (a, 0))
2865 || !CONST_INT_P (XEXP (a, 1))
2866 || (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode))
2867 != (~((HOST_WIDE_INT) 1 << bitnum) & GET_MODE_MASK (mode)))
2870 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2871 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2872 result = (code == EQ) ? a : NULL_RTX;
2880 noce_emit_move_insn (x, result);
2881 seq = end_ifcvt_sequence (if_info);
2885 emit_insn_before_setloc (seq, if_info->jump,
2886 INSN_LOCATION (if_info->insn_a));
2892 /* Similar to get_condition, only the resulting condition must be
2893 valid at JUMP, instead of at EARLIEST.
2895 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2896 THEN block of the caller, and we have to reverse the condition. */
2899 noce_get_condition (rtx_insn *jump, rtx_insn **earliest, bool then_else_reversed)
2904 if (! any_condjump_p (jump))
2907 set = pc_set (jump);
2909 /* If this branches to JUMP_LABEL when the condition is false,
2910 reverse the condition. */
2911 reverse = (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
2912 && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (jump));
2914 /* We may have to reverse because the caller's if block is not canonical,
2915 i.e. the THEN block isn't the fallthrough block for the TEST block
2916 (see find_if_header). */
2917 if (then_else_reversed)
2920 /* If the condition variable is a register and is MODE_INT, accept it. */
2922 cond = XEXP (SET_SRC (set), 0);
2923 tmp = XEXP (cond, 0);
2924 if (REG_P (tmp) && GET_MODE_CLASS (GET_MODE (tmp)) == MODE_INT
2925 && (GET_MODE (tmp) != BImode
2926 || !targetm.small_register_classes_for_mode_p (BImode)))
2931 cond = gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond)),
2932 GET_MODE (cond), tmp, XEXP (cond, 1));
2936 /* Otherwise, fall back on canonicalize_condition to do the dirty
2937 work of manipulating MODE_CC values and COMPARE rtx codes. */
2938 tmp = canonicalize_condition (jump, cond, reverse, earliest,
2939 NULL_RTX, have_cbranchcc4, true);
2941 /* We don't handle side-effects in the condition, like handling
2942 REG_INC notes and making sure no duplicate conditions are emitted. */
2943 if (tmp != NULL_RTX && side_effects_p (tmp))
2949 /* Return true if OP is ok for if-then-else processing. */
2952 noce_operand_ok (const_rtx op)
2954 if (side_effects_p (op))
2957 /* We special-case memories, so handle any of them with
2958 no address side effects. */
2960 return ! side_effects_p (XEXP (op, 0));
2962 return ! may_trap_p (op);
2965 /* Return true if X contains a MEM subrtx. */
2968 contains_mem_rtx_p (rtx x)
2970 subrtx_iterator::array_type array;
2971 FOR_EACH_SUBRTX (iter, array, x, ALL)
2978 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
2979 The condition used in this if-conversion is in COND.
2980 In practice, check that TEST_BB ends with a single set
2981 x := a and all previous computations
2982 in TEST_BB don't produce any values that are live after TEST_BB.
2983 In other words, all the insns in TEST_BB are there only
2984 to compute a value for x. Put the rtx cost of the insns
2985 in TEST_BB into COST. Record whether TEST_BB is a single simple
2986 set instruction in SIMPLE_P. */
2989 bb_valid_for_noce_process_p (basic_block test_bb, rtx cond,
2990 unsigned int *cost, bool *simple_p)
2995 rtx_insn *last_insn = last_active_insn (test_bb, FALSE);
2996 rtx last_set = NULL_RTX;
2998 rtx cc = cc_in_cond (cond);
3000 if (!insn_valid_noce_process_p (last_insn, cc))
3002 last_set = single_set (last_insn);
3004 rtx x = SET_DEST (last_set);
3005 rtx_insn *first_insn = first_active_insn (test_bb);
3006 rtx first_set = single_set (first_insn);
3011 /* We have a single simple set, that's okay. */
3012 bool speed_p = optimize_bb_for_speed_p (test_bb);
3014 if (first_insn == last_insn)
3016 *simple_p = noce_operand_ok (SET_DEST (first_set));
3017 *cost = insn_rtx_cost (first_set, speed_p);
3021 rtx_insn *prev_last_insn = PREV_INSN (last_insn);
3022 gcc_assert (prev_last_insn);
3024 /* For now, disallow setting x multiple times in test_bb. */
3025 if (REG_P (x) && reg_set_between_p (x, first_insn, prev_last_insn))
3028 bitmap test_bb_temps = BITMAP_ALLOC (®_obstack);
3030 /* The regs that are live out of test_bb. */
3031 bitmap test_bb_live_out = df_get_live_out (test_bb);
3033 int potential_cost = insn_rtx_cost (last_set, speed_p);
3035 FOR_BB_INSNS (test_bb, insn)
3037 if (insn != last_insn)
3039 if (!active_insn_p (insn))
3042 if (!insn_valid_noce_process_p (insn, cc))
3043 goto free_bitmap_and_fail;
3045 rtx sset = single_set (insn);
3048 if (contains_mem_rtx_p (SET_SRC (sset))
3049 || !REG_P (SET_DEST (sset))
3050 || reg_overlap_mentioned_p (SET_DEST (sset), cond))
3051 goto free_bitmap_and_fail;
3053 potential_cost += insn_rtx_cost (sset, speed_p);
3054 bitmap_set_bit (test_bb_temps, REGNO (SET_DEST (sset)));
3058 /* If any of the intermediate results in test_bb are live after test_bb
3060 if (bitmap_intersect_p (test_bb_live_out, test_bb_temps))
3061 goto free_bitmap_and_fail;
3063 BITMAP_FREE (test_bb_temps);
3064 *cost = potential_cost;
3068 free_bitmap_and_fail:
3069 BITMAP_FREE (test_bb_temps);
3073 /* We have something like:
3076 { i = a; j = b; k = c; }
3080 tmp_i = (x > y) ? a : i;
3081 tmp_j = (x > y) ? b : j;
3082 tmp_k = (x > y) ? c : k;
3087 Subsequent passes are expected to clean up the extra moves.
3089 Look for special cases such as writes to one register which are
3090 read back in another SET, as might occur in a swap idiom or
3099 Which we want to rewrite to:
3101 tmp_i = (x > y) ? a : i;
3102 tmp_j = (x > y) ? tmp_i : j;
3106 We can catch these when looking at (SET x y) by keeping a list of the
3107 registers we would have targeted before if-conversion and looking back
3108 through it for an overlap with Y. If we find one, we rewire the
3109 conditional set to use the temporary we introduced earlier.
3111 IF_INFO contains the useful information about the block structure and
3112 jump instructions. */
3115 noce_convert_multiple_sets (struct noce_if_info *if_info)
3117 basic_block test_bb = if_info->test_bb;
3118 basic_block then_bb = if_info->then_bb;
3119 basic_block join_bb = if_info->join_bb;
3120 rtx_insn *jump = if_info->jump;
3121 rtx_insn *cond_earliest;
3126 /* Decompose the condition attached to the jump. */
3127 rtx cond = noce_get_condition (jump, &cond_earliest, false);
3128 rtx x = XEXP (cond, 0);
3129 rtx y = XEXP (cond, 1);
3130 rtx_code cond_code = GET_CODE (cond);
3132 /* The true targets for a conditional move. */
3133 auto_vec<rtx> targets;
3134 /* The temporaries introduced to allow us to not consider register
3136 auto_vec<rtx> temporaries;
3137 /* The insns we've emitted. */
3138 auto_vec<rtx_insn *> unmodified_insns;
3141 FOR_BB_INSNS (then_bb, insn)
3143 /* Skip over non-insns. */
3144 if (!active_insn_p (insn))
3147 rtx set = single_set (insn);
3148 gcc_checking_assert (set);
3150 rtx target = SET_DEST (set);
3151 rtx temp = gen_reg_rtx (GET_MODE (target));
3152 rtx new_val = SET_SRC (set);
3153 rtx old_val = target;
3155 /* If we were supposed to read from an earlier write in this block,
3156 we've changed the register allocation. Rewire the read. While
3157 we are looking, also try to catch a swap idiom. */
3158 for (int i = count - 1; i >= 0; --i)
3159 if (reg_overlap_mentioned_p (new_val, targets[i]))
3161 /* Catch a "swap" style idiom. */
3162 if (find_reg_note (insn, REG_DEAD, new_val) != NULL_RTX)
3163 /* The write to targets[i] is only live until the read
3164 here. As the condition codes match, we can propagate
3166 new_val = SET_SRC (single_set (unmodified_insns[i]));
3168 new_val = temporaries[i];
3172 /* If we had a non-canonical conditional jump (i.e. one where
3173 the fallthrough is to the "else" case) we need to reverse
3174 the conditional select. */
3175 if (if_info->then_else_reversed)
3176 std::swap (old_val, new_val);
3178 /* Actually emit the conditional move. */
3179 rtx temp_dest = noce_emit_cmove (if_info, temp, cond_code,
3180 x, y, new_val, old_val);
3182 /* If we failed to expand the conditional move, drop out and don't
3184 if (temp_dest == NULL_RTX)
3192 targets.safe_push (target);
3193 temporaries.safe_push (temp_dest);
3194 unmodified_insns.safe_push (insn);
3197 /* We must have seen some sort of insn to insert, otherwise we were
3198 given an empty BB to convert, and we can't handle that. */
3199 gcc_assert (!unmodified_insns.is_empty ());
3201 /* Now fixup the assignments. */
3202 for (int i = 0; i < count; i++)
3203 noce_emit_move_insn (targets[i], temporaries[i]);
3205 /* Actually emit the sequence. */
3206 rtx_insn *seq = get_insns ();
3208 for (insn = seq; insn; insn = NEXT_INSN (insn))
3209 set_used_flags (insn);
3211 /* Mark all our temporaries and targets as used. */
3212 for (int i = 0; i < count; i++)
3214 set_used_flags (temporaries[i]);
3215 set_used_flags (targets[i]);
3218 set_used_flags (cond);
3222 unshare_all_rtl_in_chain (seq);
3228 for (insn = seq; insn; insn = NEXT_INSN (insn))
3230 || recog_memoized (insn) == -1)
3233 emit_insn_before_setloc (seq, if_info->jump,
3234 INSN_LOCATION (unmodified_insns.last ()));
3236 /* Clean up THEN_BB and the edges in and out of it. */
3237 remove_edge (find_edge (test_bb, join_bb));
3238 remove_edge (find_edge (then_bb, join_bb));
3239 redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb);
3240 delete_basic_block (then_bb);
3243 /* Maybe merge blocks now the jump is simple enough. */
3244 if (can_merge_blocks_p (test_bb, join_bb))
3246 merge_blocks (test_bb, join_bb);
3250 num_updated_if_blocks++;
3254 /* Return true iff basic block TEST_BB is comprised of only
3255 (SET (REG) (REG)) insns suitable for conversion to a series
3256 of conditional moves. FORNOW: Use II to find the expected cost of
3257 the branch into/over TEST_BB.
3259 TODO: This creates an implicit "magic number" for branch_cost.
3260 II->branch_cost now guides the maximum number of set instructions in
3261 a basic block which is considered profitable to completely
3265 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb,
3266 struct noce_if_info *ii)
3271 FOR_BB_INSNS (test_bb, insn)
3273 /* Skip over notes etc. */
3274 if (!active_insn_p (insn))
3277 /* We only handle SET insns. */
3278 rtx set = single_set (insn);
3279 if (set == NULL_RTX)
3282 rtx dest = SET_DEST (set);
3283 rtx src = SET_SRC (set);
3285 /* We can possibly relax this, but for now only handle REG to REG
3286 moves. This avoids any issues that might come from introducing
3287 loads/stores that might violate data-race-freedom guarantees. */
3288 if (!(REG_P (src) && REG_P (dest)))
3291 /* Destination must be appropriate for a conditional write. */
3292 if (!noce_operand_ok (dest))
3295 /* We must be able to conditionally move in this mode. */
3296 if (!can_conditionally_move_p (GET_MODE (dest)))
3302 /* FORNOW: Our cost model is a count of the number of instructions we
3303 would if-convert. This is suboptimal, and should be improved as part
3304 of a wider rework of branch_cost. */
3305 if (count > ii->branch_cost)
3311 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3312 it without using conditional execution. Return TRUE if we were successful
3313 at converting the block. */
3316 noce_process_if_block (struct noce_if_info *if_info)
3318 basic_block test_bb = if_info->test_bb; /* test block */
3319 basic_block then_bb = if_info->then_bb; /* THEN */
3320 basic_block else_bb = if_info->else_bb; /* ELSE or NULL */
3321 basic_block join_bb = if_info->join_bb; /* JOIN */
3322 rtx_insn *jump = if_info->jump;
3323 rtx cond = if_info->cond;
3324 rtx_insn *insn_a, *insn_b;
3326 rtx orig_x, x, a, b;
3328 /* We're looking for patterns of the form
3330 (1) if (...) x = a; else x = b;
3331 (2) x = b; if (...) x = a;
3332 (3) if (...) x = a; // as if with an initial x = x.
3333 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3334 The later patterns require jumps to be more expensive.
3335 For the if (...) x = a; else x = b; case we allow multiple insns
3336 inside the then and else blocks as long as their only effect is
3337 to calculate a value for x.
3338 ??? For future expansion, further expand the "multiple X" rules. */
3340 /* First look for multiple SETS. */
3342 && HAVE_conditional_move
3344 && bb_ok_for_noce_convert_multiple_sets (then_bb, if_info))
3346 if (noce_convert_multiple_sets (if_info))
3350 if (! bb_valid_for_noce_process_p (then_bb, cond, &if_info->then_cost,
3351 &if_info->then_simple))
3355 && ! bb_valid_for_noce_process_p (else_bb, cond, &if_info->else_cost,
3356 &if_info->else_simple))
3359 insn_a = last_active_insn (then_bb, FALSE);
3360 set_a = single_set (insn_a);
3363 x = SET_DEST (set_a);
3364 a = SET_SRC (set_a);
3366 /* Look for the other potential set. Make sure we've got equivalent
3368 /* ??? This is overconservative. Storing to two different mems is
3369 as easy as conditionally computing the address. Storing to a
3370 single mem merely requires a scratch memory to use as one of the
3371 destination addresses; often the memory immediately below the
3372 stack pointer is available for this. */
3376 insn_b = last_active_insn (else_bb, FALSE);
3377 set_b = single_set (insn_b);
3380 if (!rtx_interchangeable_p (x, SET_DEST (set_b)))
3385 insn_b = prev_nonnote_nondebug_insn (if_info->cond_earliest);
3386 /* We're going to be moving the evaluation of B down from above
3387 COND_EARLIEST to JUMP. Make sure the relevant data is still
3390 || BLOCK_FOR_INSN (insn_b) != BLOCK_FOR_INSN (if_info->cond_earliest)
3391 || !NONJUMP_INSN_P (insn_b)
3392 || (set_b = single_set (insn_b)) == NULL_RTX
3393 || ! rtx_interchangeable_p (x, SET_DEST (set_b))
3394 || ! noce_operand_ok (SET_SRC (set_b))
3395 || reg_overlap_mentioned_p (x, SET_SRC (set_b))
3396 || modified_between_p (SET_SRC (set_b), insn_b, jump)
3397 /* Avoid extending the lifetime of hard registers on small
3398 register class machines. */
3399 || (REG_P (SET_SRC (set_b))
3400 && HARD_REGISTER_P (SET_SRC (set_b))
3401 && targetm.small_register_classes_for_mode_p
3402 (GET_MODE (SET_SRC (set_b))))
3403 /* Likewise with X. In particular this can happen when
3404 noce_get_condition looks farther back in the instruction
3405 stream than one might expect. */
3406 || reg_overlap_mentioned_p (x, cond)
3407 || reg_overlap_mentioned_p (x, a)
3408 || modified_between_p (x, insn_b, jump))
3415 /* If x has side effects then only the if-then-else form is safe to
3416 convert. But even in that case we would need to restore any notes
3417 (such as REG_INC) at then end. That can be tricky if
3418 noce_emit_move_insn expands to more than one insn, so disable the
3419 optimization entirely for now if there are side effects. */
3420 if (side_effects_p (x))
3423 b = (set_b ? SET_SRC (set_b) : x);
3425 /* Only operate on register destinations, and even then avoid extending
3426 the lifetime of hard registers on small register class machines. */
3429 || (HARD_REGISTER_P (x)
3430 && targetm.small_register_classes_for_mode_p (GET_MODE (x))))
3432 if (GET_MODE (x) == BLKmode)
3435 if (GET_CODE (x) == ZERO_EXTRACT
3436 && (!CONST_INT_P (XEXP (x, 1))
3437 || !CONST_INT_P (XEXP (x, 2))))
3440 x = gen_reg_rtx (GET_MODE (GET_CODE (x) == STRICT_LOW_PART
3441 ? XEXP (x, 0) : x));
3444 /* Don't operate on sources that may trap or are volatile. */
3445 if (! noce_operand_ok (a) || ! noce_operand_ok (b))
3449 /* Set up the info block for our subroutines. */
3450 if_info->insn_a = insn_a;
3451 if_info->insn_b = insn_b;
3456 /* Try optimizations in some approximation of a useful order. */
3457 /* ??? Should first look to see if X is live incoming at all. If it
3458 isn't, we don't need anything but an unconditional set. */
3460 /* Look and see if A and B are really the same. Avoid creating silly
3461 cmove constructs that no one will fix up later. */
3462 if (noce_simple_bbs (if_info)
3463 && rtx_interchangeable_p (a, b))
3465 /* If we have an INSN_B, we don't have to create any new rtl. Just
3466 move the instruction that we already have. If we don't have an
3467 INSN_B, that means that A == X, and we've got a noop move. In
3468 that case don't do anything and let the code below delete INSN_A. */
3469 if (insn_b && else_bb)
3473 if (else_bb && insn_b == BB_END (else_bb))
3474 BB_END (else_bb) = PREV_INSN (insn_b);
3475 reorder_insns (insn_b, insn_b, PREV_INSN (jump));
3477 /* If there was a REG_EQUAL note, delete it since it may have been
3478 true due to this insn being after a jump. */
3479 if ((note = find_reg_note (insn_b, REG_EQUAL, NULL_RTX)) != 0)
3480 remove_note (insn_b, note);
3484 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3485 x must be executed twice. */
3486 else if (insn_b && side_effects_p (orig_x))
3493 if (!set_b && MEM_P (orig_x))
3494 /* We want to avoid store speculation to avoid cases like
3495 if (pthread_mutex_trylock(mutex))
3497 Rather than go to much effort here, we rely on the SSA optimizers,
3498 which do a good enough job these days. */
3501 if (noce_try_move (if_info))
3503 if (noce_try_store_flag (if_info))
3505 if (noce_try_bitop (if_info))
3507 if (noce_try_minmax (if_info))
3509 if (noce_try_abs (if_info))
3511 if (noce_try_inverse_constants (if_info))
3513 if (!targetm.have_conditional_execution ()
3514 && noce_try_store_flag_constants (if_info))
3516 if (HAVE_conditional_move
3517 && noce_try_cmove (if_info))
3519 if (! targetm.have_conditional_execution ())
3521 if (noce_try_addcc (if_info))
3523 if (noce_try_store_flag_mask (if_info))
3525 if (HAVE_conditional_move
3526 && noce_try_cmove_arith (if_info))
3528 if (noce_try_sign_mask (if_info))
3532 if (!else_bb && set_b)
3544 /* If we used a temporary, fix it up now. */
3550 noce_emit_move_insn (orig_x, x);
3552 set_used_flags (orig_x);
3553 unshare_all_rtl_in_chain (seq);
3556 emit_insn_before_setloc (seq, BB_END (test_bb), INSN_LOCATION (insn_a));
3559 /* The original THEN and ELSE blocks may now be removed. The test block
3560 must now jump to the join block. If the test block and the join block
3561 can be merged, do so. */
3564 delete_basic_block (else_bb);
3568 remove_edge (find_edge (test_bb, join_bb));
3570 remove_edge (find_edge (then_bb, join_bb));
3571 redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb);
3572 delete_basic_block (then_bb);
3575 if (can_merge_blocks_p (test_bb, join_bb))
3577 merge_blocks (test_bb, join_bb);
3581 num_updated_if_blocks++;
3585 /* Check whether a block is suitable for conditional move conversion.
3586 Every insn must be a simple set of a register to a constant or a
3587 register. For each assignment, store the value in the pointer map
3588 VALS, keyed indexed by register pointer, then store the register
3589 pointer in REGS. COND is the condition we will test. */
3592 check_cond_move_block (basic_block bb,
3593 hash_map<rtx, rtx> *vals,
3598 rtx cc = cc_in_cond (cond);
3600 /* We can only handle simple jumps at the end of the basic block.
3601 It is almost impossible to update the CFG otherwise. */
3603 if (JUMP_P (insn) && !onlyjump_p (insn))
3606 FOR_BB_INSNS (bb, insn)
3610 if (!NONDEBUG_INSN_P (insn) || JUMP_P (insn))
3612 set = single_set (insn);
3616 dest = SET_DEST (set);
3617 src = SET_SRC (set);
3619 || (HARD_REGISTER_P (dest)
3620 && targetm.small_register_classes_for_mode_p (GET_MODE (dest))))
3623 if (!CONSTANT_P (src) && !register_operand (src, VOIDmode))
3626 if (side_effects_p (src) || side_effects_p (dest))
3629 if (may_trap_p (src) || may_trap_p (dest))
3632 /* Don't try to handle this if the source register was
3633 modified earlier in the block. */
3636 || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src))
3637 && vals->get (SUBREG_REG (src))))
3640 /* Don't try to handle this if the destination register was
3641 modified earlier in the block. */
3642 if (vals->get (dest))
3645 /* Don't try to handle this if the condition uses the
3646 destination register. */
3647 if (reg_overlap_mentioned_p (dest, cond))
3650 /* Don't try to handle this if the source register is modified
3651 later in the block. */
3652 if (!CONSTANT_P (src)
3653 && modified_between_p (src, insn, NEXT_INSN (BB_END (bb))))
3656 /* Skip it if the instruction to be moved might clobber CC. */
3657 if (cc && set_of (cc, insn))
3660 vals->put (dest, src);
3662 regs->safe_push (dest);
3668 /* Given a basic block BB suitable for conditional move conversion,
3669 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3670 the register values depending on COND, emit the insns in the block as
3671 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3672 processed. The caller has started a sequence for the conversion.
3673 Return true if successful, false if something goes wrong. */
3676 cond_move_convert_if_block (struct noce_if_info *if_infop,
3677 basic_block bb, rtx cond,
3678 hash_map<rtx, rtx> *then_vals,
3679 hash_map<rtx, rtx> *else_vals,
3684 rtx cond_arg0, cond_arg1;
3686 code = GET_CODE (cond);
3687 cond_arg0 = XEXP (cond, 0);
3688 cond_arg1 = XEXP (cond, 1);
3690 FOR_BB_INSNS (bb, insn)
3692 rtx set, target, dest, t, e;
3694 /* ??? Maybe emit conditional debug insn? */
3695 if (!NONDEBUG_INSN_P (insn) || JUMP_P (insn))
3697 set = single_set (insn);
3698 gcc_assert (set && REG_P (SET_DEST (set)));
3700 dest = SET_DEST (set);
3702 rtx *then_slot = then_vals->get (dest);
3703 rtx *else_slot = else_vals->get (dest);
3704 t = then_slot ? *then_slot : NULL_RTX;
3705 e = else_slot ? *else_slot : NULL_RTX;
3709 /* If this register was set in the then block, we already
3710 handled this case there. */
3723 target = noce_emit_cmove (if_infop, dest, code, cond_arg0, cond_arg1,
3729 noce_emit_move_insn (dest, target);
3735 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3736 it using only conditional moves. Return TRUE if we were successful at
3737 converting the block. */
3740 cond_move_process_if_block (struct noce_if_info *if_info)
3742 basic_block test_bb = if_info->test_bb;
3743 basic_block then_bb = if_info->then_bb;
3744 basic_block else_bb = if_info->else_bb;
3745 basic_block join_bb = if_info->join_bb;
3746 rtx_insn *jump = if_info->jump;
3747 rtx cond = if_info->cond;
3748 rtx_insn *seq, *loc_insn;
3751 vec<rtx> then_regs = vNULL;
3752 vec<rtx> else_regs = vNULL;
3754 int success_p = FALSE;
3756 /* Build a mapping for each block to the value used for each
3758 hash_map<rtx, rtx> then_vals;
3759 hash_map<rtx, rtx> else_vals;
3761 /* Make sure the blocks are suitable. */
3762 if (!check_cond_move_block (then_bb, &then_vals, &then_regs, cond)
3764 && !check_cond_move_block (else_bb, &else_vals, &else_regs, cond)))
3767 /* Make sure the blocks can be used together. If the same register
3768 is set in both blocks, and is not set to a constant in both
3769 cases, then both blocks must set it to the same register. We
3770 have already verified that if it is set to a register, that the
3771 source register does not change after the assignment. Also count
3772 the number of registers set in only one of the blocks. */
3774 FOR_EACH_VEC_ELT (then_regs, i, reg)
3776 rtx *then_slot = then_vals.get (reg);
3777 rtx *else_slot = else_vals.get (reg);
3779 gcc_checking_assert (then_slot);
3784 rtx then_val = *then_slot;
3785 rtx else_val = *else_slot;
3786 if (!CONSTANT_P (then_val) && !CONSTANT_P (else_val)
3787 && !rtx_equal_p (then_val, else_val))
3792 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3793 FOR_EACH_VEC_ELT (else_regs, i, reg)
3795 gcc_checking_assert (else_vals.get (reg));
3796 if (!then_vals.get (reg))
3800 /* Make sure it is reasonable to convert this block. What matters
3801 is the number of assignments currently made in only one of the
3802 branches, since if we convert we are going to always execute
3804 if (c > MAX_CONDITIONAL_EXECUTE)
3807 /* Try to emit the conditional moves. First do the then block,
3808 then do anything left in the else blocks. */
3810 if (!cond_move_convert_if_block (if_info, then_bb, cond,
3811 &then_vals, &else_vals, false)
3813 && !cond_move_convert_if_block (if_info, else_bb, cond,
3814 &then_vals, &else_vals, true)))
3819 seq = end_ifcvt_sequence (if_info);
3823 loc_insn = first_active_insn (then_bb);
3826 loc_insn = first_active_insn (else_bb);
3827 gcc_assert (loc_insn);
3829 emit_insn_before_setloc (seq, jump, INSN_LOCATION (loc_insn));
3833 delete_basic_block (else_bb);
3837 remove_edge (find_edge (test_bb, join_bb));
3839 remove_edge (find_edge (then_bb, join_bb));
3840 redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb);
3841 delete_basic_block (then_bb);
3844 if (can_merge_blocks_p (test_bb, join_bb))
3846 merge_blocks (test_bb, join_bb);
3850 num_updated_if_blocks++;
3855 then_regs.release ();
3856 else_regs.release ();
3861 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3862 IF-THEN-ELSE-JOIN block.
3864 If so, we'll try to convert the insns to not require the branch,
3865 using only transformations that do not require conditional execution.
3867 Return TRUE if we were successful at converting the block. */
3870 noce_find_if_block (basic_block test_bb, edge then_edge, edge else_edge,
3873 basic_block then_bb, else_bb, join_bb;
3874 bool then_else_reversed = false;
3877 rtx_insn *cond_earliest;
3878 struct noce_if_info if_info;
3880 /* We only ever should get here before reload. */
3881 gcc_assert (!reload_completed);
3883 /* Recognize an IF-THEN-ELSE-JOIN block. */
3884 if (single_pred_p (then_edge->dest)
3885 && single_succ_p (then_edge->dest)
3886 && single_pred_p (else_edge->dest)
3887 && single_succ_p (else_edge->dest)
3888 && single_succ (then_edge->dest) == single_succ (else_edge->dest))
3890 then_bb = then_edge->dest;
3891 else_bb = else_edge->dest;
3892 join_bb = single_succ (then_bb);
3894 /* Recognize an IF-THEN-JOIN block. */
3895 else if (single_pred_p (then_edge->dest)
3896 && single_succ_p (then_edge->dest)
3897 && single_succ (then_edge->dest) == else_edge->dest)
3899 then_bb = then_edge->dest;
3900 else_bb = NULL_BLOCK;
3901 join_bb = else_edge->dest;
3903 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3904 of basic blocks in cfglayout mode does not matter, so the fallthrough
3905 edge can go to any basic block (and not just to bb->next_bb, like in
3907 else if (single_pred_p (else_edge->dest)
3908 && single_succ_p (else_edge->dest)
3909 && single_succ (else_edge->dest) == then_edge->dest)
3911 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3912 To make this work, we have to invert the THEN and ELSE blocks
3913 and reverse the jump condition. */
3914 then_bb = else_edge->dest;
3915 else_bb = NULL_BLOCK;
3916 join_bb = single_succ (then_bb);
3917 then_else_reversed = true;
3920 /* Not a form we can handle. */
3923 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3924 if (single_succ_edge (then_bb)->flags & EDGE_COMPLEX)
3927 && single_succ_edge (else_bb)->flags & EDGE_COMPLEX)
3930 num_possible_if_blocks++;
3935 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3936 (else_bb) ? "-ELSE" : "",
3937 pass, test_bb->index, then_bb->index);
3940 fprintf (dump_file, ", else %d", else_bb->index);
3942 fprintf (dump_file, ", join %d\n", join_bb->index);
3945 /* If the conditional jump is more than just a conditional
3946 jump, then we can not do if-conversion on this block. */
3947 jump = BB_END (test_bb);
3948 if (! onlyjump_p (jump))
3951 /* If this is not a standard conditional jump, we can't parse it. */
3952 cond = noce_get_condition (jump, &cond_earliest, then_else_reversed);
3956 /* We must be comparing objects whose modes imply the size. */
3957 if (GET_MODE (XEXP (cond, 0)) == BLKmode)
3960 /* Initialize an IF_INFO struct to pass around. */
3961 memset (&if_info, 0, sizeof if_info);
3962 if_info.test_bb = test_bb;
3963 if_info.then_bb = then_bb;
3964 if_info.else_bb = else_bb;
3965 if_info.join_bb = join_bb;
3966 if_info.cond = cond;
3967 if_info.cond_earliest = cond_earliest;
3968 if_info.jump = jump;
3969 if_info.then_else_reversed = then_else_reversed;
3970 if_info.branch_cost = BRANCH_COST (optimize_bb_for_speed_p (test_bb),
3971 predictable_edge_p (then_edge));
3973 /* Do the real work. */
3975 if (noce_process_if_block (&if_info))
3978 if (HAVE_conditional_move
3979 && cond_move_process_if_block (&if_info))
3986 /* Merge the blocks and mark for local life update. */
3989 merge_if_block (struct ce_if_block * ce_info)
3991 basic_block test_bb = ce_info->test_bb; /* last test block */
3992 basic_block then_bb = ce_info->then_bb; /* THEN */
3993 basic_block else_bb = ce_info->else_bb; /* ELSE or NULL */
3994 basic_block join_bb = ce_info->join_bb; /* join block */
3995 basic_block combo_bb;
3997 /* All block merging is done into the lower block numbers. */
4000 df_set_bb_dirty (test_bb);
4002 /* Merge any basic blocks to handle && and || subtests. Each of
4003 the blocks are on the fallthru path from the predecessor block. */
4004 if (ce_info->num_multiple_test_blocks > 0)
4006 basic_block bb = test_bb;
4007 basic_block last_test_bb = ce_info->last_test_bb;
4008 basic_block fallthru = block_fallthru (bb);
4013 fallthru = block_fallthru (bb);
4014 merge_blocks (combo_bb, bb);
4017 while (bb != last_test_bb);
4020 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4021 label, but it might if there were || tests. That label's count should be
4022 zero, and it normally should be removed. */
4026 /* If THEN_BB has no successors, then there's a BARRIER after it.
4027 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4028 is no longer needed, and in fact it is incorrect to leave it in
4030 if (EDGE_COUNT (then_bb->succs) == 0
4031 && EDGE_COUNT (combo_bb->succs) > 1)
4033 rtx_insn *end = NEXT_INSN (BB_END (then_bb));
4034 while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end))
4035 end = NEXT_INSN (end);
4037 if (end && BARRIER_P (end))
4040 merge_blocks (combo_bb, then_bb);
4044 /* The ELSE block, if it existed, had a label. That label count
4045 will almost always be zero, but odd things can happen when labels
4046 get their addresses taken. */
4049 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4050 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4051 is no longer needed, and in fact it is incorrect to leave it in
4053 if (EDGE_COUNT (else_bb->succs) == 0
4054 && EDGE_COUNT (combo_bb->succs) > 1)
4056 rtx_insn *end = NEXT_INSN (BB_END (else_bb));
4057 while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end))
4058 end = NEXT_INSN (end);
4060 if (end && BARRIER_P (end))
4063 merge_blocks (combo_bb, else_bb);
4067 /* If there was no join block reported, that means it was not adjacent
4068 to the others, and so we cannot merge them. */
4072 rtx_insn *last = BB_END (combo_bb);
4074 /* The outgoing edge for the current COMBO block should already
4075 be correct. Verify this. */
4076 if (EDGE_COUNT (combo_bb->succs) == 0)
4077 gcc_assert (find_reg_note (last, REG_NORETURN, NULL)
4078 || (NONJUMP_INSN_P (last)
4079 && GET_CODE (PATTERN (last)) == TRAP_IF
4080 && (TRAP_CONDITION (PATTERN (last))
4081 == const_true_rtx)));
4084 /* There should still be something at the end of the THEN or ELSE
4085 blocks taking us to our final destination. */
4086 gcc_assert (JUMP_P (last)
4087 || (EDGE_SUCC (combo_bb, 0)->dest
4088 == EXIT_BLOCK_PTR_FOR_FN (cfun)
4090 && SIBLING_CALL_P (last))
4091 || ((EDGE_SUCC (combo_bb, 0)->flags & EDGE_EH)
4092 && can_throw_internal (last)));
4095 /* The JOIN block may have had quite a number of other predecessors too.
4096 Since we've already merged the TEST, THEN and ELSE blocks, we should
4097 have only one remaining edge from our if-then-else diamond. If there
4098 is more than one remaining edge, it must come from elsewhere. There
4099 may be zero incoming edges if the THEN block didn't actually join
4100 back up (as with a call to a non-return function). */
4101 else if (EDGE_COUNT (join_bb->preds) < 2
4102 && join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
4104 /* We can merge the JOIN cleanly and update the dataflow try
4105 again on this pass.*/
4106 merge_blocks (combo_bb, join_bb);
4111 /* We cannot merge the JOIN. */
4113 /* The outgoing edge for the current COMBO block should already
4114 be correct. Verify this. */
4115 gcc_assert (single_succ_p (combo_bb)
4116 && single_succ (combo_bb) == join_bb);
4118 /* Remove the jump and cruft from the end of the COMBO block. */
4119 if (join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
4120 tidy_fallthru_edge (single_succ_edge (combo_bb));
4123 num_updated_if_blocks++;
4126 /* Find a block ending in a simple IF condition and try to transform it
4127 in some way. When converting a multi-block condition, put the new code
4128 in the first such block and delete the rest. Return a pointer to this
4129 first block if some transformation was done. Return NULL otherwise. */
4132 find_if_header (basic_block test_bb, int pass)
4134 ce_if_block ce_info;
4138 /* The kind of block we're looking for has exactly two successors. */
4139 if (EDGE_COUNT (test_bb->succs) != 2)
4142 then_edge = EDGE_SUCC (test_bb, 0);
4143 else_edge = EDGE_SUCC (test_bb, 1);
4145 if (df_get_bb_dirty (then_edge->dest))
4147 if (df_get_bb_dirty (else_edge->dest))
4150 /* Neither edge should be abnormal. */
4151 if ((then_edge->flags & EDGE_COMPLEX)
4152 || (else_edge->flags & EDGE_COMPLEX))
4155 /* Nor exit the loop. */
4156 if ((then_edge->flags & EDGE_LOOP_EXIT)
4157 || (else_edge->flags & EDGE_LOOP_EXIT))
4160 /* The THEN edge is canonically the one that falls through. */
4161 if (then_edge->flags & EDGE_FALLTHRU)
4163 else if (else_edge->flags & EDGE_FALLTHRU)
4164 std::swap (then_edge, else_edge);
4166 /* Otherwise this must be a multiway branch of some sort. */
4169 memset (&ce_info, 0, sizeof (ce_info));
4170 ce_info.test_bb = test_bb;
4171 ce_info.then_bb = then_edge->dest;
4172 ce_info.else_bb = else_edge->dest;
4173 ce_info.pass = pass;
4175 #ifdef IFCVT_MACHDEP_INIT
4176 IFCVT_MACHDEP_INIT (&ce_info);
4179 if (!reload_completed
4180 && noce_find_if_block (test_bb, then_edge, else_edge, pass))
4183 if (reload_completed
4184 && targetm.have_conditional_execution ()
4185 && cond_exec_find_if_block (&ce_info))
4188 if (targetm.have_trap ()
4189 && optab_handler (ctrap_optab, word_mode) != CODE_FOR_nothing
4190 && find_cond_trap (test_bb, then_edge, else_edge))
4193 if (dom_info_state (CDI_POST_DOMINATORS) >= DOM_NO_FAST_QUERY
4194 && (reload_completed || !targetm.have_conditional_execution ()))
4196 if (find_if_case_1 (test_bb, then_edge, else_edge))
4198 if (find_if_case_2 (test_bb, then_edge, else_edge))
4206 fprintf (dump_file, "Conversion succeeded on pass %d.\n", pass);
4207 /* Set this so we continue looking. */
4208 cond_exec_changed_p = TRUE;
4209 return ce_info.test_bb;
4212 /* Return true if a block has two edges, one of which falls through to the next
4213 block, and the other jumps to a specific block, so that we can tell if the
4214 block is part of an && test or an || test. Returns either -1 or the number
4215 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4218 block_jumps_and_fallthru_p (basic_block cur_bb, basic_block target_bb)
4221 int fallthru_p = FALSE;
4228 if (!cur_bb || !target_bb)
4231 /* If no edges, obviously it doesn't jump or fallthru. */
4232 if (EDGE_COUNT (cur_bb->succs) == 0)
4235 FOR_EACH_EDGE (cur_edge, ei, cur_bb->succs)
4237 if (cur_edge->flags & EDGE_COMPLEX)
4238 /* Anything complex isn't what we want. */
4241 else if (cur_edge->flags & EDGE_FALLTHRU)
4244 else if (cur_edge->dest == target_bb)
4251 if ((jump_p & fallthru_p) == 0)
4254 /* Don't allow calls in the block, since this is used to group && and ||
4255 together for conditional execution support. ??? we should support
4256 conditional execution support across calls for IA-64 some day, but
4257 for now it makes the code simpler. */
4258 end = BB_END (cur_bb);
4259 insn = BB_HEAD (cur_bb);
4261 while (insn != NULL_RTX)
4268 && !DEBUG_INSN_P (insn)
4269 && GET_CODE (PATTERN (insn)) != USE
4270 && GET_CODE (PATTERN (insn)) != CLOBBER)
4276 insn = NEXT_INSN (insn);
4282 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4283 block. If so, we'll try to convert the insns to not require the branch.
4284 Return TRUE if we were successful at converting the block. */
4287 cond_exec_find_if_block (struct ce_if_block * ce_info)
4289 basic_block test_bb = ce_info->test_bb;
4290 basic_block then_bb = ce_info->then_bb;
4291 basic_block else_bb = ce_info->else_bb;
4292 basic_block join_bb = NULL_BLOCK;
4297 ce_info->last_test_bb = test_bb;
4299 /* We only ever should get here after reload,
4300 and if we have conditional execution. */
4301 gcc_assert (reload_completed && targetm.have_conditional_execution ());
4303 /* Discover if any fall through predecessors of the current test basic block
4304 were && tests (which jump to the else block) or || tests (which jump to
4306 if (single_pred_p (test_bb)
4307 && single_pred_edge (test_bb)->flags == EDGE_FALLTHRU)
4309 basic_block bb = single_pred (test_bb);
4310 basic_block target_bb;
4311 int max_insns = MAX_CONDITIONAL_EXECUTE;
4314 /* Determine if the preceding block is an && or || block. */
4315 if ((n_insns = block_jumps_and_fallthru_p (bb, else_bb)) >= 0)
4317 ce_info->and_and_p = TRUE;
4318 target_bb = else_bb;
4320 else if ((n_insns = block_jumps_and_fallthru_p (bb, then_bb)) >= 0)
4322 ce_info->and_and_p = FALSE;
4323 target_bb = then_bb;
4326 target_bb = NULL_BLOCK;
4328 if (target_bb && n_insns <= max_insns)
4330 int total_insns = 0;
4333 ce_info->last_test_bb = test_bb;
4335 /* Found at least one && or || block, look for more. */
4338 ce_info->test_bb = test_bb = bb;
4339 total_insns += n_insns;
4342 if (!single_pred_p (bb))
4345 bb = single_pred (bb);
4346 n_insns = block_jumps_and_fallthru_p (bb, target_bb);
4348 while (n_insns >= 0 && (total_insns + n_insns) <= max_insns);
4350 ce_info->num_multiple_test_blocks = blocks;
4351 ce_info->num_multiple_test_insns = total_insns;
4353 if (ce_info->and_and_p)
4354 ce_info->num_and_and_blocks = blocks;
4356 ce_info->num_or_or_blocks = blocks;
4360 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4361 other than any || blocks which jump to the THEN block. */
4362 if ((EDGE_COUNT (then_bb->preds) - ce_info->num_or_or_blocks) != 1)
4365 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4366 FOR_EACH_EDGE (cur_edge, ei, then_bb->preds)
4368 if (cur_edge->flags & EDGE_COMPLEX)
4372 FOR_EACH_EDGE (cur_edge, ei, else_bb->preds)
4374 if (cur_edge->flags & EDGE_COMPLEX)
4378 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4379 if (EDGE_COUNT (then_bb->succs) > 0
4380 && (!single_succ_p (then_bb)
4381 || (single_succ_edge (then_bb)->flags & EDGE_COMPLEX)
4382 || (epilogue_completed
4383 && tablejump_p (BB_END (then_bb), NULL, NULL))))
4386 /* If the THEN block has no successors, conditional execution can still
4387 make a conditional call. Don't do this unless the ELSE block has
4388 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4389 Check for the last insn of the THEN block being an indirect jump, which
4390 is listed as not having any successors, but confuses the rest of the CE
4391 code processing. ??? we should fix this in the future. */
4392 if (EDGE_COUNT (then_bb->succs) == 0)
4394 if (single_pred_p (else_bb) && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
4396 rtx_insn *last_insn = BB_END (then_bb);
4399 && NOTE_P (last_insn)
4400 && last_insn != BB_HEAD (then_bb))
4401 last_insn = PREV_INSN (last_insn);
4404 && JUMP_P (last_insn)
4405 && ! simplejump_p (last_insn))
4409 else_bb = NULL_BLOCK;
4415 /* If the THEN block's successor is the other edge out of the TEST block,
4416 then we have an IF-THEN combo without an ELSE. */
4417 else if (single_succ (then_bb) == else_bb)
4420 else_bb = NULL_BLOCK;
4423 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4424 has exactly one predecessor and one successor, and the outgoing edge
4425 is not complex, then we have an IF-THEN-ELSE combo. */
4426 else if (single_succ_p (else_bb)
4427 && single_succ (then_bb) == single_succ (else_bb)
4428 && single_pred_p (else_bb)
4429 && !(single_succ_edge (else_bb)->flags & EDGE_COMPLEX)
4430 && !(epilogue_completed
4431 && tablejump_p (BB_END (else_bb), NULL, NULL)))
4432 join_bb = single_succ (else_bb);
4434 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4438 num_possible_if_blocks++;
4443 "\nIF-THEN%s block found, pass %d, start block %d "
4444 "[insn %d], then %d [%d]",
4445 (else_bb) ? "-ELSE" : "",
4448 BB_HEAD (test_bb) ? (int)INSN_UID (BB_HEAD (test_bb)) : -1,
4450 BB_HEAD (then_bb) ? (int)INSN_UID (BB_HEAD (then_bb)) : -1);
4453 fprintf (dump_file, ", else %d [%d]",
4455 BB_HEAD (else_bb) ? (int)INSN_UID (BB_HEAD (else_bb)) : -1);
4457 fprintf (dump_file, ", join %d [%d]",
4459 BB_HEAD (join_bb) ? (int)INSN_UID (BB_HEAD (join_bb)) : -1);
4461 if (ce_info->num_multiple_test_blocks > 0)
4462 fprintf (dump_file, ", %d %s block%s last test %d [%d]",
4463 ce_info->num_multiple_test_blocks,
4464 (ce_info->and_and_p) ? "&&" : "||",
4465 (ce_info->num_multiple_test_blocks == 1) ? "" : "s",
4466 ce_info->last_test_bb->index,
4467 ((BB_HEAD (ce_info->last_test_bb))
4468 ? (int)INSN_UID (BB_HEAD (ce_info->last_test_bb))
4471 fputc ('\n', dump_file);
4474 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4475 first condition for free, since we've already asserted that there's a
4476 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4477 we checked the FALLTHRU flag, those are already adjacent to the last IF
4479 /* ??? As an enhancement, move the ELSE block. Have to deal with
4480 BLOCK notes, if by no other means than backing out the merge if they
4481 exist. Sticky enough I don't want to think about it now. */
4483 if (else_bb && (next = next->next_bb) != else_bb)
4485 if ((next = next->next_bb) != join_bb
4486 && join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
4494 /* Do the real work. */
4496 ce_info->else_bb = else_bb;
4497 ce_info->join_bb = join_bb;
4499 /* If we have && and || tests, try to first handle combining the && and ||
4500 tests into the conditional code, and if that fails, go back and handle
4501 it without the && and ||, which at present handles the && case if there
4502 was no ELSE block. */
4503 if (cond_exec_process_if_block (ce_info, TRUE))
4506 if (ce_info->num_multiple_test_blocks)
4510 if (cond_exec_process_if_block (ce_info, FALSE))
4517 /* Convert a branch over a trap, or a branch
4518 to a trap, into a conditional trap. */
4521 find_cond_trap (basic_block test_bb, edge then_edge, edge else_edge)
4523 basic_block then_bb = then_edge->dest;
4524 basic_block else_bb = else_edge->dest;
4525 basic_block other_bb, trap_bb;
4526 rtx_insn *trap, *jump;
4528 rtx_insn *cond_earliest;
4531 /* Locate the block with the trap instruction. */
4532 /* ??? While we look for no successors, we really ought to allow
4533 EH successors. Need to fix merge_if_block for that to work. */
4534 if ((trap = block_has_only_trap (then_bb)) != NULL)
4535 trap_bb = then_bb, other_bb = else_bb;
4536 else if ((trap = block_has_only_trap (else_bb)) != NULL)
4537 trap_bb = else_bb, other_bb = then_bb;
4543 fprintf (dump_file, "\nTRAP-IF block found, start %d, trap %d\n",
4544 test_bb->index, trap_bb->index);
4547 /* If this is not a standard conditional jump, we can't parse it. */
4548 jump = BB_END (test_bb);
4549 cond = noce_get_condition (jump, &cond_earliest, false);
4553 /* If the conditional jump is more than just a conditional jump, then
4554 we can not do if-conversion on this block. */
4555 if (! onlyjump_p (jump))
4558 /* We must be comparing objects whose modes imply the size. */
4559 if (GET_MODE (XEXP (cond, 0)) == BLKmode)
4562 /* Reverse the comparison code, if necessary. */
4563 code = GET_CODE (cond);
4564 if (then_bb == trap_bb)
4566 code = reversed_comparison_code (cond, jump);
4567 if (code == UNKNOWN)
4571 /* Attempt to generate the conditional trap. */
4572 rtx_insn *seq = gen_cond_trap (code, copy_rtx (XEXP (cond, 0)),
4573 copy_rtx (XEXP (cond, 1)),
4574 TRAP_CODE (PATTERN (trap)));
4578 /* Emit the new insns before cond_earliest. */
4579 emit_insn_before_setloc (seq, cond_earliest, INSN_LOCATION (trap));
4581 /* Delete the trap block if possible. */
4582 remove_edge (trap_bb == then_bb ? then_edge : else_edge);
4583 df_set_bb_dirty (test_bb);
4584 df_set_bb_dirty (then_bb);
4585 df_set_bb_dirty (else_bb);
4587 if (EDGE_COUNT (trap_bb->preds) == 0)
4589 delete_basic_block (trap_bb);
4593 /* Wire together the blocks again. */
4594 if (current_ir_type () == IR_RTL_CFGLAYOUT)
4595 single_succ_edge (test_bb)->flags |= EDGE_FALLTHRU;
4596 else if (trap_bb == then_bb)
4598 rtx lab = JUMP_LABEL (jump);
4599 rtx_insn *seq = targetm.gen_jump (lab);
4600 rtx_jump_insn *newjump = emit_jump_insn_after (seq, jump);
4601 LABEL_NUSES (lab) += 1;
4602 JUMP_LABEL (newjump) = lab;
4603 emit_barrier_after (newjump);
4607 if (can_merge_blocks_p (test_bb, other_bb))
4609 merge_blocks (test_bb, other_bb);
4613 num_updated_if_blocks++;
4617 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4621 block_has_only_trap (basic_block bb)
4625 /* We're not the exit block. */
4626 if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
4629 /* The block must have no successors. */
4630 if (EDGE_COUNT (bb->succs) > 0)
4633 /* The only instruction in the THEN block must be the trap. */
4634 trap = first_active_insn (bb);
4635 if (! (trap == BB_END (bb)
4636 && GET_CODE (PATTERN (trap)) == TRAP_IF
4637 && TRAP_CONDITION (PATTERN (trap)) == const_true_rtx))
4643 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4644 transformable, but not necessarily the other. There need be no
4647 Return TRUE if we were successful at converting the block.
4649 Cases we'd like to look at:
4652 if (test) goto over; // x not live
4660 if (! test) goto label;
4663 if (test) goto E; // x not live
4677 (3) // This one's really only interesting for targets that can do
4678 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4679 // it results in multiple branches on a cache line, which often
4680 // does not sit well with predictors.
4682 if (test1) goto E; // predicted not taken
4698 (A) Don't do (2) if the branch is predicted against the block we're
4699 eliminating. Do it anyway if we can eliminate a branch; this requires
4700 that the sole successor of the eliminated block postdominate the other
4703 (B) With CE, on (3) we can steal from both sides of the if, creating
4712 Again, this is most useful if J postdominates.
4714 (C) CE substitutes for helpful life information.
4716 (D) These heuristics need a lot of work. */
4718 /* Tests for case 1 above. */
4721 find_if_case_1 (basic_block test_bb, edge then_edge, edge else_edge)
4723 basic_block then_bb = then_edge->dest;
4724 basic_block else_bb = else_edge->dest;
4726 int then_bb_index, then_prob;
4727 rtx else_target = NULL_RTX;
4729 /* If we are partitioning hot/cold basic blocks, we don't want to
4730 mess up unconditional or indirect jumps that cross between hot
4733 Basic block partitioning may result in some jumps that appear to
4734 be optimizable (or blocks that appear to be mergeable), but which really
4735 must be left untouched (they are required to make it safely across
4736 partition boundaries). See the comments at the top of
4737 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4739 if ((BB_END (then_bb)
4740 && JUMP_P (BB_END (then_bb))
4741 && CROSSING_JUMP_P (BB_END (then_bb)))
4742 || (BB_END (test_bb)
4743 && JUMP_P (BB_END (test_bb))
4744 && CROSSING_JUMP_P (BB_END (test_bb)))
4745 || (BB_END (else_bb)
4746 && JUMP_P (BB_END (else_bb))
4747 && CROSSING_JUMP_P (BB_END (else_bb))))
4750 /* THEN has one successor. */
4751 if (!single_succ_p (then_bb))
4754 /* THEN does not fall through, but is not strange either. */
4755 if (single_succ_edge (then_bb)->flags & (EDGE_COMPLEX | EDGE_FALLTHRU))
4758 /* THEN has one predecessor. */
4759 if (!single_pred_p (then_bb))
4762 /* THEN must do something. */
4763 if (forwarder_block_p (then_bb))
4766 num_possible_if_blocks++;
4769 "\nIF-CASE-1 found, start %d, then %d\n",
4770 test_bb->index, then_bb->index);
4772 if (then_edge->probability)
4773 then_prob = REG_BR_PROB_BASE - then_edge->probability;
4775 then_prob = REG_BR_PROB_BASE / 2;
4777 /* We're speculating from the THEN path, we want to make sure the cost
4778 of speculation is within reason. */
4779 if (! cheap_bb_rtx_cost_p (then_bb, then_prob,
4780 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge->src),
4781 predictable_edge_p (then_edge)))))
4784 if (else_bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
4786 rtx_insn *jump = BB_END (else_edge->src);
4787 gcc_assert (JUMP_P (jump));
4788 else_target = JUMP_LABEL (jump);
4791 /* Registers set are dead, or are predicable. */
4792 if (! dead_or_predicable (test_bb, then_bb, else_bb,
4793 single_succ_edge (then_bb), 1))
4796 /* Conversion went ok, including moving the insns and fixing up the
4797 jump. Adjust the CFG to match. */
4799 /* We can avoid creating a new basic block if then_bb is immediately
4800 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4801 through to else_bb. */
4803 if (then_bb->next_bb == else_bb
4804 && then_bb->prev_bb == test_bb
4805 && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
4807 redirect_edge_succ (FALLTHRU_EDGE (test_bb), else_bb);
4810 else if (else_bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
4811 new_bb = force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb),
4812 else_bb, else_target);
4814 new_bb = redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb),
4817 df_set_bb_dirty (test_bb);
4818 df_set_bb_dirty (else_bb);
4820 then_bb_index = then_bb->index;
4821 delete_basic_block (then_bb);
4823 /* Make rest of code believe that the newly created block is the THEN_BB
4824 block we removed. */
4827 df_bb_replace (then_bb_index, new_bb);
4828 /* This should have been done above via force_nonfallthru_and_redirect
4829 (possibly called from redirect_edge_and_branch_force). */
4830 gcc_checking_assert (BB_PARTITION (new_bb) == BB_PARTITION (test_bb));
4834 num_updated_if_blocks++;
4839 /* Test for case 2 above. */
4842 find_if_case_2 (basic_block test_bb, edge then_edge, edge else_edge)
4844 basic_block then_bb = then_edge->dest;
4845 basic_block else_bb = else_edge->dest;
4847 int then_prob, else_prob;
4849 /* We do not want to speculate (empty) loop latches. */
4851 && else_bb->loop_father->latch == else_bb)
4854 /* If we are partitioning hot/cold basic blocks, we don't want to
4855 mess up unconditional or indirect jumps that cross between hot
4858 Basic block partitioning may result in some jumps that appear to
4859 be optimizable (or blocks that appear to be mergeable), but which really
4860 must be left untouched (they are required to make it safely across
4861 partition boundaries). See the comments at the top of
4862 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4864 if ((BB_END (then_bb)
4865 && JUMP_P (BB_END (then_bb))
4866 && CROSSING_JUMP_P (BB_END (then_bb)))
4867 || (BB_END (test_bb)
4868 && JUMP_P (BB_END (test_bb))
4869 && CROSSING_JUMP_P (BB_END (test_bb)))
4870 || (BB_END (else_bb)
4871 && JUMP_P (BB_END (else_bb))
4872 && CROSSING_JUMP_P (BB_END (else_bb))))
4875 /* ELSE has one successor. */
4876 if (!single_succ_p (else_bb))
4879 else_succ = single_succ_edge (else_bb);
4881 /* ELSE outgoing edge is not complex. */
4882 if (else_succ->flags & EDGE_COMPLEX)
4885 /* ELSE has one predecessor. */
4886 if (!single_pred_p (else_bb))
4889 /* THEN is not EXIT. */
4890 if (then_bb->index < NUM_FIXED_BLOCKS)
4893 if (else_edge->probability)
4895 else_prob = else_edge->probability;
4896 then_prob = REG_BR_PROB_BASE - else_prob;
4900 else_prob = REG_BR_PROB_BASE / 2;
4901 then_prob = REG_BR_PROB_BASE / 2;
4904 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4905 if (else_prob > then_prob)
4907 else if (else_succ->dest->index < NUM_FIXED_BLOCKS
4908 || dominated_by_p (CDI_POST_DOMINATORS, then_bb,
4914 num_possible_if_blocks++;
4917 "\nIF-CASE-2 found, start %d, else %d\n",
4918 test_bb->index, else_bb->index);
4920 /* We're speculating from the ELSE path, we want to make sure the cost
4921 of speculation is within reason. */
4922 if (! cheap_bb_rtx_cost_p (else_bb, else_prob,
4923 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge->src),
4924 predictable_edge_p (else_edge)))))
4927 /* Registers set are dead, or are predicable. */
4928 if (! dead_or_predicable (test_bb, else_bb, then_bb, else_succ, 0))
4931 /* Conversion went ok, including moving the insns and fixing up the
4932 jump. Adjust the CFG to match. */
4934 df_set_bb_dirty (test_bb);
4935 df_set_bb_dirty (then_bb);
4936 delete_basic_block (else_bb);
4939 num_updated_if_blocks++;
4941 /* ??? We may now fallthru from one of THEN's successors into a join
4942 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4947 /* Used by the code above to perform the actual rtl transformations.
4948 Return TRUE if successful.
4950 TEST_BB is the block containing the conditional branch. MERGE_BB
4951 is the block containing the code to manipulate. DEST_EDGE is an
4952 edge representing a jump to the join block; after the conversion,
4953 TEST_BB should be branching to its destination.
4954 REVERSEP is true if the sense of the branch should be reversed. */
4957 dead_or_predicable (basic_block test_bb, basic_block merge_bb,
4958 basic_block other_bb, edge dest_edge, int reversep)
4960 basic_block new_dest = dest_edge->dest;
4961 rtx_insn *head, *end, *jump;
4962 rtx_insn *earliest = NULL;
4964 bitmap merge_set = NULL;
4965 /* Number of pending changes. */
4966 int n_validated_changes = 0;
4967 rtx new_dest_label = NULL_RTX;
4969 jump = BB_END (test_bb);
4971 /* Find the extent of the real code in the merge block. */
4972 head = BB_HEAD (merge_bb);
4973 end = BB_END (merge_bb);
4975 while (DEBUG_INSN_P (end) && end != head)
4976 end = PREV_INSN (end);
4978 /* If merge_bb ends with a tablejump, predicating/moving insn's
4979 into test_bb and then deleting merge_bb will result in the jumptable
4980 that follows merge_bb being removed along with merge_bb and then we
4981 get an unresolved reference to the jumptable. */
4982 if (tablejump_p (end, NULL, NULL))
4986 head = NEXT_INSN (head);
4987 while (DEBUG_INSN_P (head) && head != end)
4988 head = NEXT_INSN (head);
4996 head = NEXT_INSN (head);
4997 while (DEBUG_INSN_P (head) && head != end)
4998 head = NEXT_INSN (head);
5003 if (!onlyjump_p (end))
5010 end = PREV_INSN (end);
5011 while (DEBUG_INSN_P (end) && end != head)
5012 end = PREV_INSN (end);
5015 /* Don't move frame-related insn across the conditional branch. This
5016 can lead to one of the paths of the branch having wrong unwind info. */
5017 if (epilogue_completed)
5019 rtx_insn *insn = head;
5022 if (INSN_P (insn) && RTX_FRAME_RELATED_P (insn))
5026 insn = NEXT_INSN (insn);
5030 /* Disable handling dead code by conditional execution if the machine needs
5031 to do anything funny with the tests, etc. */
5032 #ifndef IFCVT_MODIFY_TESTS
5033 if (targetm.have_conditional_execution ())
5035 /* In the conditional execution case, we have things easy. We know
5036 the condition is reversible. We don't have to check life info
5037 because we're going to conditionally execute the code anyway.
5038 All that's left is making sure the insns involved can actually
5043 cond = cond_exec_get_condition (jump);
5047 rtx note = find_reg_note (jump, REG_BR_PROB, NULL_RTX);
5048 int prob_val = (note ? XINT (note, 0) : -1);
5052 enum rtx_code rev = reversed_comparison_code (cond, jump);
5055 cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0),
5058 prob_val = REG_BR_PROB_BASE - prob_val;
5061 if (cond_exec_process_insns (NULL, head, end, cond, prob_val, 0)
5062 && verify_changes (0))
5063 n_validated_changes = num_validated_changes ();
5071 /* If we allocated new pseudos (e.g. in the conditional move
5072 expander called from noce_emit_cmove), we must resize the
5074 if (max_regno < max_reg_num ())
5075 max_regno = max_reg_num ();
5077 /* Try the NCE path if the CE path did not result in any changes. */
5078 if (n_validated_changes == 0)
5085 /* In the non-conditional execution case, we have to verify that there
5086 are no trapping operations, no calls, no references to memory, and
5087 that any registers modified are dead at the branch site. */
5089 if (!any_condjump_p (jump))
5092 /* Find the extent of the conditional. */
5093 cond = noce_get_condition (jump, &earliest, false);
5097 live = BITMAP_ALLOC (®_obstack);
5098 simulate_backwards_to_point (merge_bb, live, end);
5099 success = can_move_insns_across (head, end, earliest, jump,
5101 df_get_live_in (other_bb), NULL);
5106 /* Collect the set of registers set in MERGE_BB. */
5107 merge_set = BITMAP_ALLOC (®_obstack);
5109 FOR_BB_INSNS (merge_bb, insn)
5110 if (NONDEBUG_INSN_P (insn))
5111 df_simulate_find_defs (insn, merge_set);
5113 /* If shrink-wrapping, disable this optimization when test_bb is
5114 the first basic block and merge_bb exits. The idea is to not
5115 move code setting up a return register as that may clobber a
5116 register used to pass function parameters, which then must be
5117 saved in caller-saved regs. A caller-saved reg requires the
5118 prologue, killing a shrink-wrap opportunity. */
5119 if ((SHRINK_WRAPPING_ENABLED && !epilogue_completed)
5120 && ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb == test_bb
5121 && single_succ_p (new_dest)
5122 && single_succ (new_dest) == EXIT_BLOCK_PTR_FOR_FN (cfun)
5123 && bitmap_intersect_p (df_get_live_in (new_dest), merge_set))
5128 return_regs = BITMAP_ALLOC (®_obstack);
5130 /* Start off with the intersection of regs used to pass
5131 params and regs used to return values. */
5132 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5133 if (FUNCTION_ARG_REGNO_P (i)
5134 && targetm.calls.function_value_regno_p (i))
5135 bitmap_set_bit (return_regs, INCOMING_REGNO (i));
5137 bitmap_and_into (return_regs,
5138 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun)));
5139 bitmap_and_into (return_regs,
5140 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun)));
5141 if (!bitmap_empty_p (return_regs))
5143 FOR_BB_INSNS_REVERSE (new_dest, insn)
5144 if (NONDEBUG_INSN_P (insn))
5148 /* If this insn sets any reg in return_regs, add all
5149 reg uses to the set of regs we're interested in. */
5150 FOR_EACH_INSN_DEF (def, insn)
5151 if (bitmap_bit_p (return_regs, DF_REF_REGNO (def)))
5153 df_simulate_uses (insn, return_regs);
5157 if (bitmap_intersect_p (merge_set, return_regs))
5159 BITMAP_FREE (return_regs);
5160 BITMAP_FREE (merge_set);
5164 BITMAP_FREE (return_regs);
5169 /* We don't want to use normal invert_jump or redirect_jump because
5170 we don't want to delete_insn called. Also, we want to do our own
5171 change group management. */
5173 old_dest = JUMP_LABEL (jump);
5174 if (other_bb != new_dest)
5176 if (!any_condjump_p (jump))
5179 if (JUMP_P (BB_END (dest_edge->src)))
5180 new_dest_label = JUMP_LABEL (BB_END (dest_edge->src));
5181 else if (new_dest == EXIT_BLOCK_PTR_FOR_FN (cfun))
5182 new_dest_label = ret_rtx;
5184 new_dest_label = block_label (new_dest);
5186 rtx_jump_insn *jump_insn = as_a <rtx_jump_insn *> (jump);
5188 ? ! invert_jump_1 (jump_insn, new_dest_label)
5189 : ! redirect_jump_1 (jump_insn, new_dest_label))
5193 if (verify_changes (n_validated_changes))
5194 confirm_change_group ();
5198 if (other_bb != new_dest)
5200 redirect_jump_2 (as_a <rtx_jump_insn *> (jump), old_dest, new_dest_label,
5203 redirect_edge_succ (BRANCH_EDGE (test_bb), new_dest);
5206 std::swap (BRANCH_EDGE (test_bb)->count,
5207 FALLTHRU_EDGE (test_bb)->count);
5208 std::swap (BRANCH_EDGE (test_bb)->probability,
5209 FALLTHRU_EDGE (test_bb)->probability);
5210 update_br_prob_note (test_bb);
5214 /* Move the insns out of MERGE_BB to before the branch. */
5219 if (end == BB_END (merge_bb))
5220 BB_END (merge_bb) = PREV_INSN (head);
5222 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5223 notes being moved might become invalid. */
5229 if (! INSN_P (insn))
5231 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5234 remove_note (insn, note);
5235 } while (insn != end && (insn = NEXT_INSN (insn)));
5237 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5238 notes referring to the registers being set might become invalid. */
5244 EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi)
5245 remove_reg_equal_equiv_notes_for_regno (i);
5247 BITMAP_FREE (merge_set);
5250 reorder_insns (head, end, PREV_INSN (earliest));
5253 /* Remove the jump and edge if we can. */
5254 if (other_bb == new_dest)
5257 remove_edge (BRANCH_EDGE (test_bb));
5258 /* ??? Can't merge blocks here, as then_bb is still in use.
5259 At minimum, the merge will get done just before bb-reorder. */
5268 BITMAP_FREE (merge_set);
5273 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5274 we are after combine pass. */
5277 if_convert (bool after_combine)
5284 df_live_add_problem ();
5285 df_live_set_all_dirty ();
5288 /* Record whether we are after combine pass. */
5289 ifcvt_after_combine = after_combine;
5290 have_cbranchcc4 = (direct_optab_handler (cbranch_optab, CCmode)
5291 != CODE_FOR_nothing);
5292 num_possible_if_blocks = 0;
5293 num_updated_if_blocks = 0;
5294 num_true_changes = 0;
5296 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
5297 mark_loop_exit_edges ();
5298 loop_optimizer_finalize ();
5299 free_dominance_info (CDI_DOMINATORS);
5301 /* Compute postdominators. */
5302 calculate_dominance_info (CDI_POST_DOMINATORS);
5304 df_set_flags (DF_LR_RUN_DCE);
5306 /* Go through each of the basic blocks looking for things to convert. If we
5307 have conditional execution, we make multiple passes to allow us to handle
5308 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5313 /* Only need to do dce on the first pass. */
5314 df_clear_flags (DF_LR_RUN_DCE);
5315 cond_exec_changed_p = FALSE;
5318 #ifdef IFCVT_MULTIPLE_DUMPS
5319 if (dump_file && pass > 1)
5320 fprintf (dump_file, "\n\n========== Pass %d ==========\n", pass);
5323 FOR_EACH_BB_FN (bb, cfun)
5326 while (!df_get_bb_dirty (bb)
5327 && (new_bb = find_if_header (bb, pass)) != NULL)
5331 #ifdef IFCVT_MULTIPLE_DUMPS
5332 if (dump_file && cond_exec_changed_p)
5333 print_rtl_with_bb (dump_file, get_insns (), dump_flags);
5336 while (cond_exec_changed_p);
5338 #ifdef IFCVT_MULTIPLE_DUMPS
5340 fprintf (dump_file, "\n\n========== no more changes\n");
5343 free_dominance_info (CDI_POST_DOMINATORS);
5348 clear_aux_for_blocks ();
5350 /* If we allocated new pseudos, we must resize the array for sched1. */
5351 if (max_regno < max_reg_num ())
5352 max_regno = max_reg_num ();
5354 /* Write the final stats. */
5355 if (dump_file && num_possible_if_blocks > 0)
5358 "\n%d possible IF blocks searched.\n",
5359 num_possible_if_blocks);
5361 "%d IF blocks converted.\n",
5362 num_updated_if_blocks);
5364 "%d true changes made.\n\n\n",
5369 df_remove_problem (df_live);
5371 checking_verify_flow_info ();
5374 /* If-conversion and CFG cleanup. */
5376 rest_of_handle_if_conversion (void)
5378 if (flag_if_conversion)
5382 dump_reg_info (dump_file);
5383 dump_flow_info (dump_file, dump_flags);
5385 cleanup_cfg (CLEANUP_EXPENSIVE);
5395 const pass_data pass_data_rtl_ifcvt =
5397 RTL_PASS, /* type */
5399 OPTGROUP_NONE, /* optinfo_flags */
5400 TV_IFCVT, /* tv_id */
5401 0, /* properties_required */
5402 0, /* properties_provided */
5403 0, /* properties_destroyed */
5404 0, /* todo_flags_start */
5405 TODO_df_finish, /* todo_flags_finish */
5408 class pass_rtl_ifcvt : public rtl_opt_pass
5411 pass_rtl_ifcvt (gcc::context *ctxt)
5412 : rtl_opt_pass (pass_data_rtl_ifcvt, ctxt)
5415 /* opt_pass methods: */
5416 virtual bool gate (function *)
5418 return (optimize > 0) && dbg_cnt (if_conversion);
5421 virtual unsigned int execute (function *)
5423 return rest_of_handle_if_conversion ();
5426 }; // class pass_rtl_ifcvt
5431 make_pass_rtl_ifcvt (gcc::context *ctxt)
5433 return new pass_rtl_ifcvt (ctxt);
5437 /* Rerun if-conversion, as combine may have simplified things enough
5438 to now meet sequence length restrictions. */
5442 const pass_data pass_data_if_after_combine =
5444 RTL_PASS, /* type */
5446 OPTGROUP_NONE, /* optinfo_flags */
5447 TV_IFCVT, /* tv_id */
5448 0, /* properties_required */
5449 0, /* properties_provided */
5450 0, /* properties_destroyed */
5451 0, /* todo_flags_start */
5452 TODO_df_finish, /* todo_flags_finish */
5455 class pass_if_after_combine : public rtl_opt_pass
5458 pass_if_after_combine (gcc::context *ctxt)
5459 : rtl_opt_pass (pass_data_if_after_combine, ctxt)
5462 /* opt_pass methods: */
5463 virtual bool gate (function *)
5465 return optimize > 0 && flag_if_conversion
5466 && dbg_cnt (if_after_combine);
5469 virtual unsigned int execute (function *)
5475 }; // class pass_if_after_combine
5480 make_pass_if_after_combine (gcc::context *ctxt)
5482 return new pass_if_after_combine (ctxt);
5488 const pass_data pass_data_if_after_reload =
5490 RTL_PASS, /* type */
5492 OPTGROUP_NONE, /* optinfo_flags */
5493 TV_IFCVT2, /* tv_id */
5494 0, /* properties_required */
5495 0, /* properties_provided */
5496 0, /* properties_destroyed */
5497 0, /* todo_flags_start */
5498 TODO_df_finish, /* todo_flags_finish */
5501 class pass_if_after_reload : public rtl_opt_pass
5504 pass_if_after_reload (gcc::context *ctxt)
5505 : rtl_opt_pass (pass_data_if_after_reload, ctxt)
5508 /* opt_pass methods: */
5509 virtual bool gate (function *)
5511 return optimize > 0 && flag_if_conversion2
5512 && dbg_cnt (if_after_reload);
5515 virtual unsigned int execute (function *)
5521 }; // class pass_if_after_reload
5526 make_pass_if_after_reload (gcc::context *ctxt)
5528 return new pass_if_after_reload (ctxt);