1 /* Generate code from machine description to emit insns as rtl.
2 Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "gensupport.h"
31 static int max_dup_opno;
32 static int max_scratch_opno;
33 static int register_constraints;
34 static int insn_code_number;
35 static int insn_index_number;
37 /* Data structure for recording the patterns of insns that have CLOBBERs.
38 We use this to output a function that adds these CLOBBERs to a
39 previously-allocated PARALLEL expression. */
43 struct clobber_ent *insns;
46 struct clobber_pat *next;
50 /* Records one insn that uses the clobber list. */
54 int code_number; /* Counts only insns. */
55 struct clobber_ent *next;
58 static void max_operand_1 PARAMS ((rtx));
59 static int max_operand_vec PARAMS ((rtx, int));
60 static void print_code PARAMS ((RTX_CODE));
61 static void gen_exp PARAMS ((rtx, enum rtx_code));
62 static void gen_insn PARAMS ((rtx));
63 static void gen_expand PARAMS ((rtx));
64 static void gen_split PARAMS ((rtx));
65 static void output_add_clobbers PARAMS ((void));
66 static void output_added_clobbers_hard_reg_p PARAMS ((void));
67 static void gen_rtx_scratch PARAMS ((rtx, enum rtx_code));
68 static void output_peephole2_scratches PARAMS ((rtx));
75 register RTX_CODE code;
78 register const char *fmt;
85 if (code == MATCH_OPERAND && XSTR (x, 2) != 0 && *XSTR (x, 2) != '\0')
86 register_constraints = 1;
87 if (code == MATCH_SCRATCH && XSTR (x, 1) != 0 && *XSTR (x, 1) != '\0')
88 register_constraints = 1;
89 if (code == MATCH_OPERAND || code == MATCH_OPERATOR
90 || code == MATCH_PARALLEL)
91 max_opno = MAX (max_opno, XINT (x, 0));
92 if (code == MATCH_DUP || code == MATCH_OP_DUP || code == MATCH_PAR_DUP)
93 max_dup_opno = MAX (max_dup_opno, XINT (x, 0));
94 if (code == MATCH_SCRATCH)
95 max_scratch_opno = MAX (max_scratch_opno, XINT (x, 0));
97 fmt = GET_RTX_FORMAT (code);
98 len = GET_RTX_LENGTH (code);
99 for (i = 0; i < len; i++)
101 if (fmt[i] == 'e' || fmt[i] == 'u')
102 max_operand_1 (XEXP (x, i));
103 else if (fmt[i] == 'E')
106 for (j = 0; j < XVECLEN (x, i); j++)
107 max_operand_1 (XVECEXP (x, i, j));
113 max_operand_vec (insn, arg)
117 register int len = XVECLEN (insn, arg);
122 max_scratch_opno = -1;
124 for (i = 0; i < len; i++)
125 max_operand_1 (XVECEXP (insn, arg, i));
134 register const char *p1;
135 for (p1 = GET_RTX_NAME (code); *p1; p1++)
136 putchar (TOUPPER(*p1));
140 gen_rtx_scratch (x, subroutine_type)
142 enum rtx_code subroutine_type;
144 if (subroutine_type == DEFINE_PEEPHOLE2)
146 printf ("operand%d", XINT (x, 0));
150 printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x)));
154 /* Print a C expression to construct an RTX just like X,
155 substituting any operand references appearing within. */
158 gen_exp (x, subroutine_type)
160 enum rtx_code subroutine_type;
162 register RTX_CODE code;
165 register const char *fmt;
179 printf ("operand%d", XINT (x, 0));
183 printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x, 0));
184 if (GET_MODE (x) == VOIDmode)
185 printf ("GET_MODE (operand%d)", XINT (x, 0));
187 printf ("%smode", GET_MODE_NAME (GET_MODE (x)));
188 for (i = 0; i < XVECLEN (x, 1); i++)
191 gen_exp (XVECEXP (x, 1, i), subroutine_type);
197 printf ("gen_rtx (GET_CODE (operand%d)", XINT (x, 0));
198 printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
199 for (i = 0; i < XVECLEN (x, 2); i++)
202 gen_exp (XVECEXP (x, 2, i), subroutine_type);
209 printf ("operand%d", XINT (x, 0));
213 gen_rtx_scratch (x, subroutine_type);
217 fatal ("ADDRESS expression code used in named instruction pattern");
229 printf ("const0_rtx");
230 else if (INTVAL (x) == 1)
231 printf ("const1_rtx");
232 else if (INTVAL (x) == -1)
233 printf ("constm1_rtx");
234 else if (INTVAL (x) == STORE_FLAG_VALUE)
235 printf ("const_true_rtx");
238 printf ("GEN_INT (");
239 printf (HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
245 /* These shouldn't be written in MD files. Instead, the appropriate
246 routines in varasm.c should be called. */
255 printf (" (%smode", GET_MODE_NAME (GET_MODE (x)));
257 fmt = GET_RTX_FORMAT (code);
258 len = GET_RTX_LENGTH (code);
259 for (i = 0; i < len; i++)
264 if (fmt[i] == 'e' || fmt[i] == 'u')
265 gen_exp (XEXP (x, i), subroutine_type);
266 else if (fmt[i] == 'i')
267 printf ("%u", XINT (x, i));
268 else if (fmt[i] == 's')
269 printf ("\"%s\"", XSTR (x, i));
270 else if (fmt[i] == 'E')
273 printf ("gen_rtvec (%d", XVECLEN (x, i));
274 for (j = 0; j < XVECLEN (x, i); j++)
277 gen_exp (XVECEXP (x, i, j), subroutine_type);
287 /* Generate the `gen_...' function for a DEFINE_INSN. */
296 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
297 registers or MATCH_SCRATCHes. If so, store away the information for
302 int has_hard_reg = 0;
304 for (i = XVECLEN (insn, 1) - 1; i > 0; i--)
306 if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER)
309 if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) == REG)
311 else if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != MATCH_SCRATCH)
315 if (i != XVECLEN (insn, 1) - 1)
317 register struct clobber_pat *p;
318 register struct clobber_ent *link
319 = (struct clobber_ent *) xmalloc (sizeof (struct clobber_ent));
322 link->code_number = insn_code_number;
324 /* See if any previous CLOBBER_LIST entry is the same as this
327 for (p = clobber_list; p; p = p->next)
329 if (p->first_clobber != i + 1
330 || XVECLEN (p->pattern, 1) != XVECLEN (insn, 1))
333 for (j = i + 1; j < XVECLEN (insn, 1); j++)
335 rtx old = XEXP (XVECEXP (p->pattern, 1, j), 0);
336 rtx new = XEXP (XVECEXP (insn, 1, j), 0);
338 /* OLD and NEW are the same if both are to be a SCRATCH
340 or if both are registers of the same mode and number. */
341 if (! (GET_MODE (old) == GET_MODE (new)
342 && ((GET_CODE (old) == MATCH_SCRATCH
343 && GET_CODE (new) == MATCH_SCRATCH)
344 || (GET_CODE (old) == REG && GET_CODE (new) == REG
345 && REGNO (old) == REGNO (new)))))
349 if (j == XVECLEN (insn, 1))
355 p = (struct clobber_pat *) xmalloc (sizeof (struct clobber_pat));
359 p->first_clobber = i + 1;
360 p->next = clobber_list;
361 p->has_hard_reg = has_hard_reg;
365 link->next = p->insns;
370 /* Don't mention instructions whose names are the null string
371 or begin with '*'. They are in the machine description just
373 if (XSTR (insn, 0)[0] == 0 || XSTR (insn, 0)[0] == '*')
376 /* Find out how many operands this function has,
377 and also whether any of them have register constraints. */
378 register_constraints = 0;
379 operands = max_operand_vec (insn, 1);
380 if (max_dup_opno >= operands)
381 fatal ("match_dup operand number has no match_operand");
383 /* Output the function name and argument declarations. */
384 printf ("rtx\ngen_%s (", XSTR (insn, 0));
385 for (i = 0; i < operands; i++)
387 printf (", operand%d", i);
389 printf ("operand%d", i);
391 for (i = 0; i < operands; i++)
392 printf (" rtx operand%d;\n", i);
395 /* Output code to construct and return the rtl for the instruction body */
397 if (XVECLEN (insn, 1) == 1)
400 gen_exp (XVECEXP (insn, 1, 0), DEFINE_INSN);
405 printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
408 for (i = 0; i < XVECLEN (insn, 1); i++)
411 gen_exp (XVECEXP (insn, 1, i), DEFINE_INSN);
413 printf ("));\n}\n\n");
417 /* Generate the `gen_...' function for a DEFINE_EXPAND. */
426 if (strlen (XSTR (expand, 0)) == 0)
427 fatal ("define_expand lacks a name");
428 if (XVEC (expand, 1) == 0)
429 fatal ("define_expand for %s lacks a pattern", XSTR (expand, 0));
431 /* Find out how many operands this function has,
432 and also whether any of them have register constraints. */
433 register_constraints = 0;
435 operands = max_operand_vec (expand, 1);
437 /* Output the function name and argument declarations. */
438 printf ("rtx\ngen_%s (", XSTR (expand, 0));
439 for (i = 0; i < operands; i++)
441 printf (", operand%d", i);
443 printf ("operand%d", i);
445 for (i = 0; i < operands; i++)
446 printf (" rtx operand%d;\n", i);
449 /* If we don't have any C code to write, only one insn is being written,
450 and no MATCH_DUPs are present, we can just return the desired insn
451 like we do for a DEFINE_INSN. This saves memory. */
452 if ((XSTR (expand, 3) == 0 || *XSTR (expand, 3) == '\0')
453 && operands > max_dup_opno
454 && XVECLEN (expand, 1) == 1)
457 gen_exp (XVECEXP (expand, 1, 0), DEFINE_EXPAND);
462 /* For each operand referred to only with MATCH_DUPs,
463 make a local variable. */
464 for (i = operands; i <= max_dup_opno; i++)
465 printf (" rtx operand%d;\n", i);
466 for (; i <= max_scratch_opno; i++)
467 printf (" rtx operand%d;\n", i);
468 printf (" rtx _val = 0;\n");
469 printf (" start_sequence ();\n");
471 /* The fourth operand of DEFINE_EXPAND is some code to be executed
472 before the actual construction.
473 This code expects to refer to `operands'
474 just as the output-code in a DEFINE_INSN does,
475 but here `operands' is an automatic array.
476 So copy the operand values there before executing it. */
477 if (XSTR (expand, 3) && *XSTR (expand, 3))
480 if (operands > 0 || max_dup_opno >= 0 || max_scratch_opno >= 0)
481 printf (" rtx operands[%d];\n",
482 MAX (operands, MAX (max_scratch_opno, max_dup_opno) + 1));
483 /* Output code to copy the arguments into `operands'. */
484 for (i = 0; i < operands; i++)
485 printf (" operands[%d] = operand%d;\n", i, i);
487 /* Output the special code to be executed before the sequence
489 printf ("%s\n", XSTR (expand, 3));
491 /* Output code to copy the arguments back out of `operands'
492 (unless we aren't going to use them at all). */
493 if (XVEC (expand, 1) != 0)
495 for (i = 0; i < operands; i++)
496 printf (" operand%d = operands[%d];\n", i, i);
497 for (; i <= max_dup_opno; i++)
498 printf (" operand%d = operands[%d];\n", i, i);
499 for (; i <= max_scratch_opno; i++)
500 printf (" operand%d = operands[%d];\n", i, i);
505 /* Output code to construct the rtl for the instruction bodies.
506 Use emit_insn to add them to the sequence being accumulated.
507 But don't do this if the user's code has set `no_more' nonzero. */
509 for (i = 0; i < XVECLEN (expand, 1); i++)
511 rtx next = XVECEXP (expand, 1, i);
512 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
513 || (GET_CODE (next) == PARALLEL
514 && GET_CODE (XVECEXP (next, 0, 0)) == SET
515 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
516 || GET_CODE (next) == RETURN)
517 printf (" emit_jump_insn (");
518 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
519 || GET_CODE (next) == CALL
520 || (GET_CODE (next) == PARALLEL
521 && GET_CODE (XVECEXP (next, 0, 0)) == SET
522 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
523 || (GET_CODE (next) == PARALLEL
524 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
525 printf (" emit_call_insn (");
526 else if (GET_CODE (next) == CODE_LABEL)
527 printf (" emit_label (");
528 else if (GET_CODE (next) == MATCH_OPERAND
529 || GET_CODE (next) == MATCH_DUP
530 || GET_CODE (next) == MATCH_OPERATOR
531 || GET_CODE (next) == MATCH_OP_DUP
532 || GET_CODE (next) == MATCH_PARALLEL
533 || GET_CODE (next) == MATCH_PAR_DUP
534 || GET_CODE (next) == PARALLEL)
537 printf (" emit_insn (");
538 gen_exp (next, DEFINE_EXPAND);
540 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
541 && GET_CODE (SET_SRC (next)) == LABEL_REF)
542 printf (" emit_barrier ();");
545 /* Call `gen_sequence' to make a SEQUENCE out of all the
546 insns emitted within this gen_... function. */
548 printf (" _val = gen_sequence ();\n");
549 printf (" end_sequence ();\n");
550 printf (" return _val;\n}\n\n");
553 /* Like gen_expand, but generates a SEQUENCE. */
561 const char *name = "split";
564 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
567 if (XVEC (split, 0) == 0)
568 fatal ("define_%s (definition %d) lacks a pattern", name,
570 else if (XVEC (split, 2) == 0)
571 fatal ("define_%s (definition %d) lacks a replacement pattern", name,
574 /* Find out how many operands this function has. */
576 max_operand_vec (split, 2);
577 operands = MAX (max_opno, MAX (max_dup_opno, max_scratch_opno)) + 1;
578 unused = (operands == 0 ? " ATTRIBUTE_UNUSED" : "");
580 /* Output the prototype, function name and argument declarations. */
581 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
583 printf ("extern rtx gen_%s_%d PARAMS ((rtx, rtx *));\n",
584 name, insn_code_number);
585 printf ("rtx\ngen_%s_%d (curr_insn, operands)\n",
586 name, insn_code_number);
587 printf (" rtx curr_insn ATTRIBUTE_UNUSED;\n");
588 printf (" rtx *operands%s;\n", unused);
592 printf ("extern rtx gen_split_%d PARAMS ((rtx *));\n", insn_code_number);
593 printf ("rtx\ngen_%s_%d (operands)\n", name, insn_code_number);
594 printf (" rtx *operands%s;\n", unused);
598 /* Declare all local variables. */
599 for (i = 0; i < operands; i++)
600 printf (" rtx operand%d;\n", i);
601 printf (" rtx _val = 0;\n");
603 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
604 output_peephole2_scratches (split);
606 printf (" start_sequence ();\n");
608 /* The fourth operand of DEFINE_SPLIT is some code to be executed
609 before the actual construction. */
612 printf ("%s\n", XSTR (split, 3));
614 /* Output code to copy the arguments back out of `operands' */
615 for (i = 0; i < operands; i++)
616 printf (" operand%d = operands[%d];\n", i, i);
618 /* Output code to construct the rtl for the instruction bodies.
619 Use emit_insn to add them to the sequence being accumulated.
620 But don't do this if the user's code has set `no_more' nonzero. */
622 for (i = 0; i < XVECLEN (split, 2); i++)
624 rtx next = XVECEXP (split, 2, i);
625 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
626 || (GET_CODE (next) == PARALLEL
627 && GET_CODE (XVECEXP (next, 0, 0)) == SET
628 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
629 || GET_CODE (next) == RETURN)
630 printf (" emit_jump_insn (");
631 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
632 || GET_CODE (next) == CALL
633 || (GET_CODE (next) == PARALLEL
634 && GET_CODE (XVECEXP (next, 0, 0)) == SET
635 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
636 || (GET_CODE (next) == PARALLEL
637 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
638 printf (" emit_call_insn (");
639 else if (GET_CODE (next) == CODE_LABEL)
640 printf (" emit_label (");
641 else if (GET_CODE (next) == MATCH_OPERAND
642 || GET_CODE (next) == MATCH_OPERATOR
643 || GET_CODE (next) == MATCH_PARALLEL
644 || GET_CODE (next) == MATCH_OP_DUP
645 || GET_CODE (next) == MATCH_DUP
646 || GET_CODE (next) == PARALLEL)
649 printf (" emit_insn (");
650 gen_exp (next, GET_CODE (split));
652 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
653 && GET_CODE (SET_SRC (next)) == LABEL_REF)
654 printf (" emit_barrier ();");
657 /* Call `gen_sequence' to make a SEQUENCE out of all the
658 insns emitted within this gen_... function. */
660 printf (" _val = gen_sequence ();\n");
661 printf (" end_sequence ();\n");
662 printf (" return _val;\n}\n\n");
665 /* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
666 size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
667 the end of the vector. */
670 output_add_clobbers ()
672 struct clobber_pat *clobber;
673 struct clobber_ent *ent;
676 printf ("\n\nvoid\nadd_clobbers (pattern, insn_code_number)\n");
677 printf (" rtx pattern;\n int insn_code_number;\n");
679 printf (" switch (insn_code_number)\n");
682 for (clobber = clobber_list; clobber; clobber = clobber->next)
684 for (ent = clobber->insns; ent; ent = ent->next)
685 printf (" case %d:\n", ent->code_number);
687 for (i = clobber->first_clobber; i < XVECLEN (clobber->pattern, 1); i++)
689 printf (" XVECEXP (pattern, 0, %d) = ", i);
690 gen_exp (XVECEXP (clobber->pattern, 1, i),
691 GET_CODE (clobber->pattern));
695 printf (" break;\n\n");
698 printf (" default:\n");
699 printf (" abort ();\n");
704 /* Write a function, `added_clobbers_hard_reg_p' this is given an insn_code
705 number that needs clobbers and returns 1 if they include a clobber of a
706 hard reg and 0 if they just clobber SCRATCH. */
709 output_added_clobbers_hard_reg_p ()
711 struct clobber_pat *clobber;
712 struct clobber_ent *ent;
715 printf ("\n\nint\nadded_clobbers_hard_reg_p (insn_code_number)\n");
716 printf (" int insn_code_number;\n");
718 printf (" switch (insn_code_number)\n");
721 for (clobber_p = 0; clobber_p <= 1; clobber_p++)
723 for (clobber = clobber_list; clobber; clobber = clobber->next)
724 if (clobber->has_hard_reg == clobber_p)
725 for (ent = clobber->insns; ent; ent = ent->next)
726 printf (" case %d:\n", ent->code_number);
728 printf (" return %d;\n\n", clobber_p);
731 printf (" default:\n");
732 printf (" abort ();\n");
737 /* Generate code to invoke find_free_register () as needed for the
738 scratch registers used by the peephole2 pattern in SPLIT. */
741 output_peephole2_scratches (split)
747 printf (" HARD_REG_SET _regs_allocated;\n");
748 printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
750 for (i = 0; i < XVECLEN (split, 0); i++)
752 rtx elt = XVECEXP (split, 0, i);
753 if (GET_CODE (elt) == MATCH_SCRATCH)
755 int last_insn_nr = insn_nr;
756 int cur_insn_nr = insn_nr;
758 for (j = i + 1; j < XVECLEN (split, 0); j++)
759 if (GET_CODE (XVECEXP (split, 0, j)) == MATCH_DUP)
761 if (XINT (XVECEXP (split, 0, j), 0) == XINT (elt, 0))
762 last_insn_nr = cur_insn_nr;
764 else if (GET_CODE (XVECEXP (split, 0, j)) != MATCH_SCRATCH)
767 printf (" if ((operands[%d] = peep2_find_free_register (%d, %d, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
770 insn_nr, last_insn_nr,
772 GET_MODE_NAME (GET_MODE (elt)));
775 else if (GET_CODE (elt) != MATCH_DUP)
780 extern int main PARAMS ((int, char **));
789 progname = "genemit";
792 fatal ("No input file name.");
794 if (init_md_reader (argv[1]) != SUCCESS_EXIT_CODE)
795 return (FATAL_EXIT_CODE);
797 /* Assign sequential codes to all entries in the machine description
798 in parallel with the tables in insn-output.c. */
800 insn_code_number = 0;
801 insn_index_number = 0;
803 printf ("/* Generated automatically by the program `genemit'\n\
804 from the machine description file `md'. */\n\n");
806 printf ("#include \"config.h\"\n");
807 printf ("#include \"system.h\"\n");
808 printf ("#include \"rtl.h\"\n");
809 printf ("#include \"tm_p.h\"\n");
810 printf ("#include \"function.h\"\n");
811 printf ("#include \"expr.h\"\n");
812 printf ("#include \"real.h\"\n");
813 printf ("#include \"flags.h\"\n");
814 printf ("#include \"output.h\"\n");
815 printf ("#include \"insn-config.h\"\n");
816 printf ("#include \"hard-reg-set.h\"\n");
817 printf ("#include \"recog.h\"\n");
818 printf ("#include \"resource.h\"\n");
819 printf ("#include \"reload.h\"\n");
820 printf ("#include \"toplev.h\"\n");
821 printf ("#include \"ggc.h\"\n\n");
822 printf ("#define FAIL return (end_sequence (), _val)\n");
823 printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n");
825 /* Read the machine description. */
831 desc = read_md_rtx (&line_no, &insn_code_number);
835 switch (GET_CODE (desc))
849 case DEFINE_PEEPHOLE2:
859 /* Write out the routines to add CLOBBERs to a pattern and say whether they
860 clobber a hard reg. */
861 output_add_clobbers ();
862 output_added_clobbers_hard_reg_p ();
865 return (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
868 /* Define this so we can link with print-rtl.o to get debug_rtx function. */
871 int code ATTRIBUTE_UNUSED;