1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
50 #include "coretypes.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
60 #include "conditions.h"
62 #include "hard-reg-set.h"
66 #include "rtl-error.h"
67 #include "toplev.h" /* exact_log2, floor_log2 */
70 #include "basic-block.h"
72 #include "targhooks.h"
75 #include "tree-pass.h"
76 #include "tree-flow.h"
84 #include "tree-pretty-print.h" /* for dump_function_header */
86 #ifdef XCOFF_DEBUGGING_INFO
87 #include "xcoffout.h" /* Needed for external data
88 declarations for e.g. AIX 4.x. */
91 #include "dwarf2out.h"
93 #ifdef DBX_DEBUGGING_INFO
97 #ifdef SDB_DEBUGGING_INFO
101 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
102 So define a null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
107 /* Is the given character a logical line separator for the assembler? */
108 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
109 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
112 #ifndef JUMP_TABLES_IN_TEXT_SECTION
113 #define JUMP_TABLES_IN_TEXT_SECTION 0
116 /* Bitflags used by final_scan_insn. */
119 #define SEEN_EMITTED 4
121 /* Last insn processed by final_scan_insn. */
122 static rtx debug_insn;
123 rtx current_output_insn;
125 /* Line number of last NOTE. */
126 static int last_linenum;
128 /* Last discriminator written to assembly. */
129 static int last_discriminator;
131 /* Discriminator of current block. */
132 static int discriminator;
134 /* Highest line number in current block. */
135 static int high_block_linenum;
137 /* Likewise for function. */
138 static int high_function_linenum;
140 /* Filename of last NOTE. */
141 static const char *last_filename;
143 /* Override filename and line number. */
144 static const char *override_filename;
145 static int override_linenum;
147 /* Whether to force emission of a line note before the next insn. */
148 static bool force_source_line = false;
150 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
152 /* Nonzero while outputting an `asm' with operands.
153 This means that inconsistencies are the user's fault, so don't die.
154 The precise value is the insn being output, to pass to error_for_asm. */
155 rtx this_is_asm_operands;
157 /* Number of operands of this insn, for an `asm' with operands. */
158 static unsigned int insn_noperands;
160 /* Compare optimization flag. */
162 static rtx last_ignored_compare = 0;
164 /* Assign a unique number to each insn that is output.
165 This can be used to generate unique local labels. */
167 static int insn_counter = 0;
170 /* This variable contains machine-dependent flags (defined in tm.h)
171 set and examined by output routines
172 that describe how to interpret the condition codes properly. */
176 /* During output of an insn, this contains a copy of cc_status
177 from before the insn. */
179 CC_STATUS cc_prev_status;
182 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
184 static int block_depth;
186 /* Nonzero if have enabled APP processing of our assembler output. */
190 /* If we are outputting an insn sequence, this contains the sequence rtx.
195 #ifdef ASSEMBLER_DIALECT
197 /* Number of the assembler dialect to use, starting at 0. */
198 static int dialect_number;
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate;
204 /* True if printing into -fdump-final-insns= dump. */
205 bool final_insns_dump_p;
207 static int asm_insn_count (rtx);
208 static void profile_function (FILE *);
209 static void profile_after_prologue (FILE *);
210 static bool notice_source_line (rtx, bool *);
211 static rtx walk_alter_subreg (rtx *, bool *);
212 static void output_asm_name (void);
213 static void output_alternate_entry_point (FILE *, rtx);
214 static tree get_mem_expr_from_op (rtx, int *);
215 static void output_asm_operand_names (rtx *, int *, int);
216 #ifdef LEAF_REGISTERS
217 static void leaf_renumber_regs (rtx);
220 static int alter_cond (rtx);
222 #ifndef ADDR_VEC_ALIGN
223 static int final_addr_vec_align (rtx);
225 static int align_fuzz (rtx, rtx, int, unsigned);
227 /* Initialize data in final at the beginning of a compilation. */
230 init_final (const char *filename ATTRIBUTE_UNUSED)
235 #ifdef ASSEMBLER_DIALECT
236 dialect_number = ASSEMBLER_DIALECT;
240 /* Default target function prologue and epilogue assembler output.
242 If not overridden for epilogue code, then the function body itself
243 contains return instructions wherever needed. */
245 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
246 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
251 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
252 tree decl ATTRIBUTE_UNUSED,
253 bool new_is_cold ATTRIBUTE_UNUSED)
257 /* Default target hook that outputs nothing to a stream. */
259 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
263 /* Enable APP processing of subsequent output.
264 Used before the output from an `asm' statement. */
271 fputs (ASM_APP_ON, asm_out_file);
276 /* Disable APP processing of subsequent output.
277 Called from varasm.c before most kinds of output. */
284 fputs (ASM_APP_OFF, asm_out_file);
289 /* Return the number of slots filled in the current
290 delayed branch sequence (we don't count the insn needing the
291 delay slot). Zero if not in a delayed branch sequence. */
295 dbr_sequence_length (void)
297 if (final_sequence != 0)
298 return XVECLEN (final_sequence, 0) - 1;
304 /* The next two pages contain routines used to compute the length of an insn
305 and to shorten branches. */
307 /* Arrays for insn lengths, and addresses. The latter is referenced by
308 `insn_current_length'. */
310 static int *insn_lengths;
312 VEC(int,heap) *insn_addresses_;
314 /* Max uid for which the above arrays are valid. */
315 static int insn_lengths_max_uid;
317 /* Address of insn being processed. Used by `insn_current_length'. */
318 int insn_current_address;
320 /* Address of insn being processed in previous iteration. */
321 int insn_last_address;
323 /* known invariant alignment of insn being processed. */
324 int insn_current_align;
326 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
327 gives the next following alignment insn that increases the known
328 alignment, or NULL_RTX if there is no such insn.
329 For any alignment obtained this way, we can again index uid_align with
330 its uid to obtain the next following align that in turn increases the
331 alignment, till we reach NULL_RTX; the sequence obtained this way
332 for each insn we'll call the alignment chain of this insn in the following
335 struct label_alignment
341 static rtx *uid_align;
342 static int *uid_shuid;
343 static struct label_alignment *label_align;
345 /* Indicate that branch shortening hasn't yet been done. */
348 init_insn_lengths (void)
359 insn_lengths_max_uid = 0;
361 if (HAVE_ATTR_length)
362 INSN_ADDRESSES_FREE ();
370 /* Obtain the current length of an insn. If branch shortening has been done,
371 get its actual length. Otherwise, use FALLBACK_FN to calculate the
374 get_attr_length_1 (rtx insn, int (*fallback_fn) (rtx))
380 if (!HAVE_ATTR_length)
383 if (insn_lengths_max_uid > INSN_UID (insn))
384 return insn_lengths[INSN_UID (insn)];
386 switch (GET_CODE (insn))
395 length = fallback_fn (insn);
399 body = PATTERN (insn);
400 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
402 /* Alignment is machine-dependent and should be handled by
406 length = fallback_fn (insn);
410 body = PATTERN (insn);
411 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
414 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
415 length = asm_insn_count (body) * fallback_fn (insn);
416 else if (GET_CODE (body) == SEQUENCE)
417 for (i = 0; i < XVECLEN (body, 0); i++)
418 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
420 length = fallback_fn (insn);
427 #ifdef ADJUST_INSN_LENGTH
428 ADJUST_INSN_LENGTH (insn, length);
433 /* Obtain the current length of an insn. If branch shortening has been done,
434 get its actual length. Otherwise, get its maximum length. */
436 get_attr_length (rtx insn)
438 return get_attr_length_1 (insn, insn_default_length);
441 /* Obtain the current length of an insn. If branch shortening has been done,
442 get its actual length. Otherwise, get its minimum length. */
444 get_attr_min_length (rtx insn)
446 return get_attr_length_1 (insn, insn_min_length);
449 /* Code to handle alignment inside shorten_branches. */
451 /* Here is an explanation how the algorithm in align_fuzz can give
454 Call a sequence of instructions beginning with alignment point X
455 and continuing until the next alignment point `block X'. When `X'
456 is used in an expression, it means the alignment value of the
459 Call the distance between the start of the first insn of block X, and
460 the end of the last insn of block X `IX', for the `inner size of X'.
461 This is clearly the sum of the instruction lengths.
463 Likewise with the next alignment-delimited block following X, which we
466 Call the distance between the start of the first insn of block X, and
467 the start of the first insn of block Y `OX', for the `outer size of X'.
469 The estimated padding is then OX - IX.
471 OX can be safely estimated as
476 OX = round_up(IX, X) + Y - X
478 Clearly est(IX) >= real(IX), because that only depends on the
479 instruction lengths, and those being overestimated is a given.
481 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
482 we needn't worry about that when thinking about OX.
484 When X >= Y, the alignment provided by Y adds no uncertainty factor
485 for branch ranges starting before X, so we can just round what we have.
486 But when X < Y, we don't know anything about the, so to speak,
487 `middle bits', so we have to assume the worst when aligning up from an
488 address mod X to one mod Y, which is Y - X. */
491 #define LABEL_ALIGN(LABEL) align_labels_log
495 #define LOOP_ALIGN(LABEL) align_loops_log
498 #ifndef LABEL_ALIGN_AFTER_BARRIER
499 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
503 #define JUMP_ALIGN(LABEL) align_jumps_log
507 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
513 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
515 return align_loops_max_skip;
519 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
521 return align_labels_max_skip;
525 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
527 return align_jumps_max_skip;
530 #ifndef ADDR_VEC_ALIGN
532 final_addr_vec_align (rtx addr_vec)
534 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
536 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
537 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
538 return exact_log2 (align);
542 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
545 #ifndef INSN_LENGTH_ALIGNMENT
546 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
549 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
551 static int min_labelno, max_labelno;
553 #define LABEL_TO_ALIGNMENT(LABEL) \
554 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
556 #define LABEL_TO_MAX_SKIP(LABEL) \
557 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
559 /* For the benefit of port specific code do this also as a function. */
562 label_to_alignment (rtx label)
564 if (CODE_LABEL_NUMBER (label) <= max_labelno)
565 return LABEL_TO_ALIGNMENT (label);
570 label_to_max_skip (rtx label)
572 if (CODE_LABEL_NUMBER (label) <= max_labelno)
573 return LABEL_TO_MAX_SKIP (label);
577 /* The differences in addresses
578 between a branch and its target might grow or shrink depending on
579 the alignment the start insn of the range (the branch for a forward
580 branch or the label for a backward branch) starts out on; if these
581 differences are used naively, they can even oscillate infinitely.
582 We therefore want to compute a 'worst case' address difference that
583 is independent of the alignment the start insn of the range end
584 up on, and that is at least as large as the actual difference.
585 The function align_fuzz calculates the amount we have to add to the
586 naively computed difference, by traversing the part of the alignment
587 chain of the start insn of the range that is in front of the end insn
588 of the range, and considering for each alignment the maximum amount
589 that it might contribute to a size increase.
591 For casesi tables, we also want to know worst case minimum amounts of
592 address difference, in case a machine description wants to introduce
593 some common offset that is added to all offsets in a table.
594 For this purpose, align_fuzz with a growth argument of 0 computes the
595 appropriate adjustment. */
597 /* Compute the maximum delta by which the difference of the addresses of
598 START and END might grow / shrink due to a different address for start
599 which changes the size of alignment insns between START and END.
600 KNOWN_ALIGN_LOG is the alignment known for START.
601 GROWTH should be ~0 if the objective is to compute potential code size
602 increase, and 0 if the objective is to compute potential shrink.
603 The return value is undefined for any other value of GROWTH. */
606 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
608 int uid = INSN_UID (start);
610 int known_align = 1 << known_align_log;
611 int end_shuid = INSN_SHUID (end);
614 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
616 int align_addr, new_align;
618 uid = INSN_UID (align_label);
619 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
620 if (uid_shuid[uid] > end_shuid)
622 known_align_log = LABEL_TO_ALIGNMENT (align_label);
623 new_align = 1 << known_align_log;
624 if (new_align < known_align)
626 fuzz += (-align_addr ^ growth) & (new_align - known_align);
627 known_align = new_align;
632 /* Compute a worst-case reference address of a branch so that it
633 can be safely used in the presence of aligned labels. Since the
634 size of the branch itself is unknown, the size of the branch is
635 not included in the range. I.e. for a forward branch, the reference
636 address is the end address of the branch as known from the previous
637 branch shortening pass, minus a value to account for possible size
638 increase due to alignment. For a backward branch, it is the start
639 address of the branch as known from the current pass, plus a value
640 to account for possible size increase due to alignment.
641 NB.: Therefore, the maximum offset allowed for backward branches needs
642 to exclude the branch size. */
645 insn_current_reference_address (rtx branch)
650 if (! INSN_ADDRESSES_SET_P ())
653 seq = NEXT_INSN (PREV_INSN (branch));
654 seq_uid = INSN_UID (seq);
655 if (!JUMP_P (branch))
656 /* This can happen for example on the PA; the objective is to know the
657 offset to address something in front of the start of the function.
658 Thus, we can treat it like a backward branch.
659 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
660 any alignment we'd encounter, so we skip the call to align_fuzz. */
661 return insn_current_address;
662 dest = JUMP_LABEL (branch);
664 /* BRANCH has no proper alignment chain set, so use SEQ.
665 BRANCH also has no INSN_SHUID. */
666 if (INSN_SHUID (seq) < INSN_SHUID (dest))
668 /* Forward branch. */
669 return (insn_last_address + insn_lengths[seq_uid]
670 - align_fuzz (seq, dest, length_unit_log, ~0));
674 /* Backward branch. */
675 return (insn_current_address
676 + align_fuzz (dest, seq, length_unit_log, ~0));
680 /* Compute branch alignments based on frequency information in the
684 compute_alignments (void)
686 int log, max_skip, max_log;
689 int freq_threshold = 0;
697 max_labelno = max_label_num ();
698 min_labelno = get_first_label_num ();
699 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
701 /* If not optimizing or optimizing for size, don't assign any alignments. */
702 if (! optimize || optimize_function_for_size_p (cfun))
707 dump_reg_info (dump_file);
708 dump_flow_info (dump_file, TDF_DETAILS);
709 flow_loops_dump (dump_file, NULL, 1);
711 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
713 if (bb->frequency > freq_max)
714 freq_max = bb->frequency;
715 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
718 fprintf(dump_file, "freq_max: %i\n",freq_max);
721 rtx label = BB_HEAD (bb);
722 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
727 || optimize_bb_for_size_p (bb))
730 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
731 bb->index, bb->frequency, bb->loop_father->num,
735 max_log = LABEL_ALIGN (label);
736 max_skip = targetm.asm_out.label_align_max_skip (label);
738 FOR_EACH_EDGE (e, ei, bb->preds)
740 if (e->flags & EDGE_FALLTHRU)
741 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
743 branch_frequency += EDGE_FREQUENCY (e);
747 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
748 bb->index, bb->frequency, bb->loop_father->num,
750 fallthru_frequency, branch_frequency);
751 if (!bb->loop_father->inner && bb->loop_father->num)
752 fprintf (dump_file, " inner_loop");
753 if (bb->loop_father->header == bb)
754 fprintf (dump_file, " loop_header");
755 fprintf (dump_file, "\n");
758 /* There are two purposes to align block with no fallthru incoming edge:
759 1) to avoid fetch stalls when branch destination is near cache boundary
760 2) to improve cache efficiency in case the previous block is not executed
761 (so it does not need to be in the cache).
763 We to catch first case, we align frequently executed blocks.
764 To catch the second, we align blocks that are executed more frequently
765 than the predecessor and the predecessor is likely to not be executed
766 when function is called. */
769 && (branch_frequency > freq_threshold
770 || (bb->frequency > bb->prev_bb->frequency * 10
771 && (bb->prev_bb->frequency
772 <= ENTRY_BLOCK_PTR->frequency / 2))))
774 log = JUMP_ALIGN (label);
776 fprintf(dump_file, " jump alignment added.\n");
780 max_skip = targetm.asm_out.jump_align_max_skip (label);
783 /* In case block is frequent and reached mostly by non-fallthru edge,
784 align it. It is most likely a first block of loop. */
786 && optimize_bb_for_speed_p (bb)
787 && branch_frequency + fallthru_frequency > freq_threshold
789 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
791 log = LOOP_ALIGN (label);
793 fprintf(dump_file, " internal loop alignment added.\n");
797 max_skip = targetm.asm_out.loop_align_max_skip (label);
800 LABEL_TO_ALIGNMENT (label) = max_log;
801 LABEL_TO_MAX_SKIP (label) = max_skip;
804 loop_optimizer_finalize ();
805 free_dominance_info (CDI_DOMINATORS);
809 struct rtl_opt_pass pass_compute_alignments =
813 "alignments", /* name */
814 OPTGROUP_NONE, /* optinfo_flags */
816 compute_alignments, /* execute */
819 0, /* static_pass_number */
821 0, /* properties_required */
822 0, /* properties_provided */
823 0, /* properties_destroyed */
824 0, /* todo_flags_start */
825 TODO_verify_rtl_sharing
826 | TODO_ggc_collect /* todo_flags_finish */
831 /* Make a pass over all insns and compute their actual lengths by shortening
832 any branches of variable length if possible. */
834 /* shorten_branches might be called multiple times: for example, the SH
835 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
836 In order to do this, it needs proper length information, which it obtains
837 by calling shorten_branches. This cannot be collapsed with
838 shorten_branches itself into a single pass unless we also want to integrate
839 reorg.c, since the branch splitting exposes new instructions with delay
843 shorten_branches (rtx first)
850 #define MAX_CODE_ALIGN 16
852 int something_changed = 1;
853 char *varying_length;
856 rtx align_tab[MAX_CODE_ALIGN];
858 /* Compute maximum UID and allocate label_align / uid_shuid. */
859 max_uid = get_max_uid ();
861 /* Free uid_shuid before reallocating it. */
864 uid_shuid = XNEWVEC (int, max_uid);
866 if (max_labelno != max_label_num ())
868 int old = max_labelno;
872 max_labelno = max_label_num ();
874 n_labels = max_labelno - min_labelno + 1;
875 n_old_labels = old - min_labelno + 1;
877 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
879 /* Range of labels grows monotonically in the function. Failing here
880 means that the initialization of array got lost. */
881 gcc_assert (n_old_labels <= n_labels);
883 memset (label_align + n_old_labels, 0,
884 (n_labels - n_old_labels) * sizeof (struct label_alignment));
887 /* Initialize label_align and set up uid_shuid to be strictly
888 monotonically rising with insn order. */
889 /* We use max_log here to keep track of the maximum alignment we want to
890 impose on the next CODE_LABEL (or the current one if we are processing
891 the CODE_LABEL itself). */
896 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
900 INSN_SHUID (insn) = i++;
907 bool next_is_jumptable;
909 /* Merge in alignments computed by compute_alignments. */
910 log = LABEL_TO_ALIGNMENT (insn);
914 max_skip = LABEL_TO_MAX_SKIP (insn);
917 next = next_nonnote_insn (insn);
918 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
919 if (!next_is_jumptable)
921 log = LABEL_ALIGN (insn);
925 max_skip = targetm.asm_out.label_align_max_skip (insn);
928 /* ADDR_VECs only take room if read-only data goes into the text
930 if ((JUMP_TABLES_IN_TEXT_SECTION
931 || readonly_data_section == text_section)
932 && next_is_jumptable)
934 log = ADDR_VEC_ALIGN (next);
938 max_skip = targetm.asm_out.label_align_max_skip (insn);
941 LABEL_TO_ALIGNMENT (insn) = max_log;
942 LABEL_TO_MAX_SKIP (insn) = max_skip;
946 else if (BARRIER_P (insn))
950 for (label = insn; label && ! INSN_P (label);
951 label = NEXT_INSN (label))
954 log = LABEL_ALIGN_AFTER_BARRIER (insn);
958 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
964 if (!HAVE_ATTR_length)
967 /* Allocate the rest of the arrays. */
968 insn_lengths = XNEWVEC (int, max_uid);
969 insn_lengths_max_uid = max_uid;
970 /* Syntax errors can lead to labels being outside of the main insn stream.
971 Initialize insn_addresses, so that we get reproducible results. */
972 INSN_ADDRESSES_ALLOC (max_uid);
974 varying_length = XCNEWVEC (char, max_uid);
976 /* Initialize uid_align. We scan instructions
977 from end to start, and keep in align_tab[n] the last seen insn
978 that does an alignment of at least n+1, i.e. the successor
979 in the alignment chain for an insn that does / has a known
981 uid_align = XCNEWVEC (rtx, max_uid);
983 for (i = MAX_CODE_ALIGN; --i >= 0;)
984 align_tab[i] = NULL_RTX;
985 seq = get_last_insn ();
986 for (; seq; seq = PREV_INSN (seq))
988 int uid = INSN_UID (seq);
990 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
991 uid_align[uid] = align_tab[0];
994 /* Found an alignment label. */
995 uid_align[uid] = align_tab[log];
996 for (i = log - 1; i >= 0; i--)
1001 /* When optimizing, we start assuming minimum length, and keep increasing
1002 lengths as we find the need for this, till nothing changes.
1003 When not optimizing, we start assuming maximum lengths, and
1004 do a single pass to update the lengths. */
1005 bool increasing = optimize != 0;
1007 #ifdef CASE_VECTOR_SHORTEN_MODE
1010 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1013 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1014 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1017 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1019 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1020 int len, i, min, max, insn_shuid;
1022 addr_diff_vec_flags flags;
1025 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1027 pat = PATTERN (insn);
1028 len = XVECLEN (pat, 1);
1029 gcc_assert (len > 0);
1030 min_align = MAX_CODE_ALIGN;
1031 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1033 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1034 int shuid = INSN_SHUID (lab);
1045 if (min_align > LABEL_TO_ALIGNMENT (lab))
1046 min_align = LABEL_TO_ALIGNMENT (lab);
1048 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1049 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1050 insn_shuid = INSN_SHUID (insn);
1051 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1052 memset (&flags, 0, sizeof (flags));
1053 flags.min_align = min_align;
1054 flags.base_after_vec = rel > insn_shuid;
1055 flags.min_after_vec = min > insn_shuid;
1056 flags.max_after_vec = max > insn_shuid;
1057 flags.min_after_base = min > rel;
1058 flags.max_after_base = max > rel;
1059 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1062 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1065 #endif /* CASE_VECTOR_SHORTEN_MODE */
1067 /* Compute initial lengths, addresses, and varying flags for each insn. */
1068 int (*length_fun) (rtx) = increasing ? insn_min_length : insn_default_length;
1070 for (insn_current_address = 0, insn = first;
1072 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1074 uid = INSN_UID (insn);
1076 insn_lengths[uid] = 0;
1080 int log = LABEL_TO_ALIGNMENT (insn);
1083 int align = 1 << log;
1084 int new_address = (insn_current_address + align - 1) & -align;
1085 insn_lengths[uid] = new_address - insn_current_address;
1089 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1091 if (NOTE_P (insn) || BARRIER_P (insn)
1092 || LABEL_P (insn) || DEBUG_INSN_P(insn))
1094 if (INSN_DELETED_P (insn))
1097 body = PATTERN (insn);
1098 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1100 /* This only takes room if read-only data goes into the text
1102 if (JUMP_TABLES_IN_TEXT_SECTION
1103 || readonly_data_section == text_section)
1104 insn_lengths[uid] = (XVECLEN (body,
1105 GET_CODE (body) == ADDR_DIFF_VEC)
1106 * GET_MODE_SIZE (GET_MODE (body)));
1107 /* Alignment is handled by ADDR_VEC_ALIGN. */
1109 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1110 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1111 else if (GET_CODE (body) == SEQUENCE)
1114 int const_delay_slots;
1116 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1118 const_delay_slots = 0;
1120 int (*inner_length_fun) (rtx)
1121 = const_delay_slots ? length_fun : insn_default_length;
1122 /* Inside a delay slot sequence, we do not do any branch shortening
1123 if the shortening could change the number of delay slots
1125 for (i = 0; i < XVECLEN (body, 0); i++)
1127 rtx inner_insn = XVECEXP (body, 0, i);
1128 int inner_uid = INSN_UID (inner_insn);
1131 if (GET_CODE (body) == ASM_INPUT
1132 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1133 inner_length = (asm_insn_count (PATTERN (inner_insn))
1134 * insn_default_length (inner_insn));
1136 inner_length = inner_length_fun (inner_insn);
1138 insn_lengths[inner_uid] = inner_length;
1139 if (const_delay_slots)
1141 if ((varying_length[inner_uid]
1142 = insn_variable_length_p (inner_insn)) != 0)
1143 varying_length[uid] = 1;
1144 INSN_ADDRESSES (inner_uid) = (insn_current_address
1145 + insn_lengths[uid]);
1148 varying_length[inner_uid] = 0;
1149 insn_lengths[uid] += inner_length;
1152 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1154 insn_lengths[uid] = length_fun (insn);
1155 varying_length[uid] = insn_variable_length_p (insn);
1158 /* If needed, do any adjustment. */
1159 #ifdef ADJUST_INSN_LENGTH
1160 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1161 if (insn_lengths[uid] < 0)
1162 fatal_insn ("negative insn length", insn);
1166 /* Now loop over all the insns finding varying length insns. For each,
1167 get the current insn length. If it has changed, reflect the change.
1168 When nothing changes for a full pass, we are done. */
1170 while (something_changed)
1172 something_changed = 0;
1173 insn_current_align = MAX_CODE_ALIGN - 1;
1174 for (insn_current_address = 0, insn = first;
1176 insn = NEXT_INSN (insn))
1179 #ifdef ADJUST_INSN_LENGTH
1184 uid = INSN_UID (insn);
1188 int log = LABEL_TO_ALIGNMENT (insn);
1189 if (log > insn_current_align)
1191 int align = 1 << log;
1192 int new_address= (insn_current_address + align - 1) & -align;
1193 insn_lengths[uid] = new_address - insn_current_address;
1194 insn_current_align = log;
1195 insn_current_address = new_address;
1198 insn_lengths[uid] = 0;
1199 INSN_ADDRESSES (uid) = insn_current_address;
1203 length_align = INSN_LENGTH_ALIGNMENT (insn);
1204 if (length_align < insn_current_align)
1205 insn_current_align = length_align;
1207 insn_last_address = INSN_ADDRESSES (uid);
1208 INSN_ADDRESSES (uid) = insn_current_address;
1210 #ifdef CASE_VECTOR_SHORTEN_MODE
1211 if (optimize && JUMP_P (insn)
1212 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1214 rtx body = PATTERN (insn);
1215 int old_length = insn_lengths[uid];
1216 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1217 rtx min_lab = XEXP (XEXP (body, 2), 0);
1218 rtx max_lab = XEXP (XEXP (body, 3), 0);
1219 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1220 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1221 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1224 addr_diff_vec_flags flags;
1225 enum machine_mode vec_mode;
1227 /* Avoid automatic aggregate initialization. */
1228 flags = ADDR_DIFF_VEC_FLAGS (body);
1230 /* Try to find a known alignment for rel_lab. */
1231 for (prev = rel_lab;
1233 && ! insn_lengths[INSN_UID (prev)]
1234 && ! (varying_length[INSN_UID (prev)] & 1);
1235 prev = PREV_INSN (prev))
1236 if (varying_length[INSN_UID (prev)] & 2)
1238 rel_align = LABEL_TO_ALIGNMENT (prev);
1242 /* See the comment on addr_diff_vec_flags in rtl.h for the
1243 meaning of the flags values. base: REL_LAB vec: INSN */
1244 /* Anything after INSN has still addresses from the last
1245 pass; adjust these so that they reflect our current
1246 estimate for this pass. */
1247 if (flags.base_after_vec)
1248 rel_addr += insn_current_address - insn_last_address;
1249 if (flags.min_after_vec)
1250 min_addr += insn_current_address - insn_last_address;
1251 if (flags.max_after_vec)
1252 max_addr += insn_current_address - insn_last_address;
1253 /* We want to know the worst case, i.e. lowest possible value
1254 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1255 its offset is positive, and we have to be wary of code shrink;
1256 otherwise, it is negative, and we have to be vary of code
1258 if (flags.min_after_base)
1260 /* If INSN is between REL_LAB and MIN_LAB, the size
1261 changes we are about to make can change the alignment
1262 within the observed offset, therefore we have to break
1263 it up into two parts that are independent. */
1264 if (! flags.base_after_vec && flags.min_after_vec)
1266 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1267 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1270 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1274 if (flags.base_after_vec && ! flags.min_after_vec)
1276 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1277 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1280 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1282 /* Likewise, determine the highest lowest possible value
1283 for the offset of MAX_LAB. */
1284 if (flags.max_after_base)
1286 if (! flags.base_after_vec && flags.max_after_vec)
1288 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1289 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1292 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1296 if (flags.base_after_vec && ! flags.max_after_vec)
1298 max_addr += align_fuzz (max_lab, insn, 0, 0);
1299 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1302 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1304 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1305 max_addr - rel_addr, body);
1307 || (GET_MODE_SIZE (vec_mode)
1308 >= GET_MODE_SIZE (GET_MODE (body))))
1309 PUT_MODE (body, vec_mode);
1310 if (JUMP_TABLES_IN_TEXT_SECTION
1311 || readonly_data_section == text_section)
1314 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1315 insn_current_address += insn_lengths[uid];
1316 if (insn_lengths[uid] != old_length)
1317 something_changed = 1;
1322 #endif /* CASE_VECTOR_SHORTEN_MODE */
1324 if (! (varying_length[uid]))
1326 if (NONJUMP_INSN_P (insn)
1327 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1331 body = PATTERN (insn);
1332 for (i = 0; i < XVECLEN (body, 0); i++)
1334 rtx inner_insn = XVECEXP (body, 0, i);
1335 int inner_uid = INSN_UID (inner_insn);
1337 INSN_ADDRESSES (inner_uid) = insn_current_address;
1339 insn_current_address += insn_lengths[inner_uid];
1343 insn_current_address += insn_lengths[uid];
1348 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1352 body = PATTERN (insn);
1354 for (i = 0; i < XVECLEN (body, 0); i++)
1356 rtx inner_insn = XVECEXP (body, 0, i);
1357 int inner_uid = INSN_UID (inner_insn);
1360 INSN_ADDRESSES (inner_uid) = insn_current_address;
1362 /* insn_current_length returns 0 for insns with a
1363 non-varying length. */
1364 if (! varying_length[inner_uid])
1365 inner_length = insn_lengths[inner_uid];
1367 inner_length = insn_current_length (inner_insn);
1369 if (inner_length != insn_lengths[inner_uid])
1371 if (!increasing || inner_length > insn_lengths[inner_uid])
1373 insn_lengths[inner_uid] = inner_length;
1374 something_changed = 1;
1377 inner_length = insn_lengths[inner_uid];
1379 insn_current_address += inner_length;
1380 new_length += inner_length;
1385 new_length = insn_current_length (insn);
1386 insn_current_address += new_length;
1389 #ifdef ADJUST_INSN_LENGTH
1390 /* If needed, do any adjustment. */
1391 tmp_length = new_length;
1392 ADJUST_INSN_LENGTH (insn, new_length);
1393 insn_current_address += (new_length - tmp_length);
1396 if (new_length != insn_lengths[uid]
1397 && (!increasing || new_length > insn_lengths[uid]))
1399 insn_lengths[uid] = new_length;
1400 something_changed = 1;
1403 insn_current_address += insn_lengths[uid] - new_length;
1405 /* For a non-optimizing compile, do only a single pass. */
1410 free (varying_length);
1413 /* Given the body of an INSN known to be generated by an ASM statement, return
1414 the number of machine instructions likely to be generated for this insn.
1415 This is used to compute its length. */
1418 asm_insn_count (rtx body)
1422 if (GET_CODE (body) == ASM_INPUT)
1423 templ = XSTR (body, 0);
1425 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1427 return asm_str_count (templ);
1430 /* Return the number of machine instructions likely to be generated for the
1431 inline-asm template. */
1433 asm_str_count (const char *templ)
1440 for (; *templ; templ++)
1441 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1448 /* ??? This is probably the wrong place for these. */
1449 /* Structure recording the mapping from source file and directory
1450 names at compile time to those to be embedded in debug
1452 typedef struct debug_prefix_map
1454 const char *old_prefix;
1455 const char *new_prefix;
1458 struct debug_prefix_map *next;
1461 /* Linked list of such structures. */
1462 debug_prefix_map *debug_prefix_maps;
1465 /* Record a debug file prefix mapping. ARG is the argument to
1466 -fdebug-prefix-map and must be of the form OLD=NEW. */
1469 add_debug_prefix_map (const char *arg)
1471 debug_prefix_map *map;
1474 p = strchr (arg, '=');
1477 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1480 map = XNEW (debug_prefix_map);
1481 map->old_prefix = xstrndup (arg, p - arg);
1482 map->old_len = p - arg;
1484 map->new_prefix = xstrdup (p);
1485 map->new_len = strlen (p);
1486 map->next = debug_prefix_maps;
1487 debug_prefix_maps = map;
1490 /* Perform user-specified mapping of debug filename prefixes. Return
1491 the new name corresponding to FILENAME. */
1494 remap_debug_filename (const char *filename)
1496 debug_prefix_map *map;
1501 for (map = debug_prefix_maps; map; map = map->next)
1502 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1506 name = filename + map->old_len;
1507 name_len = strlen (name) + 1;
1508 s = (char *) alloca (name_len + map->new_len);
1509 memcpy (s, map->new_prefix, map->new_len);
1510 memcpy (s + map->new_len, name, name_len);
1511 return ggc_strdup (s);
1514 /* Return true if DWARF2 debug info can be emitted for DECL. */
1517 dwarf2_debug_info_emitted_p (tree decl)
1519 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1522 if (DECL_IGNORED_P (decl))
1528 /* Return scope resulting from combination of S1 and S2. */
1530 choose_inner_scope (tree s1, tree s2)
1536 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1541 /* Emit lexical block notes needed to change scope from S1 to S2. */
1544 change_scope (rtx orig_insn, tree s1, tree s2)
1546 rtx insn = orig_insn;
1547 tree com = NULL_TREE;
1548 tree ts1 = s1, ts2 = s2;
1553 gcc_assert (ts1 && ts2);
1554 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1555 ts1 = BLOCK_SUPERCONTEXT (ts1);
1556 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1557 ts2 = BLOCK_SUPERCONTEXT (ts2);
1560 ts1 = BLOCK_SUPERCONTEXT (ts1);
1561 ts2 = BLOCK_SUPERCONTEXT (ts2);
1570 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1571 NOTE_BLOCK (note) = s;
1572 s = BLOCK_SUPERCONTEXT (s);
1579 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1580 NOTE_BLOCK (insn) = s;
1581 s = BLOCK_SUPERCONTEXT (s);
1585 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1586 on the scope tree and the newly reordered instructions. */
1589 reemit_insn_block_notes (void)
1591 tree cur_block = DECL_INITIAL (cfun->decl);
1594 insn = get_insns ();
1595 if (!active_insn_p (insn))
1596 insn = next_active_insn (insn);
1597 for (; insn; insn = next_active_insn (insn))
1601 /* Avoid putting scope notes between jump table and its label. */
1602 if (JUMP_TABLE_DATA_P (insn))
1605 this_block = insn_scope (insn);
1606 /* For sequences compute scope resulting from merging all scopes
1607 of instructions nested inside. */
1608 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
1611 rtx body = PATTERN (insn);
1614 for (i = 0; i < XVECLEN (body, 0); i++)
1615 this_block = choose_inner_scope (this_block,
1616 insn_scope (XVECEXP (body, 0, i)));
1619 this_block = DECL_INITIAL (cfun->decl);
1621 if (this_block != cur_block)
1623 change_scope (insn, cur_block, this_block);
1624 cur_block = this_block;
1628 /* change_scope emits before the insn, not after. */
1629 note = emit_note (NOTE_INSN_DELETED);
1630 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1636 /* Output assembler code for the start of a function,
1637 and initialize some of the variables in this file
1638 for the new function. The label for the function and associated
1639 assembler pseudo-ops have already been output in `assemble_start_function'.
1641 FIRST is the first insn of the rtl for the function being compiled.
1642 FILE is the file to write assembler code to.
1643 OPTIMIZE_P is nonzero if we should eliminate redundant
1644 test and compare insns. */
1647 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1648 int optimize_p ATTRIBUTE_UNUSED)
1652 this_is_asm_operands = 0;
1654 last_filename = LOCATION_FILE (prologue_location);
1655 last_linenum = LOCATION_LINE (prologue_location);
1656 last_discriminator = discriminator = 0;
1658 high_block_linenum = high_function_linenum = last_linenum;
1660 if (!DECL_IGNORED_P (current_function_decl))
1661 debug_hooks->begin_prologue (last_linenum, last_filename);
1663 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1664 dwarf2out_begin_prologue (0, NULL);
1666 #ifdef LEAF_REG_REMAP
1667 if (crtl->uses_only_leaf_regs)
1668 leaf_renumber_regs (first);
1671 /* The Sun386i and perhaps other machines don't work right
1672 if the profiling code comes after the prologue. */
1673 if (targetm.profile_before_prologue () && crtl->profile)
1674 profile_function (file);
1676 /* If debugging, assign block numbers to all of the blocks in this
1680 reemit_insn_block_notes ();
1681 number_blocks (current_function_decl);
1682 /* We never actually put out begin/end notes for the top-level
1683 block in the function. But, conceptually, that block is
1685 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1688 if (warn_frame_larger_than
1689 && get_frame_size () > frame_larger_than_size)
1691 /* Issue a warning */
1692 warning (OPT_Wframe_larger_than_,
1693 "the frame size of %wd bytes is larger than %wd bytes",
1694 get_frame_size (), frame_larger_than_size);
1697 /* First output the function prologue: code to set up the stack frame. */
1698 targetm.asm_out.function_prologue (file, get_frame_size ());
1700 /* If the machine represents the prologue as RTL, the profiling code must
1701 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1702 #ifdef HAVE_prologue
1703 if (! HAVE_prologue)
1705 profile_after_prologue (file);
1709 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1711 if (!targetm.profile_before_prologue () && crtl->profile)
1712 profile_function (file);
1716 profile_function (FILE *file ATTRIBUTE_UNUSED)
1718 #ifndef NO_PROFILE_COUNTERS
1719 # define NO_PROFILE_COUNTERS 0
1721 #ifdef ASM_OUTPUT_REG_PUSH
1722 rtx sval = NULL, chain = NULL;
1724 if (cfun->returns_struct)
1725 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1727 if (cfun->static_chain_decl)
1728 chain = targetm.calls.static_chain (current_function_decl, true);
1729 #endif /* ASM_OUTPUT_REG_PUSH */
1731 if (! NO_PROFILE_COUNTERS)
1733 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1734 switch_to_section (data_section);
1735 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1736 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1737 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1740 switch_to_section (current_function_section ());
1742 #ifdef ASM_OUTPUT_REG_PUSH
1743 if (sval && REG_P (sval))
1744 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1745 if (chain && REG_P (chain))
1746 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1749 FUNCTION_PROFILER (file, current_function_funcdef_no);
1751 #ifdef ASM_OUTPUT_REG_PUSH
1752 if (chain && REG_P (chain))
1753 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1754 if (sval && REG_P (sval))
1755 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1759 /* Output assembler code for the end of a function.
1760 For clarity, args are same as those of `final_start_function'
1761 even though not all of them are needed. */
1764 final_end_function (void)
1768 if (!DECL_IGNORED_P (current_function_decl))
1769 debug_hooks->end_function (high_function_linenum);
1771 /* Finally, output the function epilogue:
1772 code to restore the stack frame and return to the caller. */
1773 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1775 /* And debug output. */
1776 if (!DECL_IGNORED_P (current_function_decl))
1777 debug_hooks->end_epilogue (last_linenum, last_filename);
1779 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1780 && dwarf2out_do_frame ())
1781 dwarf2out_end_epilogue (last_linenum, last_filename);
1785 /* Dumper helper for basic block information. FILE is the assembly
1786 output file, and INSN is the instruction being emitted. */
1789 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
1790 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1794 if (!flag_debug_asm)
1797 if (INSN_UID (insn) < bb_map_size
1798 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1803 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1805 fprintf (file, " freq:%d", bb->frequency);
1807 fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC,
1809 fprintf (file, " seq:%d", (*bb_seqn)++);
1810 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1811 FOR_EACH_EDGE (e, ei, bb->preds)
1813 dump_edge_info (file, e, TDF_DETAILS, 0);
1815 fprintf (file, "\n");
1817 if (INSN_UID (insn) < bb_map_size
1818 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1823 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1824 FOR_EACH_EDGE (e, ei, bb->succs)
1826 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1828 fprintf (file, "\n");
1832 /* Output assembler code for some insns: all or part of a function.
1833 For description of args, see `final_start_function', above. */
1836 final (rtx first, FILE *file, int optimize_p)
1841 /* Used for -dA dump. */
1842 basic_block *start_to_bb = NULL;
1843 basic_block *end_to_bb = NULL;
1844 int bb_map_size = 0;
1847 last_ignored_compare = 0;
1850 for (insn = first; insn; insn = NEXT_INSN (insn))
1852 /* If CC tracking across branches is enabled, record the insn which
1853 jumps to each branch only reached from one place. */
1854 if (optimize_p && JUMP_P (insn))
1856 rtx lab = JUMP_LABEL (insn);
1857 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1859 LABEL_REFS (lab) = insn;
1873 bb_map_size = get_max_uid () + 1;
1874 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1875 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1877 /* There is no cfg for a thunk. */
1878 if (!cfun->is_thunk)
1879 FOR_EACH_BB_REVERSE (bb)
1881 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
1882 end_to_bb[INSN_UID (BB_END (bb))] = bb;
1886 /* Output the insns. */
1887 for (insn = first; insn;)
1889 if (HAVE_ATTR_length)
1891 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1893 /* This can be triggered by bugs elsewhere in the compiler if
1894 new insns are created after init_insn_lengths is called. */
1895 gcc_assert (NOTE_P (insn));
1896 insn_current_address = -1;
1899 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1902 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
1903 bb_map_size, &bb_seqn);
1904 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
1913 /* Remove CFI notes, to avoid compare-debug failures. */
1914 for (insn = first; insn; insn = next)
1916 next = NEXT_INSN (insn);
1918 && (NOTE_KIND (insn) == NOTE_INSN_CFI
1919 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
1925 get_insn_template (int code, rtx insn)
1927 switch (insn_data[code].output_format)
1929 case INSN_OUTPUT_FORMAT_SINGLE:
1930 return insn_data[code].output.single;
1931 case INSN_OUTPUT_FORMAT_MULTI:
1932 return insn_data[code].output.multi[which_alternative];
1933 case INSN_OUTPUT_FORMAT_FUNCTION:
1935 return (*insn_data[code].output.function) (recog_data.operand, insn);
1942 /* Emit the appropriate declaration for an alternate-entry-point
1943 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1944 LABEL_KIND != LABEL_NORMAL.
1946 The case fall-through in this function is intentional. */
1948 output_alternate_entry_point (FILE *file, rtx insn)
1950 const char *name = LABEL_NAME (insn);
1952 switch (LABEL_KIND (insn))
1954 case LABEL_WEAK_ENTRY:
1955 #ifdef ASM_WEAKEN_LABEL
1956 ASM_WEAKEN_LABEL (file, name);
1958 case LABEL_GLOBAL_ENTRY:
1959 targetm.asm_out.globalize_label (file, name);
1960 case LABEL_STATIC_ENTRY:
1961 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1962 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1964 ASM_OUTPUT_LABEL (file, name);
1973 /* Given a CALL_INSN, find and return the nested CALL. */
1975 call_from_call_insn (rtx insn)
1978 gcc_assert (CALL_P (insn));
1981 while (GET_CODE (x) != CALL)
1983 switch (GET_CODE (x))
1988 x = COND_EXEC_CODE (x);
1991 x = XVECEXP (x, 0, 0);
2001 /* The final scan for one insn, INSN.
2002 Args are same as in `final', except that INSN
2003 is the insn being scanned.
2004 Value returned is the next insn to be scanned.
2006 NOPEEPHOLES is the flag to disallow peephole processing (currently
2007 used for within delayed branch sequence output).
2009 SEEN is used to track the end of the prologue, for emitting
2010 debug information. We force the emission of a line note after
2011 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
2012 at the beginning of the second basic block, whichever comes
2016 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2017 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2026 /* Ignore deleted insns. These can occur when we split insns (due to a
2027 template of "#") while not optimizing. */
2028 if (INSN_DELETED_P (insn))
2029 return NEXT_INSN (insn);
2031 switch (GET_CODE (insn))
2034 switch (NOTE_KIND (insn))
2036 case NOTE_INSN_DELETED:
2039 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2040 in_cold_section_p = !in_cold_section_p;
2042 if (dwarf2out_do_frame ())
2043 dwarf2out_switch_text_section ();
2044 else if (!DECL_IGNORED_P (current_function_decl))
2045 debug_hooks->switch_text_section ();
2047 switch_to_section (current_function_section ());
2048 targetm.asm_out.function_switched_text_sections (asm_out_file,
2049 current_function_decl,
2053 case NOTE_INSN_BASIC_BLOCK:
2054 if (targetm.asm_out.unwind_emit)
2055 targetm.asm_out.unwind_emit (asm_out_file, insn);
2057 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
2059 *seen |= SEEN_EMITTED;
2060 force_source_line = true;
2065 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2069 case NOTE_INSN_EH_REGION_BEG:
2070 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2071 NOTE_EH_HANDLER (insn));
2074 case NOTE_INSN_EH_REGION_END:
2075 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2076 NOTE_EH_HANDLER (insn));
2079 case NOTE_INSN_PROLOGUE_END:
2080 targetm.asm_out.function_end_prologue (file);
2081 profile_after_prologue (file);
2083 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2085 *seen |= SEEN_EMITTED;
2086 force_source_line = true;
2093 case NOTE_INSN_EPILOGUE_BEG:
2094 if (!DECL_IGNORED_P (current_function_decl))
2095 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2096 targetm.asm_out.function_begin_epilogue (file);
2100 dwarf2out_emit_cfi (NOTE_CFI (insn));
2103 case NOTE_INSN_CFI_LABEL:
2104 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2105 NOTE_LABEL_NUMBER (insn));
2108 case NOTE_INSN_FUNCTION_BEG:
2110 if (!DECL_IGNORED_P (current_function_decl))
2111 debug_hooks->end_prologue (last_linenum, last_filename);
2113 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2115 *seen |= SEEN_EMITTED;
2116 force_source_line = true;
2123 case NOTE_INSN_BLOCK_BEG:
2124 if (debug_info_level == DINFO_LEVEL_NORMAL
2125 || debug_info_level == DINFO_LEVEL_VERBOSE
2126 || write_symbols == DWARF2_DEBUG
2127 || write_symbols == VMS_AND_DWARF2_DEBUG
2128 || write_symbols == VMS_DEBUG)
2130 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2134 high_block_linenum = last_linenum;
2136 /* Output debugging info about the symbol-block beginning. */
2137 if (!DECL_IGNORED_P (current_function_decl))
2138 debug_hooks->begin_block (last_linenum, n);
2140 /* Mark this block as output. */
2141 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2143 if (write_symbols == DBX_DEBUG
2144 || write_symbols == SDB_DEBUG)
2146 location_t *locus_ptr
2147 = block_nonartificial_location (NOTE_BLOCK (insn));
2149 if (locus_ptr != NULL)
2151 override_filename = LOCATION_FILE (*locus_ptr);
2152 override_linenum = LOCATION_LINE (*locus_ptr);
2157 case NOTE_INSN_BLOCK_END:
2158 if (debug_info_level == DINFO_LEVEL_NORMAL
2159 || debug_info_level == DINFO_LEVEL_VERBOSE
2160 || write_symbols == DWARF2_DEBUG
2161 || write_symbols == VMS_AND_DWARF2_DEBUG
2162 || write_symbols == VMS_DEBUG)
2164 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2168 /* End of a symbol-block. */
2170 gcc_assert (block_depth >= 0);
2172 if (!DECL_IGNORED_P (current_function_decl))
2173 debug_hooks->end_block (high_block_linenum, n);
2175 if (write_symbols == DBX_DEBUG
2176 || write_symbols == SDB_DEBUG)
2178 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2179 location_t *locus_ptr
2180 = block_nonartificial_location (outer_block);
2182 if (locus_ptr != NULL)
2184 override_filename = LOCATION_FILE (*locus_ptr);
2185 override_linenum = LOCATION_LINE (*locus_ptr);
2189 override_filename = NULL;
2190 override_linenum = 0;
2195 case NOTE_INSN_DELETED_LABEL:
2196 /* Emit the label. We may have deleted the CODE_LABEL because
2197 the label could be proved to be unreachable, though still
2198 referenced (in the form of having its address taken. */
2199 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2202 case NOTE_INSN_DELETED_DEBUG_LABEL:
2203 /* Similarly, but need to use different namespace for it. */
2204 if (CODE_LABEL_NUMBER (insn) != -1)
2205 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2208 case NOTE_INSN_VAR_LOCATION:
2209 case NOTE_INSN_CALL_ARG_LOCATION:
2210 if (!DECL_IGNORED_P (current_function_decl))
2211 debug_hooks->var_location (insn);
2224 /* The target port might emit labels in the output function for
2225 some insn, e.g. sh.c output_branchy_insn. */
2226 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2228 int align = LABEL_TO_ALIGNMENT (insn);
2229 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2230 int max_skip = LABEL_TO_MAX_SKIP (insn);
2233 if (align && NEXT_INSN (insn))
2235 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2236 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2238 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2239 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2241 ASM_OUTPUT_ALIGN (file, align);
2248 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2249 debug_hooks->label (insn);
2253 next = next_nonnote_insn (insn);
2254 /* If this label is followed by a jump-table, make sure we put
2255 the label in the read-only section. Also possibly write the
2256 label and jump table together. */
2257 if (next != 0 && JUMP_TABLE_DATA_P (next))
2259 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2260 /* In this case, the case vector is being moved by the
2261 target, so don't output the label at all. Leave that
2262 to the back end macros. */
2264 if (! JUMP_TABLES_IN_TEXT_SECTION)
2268 switch_to_section (targetm.asm_out.function_rodata_section
2269 (current_function_decl));
2271 #ifdef ADDR_VEC_ALIGN
2272 log_align = ADDR_VEC_ALIGN (next);
2274 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2276 ASM_OUTPUT_ALIGN (file, log_align);
2279 switch_to_section (current_function_section ());
2281 #ifdef ASM_OUTPUT_CASE_LABEL
2282 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2285 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2290 if (LABEL_ALT_ENTRY_P (insn))
2291 output_alternate_entry_point (file, insn);
2293 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2298 rtx body = PATTERN (insn);
2299 int insn_code_number;
2303 /* Reset this early so it is correct for ASM statements. */
2304 current_insn_predicate = NULL_RTX;
2306 /* An INSN, JUMP_INSN or CALL_INSN.
2307 First check for special kinds that recog doesn't recognize. */
2309 if (GET_CODE (body) == USE /* These are just declarations. */
2310 || GET_CODE (body) == CLOBBER)
2315 /* If there is a REG_CC_SETTER note on this insn, it means that
2316 the setting of the condition code was done in the delay slot
2317 of the insn that branched here. So recover the cc status
2318 from the insn that set it. */
2320 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2323 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2324 cc_prev_status = cc_status;
2329 /* Detect insns that are really jump-tables
2330 and output them as such. */
2332 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2334 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2338 if (! JUMP_TABLES_IN_TEXT_SECTION)
2339 switch_to_section (targetm.asm_out.function_rodata_section
2340 (current_function_decl));
2342 switch_to_section (current_function_section ());
2346 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2347 if (GET_CODE (body) == ADDR_VEC)
2349 #ifdef ASM_OUTPUT_ADDR_VEC
2350 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2357 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2358 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2364 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2365 for (idx = 0; idx < vlen; idx++)
2367 if (GET_CODE (body) == ADDR_VEC)
2369 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2370 ASM_OUTPUT_ADDR_VEC_ELT
2371 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2378 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2379 ASM_OUTPUT_ADDR_DIFF_ELT
2382 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2383 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2389 #ifdef ASM_OUTPUT_CASE_END
2390 ASM_OUTPUT_CASE_END (file,
2391 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2396 switch_to_section (current_function_section ());
2400 /* Output this line note if it is the first or the last line
2402 if (!DECL_IGNORED_P (current_function_decl)
2403 && notice_source_line (insn, &is_stmt))
2404 (*debug_hooks->source_line) (last_linenum, last_filename,
2405 last_discriminator, is_stmt);
2407 if (GET_CODE (body) == ASM_INPUT)
2409 const char *string = XSTR (body, 0);
2411 /* There's no telling what that did to the condition codes. */
2416 expanded_location loc;
2419 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2420 if (*loc.file && loc.line)
2421 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2422 ASM_COMMENT_START, loc.line, loc.file);
2423 fprintf (asm_out_file, "\t%s\n", string);
2424 #if HAVE_AS_LINE_ZERO
2425 if (*loc.file && loc.line)
2426 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2432 /* Detect `asm' construct with operands. */
2433 if (asm_noperands (body) >= 0)
2435 unsigned int noperands = asm_noperands (body);
2436 rtx *ops = XALLOCAVEC (rtx, noperands);
2439 expanded_location expanded;
2441 /* There's no telling what that did to the condition codes. */
2444 /* Get out the operand values. */
2445 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2446 /* Inhibit dying on what would otherwise be compiler bugs. */
2447 insn_noperands = noperands;
2448 this_is_asm_operands = insn;
2449 expanded = expand_location (loc);
2451 #ifdef FINAL_PRESCAN_INSN
2452 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2455 /* Output the insn using them. */
2459 if (expanded.file && expanded.line)
2460 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2461 ASM_COMMENT_START, expanded.line, expanded.file);
2462 output_asm_insn (string, ops);
2463 #if HAVE_AS_LINE_ZERO
2464 if (expanded.file && expanded.line)
2465 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2469 if (targetm.asm_out.final_postscan_insn)
2470 targetm.asm_out.final_postscan_insn (file, insn, ops,
2473 this_is_asm_operands = 0;
2479 if (GET_CODE (body) == SEQUENCE)
2481 /* A delayed-branch sequence */
2484 final_sequence = body;
2486 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2487 force the restoration of a comparison that was previously
2488 thought unnecessary. If that happens, cancel this sequence
2489 and cause that insn to be restored. */
2491 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2492 if (next != XVECEXP (body, 0, 1))
2498 for (i = 1; i < XVECLEN (body, 0); i++)
2500 rtx insn = XVECEXP (body, 0, i);
2501 rtx next = NEXT_INSN (insn);
2502 /* We loop in case any instruction in a delay slot gets
2505 insn = final_scan_insn (insn, file, 0, 1, seen);
2506 while (insn != next);
2508 #ifdef DBR_OUTPUT_SEQEND
2509 DBR_OUTPUT_SEQEND (file);
2513 /* If the insn requiring the delay slot was a CALL_INSN, the
2514 insns in the delay slot are actually executed before the
2515 called function. Hence we don't preserve any CC-setting
2516 actions in these insns and the CC must be marked as being
2517 clobbered by the function. */
2518 if (CALL_P (XVECEXP (body, 0, 0)))
2525 /* We have a real machine instruction as rtl. */
2527 body = PATTERN (insn);
2530 set = single_set (insn);
2532 /* Check for redundant test and compare instructions
2533 (when the condition codes are already set up as desired).
2534 This is done only when optimizing; if not optimizing,
2535 it should be possible for the user to alter a variable
2536 with the debugger in between statements
2537 and the next statement should reexamine the variable
2538 to compute the condition codes. */
2543 && GET_CODE (SET_DEST (set)) == CC0
2544 && insn != last_ignored_compare)
2547 if (GET_CODE (SET_SRC (set)) == SUBREG)
2548 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2550 src1 = SET_SRC (set);
2552 if (GET_CODE (SET_SRC (set)) == COMPARE)
2554 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2555 XEXP (SET_SRC (set), 0)
2556 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2557 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2558 XEXP (SET_SRC (set), 1)
2559 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2560 if (XEXP (SET_SRC (set), 1)
2561 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2562 src2 = XEXP (SET_SRC (set), 0);
2564 if ((cc_status.value1 != 0
2565 && rtx_equal_p (src1, cc_status.value1))
2566 || (cc_status.value2 != 0
2567 && rtx_equal_p (src1, cc_status.value2))
2568 || (src2 != 0 && cc_status.value1 != 0
2569 && rtx_equal_p (src2, cc_status.value1))
2570 || (src2 != 0 && cc_status.value2 != 0
2571 && rtx_equal_p (src2, cc_status.value2)))
2573 /* Don't delete insn if it has an addressing side-effect. */
2574 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2575 /* or if anything in it is volatile. */
2576 && ! volatile_refs_p (PATTERN (insn)))
2578 /* We don't really delete the insn; just ignore it. */
2579 last_ignored_compare = insn;
2586 /* If this is a conditional branch, maybe modify it
2587 if the cc's are in a nonstandard state
2588 so that it accomplishes the same thing that it would
2589 do straightforwardly if the cc's were set up normally. */
2591 if (cc_status.flags != 0
2593 && GET_CODE (body) == SET
2594 && SET_DEST (body) == pc_rtx
2595 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2596 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2597 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2599 /* This function may alter the contents of its argument
2600 and clear some of the cc_status.flags bits.
2601 It may also return 1 meaning condition now always true
2602 or -1 meaning condition now always false
2603 or 2 meaning condition nontrivial but altered. */
2604 int result = alter_cond (XEXP (SET_SRC (body), 0));
2605 /* If condition now has fixed value, replace the IF_THEN_ELSE
2606 with its then-operand or its else-operand. */
2608 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2610 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2612 /* The jump is now either unconditional or a no-op.
2613 If it has become a no-op, don't try to output it.
2614 (It would not be recognized.) */
2615 if (SET_SRC (body) == pc_rtx)
2620 else if (ANY_RETURN_P (SET_SRC (body)))
2621 /* Replace (set (pc) (return)) with (return). */
2622 PATTERN (insn) = body = SET_SRC (body);
2624 /* Rerecognize the instruction if it has changed. */
2626 INSN_CODE (insn) = -1;
2629 /* If this is a conditional trap, maybe modify it if the cc's
2630 are in a nonstandard state so that it accomplishes the same
2631 thing that it would do straightforwardly if the cc's were
2633 if (cc_status.flags != 0
2634 && NONJUMP_INSN_P (insn)
2635 && GET_CODE (body) == TRAP_IF
2636 && COMPARISON_P (TRAP_CONDITION (body))
2637 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2639 /* This function may alter the contents of its argument
2640 and clear some of the cc_status.flags bits.
2641 It may also return 1 meaning condition now always true
2642 or -1 meaning condition now always false
2643 or 2 meaning condition nontrivial but altered. */
2644 int result = alter_cond (TRAP_CONDITION (body));
2646 /* If TRAP_CONDITION has become always false, delete the
2654 /* If TRAP_CONDITION has become always true, replace
2655 TRAP_CONDITION with const_true_rtx. */
2657 TRAP_CONDITION (body) = const_true_rtx;
2659 /* Rerecognize the instruction if it has changed. */
2661 INSN_CODE (insn) = -1;
2664 /* Make same adjustments to instructions that examine the
2665 condition codes without jumping and instructions that
2666 handle conditional moves (if this machine has either one). */
2668 if (cc_status.flags != 0
2671 rtx cond_rtx, then_rtx, else_rtx;
2674 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2676 cond_rtx = XEXP (SET_SRC (set), 0);
2677 then_rtx = XEXP (SET_SRC (set), 1);
2678 else_rtx = XEXP (SET_SRC (set), 2);
2682 cond_rtx = SET_SRC (set);
2683 then_rtx = const_true_rtx;
2684 else_rtx = const0_rtx;
2687 switch (GET_CODE (cond_rtx))
2701 if (XEXP (cond_rtx, 0) != cc0_rtx)
2703 result = alter_cond (cond_rtx);
2705 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2706 else if (result == -1)
2707 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2708 else if (result == 2)
2709 INSN_CODE (insn) = -1;
2710 if (SET_DEST (set) == SET_SRC (set))
2722 #ifdef HAVE_peephole
2723 /* Do machine-specific peephole optimizations if desired. */
2725 if (optimize_p && !flag_no_peephole && !nopeepholes)
2727 rtx next = peephole (insn);
2728 /* When peepholing, if there were notes within the peephole,
2729 emit them before the peephole. */
2730 if (next != 0 && next != NEXT_INSN (insn))
2732 rtx note, prev = PREV_INSN (insn);
2734 for (note = NEXT_INSN (insn); note != next;
2735 note = NEXT_INSN (note))
2736 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2738 /* Put the notes in the proper position for a later
2739 rescan. For example, the SH target can do this
2740 when generating a far jump in a delayed branch
2742 note = NEXT_INSN (insn);
2743 PREV_INSN (note) = prev;
2744 NEXT_INSN (prev) = note;
2745 NEXT_INSN (PREV_INSN (next)) = insn;
2746 PREV_INSN (insn) = PREV_INSN (next);
2747 NEXT_INSN (insn) = next;
2748 PREV_INSN (next) = insn;
2751 /* PEEPHOLE might have changed this. */
2752 body = PATTERN (insn);
2756 /* Try to recognize the instruction.
2757 If successful, verify that the operands satisfy the
2758 constraints for the instruction. Crash if they don't,
2759 since `reload' should have changed them so that they do. */
2761 insn_code_number = recog_memoized (insn);
2762 cleanup_subreg_operands (insn);
2764 /* Dump the insn in the assembly for debugging (-dAP).
2765 If the final dump is requested as slim RTL, dump slim
2766 RTL to the assembly file also. */
2767 if (flag_dump_rtl_in_asm)
2769 print_rtx_head = ASM_COMMENT_START;
2770 if (! (dump_flags & TDF_SLIM))
2771 print_rtl_single (asm_out_file, insn);
2773 dump_insn_slim (asm_out_file, insn);
2774 print_rtx_head = "";
2777 if (! constrain_operands_cached (1))
2778 fatal_insn_not_found (insn);
2780 /* Some target machines need to prescan each insn before
2783 #ifdef FINAL_PRESCAN_INSN
2784 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2787 if (targetm.have_conditional_execution ()
2788 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2789 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2792 cc_prev_status = cc_status;
2794 /* Update `cc_status' for this instruction.
2795 The instruction's output routine may change it further.
2796 If the output routine for a jump insn needs to depend
2797 on the cc status, it should look at cc_prev_status. */
2799 NOTICE_UPDATE_CC (body, insn);
2802 current_output_insn = debug_insn = insn;
2804 /* Find the proper template for this insn. */
2805 templ = get_insn_template (insn_code_number, insn);
2807 /* If the C code returns 0, it means that it is a jump insn
2808 which follows a deleted test insn, and that test insn
2809 needs to be reinserted. */
2814 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2816 /* We have already processed the notes between the setter and
2817 the user. Make sure we don't process them again, this is
2818 particularly important if one of the notes is a block
2819 scope note or an EH note. */
2821 prev != last_ignored_compare;
2822 prev = PREV_INSN (prev))
2825 delete_insn (prev); /* Use delete_note. */
2831 /* If the template is the string "#", it means that this insn must
2833 if (templ[0] == '#' && templ[1] == '\0')
2835 rtx new_rtx = try_split (body, insn, 0);
2837 /* If we didn't split the insn, go away. */
2838 if (new_rtx == insn && PATTERN (new_rtx) == body)
2839 fatal_insn ("could not split insn", insn);
2841 /* If we have a length attribute, this instruction should have
2842 been split in shorten_branches, to ensure that we would have
2843 valid length info for the splitees. */
2844 gcc_assert (!HAVE_ATTR_length);
2849 /* ??? This will put the directives in the wrong place if
2850 get_insn_template outputs assembly directly. However calling it
2851 before get_insn_template breaks if the insns is split. */
2852 if (targetm.asm_out.unwind_emit_before_insn
2853 && targetm.asm_out.unwind_emit)
2854 targetm.asm_out.unwind_emit (asm_out_file, insn);
2858 rtx x = call_from_call_insn (insn);
2860 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2864 t = SYMBOL_REF_DECL (x);
2866 assemble_external (t);
2868 if (!DECL_IGNORED_P (current_function_decl))
2869 debug_hooks->var_location (insn);
2872 /* Output assembler code from the template. */
2873 output_asm_insn (templ, recog_data.operand);
2875 /* Some target machines need to postscan each insn after
2877 if (targetm.asm_out.final_postscan_insn)
2878 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2879 recog_data.n_operands);
2881 if (!targetm.asm_out.unwind_emit_before_insn
2882 && targetm.asm_out.unwind_emit)
2883 targetm.asm_out.unwind_emit (asm_out_file, insn);
2885 current_output_insn = debug_insn = 0;
2888 return NEXT_INSN (insn);
2891 /* Return whether a source line note needs to be emitted before INSN.
2892 Sets IS_STMT to TRUE if the line should be marked as a possible
2893 breakpoint location. */
2896 notice_source_line (rtx insn, bool *is_stmt)
2898 const char *filename;
2901 if (override_filename)
2903 filename = override_filename;
2904 linenum = override_linenum;
2908 filename = insn_file (insn);
2909 linenum = insn_line (insn);
2912 if (filename == NULL)
2915 if (force_source_line
2916 || filename != last_filename
2917 || last_linenum != linenum)
2919 force_source_line = false;
2920 last_filename = filename;
2921 last_linenum = linenum;
2922 last_discriminator = discriminator;
2924 high_block_linenum = MAX (last_linenum, high_block_linenum);
2925 high_function_linenum = MAX (last_linenum, high_function_linenum);
2929 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
2931 /* If the discriminator changed, but the line number did not,
2932 output the line table entry with is_stmt false so the
2933 debugger does not treat this as a breakpoint location. */
2934 last_discriminator = discriminator;
2942 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2943 directly to the desired hard register. */
2946 cleanup_subreg_operands (rtx insn)
2949 bool changed = false;
2950 extract_insn_cached (insn);
2951 for (i = 0; i < recog_data.n_operands; i++)
2953 /* The following test cannot use recog_data.operand when testing
2954 for a SUBREG: the underlying object might have been changed
2955 already if we are inside a match_operator expression that
2956 matches the else clause. Instead we test the underlying
2957 expression directly. */
2958 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2960 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
2963 else if (GET_CODE (recog_data.operand[i]) == PLUS
2964 || GET_CODE (recog_data.operand[i]) == MULT
2965 || MEM_P (recog_data.operand[i]))
2966 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2969 for (i = 0; i < recog_data.n_dups; i++)
2971 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2973 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
2976 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2977 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2978 || MEM_P (*recog_data.dup_loc[i]))
2979 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2982 df_insn_rescan (insn);
2985 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
2986 the thing it is a subreg of. Do it anyway if FINAL_P. */
2989 alter_subreg (rtx *xp, bool final_p)
2992 rtx y = SUBREG_REG (x);
2994 /* simplify_subreg does not remove subreg from volatile references.
2995 We are required to. */
2998 int offset = SUBREG_BYTE (x);
3000 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3001 contains 0 instead of the proper offset. See simplify_subreg. */
3003 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
3005 int difference = GET_MODE_SIZE (GET_MODE (y))
3006 - GET_MODE_SIZE (GET_MODE (x));
3007 if (WORDS_BIG_ENDIAN)
3008 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3009 if (BYTES_BIG_ENDIAN)
3010 offset += difference % UNITS_PER_WORD;
3014 *xp = adjust_address (y, GET_MODE (x), offset);
3016 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3020 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3025 else if (final_p && REG_P (y))
3027 /* Simplify_subreg can't handle some REG cases, but we have to. */
3029 HOST_WIDE_INT offset;
3031 regno = subreg_regno (x);
3032 if (subreg_lowpart_p (x))
3033 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3035 offset = SUBREG_BYTE (x);
3036 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3043 /* Do alter_subreg on all the SUBREGs contained in X. */
3046 walk_alter_subreg (rtx *xp, bool *changed)
3049 switch (GET_CODE (x))
3054 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3055 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3060 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3065 return alter_subreg (xp, true);
3076 /* Given BODY, the body of a jump instruction, alter the jump condition
3077 as required by the bits that are set in cc_status.flags.
3078 Not all of the bits there can be handled at this level in all cases.
3080 The value is normally 0.
3081 1 means that the condition has become always true.
3082 -1 means that the condition has become always false.
3083 2 means that COND has been altered. */
3086 alter_cond (rtx cond)
3090 if (cc_status.flags & CC_REVERSED)
3093 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3096 if (cc_status.flags & CC_INVERTED)
3099 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3102 if (cc_status.flags & CC_NOT_POSITIVE)
3103 switch (GET_CODE (cond))
3108 /* Jump becomes unconditional. */
3114 /* Jump becomes no-op. */
3118 PUT_CODE (cond, EQ);
3123 PUT_CODE (cond, NE);
3131 if (cc_status.flags & CC_NOT_NEGATIVE)
3132 switch (GET_CODE (cond))
3136 /* Jump becomes unconditional. */
3141 /* Jump becomes no-op. */
3146 PUT_CODE (cond, EQ);
3152 PUT_CODE (cond, NE);
3160 if (cc_status.flags & CC_NO_OVERFLOW)
3161 switch (GET_CODE (cond))
3164 /* Jump becomes unconditional. */
3168 PUT_CODE (cond, EQ);
3173 PUT_CODE (cond, NE);
3178 /* Jump becomes no-op. */
3185 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3186 switch (GET_CODE (cond))
3192 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3197 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3202 if (cc_status.flags & CC_NOT_SIGNED)
3203 /* The flags are valid if signed condition operators are converted
3205 switch (GET_CODE (cond))
3208 PUT_CODE (cond, LEU);
3213 PUT_CODE (cond, LTU);
3218 PUT_CODE (cond, GTU);
3223 PUT_CODE (cond, GEU);
3235 /* Report inconsistency between the assembler template and the operands.
3236 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3239 output_operand_lossage (const char *cmsgid, ...)
3243 const char *pfx_str;
3246 va_start (ap, cmsgid);
3248 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3249 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3250 vasprintf (&new_message, fmt_string, ap);
3252 if (this_is_asm_operands)
3253 error_for_asm (this_is_asm_operands, "%s", new_message);
3255 internal_error ("%s", new_message);
3262 /* Output of assembler code from a template, and its subroutines. */
3264 /* Annotate the assembly with a comment describing the pattern and
3265 alternative used. */
3268 output_asm_name (void)
3272 int num = INSN_CODE (debug_insn);
3273 fprintf (asm_out_file, "\t%s %d\t%s",
3274 ASM_COMMENT_START, INSN_UID (debug_insn),
3275 insn_data[num].name);
3276 if (insn_data[num].n_alternatives > 1)
3277 fprintf (asm_out_file, "/%d", which_alternative + 1);
3279 if (HAVE_ATTR_length)
3280 fprintf (asm_out_file, "\t[length = %d]",
3281 get_attr_length (debug_insn));
3283 /* Clear this so only the first assembler insn
3284 of any rtl insn will get the special comment for -dp. */
3289 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3290 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3291 corresponds to the address of the object and 0 if to the object. */
3294 get_mem_expr_from_op (rtx op, int *paddressp)
3302 return REG_EXPR (op);
3303 else if (!MEM_P (op))
3306 if (MEM_EXPR (op) != 0)
3307 return MEM_EXPR (op);
3309 /* Otherwise we have an address, so indicate it and look at the address. */
3313 /* First check if we have a decl for the address, then look at the right side
3314 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3315 But don't allow the address to itself be indirect. */
3316 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3318 else if (GET_CODE (op) == PLUS
3319 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3323 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3326 expr = get_mem_expr_from_op (op, &inner_addressp);
3327 return inner_addressp ? 0 : expr;
3330 /* Output operand names for assembler instructions. OPERANDS is the
3331 operand vector, OPORDER is the order to write the operands, and NOPS
3332 is the number of operands to write. */
3335 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3340 for (i = 0; i < nops; i++)
3343 rtx op = operands[oporder[i]];
3344 tree expr = get_mem_expr_from_op (op, &addressp);
3346 fprintf (asm_out_file, "%c%s",
3347 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3351 fprintf (asm_out_file, "%s",
3352 addressp ? "*" : "");
3353 print_mem_expr (asm_out_file, expr);
3356 else if (REG_P (op) && ORIGINAL_REGNO (op)
3357 && ORIGINAL_REGNO (op) != REGNO (op))
3358 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3362 #ifdef ASSEMBLER_DIALECT
3363 /* Helper function to parse assembler dialects in the asm string.
3364 This is called from output_asm_insn and asm_fprintf. */
3366 do_assembler_dialects (const char *p, int *dialect)
3377 output_operand_lossage ("nested assembly dialect alternatives");
3381 /* If we want the first dialect, do nothing. Otherwise, skip
3382 DIALECT_NUMBER of strings ending with '|'. */
3383 for (i = 0; i < dialect_number; i++)
3385 while (*p && *p != '}' && *p++ != '|')
3392 output_operand_lossage ("unterminated assembly dialect alternative");
3399 /* Skip to close brace. */
3404 output_operand_lossage ("unterminated assembly dialect alternative");
3408 while (*p++ != '}');
3412 putc (c, asm_out_file);
3417 putc (c, asm_out_file);
3428 /* Output text from TEMPLATE to the assembler output file,
3429 obeying %-directions to substitute operands taken from
3430 the vector OPERANDS.
3432 %N (for N a digit) means print operand N in usual manner.
3433 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3434 and print the label name with no punctuation.
3435 %cN means require operand N to be a constant
3436 and print the constant expression with no punctuation.
3437 %aN means expect operand N to be a memory address
3438 (not a memory reference!) and print a reference
3440 %nN means expect operand N to be a constant
3441 and print a constant expression for minus the value
3442 of the operand, with no other punctuation. */
3445 output_asm_insn (const char *templ, rtx *operands)
3449 #ifdef ASSEMBLER_DIALECT
3452 int oporder[MAX_RECOG_OPERANDS];
3453 char opoutput[MAX_RECOG_OPERANDS];
3456 /* An insn may return a null string template
3457 in a case where no assembler code is needed. */
3461 memset (opoutput, 0, sizeof opoutput);
3463 putc ('\t', asm_out_file);
3465 #ifdef ASM_OUTPUT_OPCODE
3466 ASM_OUTPUT_OPCODE (asm_out_file, p);
3473 if (flag_verbose_asm)
3474 output_asm_operand_names (operands, oporder, ops);
3475 if (flag_print_asm_name)
3479 memset (opoutput, 0, sizeof opoutput);
3481 putc (c, asm_out_file);
3482 #ifdef ASM_OUTPUT_OPCODE
3483 while ((c = *p) == '\t')
3485 putc (c, asm_out_file);
3488 ASM_OUTPUT_OPCODE (asm_out_file, p);
3492 #ifdef ASSEMBLER_DIALECT
3496 p = do_assembler_dialects (p, &dialect);
3501 /* %% outputs a single %. */
3505 putc (c, asm_out_file);
3507 /* %= outputs a number which is unique to each insn in the entire
3508 compilation. This is useful for making local labels that are
3509 referred to more than once in a given insn. */
3513 fprintf (asm_out_file, "%d", insn_counter);
3515 /* % followed by a letter and some digits
3516 outputs an operand in a special way depending on the letter.
3517 Letters `acln' are implemented directly.
3518 Other letters are passed to `output_operand' so that
3519 the TARGET_PRINT_OPERAND hook can define them. */
3520 else if (ISALPHA (*p))
3523 unsigned long opnum;
3526 opnum = strtoul (p, &endptr, 10);
3529 output_operand_lossage ("operand number missing "
3531 else if (this_is_asm_operands && opnum >= insn_noperands)
3532 output_operand_lossage ("operand number out of range");
3533 else if (letter == 'l')
3534 output_asm_label (operands[opnum]);
3535 else if (letter == 'a')
3536 output_address (operands[opnum]);
3537 else if (letter == 'c')
3539 if (CONSTANT_ADDRESS_P (operands[opnum]))
3540 output_addr_const (asm_out_file, operands[opnum]);
3542 output_operand (operands[opnum], 'c');
3544 else if (letter == 'n')
3546 if (CONST_INT_P (operands[opnum]))
3547 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3548 - INTVAL (operands[opnum]));
3551 putc ('-', asm_out_file);
3552 output_addr_const (asm_out_file, operands[opnum]);
3556 output_operand (operands[opnum], letter);
3558 if (!opoutput[opnum])
3559 oporder[ops++] = opnum;
3560 opoutput[opnum] = 1;
3565 /* % followed by a digit outputs an operand the default way. */
3566 else if (ISDIGIT (*p))
3568 unsigned long opnum;
3571 opnum = strtoul (p, &endptr, 10);
3572 if (this_is_asm_operands && opnum >= insn_noperands)
3573 output_operand_lossage ("operand number out of range");
3575 output_operand (operands[opnum], 0);
3577 if (!opoutput[opnum])
3578 oporder[ops++] = opnum;
3579 opoutput[opnum] = 1;
3584 /* % followed by punctuation: output something for that
3585 punctuation character alone, with no operand. The
3586 TARGET_PRINT_OPERAND hook decides what is actually done. */
3587 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3588 output_operand (NULL_RTX, *p++);
3590 output_operand_lossage ("invalid %%-code");
3594 putc (c, asm_out_file);
3597 /* Write out the variable names for operands, if we know them. */
3598 if (flag_verbose_asm)
3599 output_asm_operand_names (operands, oporder, ops);
3600 if (flag_print_asm_name)
3603 putc ('\n', asm_out_file);
3606 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3609 output_asm_label (rtx x)
3613 if (GET_CODE (x) == LABEL_REF)
3617 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3618 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3620 output_operand_lossage ("'%%l' operand isn't a label");
3622 assemble_name (asm_out_file, buf);
3625 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3626 output_operand. Marks SYMBOL_REFs as referenced through use of
3627 assemble_external. */
3630 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3634 /* If we have a used symbol, we may have to emit assembly
3635 annotations corresponding to whether the symbol is external, weak
3636 or has non-default visibility. */
3637 if (GET_CODE (x) == SYMBOL_REF)
3641 t = SYMBOL_REF_DECL (x);
3643 assemble_external (t);
3651 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3654 mark_symbol_refs_as_used (rtx x)
3656 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3659 /* Print operand X using machine-dependent assembler syntax.
3660 CODE is a non-digit that preceded the operand-number in the % spec,
3661 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3662 between the % and the digits.
3663 When CODE is a non-letter, X is 0.
3665 The meanings of the letters are machine-dependent and controlled
3666 by TARGET_PRINT_OPERAND. */
3669 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3671 if (x && GET_CODE (x) == SUBREG)
3672 x = alter_subreg (&x, true);
3674 /* X must not be a pseudo reg. */
3675 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3677 targetm.asm_out.print_operand (asm_out_file, x, code);
3682 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3685 /* Print a memory reference operand for address X using
3686 machine-dependent assembler syntax. */
3689 output_address (rtx x)
3691 bool changed = false;
3692 walk_alter_subreg (&x, &changed);
3693 targetm.asm_out.print_operand_address (asm_out_file, x);
3696 /* Print an integer constant expression in assembler syntax.
3697 Addition and subtraction are the only arithmetic
3698 that may appear in these expressions. */
3701 output_addr_const (FILE *file, rtx x)
3706 switch (GET_CODE (x))
3713 if (SYMBOL_REF_DECL (x))
3714 assemble_external (SYMBOL_REF_DECL (x));
3715 #ifdef ASM_OUTPUT_SYMBOL_REF
3716 ASM_OUTPUT_SYMBOL_REF (file, x);
3718 assemble_name (file, XSTR (x, 0));
3726 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3727 #ifdef ASM_OUTPUT_LABEL_REF
3728 ASM_OUTPUT_LABEL_REF (file, buf);
3730 assemble_name (file, buf);
3735 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3739 /* This used to output parentheses around the expression,
3740 but that does not work on the 386 (either ATT or BSD assembler). */
3741 output_addr_const (file, XEXP (x, 0));
3745 if (GET_MODE (x) == VOIDmode)
3747 /* We can use %d if the number is one word and positive. */
3748 if (CONST_DOUBLE_HIGH (x))
3749 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3750 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3751 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3752 else if (CONST_DOUBLE_LOW (x) < 0)
3753 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3754 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3756 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3759 /* We can't handle floating point constants;
3760 PRINT_OPERAND must handle them. */
3761 output_operand_lossage ("floating constant misused");
3765 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3769 /* Some assemblers need integer constants to appear last (eg masm). */
3770 if (CONST_INT_P (XEXP (x, 0)))
3772 output_addr_const (file, XEXP (x, 1));
3773 if (INTVAL (XEXP (x, 0)) >= 0)
3774 fprintf (file, "+");
3775 output_addr_const (file, XEXP (x, 0));
3779 output_addr_const (file, XEXP (x, 0));
3780 if (!CONST_INT_P (XEXP (x, 1))
3781 || INTVAL (XEXP (x, 1)) >= 0)
3782 fprintf (file, "+");
3783 output_addr_const (file, XEXP (x, 1));
3788 /* Avoid outputting things like x-x or x+5-x,
3789 since some assemblers can't handle that. */
3790 x = simplify_subtraction (x);
3791 if (GET_CODE (x) != MINUS)
3794 output_addr_const (file, XEXP (x, 0));
3795 fprintf (file, "-");
3796 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3797 || GET_CODE (XEXP (x, 1)) == PC
3798 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3799 output_addr_const (file, XEXP (x, 1));
3802 fputs (targetm.asm_out.open_paren, file);
3803 output_addr_const (file, XEXP (x, 1));
3804 fputs (targetm.asm_out.close_paren, file);
3812 output_addr_const (file, XEXP (x, 0));
3816 if (targetm.asm_out.output_addr_const_extra (file, x))
3819 output_operand_lossage ("invalid expression as operand");
3823 /* Output a quoted string. */
3826 output_quoted_string (FILE *asm_file, const char *string)
3828 #ifdef OUTPUT_QUOTED_STRING
3829 OUTPUT_QUOTED_STRING (asm_file, string);
3833 putc ('\"', asm_file);
3834 while ((c = *string++) != 0)
3838 if (c == '\"' || c == '\\')
3839 putc ('\\', asm_file);
3843 fprintf (asm_file, "\\%03o", (unsigned char) c);
3845 putc ('\"', asm_file);
3849 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
3852 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
3854 char buf[2 + CHAR_BIT * sizeof (value) / 4];
3859 char *p = buf + sizeof (buf);
3861 *--p = "0123456789abcdef"[value % 16];
3862 while ((value /= 16) != 0);
3865 fwrite (p, 1, buf + sizeof (buf) - p, f);
3869 /* Internal function that prints an unsigned long in decimal in reverse.
3870 The output string IS NOT null-terminated. */
3873 sprint_ul_rev (char *s, unsigned long value)
3878 s[i] = "0123456789"[value % 10];
3881 /* alternate version, without modulo */
3882 /* oldval = value; */
3884 /* s[i] = "0123456789" [oldval - 10*value]; */
3891 /* Write an unsigned long as decimal to a file, fast. */
3894 fprint_ul (FILE *f, unsigned long value)
3896 /* python says: len(str(2**64)) == 20 */
3900 i = sprint_ul_rev (s, value);
3902 /* It's probably too small to bother with string reversal and fputs. */
3911 /* Write an unsigned long as decimal to a string, fast.
3912 s must be wide enough to not overflow, at least 21 chars.
3913 Returns the length of the string (without terminating '\0'). */
3916 sprint_ul (char *s, unsigned long value)
3923 len = sprint_ul_rev (s, value);
3926 /* Reverse the string. */
3940 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3941 %R prints the value of REGISTER_PREFIX.
3942 %L prints the value of LOCAL_LABEL_PREFIX.
3943 %U prints the value of USER_LABEL_PREFIX.
3944 %I prints the value of IMMEDIATE_PREFIX.
3945 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3946 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3948 We handle alternate assembler dialects here, just like output_asm_insn. */
3951 asm_fprintf (FILE *file, const char *p, ...)
3955 #ifdef ASSEMBLER_DIALECT
3960 va_start (argptr, p);
3967 #ifdef ASSEMBLER_DIALECT
3971 p = do_assembler_dialects (p, &dialect);
3978 while (strchr ("-+ #0", c))
3983 while (ISDIGIT (c) || c == '.')
3994 case 'd': case 'i': case 'u':
3995 case 'x': case 'X': case 'o':
3999 fprintf (file, buf, va_arg (argptr, int));
4003 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4004 'o' cases, but we do not check for those cases. It
4005 means that the value is a HOST_WIDE_INT, which may be
4006 either `long' or `long long'. */
4007 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4008 q += strlen (HOST_WIDE_INT_PRINT);
4011 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4016 #ifdef HAVE_LONG_LONG
4022 fprintf (file, buf, va_arg (argptr, long long));
4029 fprintf (file, buf, va_arg (argptr, long));
4037 fprintf (file, buf, va_arg (argptr, char *));
4041 #ifdef ASM_OUTPUT_OPCODE
4042 ASM_OUTPUT_OPCODE (asm_out_file, p);
4047 #ifdef REGISTER_PREFIX
4048 fprintf (file, "%s", REGISTER_PREFIX);
4053 #ifdef IMMEDIATE_PREFIX
4054 fprintf (file, "%s", IMMEDIATE_PREFIX);
4059 #ifdef LOCAL_LABEL_PREFIX
4060 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4065 fputs (user_label_prefix, file);
4068 #ifdef ASM_FPRINTF_EXTENSIONS
4069 /* Uppercase letters are reserved for general use by asm_fprintf
4070 and so are not available to target specific code. In order to
4071 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4072 they are defined here. As they get turned into real extensions
4073 to asm_fprintf they should be removed from this list. */
4074 case 'A': case 'B': case 'C': case 'D': case 'E':
4075 case 'F': case 'G': case 'H': case 'J': case 'K':
4076 case 'M': case 'N': case 'P': case 'Q': case 'S':
4077 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4080 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4093 /* Return nonzero if this function has no function calls. */
4096 leaf_function_p (void)
4101 if (crtl->profile || profile_arc_flag)
4104 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4107 && ! SIBLING_CALL_P (insn))
4109 if (NONJUMP_INSN_P (insn)
4110 && GET_CODE (PATTERN (insn)) == SEQUENCE
4111 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4112 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4115 for (link = crtl->epilogue_delay_list;
4117 link = XEXP (link, 1))
4119 insn = XEXP (link, 0);
4122 && ! SIBLING_CALL_P (insn))
4124 if (NONJUMP_INSN_P (insn)
4125 && GET_CODE (PATTERN (insn)) == SEQUENCE
4126 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4127 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4134 /* Return 1 if branch is a forward branch.
4135 Uses insn_shuid array, so it works only in the final pass. May be used by
4136 output templates to customary add branch prediction hints.
4139 final_forward_branch_p (rtx insn)
4141 int insn_id, label_id;
4143 gcc_assert (uid_shuid);
4144 insn_id = INSN_SHUID (insn);
4145 label_id = INSN_SHUID (JUMP_LABEL (insn));
4146 /* We've hit some insns that does not have id information available. */
4147 gcc_assert (insn_id && label_id);
4148 return insn_id < label_id;
4151 /* On some machines, a function with no call insns
4152 can run faster if it doesn't create its own register window.
4153 When output, the leaf function should use only the "output"
4154 registers. Ordinarily, the function would be compiled to use
4155 the "input" registers to find its arguments; it is a candidate
4156 for leaf treatment if it uses only the "input" registers.
4157 Leaf function treatment means renumbering so the function
4158 uses the "output" registers instead. */
4160 #ifdef LEAF_REGISTERS
4162 /* Return 1 if this function uses only the registers that can be
4163 safely renumbered. */
4166 only_leaf_regs_used (void)
4169 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4171 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4172 if ((df_regs_ever_live_p (i) || global_regs[i])
4173 && ! permitted_reg_in_leaf_functions[i])
4176 if (crtl->uses_pic_offset_table
4177 && pic_offset_table_rtx != 0
4178 && REG_P (pic_offset_table_rtx)
4179 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4185 /* Scan all instructions and renumber all registers into those
4186 available in leaf functions. */
4189 leaf_renumber_regs (rtx first)
4193 /* Renumber only the actual patterns.
4194 The reg-notes can contain frame pointer refs,
4195 and renumbering them could crash, and should not be needed. */
4196 for (insn = first; insn; insn = NEXT_INSN (insn))
4198 leaf_renumber_regs_insn (PATTERN (insn));
4199 for (insn = crtl->epilogue_delay_list;
4201 insn = XEXP (insn, 1))
4202 if (INSN_P (XEXP (insn, 0)))
4203 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4206 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4207 available in leaf functions. */
4210 leaf_renumber_regs_insn (rtx in_rtx)
4213 const char *format_ptr;
4218 /* Renumber all input-registers into output-registers.
4219 renumbered_regs would be 1 for an output-register;
4226 /* Don't renumber the same reg twice. */
4230 newreg = REGNO (in_rtx);
4231 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4232 to reach here as part of a REG_NOTE. */
4233 if (newreg >= FIRST_PSEUDO_REGISTER)
4238 newreg = LEAF_REG_REMAP (newreg);
4239 gcc_assert (newreg >= 0);
4240 df_set_regs_ever_live (REGNO (in_rtx), false);
4241 df_set_regs_ever_live (newreg, true);
4242 SET_REGNO (in_rtx, newreg);
4246 if (INSN_P (in_rtx))
4248 /* Inside a SEQUENCE, we find insns.
4249 Renumber just the patterns of these insns,
4250 just as we do for the top-level insns. */
4251 leaf_renumber_regs_insn (PATTERN (in_rtx));
4255 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4257 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4258 switch (*format_ptr++)
4261 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4265 if (NULL != XVEC (in_rtx, i))
4267 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4268 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4287 /* Turn the RTL into assembly. */
4289 rest_of_handle_final (void)
4294 /* Get the function's name, as described by its RTL. This may be
4295 different from the DECL_NAME name used in the source file. */
4297 x = DECL_RTL (current_function_decl);
4298 gcc_assert (MEM_P (x));
4300 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4301 fnname = XSTR (x, 0);
4303 assemble_start_function (current_function_decl, fnname);
4304 final_start_function (get_insns (), asm_out_file, optimize);
4305 final (get_insns (), asm_out_file, optimize);
4306 final_end_function ();
4308 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4309 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4310 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4311 output_function_exception_table (fnname);
4313 assemble_end_function (current_function_decl, fnname);
4315 user_defined_section_attribute = false;
4317 /* Free up reg info memory. */
4321 fflush (asm_out_file);
4323 /* Write DBX symbols if requested. */
4325 /* Note that for those inline functions where we don't initially
4326 know for certain that we will be generating an out-of-line copy,
4327 the first invocation of this routine (rest_of_compilation) will
4328 skip over this code by doing a `goto exit_rest_of_compilation;'.
4329 Later on, wrapup_global_declarations will (indirectly) call
4330 rest_of_compilation again for those inline functions that need
4331 to have out-of-line copies generated. During that call, we
4332 *will* be routed past here. */
4334 timevar_push (TV_SYMOUT);
4335 if (!DECL_IGNORED_P (current_function_decl))
4336 debug_hooks->function_decl (current_function_decl);
4337 timevar_pop (TV_SYMOUT);
4339 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4340 DECL_INITIAL (current_function_decl) = error_mark_node;
4342 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4343 && targetm.have_ctors_dtors)
4344 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4345 decl_init_priority_lookup
4346 (current_function_decl));
4347 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4348 && targetm.have_ctors_dtors)
4349 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4350 decl_fini_priority_lookup
4351 (current_function_decl));
4355 struct rtl_opt_pass pass_final =
4360 OPTGROUP_NONE, /* optinfo_flags */
4362 rest_of_handle_final, /* execute */
4365 0, /* static_pass_number */
4366 TV_FINAL, /* tv_id */
4367 0, /* properties_required */
4368 0, /* properties_provided */
4369 0, /* properties_destroyed */
4370 0, /* todo_flags_start */
4371 TODO_ggc_collect /* todo_flags_finish */
4377 rest_of_handle_shorten_branches (void)
4379 /* Shorten branches. */
4380 shorten_branches (get_insns ());
4384 struct rtl_opt_pass pass_shorten_branches =
4388 "shorten", /* name */
4389 OPTGROUP_NONE, /* optinfo_flags */
4391 rest_of_handle_shorten_branches, /* execute */
4394 0, /* static_pass_number */
4395 TV_SHORTEN_BRANCH, /* tv_id */
4396 0, /* properties_required */
4397 0, /* properties_provided */
4398 0, /* properties_destroyed */
4399 0, /* todo_flags_start */
4400 0 /* todo_flags_finish */
4406 rest_of_clean_state (void)
4409 FILE *final_output = NULL;
4410 int save_unnumbered = flag_dump_unnumbered;
4411 int save_noaddr = flag_dump_noaddr;
4413 if (flag_dump_final_insns)
4415 final_output = fopen (flag_dump_final_insns, "a");
4418 error ("could not open final insn dump file %qs: %m",
4419 flag_dump_final_insns);
4420 flag_dump_final_insns = NULL;
4424 flag_dump_noaddr = flag_dump_unnumbered = 1;
4425 if (flag_compare_debug_opt || flag_compare_debug)
4426 dump_flags |= TDF_NOUID;
4427 dump_function_header (final_output, current_function_decl,
4429 final_insns_dump_p = true;
4431 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4433 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4437 set_block_for_insn (insn, NULL);
4438 INSN_UID (insn) = 0;
4443 /* It is very important to decompose the RTL instruction chain here:
4444 debug information keeps pointing into CODE_LABEL insns inside the function
4445 body. If these remain pointing to the other insns, we end up preserving
4446 whole RTL chain and attached detailed debug info in memory. */
4447 for (insn = get_insns (); insn; insn = next)
4449 next = NEXT_INSN (insn);
4450 NEXT_INSN (insn) = NULL;
4451 PREV_INSN (insn) = NULL;
4454 && (!NOTE_P (insn) ||
4455 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4456 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4457 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4458 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4459 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4460 print_rtl_single (final_output, insn);
4465 flag_dump_noaddr = save_noaddr;
4466 flag_dump_unnumbered = save_unnumbered;
4467 final_insns_dump_p = false;
4469 if (fclose (final_output))
4471 error ("could not close final insn dump file %qs: %m",
4472 flag_dump_final_insns);
4473 flag_dump_final_insns = NULL;
4477 /* In case the function was not output,
4478 don't leave any temporary anonymous types
4479 queued up for sdb output. */
4480 #ifdef SDB_DEBUGGING_INFO
4481 if (write_symbols == SDB_DEBUG)
4482 sdbout_types (NULL_TREE);
4485 flag_rerun_cse_after_global_opts = 0;
4486 reload_completed = 0;
4487 epilogue_completed = 0;
4489 regstack_completed = 0;
4492 /* Clear out the insn_length contents now that they are no
4494 init_insn_lengths ();
4496 /* Show no temporary slots allocated. */
4499 free_bb_for_insn ();
4503 /* We can reduce stack alignment on call site only when we are sure that
4504 the function body just produced will be actually used in the final
4506 if (decl_binds_to_current_def_p (current_function_decl))
4508 unsigned int pref = crtl->preferred_stack_boundary;
4509 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4510 pref = crtl->stack_alignment_needed;
4511 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4515 /* Make sure volatile mem refs aren't considered valid operands for
4516 arithmetic insns. We must call this here if this is a nested inline
4517 function, since the above code leaves us in the init_recog state,
4518 and the function context push/pop code does not save/restore volatile_ok.
4520 ??? Maybe it isn't necessary for expand_start_function to call this
4521 anymore if we do it here? */
4523 init_recog_no_volatile ();
4525 /* We're done with this function. Free up memory if we can. */
4526 free_after_parsing (cfun);
4527 free_after_compilation (cfun);
4531 struct rtl_opt_pass pass_clean_state =
4535 "*clean_state", /* name */
4536 OPTGROUP_NONE, /* optinfo_flags */
4538 rest_of_clean_state, /* execute */
4541 0, /* static_pass_number */
4542 TV_FINAL, /* tv_id */
4543 0, /* properties_required */
4544 0, /* properties_provided */
4545 PROP_rtl, /* properties_destroyed */
4546 0, /* todo_flags_start */
4547 0 /* todo_flags_finish */