1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
54 #include "insn-config.h"
55 #include "insn-attr.h"
57 #include "conditions.h"
60 #include "hard-reg-set.h"
67 #include "basic-block.h"
72 #ifdef XCOFF_DEBUGGING_INFO
73 #include "xcoffout.h" /* Needed for external data
74 declarations for e.g. AIX 4.x. */
77 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
78 #include "dwarf2out.h"
81 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
82 null default for it to save conditionalization later. */
83 #ifndef CC_STATUS_INIT
84 #define CC_STATUS_INIT
87 /* How to start an assembler comment. */
88 #ifndef ASM_COMMENT_START
89 #define ASM_COMMENT_START ";#"
92 /* Is the given character a logical line separator for the assembler? */
93 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
94 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
97 #ifndef JUMP_TABLES_IN_TEXT_SECTION
98 #define JUMP_TABLES_IN_TEXT_SECTION 0
101 /* Last insn processed by final_scan_insn. */
102 static rtx debug_insn;
103 rtx current_output_insn;
105 /* Line number of last NOTE. */
106 static int last_linenum;
108 /* Highest line number in current block. */
109 static int high_block_linenum;
111 /* Likewise for function. */
112 static int high_function_linenum;
114 /* Filename of last NOTE. */
115 static const char *last_filename;
117 /* Number of instrumented arcs when profile_arc_flag is set. */
118 extern int count_instrumented_edges;
120 extern int length_unit_log; /* This is defined in insn-attrtab.c. */
122 /* Nonzero while outputting an `asm' with operands.
123 This means that inconsistencies are the user's fault, so don't abort.
124 The precise value is the insn being output, to pass to error_for_asm. */
125 static rtx this_is_asm_operands;
127 /* Number of operands of this insn, for an `asm' with operands. */
128 static unsigned int insn_noperands;
130 /* Compare optimization flag. */
132 static rtx last_ignored_compare = 0;
134 /* Flag indicating this insn is the start of a new basic block. */
136 static int new_block = 1;
138 /* Assign a unique number to each insn that is output.
139 This can be used to generate unique local labels. */
141 static int insn_counter = 0;
144 /* This variable contains machine-dependent flags (defined in tm.h)
145 set and examined by output routines
146 that describe how to interpret the condition codes properly. */
150 /* During output of an insn, this contains a copy of cc_status
151 from before the insn. */
153 CC_STATUS cc_prev_status;
156 /* Indexed by hardware reg number, is 1 if that register is ever
157 used in the current function.
159 In life_analysis, or in stupid_life_analysis, this is set
160 up to record the hard regs used explicitly. Reload adds
161 in the hard regs used for holding pseudo regs. Final uses
162 it to generate the code in the function prologue and epilogue
163 to save and restore registers as needed. */
165 char regs_ever_live[FIRST_PSEUDO_REGISTER];
167 /* Nonzero means current function must be given a frame pointer.
168 Set in stmt.c if anything is allocated on the stack there.
169 Set in reload1.c if anything is allocated on the stack there. */
171 int frame_pointer_needed;
173 /* Assign unique numbers to labels generated for profiling. */
175 int profile_label_no;
177 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
179 static int block_depth;
181 /* Nonzero if have enabled APP processing of our assembler output. */
185 /* If we are outputting an insn sequence, this contains the sequence rtx.
190 #ifdef ASSEMBLER_DIALECT
192 /* Number of the assembler dialect to use, starting at 0. */
193 static int dialect_number;
196 /* Indexed by line number, nonzero if there is a note for that line. */
198 static char *line_note_exists;
200 #ifdef HAVE_conditional_execution
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate;
205 /* Linked list to hold line numbers for each basic block. */
209 struct bb_list *next; /* pointer to next basic block */
210 int line_num; /* line number */
211 int file_label_num; /* LPBC<n> label # for stored filename */
212 int func_label_num; /* LPBC<n> label # for stored function name */
215 /* Linked list to hold the strings for each file and function name output. */
219 struct bb_str *next; /* pointer to next string */
220 const char *string; /* string */
221 int label_num; /* label number */
222 int length; /* string length */
225 #ifdef HAVE_ATTR_length
226 static int asm_insn_count PARAMS ((rtx));
228 static void profile_function PARAMS ((FILE *));
229 static void profile_after_prologue PARAMS ((FILE *));
230 static void notice_source_line PARAMS ((rtx));
231 static rtx walk_alter_subreg PARAMS ((rtx *));
232 static void output_asm_name PARAMS ((void));
233 static tree get_mem_expr_from_op PARAMS ((rtx, int *));
234 static void output_asm_operand_names PARAMS ((rtx *, int *, int));
235 static void output_operand PARAMS ((rtx, int));
236 #ifdef LEAF_REGISTERS
237 static void leaf_renumber_regs PARAMS ((rtx));
240 static int alter_cond PARAMS ((rtx));
242 #ifndef ADDR_VEC_ALIGN
243 static int final_addr_vec_align PARAMS ((rtx));
245 #ifdef HAVE_ATTR_length
246 static int align_fuzz PARAMS ((rtx, rtx, int, unsigned));
249 /* Initialize data in final at the beginning of a compilation. */
252 init_final (filename)
253 const char *filename ATTRIBUTE_UNUSED;
258 #ifdef ASSEMBLER_DIALECT
259 dialect_number = ASSEMBLER_DIALECT;
263 /* Called at end of source file,
264 to output the block-profiling table for this entire compilation. */
268 const char *filename;
270 if (profile_arc_flag)
273 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
275 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
276 int gcov_type_bytes = GCOV_TYPE_SIZE / BITS_PER_UNIT;
277 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
278 unsigned int align2 = LONG_TYPE_SIZE;
280 size = gcov_type_bytes * count_instrumented_edges;
283 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
284 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
285 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
287 /* ??? This _really_ ought to be done with a structure layout
288 and with assemble_constructor. If long_bytes != pointer_bytes
289 we'll be emitting unaligned data at some point. */
290 if (long_bytes != pointer_bytes)
295 /* Output the main header, of 11 words:
296 0: 1 if this file is initialized, else 0.
297 1: address of file name (LPBX1).
298 2: address of table of counts (LPBX2).
299 3: number of counts in the table.
300 4: always 0, for compatibility with Sun.
302 The following are GNU extensions:
304 5: address of table of start addrs of basic blocks (LPBX3).
305 6: Number of bytes in this header.
306 7: address of table of function names (LPBX4).
307 8: address of table of line numbers (LPBX5) or 0.
308 9: address of table of file names (LPBX6) or 0.
309 10: space reserved for basic block profiling. */
311 ASM_OUTPUT_ALIGN (asm_out_file, align);
313 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
316 assemble_integer (const0_rtx, long_bytes, align2, 1);
318 /* Address of filename. */
319 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
320 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
323 /* Address of count table. */
324 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
325 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
328 /* Count of the # of instrumented arcs. */
329 assemble_integer (GEN_INT (count_instrumented_edges),
330 long_bytes, align2, 1);
332 /* Zero word (link field). */
333 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
335 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
337 /* Byte count for extended structure. */
338 assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, align2, 1);
340 /* Address of function name table. */
341 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
343 /* Address of line number and filename tables if debugging. */
344 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
345 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
347 /* Space for extension ptr (link field). */
348 assemble_integer (const0_rtx, UNITS_PER_WORD, align2, 1);
350 /* Output the file name changing the suffix to .d for
351 Sun tcov compatibility. */
352 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
354 char *cwd = getpwd ();
355 int len = strlen (filename) + strlen (cwd) + 1;
356 char *data_file = (char *) alloca (len + 4);
358 strcpy (data_file, cwd);
359 strcat (data_file, "/");
360 strcat (data_file, filename);
361 strip_off_ending (data_file, len);
362 strcat (data_file, ".da");
363 assemble_string (data_file, strlen (data_file) + 1);
366 /* Make space for the table of counts. */
369 /* Realign data section. */
370 ASM_OUTPUT_ALIGN (asm_out_file, align);
371 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
373 assemble_zeros (size);
377 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
378 #ifdef ASM_OUTPUT_SHARED_LOCAL
379 if (flag_shared_data)
380 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
383 #ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
384 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name,
385 size, BIGGEST_ALIGNMENT);
387 #ifdef ASM_OUTPUT_ALIGNED_LOCAL
388 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
391 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
398 /* Default target function prologue and epilogue assembler output.
400 If not overridden for epilogue code, then the function body itself
401 contains return instructions wherever needed. */
403 default_function_pro_epilogue (file, size)
404 FILE *file ATTRIBUTE_UNUSED;
405 HOST_WIDE_INT size ATTRIBUTE_UNUSED;
409 /* Default target hook that outputs nothing to a stream. */
411 no_asm_to_stream (file)
412 FILE *file ATTRIBUTE_UNUSED;
416 /* Enable APP processing of subsequent output.
417 Used before the output from an `asm' statement. */
424 fputs (ASM_APP_ON, asm_out_file);
429 /* Disable APP processing of subsequent output.
430 Called from varasm.c before most kinds of output. */
437 fputs (ASM_APP_OFF, asm_out_file);
442 /* Return the number of slots filled in the current
443 delayed branch sequence (we don't count the insn needing the
444 delay slot). Zero if not in a delayed branch sequence. */
448 dbr_sequence_length ()
450 if (final_sequence != 0)
451 return XVECLEN (final_sequence, 0) - 1;
457 /* The next two pages contain routines used to compute the length of an insn
458 and to shorten branches. */
460 /* Arrays for insn lengths, and addresses. The latter is referenced by
461 `insn_current_length'. */
463 static int *insn_lengths;
465 #ifdef HAVE_ATTR_length
466 varray_type insn_addresses_;
469 /* Max uid for which the above arrays are valid. */
470 static int insn_lengths_max_uid;
472 /* Address of insn being processed. Used by `insn_current_length'. */
473 int insn_current_address;
475 /* Address of insn being processed in previous iteration. */
476 int insn_last_address;
478 /* known invariant alignment of insn being processed. */
479 int insn_current_align;
481 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
482 gives the next following alignment insn that increases the known
483 alignment, or NULL_RTX if there is no such insn.
484 For any alignment obtained this way, we can again index uid_align with
485 its uid to obtain the next following align that in turn increases the
486 alignment, till we reach NULL_RTX; the sequence obtained this way
487 for each insn we'll call the alignment chain of this insn in the following
490 struct label_alignment
496 static rtx *uid_align;
497 static int *uid_shuid;
498 static struct label_alignment *label_align;
500 /* Indicate that branch shortening hasn't yet been done. */
514 insn_lengths_max_uid = 0;
516 #ifdef HAVE_ATTR_length
517 INSN_ADDRESSES_FREE ();
526 /* Obtain the current length of an insn. If branch shortening has been done,
527 get its actual length. Otherwise, get its maximum length. */
530 get_attr_length (insn)
531 rtx insn ATTRIBUTE_UNUSED;
533 #ifdef HAVE_ATTR_length
538 if (insn_lengths_max_uid > INSN_UID (insn))
539 return insn_lengths[INSN_UID (insn)];
541 switch (GET_CODE (insn))
549 length = insn_default_length (insn);
553 body = PATTERN (insn);
554 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
556 /* Alignment is machine-dependent and should be handled by
560 length = insn_default_length (insn);
564 body = PATTERN (insn);
565 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
568 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
569 length = asm_insn_count (body) * insn_default_length (insn);
570 else if (GET_CODE (body) == SEQUENCE)
571 for (i = 0; i < XVECLEN (body, 0); i++)
572 length += get_attr_length (XVECEXP (body, 0, i));
574 length = insn_default_length (insn);
581 #ifdef ADJUST_INSN_LENGTH
582 ADJUST_INSN_LENGTH (insn, length);
585 #else /* not HAVE_ATTR_length */
587 #endif /* not HAVE_ATTR_length */
590 /* Code to handle alignment inside shorten_branches. */
592 /* Here is an explanation how the algorithm in align_fuzz can give
595 Call a sequence of instructions beginning with alignment point X
596 and continuing until the next alignment point `block X'. When `X'
597 is used in an expression, it means the alignment value of the
600 Call the distance between the start of the first insn of block X, and
601 the end of the last insn of block X `IX', for the `inner size of X'.
602 This is clearly the sum of the instruction lengths.
604 Likewise with the next alignment-delimited block following X, which we
607 Call the distance between the start of the first insn of block X, and
608 the start of the first insn of block Y `OX', for the `outer size of X'.
610 The estimated padding is then OX - IX.
612 OX can be safely estimated as
617 OX = round_up(IX, X) + Y - X
619 Clearly est(IX) >= real(IX), because that only depends on the
620 instruction lengths, and those being overestimated is a given.
622 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
623 we needn't worry about that when thinking about OX.
625 When X >= Y, the alignment provided by Y adds no uncertainty factor
626 for branch ranges starting before X, so we can just round what we have.
627 But when X < Y, we don't know anything about the, so to speak,
628 `middle bits', so we have to assume the worst when aligning up from an
629 address mod X to one mod Y, which is Y - X. */
632 #define LABEL_ALIGN(LABEL) align_labels_log
635 #ifndef LABEL_ALIGN_MAX_SKIP
636 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
640 #define LOOP_ALIGN(LABEL) align_loops_log
643 #ifndef LOOP_ALIGN_MAX_SKIP
644 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
647 #ifndef LABEL_ALIGN_AFTER_BARRIER
648 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
651 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
652 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
656 #define JUMP_ALIGN(LABEL) align_jumps_log
659 #ifndef JUMP_ALIGN_MAX_SKIP
660 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
663 #ifndef ADDR_VEC_ALIGN
665 final_addr_vec_align (addr_vec)
668 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
670 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
671 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
672 return exact_log2 (align);
676 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
679 #ifndef INSN_LENGTH_ALIGNMENT
680 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
683 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
685 static int min_labelno, max_labelno;
687 #define LABEL_TO_ALIGNMENT(LABEL) \
688 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
690 #define LABEL_TO_MAX_SKIP(LABEL) \
691 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
693 /* For the benefit of port specific code do this also as a function. */
696 label_to_alignment (label)
699 return LABEL_TO_ALIGNMENT (label);
702 #ifdef HAVE_ATTR_length
703 /* The differences in addresses
704 between a branch and its target might grow or shrink depending on
705 the alignment the start insn of the range (the branch for a forward
706 branch or the label for a backward branch) starts out on; if these
707 differences are used naively, they can even oscillate infinitely.
708 We therefore want to compute a 'worst case' address difference that
709 is independent of the alignment the start insn of the range end
710 up on, and that is at least as large as the actual difference.
711 The function align_fuzz calculates the amount we have to add to the
712 naively computed difference, by traversing the part of the alignment
713 chain of the start insn of the range that is in front of the end insn
714 of the range, and considering for each alignment the maximum amount
715 that it might contribute to a size increase.
717 For casesi tables, we also want to know worst case minimum amounts of
718 address difference, in case a machine description wants to introduce
719 some common offset that is added to all offsets in a table.
720 For this purpose, align_fuzz with a growth argument of 0 computes the
721 appropriate adjustment. */
723 /* Compute the maximum delta by which the difference of the addresses of
724 START and END might grow / shrink due to a different address for start
725 which changes the size of alignment insns between START and END.
726 KNOWN_ALIGN_LOG is the alignment known for START.
727 GROWTH should be ~0 if the objective is to compute potential code size
728 increase, and 0 if the objective is to compute potential shrink.
729 The return value is undefined for any other value of GROWTH. */
732 align_fuzz (start, end, known_align_log, growth)
737 int uid = INSN_UID (start);
739 int known_align = 1 << known_align_log;
740 int end_shuid = INSN_SHUID (end);
743 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
745 int align_addr, new_align;
747 uid = INSN_UID (align_label);
748 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
749 if (uid_shuid[uid] > end_shuid)
751 known_align_log = LABEL_TO_ALIGNMENT (align_label);
752 new_align = 1 << known_align_log;
753 if (new_align < known_align)
755 fuzz += (-align_addr ^ growth) & (new_align - known_align);
756 known_align = new_align;
761 /* Compute a worst-case reference address of a branch so that it
762 can be safely used in the presence of aligned labels. Since the
763 size of the branch itself is unknown, the size of the branch is
764 not included in the range. I.e. for a forward branch, the reference
765 address is the end address of the branch as known from the previous
766 branch shortening pass, minus a value to account for possible size
767 increase due to alignment. For a backward branch, it is the start
768 address of the branch as known from the current pass, plus a value
769 to account for possible size increase due to alignment.
770 NB.: Therefore, the maximum offset allowed for backward branches needs
771 to exclude the branch size. */
774 insn_current_reference_address (branch)
780 if (! INSN_ADDRESSES_SET_P ())
783 seq = NEXT_INSN (PREV_INSN (branch));
784 seq_uid = INSN_UID (seq);
785 if (GET_CODE (branch) != JUMP_INSN)
786 /* This can happen for example on the PA; the objective is to know the
787 offset to address something in front of the start of the function.
788 Thus, we can treat it like a backward branch.
789 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
790 any alignment we'd encounter, so we skip the call to align_fuzz. */
791 return insn_current_address;
792 dest = JUMP_LABEL (branch);
794 /* BRANCH has no proper alignment chain set, so use SEQ.
795 BRANCH also has no INSN_SHUID. */
796 if (INSN_SHUID (seq) < INSN_SHUID (dest))
798 /* Forward branch. */
799 return (insn_last_address + insn_lengths[seq_uid]
800 - align_fuzz (seq, dest, length_unit_log, ~0));
804 /* Backward branch. */
805 return (insn_current_address
806 + align_fuzz (dest, seq, length_unit_log, ~0));
809 #endif /* HAVE_ATTR_length */
812 compute_alignments ()
815 int log, max_skip, max_log;
823 max_labelno = max_label_num ();
824 min_labelno = get_first_label_num ();
825 label_align = (struct label_alignment *)
826 xcalloc (max_labelno - min_labelno + 1, sizeof (struct label_alignment));
828 /* If not optimizing or optimizing for size, don't assign any alignments. */
829 if (! optimize || optimize_size)
832 for (i = 0; i < n_basic_blocks; i++)
834 basic_block bb = BASIC_BLOCK (i);
835 rtx label = bb->head;
836 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
839 if (GET_CODE (label) != CODE_LABEL)
841 max_log = LABEL_ALIGN (label);
842 max_skip = LABEL_ALIGN_MAX_SKIP;
844 for (e = bb->pred; e; e = e->pred_next)
846 if (e->flags & EDGE_FALLTHRU)
847 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
849 branch_frequency += EDGE_FREQUENCY (e);
852 /* There are two purposes to align block with no fallthru incoming edge:
853 1) to avoid fetch stalls when branch destination is near cache boundary
854 2) to improve cache efficiency in case the previous block is not executed
855 (so it does not need to be in the cache).
857 We to catch first case, we align frequently executed blocks.
858 To catch the second, we align blocks that are executed more frequently
859 than the predecessor and the predecessor is likely to not be executed
860 when function is called. */
863 && (branch_frequency > BB_FREQ_MAX / 10
864 || (bb->frequency > BASIC_BLOCK (i - 1)->frequency * 10
865 && (BASIC_BLOCK (i - 1)->frequency
866 <= ENTRY_BLOCK_PTR->frequency / 2))))
868 log = JUMP_ALIGN (label);
872 max_skip = JUMP_ALIGN_MAX_SKIP;
875 /* In case block is frequent and reached mostly by non-fallthru edge,
876 align it. It is most likely an first block of loop. */
878 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
879 && branch_frequency > fallthru_frequency * 5)
881 log = LOOP_ALIGN (label);
885 max_skip = LOOP_ALIGN_MAX_SKIP;
888 LABEL_TO_ALIGNMENT (label) = max_log;
889 LABEL_TO_MAX_SKIP (label) = max_skip;
893 /* Make a pass over all insns and compute their actual lengths by shortening
894 any branches of variable length if possible. */
896 /* Give a default value for the lowest address in a function. */
898 #ifndef FIRST_INSN_ADDRESS
899 #define FIRST_INSN_ADDRESS 0
902 /* shorten_branches might be called multiple times: for example, the SH
903 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
904 In order to do this, it needs proper length information, which it obtains
905 by calling shorten_branches. This cannot be collapsed with
906 shorten_branches itself into a single pass unless we also want to integrate
907 reorg.c, since the branch splitting exposes new instructions with delay
911 shorten_branches (first)
912 rtx first ATTRIBUTE_UNUSED;
919 #ifdef HAVE_ATTR_length
920 #define MAX_CODE_ALIGN 16
922 int something_changed = 1;
923 char *varying_length;
926 rtx align_tab[MAX_CODE_ALIGN];
930 /* Compute maximum UID and allocate label_align / uid_shuid. */
931 max_uid = get_max_uid ();
933 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
935 if (max_labelno != max_label_num ())
937 int old = max_labelno;
941 max_labelno = max_label_num ();
943 n_labels = max_labelno - min_labelno + 1;
944 n_old_labels = old - min_labelno + 1;
946 label_align = (struct label_alignment *) xrealloc
947 (label_align, n_labels * sizeof (struct label_alignment));
949 /* Range of labels grows monotonically in the function. Abort here
950 means that the initialization of array got lost. */
951 if (n_old_labels > n_labels)
954 memset (label_align + n_old_labels, 0,
955 (n_labels - n_old_labels) * sizeof (struct label_alignment));
958 /* Initialize label_align and set up uid_shuid to be strictly
959 monotonically rising with insn order. */
960 /* We use max_log here to keep track of the maximum alignment we want to
961 impose on the next CODE_LABEL (or the current one if we are processing
962 the CODE_LABEL itself). */
967 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
971 INSN_SHUID (insn) = i++;
974 /* reorg might make the first insn of a loop being run once only,
975 and delete the label in front of it. Then we want to apply
976 the loop alignment to the new label created by reorg, which
977 is separated by the former loop start insn from the
978 NOTE_INSN_LOOP_BEG. */
980 else if (GET_CODE (insn) == CODE_LABEL)
984 /* Merge in alignments computed by compute_alignments. */
985 log = LABEL_TO_ALIGNMENT (insn);
989 max_skip = LABEL_TO_MAX_SKIP (insn);
992 log = LABEL_ALIGN (insn);
996 max_skip = LABEL_ALIGN_MAX_SKIP;
998 next = NEXT_INSN (insn);
999 /* ADDR_VECs only take room if read-only data goes into the text
1001 if (JUMP_TABLES_IN_TEXT_SECTION
1002 #if !defined(READONLY_DATA_SECTION)
1006 if (next && GET_CODE (next) == JUMP_INSN)
1008 rtx nextbody = PATTERN (next);
1009 if (GET_CODE (nextbody) == ADDR_VEC
1010 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1012 log = ADDR_VEC_ALIGN (next);
1016 max_skip = LABEL_ALIGN_MAX_SKIP;
1020 LABEL_TO_ALIGNMENT (insn) = max_log;
1021 LABEL_TO_MAX_SKIP (insn) = max_skip;
1025 else if (GET_CODE (insn) == BARRIER)
1029 for (label = insn; label && ! INSN_P (label);
1030 label = NEXT_INSN (label))
1031 if (GET_CODE (label) == CODE_LABEL)
1033 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1037 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1043 #ifdef HAVE_ATTR_length
1045 /* Allocate the rest of the arrays. */
1046 insn_lengths = (int *) xmalloc (max_uid * sizeof (*insn_lengths));
1047 insn_lengths_max_uid = max_uid;
1048 /* Syntax errors can lead to labels being outside of the main insn stream.
1049 Initialize insn_addresses, so that we get reproducible results. */
1050 INSN_ADDRESSES_ALLOC (max_uid);
1052 varying_length = (char *) xcalloc (max_uid, sizeof (char));
1054 /* Initialize uid_align. We scan instructions
1055 from end to start, and keep in align_tab[n] the last seen insn
1056 that does an alignment of at least n+1, i.e. the successor
1057 in the alignment chain for an insn that does / has a known
1059 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
1061 for (i = MAX_CODE_ALIGN; --i >= 0;)
1062 align_tab[i] = NULL_RTX;
1063 seq = get_last_insn ();
1064 for (; seq; seq = PREV_INSN (seq))
1066 int uid = INSN_UID (seq);
1068 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1069 uid_align[uid] = align_tab[0];
1072 /* Found an alignment label. */
1073 uid_align[uid] = align_tab[log];
1074 for (i = log - 1; i >= 0; i--)
1078 #ifdef CASE_VECTOR_SHORTEN_MODE
1081 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1084 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1085 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1088 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1090 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1091 int len, i, min, max, insn_shuid;
1093 addr_diff_vec_flags flags;
1095 if (GET_CODE (insn) != JUMP_INSN
1096 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1098 pat = PATTERN (insn);
1099 len = XVECLEN (pat, 1);
1102 min_align = MAX_CODE_ALIGN;
1103 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1105 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1106 int shuid = INSN_SHUID (lab);
1117 if (min_align > LABEL_TO_ALIGNMENT (lab))
1118 min_align = LABEL_TO_ALIGNMENT (lab);
1120 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1121 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1122 insn_shuid = INSN_SHUID (insn);
1123 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1124 flags.min_align = min_align;
1125 flags.base_after_vec = rel > insn_shuid;
1126 flags.min_after_vec = min > insn_shuid;
1127 flags.max_after_vec = max > insn_shuid;
1128 flags.min_after_base = min > rel;
1129 flags.max_after_base = max > rel;
1130 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1133 #endif /* CASE_VECTOR_SHORTEN_MODE */
1135 /* Compute initial lengths, addresses, and varying flags for each insn. */
1136 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1138 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1140 uid = INSN_UID (insn);
1142 insn_lengths[uid] = 0;
1144 if (GET_CODE (insn) == CODE_LABEL)
1146 int log = LABEL_TO_ALIGNMENT (insn);
1149 int align = 1 << log;
1150 int new_address = (insn_current_address + align - 1) & -align;
1151 insn_lengths[uid] = new_address - insn_current_address;
1155 INSN_ADDRESSES (uid) = insn_current_address;
1157 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1158 || GET_CODE (insn) == CODE_LABEL)
1160 if (INSN_DELETED_P (insn))
1163 body = PATTERN (insn);
1164 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1166 /* This only takes room if read-only data goes into the text
1168 if (JUMP_TABLES_IN_TEXT_SECTION
1169 #if !defined(READONLY_DATA_SECTION)
1173 insn_lengths[uid] = (XVECLEN (body,
1174 GET_CODE (body) == ADDR_DIFF_VEC)
1175 * GET_MODE_SIZE (GET_MODE (body)));
1176 /* Alignment is handled by ADDR_VEC_ALIGN. */
1178 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1179 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1180 else if (GET_CODE (body) == SEQUENCE)
1183 int const_delay_slots;
1185 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1187 const_delay_slots = 0;
1189 /* Inside a delay slot sequence, we do not do any branch shortening
1190 if the shortening could change the number of delay slots
1192 for (i = 0; i < XVECLEN (body, 0); i++)
1194 rtx inner_insn = XVECEXP (body, 0, i);
1195 int inner_uid = INSN_UID (inner_insn);
1198 if (GET_CODE (body) == ASM_INPUT
1199 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1200 inner_length = (asm_insn_count (PATTERN (inner_insn))
1201 * insn_default_length (inner_insn));
1203 inner_length = insn_default_length (inner_insn);
1205 insn_lengths[inner_uid] = inner_length;
1206 if (const_delay_slots)
1208 if ((varying_length[inner_uid]
1209 = insn_variable_length_p (inner_insn)) != 0)
1210 varying_length[uid] = 1;
1211 INSN_ADDRESSES (inner_uid) = (insn_current_address
1212 + insn_lengths[uid]);
1215 varying_length[inner_uid] = 0;
1216 insn_lengths[uid] += inner_length;
1219 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1221 insn_lengths[uid] = insn_default_length (insn);
1222 varying_length[uid] = insn_variable_length_p (insn);
1225 /* If needed, do any adjustment. */
1226 #ifdef ADJUST_INSN_LENGTH
1227 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1228 if (insn_lengths[uid] < 0)
1229 fatal_insn ("negative insn length", insn);
1233 /* Now loop over all the insns finding varying length insns. For each,
1234 get the current insn length. If it has changed, reflect the change.
1235 When nothing changes for a full pass, we are done. */
1237 while (something_changed)
1239 something_changed = 0;
1240 insn_current_align = MAX_CODE_ALIGN - 1;
1241 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1243 insn = NEXT_INSN (insn))
1246 #ifdef ADJUST_INSN_LENGTH
1251 uid = INSN_UID (insn);
1253 if (GET_CODE (insn) == CODE_LABEL)
1255 int log = LABEL_TO_ALIGNMENT (insn);
1256 if (log > insn_current_align)
1258 int align = 1 << log;
1259 int new_address= (insn_current_address + align - 1) & -align;
1260 insn_lengths[uid] = new_address - insn_current_address;
1261 insn_current_align = log;
1262 insn_current_address = new_address;
1265 insn_lengths[uid] = 0;
1266 INSN_ADDRESSES (uid) = insn_current_address;
1270 length_align = INSN_LENGTH_ALIGNMENT (insn);
1271 if (length_align < insn_current_align)
1272 insn_current_align = length_align;
1274 insn_last_address = INSN_ADDRESSES (uid);
1275 INSN_ADDRESSES (uid) = insn_current_address;
1277 #ifdef CASE_VECTOR_SHORTEN_MODE
1278 if (optimize && GET_CODE (insn) == JUMP_INSN
1279 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1281 rtx body = PATTERN (insn);
1282 int old_length = insn_lengths[uid];
1283 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1284 rtx min_lab = XEXP (XEXP (body, 2), 0);
1285 rtx max_lab = XEXP (XEXP (body, 3), 0);
1286 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1287 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1288 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1291 addr_diff_vec_flags flags;
1293 /* Avoid automatic aggregate initialization. */
1294 flags = ADDR_DIFF_VEC_FLAGS (body);
1296 /* Try to find a known alignment for rel_lab. */
1297 for (prev = rel_lab;
1299 && ! insn_lengths[INSN_UID (prev)]
1300 && ! (varying_length[INSN_UID (prev)] & 1);
1301 prev = PREV_INSN (prev))
1302 if (varying_length[INSN_UID (prev)] & 2)
1304 rel_align = LABEL_TO_ALIGNMENT (prev);
1308 /* See the comment on addr_diff_vec_flags in rtl.h for the
1309 meaning of the flags values. base: REL_LAB vec: INSN */
1310 /* Anything after INSN has still addresses from the last
1311 pass; adjust these so that they reflect our current
1312 estimate for this pass. */
1313 if (flags.base_after_vec)
1314 rel_addr += insn_current_address - insn_last_address;
1315 if (flags.min_after_vec)
1316 min_addr += insn_current_address - insn_last_address;
1317 if (flags.max_after_vec)
1318 max_addr += insn_current_address - insn_last_address;
1319 /* We want to know the worst case, i.e. lowest possible value
1320 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1321 its offset is positive, and we have to be wary of code shrink;
1322 otherwise, it is negative, and we have to be vary of code
1324 if (flags.min_after_base)
1326 /* If INSN is between REL_LAB and MIN_LAB, the size
1327 changes we are about to make can change the alignment
1328 within the observed offset, therefore we have to break
1329 it up into two parts that are independent. */
1330 if (! flags.base_after_vec && flags.min_after_vec)
1332 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1333 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1336 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1340 if (flags.base_after_vec && ! flags.min_after_vec)
1342 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1343 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1346 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1348 /* Likewise, determine the highest lowest possible value
1349 for the offset of MAX_LAB. */
1350 if (flags.max_after_base)
1352 if (! flags.base_after_vec && flags.max_after_vec)
1354 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1355 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1358 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1362 if (flags.base_after_vec && ! flags.max_after_vec)
1364 max_addr += align_fuzz (max_lab, insn, 0, 0);
1365 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1368 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1370 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1371 max_addr - rel_addr,
1373 if (JUMP_TABLES_IN_TEXT_SECTION
1374 #if !defined(READONLY_DATA_SECTION)
1380 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1381 insn_current_address += insn_lengths[uid];
1382 if (insn_lengths[uid] != old_length)
1383 something_changed = 1;
1388 #endif /* CASE_VECTOR_SHORTEN_MODE */
1390 if (! (varying_length[uid]))
1392 if (GET_CODE (insn) == INSN
1393 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1397 body = PATTERN (insn);
1398 for (i = 0; i < XVECLEN (body, 0); i++)
1400 rtx inner_insn = XVECEXP (body, 0, i);
1401 int inner_uid = INSN_UID (inner_insn);
1403 INSN_ADDRESSES (inner_uid) = insn_current_address;
1405 insn_current_address += insn_lengths[inner_uid];
1409 insn_current_address += insn_lengths[uid];
1414 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1418 body = PATTERN (insn);
1420 for (i = 0; i < XVECLEN (body, 0); i++)
1422 rtx inner_insn = XVECEXP (body, 0, i);
1423 int inner_uid = INSN_UID (inner_insn);
1426 INSN_ADDRESSES (inner_uid) = insn_current_address;
1428 /* insn_current_length returns 0 for insns with a
1429 non-varying length. */
1430 if (! varying_length[inner_uid])
1431 inner_length = insn_lengths[inner_uid];
1433 inner_length = insn_current_length (inner_insn);
1435 if (inner_length != insn_lengths[inner_uid])
1437 insn_lengths[inner_uid] = inner_length;
1438 something_changed = 1;
1440 insn_current_address += insn_lengths[inner_uid];
1441 new_length += inner_length;
1446 new_length = insn_current_length (insn);
1447 insn_current_address += new_length;
1450 #ifdef ADJUST_INSN_LENGTH
1451 /* If needed, do any adjustment. */
1452 tmp_length = new_length;
1453 ADJUST_INSN_LENGTH (insn, new_length);
1454 insn_current_address += (new_length - tmp_length);
1457 if (new_length != insn_lengths[uid])
1459 insn_lengths[uid] = new_length;
1460 something_changed = 1;
1463 /* For a non-optimizing compile, do only a single pass. */
1468 free (varying_length);
1470 #endif /* HAVE_ATTR_length */
1473 #ifdef HAVE_ATTR_length
1474 /* Given the body of an INSN known to be generated by an ASM statement, return
1475 the number of machine instructions likely to be generated for this insn.
1476 This is used to compute its length. */
1479 asm_insn_count (body)
1482 const char *template;
1485 if (GET_CODE (body) == ASM_INPUT)
1486 template = XSTR (body, 0);
1488 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1490 for (; *template; template++)
1491 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1498 /* Output assembler code for the start of a function,
1499 and initialize some of the variables in this file
1500 for the new function. The label for the function and associated
1501 assembler pseudo-ops have already been output in `assemble_start_function'.
1503 FIRST is the first insn of the rtl for the function being compiled.
1504 FILE is the file to write assembler code to.
1505 OPTIMIZE is nonzero if we should eliminate redundant
1506 test and compare insns. */
1509 final_start_function (first, file, optimize)
1512 int optimize ATTRIBUTE_UNUSED;
1516 this_is_asm_operands = 0;
1518 #ifdef NON_SAVING_SETJMP
1519 /* A function that calls setjmp should save and restore all the
1520 call-saved registers on a system where longjmp clobbers them. */
1521 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1525 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1526 if (!call_used_regs[i])
1527 regs_ever_live[i] = 1;
1531 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1532 notice_source_line (first);
1533 high_block_linenum = high_function_linenum = last_linenum;
1535 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1537 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1538 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1539 dwarf2out_begin_prologue (0, NULL);
1542 #ifdef LEAF_REG_REMAP
1543 if (current_function_uses_only_leaf_regs)
1544 leaf_renumber_regs (first);
1547 /* The Sun386i and perhaps other machines don't work right
1548 if the profiling code comes after the prologue. */
1549 #ifdef PROFILE_BEFORE_PROLOGUE
1551 profile_function (file);
1552 #endif /* PROFILE_BEFORE_PROLOGUE */
1554 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1555 if (dwarf2out_do_frame ())
1556 dwarf2out_frame_debug (NULL_RTX);
1559 /* If debugging, assign block numbers to all of the blocks in this
1563 remove_unnecessary_notes ();
1565 number_blocks (current_function_decl);
1566 /* We never actually put out begin/end notes for the top-level
1567 block in the function. But, conceptually, that block is
1569 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1572 /* First output the function prologue: code to set up the stack frame. */
1573 (*targetm.asm_out.function_prologue) (file, get_frame_size ());
1575 #ifdef VMS_DEBUGGING_INFO
1576 /* Output label after the prologue of the function. */
1577 if (write_symbols == VMS_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG)
1578 vmsdbgout_after_prologue ();
1581 /* If the machine represents the prologue as RTL, the profiling code must
1582 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1583 #ifdef HAVE_prologue
1584 if (! HAVE_prologue)
1586 profile_after_prologue (file);
1592 profile_after_prologue (file)
1593 FILE *file ATTRIBUTE_UNUSED;
1595 #ifndef PROFILE_BEFORE_PROLOGUE
1597 profile_function (file);
1598 #endif /* not PROFILE_BEFORE_PROLOGUE */
1602 profile_function (file)
1603 FILE *file ATTRIBUTE_UNUSED;
1605 #ifndef NO_PROFILE_COUNTERS
1606 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1608 #if defined(ASM_OUTPUT_REG_PUSH)
1609 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1610 int sval = current_function_returns_struct;
1612 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1613 int cxt = current_function_needs_context;
1615 #endif /* ASM_OUTPUT_REG_PUSH */
1617 #ifndef NO_PROFILE_COUNTERS
1619 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1620 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no);
1621 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1624 function_section (current_function_decl);
1626 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1628 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1630 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1633 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1638 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1640 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1642 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1645 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1650 FUNCTION_PROFILER (file, profile_label_no);
1652 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1654 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1656 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1659 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1664 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1666 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1668 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1671 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1677 /* Output assembler code for the end of a function.
1678 For clarity, args are same as those of `final_start_function'
1679 even though not all of them are needed. */
1682 final_end_function ()
1686 (*debug_hooks->end_function) (high_function_linenum);
1688 /* Finally, output the function epilogue:
1689 code to restore the stack frame and return to the caller. */
1690 (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ());
1692 /* And debug output. */
1693 (*debug_hooks->end_epilogue) ();
1695 #if defined (DWARF2_UNWIND_INFO)
1696 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1697 && dwarf2out_do_frame ())
1698 dwarf2out_end_epilogue ();
1702 /* Output assembler code for some insns: all or part of a function.
1703 For description of args, see `final_start_function', above.
1705 PRESCAN is 1 if we are not really outputting,
1706 just scanning as if we were outputting.
1707 Prescanning deletes and rearranges insns just like ordinary output.
1708 PRESCAN is -2 if we are outputting after having prescanned.
1709 In this case, don't try to delete or rearrange insns
1710 because that has already been done.
1711 Prescanning is done only on certain machines. */
1714 final (first, file, optimize, prescan)
1724 last_ignored_compare = 0;
1727 /* Make a map indicating which line numbers appear in this function.
1728 When producing SDB debugging info, delete troublesome line number
1729 notes from inlined functions in other files as well as duplicate
1730 line number notes. */
1731 #ifdef SDB_DEBUGGING_INFO
1732 if (write_symbols == SDB_DEBUG)
1735 for (insn = first; insn; insn = NEXT_INSN (insn))
1736 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1738 if ((RTX_INTEGRATED_P (insn)
1739 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1741 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1742 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1744 delete_insn (insn); /* Use delete_note. */
1748 if (NOTE_LINE_NUMBER (insn) > max_line)
1749 max_line = NOTE_LINE_NUMBER (insn);
1755 for (insn = first; insn; insn = NEXT_INSN (insn))
1756 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1757 max_line = NOTE_LINE_NUMBER (insn);
1760 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char));
1762 for (insn = first; insn; insn = NEXT_INSN (insn))
1764 if (INSN_UID (insn) > max_uid) /* find largest UID */
1765 max_uid = INSN_UID (insn);
1766 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1767 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
1769 /* If CC tracking across branches is enabled, record the insn which
1770 jumps to each branch only reached from one place. */
1771 if (optimize && GET_CODE (insn) == JUMP_INSN)
1773 rtx lab = JUMP_LABEL (insn);
1774 if (lab && LABEL_NUSES (lab) == 1)
1776 LABEL_REFS (lab) = insn;
1786 /* Output the insns. */
1787 for (insn = NEXT_INSN (first); insn;)
1789 #ifdef HAVE_ATTR_length
1790 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1793 /* Irritatingly, the reg-stack pass is creating new instructions
1794 and because of REG_DEAD note abuse it has to run after
1795 shorten_branches. Fake address of -1 then. */
1796 insn_current_address = -1;
1798 /* This can be triggered by bugs elsewhere in the compiler if
1799 new insns are created after init_insn_lengths is called. */
1804 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1805 #endif /* HAVE_ATTR_length */
1807 insn = final_scan_insn (insn, file, optimize, prescan, 0);
1810 free (line_note_exists);
1811 line_note_exists = NULL;
1815 get_insn_template (code, insn)
1819 const void *output = insn_data[code].output;
1820 switch (insn_data[code].output_format)
1822 case INSN_OUTPUT_FORMAT_SINGLE:
1823 return (const char *) output;
1824 case INSN_OUTPUT_FORMAT_MULTI:
1825 return ((const char *const *) output)[which_alternative];
1826 case INSN_OUTPUT_FORMAT_FUNCTION:
1829 return (*(insn_output_fn) output) (recog_data.operand, insn);
1836 /* The final scan for one insn, INSN.
1837 Args are same as in `final', except that INSN
1838 is the insn being scanned.
1839 Value returned is the next insn to be scanned.
1841 NOPEEPHOLES is the flag to disallow peephole processing (currently
1842 used for within delayed branch sequence output). */
1845 final_scan_insn (insn, file, optimize, prescan, nopeepholes)
1848 int optimize ATTRIBUTE_UNUSED;
1850 int nopeepholes ATTRIBUTE_UNUSED;
1858 /* Ignore deleted insns. These can occur when we split insns (due to a
1859 template of "#") while not optimizing. */
1860 if (INSN_DELETED_P (insn))
1861 return NEXT_INSN (insn);
1863 switch (GET_CODE (insn))
1869 switch (NOTE_LINE_NUMBER (insn))
1871 case NOTE_INSN_DELETED:
1872 case NOTE_INSN_LOOP_BEG:
1873 case NOTE_INSN_LOOP_END:
1874 case NOTE_INSN_LOOP_CONT:
1875 case NOTE_INSN_LOOP_VTOP:
1876 case NOTE_INSN_FUNCTION_END:
1877 case NOTE_INSN_REPEATED_LINE_NUMBER:
1878 case NOTE_INSN_RANGE_BEG:
1879 case NOTE_INSN_RANGE_END:
1880 case NOTE_INSN_LIVE:
1881 case NOTE_INSN_EXPECTED_VALUE:
1884 case NOTE_INSN_BASIC_BLOCK:
1885 #ifdef IA64_UNWIND_INFO
1886 IA64_UNWIND_EMIT (asm_out_file, insn);
1889 fprintf (asm_out_file, "\t%s basic block %d\n",
1890 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1893 case NOTE_INSN_EH_REGION_BEG:
1894 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1895 NOTE_EH_HANDLER (insn));
1898 case NOTE_INSN_EH_REGION_END:
1899 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1900 NOTE_EH_HANDLER (insn));
1903 case NOTE_INSN_PROLOGUE_END:
1904 (*targetm.asm_out.function_end_prologue) (file);
1905 profile_after_prologue (file);
1908 case NOTE_INSN_EPILOGUE_BEG:
1909 (*targetm.asm_out.function_begin_epilogue) (file);
1912 case NOTE_INSN_FUNCTION_BEG:
1914 (*debug_hooks->end_prologue) (last_linenum);
1917 case NOTE_INSN_BLOCK_BEG:
1918 if (debug_info_level == DINFO_LEVEL_NORMAL
1919 || debug_info_level == DINFO_LEVEL_VERBOSE
1920 || write_symbols == DWARF_DEBUG
1921 || write_symbols == DWARF2_DEBUG
1922 || write_symbols == VMS_AND_DWARF2_DEBUG
1923 || write_symbols == VMS_DEBUG)
1925 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1929 high_block_linenum = last_linenum;
1931 /* Output debugging info about the symbol-block beginning. */
1932 (*debug_hooks->begin_block) (last_linenum, n);
1934 /* Mark this block as output. */
1935 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1939 case NOTE_INSN_BLOCK_END:
1940 if (debug_info_level == DINFO_LEVEL_NORMAL
1941 || debug_info_level == DINFO_LEVEL_VERBOSE
1942 || write_symbols == DWARF_DEBUG
1943 || write_symbols == DWARF2_DEBUG
1944 || write_symbols == VMS_AND_DWARF2_DEBUG
1945 || write_symbols == VMS_DEBUG)
1947 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1951 /* End of a symbol-block. */
1953 if (block_depth < 0)
1956 (*debug_hooks->end_block) (high_block_linenum, n);
1960 case NOTE_INSN_DELETED_LABEL:
1961 /* Emit the label. We may have deleted the CODE_LABEL because
1962 the label could be proved to be unreachable, though still
1963 referenced (in the form of having its address taken. */
1964 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1971 if (NOTE_LINE_NUMBER (insn) <= 0)
1974 /* This note is a line-number. */
1979 /* If there is anything real after this note, output it.
1980 If another line note follows, omit this one. */
1981 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
1983 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
1986 /* These types of notes can be significant
1987 so make sure the preceding line number stays. */
1988 else if (GET_CODE (note) == NOTE
1989 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
1990 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
1991 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
1993 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
1995 /* Another line note follows; we can delete this note
1996 if no intervening line numbers have notes elsewhere. */
1998 for (num = NOTE_LINE_NUMBER (insn) + 1;
1999 num < NOTE_LINE_NUMBER (note);
2001 if (line_note_exists[num])
2004 if (num >= NOTE_LINE_NUMBER (note))
2010 /* Output this line note if it is the first or the last line
2014 notice_source_line (insn);
2015 (*debug_hooks->source_line) (last_linenum, last_filename);
2023 #if defined (DWARF2_UNWIND_INFO)
2024 if (dwarf2out_do_frame ())
2025 dwarf2out_frame_debug (insn);
2030 /* The target port might emit labels in the output function for
2031 some insn, e.g. sh.c output_branchy_insn. */
2032 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2034 int align = LABEL_TO_ALIGNMENT (insn);
2035 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2036 int max_skip = LABEL_TO_MAX_SKIP (insn);
2039 if (align && NEXT_INSN (insn))
2041 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2042 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2044 ASM_OUTPUT_ALIGN (file, align);
2050 /* If this label is reached from only one place, set the condition
2051 codes from the instruction just before the branch. */
2053 /* Disabled because some insns set cc_status in the C output code
2054 and NOTICE_UPDATE_CC alone can set incorrect status. */
2055 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2057 rtx jump = LABEL_REFS (insn);
2058 rtx barrier = prev_nonnote_insn (insn);
2060 /* If the LABEL_REFS field of this label has been set to point
2061 at a branch, the predecessor of the branch is a regular
2062 insn, and that branch is the only way to reach this label,
2063 set the condition codes based on the branch and its
2065 if (barrier && GET_CODE (barrier) == BARRIER
2066 && jump && GET_CODE (jump) == JUMP_INSN
2067 && (prev = prev_nonnote_insn (jump))
2068 && GET_CODE (prev) == INSN)
2070 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2071 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2079 #ifdef FINAL_PRESCAN_LABEL
2080 FINAL_PRESCAN_INSN (insn, NULL, 0);
2083 if (LABEL_NAME (insn))
2084 (*debug_hooks->label) (insn);
2088 fputs (ASM_APP_OFF, file);
2091 if (NEXT_INSN (insn) != 0
2092 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2094 rtx nextbody = PATTERN (NEXT_INSN (insn));
2096 /* If this label is followed by a jump-table,
2097 make sure we put the label in the read-only section. Also
2098 possibly write the label and jump table together. */
2100 if (GET_CODE (nextbody) == ADDR_VEC
2101 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2103 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2104 /* In this case, the case vector is being moved by the
2105 target, so don't output the label at all. Leave that
2106 to the back end macros. */
2108 if (! JUMP_TABLES_IN_TEXT_SECTION)
2112 readonly_data_section ();
2114 #ifdef ADDR_VEC_ALIGN
2115 log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn));
2117 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2119 ASM_OUTPUT_ALIGN (file, log_align);
2122 function_section (current_function_decl);
2124 #ifdef ASM_OUTPUT_CASE_LABEL
2125 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2128 if (LABEL_ALTERNATE_NAME (insn))
2129 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2131 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2137 if (LABEL_ALTERNATE_NAME (insn))
2138 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2140 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2145 rtx body = PATTERN (insn);
2146 int insn_code_number;
2147 const char *template;
2150 /* An INSN, JUMP_INSN or CALL_INSN.
2151 First check for special kinds that recog doesn't recognize. */
2153 if (GET_CODE (body) == USE /* These are just declarations */
2154 || GET_CODE (body) == CLOBBER)
2158 /* If there is a REG_CC_SETTER note on this insn, it means that
2159 the setting of the condition code was done in the delay slot
2160 of the insn that branched here. So recover the cc status
2161 from the insn that set it. */
2163 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2166 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2167 cc_prev_status = cc_status;
2171 /* Detect insns that are really jump-tables
2172 and output them as such. */
2174 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2176 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2185 fputs (ASM_APP_OFF, file);
2189 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2190 if (GET_CODE (body) == ADDR_VEC)
2192 #ifdef ASM_OUTPUT_ADDR_VEC
2193 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2200 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2201 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2207 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2208 for (idx = 0; idx < vlen; idx++)
2210 if (GET_CODE (body) == ADDR_VEC)
2212 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2213 ASM_OUTPUT_ADDR_VEC_ELT
2214 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2221 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2222 ASM_OUTPUT_ADDR_DIFF_ELT
2225 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2226 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2232 #ifdef ASM_OUTPUT_CASE_END
2233 ASM_OUTPUT_CASE_END (file,
2234 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2239 function_section (current_function_decl);
2244 if (GET_CODE (body) == ASM_INPUT)
2246 const char *string = XSTR (body, 0);
2248 /* There's no telling what that did to the condition codes. */
2257 fputs (ASM_APP_ON, file);
2260 fprintf (asm_out_file, "\t%s\n", string);
2265 /* Detect `asm' construct with operands. */
2266 if (asm_noperands (body) >= 0)
2268 unsigned int noperands = asm_noperands (body);
2269 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2272 /* There's no telling what that did to the condition codes. */
2277 /* Get out the operand values. */
2278 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2279 /* Inhibit aborts on what would otherwise be compiler bugs. */
2280 insn_noperands = noperands;
2281 this_is_asm_operands = insn;
2283 /* Output the insn using them. */
2288 fputs (ASM_APP_ON, file);
2291 output_asm_insn (string, ops);
2294 this_is_asm_operands = 0;
2298 if (prescan <= 0 && app_on)
2300 fputs (ASM_APP_OFF, file);
2304 if (GET_CODE (body) == SEQUENCE)
2306 /* A delayed-branch sequence */
2312 final_sequence = body;
2314 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2315 force the restoration of a comparison that was previously
2316 thought unnecessary. If that happens, cancel this sequence
2317 and cause that insn to be restored. */
2319 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2320 if (next != XVECEXP (body, 0, 1))
2326 for (i = 1; i < XVECLEN (body, 0); i++)
2328 rtx insn = XVECEXP (body, 0, i);
2329 rtx next = NEXT_INSN (insn);
2330 /* We loop in case any instruction in a delay slot gets
2333 insn = final_scan_insn (insn, file, 0, prescan, 1);
2334 while (insn != next);
2336 #ifdef DBR_OUTPUT_SEQEND
2337 DBR_OUTPUT_SEQEND (file);
2341 /* If the insn requiring the delay slot was a CALL_INSN, the
2342 insns in the delay slot are actually executed before the
2343 called function. Hence we don't preserve any CC-setting
2344 actions in these insns and the CC must be marked as being
2345 clobbered by the function. */
2346 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
2353 /* We have a real machine instruction as rtl. */
2355 body = PATTERN (insn);
2358 set = single_set (insn);
2360 /* Check for redundant test and compare instructions
2361 (when the condition codes are already set up as desired).
2362 This is done only when optimizing; if not optimizing,
2363 it should be possible for the user to alter a variable
2364 with the debugger in between statements
2365 and the next statement should reexamine the variable
2366 to compute the condition codes. */
2371 rtx set = single_set (insn);
2375 && GET_CODE (SET_DEST (set)) == CC0
2376 && insn != last_ignored_compare)
2378 if (GET_CODE (SET_SRC (set)) == SUBREG)
2379 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2380 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2382 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2383 XEXP (SET_SRC (set), 0)
2384 = alter_subreg (&XEXP (SET_SRC (set), 0));
2385 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2386 XEXP (SET_SRC (set), 1)
2387 = alter_subreg (&XEXP (SET_SRC (set), 1));
2389 if ((cc_status.value1 != 0
2390 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2391 || (cc_status.value2 != 0
2392 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2394 /* Don't delete insn if it has an addressing side-effect. */
2395 if (! FIND_REG_INC_NOTE (insn, 0)
2396 /* or if anything in it is volatile. */
2397 && ! volatile_refs_p (PATTERN (insn)))
2399 /* We don't really delete the insn; just ignore it. */
2400 last_ignored_compare = insn;
2409 /* Don't bother outputting obvious no-ops, even without -O.
2410 This optimization is fast and doesn't interfere with debugging.
2411 Don't do this if the insn is in a delay slot, since this
2412 will cause an improper number of delay insns to be written. */
2413 if (final_sequence == 0
2415 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2416 && GET_CODE (SET_SRC (body)) == REG
2417 && GET_CODE (SET_DEST (body)) == REG
2418 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2423 /* If this is a conditional branch, maybe modify it
2424 if the cc's are in a nonstandard state
2425 so that it accomplishes the same thing that it would
2426 do straightforwardly if the cc's were set up normally. */
2428 if (cc_status.flags != 0
2429 && GET_CODE (insn) == JUMP_INSN
2430 && GET_CODE (body) == SET
2431 && SET_DEST (body) == pc_rtx
2432 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2433 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
2434 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2435 /* This is done during prescan; it is not done again
2436 in final scan when prescan has been done. */
2439 /* This function may alter the contents of its argument
2440 and clear some of the cc_status.flags bits.
2441 It may also return 1 meaning condition now always true
2442 or -1 meaning condition now always false
2443 or 2 meaning condition nontrivial but altered. */
2444 int result = alter_cond (XEXP (SET_SRC (body), 0));
2445 /* If condition now has fixed value, replace the IF_THEN_ELSE
2446 with its then-operand or its else-operand. */
2448 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2450 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2452 /* The jump is now either unconditional or a no-op.
2453 If it has become a no-op, don't try to output it.
2454 (It would not be recognized.) */
2455 if (SET_SRC (body) == pc_rtx)
2460 else if (GET_CODE (SET_SRC (body)) == RETURN)
2461 /* Replace (set (pc) (return)) with (return). */
2462 PATTERN (insn) = body = SET_SRC (body);
2464 /* Rerecognize the instruction if it has changed. */
2466 INSN_CODE (insn) = -1;
2469 /* Make same adjustments to instructions that examine the
2470 condition codes without jumping and instructions that
2471 handle conditional moves (if this machine has either one). */
2473 if (cc_status.flags != 0
2476 rtx cond_rtx, then_rtx, else_rtx;
2478 if (GET_CODE (insn) != JUMP_INSN
2479 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2481 cond_rtx = XEXP (SET_SRC (set), 0);
2482 then_rtx = XEXP (SET_SRC (set), 1);
2483 else_rtx = XEXP (SET_SRC (set), 2);
2487 cond_rtx = SET_SRC (set);
2488 then_rtx = const_true_rtx;
2489 else_rtx = const0_rtx;
2492 switch (GET_CODE (cond_rtx))
2506 if (XEXP (cond_rtx, 0) != cc0_rtx)
2508 result = alter_cond (cond_rtx);
2510 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2511 else if (result == -1)
2512 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2513 else if (result == 2)
2514 INSN_CODE (insn) = -1;
2515 if (SET_DEST (set) == SET_SRC (set))
2527 #ifdef HAVE_peephole
2528 /* Do machine-specific peephole optimizations if desired. */
2530 if (optimize && !flag_no_peephole && !nopeepholes)
2532 rtx next = peephole (insn);
2533 /* When peepholing, if there were notes within the peephole,
2534 emit them before the peephole. */
2535 if (next != 0 && next != NEXT_INSN (insn))
2537 rtx prev = PREV_INSN (insn);
2539 for (note = NEXT_INSN (insn); note != next;
2540 note = NEXT_INSN (note))
2541 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2543 /* In case this is prescan, put the notes
2544 in proper position for later rescan. */
2545 note = NEXT_INSN (insn);
2546 PREV_INSN (note) = prev;
2547 NEXT_INSN (prev) = note;
2548 NEXT_INSN (PREV_INSN (next)) = insn;
2549 PREV_INSN (insn) = PREV_INSN (next);
2550 NEXT_INSN (insn) = next;
2551 PREV_INSN (next) = insn;
2554 /* PEEPHOLE might have changed this. */
2555 body = PATTERN (insn);
2559 /* Try to recognize the instruction.
2560 If successful, verify that the operands satisfy the
2561 constraints for the instruction. Crash if they don't,
2562 since `reload' should have changed them so that they do. */
2564 insn_code_number = recog_memoized (insn);
2565 cleanup_subreg_operands (insn);
2567 /* Dump the insn in the assembly for debugging. */
2568 if (flag_dump_rtl_in_asm)
2570 print_rtx_head = ASM_COMMENT_START;
2571 print_rtl_single (asm_out_file, insn);
2572 print_rtx_head = "";
2575 if (! constrain_operands_cached (1))
2576 fatal_insn_not_found (insn);
2578 /* Some target machines need to prescan each insn before
2581 #ifdef FINAL_PRESCAN_INSN
2582 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2585 #ifdef HAVE_conditional_execution
2586 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2587 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2589 current_insn_predicate = NULL_RTX;
2593 cc_prev_status = cc_status;
2595 /* Update `cc_status' for this instruction.
2596 The instruction's output routine may change it further.
2597 If the output routine for a jump insn needs to depend
2598 on the cc status, it should look at cc_prev_status. */
2600 NOTICE_UPDATE_CC (body, insn);
2603 current_output_insn = debug_insn = insn;
2605 #if defined (DWARF2_UNWIND_INFO)
2606 if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ())
2607 dwarf2out_frame_debug (insn);
2610 /* Find the proper template for this insn. */
2611 template = get_insn_template (insn_code_number, insn);
2613 /* If the C code returns 0, it means that it is a jump insn
2614 which follows a deleted test insn, and that test insn
2615 needs to be reinserted. */
2620 if (prev_nonnote_insn (insn) != last_ignored_compare)
2624 /* We have already processed the notes between the setter and
2625 the user. Make sure we don't process them again, this is
2626 particularly important if one of the notes is a block
2627 scope note or an EH note. */
2629 prev != last_ignored_compare;
2630 prev = PREV_INSN (prev))
2632 if (GET_CODE (prev) == NOTE)
2633 delete_insn (prev); /* Use delete_note. */
2639 /* If the template is the string "#", it means that this insn must
2641 if (template[0] == '#' && template[1] == '\0')
2643 rtx new = try_split (body, insn, 0);
2645 /* If we didn't split the insn, go away. */
2646 if (new == insn && PATTERN (new) == body)
2647 fatal_insn ("could not split insn", insn);
2649 #ifdef HAVE_ATTR_length
2650 /* This instruction should have been split in shorten_branches,
2651 to ensure that we would have valid length info for the
2663 #ifdef IA64_UNWIND_INFO
2664 IA64_UNWIND_EMIT (asm_out_file, insn);
2666 /* Output assembler code from the template. */
2668 output_asm_insn (template, recog_data.operand);
2670 #if defined (DWARF2_UNWIND_INFO)
2671 #if defined (HAVE_prologue)
2672 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
2673 dwarf2out_frame_debug (insn);
2675 if (!ACCUMULATE_OUTGOING_ARGS
2676 && GET_CODE (insn) == INSN
2677 && dwarf2out_do_frame ())
2678 dwarf2out_frame_debug (insn);
2683 /* It's not at all clear why we did this and doing so interferes
2684 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2687 /* Mark this insn as having been output. */
2688 INSN_DELETED_P (insn) = 1;
2691 /* Emit information for vtable gc. */
2692 note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX);
2694 assemble_vtable_entry (XEXP (XEXP (note, 0), 0),
2695 INTVAL (XEXP (XEXP (note, 0), 1)));
2697 current_output_insn = debug_insn = 0;
2700 return NEXT_INSN (insn);
2703 /* Output debugging info to the assembler file FILE
2704 based on the NOTE-insn INSN, assumed to be a line number. */
2707 notice_source_line (insn)
2710 const char *filename = NOTE_SOURCE_FILE (insn);
2712 last_filename = filename;
2713 last_linenum = NOTE_LINE_NUMBER (insn);
2714 high_block_linenum = MAX (last_linenum, high_block_linenum);
2715 high_function_linenum = MAX (last_linenum, high_function_linenum);
2718 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2719 directly to the desired hard register. */
2722 cleanup_subreg_operands (insn)
2726 extract_insn_cached (insn);
2727 for (i = 0; i < recog_data.n_operands; i++)
2729 /* The following test cannot use recog_data.operand when tesing
2730 for a SUBREG: the underlying object might have been changed
2731 already if we are inside a match_operator expression that
2732 matches the else clause. Instead we test the underlying
2733 expression directly. */
2734 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2735 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2736 else if (GET_CODE (recog_data.operand[i]) == PLUS
2737 || GET_CODE (recog_data.operand[i]) == MULT
2738 || GET_CODE (recog_data.operand[i]) == MEM)
2739 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2742 for (i = 0; i < recog_data.n_dups; i++)
2744 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2745 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2746 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2747 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2748 || GET_CODE (*recog_data.dup_loc[i]) == MEM)
2749 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2753 /* If X is a SUBREG, replace it with a REG or a MEM,
2754 based on the thing it is a subreg of. */
2761 rtx y = SUBREG_REG (x);
2763 /* simplify_subreg does not remove subreg from volatile references.
2764 We are required to. */
2765 if (GET_CODE (y) == MEM)
2766 *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x));
2769 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2774 /* Simplify_subreg can't handle some REG cases, but we have to. */
2775 else if (GET_CODE (y) == REG)
2777 REGNO (x) = subreg_hard_regno (x, 1);
2779 ORIGINAL_REGNO (x) = ORIGINAL_REGNO (y);
2780 /* This field has a different meaning for REGs and SUBREGs. Make
2781 sure to clear it! */
2791 /* Do alter_subreg on all the SUBREGs contained in X. */
2794 walk_alter_subreg (xp)
2798 switch (GET_CODE (x))
2802 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2803 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2807 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2811 return alter_subreg (xp);
2822 /* Given BODY, the body of a jump instruction, alter the jump condition
2823 as required by the bits that are set in cc_status.flags.
2824 Not all of the bits there can be handled at this level in all cases.
2826 The value is normally 0.
2827 1 means that the condition has become always true.
2828 -1 means that the condition has become always false.
2829 2 means that COND has been altered. */
2837 if (cc_status.flags & CC_REVERSED)
2840 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2843 if (cc_status.flags & CC_INVERTED)
2846 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2849 if (cc_status.flags & CC_NOT_POSITIVE)
2850 switch (GET_CODE (cond))
2855 /* Jump becomes unconditional. */
2861 /* Jump becomes no-op. */
2865 PUT_CODE (cond, EQ);
2870 PUT_CODE (cond, NE);
2878 if (cc_status.flags & CC_NOT_NEGATIVE)
2879 switch (GET_CODE (cond))
2883 /* Jump becomes unconditional. */
2888 /* Jump becomes no-op. */
2893 PUT_CODE (cond, EQ);
2899 PUT_CODE (cond, NE);
2907 if (cc_status.flags & CC_NO_OVERFLOW)
2908 switch (GET_CODE (cond))
2911 /* Jump becomes unconditional. */
2915 PUT_CODE (cond, EQ);
2920 PUT_CODE (cond, NE);
2925 /* Jump becomes no-op. */
2932 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2933 switch (GET_CODE (cond))
2939 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2944 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2949 if (cc_status.flags & CC_NOT_SIGNED)
2950 /* The flags are valid if signed condition operators are converted
2952 switch (GET_CODE (cond))
2955 PUT_CODE (cond, LEU);
2960 PUT_CODE (cond, LTU);
2965 PUT_CODE (cond, GTU);
2970 PUT_CODE (cond, GEU);
2982 /* Report inconsistency between the assembler template and the operands.
2983 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2986 output_operand_lossage (msgid)
2989 if (this_is_asm_operands)
2990 error_for_asm (this_is_asm_operands, "invalid `asm': %s", _(msgid));
2992 internal_error ("output_operand: %s", _(msgid));
2995 /* Output of assembler code from a template, and its subroutines. */
2997 /* Annotate the assembly with a comment describing the pattern and
2998 alternative used. */
3005 int num = INSN_CODE (debug_insn);
3006 fprintf (asm_out_file, "\t%s %d\t%s",
3007 ASM_COMMENT_START, INSN_UID (debug_insn),
3008 insn_data[num].name);
3009 if (insn_data[num].n_alternatives > 1)
3010 fprintf (asm_out_file, "/%d", which_alternative + 1);
3011 #ifdef HAVE_ATTR_length
3012 fprintf (asm_out_file, "\t[length = %d]",
3013 get_attr_length (debug_insn));
3015 /* Clear this so only the first assembler insn
3016 of any rtl insn will get the special comment for -dp. */
3021 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3022 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3023 corresponds to the address of the object and 0 if to the object. */
3026 get_mem_expr_from_op (op, paddressp)
3035 if (GET_CODE (op) == REG && ORIGINAL_REGNO (op) >= FIRST_PSEUDO_REGISTER)
3036 return REGNO_DECL (ORIGINAL_REGNO (op));
3037 else if (GET_CODE (op) != MEM)
3040 if (MEM_EXPR (op) != 0)
3041 return MEM_EXPR (op);
3043 /* Otherwise we have an address, so indicate it and look at the address. */
3047 /* First check if we have a decl for the address, then look at the right side
3048 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3049 But don't allow the address to itself be indirect. */
3050 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3052 else if (GET_CODE (op) == PLUS
3053 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3056 while (GET_RTX_CLASS (GET_CODE (op)) == '1'
3057 || GET_RTX_CLASS (GET_CODE (op)) == '2')
3060 expr = get_mem_expr_from_op (op, &inner_addressp);
3061 return inner_addressp ? 0 : expr;
3064 /* Output operand names for assembler instructions. OPERANDS is the
3065 operand vector, OPORDER is the order to write the operands, and NOPS
3066 is the number of operands to write. */
3069 output_asm_operand_names (operands, oporder, nops)
3077 for (i = 0; i < nops; i++)
3080 tree expr = get_mem_expr_from_op (operands[oporder[i]], &addressp);
3084 fprintf (asm_out_file, "%c%s %s",
3085 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START,
3086 addressp ? "*" : "");
3087 print_mem_expr (asm_out_file, expr);
3093 /* Output text from TEMPLATE to the assembler output file,
3094 obeying %-directions to substitute operands taken from
3095 the vector OPERANDS.
3097 %N (for N a digit) means print operand N in usual manner.
3098 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3099 and print the label name with no punctuation.
3100 %cN means require operand N to be a constant
3101 and print the constant expression with no punctuation.
3102 %aN means expect operand N to be a memory address
3103 (not a memory reference!) and print a reference
3105 %nN means expect operand N to be a constant
3106 and print a constant expression for minus the value
3107 of the operand, with no other punctuation. */
3110 output_asm_insn (template, operands)
3111 const char *template;
3116 #ifdef ASSEMBLER_DIALECT
3119 int oporder[MAX_RECOG_OPERANDS];
3120 char opoutput[MAX_RECOG_OPERANDS];
3123 /* An insn may return a null string template
3124 in a case where no assembler code is needed. */
3128 memset (opoutput, 0, sizeof opoutput);
3130 putc ('\t', asm_out_file);
3132 #ifdef ASM_OUTPUT_OPCODE
3133 ASM_OUTPUT_OPCODE (asm_out_file, p);
3140 if (flag_verbose_asm)
3141 output_asm_operand_names (operands, oporder, ops);
3142 if (flag_print_asm_name)
3146 memset (opoutput, 0, sizeof opoutput);
3148 putc (c, asm_out_file);
3149 #ifdef ASM_OUTPUT_OPCODE
3150 while ((c = *p) == '\t')
3152 putc (c, asm_out_file);
3155 ASM_OUTPUT_OPCODE (asm_out_file, p);
3159 #ifdef ASSEMBLER_DIALECT
3165 output_operand_lossage ("nested assembly dialect alternatives");
3169 /* If we want the first dialect, do nothing. Otherwise, skip
3170 DIALECT_NUMBER of strings ending with '|'. */
3171 for (i = 0; i < dialect_number; i++)
3173 while (*p && *p != '}' && *p++ != '|')
3182 output_operand_lossage ("unterminated assembly dialect alternative");
3189 /* Skip to close brace. */
3194 output_operand_lossage ("unterminated assembly dialect alternative");
3198 while (*p++ != '}');
3202 putc (c, asm_out_file);
3207 putc (c, asm_out_file);
3213 /* %% outputs a single %. */
3217 putc (c, asm_out_file);
3219 /* %= outputs a number which is unique to each insn in the entire
3220 compilation. This is useful for making local labels that are
3221 referred to more than once in a given insn. */
3225 fprintf (asm_out_file, "%d", insn_counter);
3227 /* % followed by a letter and some digits
3228 outputs an operand in a special way depending on the letter.
3229 Letters `acln' are implemented directly.
3230 Other letters are passed to `output_operand' so that
3231 the PRINT_OPERAND macro can define them. */
3232 else if (ISALPHA (*p))
3238 output_operand_lossage ("operand number missing after %-letter");
3239 else if (this_is_asm_operands
3240 && (c < 0 || (unsigned int) c >= insn_noperands))
3241 output_operand_lossage ("operand number out of range");
3242 else if (letter == 'l')
3243 output_asm_label (operands[c]);
3244 else if (letter == 'a')
3245 output_address (operands[c]);
3246 else if (letter == 'c')
3248 if (CONSTANT_ADDRESS_P (operands[c]))
3249 output_addr_const (asm_out_file, operands[c]);
3251 output_operand (operands[c], 'c');
3253 else if (letter == 'n')
3255 if (GET_CODE (operands[c]) == CONST_INT)
3256 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3257 - INTVAL (operands[c]));
3260 putc ('-', asm_out_file);
3261 output_addr_const (asm_out_file, operands[c]);
3265 output_operand (operands[c], letter);
3271 while (ISDIGIT (c = *p))
3274 /* % followed by a digit outputs an operand the default way. */
3275 else if (ISDIGIT (*p))
3278 if (this_is_asm_operands
3279 && (c < 0 || (unsigned int) c >= insn_noperands))
3280 output_operand_lossage ("operand number out of range");
3282 output_operand (operands[c], 0);
3288 while (ISDIGIT (c = *p))
3291 /* % followed by punctuation: output something for that
3292 punctuation character alone, with no operand.
3293 The PRINT_OPERAND macro decides what is actually done. */
3294 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3295 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3296 output_operand (NULL_RTX, *p++);
3299 output_operand_lossage ("invalid %%-code");
3303 putc (c, asm_out_file);
3306 /* Write out the variable names for operands, if we know them. */
3307 if (flag_verbose_asm)
3308 output_asm_operand_names (operands, oporder, ops);
3309 if (flag_print_asm_name)
3312 putc ('\n', asm_out_file);
3315 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3318 output_asm_label (x)
3323 if (GET_CODE (x) == LABEL_REF)
3325 if (GET_CODE (x) == CODE_LABEL
3326 || (GET_CODE (x) == NOTE
3327 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3328 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3330 output_operand_lossage ("`%l' operand isn't a label");
3332 assemble_name (asm_out_file, buf);
3335 /* Print operand X using machine-dependent assembler syntax.
3336 The macro PRINT_OPERAND is defined just to control this function.
3337 CODE is a non-digit that preceded the operand-number in the % spec,
3338 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3339 between the % and the digits.
3340 When CODE is a non-letter, X is 0.
3342 The meanings of the letters are machine-dependent and controlled
3343 by PRINT_OPERAND. */
3346 output_operand (x, code)
3348 int code ATTRIBUTE_UNUSED;
3350 if (x && GET_CODE (x) == SUBREG)
3351 x = alter_subreg (&x);
3353 /* If X is a pseudo-register, abort now rather than writing trash to the
3356 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3359 PRINT_OPERAND (asm_out_file, x, code);
3362 /* Print a memory reference operand for address X
3363 using machine-dependent assembler syntax.
3364 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3370 walk_alter_subreg (&x);
3371 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3374 /* Print an integer constant expression in assembler syntax.
3375 Addition and subtraction are the only arithmetic
3376 that may appear in these expressions. */
3379 output_addr_const (file, x)
3386 switch (GET_CODE (x))
3393 #ifdef ASM_OUTPUT_SYMBOL_REF
3394 ASM_OUTPUT_SYMBOL_REF (file, x);
3396 assemble_name (file, XSTR (x, 0));
3404 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3405 #ifdef ASM_OUTPUT_LABEL_REF
3406 ASM_OUTPUT_LABEL_REF (file, buf);
3408 assemble_name (file, buf);
3413 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3417 /* This used to output parentheses around the expression,
3418 but that does not work on the 386 (either ATT or BSD assembler). */
3419 output_addr_const (file, XEXP (x, 0));
3423 if (GET_MODE (x) == VOIDmode)
3425 /* We can use %d if the number is one word and positive. */
3426 if (CONST_DOUBLE_HIGH (x))
3427 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3428 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3429 else if (CONST_DOUBLE_LOW (x) < 0)
3430 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3432 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3435 /* We can't handle floating point constants;
3436 PRINT_OPERAND must handle them. */
3437 output_operand_lossage ("floating constant misused");
3441 /* Some assemblers need integer constants to appear last (eg masm). */
3442 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3444 output_addr_const (file, XEXP (x, 1));
3445 if (INTVAL (XEXP (x, 0)) >= 0)
3446 fprintf (file, "+");
3447 output_addr_const (file, XEXP (x, 0));
3451 output_addr_const (file, XEXP (x, 0));
3452 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3453 || INTVAL (XEXP (x, 1)) >= 0)
3454 fprintf (file, "+");
3455 output_addr_const (file, XEXP (x, 1));
3460 /* Avoid outputting things like x-x or x+5-x,
3461 since some assemblers can't handle that. */
3462 x = simplify_subtraction (x);
3463 if (GET_CODE (x) != MINUS)
3466 output_addr_const (file, XEXP (x, 0));
3467 fprintf (file, "-");
3468 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3469 || GET_CODE (XEXP (x, 1)) == PC
3470 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3471 output_addr_const (file, XEXP (x, 1));
3474 fputs (targetm.asm_out.open_paren, file);
3475 output_addr_const (file, XEXP (x, 1));
3476 fputs (targetm.asm_out.close_paren, file);
3482 output_addr_const (file, XEXP (x, 0));
3486 #ifdef OUTPUT_ADDR_CONST_EXTRA
3487 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3492 output_operand_lossage ("invalid expression as operand");
3496 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3497 %R prints the value of REGISTER_PREFIX.
3498 %L prints the value of LOCAL_LABEL_PREFIX.
3499 %U prints the value of USER_LABEL_PREFIX.
3500 %I prints the value of IMMEDIATE_PREFIX.
3501 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3502 Also supported are %d, %x, %s, %e, %f, %g and %%.
3504 We handle alternate assembler dialects here, just like output_asm_insn. */
3507 asm_fprintf VPARAMS ((FILE *file, const char *p, ...))
3512 VA_OPEN (argptr, p);
3513 VA_FIXEDARG (argptr, FILE *, file);
3514 VA_FIXEDARG (argptr, const char *, p);
3521 #ifdef ASSEMBLER_DIALECT
3526 /* If we want the first dialect, do nothing. Otherwise, skip
3527 DIALECT_NUMBER of strings ending with '|'. */
3528 for (i = 0; i < dialect_number; i++)
3530 while (*p && *p++ != '|')
3540 /* Skip to close brace. */
3541 while (*p && *p++ != '}')
3552 while (ISDIGIT (c) || c == '.')
3560 fprintf (file, "%%");
3563 case 'd': case 'i': case 'u':
3564 case 'x': case 'p': case 'X':
3568 fprintf (file, buf, va_arg (argptr, int));
3572 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3573 but we do not check for those cases. It means that the value
3574 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3576 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3578 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3588 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3595 fprintf (file, buf, va_arg (argptr, long));
3603 fprintf (file, buf, va_arg (argptr, double));
3609 fprintf (file, buf, va_arg (argptr, char *));
3613 #ifdef ASM_OUTPUT_OPCODE
3614 ASM_OUTPUT_OPCODE (asm_out_file, p);
3619 #ifdef REGISTER_PREFIX
3620 fprintf (file, "%s", REGISTER_PREFIX);
3625 #ifdef IMMEDIATE_PREFIX
3626 fprintf (file, "%s", IMMEDIATE_PREFIX);
3631 #ifdef LOCAL_LABEL_PREFIX
3632 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3637 fputs (user_label_prefix, file);
3640 #ifdef ASM_FPRINTF_EXTENSIONS
3641 /* Upper case letters are reserved for general use by asm_fprintf
3642 and so are not available to target specific code. In order to
3643 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3644 they are defined here. As they get turned into real extensions
3645 to asm_fprintf they should be removed from this list. */
3646 case 'A': case 'B': case 'C': case 'D': case 'E':
3647 case 'F': case 'G': case 'H': case 'J': case 'K':
3648 case 'M': case 'N': case 'P': case 'Q': case 'S':
3649 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3652 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3665 /* Split up a CONST_DOUBLE or integer constant rtx
3666 into two rtx's for single words,
3667 storing in *FIRST the word that comes first in memory in the target
3668 and in *SECOND the other. */
3671 split_double (value, first, second)
3673 rtx *first, *second;
3675 if (GET_CODE (value) == CONST_INT)
3677 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3679 /* In this case the CONST_INT holds both target words.
3680 Extract the bits from it into two word-sized pieces.
3681 Sign extend each half to HOST_WIDE_INT. */
3682 unsigned HOST_WIDE_INT low, high;
3683 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3685 /* Set sign_bit to the most significant bit of a word. */
3687 sign_bit <<= BITS_PER_WORD - 1;
3689 /* Set mask so that all bits of the word are set. We could
3690 have used 1 << BITS_PER_WORD instead of basing the
3691 calculation on sign_bit. However, on machines where
3692 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3693 compiler warning, even though the code would never be
3695 mask = sign_bit << 1;
3698 /* Set sign_extend as any remaining bits. */
3699 sign_extend = ~mask;
3701 /* Pick the lower word and sign-extend it. */
3702 low = INTVAL (value);
3707 /* Pick the higher word, shifted to the least significant
3708 bits, and sign-extend it. */
3709 high = INTVAL (value);
3710 high >>= BITS_PER_WORD - 1;
3713 if (high & sign_bit)
3714 high |= sign_extend;
3716 /* Store the words in the target machine order. */
3717 if (WORDS_BIG_ENDIAN)
3719 *first = GEN_INT (high);
3720 *second = GEN_INT (low);
3724 *first = GEN_INT (low);
3725 *second = GEN_INT (high);
3730 /* The rule for using CONST_INT for a wider mode
3731 is that we regard the value as signed.
3732 So sign-extend it. */
3733 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3734 if (WORDS_BIG_ENDIAN)
3746 else if (GET_CODE (value) != CONST_DOUBLE)
3748 if (WORDS_BIG_ENDIAN)
3750 *first = const0_rtx;
3756 *second = const0_rtx;
3759 else if (GET_MODE (value) == VOIDmode
3760 /* This is the old way we did CONST_DOUBLE integers. */
3761 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3763 /* In an integer, the words are defined as most and least significant.
3764 So order them by the target's convention. */
3765 if (WORDS_BIG_ENDIAN)
3767 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3768 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3772 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3773 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3778 #ifdef REAL_ARITHMETIC
3781 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3783 /* Note, this converts the REAL_VALUE_TYPE to the target's
3784 format, splits up the floating point double and outputs
3785 exactly 32 bits of it into each of l[0] and l[1] --
3786 not necessarily BITS_PER_WORD bits. */
3787 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3789 /* If 32 bits is an entire word for the target, but not for the host,
3790 then sign-extend on the host so that the number will look the same
3791 way on the host that it would on the target. See for instance
3792 simplify_unary_operation. The #if is needed to avoid compiler
3795 #if HOST_BITS_PER_LONG > 32
3796 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3798 if (l[0] & ((long) 1 << 31))
3799 l[0] |= ((long) (-1) << 32);
3800 if (l[1] & ((long) 1 << 31))
3801 l[1] |= ((long) (-1) << 32);
3805 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3806 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
3808 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3809 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3810 && ! flag_pretend_float)
3814 #ifdef HOST_WORDS_BIG_ENDIAN
3821 /* Host and target agree => no need to swap. */
3822 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3823 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3827 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3828 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3830 #endif /* no REAL_ARITHMETIC */
3834 /* Return nonzero if this function has no function calls. */
3842 if (profile_flag || profile_arc_flag)
3845 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3847 if (GET_CODE (insn) == CALL_INSN
3848 && ! SIBLING_CALL_P (insn))
3850 if (GET_CODE (insn) == INSN
3851 && GET_CODE (PATTERN (insn)) == SEQUENCE
3852 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
3853 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3856 for (link = current_function_epilogue_delay_list;
3858 link = XEXP (link, 1))
3860 insn = XEXP (link, 0);
3862 if (GET_CODE (insn) == CALL_INSN
3863 && ! SIBLING_CALL_P (insn))
3865 if (GET_CODE (insn) == INSN
3866 && GET_CODE (PATTERN (insn)) == SEQUENCE
3867 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
3868 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3875 /* Return 1 if branch is an forward branch.
3876 Uses insn_shuid array, so it works only in the final pass. May be used by
3877 output templates to customary add branch prediction hints.
3880 final_forward_branch_p (insn)
3883 int insn_id, label_id;
3886 insn_id = INSN_SHUID (insn);
3887 label_id = INSN_SHUID (JUMP_LABEL (insn));
3888 /* We've hit some insns that does not have id information available. */
3889 if (!insn_id || !label_id)
3891 return insn_id < label_id;
3894 /* On some machines, a function with no call insns
3895 can run faster if it doesn't create its own register window.
3896 When output, the leaf function should use only the "output"
3897 registers. Ordinarily, the function would be compiled to use
3898 the "input" registers to find its arguments; it is a candidate
3899 for leaf treatment if it uses only the "input" registers.
3900 Leaf function treatment means renumbering so the function
3901 uses the "output" registers instead. */
3903 #ifdef LEAF_REGISTERS
3905 /* Return 1 if this function uses only the registers that can be
3906 safely renumbered. */
3909 only_leaf_regs_used ()
3912 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3914 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3915 if ((regs_ever_live[i] || global_regs[i])
3916 && ! permitted_reg_in_leaf_functions[i])
3919 if (current_function_uses_pic_offset_table
3920 && pic_offset_table_rtx != 0
3921 && GET_CODE (pic_offset_table_rtx) == REG
3922 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3928 /* Scan all instructions and renumber all registers into those
3929 available in leaf functions. */
3932 leaf_renumber_regs (first)
3937 /* Renumber only the actual patterns.
3938 The reg-notes can contain frame pointer refs,
3939 and renumbering them could crash, and should not be needed. */
3940 for (insn = first; insn; insn = NEXT_INSN (insn))
3942 leaf_renumber_regs_insn (PATTERN (insn));
3943 for (insn = current_function_epilogue_delay_list;
3945 insn = XEXP (insn, 1))
3946 if (INSN_P (XEXP (insn, 0)))
3947 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3950 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3951 available in leaf functions. */
3954 leaf_renumber_regs_insn (in_rtx)
3958 const char *format_ptr;
3963 /* Renumber all input-registers into output-registers.
3964 renumbered_regs would be 1 for an output-register;
3967 if (GET_CODE (in_rtx) == REG)
3971 /* Don't renumber the same reg twice. */
3975 newreg = REGNO (in_rtx);
3976 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3977 to reach here as part of a REG_NOTE. */
3978 if (newreg >= FIRST_PSEUDO_REGISTER)
3983 newreg = LEAF_REG_REMAP (newreg);
3986 regs_ever_live[REGNO (in_rtx)] = 0;
3987 regs_ever_live[newreg] = 1;
3988 REGNO (in_rtx) = newreg;
3992 if (INSN_P (in_rtx))
3994 /* Inside a SEQUENCE, we find insns.
3995 Renumber just the patterns of these insns,
3996 just as we do for the top-level insns. */
3997 leaf_renumber_regs_insn (PATTERN (in_rtx));
4001 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4003 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4004 switch (*format_ptr++)
4007 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4011 if (NULL != XVEC (in_rtx, i))
4013 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4014 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));