1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_last_label_num was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl[GR_MAX];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
100 rtx (*gen_lowpart) (enum machine_mode mode, rtx x) = gen_lowpart_general;
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconst3;
114 REAL_VALUE_TYPE dconst10;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconstm2;
117 REAL_VALUE_TYPE dconsthalf;
118 REAL_VALUE_TYPE dconstthird;
119 REAL_VALUE_TYPE dconstpi;
120 REAL_VALUE_TYPE dconste;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_int_htab;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
163 htab_t mem_attrs_htab;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
167 htab_t reg_attrs_htab;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
171 htab_t const_double_htab;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx make_jump_insn_raw (rtx);
180 static rtx make_call_insn_raw (rtx);
181 static rtx find_line_note (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void unshare_all_decls (tree);
184 static void reset_used_decls (tree);
185 static void mark_label_nuses (rtx);
186 static hashval_t const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx lookup_const_double (rtx);
191 static hashval_t mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
195 static hashval_t reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs *get_reg_attrs (tree, int);
198 static tree component_ref_for_mem_expr (tree);
199 static rtx gen_const_vector_0 (enum machine_mode);
200 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
201 static void copy_rtx_if_shared_1 (rtx *orig);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x)
212 return (hashval_t) INTVAL ((rtx) x);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x, const void *y)
222 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x)
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x, const void *y)
248 rtx a = (rtx)x, b = (rtx)y;
250 if (GET_MODE (a) != GET_MODE (b))
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x)
265 mem_attrs *p = (mem_attrs *) x;
267 return (p->alias ^ (p->align * 1000)
268 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
269 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x, const void *y)
280 mem_attrs *p = (mem_attrs *) x;
281 mem_attrs *q = (mem_attrs *) y;
283 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
284 && p->size == q->size && p->align == q->align);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
293 unsigned int align, enum machine_mode mode)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias == 0 && expr == 0 && offset == 0
303 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
304 && (STRICT_ALIGNMENT && mode != BLKmode
305 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
310 attrs.offset = offset;
314 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
317 *slot = ggc_alloc (sizeof (mem_attrs));
318 memcpy (*slot, &attrs, sizeof (mem_attrs));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x)
329 reg_attrs *p = (reg_attrs *) x;
331 return ((p->offset * 1000) ^ (long) p->decl);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x, const void *y)
341 reg_attrs *p = (reg_attrs *) x;
342 reg_attrs *q = (reg_attrs *) y;
344 return (p->decl == q->decl && p->offset == q->offset);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl, int offset)
356 /* If everything is the default, we can just return zero. */
357 if (decl == 0 && offset == 0)
361 attrs.offset = offset;
363 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
366 *slot = ggc_alloc (sizeof (reg_attrs));
367 memcpy (*slot, &attrs, sizeof (reg_attrs));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode, int regno)
380 rtx x = gen_rtx_raw_REG (mode, regno);
381 ORIGINAL_REGNO (x) = regno;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
394 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
395 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx && arg == STORE_FLAG_VALUE)
399 return const_true_rtx;
402 /* Look up the CONST_INT in the hash table. */
403 slot = htab_find_slot_with_hash (const_int_htab, &arg,
404 (hashval_t) arg, INSERT);
406 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
412 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
414 return GEN_INT (trunc_int_for_mode (c, mode));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real)
427 void **slot = htab_find_slot (const_double_htab, real, INSERT);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
439 rtx real = rtx_alloc (CONST_DOUBLE);
440 PUT_MODE (real, mode);
442 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
444 return lookup_const_double (real);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
458 if (mode != VOIDmode)
461 if (GET_MODE_CLASS (mode) != MODE_INT
462 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width = GET_MODE_BITSIZE (mode);
472 if (width < HOST_BITS_PER_WIDE_INT
473 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
474 != ((HOST_WIDE_INT) (-1) << (width - 1))))
475 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
476 else if (width == HOST_BITS_PER_WIDE_INT
477 && ! (i1 == ~0 && i0 < 0))
479 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width < HOST_BITS_PER_WIDE_INT
493 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
494 i0 |= ((HOST_WIDE_INT) (-1) << width);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width <= HOST_BITS_PER_WIDE_INT)
515 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
522 /* We use VOIDmode for integers. */
523 value = rtx_alloc (CONST_DOUBLE);
524 PUT_MODE (value, VOIDmode);
526 CONST_DOUBLE_LOW (value) = i0;
527 CONST_DOUBLE_HIGH (value) = i1;
529 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
530 XWINT (value, i) = 0;
532 return lookup_const_double (value);
536 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode == Pmode && !reload_in_progress)
554 if (regno == FRAME_POINTER_REGNUM
555 && (!reload_completed || frame_pointer_needed))
556 return frame_pointer_rtx;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno == HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed || frame_pointer_needed))
560 return hard_frame_pointer_rtx;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno == ARG_POINTER_REGNUM)
564 return arg_pointer_rtx;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
568 return return_address_pointer_rtx;
570 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
572 return pic_offset_table_rtx;
573 if (regno == STACK_POINTER_REGNUM)
574 return stack_pointer_rtx;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno < FIRST_PSEUDO_REGISTER
593 && reg_raw_mode[regno] == mode)
594 return regno_reg_rtx[regno];
597 return gen_raw_REG (mode, regno);
601 gen_rtx_MEM (enum machine_mode mode, rtx addr)
603 rtx rt = gen_rtx_raw_MEM (mode, addr);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset % GET_MODE_SIZE (mode)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
628 return gen_rtx_raw_SUBREG (mode, reg, offset);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
637 enum machine_mode inmode;
639 inmode = GET_MODE (reg);
640 if (inmode == VOIDmode)
642 return gen_rtx_SUBREG (mode, reg,
643 subreg_lowpart_offset (mode, inmode));
646 /* gen_rtvec (n, [rt1, ..., rtn])
648 ** This routine creates an rtvec and stores within it the
649 ** pointers to rtx's which are its arguments.
654 gen_rtvec (int n, ...)
663 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
665 vector = alloca (n * sizeof (rtx));
667 for (i = 0; i < n; i++)
668 vector[i] = va_arg (p, rtx);
670 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
674 return gen_rtvec_v (save_n, vector);
678 gen_rtvec_v (int n, rtx *argp)
684 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
686 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
688 for (i = 0; i < n; i++)
689 rt_val->elem[i] = *argp++;
694 /* Generate a REG rtx for a new pseudo register of mode MODE.
695 This pseudo is assigned the next sequential register number. */
698 gen_reg_rtx (enum machine_mode mode)
700 struct function *f = cfun;
703 /* Don't let anything called after initial flow analysis create new
708 if (generating_concat_p
709 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
710 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
712 /* For complex modes, don't make a single pseudo.
713 Instead, make a CONCAT of two pseudos.
714 This allows noncontiguous allocation of the real and imaginary parts,
715 which makes much better code. Besides, allocating DCmode
716 pseudos overstrains reload on some machines like the 386. */
717 rtx realpart, imagpart;
718 enum machine_mode partmode = GET_MODE_INNER (mode);
720 realpart = gen_reg_rtx (partmode);
721 imagpart = gen_reg_rtx (partmode);
722 return gen_rtx_CONCAT (mode, realpart, imagpart);
725 /* Make sure regno_pointer_align, and regno_reg_rtx are large
726 enough to have an element for this pseudo reg number. */
728 if (reg_rtx_no == f->emit->regno_pointer_align_length)
730 int old_size = f->emit->regno_pointer_align_length;
734 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
735 memset (new + old_size, 0, old_size);
736 f->emit->regno_pointer_align = (unsigned char *) new;
738 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
739 old_size * 2 * sizeof (rtx));
740 memset (new1 + old_size, 0, old_size * sizeof (rtx));
741 regno_reg_rtx = new1;
743 f->emit->regno_pointer_align_length = old_size * 2;
746 val = gen_raw_REG (mode, reg_rtx_no);
747 regno_reg_rtx[reg_rtx_no++] = val;
751 /* Generate a register with same attributes as REG,
752 but offsetted by OFFSET. */
755 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
757 rtx new = gen_rtx_REG (mode, regno);
758 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
759 REG_OFFSET (reg) + offset);
763 /* Set the decl for MEM to DECL. */
766 set_reg_attrs_from_mem (rtx reg, rtx mem)
768 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
770 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
773 /* Set the register attributes for registers contained in PARM_RTX.
774 Use needed values from memory attributes of MEM. */
777 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
779 if (GET_CODE (parm_rtx) == REG)
780 set_reg_attrs_from_mem (parm_rtx, mem);
781 else if (GET_CODE (parm_rtx) == PARALLEL)
783 /* Check for a NULL entry in the first slot, used to indicate that the
784 parameter goes both on the stack and in registers. */
785 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
786 for (; i < XVECLEN (parm_rtx, 0); i++)
788 rtx x = XVECEXP (parm_rtx, 0, i);
789 if (GET_CODE (XEXP (x, 0)) == REG)
790 REG_ATTRS (XEXP (x, 0))
791 = get_reg_attrs (MEM_EXPR (mem),
792 INTVAL (XEXP (x, 1)));
797 /* Assign the RTX X to declaration T. */
799 set_decl_rtl (tree t, rtx x)
801 DECL_CHECK (t)->decl.rtl = x;
805 /* For register, we maintain the reverse information too. */
806 if (GET_CODE (x) == REG)
807 REG_ATTRS (x) = get_reg_attrs (t, 0);
808 else if (GET_CODE (x) == SUBREG)
809 REG_ATTRS (SUBREG_REG (x))
810 = get_reg_attrs (t, -SUBREG_BYTE (x));
811 if (GET_CODE (x) == CONCAT)
813 if (REG_P (XEXP (x, 0)))
814 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
815 if (REG_P (XEXP (x, 1)))
816 REG_ATTRS (XEXP (x, 1))
817 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
819 if (GET_CODE (x) == PARALLEL)
822 for (i = 0; i < XVECLEN (x, 0); i++)
824 rtx y = XVECEXP (x, 0, i);
825 if (REG_P (XEXP (y, 0)))
826 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
831 /* Assign the RTX X to parameter declaration T. */
833 set_decl_incoming_rtl (tree t, rtx x)
835 DECL_INCOMING_RTL (t) = x;
839 /* For register, we maintain the reverse information too. */
840 if (GET_CODE (x) == REG)
841 REG_ATTRS (x) = get_reg_attrs (t, 0);
842 else if (GET_CODE (x) == SUBREG)
843 REG_ATTRS (SUBREG_REG (x))
844 = get_reg_attrs (t, -SUBREG_BYTE (x));
845 if (GET_CODE (x) == CONCAT)
847 if (REG_P (XEXP (x, 0)))
848 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
849 if (REG_P (XEXP (x, 1)))
850 REG_ATTRS (XEXP (x, 1))
851 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
853 if (GET_CODE (x) == PARALLEL)
857 /* Check for a NULL entry, used to indicate that the parameter goes
858 both on the stack and in registers. */
859 if (XEXP (XVECEXP (x, 0, 0), 0))
864 for (i = start; i < XVECLEN (x, 0); i++)
866 rtx y = XVECEXP (x, 0, i);
867 if (REG_P (XEXP (y, 0)))
868 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
873 /* Identify REG (which may be a CONCAT) as a user register. */
876 mark_user_reg (rtx reg)
878 if (GET_CODE (reg) == CONCAT)
880 REG_USERVAR_P (XEXP (reg, 0)) = 1;
881 REG_USERVAR_P (XEXP (reg, 1)) = 1;
883 else if (GET_CODE (reg) == REG)
884 REG_USERVAR_P (reg) = 1;
889 /* Identify REG as a probable pointer register and show its alignment
890 as ALIGN, if nonzero. */
893 mark_reg_pointer (rtx reg, int align)
895 if (! REG_POINTER (reg))
897 REG_POINTER (reg) = 1;
900 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
902 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
903 /* We can no-longer be sure just how aligned this pointer is. */
904 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
907 /* Return 1 plus largest pseudo reg number used in the current function. */
915 /* Return 1 + the largest label number used so far in the current function. */
920 if (last_label_num && label_num == base_label_num)
921 return last_label_num;
925 /* Return first label number used in this function (if any were used). */
928 get_first_label_num (void)
930 return first_label_num;
933 /* Return the final regno of X, which is a SUBREG of a hard
936 subreg_hard_regno (rtx x, int check_mode)
938 enum machine_mode mode = GET_MODE (x);
939 unsigned int byte_offset, base_regno, final_regno;
940 rtx reg = SUBREG_REG (x);
942 /* This is where we attempt to catch illegal subregs
943 created by the compiler. */
944 if (GET_CODE (x) != SUBREG
945 || GET_CODE (reg) != REG)
947 base_regno = REGNO (reg);
948 if (base_regno >= FIRST_PSEUDO_REGISTER)
950 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
952 #ifdef ENABLE_CHECKING
953 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
954 SUBREG_BYTE (x), mode))
957 /* Catch non-congruent offsets too. */
958 byte_offset = SUBREG_BYTE (x);
959 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
962 final_regno = subreg_regno (x);
967 /* Return a value representing some low-order bits of X, where the number
968 of low-order bits is given by MODE. Note that no conversion is done
969 between floating-point and fixed-point values, rather, the bit
970 representation is returned.
972 This function handles the cases in common between gen_lowpart, below,
973 and two variants in cse.c and combine.c. These are the cases that can
974 be safely handled at all points in the compilation.
976 If this is not a case we can handle, return 0. */
979 gen_lowpart_common (enum machine_mode mode, rtx x)
981 int msize = GET_MODE_SIZE (mode);
984 enum machine_mode innermode;
986 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
987 so we have to make one up. Yuk. */
988 innermode = GET_MODE (x);
989 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
990 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
991 else if (innermode == VOIDmode)
992 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
994 xsize = GET_MODE_SIZE (innermode);
996 if (innermode == VOIDmode || innermode == BLKmode)
999 if (innermode == mode)
1002 /* MODE must occupy no more words than the mode of X. */
1003 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1004 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1007 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1008 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1011 offset = subreg_lowpart_offset (mode, innermode);
1013 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1014 && (GET_MODE_CLASS (mode) == MODE_INT
1015 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1017 /* If we are getting the low-order part of something that has been
1018 sign- or zero-extended, we can either just use the object being
1019 extended or make a narrower extension. If we want an even smaller
1020 piece than the size of the object being extended, call ourselves
1023 This case is used mostly by combine and cse. */
1025 if (GET_MODE (XEXP (x, 0)) == mode)
1027 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1028 return gen_lowpart_common (mode, XEXP (x, 0));
1029 else if (msize < xsize)
1030 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1032 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1033 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1034 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1035 return simplify_gen_subreg (mode, x, innermode, offset);
1037 /* Otherwise, we can't do this. */
1041 /* Return the constant real or imaginary part (which has mode MODE)
1042 of a complex value X. The IMAGPART_P argument determines whether
1043 the real or complex component should be returned. This function
1044 returns NULL_RTX if the component isn't a constant. */
1047 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1051 if (GET_CODE (x) == MEM
1052 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1054 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1055 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1057 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1058 if (TREE_CODE (part) == REAL_CST
1059 || TREE_CODE (part) == INTEGER_CST)
1060 return expand_expr (part, NULL_RTX, mode, 0);
1066 /* Return the real part (which has mode MODE) of a complex value X.
1067 This always comes at the low address in memory. */
1070 gen_realpart (enum machine_mode mode, rtx x)
1074 /* Handle complex constants. */
1075 part = gen_complex_constant_part (mode, x, 0);
1076 if (part != NULL_RTX)
1079 if (WORDS_BIG_ENDIAN
1080 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1082 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1084 ("can't access real part of complex value in hard register");
1085 else if (WORDS_BIG_ENDIAN)
1086 return gen_highpart (mode, x);
1088 return gen_lowpart (mode, x);
1091 /* Return the imaginary part (which has mode MODE) of a complex value X.
1092 This always comes at the high address in memory. */
1095 gen_imagpart (enum machine_mode mode, rtx x)
1099 /* Handle complex constants. */
1100 part = gen_complex_constant_part (mode, x, 1);
1101 if (part != NULL_RTX)
1104 if (WORDS_BIG_ENDIAN)
1105 return gen_lowpart (mode, x);
1106 else if (! WORDS_BIG_ENDIAN
1107 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1109 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1111 ("can't access imaginary part of complex value in hard register");
1113 return gen_highpart (mode, x);
1116 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1117 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1118 least-significant part of X.
1119 MODE specifies how big a part of X to return;
1120 it usually should not be larger than a word.
1121 If X is a MEM whose address is a QUEUED, the value may be so also. */
1124 gen_lowpart_general (enum machine_mode mode, rtx x)
1126 rtx result = gen_lowpart_common (mode, x);
1130 else if (GET_CODE (x) == REG)
1132 /* Must be a hard reg that's not valid in MODE. */
1133 result = gen_lowpart_common (mode, copy_to_reg (x));
1138 else if (GET_CODE (x) == MEM)
1140 /* The only additional case we can do is MEM. */
1143 /* The following exposes the use of "x" to CSE. */
1144 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1145 && SCALAR_INT_MODE_P (GET_MODE (x))
1146 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1147 GET_MODE_BITSIZE (GET_MODE (x)))
1148 && ! no_new_pseudos)
1149 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1151 if (WORDS_BIG_ENDIAN)
1152 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1153 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1155 if (BYTES_BIG_ENDIAN)
1156 /* Adjust the address so that the address-after-the-data
1158 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1159 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1161 return adjust_address (x, mode, offset);
1163 else if (GET_CODE (x) == ADDRESSOF)
1164 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1169 /* Like `gen_lowpart', but refer to the most significant part.
1170 This is used to access the imaginary part of a complex number. */
1173 gen_highpart (enum machine_mode mode, rtx x)
1175 unsigned int msize = GET_MODE_SIZE (mode);
1178 /* This case loses if X is a subreg. To catch bugs early,
1179 complain if an invalid MODE is used even in other cases. */
1180 if (msize > UNITS_PER_WORD
1181 && msize != (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)))
1184 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1185 subreg_highpart_offset (mode, GET_MODE (x)));
1187 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1188 the target if we have a MEM. gen_highpart must return a valid operand,
1189 emitting code if necessary to do so. */
1190 if (result != NULL_RTX && GET_CODE (result) == MEM)
1191 result = validize_mem (result);
1198 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1199 be VOIDmode constant. */
1201 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1203 if (GET_MODE (exp) != VOIDmode)
1205 if (GET_MODE (exp) != innermode)
1207 return gen_highpart (outermode, exp);
1209 return simplify_gen_subreg (outermode, exp, innermode,
1210 subreg_highpart_offset (outermode, innermode));
1213 /* Return offset in bytes to get OUTERMODE low part
1214 of the value in mode INNERMODE stored in memory in target format. */
1217 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1219 unsigned int offset = 0;
1220 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1224 if (WORDS_BIG_ENDIAN)
1225 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1226 if (BYTES_BIG_ENDIAN)
1227 offset += difference % UNITS_PER_WORD;
1233 /* Return offset in bytes to get OUTERMODE high part
1234 of the value in mode INNERMODE stored in memory in target format. */
1236 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1238 unsigned int offset = 0;
1239 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1241 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1246 if (! WORDS_BIG_ENDIAN)
1247 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1248 if (! BYTES_BIG_ENDIAN)
1249 offset += difference % UNITS_PER_WORD;
1255 /* Return 1 iff X, assumed to be a SUBREG,
1256 refers to the least significant part of its containing reg.
1257 If X is not a SUBREG, always return 1 (it is its own low part!). */
1260 subreg_lowpart_p (rtx x)
1262 if (GET_CODE (x) != SUBREG)
1264 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1267 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1268 == SUBREG_BYTE (x));
1271 /* Return subword OFFSET of operand OP.
1272 The word number, OFFSET, is interpreted as the word number starting
1273 at the low-order address. OFFSET 0 is the low-order word if not
1274 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1276 If we cannot extract the required word, we return zero. Otherwise,
1277 an rtx corresponding to the requested word will be returned.
1279 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1280 reload has completed, a valid address will always be returned. After
1281 reload, if a valid address cannot be returned, we return zero.
1283 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1284 it is the responsibility of the caller.
1286 MODE is the mode of OP in case it is a CONST_INT.
1288 ??? This is still rather broken for some cases. The problem for the
1289 moment is that all callers of this thing provide no 'goal mode' to
1290 tell us to work with. This exists because all callers were written
1291 in a word based SUBREG world.
1292 Now use of this function can be deprecated by simplify_subreg in most
1297 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1299 if (mode == VOIDmode)
1300 mode = GET_MODE (op);
1302 if (mode == VOIDmode)
1305 /* If OP is narrower than a word, fail. */
1307 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1310 /* If we want a word outside OP, return zero. */
1312 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1315 /* Form a new MEM at the requested address. */
1316 if (GET_CODE (op) == MEM)
1318 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1320 if (! validate_address)
1323 else if (reload_completed)
1325 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1329 return replace_equiv_address (new, XEXP (new, 0));
1332 /* Rest can be handled by simplify_subreg. */
1333 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1336 /* Similar to `operand_subword', but never return 0. If we can't extract
1337 the required subword, put OP into a register and try again. If that fails,
1338 abort. We always validate the address in this case.
1340 MODE is the mode of OP, in case it is CONST_INT. */
1343 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1345 rtx result = operand_subword (op, offset, 1, mode);
1350 if (mode != BLKmode && mode != VOIDmode)
1352 /* If this is a register which can not be accessed by words, copy it
1353 to a pseudo register. */
1354 if (GET_CODE (op) == REG)
1355 op = copy_to_reg (op);
1357 op = force_reg (mode, op);
1360 result = operand_subword (op, offset, 1, mode);
1367 /* Given a compare instruction, swap the operands.
1368 A test instruction is changed into a compare of 0 against the operand. */
1371 reverse_comparison (rtx insn)
1373 rtx body = PATTERN (insn);
1376 if (GET_CODE (body) == SET)
1377 comp = SET_SRC (body);
1379 comp = SET_SRC (XVECEXP (body, 0, 0));
1381 if (GET_CODE (comp) == COMPARE)
1383 rtx op0 = XEXP (comp, 0);
1384 rtx op1 = XEXP (comp, 1);
1385 XEXP (comp, 0) = op1;
1386 XEXP (comp, 1) = op0;
1390 rtx new = gen_rtx_COMPARE (VOIDmode,
1391 CONST0_RTX (GET_MODE (comp)), comp);
1392 if (GET_CODE (body) == SET)
1393 SET_SRC (body) = new;
1395 SET_SRC (XVECEXP (body, 0, 0)) = new;
1399 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1400 or (2) a component ref of something variable. Represent the later with
1401 a NULL expression. */
1404 component_ref_for_mem_expr (tree ref)
1406 tree inner = TREE_OPERAND (ref, 0);
1408 if (TREE_CODE (inner) == COMPONENT_REF)
1409 inner = component_ref_for_mem_expr (inner);
1412 tree placeholder_ptr = 0;
1414 /* Now remove any conversions: they don't change what the underlying
1415 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1416 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1417 || TREE_CODE (inner) == NON_LVALUE_EXPR
1418 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1419 || TREE_CODE (inner) == SAVE_EXPR
1420 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1421 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1422 inner = find_placeholder (inner, &placeholder_ptr);
1424 inner = TREE_OPERAND (inner, 0);
1426 if (! DECL_P (inner))
1430 if (inner == TREE_OPERAND (ref, 0))
1433 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1434 TREE_OPERAND (ref, 1));
1437 /* Returns 1 if both MEM_EXPR can be considered equal
1441 mem_expr_equal_p (tree expr1, tree expr2)
1446 if (! expr1 || ! expr2)
1449 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1452 if (TREE_CODE (expr1) == COMPONENT_REF)
1454 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1455 TREE_OPERAND (expr2, 0))
1456 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1457 TREE_OPERAND (expr2, 1));
1459 if (TREE_CODE (expr1) == INDIRECT_REF)
1460 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1461 TREE_OPERAND (expr2, 0));
1463 /* Decls with different pointers can't be equal. */
1467 abort(); /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1468 have been resolved here. */
1471 /* Given REF, a MEM, and T, either the type of X or the expression
1472 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1473 if we are making a new object of this type. BITPOS is nonzero if
1474 there is an offset outstanding on T that will be applied later. */
1477 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1478 HOST_WIDE_INT bitpos)
1480 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1481 tree expr = MEM_EXPR (ref);
1482 rtx offset = MEM_OFFSET (ref);
1483 rtx size = MEM_SIZE (ref);
1484 unsigned int align = MEM_ALIGN (ref);
1485 HOST_WIDE_INT apply_bitpos = 0;
1488 /* It can happen that type_for_mode was given a mode for which there
1489 is no language-level type. In which case it returns NULL, which
1494 type = TYPE_P (t) ? t : TREE_TYPE (t);
1495 if (type == error_mark_node)
1498 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1499 wrong answer, as it assumes that DECL_RTL already has the right alias
1500 info. Callers should not set DECL_RTL until after the call to
1501 set_mem_attributes. */
1502 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1505 /* Get the alias set from the expression or type (perhaps using a
1506 front-end routine) and use it. */
1507 alias = get_alias_set (t);
1509 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1510 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1511 RTX_UNCHANGING_P (ref)
1512 |= ((lang_hooks.honor_readonly
1513 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1514 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1515 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1517 /* If we are making an object of this type, or if this is a DECL, we know
1518 that it is a scalar if the type is not an aggregate. */
1519 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1520 MEM_SCALAR_P (ref) = 1;
1522 /* We can set the alignment from the type if we are making an object,
1523 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1524 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1525 align = MAX (align, TYPE_ALIGN (type));
1527 /* If the size is known, we can set that. */
1528 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1529 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1531 /* If T is not a type, we may be able to deduce some more information about
1535 maybe_set_unchanging (ref, t);
1536 if (TREE_THIS_VOLATILE (t))
1537 MEM_VOLATILE_P (ref) = 1;
1539 /* Now remove any conversions: they don't change what the underlying
1540 object is. Likewise for SAVE_EXPR. */
1541 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1542 || TREE_CODE (t) == NON_LVALUE_EXPR
1543 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1544 || TREE_CODE (t) == SAVE_EXPR)
1545 t = TREE_OPERAND (t, 0);
1547 /* If this expression can't be addressed (e.g., it contains a reference
1548 to a non-addressable field), show we don't change its alias set. */
1549 if (! can_address_p (t))
1550 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1552 /* If this is a decl, set the attributes of the MEM from it. */
1556 offset = const0_rtx;
1557 apply_bitpos = bitpos;
1558 size = (DECL_SIZE_UNIT (t)
1559 && host_integerp (DECL_SIZE_UNIT (t), 1)
1560 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1561 align = DECL_ALIGN (t);
1564 /* If this is a constant, we know the alignment. */
1565 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1567 align = TYPE_ALIGN (type);
1568 #ifdef CONSTANT_ALIGNMENT
1569 align = CONSTANT_ALIGNMENT (t, align);
1573 /* If this is a field reference and not a bit-field, record it. */
1574 /* ??? There is some information that can be gleened from bit-fields,
1575 such as the word offset in the structure that might be modified.
1576 But skip it for now. */
1577 else if (TREE_CODE (t) == COMPONENT_REF
1578 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1580 expr = component_ref_for_mem_expr (t);
1581 offset = const0_rtx;
1582 apply_bitpos = bitpos;
1583 /* ??? Any reason the field size would be different than
1584 the size we got from the type? */
1587 /* If this is an array reference, look for an outer field reference. */
1588 else if (TREE_CODE (t) == ARRAY_REF)
1590 tree off_tree = size_zero_node;
1591 /* We can't modify t, because we use it at the end of the
1597 tree index = TREE_OPERAND (t2, 1);
1598 tree array = TREE_OPERAND (t2, 0);
1599 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1600 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1601 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1603 /* We assume all arrays have sizes that are a multiple of a byte.
1604 First subtract the lower bound, if any, in the type of the
1605 index, then convert to sizetype and multiply by the size of the
1607 if (low_bound != 0 && ! integer_zerop (low_bound))
1608 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1611 /* If the index has a self-referential type, pass it to a
1612 WITH_RECORD_EXPR; if the component size is, pass our
1613 component to one. */
1614 if (CONTAINS_PLACEHOLDER_P (index))
1615 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1616 if (CONTAINS_PLACEHOLDER_P (unit_size))
1617 unit_size = build (WITH_RECORD_EXPR, sizetype,
1621 = fold (build (PLUS_EXPR, sizetype,
1622 fold (build (MULT_EXPR, sizetype,
1626 t2 = TREE_OPERAND (t2, 0);
1628 while (TREE_CODE (t2) == ARRAY_REF);
1634 if (host_integerp (off_tree, 1))
1636 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1637 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1638 align = DECL_ALIGN (t2);
1639 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1641 offset = GEN_INT (ioff);
1642 apply_bitpos = bitpos;
1645 else if (TREE_CODE (t2) == COMPONENT_REF)
1647 expr = component_ref_for_mem_expr (t2);
1648 if (host_integerp (off_tree, 1))
1650 offset = GEN_INT (tree_low_cst (off_tree, 1));
1651 apply_bitpos = bitpos;
1653 /* ??? Any reason the field size would be different than
1654 the size we got from the type? */
1656 else if (flag_argument_noalias > 1
1657 && TREE_CODE (t2) == INDIRECT_REF
1658 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1665 /* If this is a Fortran indirect argument reference, record the
1667 else if (flag_argument_noalias > 1
1668 && TREE_CODE (t) == INDIRECT_REF
1669 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1676 /* If we modified OFFSET based on T, then subtract the outstanding
1677 bit position offset. Similarly, increase the size of the accessed
1678 object to contain the negative offset. */
1681 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1683 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1686 /* Now set the attributes we computed above. */
1688 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1690 /* If this is already known to be a scalar or aggregate, we are done. */
1691 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1694 /* If it is a reference into an aggregate, this is part of an aggregate.
1695 Otherwise we don't know. */
1696 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1697 || TREE_CODE (t) == ARRAY_RANGE_REF
1698 || TREE_CODE (t) == BIT_FIELD_REF)
1699 MEM_IN_STRUCT_P (ref) = 1;
1703 set_mem_attributes (rtx ref, tree t, int objectp)
1705 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1708 /* Set the decl for MEM to DECL. */
1711 set_mem_attrs_from_reg (rtx mem, rtx reg)
1714 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1715 GEN_INT (REG_OFFSET (reg)),
1716 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1719 /* Set the alias set of MEM to SET. */
1722 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1724 #ifdef ENABLE_CHECKING
1725 /* If the new and old alias sets don't conflict, something is wrong. */
1726 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1730 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1731 MEM_SIZE (mem), MEM_ALIGN (mem),
1735 /* Set the alignment of MEM to ALIGN bits. */
1738 set_mem_align (rtx mem, unsigned int align)
1740 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1741 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1745 /* Set the expr for MEM to EXPR. */
1748 set_mem_expr (rtx mem, tree expr)
1751 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1752 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1755 /* Set the offset of MEM to OFFSET. */
1758 set_mem_offset (rtx mem, rtx offset)
1760 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1761 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1765 /* Set the size of MEM to SIZE. */
1768 set_mem_size (rtx mem, rtx size)
1770 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1771 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1775 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1776 and its address changed to ADDR. (VOIDmode means don't change the mode.
1777 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1778 returned memory location is required to be valid. The memory
1779 attributes are not changed. */
1782 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1786 if (GET_CODE (memref) != MEM)
1788 if (mode == VOIDmode)
1789 mode = GET_MODE (memref);
1791 addr = XEXP (memref, 0);
1792 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1793 && (!validate || memory_address_p (mode, addr)))
1798 if (reload_in_progress || reload_completed)
1800 if (! memory_address_p (mode, addr))
1804 addr = memory_address (mode, addr);
1807 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1810 new = gen_rtx_MEM (mode, addr);
1811 MEM_COPY_ATTRIBUTES (new, memref);
1815 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1816 way we are changing MEMREF, so we only preserve the alias set. */
1819 change_address (rtx memref, enum machine_mode mode, rtx addr)
1821 rtx new = change_address_1 (memref, mode, addr, 1), size;
1822 enum machine_mode mmode = GET_MODE (new);
1825 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1826 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1828 /* If there are no changes, just return the original memory reference. */
1831 if (MEM_ATTRS (memref) == 0
1832 || (MEM_EXPR (memref) == NULL
1833 && MEM_OFFSET (memref) == NULL
1834 && MEM_SIZE (memref) == size
1835 && MEM_ALIGN (memref) == align))
1838 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1839 MEM_COPY_ATTRIBUTES (new, memref);
1843 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1848 /* Return a memory reference like MEMREF, but with its mode changed
1849 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1850 nonzero, the memory address is forced to be valid.
1851 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1852 and caller is responsible for adjusting MEMREF base register. */
1855 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1856 int validate, int adjust)
1858 rtx addr = XEXP (memref, 0);
1860 rtx memoffset = MEM_OFFSET (memref);
1862 unsigned int memalign = MEM_ALIGN (memref);
1864 /* If there are no changes, just return the original memory reference. */
1865 if (mode == GET_MODE (memref) && !offset
1866 && (!validate || memory_address_p (mode, addr)))
1869 /* ??? Prefer to create garbage instead of creating shared rtl.
1870 This may happen even if offset is nonzero -- consider
1871 (plus (plus reg reg) const_int) -- so do this always. */
1872 addr = copy_rtx (addr);
1876 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1877 object, we can merge it into the LO_SUM. */
1878 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1880 && (unsigned HOST_WIDE_INT) offset
1881 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1882 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1883 plus_constant (XEXP (addr, 1), offset));
1885 addr = plus_constant (addr, offset);
1888 new = change_address_1 (memref, mode, addr, validate);
1890 /* Compute the new values of the memory attributes due to this adjustment.
1891 We add the offsets and update the alignment. */
1893 memoffset = GEN_INT (offset + INTVAL (memoffset));
1895 /* Compute the new alignment by taking the MIN of the alignment and the
1896 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1901 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1903 /* We can compute the size in a number of ways. */
1904 if (GET_MODE (new) != BLKmode)
1905 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1906 else if (MEM_SIZE (memref))
1907 size = plus_constant (MEM_SIZE (memref), -offset);
1909 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1910 memoffset, size, memalign, GET_MODE (new));
1912 /* At some point, we should validate that this offset is within the object,
1913 if all the appropriate values are known. */
1917 /* Return a memory reference like MEMREF, but with its mode changed
1918 to MODE and its address changed to ADDR, which is assumed to be
1919 MEMREF offseted by OFFSET bytes. If VALIDATE is
1920 nonzero, the memory address is forced to be valid. */
1923 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1924 HOST_WIDE_INT offset, int validate)
1926 memref = change_address_1 (memref, VOIDmode, addr, validate);
1927 return adjust_address_1 (memref, mode, offset, validate, 0);
1930 /* Return a memory reference like MEMREF, but whose address is changed by
1931 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1932 known to be in OFFSET (possibly 1). */
1935 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1937 rtx new, addr = XEXP (memref, 0);
1939 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1941 /* At this point we don't know _why_ the address is invalid. It
1942 could have secondary memory references, multiplies or anything.
1944 However, if we did go and rearrange things, we can wind up not
1945 being able to recognize the magic around pic_offset_table_rtx.
1946 This stuff is fragile, and is yet another example of why it is
1947 bad to expose PIC machinery too early. */
1948 if (! memory_address_p (GET_MODE (memref), new)
1949 && GET_CODE (addr) == PLUS
1950 && XEXP (addr, 0) == pic_offset_table_rtx)
1952 addr = force_reg (GET_MODE (addr), addr);
1953 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1956 update_temp_slot_address (XEXP (memref, 0), new);
1957 new = change_address_1 (memref, VOIDmode, new, 1);
1959 /* If there are no changes, just return the original memory reference. */
1963 /* Update the alignment to reflect the offset. Reset the offset, which
1966 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1967 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1972 /* Return a memory reference like MEMREF, but with its address changed to
1973 ADDR. The caller is asserting that the actual piece of memory pointed
1974 to is the same, just the form of the address is being changed, such as
1975 by putting something into a register. */
1978 replace_equiv_address (rtx memref, rtx addr)
1980 /* change_address_1 copies the memory attribute structure without change
1981 and that's exactly what we want here. */
1982 update_temp_slot_address (XEXP (memref, 0), addr);
1983 return change_address_1 (memref, VOIDmode, addr, 1);
1986 /* Likewise, but the reference is not required to be valid. */
1989 replace_equiv_address_nv (rtx memref, rtx addr)
1991 return change_address_1 (memref, VOIDmode, addr, 0);
1994 /* Return a memory reference like MEMREF, but with its mode widened to
1995 MODE and offset by OFFSET. This would be used by targets that e.g.
1996 cannot issue QImode memory operations and have to use SImode memory
1997 operations plus masking logic. */
2000 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2002 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2003 tree expr = MEM_EXPR (new);
2004 rtx memoffset = MEM_OFFSET (new);
2005 unsigned int size = GET_MODE_SIZE (mode);
2007 /* If there are no changes, just return the original memory reference. */
2011 /* If we don't know what offset we were at within the expression, then
2012 we can't know if we've overstepped the bounds. */
2018 if (TREE_CODE (expr) == COMPONENT_REF)
2020 tree field = TREE_OPERAND (expr, 1);
2022 if (! DECL_SIZE_UNIT (field))
2028 /* Is the field at least as large as the access? If so, ok,
2029 otherwise strip back to the containing structure. */
2030 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2031 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2032 && INTVAL (memoffset) >= 0)
2035 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2041 expr = TREE_OPERAND (expr, 0);
2042 memoffset = (GEN_INT (INTVAL (memoffset)
2043 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2044 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2047 /* Similarly for the decl. */
2048 else if (DECL_P (expr)
2049 && DECL_SIZE_UNIT (expr)
2050 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2051 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2052 && (! memoffset || INTVAL (memoffset) >= 0))
2056 /* The widened memory access overflows the expression, which means
2057 that it could alias another expression. Zap it. */
2064 memoffset = NULL_RTX;
2066 /* The widened memory may alias other stuff, so zap the alias set. */
2067 /* ??? Maybe use get_alias_set on any remaining expression. */
2069 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2070 MEM_ALIGN (new), mode);
2075 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2078 gen_label_rtx (void)
2080 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2081 NULL, label_num++, NULL);
2084 /* For procedure integration. */
2086 /* Install new pointers to the first and last insns in the chain.
2087 Also, set cur_insn_uid to one higher than the last in use.
2088 Used for an inline-procedure after copying the insn chain. */
2091 set_new_first_and_last_insn (rtx first, rtx last)
2099 for (insn = first; insn; insn = NEXT_INSN (insn))
2100 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2105 /* Set the last label number found in the current function.
2106 This is used when belatedly compiling an inline function. */
2109 set_new_last_label_num (int last)
2111 base_label_num = label_num;
2112 last_label_num = last;
2115 /* Restore all variables describing the current status from the structure *P.
2116 This is used after a nested function. */
2119 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2124 /* Go through all the RTL insn bodies and copy any invalid shared
2125 structure. This routine should only be called once. */
2128 unshare_all_rtl (tree fndecl, rtx insn)
2132 /* Make sure that virtual parameters are not shared. */
2133 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2134 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2136 /* Make sure that virtual stack slots are not shared. */
2137 unshare_all_decls (DECL_INITIAL (fndecl));
2139 /* Unshare just about everything else. */
2140 unshare_all_rtl_in_chain (insn);
2142 /* Make sure the addresses of stack slots found outside the insn chain
2143 (such as, in DECL_RTL of a variable) are not shared
2144 with the insn chain.
2146 This special care is necessary when the stack slot MEM does not
2147 actually appear in the insn chain. If it does appear, its address
2148 is unshared from all else at that point. */
2149 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2152 /* Go through all the RTL insn bodies and copy any invalid shared
2153 structure, again. This is a fairly expensive thing to do so it
2154 should be done sparingly. */
2157 unshare_all_rtl_again (rtx insn)
2162 for (p = insn; p; p = NEXT_INSN (p))
2165 reset_used_flags (PATTERN (p));
2166 reset_used_flags (REG_NOTES (p));
2167 reset_used_flags (LOG_LINKS (p));
2170 /* Make sure that virtual stack slots are not shared. */
2171 reset_used_decls (DECL_INITIAL (cfun->decl));
2173 /* Make sure that virtual parameters are not shared. */
2174 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2175 reset_used_flags (DECL_RTL (decl));
2177 reset_used_flags (stack_slot_list);
2179 unshare_all_rtl (cfun->decl, insn);
2182 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2183 Recursively does the same for subexpressions. */
2186 verify_rtx_sharing (rtx orig, rtx insn)
2191 const char *format_ptr;
2196 code = GET_CODE (x);
2198 /* These types may be freely shared. */
2214 /* SCRATCH must be shared because they represent distinct values. */
2216 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2221 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2222 a LABEL_REF, it isn't sharable. */
2223 if (GET_CODE (XEXP (x, 0)) == PLUS
2224 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2225 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2230 /* A MEM is allowed to be shared if its address is constant. */
2231 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2232 || reload_completed || reload_in_progress)
2241 /* This rtx may not be shared. If it has already been seen,
2242 replace it with a copy of itself. */
2244 if (RTX_FLAG (x, used))
2246 error ("Invalid rtl sharing found in the insn");
2248 error ("Shared rtx");
2252 RTX_FLAG (x, used) = 1;
2254 /* Now scan the subexpressions recursively. */
2256 format_ptr = GET_RTX_FORMAT (code);
2258 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2260 switch (*format_ptr++)
2263 verify_rtx_sharing (XEXP (x, i), insn);
2267 if (XVEC (x, i) != NULL)
2270 int len = XVECLEN (x, i);
2272 for (j = 0; j < len; j++)
2274 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2275 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2276 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2277 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2279 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2288 /* Go through all the RTL insn bodies and check that there is no unexpected
2289 sharing in between the subexpressions. */
2292 verify_rtl_sharing (void)
2296 for (p = get_insns (); p; p = NEXT_INSN (p))
2299 reset_used_flags (PATTERN (p));
2300 reset_used_flags (REG_NOTES (p));
2301 reset_used_flags (LOG_LINKS (p));
2304 for (p = get_insns (); p; p = NEXT_INSN (p))
2307 verify_rtx_sharing (PATTERN (p), p);
2308 verify_rtx_sharing (REG_NOTES (p), p);
2309 verify_rtx_sharing (LOG_LINKS (p), p);
2313 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2314 Assumes the mark bits are cleared at entry. */
2317 unshare_all_rtl_in_chain (rtx insn)
2319 for (; insn; insn = NEXT_INSN (insn))
2322 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2323 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2324 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2328 /* Go through all virtual stack slots of a function and copy any
2329 shared structure. */
2331 unshare_all_decls (tree blk)
2335 /* Copy shared decls. */
2336 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2337 if (DECL_RTL_SET_P (t))
2338 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2340 /* Now process sub-blocks. */
2341 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2342 unshare_all_decls (t);
2345 /* Go through all virtual stack slots of a function and mark them as
2348 reset_used_decls (tree blk)
2353 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2354 if (DECL_RTL_SET_P (t))
2355 reset_used_flags (DECL_RTL (t));
2357 /* Now process sub-blocks. */
2358 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2359 reset_used_decls (t);
2362 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2363 placed in the result directly, rather than being copied. MAY_SHARE is
2364 either a MEM of an EXPR_LIST of MEMs. */
2367 copy_most_rtx (rtx orig, rtx may_share)
2372 const char *format_ptr;
2374 if (orig == may_share
2375 || (GET_CODE (may_share) == EXPR_LIST
2376 && in_expr_list_p (may_share, orig)))
2379 code = GET_CODE (orig);
2397 copy = rtx_alloc (code);
2398 PUT_MODE (copy, GET_MODE (orig));
2399 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2400 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2401 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2402 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2403 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2405 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2407 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2409 switch (*format_ptr++)
2412 XEXP (copy, i) = XEXP (orig, i);
2413 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2414 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2418 XEXP (copy, i) = XEXP (orig, i);
2423 XVEC (copy, i) = XVEC (orig, i);
2424 if (XVEC (orig, i) != NULL)
2426 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2427 for (j = 0; j < XVECLEN (copy, i); j++)
2428 XVECEXP (copy, i, j)
2429 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2434 XWINT (copy, i) = XWINT (orig, i);
2439 XINT (copy, i) = XINT (orig, i);
2443 XTREE (copy, i) = XTREE (orig, i);
2448 XSTR (copy, i) = XSTR (orig, i);
2452 X0ANY (copy, i) = X0ANY (orig, i);
2462 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2463 Recursively does the same for subexpressions. Uses
2464 copy_rtx_if_shared_1 to reduce stack space. */
2467 copy_rtx_if_shared (rtx orig)
2469 copy_rtx_if_shared_1 (&orig);
2473 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2474 use. Recursively does the same for subexpressions. */
2477 copy_rtx_if_shared_1 (rtx *orig1)
2483 const char *format_ptr;
2487 /* Repeat is used to turn tail-recursion into iteration. */
2494 code = GET_CODE (x);
2496 /* These types may be freely shared. */
2511 /* SCRATCH must be shared because they represent distinct values. */
2514 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2519 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2520 a LABEL_REF, it isn't sharable. */
2521 if (GET_CODE (XEXP (x, 0)) == PLUS
2522 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2523 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2532 /* The chain of insns is not being copied. */
2539 /* This rtx may not be shared. If it has already been seen,
2540 replace it with a copy of itself. */
2542 if (RTX_FLAG (x, used))
2546 copy = rtx_alloc (code);
2547 memcpy (copy, x, RTX_SIZE (code));
2551 RTX_FLAG (x, used) = 1;
2553 /* Now scan the subexpressions recursively.
2554 We can store any replaced subexpressions directly into X
2555 since we know X is not shared! Any vectors in X
2556 must be copied if X was copied. */
2558 format_ptr = GET_RTX_FORMAT (code);
2559 length = GET_RTX_LENGTH (code);
2562 for (i = 0; i < length; i++)
2564 switch (*format_ptr++)
2568 copy_rtx_if_shared_1 (last_ptr);
2569 last_ptr = &XEXP (x, i);
2573 if (XVEC (x, i) != NULL)
2576 int len = XVECLEN (x, i);
2578 /* Copy the vector iff I copied the rtx and the length
2580 if (copied && len > 0)
2581 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2583 /* Call recursively on all inside the vector. */
2584 for (j = 0; j < len; j++)
2587 copy_rtx_if_shared_1 (last_ptr);
2588 last_ptr = &XVECEXP (x, i, j);
2603 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2604 to look for shared sub-parts. */
2607 reset_used_flags (rtx x)
2611 const char *format_ptr;
2614 /* Repeat is used to turn tail-recursion into iteration. */
2619 code = GET_CODE (x);
2621 /* These types may be freely shared so we needn't do any resetting
2643 /* The chain of insns is not being copied. */
2650 RTX_FLAG (x, used) = 0;
2652 format_ptr = GET_RTX_FORMAT (code);
2653 length = GET_RTX_LENGTH (code);
2655 for (i = 0; i < length; i++)
2657 switch (*format_ptr++)
2665 reset_used_flags (XEXP (x, i));
2669 for (j = 0; j < XVECLEN (x, i); j++)
2670 reset_used_flags (XVECEXP (x, i, j));
2676 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2677 to look for shared sub-parts. */
2680 set_used_flags (rtx x)
2684 const char *format_ptr;
2689 code = GET_CODE (x);
2691 /* These types may be freely shared so we needn't do any resetting
2713 /* The chain of insns is not being copied. */
2720 RTX_FLAG (x, used) = 1;
2722 format_ptr = GET_RTX_FORMAT (code);
2723 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2725 switch (*format_ptr++)
2728 set_used_flags (XEXP (x, i));
2732 for (j = 0; j < XVECLEN (x, i); j++)
2733 set_used_flags (XVECEXP (x, i, j));
2739 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2740 Return X or the rtx for the pseudo reg the value of X was copied into.
2741 OTHER must be valid as a SET_DEST. */
2744 make_safe_from (rtx x, rtx other)
2747 switch (GET_CODE (other))
2750 other = SUBREG_REG (other);
2752 case STRICT_LOW_PART:
2755 other = XEXP (other, 0);
2761 if ((GET_CODE (other) == MEM
2763 && GET_CODE (x) != REG
2764 && GET_CODE (x) != SUBREG)
2765 || (GET_CODE (other) == REG
2766 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2767 || reg_mentioned_p (other, x))))
2769 rtx temp = gen_reg_rtx (GET_MODE (x));
2770 emit_move_insn (temp, x);
2776 /* Emission of insns (adding them to the doubly-linked list). */
2778 /* Return the first insn of the current sequence or current function. */
2786 /* Specify a new insn as the first in the chain. */
2789 set_first_insn (rtx insn)
2791 if (PREV_INSN (insn) != 0)
2796 /* Return the last insn emitted in current sequence or current function. */
2799 get_last_insn (void)
2804 /* Specify a new insn as the last in the chain. */
2807 set_last_insn (rtx insn)
2809 if (NEXT_INSN (insn) != 0)
2814 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2817 get_last_insn_anywhere (void)
2819 struct sequence_stack *stack;
2822 for (stack = seq_stack; stack; stack = stack->next)
2823 if (stack->last != 0)
2828 /* Return the first nonnote insn emitted in current sequence or current
2829 function. This routine looks inside SEQUENCEs. */
2832 get_first_nonnote_insn (void)
2834 rtx insn = first_insn;
2838 insn = next_insn (insn);
2839 if (insn == 0 || GET_CODE (insn) != NOTE)
2846 /* Return the last nonnote insn emitted in current sequence or current
2847 function. This routine looks inside SEQUENCEs. */
2850 get_last_nonnote_insn (void)
2852 rtx insn = last_insn;
2856 insn = previous_insn (insn);
2857 if (insn == 0 || GET_CODE (insn) != NOTE)
2864 /* Return a number larger than any instruction's uid in this function. */
2869 return cur_insn_uid;
2872 /* Renumber instructions so that no instruction UIDs are wasted. */
2875 renumber_insns (FILE *stream)
2879 /* If we're not supposed to renumber instructions, don't. */
2880 if (!flag_renumber_insns)
2883 /* If there aren't that many instructions, then it's not really
2884 worth renumbering them. */
2885 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2890 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2893 fprintf (stream, "Renumbering insn %d to %d\n",
2894 INSN_UID (insn), cur_insn_uid);
2895 INSN_UID (insn) = cur_insn_uid++;
2899 /* Return the next insn. If it is a SEQUENCE, return the first insn
2903 next_insn (rtx insn)
2907 insn = NEXT_INSN (insn);
2908 if (insn && GET_CODE (insn) == INSN
2909 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2910 insn = XVECEXP (PATTERN (insn), 0, 0);
2916 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2920 previous_insn (rtx insn)
2924 insn = PREV_INSN (insn);
2925 if (insn && GET_CODE (insn) == INSN
2926 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2927 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2933 /* Return the next insn after INSN that is not a NOTE. This routine does not
2934 look inside SEQUENCEs. */
2937 next_nonnote_insn (rtx insn)
2941 insn = NEXT_INSN (insn);
2942 if (insn == 0 || GET_CODE (insn) != NOTE)
2949 /* Return the previous insn before INSN that is not a NOTE. This routine does
2950 not look inside SEQUENCEs. */
2953 prev_nonnote_insn (rtx insn)
2957 insn = PREV_INSN (insn);
2958 if (insn == 0 || GET_CODE (insn) != NOTE)
2965 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2966 or 0, if there is none. This routine does not look inside
2970 next_real_insn (rtx insn)
2974 insn = NEXT_INSN (insn);
2975 if (insn == 0 || GET_CODE (insn) == INSN
2976 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2983 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2984 or 0, if there is none. This routine does not look inside
2988 prev_real_insn (rtx insn)
2992 insn = PREV_INSN (insn);
2993 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2994 || GET_CODE (insn) == JUMP_INSN)
3001 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3002 This routine does not look inside SEQUENCEs. */
3005 last_call_insn (void)
3009 for (insn = get_last_insn ();
3010 insn && GET_CODE (insn) != CALL_INSN;
3011 insn = PREV_INSN (insn))
3017 /* Find the next insn after INSN that really does something. This routine
3018 does not look inside SEQUENCEs. Until reload has completed, this is the
3019 same as next_real_insn. */
3022 active_insn_p (rtx insn)
3024 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3025 || (GET_CODE (insn) == INSN
3026 && (! reload_completed
3027 || (GET_CODE (PATTERN (insn)) != USE
3028 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3032 next_active_insn (rtx insn)
3036 insn = NEXT_INSN (insn);
3037 if (insn == 0 || active_insn_p (insn))
3044 /* Find the last insn before INSN that really does something. This routine
3045 does not look inside SEQUENCEs. Until reload has completed, this is the
3046 same as prev_real_insn. */
3049 prev_active_insn (rtx insn)
3053 insn = PREV_INSN (insn);
3054 if (insn == 0 || active_insn_p (insn))
3061 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3064 next_label (rtx insn)
3068 insn = NEXT_INSN (insn);
3069 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3076 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3079 prev_label (rtx insn)
3083 insn = PREV_INSN (insn);
3084 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3092 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3093 and REG_CC_USER notes so we can find it. */
3096 link_cc0_insns (rtx insn)
3098 rtx user = next_nonnote_insn (insn);
3100 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3101 user = XVECEXP (PATTERN (user), 0, 0);
3103 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3105 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3108 /* Return the next insn that uses CC0 after INSN, which is assumed to
3109 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3110 applied to the result of this function should yield INSN).
3112 Normally, this is simply the next insn. However, if a REG_CC_USER note
3113 is present, it contains the insn that uses CC0.
3115 Return 0 if we can't find the insn. */
3118 next_cc0_user (rtx insn)
3120 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3123 return XEXP (note, 0);
3125 insn = next_nonnote_insn (insn);
3126 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3127 insn = XVECEXP (PATTERN (insn), 0, 0);
3129 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3135 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3136 note, it is the previous insn. */
3139 prev_cc0_setter (rtx insn)
3141 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3144 return XEXP (note, 0);
3146 insn = prev_nonnote_insn (insn);
3147 if (! sets_cc0_p (PATTERN (insn)))
3154 /* Increment the label uses for all labels present in rtx. */
3157 mark_label_nuses (rtx x)
3163 code = GET_CODE (x);
3164 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3165 LABEL_NUSES (XEXP (x, 0))++;
3167 fmt = GET_RTX_FORMAT (code);
3168 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3171 mark_label_nuses (XEXP (x, i));
3172 else if (fmt[i] == 'E')
3173 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3174 mark_label_nuses (XVECEXP (x, i, j));
3179 /* Try splitting insns that can be split for better scheduling.
3180 PAT is the pattern which might split.
3181 TRIAL is the insn providing PAT.
3182 LAST is nonzero if we should return the last insn of the sequence produced.
3184 If this routine succeeds in splitting, it returns the first or last
3185 replacement insn depending on the value of LAST. Otherwise, it
3186 returns TRIAL. If the insn to be returned can be split, it will be. */
3189 try_split (rtx pat, rtx trial, int last)
3191 rtx before = PREV_INSN (trial);
3192 rtx after = NEXT_INSN (trial);
3193 int has_barrier = 0;
3197 rtx insn_last, insn;
3200 if (any_condjump_p (trial)
3201 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3202 split_branch_probability = INTVAL (XEXP (note, 0));
3203 probability = split_branch_probability;
3205 seq = split_insns (pat, trial);
3207 split_branch_probability = -1;
3209 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3210 We may need to handle this specially. */
3211 if (after && GET_CODE (after) == BARRIER)
3214 after = NEXT_INSN (after);
3220 /* Avoid infinite loop if any insn of the result matches
3221 the original pattern. */
3225 if (INSN_P (insn_last)
3226 && rtx_equal_p (PATTERN (insn_last), pat))
3228 if (!NEXT_INSN (insn_last))
3230 insn_last = NEXT_INSN (insn_last);
3234 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3236 if (GET_CODE (insn) == JUMP_INSN)
3238 mark_jump_label (PATTERN (insn), insn, 0);
3240 if (probability != -1
3241 && any_condjump_p (insn)
3242 && !find_reg_note (insn, REG_BR_PROB, 0))
3244 /* We can preserve the REG_BR_PROB notes only if exactly
3245 one jump is created, otherwise the machine description
3246 is responsible for this step using
3247 split_branch_probability variable. */
3251 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3252 GEN_INT (probability),
3258 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3259 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3260 if (GET_CODE (trial) == CALL_INSN)
3262 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3263 if (GET_CODE (insn) == CALL_INSN)
3265 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3268 *p = CALL_INSN_FUNCTION_USAGE (trial);
3269 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3273 /* Copy notes, particularly those related to the CFG. */
3274 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3276 switch (REG_NOTE_KIND (note))
3280 while (insn != NULL_RTX)
3282 if (GET_CODE (insn) == CALL_INSN
3283 || (flag_non_call_exceptions
3284 && may_trap_p (PATTERN (insn))))
3286 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3289 insn = PREV_INSN (insn);
3295 case REG_ALWAYS_RETURN:
3297 while (insn != NULL_RTX)
3299 if (GET_CODE (insn) == CALL_INSN)
3301 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3304 insn = PREV_INSN (insn);
3308 case REG_NON_LOCAL_GOTO:
3310 while (insn != NULL_RTX)
3312 if (GET_CODE (insn) == JUMP_INSN)
3314 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3317 insn = PREV_INSN (insn);
3326 /* If there are LABELS inside the split insns increment the
3327 usage count so we don't delete the label. */
3328 if (GET_CODE (trial) == INSN)
3331 while (insn != NULL_RTX)
3333 if (GET_CODE (insn) == INSN)
3334 mark_label_nuses (PATTERN (insn));
3336 insn = PREV_INSN (insn);
3340 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3342 delete_insn (trial);
3344 emit_barrier_after (tem);
3346 /* Recursively call try_split for each new insn created; by the
3347 time control returns here that insn will be fully split, so
3348 set LAST and continue from the insn after the one returned.
3349 We can't use next_active_insn here since AFTER may be a note.
3350 Ignore deleted insns, which can be occur if not optimizing. */
3351 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3352 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3353 tem = try_split (PATTERN (tem), tem, 1);
3355 /* Return either the first or the last insn, depending on which was
3358 ? (after ? PREV_INSN (after) : last_insn)
3359 : NEXT_INSN (before);
3362 /* Make and return an INSN rtx, initializing all its slots.
3363 Store PATTERN in the pattern slots. */
3366 make_insn_raw (rtx pattern)
3370 insn = rtx_alloc (INSN);
3372 INSN_UID (insn) = cur_insn_uid++;
3373 PATTERN (insn) = pattern;
3374 INSN_CODE (insn) = -1;
3375 LOG_LINKS (insn) = NULL;
3376 REG_NOTES (insn) = NULL;
3377 INSN_LOCATOR (insn) = 0;
3378 BLOCK_FOR_INSN (insn) = NULL;
3380 #ifdef ENABLE_RTL_CHECKING
3383 && (returnjump_p (insn)
3384 || (GET_CODE (insn) == SET
3385 && SET_DEST (insn) == pc_rtx)))
3387 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3395 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3398 make_jump_insn_raw (rtx pattern)
3402 insn = rtx_alloc (JUMP_INSN);
3403 INSN_UID (insn) = cur_insn_uid++;
3405 PATTERN (insn) = pattern;
3406 INSN_CODE (insn) = -1;
3407 LOG_LINKS (insn) = NULL;
3408 REG_NOTES (insn) = NULL;
3409 JUMP_LABEL (insn) = NULL;
3410 INSN_LOCATOR (insn) = 0;
3411 BLOCK_FOR_INSN (insn) = NULL;
3416 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3419 make_call_insn_raw (rtx pattern)
3423 insn = rtx_alloc (CALL_INSN);
3424 INSN_UID (insn) = cur_insn_uid++;
3426 PATTERN (insn) = pattern;
3427 INSN_CODE (insn) = -1;
3428 LOG_LINKS (insn) = NULL;
3429 REG_NOTES (insn) = NULL;
3430 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3431 INSN_LOCATOR (insn) = 0;
3432 BLOCK_FOR_INSN (insn) = NULL;
3437 /* Add INSN to the end of the doubly-linked list.
3438 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3443 PREV_INSN (insn) = last_insn;
3444 NEXT_INSN (insn) = 0;
3446 if (NULL != last_insn)
3447 NEXT_INSN (last_insn) = insn;
3449 if (NULL == first_insn)
3455 /* Add INSN into the doubly-linked list after insn AFTER. This and
3456 the next should be the only functions called to insert an insn once
3457 delay slots have been filled since only they know how to update a
3461 add_insn_after (rtx insn, rtx after)
3463 rtx next = NEXT_INSN (after);
3466 if (optimize && INSN_DELETED_P (after))
3469 NEXT_INSN (insn) = next;
3470 PREV_INSN (insn) = after;
3474 PREV_INSN (next) = insn;
3475 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3476 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3478 else if (last_insn == after)
3482 struct sequence_stack *stack = seq_stack;
3483 /* Scan all pending sequences too. */
3484 for (; stack; stack = stack->next)
3485 if (after == stack->last)
3495 if (GET_CODE (after) != BARRIER
3496 && GET_CODE (insn) != BARRIER
3497 && (bb = BLOCK_FOR_INSN (after)))
3499 set_block_for_insn (insn, bb);
3501 bb->flags |= BB_DIRTY;
3502 /* Should not happen as first in the BB is always
3503 either NOTE or LABEL. */
3504 if (BB_END (bb) == after
3505 /* Avoid clobbering of structure when creating new BB. */
3506 && GET_CODE (insn) != BARRIER
3507 && (GET_CODE (insn) != NOTE
3508 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3512 NEXT_INSN (after) = insn;
3513 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3515 rtx sequence = PATTERN (after);
3516 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3520 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3521 the previous should be the only functions called to insert an insn once
3522 delay slots have been filled since only they know how to update a
3526 add_insn_before (rtx insn, rtx before)
3528 rtx prev = PREV_INSN (before);
3531 if (optimize && INSN_DELETED_P (before))
3534 PREV_INSN (insn) = prev;
3535 NEXT_INSN (insn) = before;
3539 NEXT_INSN (prev) = insn;
3540 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3542 rtx sequence = PATTERN (prev);
3543 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3546 else if (first_insn == before)
3550 struct sequence_stack *stack = seq_stack;
3551 /* Scan all pending sequences too. */
3552 for (; stack; stack = stack->next)
3553 if (before == stack->first)
3555 stack->first = insn;
3563 if (GET_CODE (before) != BARRIER
3564 && GET_CODE (insn) != BARRIER
3565 && (bb = BLOCK_FOR_INSN (before)))
3567 set_block_for_insn (insn, bb);
3569 bb->flags |= BB_DIRTY;
3570 /* Should not happen as first in the BB is always
3571 either NOTE or LABEl. */
3572 if (BB_HEAD (bb) == insn
3573 /* Avoid clobbering of structure when creating new BB. */
3574 && GET_CODE (insn) != BARRIER
3575 && (GET_CODE (insn) != NOTE
3576 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3580 PREV_INSN (before) = insn;
3581 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3582 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3585 /* Remove an insn from its doubly-linked list. This function knows how
3586 to handle sequences. */
3588 remove_insn (rtx insn)
3590 rtx next = NEXT_INSN (insn);
3591 rtx prev = PREV_INSN (insn);
3596 NEXT_INSN (prev) = next;
3597 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3599 rtx sequence = PATTERN (prev);
3600 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3603 else if (first_insn == insn)
3607 struct sequence_stack *stack = seq_stack;
3608 /* Scan all pending sequences too. */
3609 for (; stack; stack = stack->next)
3610 if (insn == stack->first)
3612 stack->first = next;
3622 PREV_INSN (next) = prev;
3623 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3624 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3626 else if (last_insn == insn)
3630 struct sequence_stack *stack = seq_stack;
3631 /* Scan all pending sequences too. */
3632 for (; stack; stack = stack->next)
3633 if (insn == stack->last)
3642 if (GET_CODE (insn) != BARRIER
3643 && (bb = BLOCK_FOR_INSN (insn)))
3646 bb->flags |= BB_DIRTY;
3647 if (BB_HEAD (bb) == insn)
3649 /* Never ever delete the basic block note without deleting whole
3651 if (GET_CODE (insn) == NOTE)
3653 BB_HEAD (bb) = next;
3655 if (BB_END (bb) == insn)
3660 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3663 add_function_usage_to (rtx call_insn, rtx call_fusage)
3665 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3668 /* Put the register usage information on the CALL. If there is already
3669 some usage information, put ours at the end. */
3670 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3674 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3675 link = XEXP (link, 1))
3678 XEXP (link, 1) = call_fusage;
3681 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3684 /* Delete all insns made since FROM.
3685 FROM becomes the new last instruction. */
3688 delete_insns_since (rtx from)
3693 NEXT_INSN (from) = 0;
3697 /* This function is deprecated, please use sequences instead.
3699 Move a consecutive bunch of insns to a different place in the chain.
3700 The insns to be moved are those between FROM and TO.
3701 They are moved to a new position after the insn AFTER.
3702 AFTER must not be FROM or TO or any insn in between.
3704 This function does not know about SEQUENCEs and hence should not be
3705 called after delay-slot filling has been done. */
3708 reorder_insns_nobb (rtx from, rtx to, rtx after)
3710 /* Splice this bunch out of where it is now. */
3711 if (PREV_INSN (from))
3712 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3714 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3715 if (last_insn == to)
3716 last_insn = PREV_INSN (from);
3717 if (first_insn == from)
3718 first_insn = NEXT_INSN (to);
3720 /* Make the new neighbors point to it and it to them. */
3721 if (NEXT_INSN (after))
3722 PREV_INSN (NEXT_INSN (after)) = to;
3724 NEXT_INSN (to) = NEXT_INSN (after);
3725 PREV_INSN (from) = after;
3726 NEXT_INSN (after) = from;
3727 if (after == last_insn)
3731 /* Same as function above, but take care to update BB boundaries. */
3733 reorder_insns (rtx from, rtx to, rtx after)
3735 rtx prev = PREV_INSN (from);
3736 basic_block bb, bb2;
3738 reorder_insns_nobb (from, to, after);
3740 if (GET_CODE (after) != BARRIER
3741 && (bb = BLOCK_FOR_INSN (after)))
3744 bb->flags |= BB_DIRTY;
3746 if (GET_CODE (from) != BARRIER
3747 && (bb2 = BLOCK_FOR_INSN (from)))
3749 if (BB_END (bb2) == to)
3750 BB_END (bb2) = prev;
3751 bb2->flags |= BB_DIRTY;
3754 if (BB_END (bb) == after)
3757 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3758 set_block_for_insn (x, bb);
3762 /* Return the line note insn preceding INSN. */
3765 find_line_note (rtx insn)
3767 if (no_line_numbers)
3770 for (; insn; insn = PREV_INSN (insn))
3771 if (GET_CODE (insn) == NOTE
3772 && NOTE_LINE_NUMBER (insn) >= 0)
3778 /* Remove unnecessary notes from the instruction stream. */
3781 remove_unnecessary_notes (void)
3783 rtx block_stack = NULL_RTX;
3784 rtx eh_stack = NULL_RTX;
3789 /* We must not remove the first instruction in the function because
3790 the compiler depends on the first instruction being a note. */
3791 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3793 /* Remember what's next. */
3794 next = NEXT_INSN (insn);
3796 /* We're only interested in notes. */
3797 if (GET_CODE (insn) != NOTE)
3800 switch (NOTE_LINE_NUMBER (insn))
3802 case NOTE_INSN_DELETED:
3803 case NOTE_INSN_LOOP_END_TOP_COND:
3807 case NOTE_INSN_EH_REGION_BEG:
3808 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3811 case NOTE_INSN_EH_REGION_END:
3812 /* Too many end notes. */
3813 if (eh_stack == NULL_RTX)
3815 /* Mismatched nesting. */
3816 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3819 eh_stack = XEXP (eh_stack, 1);
3820 free_INSN_LIST_node (tmp);
3823 case NOTE_INSN_BLOCK_BEG:
3824 /* By now, all notes indicating lexical blocks should have
3825 NOTE_BLOCK filled in. */
3826 if (NOTE_BLOCK (insn) == NULL_TREE)
3828 block_stack = alloc_INSN_LIST (insn, block_stack);
3831 case NOTE_INSN_BLOCK_END:
3832 /* Too many end notes. */
3833 if (block_stack == NULL_RTX)
3835 /* Mismatched nesting. */
3836 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3839 block_stack = XEXP (block_stack, 1);
3840 free_INSN_LIST_node (tmp);
3842 /* Scan back to see if there are any non-note instructions
3843 between INSN and the beginning of this block. If not,
3844 then there is no PC range in the generated code that will
3845 actually be in this block, so there's no point in
3846 remembering the existence of the block. */
3847 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3849 /* This block contains a real instruction. Note that we
3850 don't include labels; if the only thing in the block
3851 is a label, then there are still no PC values that
3852 lie within the block. */
3856 /* We're only interested in NOTEs. */
3857 if (GET_CODE (tmp) != NOTE)
3860 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3862 /* We just verified that this BLOCK matches us with
3863 the block_stack check above. Never delete the
3864 BLOCK for the outermost scope of the function; we
3865 can refer to names from that scope even if the
3866 block notes are messed up. */
3867 if (! is_body_block (NOTE_BLOCK (insn))
3868 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3875 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3876 /* There's a nested block. We need to leave the
3877 current block in place since otherwise the debugger
3878 wouldn't be able to show symbols from our block in
3879 the nested block. */
3885 /* Too many begin notes. */
3886 if (block_stack || eh_stack)
3891 /* Emit insn(s) of given code and pattern
3892 at a specified place within the doubly-linked list.
3894 All of the emit_foo global entry points accept an object
3895 X which is either an insn list or a PATTERN of a single
3898 There are thus a few canonical ways to generate code and
3899 emit it at a specific place in the instruction stream. For
3900 example, consider the instruction named SPOT and the fact that
3901 we would like to emit some instructions before SPOT. We might
3905 ... emit the new instructions ...
3906 insns_head = get_insns ();
3909 emit_insn_before (insns_head, SPOT);
3911 It used to be common to generate SEQUENCE rtl instead, but that
3912 is a relic of the past which no longer occurs. The reason is that
3913 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3914 generated would almost certainly die right after it was created. */
3916 /* Make X be output before the instruction BEFORE. */
3919 emit_insn_before (rtx x, rtx before)
3924 #ifdef ENABLE_RTL_CHECKING
3925 if (before == NULL_RTX)
3932 switch (GET_CODE (x))
3943 rtx next = NEXT_INSN (insn);
3944 add_insn_before (insn, before);
3950 #ifdef ENABLE_RTL_CHECKING
3957 last = make_insn_raw (x);
3958 add_insn_before (last, before);
3965 /* Make an instruction with body X and code JUMP_INSN
3966 and output it before the instruction BEFORE. */
3969 emit_jump_insn_before (rtx x, rtx before)
3971 rtx insn, last = NULL_RTX;
3973 #ifdef ENABLE_RTL_CHECKING
3974 if (before == NULL_RTX)
3978 switch (GET_CODE (x))
3989 rtx next = NEXT_INSN (insn);
3990 add_insn_before (insn, before);
3996 #ifdef ENABLE_RTL_CHECKING
4003 last = make_jump_insn_raw (x);
4004 add_insn_before (last, before);
4011 /* Make an instruction with body X and code CALL_INSN
4012 and output it before the instruction BEFORE. */
4015 emit_call_insn_before (rtx x, rtx before)
4017 rtx last = NULL_RTX, insn;
4019 #ifdef ENABLE_RTL_CHECKING
4020 if (before == NULL_RTX)
4024 switch (GET_CODE (x))
4035 rtx next = NEXT_INSN (insn);
4036 add_insn_before (insn, before);
4042 #ifdef ENABLE_RTL_CHECKING
4049 last = make_call_insn_raw (x);
4050 add_insn_before (last, before);
4057 /* Make an insn of code BARRIER
4058 and output it before the insn BEFORE. */
4061 emit_barrier_before (rtx before)
4063 rtx insn = rtx_alloc (BARRIER);
4065 INSN_UID (insn) = cur_insn_uid++;
4067 add_insn_before (insn, before);
4071 /* Emit the label LABEL before the insn BEFORE. */
4074 emit_label_before (rtx label, rtx before)
4076 /* This can be called twice for the same label as a result of the
4077 confusion that follows a syntax error! So make it harmless. */
4078 if (INSN_UID (label) == 0)
4080 INSN_UID (label) = cur_insn_uid++;
4081 add_insn_before (label, before);
4087 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4090 emit_note_before (int subtype, rtx before)
4092 rtx note = rtx_alloc (NOTE);
4093 INSN_UID (note) = cur_insn_uid++;
4094 NOTE_SOURCE_FILE (note) = 0;
4095 NOTE_LINE_NUMBER (note) = subtype;
4096 BLOCK_FOR_INSN (note) = NULL;
4098 add_insn_before (note, before);
4102 /* Helper for emit_insn_after, handles lists of instructions
4105 static rtx emit_insn_after_1 (rtx, rtx);
4108 emit_insn_after_1 (rtx first, rtx after)
4114 if (GET_CODE (after) != BARRIER
4115 && (bb = BLOCK_FOR_INSN (after)))
4117 bb->flags |= BB_DIRTY;
4118 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4119 if (GET_CODE (last) != BARRIER)
4120 set_block_for_insn (last, bb);
4121 if (GET_CODE (last) != BARRIER)
4122 set_block_for_insn (last, bb);
4123 if (BB_END (bb) == after)
4127 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4130 after_after = NEXT_INSN (after);
4132 NEXT_INSN (after) = first;
4133 PREV_INSN (first) = after;
4134 NEXT_INSN (last) = after_after;
4136 PREV_INSN (after_after) = last;
4138 if (after == last_insn)
4143 /* Make X be output after the insn AFTER. */
4146 emit_insn_after (rtx x, rtx after)
4150 #ifdef ENABLE_RTL_CHECKING
4151 if (after == NULL_RTX)
4158 switch (GET_CODE (x))
4166 last = emit_insn_after_1 (x, after);
4169 #ifdef ENABLE_RTL_CHECKING
4176 last = make_insn_raw (x);
4177 add_insn_after (last, after);
4184 /* Similar to emit_insn_after, except that line notes are to be inserted so
4185 as to act as if this insn were at FROM. */
4188 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4190 rtx from_line = find_line_note (from);
4191 rtx after_line = find_line_note (after);
4192 rtx insn = emit_insn_after (x, after);
4195 emit_note_copy_after (from_line, after);
4198 emit_note_copy_after (after_line, insn);
4201 /* Make an insn of code JUMP_INSN with body X
4202 and output it after the insn AFTER. */
4205 emit_jump_insn_after (rtx x, rtx after)
4209 #ifdef ENABLE_RTL_CHECKING
4210 if (after == NULL_RTX)
4214 switch (GET_CODE (x))
4222 last = emit_insn_after_1 (x, after);
4225 #ifdef ENABLE_RTL_CHECKING
4232 last = make_jump_insn_raw (x);
4233 add_insn_after (last, after);
4240 /* Make an instruction with body X and code CALL_INSN
4241 and output it after the instruction AFTER. */
4244 emit_call_insn_after (rtx x, rtx after)
4248 #ifdef ENABLE_RTL_CHECKING
4249 if (after == NULL_RTX)
4253 switch (GET_CODE (x))
4261 last = emit_insn_after_1 (x, after);
4264 #ifdef ENABLE_RTL_CHECKING
4271 last = make_call_insn_raw (x);
4272 add_insn_after (last, after);
4279 /* Make an insn of code BARRIER
4280 and output it after the insn AFTER. */
4283 emit_barrier_after (rtx after)
4285 rtx insn = rtx_alloc (BARRIER);
4287 INSN_UID (insn) = cur_insn_uid++;
4289 add_insn_after (insn, after);
4293 /* Emit the label LABEL after the insn AFTER. */
4296 emit_label_after (rtx label, rtx after)
4298 /* This can be called twice for the same label
4299 as a result of the confusion that follows a syntax error!
4300 So make it harmless. */
4301 if (INSN_UID (label) == 0)
4303 INSN_UID (label) = cur_insn_uid++;
4304 add_insn_after (label, after);
4310 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4313 emit_note_after (int subtype, rtx after)
4315 rtx note = rtx_alloc (NOTE);
4316 INSN_UID (note) = cur_insn_uid++;
4317 NOTE_SOURCE_FILE (note) = 0;
4318 NOTE_LINE_NUMBER (note) = subtype;
4319 BLOCK_FOR_INSN (note) = NULL;
4320 add_insn_after (note, after);
4324 /* Emit a copy of note ORIG after the insn AFTER. */
4327 emit_note_copy_after (rtx orig, rtx after)
4331 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4337 note = rtx_alloc (NOTE);
4338 INSN_UID (note) = cur_insn_uid++;
4339 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4340 NOTE_DATA (note) = NOTE_DATA (orig);
4341 BLOCK_FOR_INSN (note) = NULL;
4342 add_insn_after (note, after);
4346 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4348 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4350 rtx last = emit_insn_after (pattern, after);
4352 if (pattern == NULL_RTX)
4355 after = NEXT_INSN (after);
4358 if (active_insn_p (after))
4359 INSN_LOCATOR (after) = loc;
4362 after = NEXT_INSN (after);
4367 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4369 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4371 rtx last = emit_jump_insn_after (pattern, after);
4373 if (pattern == NULL_RTX)
4376 after = NEXT_INSN (after);
4379 if (active_insn_p (after))
4380 INSN_LOCATOR (after) = loc;
4383 after = NEXT_INSN (after);
4388 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4390 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4392 rtx last = emit_call_insn_after (pattern, after);
4394 if (pattern == NULL_RTX)
4397 after = NEXT_INSN (after);
4400 if (active_insn_p (after))
4401 INSN_LOCATOR (after) = loc;
4404 after = NEXT_INSN (after);
4409 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4411 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4413 rtx first = PREV_INSN (before);
4414 rtx last = emit_insn_before (pattern, before);
4416 if (pattern == NULL_RTX)
4419 first = NEXT_INSN (first);
4422 if (active_insn_p (first))
4423 INSN_LOCATOR (first) = loc;
4426 first = NEXT_INSN (first);
4431 /* Take X and emit it at the end of the doubly-linked
4434 Returns the last insn emitted. */
4439 rtx last = last_insn;
4445 switch (GET_CODE (x))
4456 rtx next = NEXT_INSN (insn);
4463 #ifdef ENABLE_RTL_CHECKING
4470 last = make_insn_raw (x);
4478 /* Make an insn of code JUMP_INSN with pattern X
4479 and add it to the end of the doubly-linked list. */
4482 emit_jump_insn (rtx x)
4484 rtx last = NULL_RTX, insn;
4486 switch (GET_CODE (x))
4497 rtx next = NEXT_INSN (insn);
4504 #ifdef ENABLE_RTL_CHECKING
4511 last = make_jump_insn_raw (x);
4519 /* Make an insn of code CALL_INSN with pattern X
4520 and add it to the end of the doubly-linked list. */
4523 emit_call_insn (rtx x)
4527 switch (GET_CODE (x))
4535 insn = emit_insn (x);
4538 #ifdef ENABLE_RTL_CHECKING
4545 insn = make_call_insn_raw (x);
4553 /* Add the label LABEL to the end of the doubly-linked list. */
4556 emit_label (rtx label)
4558 /* This can be called twice for the same label
4559 as a result of the confusion that follows a syntax error!
4560 So make it harmless. */
4561 if (INSN_UID (label) == 0)
4563 INSN_UID (label) = cur_insn_uid++;
4569 /* Make an insn of code BARRIER
4570 and add it to the end of the doubly-linked list. */
4575 rtx barrier = rtx_alloc (BARRIER);
4576 INSN_UID (barrier) = cur_insn_uid++;
4581 /* Make line numbering NOTE insn for LOCATION add it to the end
4582 of the doubly-linked list, but only if line-numbers are desired for
4583 debugging info and it doesn't match the previous one. */
4586 emit_line_note (location_t location)
4590 set_file_and_line_for_stmt (location);
4592 if (location.file && last_location.file
4593 && !strcmp (location.file, last_location.file)
4594 && location.line == last_location.line)
4596 last_location = location;
4598 if (no_line_numbers)
4604 note = emit_note (location.line);
4605 NOTE_SOURCE_FILE (note) = location.file;
4610 /* Emit a copy of note ORIG. */
4613 emit_note_copy (rtx orig)
4617 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4623 note = rtx_alloc (NOTE);
4625 INSN_UID (note) = cur_insn_uid++;
4626 NOTE_DATA (note) = NOTE_DATA (orig);
4627 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4628 BLOCK_FOR_INSN (note) = NULL;
4634 /* Make an insn of code NOTE or type NOTE_NO
4635 and add it to the end of the doubly-linked list. */
4638 emit_note (int note_no)
4642 note = rtx_alloc (NOTE);
4643 INSN_UID (note) = cur_insn_uid++;
4644 NOTE_LINE_NUMBER (note) = note_no;
4645 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4646 BLOCK_FOR_INSN (note) = NULL;
4651 /* Cause next statement to emit a line note even if the line number
4655 force_next_line_note (void)
4657 last_location.line = -1;
4660 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4661 note of this type already exists, remove it first. */
4664 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4666 rtx note = find_reg_note (insn, kind, NULL_RTX);
4672 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4673 has multiple sets (some callers assume single_set
4674 means the insn only has one set, when in fact it
4675 means the insn only has one * useful * set). */
4676 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4683 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4684 It serves no useful purpose and breaks eliminate_regs. */
4685 if (GET_CODE (datum) == ASM_OPERANDS)
4695 XEXP (note, 0) = datum;
4699 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4700 return REG_NOTES (insn);
4703 /* Return an indication of which type of insn should have X as a body.
4704 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4707 classify_insn (rtx x)
4709 if (GET_CODE (x) == CODE_LABEL)
4711 if (GET_CODE (x) == CALL)
4713 if (GET_CODE (x) == RETURN)
4715 if (GET_CODE (x) == SET)
4717 if (SET_DEST (x) == pc_rtx)
4719 else if (GET_CODE (SET_SRC (x)) == CALL)
4724 if (GET_CODE (x) == PARALLEL)
4727 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4728 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4730 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4731 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4733 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4734 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4740 /* Emit the rtl pattern X as an appropriate kind of insn.
4741 If X is a label, it is simply added into the insn chain. */
4746 enum rtx_code code = classify_insn (x);
4748 if (code == CODE_LABEL)
4749 return emit_label (x);
4750 else if (code == INSN)
4751 return emit_insn (x);
4752 else if (code == JUMP_INSN)
4754 rtx insn = emit_jump_insn (x);
4755 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4756 return emit_barrier ();
4759 else if (code == CALL_INSN)
4760 return emit_call_insn (x);
4765 /* Space for free sequence stack entries. */
4766 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4768 /* Begin emitting insns to a sequence which can be packaged in an
4769 RTL_EXPR. If this sequence will contain something that might cause
4770 the compiler to pop arguments to function calls (because those
4771 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4772 details), use do_pending_stack_adjust before calling this function.
4773 That will ensure that the deferred pops are not accidentally
4774 emitted in the middle of this sequence. */
4777 start_sequence (void)
4779 struct sequence_stack *tem;
4781 if (free_sequence_stack != NULL)
4783 tem = free_sequence_stack;
4784 free_sequence_stack = tem->next;
4787 tem = ggc_alloc (sizeof (struct sequence_stack));
4789 tem->next = seq_stack;
4790 tem->first = first_insn;
4791 tem->last = last_insn;
4792 tem->sequence_rtl_expr = seq_rtl_expr;
4800 /* Similarly, but indicate that this sequence will be placed in T, an
4801 RTL_EXPR. See the documentation for start_sequence for more
4802 information about how to use this function. */
4805 start_sequence_for_rtl_expr (tree t)
4812 /* Set up the insn chain starting with FIRST as the current sequence,
4813 saving the previously current one. See the documentation for
4814 start_sequence for more information about how to use this function. */
4817 push_to_sequence (rtx first)
4823 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4829 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4832 push_to_full_sequence (rtx first, rtx last)
4837 /* We really should have the end of the insn chain here. */
4838 if (last && NEXT_INSN (last))
4842 /* Set up the outer-level insn chain
4843 as the current sequence, saving the previously current one. */
4846 push_topmost_sequence (void)
4848 struct sequence_stack *stack, *top = NULL;
4852 for (stack = seq_stack; stack; stack = stack->next)
4855 first_insn = top->first;
4856 last_insn = top->last;
4857 seq_rtl_expr = top->sequence_rtl_expr;
4860 /* After emitting to the outer-level insn chain, update the outer-level
4861 insn chain, and restore the previous saved state. */
4864 pop_topmost_sequence (void)
4866 struct sequence_stack *stack, *top = NULL;
4868 for (stack = seq_stack; stack; stack = stack->next)
4871 top->first = first_insn;
4872 top->last = last_insn;
4873 /* ??? Why don't we save seq_rtl_expr here? */
4878 /* After emitting to a sequence, restore previous saved state.
4880 To get the contents of the sequence just made, you must call
4881 `get_insns' *before* calling here.
4883 If the compiler might have deferred popping arguments while
4884 generating this sequence, and this sequence will not be immediately
4885 inserted into the instruction stream, use do_pending_stack_adjust
4886 before calling get_insns. That will ensure that the deferred
4887 pops are inserted into this sequence, and not into some random
4888 location in the instruction stream. See INHIBIT_DEFER_POP for more
4889 information about deferred popping of arguments. */
4894 struct sequence_stack *tem = seq_stack;
4896 first_insn = tem->first;
4897 last_insn = tem->last;
4898 seq_rtl_expr = tem->sequence_rtl_expr;
4899 seq_stack = tem->next;
4901 memset (tem, 0, sizeof (*tem));
4902 tem->next = free_sequence_stack;
4903 free_sequence_stack = tem;
4906 /* Return 1 if currently emitting into a sequence. */
4909 in_sequence_p (void)
4911 return seq_stack != 0;
4914 /* Put the various virtual registers into REGNO_REG_RTX. */
4917 init_virtual_regs (struct emit_status *es)
4919 rtx *ptr = es->x_regno_reg_rtx;
4920 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4921 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4922 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4923 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4924 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4928 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4929 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4930 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4931 static int copy_insn_n_scratches;
4933 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4934 copied an ASM_OPERANDS.
4935 In that case, it is the original input-operand vector. */
4936 static rtvec orig_asm_operands_vector;
4938 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4939 copied an ASM_OPERANDS.
4940 In that case, it is the copied input-operand vector. */
4941 static rtvec copy_asm_operands_vector;
4943 /* Likewise for the constraints vector. */
4944 static rtvec orig_asm_constraints_vector;
4945 static rtvec copy_asm_constraints_vector;
4947 /* Recursively create a new copy of an rtx for copy_insn.
4948 This function differs from copy_rtx in that it handles SCRATCHes and
4949 ASM_OPERANDs properly.
4950 Normally, this function is not used directly; use copy_insn as front end.
4951 However, you could first copy an insn pattern with copy_insn and then use
4952 this function afterwards to properly copy any REG_NOTEs containing
4956 copy_insn_1 (rtx orig)
4961 const char *format_ptr;
4963 code = GET_CODE (orig);
4979 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4984 for (i = 0; i < copy_insn_n_scratches; i++)
4985 if (copy_insn_scratch_in[i] == orig)
4986 return copy_insn_scratch_out[i];
4990 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4991 a LABEL_REF, it isn't sharable. */
4992 if (GET_CODE (XEXP (orig, 0)) == PLUS
4993 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4994 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4998 /* A MEM with a constant address is not sharable. The problem is that
4999 the constant address may need to be reloaded. If the mem is shared,
5000 then reloading one copy of this mem will cause all copies to appear
5001 to have been reloaded. */
5007 copy = rtx_alloc (code);
5009 /* Copy the various flags, and other information. We assume that
5010 all fields need copying, and then clear the fields that should
5011 not be copied. That is the sensible default behavior, and forces
5012 us to explicitly document why we are *not* copying a flag. */
5013 memcpy (copy, orig, RTX_HDR_SIZE);
5015 /* We do not copy the USED flag, which is used as a mark bit during
5016 walks over the RTL. */
5017 RTX_FLAG (copy, used) = 0;
5019 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5022 RTX_FLAG (copy, jump) = 0;
5023 RTX_FLAG (copy, call) = 0;
5024 RTX_FLAG (copy, frame_related) = 0;
5027 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5029 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5031 copy->u.fld[i] = orig->u.fld[i];
5032 switch (*format_ptr++)
5035 if (XEXP (orig, i) != NULL)
5036 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5041 if (XVEC (orig, i) == orig_asm_constraints_vector)
5042 XVEC (copy, i) = copy_asm_constraints_vector;
5043 else if (XVEC (orig, i) == orig_asm_operands_vector)
5044 XVEC (copy, i) = copy_asm_operands_vector;
5045 else if (XVEC (orig, i) != NULL)
5047 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5048 for (j = 0; j < XVECLEN (copy, i); j++)
5049 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5060 /* These are left unchanged. */
5068 if (code == SCRATCH)
5070 i = copy_insn_n_scratches++;
5071 if (i >= MAX_RECOG_OPERANDS)
5073 copy_insn_scratch_in[i] = orig;
5074 copy_insn_scratch_out[i] = copy;
5076 else if (code == ASM_OPERANDS)
5078 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5079 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5080 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5081 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5087 /* Create a new copy of an rtx.
5088 This function differs from copy_rtx in that it handles SCRATCHes and
5089 ASM_OPERANDs properly.
5090 INSN doesn't really have to be a full INSN; it could be just the
5093 copy_insn (rtx insn)
5095 copy_insn_n_scratches = 0;
5096 orig_asm_operands_vector = 0;
5097 orig_asm_constraints_vector = 0;
5098 copy_asm_operands_vector = 0;
5099 copy_asm_constraints_vector = 0;
5100 return copy_insn_1 (insn);
5103 /* Initialize data structures and variables in this file
5104 before generating rtl for each function. */
5109 struct function *f = cfun;
5111 f->emit = ggc_alloc (sizeof (struct emit_status));
5114 seq_rtl_expr = NULL;
5116 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5117 last_location.line = 0;
5118 last_location.file = 0;
5119 first_label_num = label_num;
5123 /* Init the tables that describe all the pseudo regs. */
5125 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5127 f->emit->regno_pointer_align
5128 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5129 * sizeof (unsigned char));
5132 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5134 /* Put copies of all the hard registers into regno_reg_rtx. */
5135 memcpy (regno_reg_rtx,
5136 static_regno_reg_rtx,
5137 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5139 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5140 init_virtual_regs (f->emit);
5142 /* Indicate that the virtual registers and stack locations are
5144 REG_POINTER (stack_pointer_rtx) = 1;
5145 REG_POINTER (frame_pointer_rtx) = 1;
5146 REG_POINTER (hard_frame_pointer_rtx) = 1;
5147 REG_POINTER (arg_pointer_rtx) = 1;
5149 REG_POINTER (virtual_incoming_args_rtx) = 1;
5150 REG_POINTER (virtual_stack_vars_rtx) = 1;
5151 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5152 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5153 REG_POINTER (virtual_cfa_rtx) = 1;
5155 #ifdef STACK_BOUNDARY
5156 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5157 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5158 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5159 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5161 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5162 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5163 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5164 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5165 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5168 #ifdef INIT_EXPANDERS
5173 /* Generate the constant 0. */
5176 gen_const_vector_0 (enum machine_mode mode)
5181 enum machine_mode inner;
5183 units = GET_MODE_NUNITS (mode);
5184 inner = GET_MODE_INNER (mode);
5186 v = rtvec_alloc (units);
5188 /* We need to call this function after we to set CONST0_RTX first. */
5189 if (!CONST0_RTX (inner))
5192 for (i = 0; i < units; ++i)
5193 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5195 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5199 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5200 all elements are zero. */
5202 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5204 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5207 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5208 if (RTVEC_ELT (v, i) != inner_zero)
5209 return gen_rtx_raw_CONST_VECTOR (mode, v);
5210 return CONST0_RTX (mode);
5213 /* Create some permanent unique rtl objects shared between all functions.
5214 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5217 init_emit_once (int line_numbers)
5220 enum machine_mode mode;
5221 enum machine_mode double_mode;
5223 /* We need reg_raw_mode, so initialize the modes now. */
5224 init_reg_modes_once ();
5226 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5228 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5229 const_int_htab_eq, NULL);
5231 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5232 const_double_htab_eq, NULL);
5234 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5235 mem_attrs_htab_eq, NULL);
5236 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5237 reg_attrs_htab_eq, NULL);
5239 no_line_numbers = ! line_numbers;
5241 /* Compute the word and byte modes. */
5243 byte_mode = VOIDmode;
5244 word_mode = VOIDmode;
5245 double_mode = VOIDmode;
5247 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5248 mode = GET_MODE_WIDER_MODE (mode))
5250 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5251 && byte_mode == VOIDmode)
5254 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5255 && word_mode == VOIDmode)
5259 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5260 mode = GET_MODE_WIDER_MODE (mode))
5262 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5263 && double_mode == VOIDmode)
5267 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5269 /* Assign register numbers to the globally defined register rtx.
5270 This must be done at runtime because the register number field
5271 is in a union and some compilers can't initialize unions. */
5273 pc_rtx = gen_rtx_PC (VOIDmode);
5274 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5275 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5276 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5277 if (hard_frame_pointer_rtx == 0)
5278 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5279 HARD_FRAME_POINTER_REGNUM);
5280 if (arg_pointer_rtx == 0)
5281 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5282 virtual_incoming_args_rtx =
5283 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5284 virtual_stack_vars_rtx =
5285 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5286 virtual_stack_dynamic_rtx =
5287 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5288 virtual_outgoing_args_rtx =
5289 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5290 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5292 /* Initialize RTL for commonly used hard registers. These are
5293 copied into regno_reg_rtx as we begin to compile each function. */
5294 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5295 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5297 #ifdef INIT_EXPANDERS
5298 /* This is to initialize {init|mark|free}_machine_status before the first
5299 call to push_function_context_to. This is needed by the Chill front
5300 end which calls push_function_context_to before the first call to
5301 init_function_start. */
5305 /* Create the unique rtx's for certain rtx codes and operand values. */
5307 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5308 tries to use these variables. */
5309 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5310 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5311 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5313 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5314 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5315 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5317 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5319 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5320 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5321 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5322 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5323 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5324 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5325 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5327 dconsthalf = dconst1;
5330 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5332 /* Initialize mathematical constants for constant folding builtins.
5333 These constants need to be given to at least 160 bits precision. */
5334 real_from_string (&dconstpi,
5335 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5336 real_from_string (&dconste,
5337 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5339 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5341 REAL_VALUE_TYPE *r =
5342 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5344 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5345 mode = GET_MODE_WIDER_MODE (mode))
5346 const_tiny_rtx[i][(int) mode] =
5347 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5349 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5351 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5352 mode = GET_MODE_WIDER_MODE (mode))
5353 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5355 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5357 mode = GET_MODE_WIDER_MODE (mode))
5358 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5361 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5363 mode = GET_MODE_WIDER_MODE (mode))
5364 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5366 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5368 mode = GET_MODE_WIDER_MODE (mode))
5369 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5371 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5372 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5373 const_tiny_rtx[0][i] = const0_rtx;
5375 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5376 if (STORE_FLAG_VALUE == 1)
5377 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5379 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5380 return_address_pointer_rtx
5381 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5384 #ifdef STATIC_CHAIN_REGNUM
5385 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5387 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5388 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5389 static_chain_incoming_rtx
5390 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5393 static_chain_incoming_rtx = static_chain_rtx;
5397 static_chain_rtx = STATIC_CHAIN;
5399 #ifdef STATIC_CHAIN_INCOMING
5400 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5402 static_chain_incoming_rtx = static_chain_rtx;
5406 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5407 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5410 /* Query and clear/ restore no_line_numbers. This is used by the
5411 switch / case handling in stmt.c to give proper line numbers in
5412 warnings about unreachable code. */
5415 force_line_numbers (void)
5417 int old = no_line_numbers;
5419 no_line_numbers = 0;
5421 force_next_line_note ();
5426 restore_line_number_status (int old_value)
5428 no_line_numbers = old_value;
5431 /* Produce exact duplicate of insn INSN after AFTER.
5432 Care updating of libcall regions if present. */
5435 emit_copy_of_insn_after (rtx insn, rtx after)
5438 rtx note1, note2, link;
5440 switch (GET_CODE (insn))
5443 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5447 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5451 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5452 if (CALL_INSN_FUNCTION_USAGE (insn))
5453 CALL_INSN_FUNCTION_USAGE (new)
5454 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5455 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5456 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5463 /* Update LABEL_NUSES. */
5464 mark_jump_label (PATTERN (new), new, 0);
5466 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5468 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5470 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5471 if (REG_NOTE_KIND (link) != REG_LABEL)
5473 if (GET_CODE (link) == EXPR_LIST)
5475 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5480 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5485 /* Fix the libcall sequences. */
5486 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5489 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5491 XEXP (note1, 0) = p;
5492 XEXP (note2, 0) = new;
5494 INSN_CODE (new) = INSN_CODE (insn);
5498 static GTY((deletable(""))) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5500 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5502 if (hard_reg_clobbers[mode][regno])
5503 return hard_reg_clobbers[mode][regno];
5505 return (hard_reg_clobbers[mode][regno] =
5506 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5509 #include "gt-emit-rtl.h"