1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
62 #include "tree-flow.h"
64 struct target_rtl default_target_rtl;
66 struct target_rtl *this_target_rtl = &default_target_rtl;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num = 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
106 REAL_VALUE_TYPE dconsthalf;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
110 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
117 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
119 /* A hash table storing CONST_INTs whose absolute value is greater
120 than MAX_SAVED_CONST_INT. */
122 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
123 htab_t const_int_htab;
125 /* A hash table storing memory attribute structures. */
126 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
127 htab_t mem_attrs_htab;
129 /* A hash table storing register attribute structures. */
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
131 htab_t reg_attrs_htab;
133 /* A hash table storing all CONST_DOUBLEs. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
135 htab_t const_double_htab;
137 /* A hash table storing all CONST_FIXEDs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
139 htab_t const_fixed_htab;
141 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
142 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
143 #define last_location (crtl->emit.x_last_location)
144 #define first_label_num (crtl->emit.x_first_label_num)
146 static rtx make_call_insn_raw (rtx);
147 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
148 static void set_used_decls (tree);
149 static void mark_label_nuses (rtx);
150 static hashval_t const_int_htab_hash (const void *);
151 static int const_int_htab_eq (const void *, const void *);
152 static hashval_t const_double_htab_hash (const void *);
153 static int const_double_htab_eq (const void *, const void *);
154 static rtx lookup_const_double (rtx);
155 static hashval_t const_fixed_htab_hash (const void *);
156 static int const_fixed_htab_eq (const void *, const void *);
157 static rtx lookup_const_fixed (rtx);
158 static hashval_t mem_attrs_htab_hash (const void *);
159 static int mem_attrs_htab_eq (const void *, const void *);
160 static hashval_t reg_attrs_htab_hash (const void *);
161 static int reg_attrs_htab_eq (const void *, const void *);
162 static reg_attrs *get_reg_attrs (tree, int);
163 static rtx gen_const_vector (enum machine_mode, int);
164 static void copy_rtx_if_shared_1 (rtx *orig);
166 /* Probability of the conditional branch currently proceeded by try_split.
167 Set to -1 otherwise. */
168 int split_branch_probability = -1;
170 /* Returns a hash code for X (which is a really a CONST_INT). */
173 const_int_htab_hash (const void *x)
175 return (hashval_t) INTVAL ((const_rtx) x);
178 /* Returns nonzero if the value represented by X (which is really a
179 CONST_INT) is the same as that given by Y (which is really a
183 const_int_htab_eq (const void *x, const void *y)
185 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
188 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
190 const_double_htab_hash (const void *x)
192 const_rtx const value = (const_rtx) x;
195 if (GET_MODE (value) == VOIDmode)
196 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
199 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
200 /* MODE is used in the comparison, so it should be in the hash. */
201 h ^= GET_MODE (value);
206 /* Returns nonzero if the value represented by X (really a ...)
207 is the same as that represented by Y (really a ...) */
209 const_double_htab_eq (const void *x, const void *y)
211 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
213 if (GET_MODE (a) != GET_MODE (b))
215 if (GET_MODE (a) == VOIDmode)
216 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
217 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
219 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
220 CONST_DOUBLE_REAL_VALUE (b));
223 /* Returns a hash code for X (which is really a CONST_FIXED). */
226 const_fixed_htab_hash (const void *x)
228 const_rtx const value = (const_rtx) x;
231 h = fixed_hash (CONST_FIXED_VALUE (value));
232 /* MODE is used in the comparison, so it should be in the hash. */
233 h ^= GET_MODE (value);
237 /* Returns nonzero if the value represented by X (really a ...)
238 is the same as that represented by Y (really a ...). */
241 const_fixed_htab_eq (const void *x, const void *y)
243 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
245 if (GET_MODE (a) != GET_MODE (b))
247 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
250 /* Returns a hash code for X (which is a really a mem_attrs *). */
253 mem_attrs_htab_hash (const void *x)
255 const mem_attrs *const p = (const mem_attrs *) x;
257 return (p->alias ^ (p->align * 1000)
258 ^ (p->addrspace * 4000)
259 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
260 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
261 ^ (size_t) iterative_hash_expr (p->expr, 0));
264 /* Return true if the given memory attributes are equal. */
267 mem_attrs_eq_p (const struct mem_attrs *p, const struct mem_attrs *q)
269 return (p->alias == q->alias && p->offset == q->offset
270 && p->size == q->size && p->align == q->align
271 && p->addrspace == q->addrspace
272 && (p->expr == q->expr
273 || (p->expr != NULL_TREE && q->expr != NULL_TREE
274 && operand_equal_p (p->expr, q->expr, 0))));
277 /* Returns nonzero if the value represented by X (which is really a
278 mem_attrs *) is the same as that given by Y (which is also really a
282 mem_attrs_htab_eq (const void *x, const void *y)
284 return mem_attrs_eq_p ((const mem_attrs *) x, (const mem_attrs *) y);
287 /* Set MEM's memory attributes so that they are the same as ATTRS. */
290 set_mem_attrs (rtx mem, mem_attrs *attrs)
294 /* If everything is the default, we can just clear the attributes. */
295 if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
301 slot = htab_find_slot (mem_attrs_htab, attrs, INSERT);
304 *slot = ggc_alloc_mem_attrs ();
305 memcpy (*slot, attrs, sizeof (mem_attrs));
308 MEM_ATTRS (mem) = (mem_attrs *) *slot;
311 /* Returns a hash code for X (which is a really a reg_attrs *). */
314 reg_attrs_htab_hash (const void *x)
316 const reg_attrs *const p = (const reg_attrs *) x;
318 return ((p->offset * 1000) ^ (intptr_t) p->decl);
321 /* Returns nonzero if the value represented by X (which is really a
322 reg_attrs *) is the same as that given by Y (which is also really a
326 reg_attrs_htab_eq (const void *x, const void *y)
328 const reg_attrs *const p = (const reg_attrs *) x;
329 const reg_attrs *const q = (const reg_attrs *) y;
331 return (p->decl == q->decl && p->offset == q->offset);
333 /* Allocate a new reg_attrs structure and insert it into the hash table if
334 one identical to it is not already in the table. We are doing this for
338 get_reg_attrs (tree decl, int offset)
343 /* If everything is the default, we can just return zero. */
344 if (decl == 0 && offset == 0)
348 attrs.offset = offset;
350 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
353 *slot = ggc_alloc_reg_attrs ();
354 memcpy (*slot, &attrs, sizeof (reg_attrs));
357 return (reg_attrs *) *slot;
362 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
368 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
369 MEM_VOLATILE_P (x) = true;
375 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
376 don't attempt to share with the various global pieces of rtl (such as
377 frame_pointer_rtx). */
380 gen_raw_REG (enum machine_mode mode, int regno)
382 rtx x = gen_rtx_raw_REG (mode, regno);
383 ORIGINAL_REGNO (x) = regno;
387 /* There are some RTL codes that require special attention; the generation
388 functions do the raw handling. If you add to this list, modify
389 special_rtx in gengenrtl.c as well. */
392 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
396 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
397 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
399 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
400 if (const_true_rtx && arg == STORE_FLAG_VALUE)
401 return const_true_rtx;
404 /* Look up the CONST_INT in the hash table. */
405 slot = htab_find_slot_with_hash (const_int_htab, &arg,
406 (hashval_t) arg, INSERT);
408 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
414 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
416 return GEN_INT (trunc_int_for_mode (c, mode));
419 /* CONST_DOUBLEs might be created from pairs of integers, or from
420 REAL_VALUE_TYPEs. Also, their length is known only at run time,
421 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
423 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
424 hash table. If so, return its counterpart; otherwise add it
425 to the hash table and return it. */
427 lookup_const_double (rtx real)
429 void **slot = htab_find_slot (const_double_htab, real, INSERT);
436 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
437 VALUE in mode MODE. */
439 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
441 rtx real = rtx_alloc (CONST_DOUBLE);
442 PUT_MODE (real, mode);
446 return lookup_const_double (real);
449 /* Determine whether FIXED, a CONST_FIXED, already exists in the
450 hash table. If so, return its counterpart; otherwise add it
451 to the hash table and return it. */
454 lookup_const_fixed (rtx fixed)
456 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
463 /* Return a CONST_FIXED rtx for a fixed-point value specified by
464 VALUE in mode MODE. */
467 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
469 rtx fixed = rtx_alloc (CONST_FIXED);
470 PUT_MODE (fixed, mode);
474 return lookup_const_fixed (fixed);
477 /* Constructs double_int from rtx CST. */
480 rtx_to_double_int (const_rtx cst)
484 if (CONST_INT_P (cst))
485 r = shwi_to_double_int (INTVAL (cst));
486 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
488 r.low = CONST_DOUBLE_LOW (cst);
489 r.high = CONST_DOUBLE_HIGH (cst);
498 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
502 immed_double_int_const (double_int i, enum machine_mode mode)
504 return immed_double_const (i.low, i.high, mode);
507 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
508 of ints: I0 is the low-order word and I1 is the high-order word.
509 Do not use this routine for non-integer modes; convert to
510 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
513 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
518 /* There are the following cases (note that there are no modes with
519 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
521 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
523 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
524 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
525 from copies of the sign bit, and sign of i0 and i1 are the same), then
526 we return a CONST_INT for i0.
527 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
528 if (mode != VOIDmode)
530 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
531 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
532 /* We can get a 0 for an error mark. */
533 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
534 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
536 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
537 return gen_int_mode (i0, mode);
539 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
542 /* If this integer fits in one word, return a CONST_INT. */
543 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
546 /* We use VOIDmode for integers. */
547 value = rtx_alloc (CONST_DOUBLE);
548 PUT_MODE (value, VOIDmode);
550 CONST_DOUBLE_LOW (value) = i0;
551 CONST_DOUBLE_HIGH (value) = i1;
553 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
554 XWINT (value, i) = 0;
556 return lookup_const_double (value);
560 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
562 /* In case the MD file explicitly references the frame pointer, have
563 all such references point to the same frame pointer. This is
564 used during frame pointer elimination to distinguish the explicit
565 references to these registers from pseudos that happened to be
568 If we have eliminated the frame pointer or arg pointer, we will
569 be using it as a normal register, for example as a spill
570 register. In such cases, we might be accessing it in a mode that
571 is not Pmode and therefore cannot use the pre-allocated rtx.
573 Also don't do this when we are making new REGs in reload, since
574 we don't want to get confused with the real pointers. */
576 if (mode == Pmode && !reload_in_progress)
578 if (regno == FRAME_POINTER_REGNUM
579 && (!reload_completed || frame_pointer_needed))
580 return frame_pointer_rtx;
581 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
582 if (regno == HARD_FRAME_POINTER_REGNUM
583 && (!reload_completed || frame_pointer_needed))
584 return hard_frame_pointer_rtx;
586 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
587 if (regno == ARG_POINTER_REGNUM)
588 return arg_pointer_rtx;
590 #ifdef RETURN_ADDRESS_POINTER_REGNUM
591 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
592 return return_address_pointer_rtx;
594 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
595 && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
596 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
597 return pic_offset_table_rtx;
598 if (regno == STACK_POINTER_REGNUM)
599 return stack_pointer_rtx;
603 /* If the per-function register table has been set up, try to re-use
604 an existing entry in that table to avoid useless generation of RTL.
606 This code is disabled for now until we can fix the various backends
607 which depend on having non-shared hard registers in some cases. Long
608 term we want to re-enable this code as it can significantly cut down
609 on the amount of useless RTL that gets generated.
611 We'll also need to fix some code that runs after reload that wants to
612 set ORIGINAL_REGNO. */
617 && regno < FIRST_PSEUDO_REGISTER
618 && reg_raw_mode[regno] == mode)
619 return regno_reg_rtx[regno];
622 return gen_raw_REG (mode, regno);
626 gen_rtx_MEM (enum machine_mode mode, rtx addr)
628 rtx rt = gen_rtx_raw_MEM (mode, addr);
630 /* This field is not cleared by the mere allocation of the rtx, so
637 /* Generate a memory referring to non-trapping constant memory. */
640 gen_const_mem (enum machine_mode mode, rtx addr)
642 rtx mem = gen_rtx_MEM (mode, addr);
643 MEM_READONLY_P (mem) = 1;
644 MEM_NOTRAP_P (mem) = 1;
648 /* Generate a MEM referring to fixed portions of the frame, e.g., register
652 gen_frame_mem (enum machine_mode mode, rtx addr)
654 rtx mem = gen_rtx_MEM (mode, addr);
655 MEM_NOTRAP_P (mem) = 1;
656 set_mem_alias_set (mem, get_frame_alias_set ());
660 /* Generate a MEM referring to a temporary use of the stack, not part
661 of the fixed stack frame. For example, something which is pushed
662 by a target splitter. */
664 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
666 rtx mem = gen_rtx_MEM (mode, addr);
667 MEM_NOTRAP_P (mem) = 1;
668 if (!cfun->calls_alloca)
669 set_mem_alias_set (mem, get_frame_alias_set ());
673 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
674 this construct would be valid, and false otherwise. */
677 validate_subreg (enum machine_mode omode, enum machine_mode imode,
678 const_rtx reg, unsigned int offset)
680 unsigned int isize = GET_MODE_SIZE (imode);
681 unsigned int osize = GET_MODE_SIZE (omode);
683 /* All subregs must be aligned. */
684 if (offset % osize != 0)
687 /* The subreg offset cannot be outside the inner object. */
691 /* ??? This should not be here. Temporarily continue to allow word_mode
692 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
693 Generally, backends are doing something sketchy but it'll take time to
695 if (omode == word_mode)
697 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
698 is the culprit here, and not the backends. */
699 else if (osize >= UNITS_PER_WORD && isize >= osize)
701 /* Allow component subregs of complex and vector. Though given the below
702 extraction rules, it's not always clear what that means. */
703 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
704 && GET_MODE_INNER (imode) == omode)
706 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
707 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
708 represent this. It's questionable if this ought to be represented at
709 all -- why can't this all be hidden in post-reload splitters that make
710 arbitrarily mode changes to the registers themselves. */
711 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
713 /* Subregs involving floating point modes are not allowed to
714 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
715 (subreg:SI (reg:DF) 0) isn't. */
716 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
722 /* Paradoxical subregs must have offset zero. */
726 /* This is a normal subreg. Verify that the offset is representable. */
728 /* For hard registers, we already have most of these rules collected in
729 subreg_offset_representable_p. */
730 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
732 unsigned int regno = REGNO (reg);
734 #ifdef CANNOT_CHANGE_MODE_CLASS
735 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
736 && GET_MODE_INNER (imode) == omode)
738 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
742 return subreg_offset_representable_p (regno, imode, offset, omode);
745 /* For pseudo registers, we want most of the same checks. Namely:
746 If the register no larger than a word, the subreg must be lowpart.
747 If the register is larger than a word, the subreg must be the lowpart
748 of a subword. A subreg does *not* perform arbitrary bit extraction.
749 Given that we've already checked mode/offset alignment, we only have
750 to check subword subregs here. */
751 if (osize < UNITS_PER_WORD)
753 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
754 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
755 if (offset % UNITS_PER_WORD != low_off)
762 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
764 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
765 return gen_rtx_raw_SUBREG (mode, reg, offset);
768 /* Generate a SUBREG representing the least-significant part of REG if MODE
769 is smaller than mode of REG, otherwise paradoxical SUBREG. */
772 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
774 enum machine_mode inmode;
776 inmode = GET_MODE (reg);
777 if (inmode == VOIDmode)
779 return gen_rtx_SUBREG (mode, reg,
780 subreg_lowpart_offset (mode, inmode));
784 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
787 gen_rtvec (int n, ...)
795 /* Don't allocate an empty rtvec... */
802 rt_val = rtvec_alloc (n);
804 for (i = 0; i < n; i++)
805 rt_val->elem[i] = va_arg (p, rtx);
812 gen_rtvec_v (int n, rtx *argp)
817 /* Don't allocate an empty rtvec... */
821 rt_val = rtvec_alloc (n);
823 for (i = 0; i < n; i++)
824 rt_val->elem[i] = *argp++;
829 /* Return the number of bytes between the start of an OUTER_MODE
830 in-memory value and the start of an INNER_MODE in-memory value,
831 given that the former is a lowpart of the latter. It may be a
832 paradoxical lowpart, in which case the offset will be negative
833 on big-endian targets. */
836 byte_lowpart_offset (enum machine_mode outer_mode,
837 enum machine_mode inner_mode)
839 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
840 return subreg_lowpart_offset (outer_mode, inner_mode);
842 return -subreg_lowpart_offset (inner_mode, outer_mode);
845 /* Generate a REG rtx for a new pseudo register of mode MODE.
846 This pseudo is assigned the next sequential register number. */
849 gen_reg_rtx (enum machine_mode mode)
852 unsigned int align = GET_MODE_ALIGNMENT (mode);
854 gcc_assert (can_create_pseudo_p ());
856 /* If a virtual register with bigger mode alignment is generated,
857 increase stack alignment estimation because it might be spilled
859 if (SUPPORTS_STACK_ALIGNMENT
860 && crtl->stack_alignment_estimated < align
861 && !crtl->stack_realign_processed)
863 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
864 if (crtl->stack_alignment_estimated < min_align)
865 crtl->stack_alignment_estimated = min_align;
868 if (generating_concat_p
869 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
870 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
872 /* For complex modes, don't make a single pseudo.
873 Instead, make a CONCAT of two pseudos.
874 This allows noncontiguous allocation of the real and imaginary parts,
875 which makes much better code. Besides, allocating DCmode
876 pseudos overstrains reload on some machines like the 386. */
877 rtx realpart, imagpart;
878 enum machine_mode partmode = GET_MODE_INNER (mode);
880 realpart = gen_reg_rtx (partmode);
881 imagpart = gen_reg_rtx (partmode);
882 return gen_rtx_CONCAT (mode, realpart, imagpart);
885 /* Make sure regno_pointer_align, and regno_reg_rtx are large
886 enough to have an element for this pseudo reg number. */
888 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
890 int old_size = crtl->emit.regno_pointer_align_length;
894 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
895 memset (tmp + old_size, 0, old_size);
896 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
898 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
899 memset (new1 + old_size, 0, old_size * sizeof (rtx));
900 regno_reg_rtx = new1;
902 crtl->emit.regno_pointer_align_length = old_size * 2;
905 val = gen_raw_REG (mode, reg_rtx_no);
906 regno_reg_rtx[reg_rtx_no++] = val;
910 /* Update NEW with the same attributes as REG, but with OFFSET added
911 to the REG_OFFSET. */
914 update_reg_offset (rtx new_rtx, rtx reg, int offset)
916 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
917 REG_OFFSET (reg) + offset);
920 /* Generate a register with same attributes as REG, but with OFFSET
921 added to the REG_OFFSET. */
924 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
927 rtx new_rtx = gen_rtx_REG (mode, regno);
929 update_reg_offset (new_rtx, reg, offset);
933 /* Generate a new pseudo-register with the same attributes as REG, but
934 with OFFSET added to the REG_OFFSET. */
937 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
939 rtx new_rtx = gen_reg_rtx (mode);
941 update_reg_offset (new_rtx, reg, offset);
945 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
946 new register is a (possibly paradoxical) lowpart of the old one. */
949 adjust_reg_mode (rtx reg, enum machine_mode mode)
951 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
952 PUT_MODE (reg, mode);
955 /* Copy REG's attributes from X, if X has any attributes. If REG and X
956 have different modes, REG is a (possibly paradoxical) lowpart of X. */
959 set_reg_attrs_from_value (rtx reg, rtx x)
963 /* Hard registers can be reused for multiple purposes within the same
964 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
966 if (HARD_REGISTER_P (reg))
969 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
972 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
974 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
976 mark_reg_pointer (reg, 0);
981 update_reg_offset (reg, x, offset);
983 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
987 /* Generate a REG rtx for a new pseudo register, copying the mode
988 and attributes from X. */
991 gen_reg_rtx_and_attrs (rtx x)
993 rtx reg = gen_reg_rtx (GET_MODE (x));
994 set_reg_attrs_from_value (reg, x);
998 /* Set the register attributes for registers contained in PARM_RTX.
999 Use needed values from memory attributes of MEM. */
1002 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1004 if (REG_P (parm_rtx))
1005 set_reg_attrs_from_value (parm_rtx, mem);
1006 else if (GET_CODE (parm_rtx) == PARALLEL)
1008 /* Check for a NULL entry in the first slot, used to indicate that the
1009 parameter goes both on the stack and in registers. */
1010 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1011 for (; i < XVECLEN (parm_rtx, 0); i++)
1013 rtx x = XVECEXP (parm_rtx, 0, i);
1014 if (REG_P (XEXP (x, 0)))
1015 REG_ATTRS (XEXP (x, 0))
1016 = get_reg_attrs (MEM_EXPR (mem),
1017 INTVAL (XEXP (x, 1)));
1022 /* Set the REG_ATTRS for registers in value X, given that X represents
1026 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1028 if (GET_CODE (x) == SUBREG)
1030 gcc_assert (subreg_lowpart_p (x));
1035 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1037 if (GET_CODE (x) == CONCAT)
1039 if (REG_P (XEXP (x, 0)))
1040 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1041 if (REG_P (XEXP (x, 1)))
1042 REG_ATTRS (XEXP (x, 1))
1043 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1045 if (GET_CODE (x) == PARALLEL)
1049 /* Check for a NULL entry, used to indicate that the parameter goes
1050 both on the stack and in registers. */
1051 if (XEXP (XVECEXP (x, 0, 0), 0))
1056 for (i = start; i < XVECLEN (x, 0); i++)
1058 rtx y = XVECEXP (x, 0, i);
1059 if (REG_P (XEXP (y, 0)))
1060 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1065 /* Assign the RTX X to declaration T. */
1068 set_decl_rtl (tree t, rtx x)
1070 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1072 set_reg_attrs_for_decl_rtl (t, x);
1075 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1076 if the ABI requires the parameter to be passed by reference. */
1079 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1081 DECL_INCOMING_RTL (t) = x;
1082 if (x && !by_reference_p)
1083 set_reg_attrs_for_decl_rtl (t, x);
1086 /* Identify REG (which may be a CONCAT) as a user register. */
1089 mark_user_reg (rtx reg)
1091 if (GET_CODE (reg) == CONCAT)
1093 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1094 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1098 gcc_assert (REG_P (reg));
1099 REG_USERVAR_P (reg) = 1;
1103 /* Identify REG as a probable pointer register and show its alignment
1104 as ALIGN, if nonzero. */
1107 mark_reg_pointer (rtx reg, int align)
1109 if (! REG_POINTER (reg))
1111 REG_POINTER (reg) = 1;
1114 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1116 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1117 /* We can no-longer be sure just how aligned this pointer is. */
1118 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1121 /* Return 1 plus largest pseudo reg number used in the current function. */
1129 /* Return 1 + the largest label number used so far in the current function. */
1132 max_label_num (void)
1137 /* Return first label number used in this function (if any were used). */
1140 get_first_label_num (void)
1142 return first_label_num;
1145 /* If the rtx for label was created during the expansion of a nested
1146 function, then first_label_num won't include this label number.
1147 Fix this now so that array indices work later. */
1150 maybe_set_first_label_num (rtx x)
1152 if (CODE_LABEL_NUMBER (x) < first_label_num)
1153 first_label_num = CODE_LABEL_NUMBER (x);
1156 /* Return a value representing some low-order bits of X, where the number
1157 of low-order bits is given by MODE. Note that no conversion is done
1158 between floating-point and fixed-point values, rather, the bit
1159 representation is returned.
1161 This function handles the cases in common between gen_lowpart, below,
1162 and two variants in cse.c and combine.c. These are the cases that can
1163 be safely handled at all points in the compilation.
1165 If this is not a case we can handle, return 0. */
1168 gen_lowpart_common (enum machine_mode mode, rtx x)
1170 int msize = GET_MODE_SIZE (mode);
1173 enum machine_mode innermode;
1175 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1176 so we have to make one up. Yuk. */
1177 innermode = GET_MODE (x);
1179 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1180 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1181 else if (innermode == VOIDmode)
1182 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1184 xsize = GET_MODE_SIZE (innermode);
1186 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1188 if (innermode == mode)
1191 /* MODE must occupy no more words than the mode of X. */
1192 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1193 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1196 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1197 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1200 offset = subreg_lowpart_offset (mode, innermode);
1202 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1203 && (GET_MODE_CLASS (mode) == MODE_INT
1204 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1206 /* If we are getting the low-order part of something that has been
1207 sign- or zero-extended, we can either just use the object being
1208 extended or make a narrower extension. If we want an even smaller
1209 piece than the size of the object being extended, call ourselves
1212 This case is used mostly by combine and cse. */
1214 if (GET_MODE (XEXP (x, 0)) == mode)
1216 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1217 return gen_lowpart_common (mode, XEXP (x, 0));
1218 else if (msize < xsize)
1219 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1221 else if (GET_CODE (x) == SUBREG || REG_P (x)
1222 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1223 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1224 return simplify_gen_subreg (mode, x, innermode, offset);
1226 /* Otherwise, we can't do this. */
1231 gen_highpart (enum machine_mode mode, rtx x)
1233 unsigned int msize = GET_MODE_SIZE (mode);
1236 /* This case loses if X is a subreg. To catch bugs early,
1237 complain if an invalid MODE is used even in other cases. */
1238 gcc_assert (msize <= UNITS_PER_WORD
1239 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1241 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1242 subreg_highpart_offset (mode, GET_MODE (x)));
1243 gcc_assert (result);
1245 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1246 the target if we have a MEM. gen_highpart must return a valid operand,
1247 emitting code if necessary to do so. */
1250 result = validize_mem (result);
1251 gcc_assert (result);
1257 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1258 be VOIDmode constant. */
1260 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1262 if (GET_MODE (exp) != VOIDmode)
1264 gcc_assert (GET_MODE (exp) == innermode);
1265 return gen_highpart (outermode, exp);
1267 return simplify_gen_subreg (outermode, exp, innermode,
1268 subreg_highpart_offset (outermode, innermode));
1271 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1274 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1276 unsigned int offset = 0;
1277 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1281 if (WORDS_BIG_ENDIAN)
1282 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1283 if (BYTES_BIG_ENDIAN)
1284 offset += difference % UNITS_PER_WORD;
1290 /* Return offset in bytes to get OUTERMODE high part
1291 of the value in mode INNERMODE stored in memory in target format. */
1293 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1295 unsigned int offset = 0;
1296 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1298 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1302 if (! WORDS_BIG_ENDIAN)
1303 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1304 if (! BYTES_BIG_ENDIAN)
1305 offset += difference % UNITS_PER_WORD;
1311 /* Return 1 iff X, assumed to be a SUBREG,
1312 refers to the least significant part of its containing reg.
1313 If X is not a SUBREG, always return 1 (it is its own low part!). */
1316 subreg_lowpart_p (const_rtx x)
1318 if (GET_CODE (x) != SUBREG)
1320 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1323 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1324 == SUBREG_BYTE (x));
1327 /* Return true if X is a paradoxical subreg, false otherwise. */
1329 paradoxical_subreg_p (const_rtx x)
1331 if (GET_CODE (x) != SUBREG)
1333 return (GET_MODE_PRECISION (GET_MODE (x))
1334 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x))));
1337 /* Return subword OFFSET of operand OP.
1338 The word number, OFFSET, is interpreted as the word number starting
1339 at the low-order address. OFFSET 0 is the low-order word if not
1340 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1342 If we cannot extract the required word, we return zero. Otherwise,
1343 an rtx corresponding to the requested word will be returned.
1345 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1346 reload has completed, a valid address will always be returned. After
1347 reload, if a valid address cannot be returned, we return zero.
1349 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1350 it is the responsibility of the caller.
1352 MODE is the mode of OP in case it is a CONST_INT.
1354 ??? This is still rather broken for some cases. The problem for the
1355 moment is that all callers of this thing provide no 'goal mode' to
1356 tell us to work with. This exists because all callers were written
1357 in a word based SUBREG world.
1358 Now use of this function can be deprecated by simplify_subreg in most
1363 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1365 if (mode == VOIDmode)
1366 mode = GET_MODE (op);
1368 gcc_assert (mode != VOIDmode);
1370 /* If OP is narrower than a word, fail. */
1372 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1375 /* If we want a word outside OP, return zero. */
1377 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1380 /* Form a new MEM at the requested address. */
1383 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1385 if (! validate_address)
1388 else if (reload_completed)
1390 if (! strict_memory_address_addr_space_p (word_mode,
1392 MEM_ADDR_SPACE (op)))
1396 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1399 /* Rest can be handled by simplify_subreg. */
1400 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1403 /* Similar to `operand_subword', but never return 0. If we can't
1404 extract the required subword, put OP into a register and try again.
1405 The second attempt must succeed. We always validate the address in
1408 MODE is the mode of OP, in case it is CONST_INT. */
1411 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1413 rtx result = operand_subword (op, offset, 1, mode);
1418 if (mode != BLKmode && mode != VOIDmode)
1420 /* If this is a register which can not be accessed by words, copy it
1421 to a pseudo register. */
1423 op = copy_to_reg (op);
1425 op = force_reg (mode, op);
1428 result = operand_subword (op, offset, 1, mode);
1429 gcc_assert (result);
1434 /* Returns 1 if both MEM_EXPR can be considered equal
1438 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1443 if (! expr1 || ! expr2)
1446 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1449 return operand_equal_p (expr1, expr2, 0);
1452 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1453 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1457 get_mem_align_offset (rtx mem, unsigned int align)
1460 unsigned HOST_WIDE_INT offset;
1462 /* This function can't use
1463 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1464 || !CONST_INT_P (MEM_OFFSET (mem))
1465 || (MAX (MEM_ALIGN (mem),
1466 get_object_alignment (MEM_EXPR (mem), align))
1470 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1472 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1473 for <variable>. get_inner_reference doesn't handle it and
1474 even if it did, the alignment in that case needs to be determined
1475 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1476 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1477 isn't sufficiently aligned, the object it is in might be. */
1478 gcc_assert (MEM_P (mem));
1479 expr = MEM_EXPR (mem);
1480 if (expr == NULL_TREE
1481 || MEM_OFFSET (mem) == NULL_RTX
1482 || !CONST_INT_P (MEM_OFFSET (mem)))
1485 offset = INTVAL (MEM_OFFSET (mem));
1488 if (DECL_ALIGN (expr) < align)
1491 else if (INDIRECT_REF_P (expr))
1493 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1496 else if (TREE_CODE (expr) == COMPONENT_REF)
1500 tree inner = TREE_OPERAND (expr, 0);
1501 tree field = TREE_OPERAND (expr, 1);
1502 tree byte_offset = component_ref_field_offset (expr);
1503 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1506 || !host_integerp (byte_offset, 1)
1507 || !host_integerp (bit_offset, 1))
1510 offset += tree_low_cst (byte_offset, 1);
1511 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1513 if (inner == NULL_TREE)
1515 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1516 < (unsigned int) align)
1520 else if (DECL_P (inner))
1522 if (DECL_ALIGN (inner) < align)
1526 else if (TREE_CODE (inner) != COMPONENT_REF)
1534 return offset & ((align / BITS_PER_UNIT) - 1);
1537 /* Given REF (a MEM) and T, either the type of X or the expression
1538 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1539 if we are making a new object of this type. BITPOS is nonzero if
1540 there is an offset outstanding on T that will be applied later. */
1543 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1544 HOST_WIDE_INT bitpos)
1546 HOST_WIDE_INT apply_bitpos = 0;
1548 struct mem_attrs attrs, *defattrs, *refattrs;
1550 /* It can happen that type_for_mode was given a mode for which there
1551 is no language-level type. In which case it returns NULL, which
1556 type = TYPE_P (t) ? t : TREE_TYPE (t);
1557 if (type == error_mark_node)
1560 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1561 wrong answer, as it assumes that DECL_RTL already has the right alias
1562 info. Callers should not set DECL_RTL until after the call to
1563 set_mem_attributes. */
1564 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1566 memset (&attrs, 0, sizeof (attrs));
1568 /* Get the alias set from the expression or type (perhaps using a
1569 front-end routine) and use it. */
1570 attrs.alias = get_alias_set (t);
1572 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1573 MEM_IN_STRUCT_P (ref)
1574 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1575 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1577 /* If we are making an object of this type, or if this is a DECL, we know
1578 that it is a scalar if the type is not an aggregate. */
1579 if ((objectp || DECL_P (t))
1580 && ! AGGREGATE_TYPE_P (type)
1581 && TREE_CODE (type) != COMPLEX_TYPE)
1582 MEM_SCALAR_P (ref) = 1;
1584 /* Default values from pre-existing memory attributes if present. */
1585 refattrs = MEM_ATTRS (ref);
1588 /* ??? Can this ever happen? Calling this routine on a MEM that
1589 already carries memory attributes should probably be invalid. */
1590 attrs.expr = refattrs->expr;
1591 attrs.offset = refattrs->offset;
1592 attrs.size = refattrs->size;
1593 attrs.align = refattrs->align;
1596 /* Otherwise, default values from the mode of the MEM reference. */
1599 defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
1600 gcc_assert (!defattrs->expr);
1601 gcc_assert (!defattrs->offset);
1603 /* Respect mode size. */
1604 attrs.size = defattrs->size;
1605 /* ??? Is this really necessary? We probably should always get
1606 the size from the type below. */
1608 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1609 if T is an object, always compute the object alignment below. */
1611 attrs.align = defattrs->align;
1613 attrs.align = BITS_PER_UNIT;
1614 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1615 e.g. if the type carries an alignment attribute. Should we be
1616 able to simply always use TYPE_ALIGN? */
1619 /* We can set the alignment from the type if we are making an object,
1620 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1621 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1622 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1624 else if (TREE_CODE (t) == MEM_REF)
1626 tree op0 = TREE_OPERAND (t, 0);
1627 if (TREE_CODE (op0) == ADDR_EXPR
1628 && (DECL_P (TREE_OPERAND (op0, 0))
1629 || CONSTANT_CLASS_P (TREE_OPERAND (op0, 0))))
1631 if (DECL_P (TREE_OPERAND (op0, 0)))
1632 attrs.align = DECL_ALIGN (TREE_OPERAND (op0, 0));
1633 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0)))
1635 attrs.align = TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0, 0)));
1636 #ifdef CONSTANT_ALIGNMENT
1637 attrs.align = CONSTANT_ALIGNMENT (TREE_OPERAND (op0, 0),
1641 if (TREE_INT_CST_LOW (TREE_OPERAND (t, 1)) != 0)
1643 unsigned HOST_WIDE_INT ioff
1644 = TREE_INT_CST_LOW (TREE_OPERAND (t, 1));
1645 unsigned HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1646 attrs.align = MIN (aoff, attrs.align);
1650 /* ??? This isn't fully correct, we can't set the alignment from the
1651 type in all cases. */
1652 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1655 else if (TREE_CODE (t) == TARGET_MEM_REF)
1656 /* ??? This isn't fully correct, we can't set the alignment from the
1657 type in all cases. */
1658 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1660 /* If the size is known, we can set that. */
1661 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1662 attrs.size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1664 /* If T is not a type, we may be able to deduce some more information about
1669 bool align_computed = false;
1671 if (TREE_THIS_VOLATILE (t))
1672 MEM_VOLATILE_P (ref) = 1;
1674 /* Now remove any conversions: they don't change what the underlying
1675 object is. Likewise for SAVE_EXPR. */
1676 while (CONVERT_EXPR_P (t)
1677 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1678 || TREE_CODE (t) == SAVE_EXPR)
1679 t = TREE_OPERAND (t, 0);
1681 /* Note whether this expression can trap. */
1682 MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
1684 base = get_base_address (t);
1685 if (base && DECL_P (base)
1686 && TREE_READONLY (base)
1687 && (TREE_STATIC (base) || DECL_EXTERNAL (base))
1688 && !TREE_THIS_VOLATILE (base))
1689 MEM_READONLY_P (ref) = 1;
1691 /* If this expression uses it's parent's alias set, mark it such
1692 that we won't change it. */
1693 if (component_uses_parent_alias_set (t))
1694 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1696 /* If this is a decl, set the attributes of the MEM from it. */
1700 attrs.offset = const0_rtx;
1701 apply_bitpos = bitpos;
1702 attrs.size = (DECL_SIZE_UNIT (t)
1703 && host_integerp (DECL_SIZE_UNIT (t), 1)
1704 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1705 attrs.align = DECL_ALIGN (t);
1706 align_computed = true;
1709 /* If this is a constant, we know the alignment. */
1710 else if (CONSTANT_CLASS_P (t))
1712 attrs.align = TYPE_ALIGN (type);
1713 #ifdef CONSTANT_ALIGNMENT
1714 attrs.align = CONSTANT_ALIGNMENT (t, attrs.align);
1716 align_computed = true;
1719 /* If this is a field reference and not a bit-field, record it. */
1720 /* ??? There is some information that can be gleaned from bit-fields,
1721 such as the word offset in the structure that might be modified.
1722 But skip it for now. */
1723 else if (TREE_CODE (t) == COMPONENT_REF
1724 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1727 attrs.offset = const0_rtx;
1728 apply_bitpos = bitpos;
1729 /* ??? Any reason the field size would be different than
1730 the size we got from the type? */
1733 /* If this is an array reference, look for an outer field reference. */
1734 else if (TREE_CODE (t) == ARRAY_REF)
1736 tree off_tree = size_zero_node;
1737 /* We can't modify t, because we use it at the end of the
1743 tree index = TREE_OPERAND (t2, 1);
1744 tree low_bound = array_ref_low_bound (t2);
1745 tree unit_size = array_ref_element_size (t2);
1747 /* We assume all arrays have sizes that are a multiple of a byte.
1748 First subtract the lower bound, if any, in the type of the
1749 index, then convert to sizetype and multiply by the size of
1750 the array element. */
1751 if (! integer_zerop (low_bound))
1752 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1755 off_tree = size_binop (PLUS_EXPR,
1756 size_binop (MULT_EXPR,
1757 fold_convert (sizetype,
1761 t2 = TREE_OPERAND (t2, 0);
1763 while (TREE_CODE (t2) == ARRAY_REF);
1768 attrs.offset = NULL;
1769 if (host_integerp (off_tree, 1))
1771 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1772 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1773 attrs.align = DECL_ALIGN (t2);
1774 if (aoff && (unsigned HOST_WIDE_INT) aoff < attrs.align)
1776 align_computed = true;
1777 attrs.offset = GEN_INT (ioff);
1778 apply_bitpos = bitpos;
1781 else if (TREE_CODE (t2) == COMPONENT_REF)
1784 attrs.offset = NULL;
1785 if (host_integerp (off_tree, 1))
1787 attrs.offset = GEN_INT (tree_low_cst (off_tree, 1));
1788 apply_bitpos = bitpos;
1790 /* ??? Any reason the field size would be different than
1791 the size we got from the type? */
1794 /* If this is an indirect reference, record it. */
1795 else if (TREE_CODE (t) == MEM_REF)
1798 attrs.offset = const0_rtx;
1799 apply_bitpos = bitpos;
1803 /* If this is an indirect reference, record it. */
1804 else if (TREE_CODE (t) == MEM_REF
1805 || TREE_CODE (t) == TARGET_MEM_REF)
1808 attrs.offset = const0_rtx;
1809 apply_bitpos = bitpos;
1812 if (!align_computed && !INDIRECT_REF_P (t))
1814 unsigned int obj_align = get_object_alignment (t, BIGGEST_ALIGNMENT);
1815 attrs.align = MAX (attrs.align, obj_align);
1819 /* If we modified OFFSET based on T, then subtract the outstanding
1820 bit position offset. Similarly, increase the size of the accessed
1821 object to contain the negative offset. */
1824 attrs.offset = plus_constant (attrs.offset,
1825 -(apply_bitpos / BITS_PER_UNIT));
1827 attrs.size = plus_constant (attrs.size, apply_bitpos / BITS_PER_UNIT);
1830 /* Now set the attributes we computed above. */
1831 set_mem_attrs (ref, &attrs);
1833 /* If this is already known to be a scalar or aggregate, we are done. */
1834 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1837 /* If it is a reference into an aggregate, this is part of an aggregate.
1838 Otherwise we don't know. */
1839 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1840 || TREE_CODE (t) == ARRAY_RANGE_REF
1841 || TREE_CODE (t) == BIT_FIELD_REF)
1842 MEM_IN_STRUCT_P (ref) = 1;
1846 set_mem_attributes (rtx ref, tree t, int objectp)
1848 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1851 /* Set the alias set of MEM to SET. */
1854 set_mem_alias_set (rtx mem, alias_set_type set)
1856 struct mem_attrs attrs;
1858 /* If the new and old alias sets don't conflict, something is wrong. */
1859 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1860 attrs = *get_mem_attrs (mem);
1862 set_mem_attrs (mem, &attrs);
1865 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1868 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1870 struct mem_attrs attrs;
1872 attrs = *get_mem_attrs (mem);
1873 attrs.addrspace = addrspace;
1874 set_mem_attrs (mem, &attrs);
1877 /* Set the alignment of MEM to ALIGN bits. */
1880 set_mem_align (rtx mem, unsigned int align)
1882 struct mem_attrs attrs;
1884 attrs = *get_mem_attrs (mem);
1885 attrs.align = align;
1886 set_mem_attrs (mem, &attrs);
1889 /* Set the expr for MEM to EXPR. */
1892 set_mem_expr (rtx mem, tree expr)
1894 struct mem_attrs attrs;
1896 attrs = *get_mem_attrs (mem);
1898 set_mem_attrs (mem, &attrs);
1901 /* Set the offset of MEM to OFFSET. */
1904 set_mem_offset (rtx mem, rtx offset)
1906 struct mem_attrs attrs;
1908 attrs = *get_mem_attrs (mem);
1909 attrs.offset = offset;
1910 set_mem_attrs (mem, &attrs);
1913 /* Set the size of MEM to SIZE. */
1916 set_mem_size (rtx mem, rtx size)
1918 struct mem_attrs attrs;
1920 attrs = *get_mem_attrs (mem);
1922 set_mem_attrs (mem, &attrs);
1925 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1926 and its address changed to ADDR. (VOIDmode means don't change the mode.
1927 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1928 returned memory location is required to be valid. The memory
1929 attributes are not changed. */
1932 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1937 gcc_assert (MEM_P (memref));
1938 as = MEM_ADDR_SPACE (memref);
1939 if (mode == VOIDmode)
1940 mode = GET_MODE (memref);
1942 addr = XEXP (memref, 0);
1943 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1944 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1949 if (reload_in_progress || reload_completed)
1950 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1952 addr = memory_address_addr_space (mode, addr, as);
1955 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1958 new_rtx = gen_rtx_MEM (mode, addr);
1959 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1963 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1964 way we are changing MEMREF, so we only preserve the alias set. */
1967 change_address (rtx memref, enum machine_mode mode, rtx addr)
1969 rtx new_rtx = change_address_1 (memref, mode, addr, 1);
1970 enum machine_mode mmode = GET_MODE (new_rtx);
1971 struct mem_attrs attrs, *defattrs;
1973 attrs = *get_mem_attrs (memref);
1974 defattrs = mode_mem_attrs[(int) mmode];
1975 attrs.expr = defattrs->expr;
1976 attrs.offset = defattrs->offset;
1977 attrs.size = defattrs->size;
1978 attrs.align = defattrs->align;
1980 /* If there are no changes, just return the original memory reference. */
1981 if (new_rtx == memref)
1983 if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
1986 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1987 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1990 set_mem_attrs (new_rtx, &attrs);
1994 /* Return a memory reference like MEMREF, but with its mode changed
1995 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1996 nonzero, the memory address is forced to be valid.
1997 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1998 and caller is responsible for adjusting MEMREF base register. */
2001 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2002 int validate, int adjust)
2004 rtx addr = XEXP (memref, 0);
2006 enum machine_mode address_mode;
2008 struct mem_attrs attrs, *defattrs;
2009 unsigned HOST_WIDE_INT max_align;
2011 attrs = *get_mem_attrs (memref);
2013 /* If there are no changes, just return the original memory reference. */
2014 if (mode == GET_MODE (memref) && !offset
2015 && (!validate || memory_address_addr_space_p (mode, addr,
2019 /* ??? Prefer to create garbage instead of creating shared rtl.
2020 This may happen even if offset is nonzero -- consider
2021 (plus (plus reg reg) const_int) -- so do this always. */
2022 addr = copy_rtx (addr);
2024 /* Convert a possibly large offset to a signed value within the
2025 range of the target address space. */
2026 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2027 pbits = GET_MODE_BITSIZE (address_mode);
2028 if (HOST_BITS_PER_WIDE_INT > pbits)
2030 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2031 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2037 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2038 object, we can merge it into the LO_SUM. */
2039 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2041 && (unsigned HOST_WIDE_INT) offset
2042 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2043 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2044 plus_constant (XEXP (addr, 1), offset));
2046 addr = plus_constant (addr, offset);
2049 new_rtx = change_address_1 (memref, mode, addr, validate);
2051 /* If the address is a REG, change_address_1 rightfully returns memref,
2052 but this would destroy memref's MEM_ATTRS. */
2053 if (new_rtx == memref && offset != 0)
2054 new_rtx = copy_rtx (new_rtx);
2056 /* Compute the new values of the memory attributes due to this adjustment.
2057 We add the offsets and update the alignment. */
2059 attrs.offset = GEN_INT (offset + INTVAL (attrs.offset));
2061 /* Compute the new alignment by taking the MIN of the alignment and the
2062 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2066 max_align = (offset & -offset) * BITS_PER_UNIT;
2067 attrs.align = MIN (attrs.align, max_align);
2070 /* We can compute the size in a number of ways. */
2071 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2073 attrs.size = defattrs->size;
2074 else if (attrs.size)
2075 attrs.size = plus_constant (attrs.size, -offset);
2077 set_mem_attrs (new_rtx, &attrs);
2079 /* At some point, we should validate that this offset is within the object,
2080 if all the appropriate values are known. */
2084 /* Return a memory reference like MEMREF, but with its mode changed
2085 to MODE and its address changed to ADDR, which is assumed to be
2086 MEMREF offset by OFFSET bytes. If VALIDATE is
2087 nonzero, the memory address is forced to be valid. */
2090 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2091 HOST_WIDE_INT offset, int validate)
2093 memref = change_address_1 (memref, VOIDmode, addr, validate);
2094 return adjust_address_1 (memref, mode, offset, validate, 0);
2097 /* Return a memory reference like MEMREF, but whose address is changed by
2098 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2099 known to be in OFFSET (possibly 1). */
2102 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2104 rtx new_rtx, addr = XEXP (memref, 0);
2105 enum machine_mode address_mode;
2106 struct mem_attrs attrs;
2108 attrs = *get_mem_attrs (memref);
2109 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2110 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2112 /* At this point we don't know _why_ the address is invalid. It
2113 could have secondary memory references, multiplies or anything.
2115 However, if we did go and rearrange things, we can wind up not
2116 being able to recognize the magic around pic_offset_table_rtx.
2117 This stuff is fragile, and is yet another example of why it is
2118 bad to expose PIC machinery too early. */
2119 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2121 && GET_CODE (addr) == PLUS
2122 && XEXP (addr, 0) == pic_offset_table_rtx)
2124 addr = force_reg (GET_MODE (addr), addr);
2125 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2128 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2129 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2131 /* If there are no changes, just return the original memory reference. */
2132 if (new_rtx == memref)
2135 /* Update the alignment to reflect the offset. Reset the offset, which
2138 attrs.size = mode_mem_attrs[(int) GET_MODE (new_rtx)]->size;
2139 attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2140 set_mem_attrs (new_rtx, &attrs);
2144 /* Return a memory reference like MEMREF, but with its address changed to
2145 ADDR. The caller is asserting that the actual piece of memory pointed
2146 to is the same, just the form of the address is being changed, such as
2147 by putting something into a register. */
2150 replace_equiv_address (rtx memref, rtx addr)
2152 /* change_address_1 copies the memory attribute structure without change
2153 and that's exactly what we want here. */
2154 update_temp_slot_address (XEXP (memref, 0), addr);
2155 return change_address_1 (memref, VOIDmode, addr, 1);
2158 /* Likewise, but the reference is not required to be valid. */
2161 replace_equiv_address_nv (rtx memref, rtx addr)
2163 return change_address_1 (memref, VOIDmode, addr, 0);
2166 /* Return a memory reference like MEMREF, but with its mode widened to
2167 MODE and offset by OFFSET. This would be used by targets that e.g.
2168 cannot issue QImode memory operations and have to use SImode memory
2169 operations plus masking logic. */
2172 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2174 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2175 struct mem_attrs attrs;
2176 unsigned int size = GET_MODE_SIZE (mode);
2178 /* If there are no changes, just return the original memory reference. */
2179 if (new_rtx == memref)
2182 attrs = *get_mem_attrs (new_rtx);
2184 /* If we don't know what offset we were at within the expression, then
2185 we can't know if we've overstepped the bounds. */
2187 attrs.expr = NULL_TREE;
2191 if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2193 tree field = TREE_OPERAND (attrs.expr, 1);
2194 tree offset = component_ref_field_offset (attrs.expr);
2196 if (! DECL_SIZE_UNIT (field))
2198 attrs.expr = NULL_TREE;
2202 /* Is the field at least as large as the access? If so, ok,
2203 otherwise strip back to the containing structure. */
2204 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2205 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2206 && INTVAL (attrs.offset) >= 0)
2209 if (! host_integerp (offset, 1))
2211 attrs.expr = NULL_TREE;
2215 attrs.expr = TREE_OPERAND (attrs.expr, 0);
2217 = (GEN_INT (INTVAL (attrs.offset)
2218 + tree_low_cst (offset, 1)
2219 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2222 /* Similarly for the decl. */
2223 else if (DECL_P (attrs.expr)
2224 && DECL_SIZE_UNIT (attrs.expr)
2225 && TREE_CODE (DECL_SIZE_UNIT (attrs.expr)) == INTEGER_CST
2226 && compare_tree_int (DECL_SIZE_UNIT (attrs.expr), size) >= 0
2227 && (! attrs.offset || INTVAL (attrs.offset) >= 0))
2231 /* The widened memory access overflows the expression, which means
2232 that it could alias another expression. Zap it. */
2233 attrs.expr = NULL_TREE;
2239 attrs.offset = NULL_RTX;
2241 /* The widened memory may alias other stuff, so zap the alias set. */
2242 /* ??? Maybe use get_alias_set on any remaining expression. */
2244 attrs.size = GEN_INT (size);
2245 set_mem_attrs (new_rtx, &attrs);
2249 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2250 static GTY(()) tree spill_slot_decl;
2253 get_spill_slot_decl (bool force_build_p)
2255 tree d = spill_slot_decl;
2257 struct mem_attrs attrs;
2259 if (d || !force_build_p)
2262 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2263 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2264 DECL_ARTIFICIAL (d) = 1;
2265 DECL_IGNORED_P (d) = 1;
2267 spill_slot_decl = d;
2269 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2270 MEM_NOTRAP_P (rd) = 1;
2271 attrs = *mode_mem_attrs[(int) BLKmode];
2272 attrs.alias = new_alias_set ();
2274 set_mem_attrs (rd, &attrs);
2275 SET_DECL_RTL (d, rd);
2280 /* Given MEM, a result from assign_stack_local, fill in the memory
2281 attributes as appropriate for a register allocator spill slot.
2282 These slots are not aliasable by other memory. We arrange for
2283 them all to use a single MEM_EXPR, so that the aliasing code can
2284 work properly in the case of shared spill slots. */
2287 set_mem_attrs_for_spill (rtx mem)
2289 struct mem_attrs attrs;
2292 attrs = *get_mem_attrs (mem);
2293 attrs.expr = get_spill_slot_decl (true);
2294 attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2295 attrs.addrspace = ADDR_SPACE_GENERIC;
2297 /* We expect the incoming memory to be of the form:
2298 (mem:MODE (plus (reg sfp) (const_int offset)))
2299 with perhaps the plus missing for offset = 0. */
2300 addr = XEXP (mem, 0);
2301 attrs.offset = const0_rtx;
2302 if (GET_CODE (addr) == PLUS
2303 && CONST_INT_P (XEXP (addr, 1)))
2304 attrs.offset = XEXP (addr, 1);
2306 set_mem_attrs (mem, &attrs);
2307 MEM_NOTRAP_P (mem) = 1;
2310 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2313 gen_label_rtx (void)
2315 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2316 NULL, label_num++, NULL);
2319 /* For procedure integration. */
2321 /* Install new pointers to the first and last insns in the chain.
2322 Also, set cur_insn_uid to one higher than the last in use.
2323 Used for an inline-procedure after copying the insn chain. */
2326 set_new_first_and_last_insn (rtx first, rtx last)
2330 set_first_insn (first);
2331 set_last_insn (last);
2334 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2336 int debug_count = 0;
2338 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2339 cur_debug_insn_uid = 0;
2341 for (insn = first; insn; insn = NEXT_INSN (insn))
2342 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2343 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2346 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2347 if (DEBUG_INSN_P (insn))
2352 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2354 cur_debug_insn_uid++;
2357 for (insn = first; insn; insn = NEXT_INSN (insn))
2358 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2363 /* Go through all the RTL insn bodies and copy any invalid shared
2364 structure. This routine should only be called once. */
2367 unshare_all_rtl_1 (rtx insn)
2369 /* Unshare just about everything else. */
2370 unshare_all_rtl_in_chain (insn);
2372 /* Make sure the addresses of stack slots found outside the insn chain
2373 (such as, in DECL_RTL of a variable) are not shared
2374 with the insn chain.
2376 This special care is necessary when the stack slot MEM does not
2377 actually appear in the insn chain. If it does appear, its address
2378 is unshared from all else at that point. */
2379 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2382 /* Go through all the RTL insn bodies and copy any invalid shared
2383 structure, again. This is a fairly expensive thing to do so it
2384 should be done sparingly. */
2387 unshare_all_rtl_again (rtx insn)
2392 for (p = insn; p; p = NEXT_INSN (p))
2395 reset_used_flags (PATTERN (p));
2396 reset_used_flags (REG_NOTES (p));
2399 /* Make sure that virtual stack slots are not shared. */
2400 set_used_decls (DECL_INITIAL (cfun->decl));
2402 /* Make sure that virtual parameters are not shared. */
2403 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2404 set_used_flags (DECL_RTL (decl));
2406 reset_used_flags (stack_slot_list);
2408 unshare_all_rtl_1 (insn);
2412 unshare_all_rtl (void)
2414 unshare_all_rtl_1 (get_insns ());
2418 struct rtl_opt_pass pass_unshare_all_rtl =
2422 "unshare", /* name */
2424 unshare_all_rtl, /* execute */
2427 0, /* static_pass_number */
2428 TV_NONE, /* tv_id */
2429 0, /* properties_required */
2430 0, /* properties_provided */
2431 0, /* properties_destroyed */
2432 0, /* todo_flags_start */
2433 TODO_verify_rtl_sharing /* todo_flags_finish */
2438 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2439 Recursively does the same for subexpressions. */
2442 verify_rtx_sharing (rtx orig, rtx insn)
2447 const char *format_ptr;
2452 code = GET_CODE (x);
2454 /* These types may be freely shared. */
2473 /* SCRATCH must be shared because they represent distinct values. */
2475 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2480 if (shared_const_p (orig))
2485 /* A MEM is allowed to be shared if its address is constant. */
2486 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2487 || reload_completed || reload_in_progress)
2496 /* This rtx may not be shared. If it has already been seen,
2497 replace it with a copy of itself. */
2498 #ifdef ENABLE_CHECKING
2499 if (RTX_FLAG (x, used))
2501 error ("invalid rtl sharing found in the insn");
2503 error ("shared rtx");
2505 internal_error ("internal consistency failure");
2508 gcc_assert (!RTX_FLAG (x, used));
2510 RTX_FLAG (x, used) = 1;
2512 /* Now scan the subexpressions recursively. */
2514 format_ptr = GET_RTX_FORMAT (code);
2516 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2518 switch (*format_ptr++)
2521 verify_rtx_sharing (XEXP (x, i), insn);
2525 if (XVEC (x, i) != NULL)
2528 int len = XVECLEN (x, i);
2530 for (j = 0; j < len; j++)
2532 /* We allow sharing of ASM_OPERANDS inside single
2534 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2535 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2537 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2539 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2548 /* Go through all the RTL insn bodies and check that there is no unexpected
2549 sharing in between the subexpressions. */
2552 verify_rtl_sharing (void)
2556 timevar_push (TV_VERIFY_RTL_SHARING);
2558 for (p = get_insns (); p; p = NEXT_INSN (p))
2561 reset_used_flags (PATTERN (p));
2562 reset_used_flags (REG_NOTES (p));
2563 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2566 rtx q, sequence = PATTERN (p);
2568 for (i = 0; i < XVECLEN (sequence, 0); i++)
2570 q = XVECEXP (sequence, 0, i);
2571 gcc_assert (INSN_P (q));
2572 reset_used_flags (PATTERN (q));
2573 reset_used_flags (REG_NOTES (q));
2578 for (p = get_insns (); p; p = NEXT_INSN (p))
2581 verify_rtx_sharing (PATTERN (p), p);
2582 verify_rtx_sharing (REG_NOTES (p), p);
2585 timevar_pop (TV_VERIFY_RTL_SHARING);
2588 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2589 Assumes the mark bits are cleared at entry. */
2592 unshare_all_rtl_in_chain (rtx insn)
2594 for (; insn; insn = NEXT_INSN (insn))
2597 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2598 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2602 /* Go through all virtual stack slots of a function and mark them as
2603 shared. We never replace the DECL_RTLs themselves with a copy,
2604 but expressions mentioned into a DECL_RTL cannot be shared with
2605 expressions in the instruction stream.
2607 Note that reload may convert pseudo registers into memories in-place.
2608 Pseudo registers are always shared, but MEMs never are. Thus if we
2609 reset the used flags on MEMs in the instruction stream, we must set
2610 them again on MEMs that appear in DECL_RTLs. */
2613 set_used_decls (tree blk)
2618 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2619 if (DECL_RTL_SET_P (t))
2620 set_used_flags (DECL_RTL (t));
2622 /* Now process sub-blocks. */
2623 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2627 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2628 Recursively does the same for subexpressions. Uses
2629 copy_rtx_if_shared_1 to reduce stack space. */
2632 copy_rtx_if_shared (rtx orig)
2634 copy_rtx_if_shared_1 (&orig);
2638 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2639 use. Recursively does the same for subexpressions. */
2642 copy_rtx_if_shared_1 (rtx *orig1)
2648 const char *format_ptr;
2652 /* Repeat is used to turn tail-recursion into iteration. */
2659 code = GET_CODE (x);
2661 /* These types may be freely shared. */
2678 /* SCRATCH must be shared because they represent distinct values. */
2681 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2686 if (shared_const_p (x))
2696 /* The chain of insns is not being copied. */
2703 /* This rtx may not be shared. If it has already been seen,
2704 replace it with a copy of itself. */
2706 if (RTX_FLAG (x, used))
2708 x = shallow_copy_rtx (x);
2711 RTX_FLAG (x, used) = 1;
2713 /* Now scan the subexpressions recursively.
2714 We can store any replaced subexpressions directly into X
2715 since we know X is not shared! Any vectors in X
2716 must be copied if X was copied. */
2718 format_ptr = GET_RTX_FORMAT (code);
2719 length = GET_RTX_LENGTH (code);
2722 for (i = 0; i < length; i++)
2724 switch (*format_ptr++)
2728 copy_rtx_if_shared_1 (last_ptr);
2729 last_ptr = &XEXP (x, i);
2733 if (XVEC (x, i) != NULL)
2736 int len = XVECLEN (x, i);
2738 /* Copy the vector iff I copied the rtx and the length
2740 if (copied && len > 0)
2741 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2743 /* Call recursively on all inside the vector. */
2744 for (j = 0; j < len; j++)
2747 copy_rtx_if_shared_1 (last_ptr);
2748 last_ptr = &XVECEXP (x, i, j);
2763 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2766 mark_used_flags (rtx x, int flag)
2770 const char *format_ptr;
2773 /* Repeat is used to turn tail-recursion into iteration. */
2778 code = GET_CODE (x);
2780 /* These types may be freely shared so we needn't do any resetting
2805 /* The chain of insns is not being copied. */
2812 RTX_FLAG (x, used) = flag;
2814 format_ptr = GET_RTX_FORMAT (code);
2815 length = GET_RTX_LENGTH (code);
2817 for (i = 0; i < length; i++)
2819 switch (*format_ptr++)
2827 mark_used_flags (XEXP (x, i), flag);
2831 for (j = 0; j < XVECLEN (x, i); j++)
2832 mark_used_flags (XVECEXP (x, i, j), flag);
2838 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2839 to look for shared sub-parts. */
2842 reset_used_flags (rtx x)
2844 mark_used_flags (x, 0);
2847 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2848 to look for shared sub-parts. */
2851 set_used_flags (rtx x)
2853 mark_used_flags (x, 1);
2856 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2857 Return X or the rtx for the pseudo reg the value of X was copied into.
2858 OTHER must be valid as a SET_DEST. */
2861 make_safe_from (rtx x, rtx other)
2864 switch (GET_CODE (other))
2867 other = SUBREG_REG (other);
2869 case STRICT_LOW_PART:
2872 other = XEXP (other, 0);
2881 && GET_CODE (x) != SUBREG)
2883 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2884 || reg_mentioned_p (other, x))))
2886 rtx temp = gen_reg_rtx (GET_MODE (x));
2887 emit_move_insn (temp, x);
2893 /* Emission of insns (adding them to the doubly-linked list). */
2895 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2898 get_last_insn_anywhere (void)
2900 struct sequence_stack *stack;
2901 if (get_last_insn ())
2902 return get_last_insn ();
2903 for (stack = seq_stack; stack; stack = stack->next)
2904 if (stack->last != 0)
2909 /* Return the first nonnote insn emitted in current sequence or current
2910 function. This routine looks inside SEQUENCEs. */
2913 get_first_nonnote_insn (void)
2915 rtx insn = get_insns ();
2920 for (insn = next_insn (insn);
2921 insn && NOTE_P (insn);
2922 insn = next_insn (insn))
2926 if (NONJUMP_INSN_P (insn)
2927 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2928 insn = XVECEXP (PATTERN (insn), 0, 0);
2935 /* Return the last nonnote insn emitted in current sequence or current
2936 function. This routine looks inside SEQUENCEs. */
2939 get_last_nonnote_insn (void)
2941 rtx insn = get_last_insn ();
2946 for (insn = previous_insn (insn);
2947 insn && NOTE_P (insn);
2948 insn = previous_insn (insn))
2952 if (NONJUMP_INSN_P (insn)
2953 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2954 insn = XVECEXP (PATTERN (insn), 0,
2955 XVECLEN (PATTERN (insn), 0) - 1);
2962 /* Return the number of actual (non-debug) insns emitted in this
2966 get_max_insn_count (void)
2968 int n = cur_insn_uid;
2970 /* The table size must be stable across -g, to avoid codegen
2971 differences due to debug insns, and not be affected by
2972 -fmin-insn-uid, to avoid excessive table size and to simplify
2973 debugging of -fcompare-debug failures. */
2974 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
2975 n -= cur_debug_insn_uid;
2977 n -= MIN_NONDEBUG_INSN_UID;
2983 /* Return the next insn. If it is a SEQUENCE, return the first insn
2987 next_insn (rtx insn)
2991 insn = NEXT_INSN (insn);
2992 if (insn && NONJUMP_INSN_P (insn)
2993 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2994 insn = XVECEXP (PATTERN (insn), 0, 0);
3000 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3004 previous_insn (rtx insn)
3008 insn = PREV_INSN (insn);
3009 if (insn && NONJUMP_INSN_P (insn)
3010 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3011 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3017 /* Return the next insn after INSN that is not a NOTE. This routine does not
3018 look inside SEQUENCEs. */
3021 next_nonnote_insn (rtx insn)
3025 insn = NEXT_INSN (insn);
3026 if (insn == 0 || !NOTE_P (insn))
3033 /* Return the next insn after INSN that is not a NOTE, but stop the
3034 search before we enter another basic block. This routine does not
3035 look inside SEQUENCEs. */
3038 next_nonnote_insn_bb (rtx insn)
3042 insn = NEXT_INSN (insn);
3043 if (insn == 0 || !NOTE_P (insn))
3045 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3052 /* Return the previous insn before INSN that is not a NOTE. This routine does
3053 not look inside SEQUENCEs. */
3056 prev_nonnote_insn (rtx insn)
3060 insn = PREV_INSN (insn);
3061 if (insn == 0 || !NOTE_P (insn))
3068 /* Return the previous insn before INSN that is not a NOTE, but stop
3069 the search before we enter another basic block. This routine does
3070 not look inside SEQUENCEs. */
3073 prev_nonnote_insn_bb (rtx insn)
3077 insn = PREV_INSN (insn);
3078 if (insn == 0 || !NOTE_P (insn))
3080 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3087 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3088 routine does not look inside SEQUENCEs. */
3091 next_nondebug_insn (rtx insn)
3095 insn = NEXT_INSN (insn);
3096 if (insn == 0 || !DEBUG_INSN_P (insn))
3103 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3104 This routine does not look inside SEQUENCEs. */
3107 prev_nondebug_insn (rtx insn)
3111 insn = PREV_INSN (insn);
3112 if (insn == 0 || !DEBUG_INSN_P (insn))
3119 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3120 This routine does not look inside SEQUENCEs. */
3123 next_nonnote_nondebug_insn (rtx insn)
3127 insn = NEXT_INSN (insn);
3128 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3135 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3136 This routine does not look inside SEQUENCEs. */
3139 prev_nonnote_nondebug_insn (rtx insn)
3143 insn = PREV_INSN (insn);
3144 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3151 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3152 or 0, if there is none. This routine does not look inside
3156 next_real_insn (rtx insn)
3160 insn = NEXT_INSN (insn);
3161 if (insn == 0 || INSN_P (insn))
3168 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3169 or 0, if there is none. This routine does not look inside
3173 prev_real_insn (rtx insn)
3177 insn = PREV_INSN (insn);
3178 if (insn == 0 || INSN_P (insn))
3185 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3186 This routine does not look inside SEQUENCEs. */
3189 last_call_insn (void)
3193 for (insn = get_last_insn ();
3194 insn && !CALL_P (insn);
3195 insn = PREV_INSN (insn))
3201 /* Find the next insn after INSN that really does something. This routine
3202 does not look inside SEQUENCEs. After reload this also skips over
3203 standalone USE and CLOBBER insn. */
3206 active_insn_p (const_rtx insn)
3208 return (CALL_P (insn) || JUMP_P (insn)
3209 || (NONJUMP_INSN_P (insn)
3210 && (! reload_completed
3211 || (GET_CODE (PATTERN (insn)) != USE
3212 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3216 next_active_insn (rtx insn)
3220 insn = NEXT_INSN (insn);
3221 if (insn == 0 || active_insn_p (insn))
3228 /* Find the last insn before INSN that really does something. This routine
3229 does not look inside SEQUENCEs. After reload this also skips over
3230 standalone USE and CLOBBER insn. */
3233 prev_active_insn (rtx insn)
3237 insn = PREV_INSN (insn);
3238 if (insn == 0 || active_insn_p (insn))
3245 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3248 next_label (rtx insn)
3252 insn = NEXT_INSN (insn);
3253 if (insn == 0 || LABEL_P (insn))
3260 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3263 prev_label (rtx insn)
3267 insn = PREV_INSN (insn);
3268 if (insn == 0 || LABEL_P (insn))
3275 /* Return the last label to mark the same position as LABEL. Return null
3276 if LABEL itself is null. */
3279 skip_consecutive_labels (rtx label)
3283 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3291 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3292 and REG_CC_USER notes so we can find it. */
3295 link_cc0_insns (rtx insn)
3297 rtx user = next_nonnote_insn (insn);
3299 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3300 user = XVECEXP (PATTERN (user), 0, 0);
3302 add_reg_note (user, REG_CC_SETTER, insn);
3303 add_reg_note (insn, REG_CC_USER, user);
3306 /* Return the next insn that uses CC0 after INSN, which is assumed to
3307 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3308 applied to the result of this function should yield INSN).
3310 Normally, this is simply the next insn. However, if a REG_CC_USER note
3311 is present, it contains the insn that uses CC0.
3313 Return 0 if we can't find the insn. */
3316 next_cc0_user (rtx insn)
3318 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3321 return XEXP (note, 0);
3323 insn = next_nonnote_insn (insn);
3324 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3325 insn = XVECEXP (PATTERN (insn), 0, 0);
3327 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3333 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3334 note, it is the previous insn. */
3337 prev_cc0_setter (rtx insn)
3339 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3342 return XEXP (note, 0);
3344 insn = prev_nonnote_insn (insn);
3345 gcc_assert (sets_cc0_p (PATTERN (insn)));
3352 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3355 find_auto_inc (rtx *xp, void *data)
3358 rtx reg = (rtx) data;
3360 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3363 switch (GET_CODE (x))
3371 if (rtx_equal_p (reg, XEXP (x, 0)))
3382 /* Increment the label uses for all labels present in rtx. */
3385 mark_label_nuses (rtx x)
3391 code = GET_CODE (x);
3392 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3393 LABEL_NUSES (XEXP (x, 0))++;
3395 fmt = GET_RTX_FORMAT (code);
3396 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3399 mark_label_nuses (XEXP (x, i));
3400 else if (fmt[i] == 'E')
3401 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3402 mark_label_nuses (XVECEXP (x, i, j));
3407 /* Try splitting insns that can be split for better scheduling.
3408 PAT is the pattern which might split.
3409 TRIAL is the insn providing PAT.
3410 LAST is nonzero if we should return the last insn of the sequence produced.
3412 If this routine succeeds in splitting, it returns the first or last
3413 replacement insn depending on the value of LAST. Otherwise, it
3414 returns TRIAL. If the insn to be returned can be split, it will be. */
3417 try_split (rtx pat, rtx trial, int last)
3419 rtx before = PREV_INSN (trial);
3420 rtx after = NEXT_INSN (trial);
3421 int has_barrier = 0;
3424 rtx insn_last, insn;
3427 /* We're not good at redistributing frame information. */
3428 if (RTX_FRAME_RELATED_P (trial))
3431 if (any_condjump_p (trial)
3432 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3433 split_branch_probability = INTVAL (XEXP (note, 0));
3434 probability = split_branch_probability;
3436 seq = split_insns (pat, trial);
3438 split_branch_probability = -1;
3440 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3441 We may need to handle this specially. */
3442 if (after && BARRIER_P (after))
3445 after = NEXT_INSN (after);
3451 /* Avoid infinite loop if any insn of the result matches
3452 the original pattern. */
3456 if (INSN_P (insn_last)
3457 && rtx_equal_p (PATTERN (insn_last), pat))
3459 if (!NEXT_INSN (insn_last))
3461 insn_last = NEXT_INSN (insn_last);
3464 /* We will be adding the new sequence to the function. The splitters
3465 may have introduced invalid RTL sharing, so unshare the sequence now. */
3466 unshare_all_rtl_in_chain (seq);
3469 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3473 mark_jump_label (PATTERN (insn), insn, 0);
3475 if (probability != -1
3476 && any_condjump_p (insn)
3477 && !find_reg_note (insn, REG_BR_PROB, 0))
3479 /* We can preserve the REG_BR_PROB notes only if exactly
3480 one jump is created, otherwise the machine description
3481 is responsible for this step using
3482 split_branch_probability variable. */
3483 gcc_assert (njumps == 1);
3484 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3489 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3490 in SEQ and copy any additional information across. */
3493 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3498 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3499 target may have explicitly specified. */
3500 p = &CALL_INSN_FUNCTION_USAGE (insn);
3503 *p = CALL_INSN_FUNCTION_USAGE (trial);
3505 /* If the old call was a sibling call, the new one must
3507 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3509 /* If the new call is the last instruction in the sequence,
3510 it will effectively replace the old call in-situ. Otherwise
3511 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3512 so that it comes immediately after the new call. */
3513 if (NEXT_INSN (insn))
3514 for (next = NEXT_INSN (trial);
3515 next && NOTE_P (next);
3516 next = NEXT_INSN (next))
3517 if (NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
3520 add_insn_after (next, insn, NULL);
3526 /* Copy notes, particularly those related to the CFG. */
3527 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3529 switch (REG_NOTE_KIND (note))
3532 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3537 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3540 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3544 case REG_NON_LOCAL_GOTO:
3545 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3548 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3554 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3556 rtx reg = XEXP (note, 0);
3557 if (!FIND_REG_INC_NOTE (insn, reg)
3558 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3559 add_reg_note (insn, REG_INC, reg);
3569 /* If there are LABELS inside the split insns increment the
3570 usage count so we don't delete the label. */
3574 while (insn != NULL_RTX)
3576 /* JUMP_P insns have already been "marked" above. */
3577 if (NONJUMP_INSN_P (insn))
3578 mark_label_nuses (PATTERN (insn));
3580 insn = PREV_INSN (insn);
3584 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3586 delete_insn (trial);
3588 emit_barrier_after (tem);
3590 /* Recursively call try_split for each new insn created; by the
3591 time control returns here that insn will be fully split, so
3592 set LAST and continue from the insn after the one returned.
3593 We can't use next_active_insn here since AFTER may be a note.
3594 Ignore deleted insns, which can be occur if not optimizing. */
3595 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3596 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3597 tem = try_split (PATTERN (tem), tem, 1);
3599 /* Return either the first or the last insn, depending on which was
3602 ? (after ? PREV_INSN (after) : get_last_insn ())
3603 : NEXT_INSN (before);
3606 /* Make and return an INSN rtx, initializing all its slots.
3607 Store PATTERN in the pattern slots. */
3610 make_insn_raw (rtx pattern)
3614 insn = rtx_alloc (INSN);
3616 INSN_UID (insn) = cur_insn_uid++;
3617 PATTERN (insn) = pattern;
3618 INSN_CODE (insn) = -1;
3619 REG_NOTES (insn) = NULL;
3620 INSN_LOCATOR (insn) = curr_insn_locator ();
3621 BLOCK_FOR_INSN (insn) = NULL;
3623 #ifdef ENABLE_RTL_CHECKING
3626 && (returnjump_p (insn)
3627 || (GET_CODE (insn) == SET
3628 && SET_DEST (insn) == pc_rtx)))
3630 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3638 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3641 make_debug_insn_raw (rtx pattern)
3645 insn = rtx_alloc (DEBUG_INSN);
3646 INSN_UID (insn) = cur_debug_insn_uid++;
3647 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3648 INSN_UID (insn) = cur_insn_uid++;
3650 PATTERN (insn) = pattern;
3651 INSN_CODE (insn) = -1;
3652 REG_NOTES (insn) = NULL;
3653 INSN_LOCATOR (insn) = curr_insn_locator ();
3654 BLOCK_FOR_INSN (insn) = NULL;
3659 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3662 make_jump_insn_raw (rtx pattern)
3666 insn = rtx_alloc (JUMP_INSN);
3667 INSN_UID (insn) = cur_insn_uid++;
3669 PATTERN (insn) = pattern;
3670 INSN_CODE (insn) = -1;
3671 REG_NOTES (insn) = NULL;
3672 JUMP_LABEL (insn) = NULL;
3673 INSN_LOCATOR (insn) = curr_insn_locator ();
3674 BLOCK_FOR_INSN (insn) = NULL;
3679 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3682 make_call_insn_raw (rtx pattern)
3686 insn = rtx_alloc (CALL_INSN);
3687 INSN_UID (insn) = cur_insn_uid++;
3689 PATTERN (insn) = pattern;
3690 INSN_CODE (insn) = -1;
3691 REG_NOTES (insn) = NULL;
3692 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3693 INSN_LOCATOR (insn) = curr_insn_locator ();
3694 BLOCK_FOR_INSN (insn) = NULL;
3699 /* Add INSN to the end of the doubly-linked list.
3700 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3705 PREV_INSN (insn) = get_last_insn();
3706 NEXT_INSN (insn) = 0;
3708 if (NULL != get_last_insn())
3709 NEXT_INSN (get_last_insn ()) = insn;
3711 if (NULL == get_insns ())
3712 set_first_insn (insn);
3714 set_last_insn (insn);
3717 /* Add INSN into the doubly-linked list after insn AFTER. This and
3718 the next should be the only functions called to insert an insn once
3719 delay slots have been filled since only they know how to update a
3723 add_insn_after (rtx insn, rtx after, basic_block bb)
3725 rtx next = NEXT_INSN (after);
3727 gcc_assert (!optimize || !INSN_DELETED_P (after));
3729 NEXT_INSN (insn) = next;
3730 PREV_INSN (insn) = after;
3734 PREV_INSN (next) = insn;
3735 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3736 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3738 else if (get_last_insn () == after)
3739 set_last_insn (insn);
3742 struct sequence_stack *stack = seq_stack;
3743 /* Scan all pending sequences too. */
3744 for (; stack; stack = stack->next)
3745 if (after == stack->last)
3754 if (!BARRIER_P (after)
3755 && !BARRIER_P (insn)
3756 && (bb = BLOCK_FOR_INSN (after)))
3758 set_block_for_insn (insn, bb);
3760 df_insn_rescan (insn);
3761 /* Should not happen as first in the BB is always
3762 either NOTE or LABEL. */
3763 if (BB_END (bb) == after
3764 /* Avoid clobbering of structure when creating new BB. */
3765 && !BARRIER_P (insn)
3766 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3770 NEXT_INSN (after) = insn;
3771 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3773 rtx sequence = PATTERN (after);
3774 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3778 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3779 the previous should be the only functions called to insert an insn
3780 once delay slots have been filled since only they know how to
3781 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3785 add_insn_before (rtx insn, rtx before, basic_block bb)
3787 rtx prev = PREV_INSN (before);
3789 gcc_assert (!optimize || !INSN_DELETED_P (before));
3791 PREV_INSN (insn) = prev;
3792 NEXT_INSN (insn) = before;
3796 NEXT_INSN (prev) = insn;
3797 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3799 rtx sequence = PATTERN (prev);
3800 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3803 else if (get_insns () == before)
3804 set_first_insn (insn);
3807 struct sequence_stack *stack = seq_stack;
3808 /* Scan all pending sequences too. */
3809 for (; stack; stack = stack->next)
3810 if (before == stack->first)
3812 stack->first = insn;
3820 && !BARRIER_P (before)
3821 && !BARRIER_P (insn))
3822 bb = BLOCK_FOR_INSN (before);
3826 set_block_for_insn (insn, bb);
3828 df_insn_rescan (insn);
3829 /* Should not happen as first in the BB is always either NOTE or
3831 gcc_assert (BB_HEAD (bb) != insn
3832 /* Avoid clobbering of structure when creating new BB. */
3834 || NOTE_INSN_BASIC_BLOCK_P (insn));
3837 PREV_INSN (before) = insn;
3838 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3839 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3843 /* Replace insn with an deleted instruction note. */
3846 set_insn_deleted (rtx insn)
3848 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3849 PUT_CODE (insn, NOTE);
3850 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3854 /* Remove an insn from its doubly-linked list. This function knows how
3855 to handle sequences. */
3857 remove_insn (rtx insn)
3859 rtx next = NEXT_INSN (insn);
3860 rtx prev = PREV_INSN (insn);
3863 /* Later in the code, the block will be marked dirty. */
3864 df_insn_delete (NULL, INSN_UID (insn));
3868 NEXT_INSN (prev) = next;
3869 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3871 rtx sequence = PATTERN (prev);
3872 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3875 else if (get_insns () == insn)
3878 PREV_INSN (next) = NULL;
3879 set_first_insn (next);
3883 struct sequence_stack *stack = seq_stack;
3884 /* Scan all pending sequences too. */
3885 for (; stack; stack = stack->next)
3886 if (insn == stack->first)
3888 stack->first = next;
3897 PREV_INSN (next) = prev;
3898 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3899 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3901 else if (get_last_insn () == insn)
3902 set_last_insn (prev);
3905 struct sequence_stack *stack = seq_stack;
3906 /* Scan all pending sequences too. */
3907 for (; stack; stack = stack->next)
3908 if (insn == stack->last)
3916 if (!BARRIER_P (insn)
3917 && (bb = BLOCK_FOR_INSN (insn)))
3919 if (NONDEBUG_INSN_P (insn))
3920 df_set_bb_dirty (bb);
3921 if (BB_HEAD (bb) == insn)
3923 /* Never ever delete the basic block note without deleting whole
3925 gcc_assert (!NOTE_P (insn));
3926 BB_HEAD (bb) = next;
3928 if (BB_END (bb) == insn)
3933 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3936 add_function_usage_to (rtx call_insn, rtx call_fusage)
3938 gcc_assert (call_insn && CALL_P (call_insn));
3940 /* Put the register usage information on the CALL. If there is already
3941 some usage information, put ours at the end. */
3942 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3946 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3947 link = XEXP (link, 1))
3950 XEXP (link, 1) = call_fusage;
3953 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3956 /* Delete all insns made since FROM.
3957 FROM becomes the new last instruction. */
3960 delete_insns_since (rtx from)
3965 NEXT_INSN (from) = 0;
3966 set_last_insn (from);
3969 /* This function is deprecated, please use sequences instead.
3971 Move a consecutive bunch of insns to a different place in the chain.
3972 The insns to be moved are those between FROM and TO.
3973 They are moved to a new position after the insn AFTER.
3974 AFTER must not be FROM or TO or any insn in between.
3976 This function does not know about SEQUENCEs and hence should not be
3977 called after delay-slot filling has been done. */
3980 reorder_insns_nobb (rtx from, rtx to, rtx after)
3982 #ifdef ENABLE_CHECKING
3984 for (x = from; x != to; x = NEXT_INSN (x))
3985 gcc_assert (after != x);
3986 gcc_assert (after != to);
3989 /* Splice this bunch out of where it is now. */
3990 if (PREV_INSN (from))
3991 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3993 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3994 if (get_last_insn () == to)
3995 set_last_insn (PREV_INSN (from));
3996 if (get_insns () == from)
3997 set_first_insn (NEXT_INSN (to));
3999 /* Make the new neighbors point to it and it to them. */
4000 if (NEXT_INSN (after))
4001 PREV_INSN (NEXT_INSN (after)) = to;
4003 NEXT_INSN (to) = NEXT_INSN (after);
4004 PREV_INSN (from) = after;
4005 NEXT_INSN (after) = from;
4006 if (after == get_last_insn())
4010 /* Same as function above, but take care to update BB boundaries. */
4012 reorder_insns (rtx from, rtx to, rtx after)
4014 rtx prev = PREV_INSN (from);
4015 basic_block bb, bb2;
4017 reorder_insns_nobb (from, to, after);
4019 if (!BARRIER_P (after)
4020 && (bb = BLOCK_FOR_INSN (after)))
4023 df_set_bb_dirty (bb);
4025 if (!BARRIER_P (from)
4026 && (bb2 = BLOCK_FOR_INSN (from)))
4028 if (BB_END (bb2) == to)
4029 BB_END (bb2) = prev;
4030 df_set_bb_dirty (bb2);
4033 if (BB_END (bb) == after)
4036 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4038 df_insn_change_bb (x, bb);
4043 /* Emit insn(s) of given code and pattern
4044 at a specified place within the doubly-linked list.
4046 All of the emit_foo global entry points accept an object
4047 X which is either an insn list or a PATTERN of a single
4050 There are thus a few canonical ways to generate code and
4051 emit it at a specific place in the instruction stream. For
4052 example, consider the instruction named SPOT and the fact that
4053 we would like to emit some instructions before SPOT. We might
4057 ... emit the new instructions ...
4058 insns_head = get_insns ();
4061 emit_insn_before (insns_head, SPOT);
4063 It used to be common to generate SEQUENCE rtl instead, but that
4064 is a relic of the past which no longer occurs. The reason is that
4065 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4066 generated would almost certainly die right after it was created. */
4069 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
4070 rtx (*make_raw) (rtx))
4074 gcc_assert (before);
4079 switch (GET_CODE (x))
4091 rtx next = NEXT_INSN (insn);
4092 add_insn_before (insn, before, bb);
4098 #ifdef ENABLE_RTL_CHECKING
4105 last = (*make_raw) (x);
4106 add_insn_before (last, before, bb);
4113 /* Make X be output before the instruction BEFORE. */
4116 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4118 return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4121 /* Make an instruction with body X and code JUMP_INSN
4122 and output it before the instruction BEFORE. */
4125 emit_jump_insn_before_noloc (rtx x, rtx before)
4127 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4128 make_jump_insn_raw);
4131 /* Make an instruction with body X and code CALL_INSN
4132 and output it before the instruction BEFORE. */
4135 emit_call_insn_before_noloc (rtx x, rtx before)
4137 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4138 make_call_insn_raw);
4141 /* Make an instruction with body X and code DEBUG_INSN
4142 and output it before the instruction BEFORE. */
4145 emit_debug_insn_before_noloc (rtx x, rtx before)
4147 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4148 make_debug_insn_raw);
4151 /* Make an insn of code BARRIER
4152 and output it before the insn BEFORE. */
4155 emit_barrier_before (rtx before)
4157 rtx insn = rtx_alloc (BARRIER);
4159 INSN_UID (insn) = cur_insn_uid++;
4161 add_insn_before (insn, before, NULL);
4165 /* Emit the label LABEL before the insn BEFORE. */
4168 emit_label_before (rtx label, rtx before)
4170 /* This can be called twice for the same label as a result of the
4171 confusion that follows a syntax error! So make it harmless. */
4172 if (INSN_UID (label) == 0)
4174 INSN_UID (label) = cur_insn_uid++;
4175 add_insn_before (label, before, NULL);
4181 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4184 emit_note_before (enum insn_note subtype, rtx before)
4186 rtx note = rtx_alloc (NOTE);
4187 INSN_UID (note) = cur_insn_uid++;
4188 NOTE_KIND (note) = subtype;
4189 BLOCK_FOR_INSN (note) = NULL;
4190 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4192 add_insn_before (note, before, NULL);
4196 /* Helper for emit_insn_after, handles lists of instructions
4200 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4204 if (!bb && !BARRIER_P (after))
4205 bb = BLOCK_FOR_INSN (after);
4209 df_set_bb_dirty (bb);
4210 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4211 if (!BARRIER_P (last))
4213 set_block_for_insn (last, bb);
4214 df_insn_rescan (last);
4216 if (!BARRIER_P (last))
4218 set_block_for_insn (last, bb);
4219 df_insn_rescan (last);
4221 if (BB_END (bb) == after)
4225 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4228 after_after = NEXT_INSN (after);
4230 NEXT_INSN (after) = first;
4231 PREV_INSN (first) = after;
4232 NEXT_INSN (last) = after_after;
4234 PREV_INSN (after_after) = last;
4236 if (after == get_last_insn())
4237 set_last_insn (last);
4243 emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
4244 rtx (*make_raw)(rtx))
4253 switch (GET_CODE (x))
4262 last = emit_insn_after_1 (x, after, bb);
4265 #ifdef ENABLE_RTL_CHECKING
4272 last = (*make_raw) (x);
4273 add_insn_after (last, after, bb);
4280 /* Make X be output after the insn AFTER and set the BB of insn. If
4281 BB is NULL, an attempt is made to infer the BB from AFTER. */
4284 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4286 return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4290 /* Make an insn of code JUMP_INSN with body X
4291 and output it after the insn AFTER. */
4294 emit_jump_insn_after_noloc (rtx x, rtx after)
4296 return emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw);
4299 /* Make an instruction with body X and code CALL_INSN
4300 and output it after the instruction AFTER. */
4303 emit_call_insn_after_noloc (rtx x, rtx after)
4305 return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4308 /* Make an instruction with body X and code CALL_INSN
4309 and output it after the instruction AFTER. */
4312 emit_debug_insn_after_noloc (rtx x, rtx after)
4314 return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4317 /* Make an insn of code BARRIER
4318 and output it after the insn AFTER. */
4321 emit_barrier_after (rtx after)
4323 rtx insn = rtx_alloc (BARRIER);
4325 INSN_UID (insn) = cur_insn_uid++;
4327 add_insn_after (insn, after, NULL);
4331 /* Emit the label LABEL after the insn AFTER. */
4334 emit_label_after (rtx label, rtx after)
4336 /* This can be called twice for the same label
4337 as a result of the confusion that follows a syntax error!
4338 So make it harmless. */
4339 if (INSN_UID (label) == 0)
4341 INSN_UID (label) = cur_insn_uid++;
4342 add_insn_after (label, after, NULL);
4348 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4351 emit_note_after (enum insn_note subtype, rtx after)
4353 rtx note = rtx_alloc (NOTE);
4354 INSN_UID (note) = cur_insn_uid++;
4355 NOTE_KIND (note) = subtype;
4356 BLOCK_FOR_INSN (note) = NULL;
4357 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4358 add_insn_after (note, after, NULL);
4362 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4363 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4366 emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
4367 rtx (*make_raw) (rtx))
4369 rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4371 if (pattern == NULL_RTX || !loc)
4374 after = NEXT_INSN (after);
4377 if (active_insn_p (after) && !INSN_LOCATOR (after))
4378 INSN_LOCATOR (after) = loc;
4381 after = NEXT_INSN (after);
4386 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4387 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4391 emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
4392 rtx (*make_raw) (rtx))
4396 if (skip_debug_insns)
4397 while (DEBUG_INSN_P (prev))
4398 prev = PREV_INSN (prev);
4401 return emit_pattern_after_setloc (pattern, after, INSN_LOCATOR (prev),
4404 return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4407 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4409 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4411 return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
4414 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4416 emit_insn_after (rtx pattern, rtx after)
4418 return emit_pattern_after (pattern, after, true, make_insn_raw);
4421 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4423 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4425 return emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw);
4428 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4430 emit_jump_insn_after (rtx pattern, rtx after)
4432 return emit_pattern_after (pattern, after, true, make_jump_insn_raw);
4435 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4437 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4439 return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
4442 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4444 emit_call_insn_after (rtx pattern, rtx after)
4446 return emit_pattern_after (pattern, after, true, make_call_insn_raw);
4449 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4451 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4453 return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
4456 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4458 emit_debug_insn_after (rtx pattern, rtx after)
4460 return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
4463 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4464 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4465 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4469 emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
4470 rtx (*make_raw) (rtx))
4472 rtx first = PREV_INSN (before);
4473 rtx last = emit_pattern_before_noloc (pattern, before,
4474 insnp ? before : NULL_RTX,
4477 if (pattern == NULL_RTX || !loc)
4481 first = get_insns ();
4483 first = NEXT_INSN (first);
4486 if (active_insn_p (first) && !INSN_LOCATOR (first))
4487 INSN_LOCATOR (first) = loc;
4490 first = NEXT_INSN (first);
4495 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4496 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4497 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4498 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4501 emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
4502 bool insnp, rtx (*make_raw) (rtx))
4506 if (skip_debug_insns)
4507 while (DEBUG_INSN_P (next))
4508 next = PREV_INSN (next);
4511 return emit_pattern_before_setloc (pattern, before, INSN_LOCATOR (next),
4514 return emit_pattern_before_noloc (pattern, before,
4515 insnp ? before : NULL_RTX,
4519 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4521 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4523 return emit_pattern_before_setloc (pattern, before, loc, true,
4527 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4529 emit_insn_before (rtx pattern, rtx before)
4531 return emit_pattern_before (pattern, before, true, true, make_insn_raw);
4534 /* like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4536 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4538 return emit_pattern_before_setloc (pattern, before, loc, false,
4539 make_jump_insn_raw);
4542 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4544 emit_jump_insn_before (rtx pattern, rtx before)
4546 return emit_pattern_before (pattern, before, true, false,
4547 make_jump_insn_raw);
4550 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4552 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4554 return emit_pattern_before_setloc (pattern, before, loc, false,
4555 make_call_insn_raw);
4558 /* Like emit_call_insn_before_noloc,
4559 but set insn_locator according to BEFORE. */
4561 emit_call_insn_before (rtx pattern, rtx before)
4563 return emit_pattern_before (pattern, before, true, false,
4564 make_call_insn_raw);
4567 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4569 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4571 return emit_pattern_before_setloc (pattern, before, loc, false,
4572 make_debug_insn_raw);
4575 /* Like emit_debug_insn_before_noloc,
4576 but set insn_locator according to BEFORE. */
4578 emit_debug_insn_before (rtx pattern, rtx before)
4580 return emit_pattern_before (pattern, before, false, false,
4581 make_debug_insn_raw);
4584 /* Take X and emit it at the end of the doubly-linked
4587 Returns the last insn emitted. */
4592 rtx last = get_last_insn();
4598 switch (GET_CODE (x))
4610 rtx next = NEXT_INSN (insn);
4617 #ifdef ENABLE_RTL_CHECKING
4624 last = make_insn_raw (x);
4632 /* Make an insn of code DEBUG_INSN with pattern X
4633 and add it to the end of the doubly-linked list. */
4636 emit_debug_insn (rtx x)
4638 rtx last = get_last_insn();
4644 switch (GET_CODE (x))
4656 rtx next = NEXT_INSN (insn);
4663 #ifdef ENABLE_RTL_CHECKING
4670 last = make_debug_insn_raw (x);
4678 /* Make an insn of code JUMP_INSN with pattern X
4679 and add it to the end of the doubly-linked list. */
4682 emit_jump_insn (rtx x)
4684 rtx last = NULL_RTX, insn;
4686 switch (GET_CODE (x))
4698 rtx next = NEXT_INSN (insn);
4705 #ifdef ENABLE_RTL_CHECKING
4712 last = make_jump_insn_raw (x);
4720 /* Make an insn of code CALL_INSN with pattern X
4721 and add it to the end of the doubly-linked list. */
4724 emit_call_insn (rtx x)
4728 switch (GET_CODE (x))
4737 insn = emit_insn (x);
4740 #ifdef ENABLE_RTL_CHECKING
4747 insn = make_call_insn_raw (x);
4755 /* Add the label LABEL to the end of the doubly-linked list. */
4758 emit_label (rtx label)
4760 /* This can be called twice for the same label
4761 as a result of the confusion that follows a syntax error!
4762 So make it harmless. */
4763 if (INSN_UID (label) == 0)
4765 INSN_UID (label) = cur_insn_uid++;
4771 /* Make an insn of code BARRIER
4772 and add it to the end of the doubly-linked list. */
4777 rtx barrier = rtx_alloc (BARRIER);
4778 INSN_UID (barrier) = cur_insn_uid++;
4783 /* Emit a copy of note ORIG. */
4786 emit_note_copy (rtx orig)
4790 note = rtx_alloc (NOTE);
4792 INSN_UID (note) = cur_insn_uid++;
4793 NOTE_DATA (note) = NOTE_DATA (orig);
4794 NOTE_KIND (note) = NOTE_KIND (orig);
4795 BLOCK_FOR_INSN (note) = NULL;
4801 /* Make an insn of code NOTE or type NOTE_NO
4802 and add it to the end of the doubly-linked list. */
4805 emit_note (enum insn_note kind)
4809 note = rtx_alloc (NOTE);
4810 INSN_UID (note) = cur_insn_uid++;
4811 NOTE_KIND (note) = kind;
4812 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4813 BLOCK_FOR_INSN (note) = NULL;
4818 /* Emit a clobber of lvalue X. */
4821 emit_clobber (rtx x)
4823 /* CONCATs should not appear in the insn stream. */
4824 if (GET_CODE (x) == CONCAT)
4826 emit_clobber (XEXP (x, 0));
4827 return emit_clobber (XEXP (x, 1));
4829 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4832 /* Return a sequence of insns to clobber lvalue X. */
4846 /* Emit a use of rvalue X. */
4851 /* CONCATs should not appear in the insn stream. */
4852 if (GET_CODE (x) == CONCAT)
4854 emit_use (XEXP (x, 0));
4855 return emit_use (XEXP (x, 1));
4857 return emit_insn (gen_rtx_USE (VOIDmode, x));
4860 /* Return a sequence of insns to use rvalue X. */
4874 /* Cause next statement to emit a line note even if the line number
4878 force_next_line_note (void)
4883 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4884 note of this type already exists, remove it first. */
4887 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4889 rtx note = find_reg_note (insn, kind, NULL_RTX);
4895 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4896 has multiple sets (some callers assume single_set
4897 means the insn only has one set, when in fact it
4898 means the insn only has one * useful * set). */
4899 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4905 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4906 It serves no useful purpose and breaks eliminate_regs. */
4907 if (GET_CODE (datum) == ASM_OPERANDS)
4912 XEXP (note, 0) = datum;
4913 df_notes_rescan (insn);
4921 XEXP (note, 0) = datum;
4927 add_reg_note (insn, kind, datum);
4933 df_notes_rescan (insn);
4939 return REG_NOTES (insn);
4942 /* Return an indication of which type of insn should have X as a body.
4943 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4945 static enum rtx_code
4946 classify_insn (rtx x)
4950 if (GET_CODE (x) == CALL)
4952 if (GET_CODE (x) == RETURN)
4954 if (GET_CODE (x) == SET)
4956 if (SET_DEST (x) == pc_rtx)
4958 else if (GET_CODE (SET_SRC (x)) == CALL)
4963 if (GET_CODE (x) == PARALLEL)
4966 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4967 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4969 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4970 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4972 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4973 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4979 /* Emit the rtl pattern X as an appropriate kind of insn.
4980 If X is a label, it is simply added into the insn chain. */
4985 enum rtx_code code = classify_insn (x);
4990 return emit_label (x);
4992 return emit_insn (x);
4995 rtx insn = emit_jump_insn (x);
4996 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4997 return emit_barrier ();
5001 return emit_call_insn (x);
5003 return emit_debug_insn (x);
5009 /* Space for free sequence stack entries. */
5010 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5012 /* Begin emitting insns to a sequence. If this sequence will contain
5013 something that might cause the compiler to pop arguments to function
5014 calls (because those pops have previously been deferred; see
5015 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5016 before calling this function. That will ensure that the deferred
5017 pops are not accidentally emitted in the middle of this sequence. */
5020 start_sequence (void)
5022 struct sequence_stack *tem;
5024 if (free_sequence_stack != NULL)
5026 tem = free_sequence_stack;
5027 free_sequence_stack = tem->next;
5030 tem = ggc_alloc_sequence_stack ();
5032 tem->next = seq_stack;
5033 tem->first = get_insns ();
5034 tem->last = get_last_insn ();
5042 /* Set up the insn chain starting with FIRST as the current sequence,
5043 saving the previously current one. See the documentation for
5044 start_sequence for more information about how to use this function. */
5047 push_to_sequence (rtx first)
5053 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5056 set_first_insn (first);
5057 set_last_insn (last);
5060 /* Like push_to_sequence, but take the last insn as an argument to avoid
5061 looping through the list. */
5064 push_to_sequence2 (rtx first, rtx last)
5068 set_first_insn (first);
5069 set_last_insn (last);
5072 /* Set up the outer-level insn chain
5073 as the current sequence, saving the previously current one. */
5076 push_topmost_sequence (void)
5078 struct sequence_stack *stack, *top = NULL;
5082 for (stack = seq_stack; stack; stack = stack->next)
5085 set_first_insn (top->first);
5086 set_last_insn (top->last);
5089 /* After emitting to the outer-level insn chain, update the outer-level
5090 insn chain, and restore the previous saved state. */
5093 pop_topmost_sequence (void)
5095 struct sequence_stack *stack, *top = NULL;
5097 for (stack = seq_stack; stack; stack = stack->next)
5100 top->first = get_insns ();
5101 top->last = get_last_insn ();
5106 /* After emitting to a sequence, restore previous saved state.
5108 To get the contents of the sequence just made, you must call
5109 `get_insns' *before* calling here.
5111 If the compiler might have deferred popping arguments while
5112 generating this sequence, and this sequence will not be immediately
5113 inserted into the instruction stream, use do_pending_stack_adjust
5114 before calling get_insns. That will ensure that the deferred
5115 pops are inserted into this sequence, and not into some random
5116 location in the instruction stream. See INHIBIT_DEFER_POP for more
5117 information about deferred popping of arguments. */
5122 struct sequence_stack *tem = seq_stack;
5124 set_first_insn (tem->first);
5125 set_last_insn (tem->last);
5126 seq_stack = tem->next;
5128 memset (tem, 0, sizeof (*tem));
5129 tem->next = free_sequence_stack;
5130 free_sequence_stack = tem;
5133 /* Return 1 if currently emitting into a sequence. */
5136 in_sequence_p (void)
5138 return seq_stack != 0;
5141 /* Put the various virtual registers into REGNO_REG_RTX. */
5144 init_virtual_regs (void)
5146 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5147 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5148 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5149 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5150 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5151 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5152 = virtual_preferred_stack_boundary_rtx;
5156 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5157 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5158 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5159 static int copy_insn_n_scratches;
5161 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5162 copied an ASM_OPERANDS.
5163 In that case, it is the original input-operand vector. */
5164 static rtvec orig_asm_operands_vector;
5166 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5167 copied an ASM_OPERANDS.
5168 In that case, it is the copied input-operand vector. */
5169 static rtvec copy_asm_operands_vector;
5171 /* Likewise for the constraints vector. */
5172 static rtvec orig_asm_constraints_vector;
5173 static rtvec copy_asm_constraints_vector;
5175 /* Recursively create a new copy of an rtx for copy_insn.
5176 This function differs from copy_rtx in that it handles SCRATCHes and
5177 ASM_OPERANDs properly.
5178 Normally, this function is not used directly; use copy_insn as front end.
5179 However, you could first copy an insn pattern with copy_insn and then use
5180 this function afterwards to properly copy any REG_NOTEs containing
5184 copy_insn_1 (rtx orig)
5189 const char *format_ptr;
5194 code = GET_CODE (orig);
5209 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5214 for (i = 0; i < copy_insn_n_scratches; i++)
5215 if (copy_insn_scratch_in[i] == orig)
5216 return copy_insn_scratch_out[i];
5220 if (shared_const_p (orig))
5224 /* A MEM with a constant address is not sharable. The problem is that
5225 the constant address may need to be reloaded. If the mem is shared,
5226 then reloading one copy of this mem will cause all copies to appear
5227 to have been reloaded. */
5233 /* Copy the various flags, fields, and other information. We assume
5234 that all fields need copying, and then clear the fields that should
5235 not be copied. That is the sensible default behavior, and forces
5236 us to explicitly document why we are *not* copying a flag. */
5237 copy = shallow_copy_rtx (orig);
5239 /* We do not copy the USED flag, which is used as a mark bit during
5240 walks over the RTL. */
5241 RTX_FLAG (copy, used) = 0;
5243 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5246 RTX_FLAG (copy, jump) = 0;
5247 RTX_FLAG (copy, call) = 0;
5248 RTX_FLAG (copy, frame_related) = 0;
5251 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5253 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5254 switch (*format_ptr++)
5257 if (XEXP (orig, i) != NULL)
5258 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5263 if (XVEC (orig, i) == orig_asm_constraints_vector)
5264 XVEC (copy, i) = copy_asm_constraints_vector;
5265 else if (XVEC (orig, i) == orig_asm_operands_vector)
5266 XVEC (copy, i) = copy_asm_operands_vector;
5267 else if (XVEC (orig, i) != NULL)
5269 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5270 for (j = 0; j < XVECLEN (copy, i); j++)
5271 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5282 /* These are left unchanged. */
5289 if (code == SCRATCH)
5291 i = copy_insn_n_scratches++;
5292 gcc_assert (i < MAX_RECOG_OPERANDS);
5293 copy_insn_scratch_in[i] = orig;
5294 copy_insn_scratch_out[i] = copy;
5296 else if (code == ASM_OPERANDS)
5298 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5299 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5300 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5301 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5307 /* Create a new copy of an rtx.
5308 This function differs from copy_rtx in that it handles SCRATCHes and
5309 ASM_OPERANDs properly.
5310 INSN doesn't really have to be a full INSN; it could be just the
5313 copy_insn (rtx insn)
5315 copy_insn_n_scratches = 0;
5316 orig_asm_operands_vector = 0;
5317 orig_asm_constraints_vector = 0;
5318 copy_asm_operands_vector = 0;
5319 copy_asm_constraints_vector = 0;
5320 return copy_insn_1 (insn);
5323 /* Initialize data structures and variables in this file
5324 before generating rtl for each function. */
5329 set_first_insn (NULL);
5330 set_last_insn (NULL);
5331 if (MIN_NONDEBUG_INSN_UID)
5332 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5335 cur_debug_insn_uid = 1;
5336 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5337 last_location = UNKNOWN_LOCATION;
5338 first_label_num = label_num;
5341 /* Init the tables that describe all the pseudo regs. */
5343 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5345 crtl->emit.regno_pointer_align
5346 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5348 regno_reg_rtx = ggc_alloc_vec_rtx (crtl->emit.regno_pointer_align_length);
5350 /* Put copies of all the hard registers into regno_reg_rtx. */
5351 memcpy (regno_reg_rtx,
5352 initial_regno_reg_rtx,
5353 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5355 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5356 init_virtual_regs ();
5358 /* Indicate that the virtual registers and stack locations are
5360 REG_POINTER (stack_pointer_rtx) = 1;
5361 REG_POINTER (frame_pointer_rtx) = 1;
5362 REG_POINTER (hard_frame_pointer_rtx) = 1;
5363 REG_POINTER (arg_pointer_rtx) = 1;
5365 REG_POINTER (virtual_incoming_args_rtx) = 1;
5366 REG_POINTER (virtual_stack_vars_rtx) = 1;
5367 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5368 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5369 REG_POINTER (virtual_cfa_rtx) = 1;
5371 #ifdef STACK_BOUNDARY
5372 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5373 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5374 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5375 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5377 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5378 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5379 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5380 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5381 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5384 #ifdef INIT_EXPANDERS
5389 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5392 gen_const_vector (enum machine_mode mode, int constant)
5397 enum machine_mode inner;
5399 units = GET_MODE_NUNITS (mode);
5400 inner = GET_MODE_INNER (mode);
5402 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5404 v = rtvec_alloc (units);
5406 /* We need to call this function after we set the scalar const_tiny_rtx
5408 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5410 for (i = 0; i < units; ++i)
5411 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5413 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5417 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5418 all elements are zero, and the one vector when all elements are one. */
5420 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5422 enum machine_mode inner = GET_MODE_INNER (mode);
5423 int nunits = GET_MODE_NUNITS (mode);
5427 /* Check to see if all of the elements have the same value. */
5428 x = RTVEC_ELT (v, nunits - 1);
5429 for (i = nunits - 2; i >= 0; i--)
5430 if (RTVEC_ELT (v, i) != x)
5433 /* If the values are all the same, check to see if we can use one of the
5434 standard constant vectors. */
5437 if (x == CONST0_RTX (inner))
5438 return CONST0_RTX (mode);
5439 else if (x == CONST1_RTX (inner))
5440 return CONST1_RTX (mode);
5443 return gen_rtx_raw_CONST_VECTOR (mode, v);
5446 /* Initialise global register information required by all functions. */
5449 init_emit_regs (void)
5452 enum machine_mode mode;
5455 /* Reset register attributes */
5456 htab_empty (reg_attrs_htab);
5458 /* We need reg_raw_mode, so initialize the modes now. */
5459 init_reg_modes_target ();
5461 /* Assign register numbers to the globally defined register rtx. */
5462 pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
5463 ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
5464 cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
5465 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5466 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5467 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5468 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5469 virtual_incoming_args_rtx =
5470 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5471 virtual_stack_vars_rtx =
5472 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5473 virtual_stack_dynamic_rtx =
5474 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5475 virtual_outgoing_args_rtx =
5476 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5477 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5478 virtual_preferred_stack_boundary_rtx =
5479 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5481 /* Initialize RTL for commonly used hard registers. These are
5482 copied into regno_reg_rtx as we begin to compile each function. */
5483 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5484 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5486 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5487 return_address_pointer_rtx
5488 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5491 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5492 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5494 pic_offset_table_rtx = NULL_RTX;
5496 for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
5498 mode = (enum machine_mode) i;
5499 attrs = ggc_alloc_cleared_mem_attrs ();
5500 attrs->align = BITS_PER_UNIT;
5501 attrs->addrspace = ADDR_SPACE_GENERIC;
5502 if (mode != BLKmode)
5504 attrs->size = GEN_INT (GET_MODE_SIZE (mode));
5505 if (STRICT_ALIGNMENT)
5506 attrs->align = GET_MODE_ALIGNMENT (mode);
5508 mode_mem_attrs[i] = attrs;
5512 /* Create some permanent unique rtl objects shared between all functions. */
5515 init_emit_once (void)
5518 enum machine_mode mode;
5519 enum machine_mode double_mode;
5521 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5523 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5524 const_int_htab_eq, NULL);
5526 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5527 const_double_htab_eq, NULL);
5529 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5530 const_fixed_htab_eq, NULL);
5532 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5533 mem_attrs_htab_eq, NULL);
5534 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5535 reg_attrs_htab_eq, NULL);
5537 /* Compute the word and byte modes. */
5539 byte_mode = VOIDmode;
5540 word_mode = VOIDmode;
5541 double_mode = VOIDmode;
5543 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5545 mode = GET_MODE_WIDER_MODE (mode))
5547 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5548 && byte_mode == VOIDmode)
5551 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5552 && word_mode == VOIDmode)
5556 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5558 mode = GET_MODE_WIDER_MODE (mode))
5560 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5561 && double_mode == VOIDmode)
5565 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5567 #ifdef INIT_EXPANDERS
5568 /* This is to initialize {init|mark|free}_machine_status before the first
5569 call to push_function_context_to. This is needed by the Chill front
5570 end which calls push_function_context_to before the first call to
5571 init_function_start. */
5575 /* Create the unique rtx's for certain rtx codes and operand values. */
5577 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5578 tries to use these variables. */
5579 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5580 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5581 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5583 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5584 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5585 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5587 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5589 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5590 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5591 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5596 dconsthalf = dconst1;
5597 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5599 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5601 const REAL_VALUE_TYPE *const r =
5602 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5604 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5606 mode = GET_MODE_WIDER_MODE (mode))
5607 const_tiny_rtx[i][(int) mode] =
5608 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5610 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5612 mode = GET_MODE_WIDER_MODE (mode))
5613 const_tiny_rtx[i][(int) mode] =
5614 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5616 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5618 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5620 mode = GET_MODE_WIDER_MODE (mode))
5621 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5623 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5625 mode = GET_MODE_WIDER_MODE (mode))
5626 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5629 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5631 mode = GET_MODE_WIDER_MODE (mode))
5633 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5634 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5637 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5639 mode = GET_MODE_WIDER_MODE (mode))
5641 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5642 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5645 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5647 mode = GET_MODE_WIDER_MODE (mode))
5649 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5650 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5653 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5655 mode = GET_MODE_WIDER_MODE (mode))
5657 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5658 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5661 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5663 mode = GET_MODE_WIDER_MODE (mode))
5665 FCONST0(mode).data.high = 0;
5666 FCONST0(mode).data.low = 0;
5667 FCONST0(mode).mode = mode;
5668 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5669 FCONST0 (mode), mode);
5672 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5674 mode = GET_MODE_WIDER_MODE (mode))
5676 FCONST0(mode).data.high = 0;
5677 FCONST0(mode).data.low = 0;
5678 FCONST0(mode).mode = mode;
5679 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5680 FCONST0 (mode), mode);
5683 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5685 mode = GET_MODE_WIDER_MODE (mode))
5687 FCONST0(mode).data.high = 0;
5688 FCONST0(mode).data.low = 0;
5689 FCONST0(mode).mode = mode;
5690 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5691 FCONST0 (mode), mode);
5693 /* We store the value 1. */
5694 FCONST1(mode).data.high = 0;
5695 FCONST1(mode).data.low = 0;
5696 FCONST1(mode).mode = mode;
5697 lshift_double (1, 0, GET_MODE_FBIT (mode),
5698 2 * HOST_BITS_PER_WIDE_INT,
5699 &FCONST1(mode).data.low,
5700 &FCONST1(mode).data.high,
5701 SIGNED_FIXED_POINT_MODE_P (mode));
5702 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5703 FCONST1 (mode), mode);
5706 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5708 mode = GET_MODE_WIDER_MODE (mode))
5710 FCONST0(mode).data.high = 0;
5711 FCONST0(mode).data.low = 0;
5712 FCONST0(mode).mode = mode;
5713 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5714 FCONST0 (mode), mode);
5716 /* We store the value 1. */
5717 FCONST1(mode).data.high = 0;
5718 FCONST1(mode).data.low = 0;
5719 FCONST1(mode).mode = mode;
5720 lshift_double (1, 0, GET_MODE_FBIT (mode),
5721 2 * HOST_BITS_PER_WIDE_INT,
5722 &FCONST1(mode).data.low,
5723 &FCONST1(mode).data.high,
5724 SIGNED_FIXED_POINT_MODE_P (mode));
5725 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5726 FCONST1 (mode), mode);
5729 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5731 mode = GET_MODE_WIDER_MODE (mode))
5733 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5736 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5738 mode = GET_MODE_WIDER_MODE (mode))
5740 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5743 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5745 mode = GET_MODE_WIDER_MODE (mode))
5747 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5748 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5751 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5753 mode = GET_MODE_WIDER_MODE (mode))
5755 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5756 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5759 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5760 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5761 const_tiny_rtx[0][i] = const0_rtx;
5763 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5764 if (STORE_FLAG_VALUE == 1)
5765 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5768 /* Produce exact duplicate of insn INSN after AFTER.
5769 Care updating of libcall regions if present. */
5772 emit_copy_of_insn_after (rtx insn, rtx after)
5776 switch (GET_CODE (insn))
5779 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5783 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5787 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5791 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5792 if (CALL_INSN_FUNCTION_USAGE (insn))
5793 CALL_INSN_FUNCTION_USAGE (new_rtx)
5794 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5795 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5796 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5797 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5798 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5799 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5806 /* Update LABEL_NUSES. */
5807 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5809 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5811 /* If the old insn is frame related, then so is the new one. This is
5812 primarily needed for IA-64 unwind info which marks epilogue insns,
5813 which may be duplicated by the basic block reordering code. */
5814 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5816 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5817 will make them. REG_LABEL_TARGETs are created there too, but are
5818 supposed to be sticky, so we copy them. */
5819 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5820 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5822 if (GET_CODE (link) == EXPR_LIST)
5823 add_reg_note (new_rtx, REG_NOTE_KIND (link),
5824 copy_insn_1 (XEXP (link, 0)));
5826 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
5829 INSN_CODE (new_rtx) = INSN_CODE (insn);
5833 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5835 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5837 if (hard_reg_clobbers[mode][regno])
5838 return hard_reg_clobbers[mode][regno];
5840 return (hard_reg_clobbers[mode][regno] =
5841 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5844 #include "gt-emit-rtl.h"