1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num = 1;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these are unique; no other rtx-object will be equal to any
81 rtx global_rtl[GR_MAX];
83 /* Commonly used RTL for hard registers. These objects are not necessarily
84 unique, so we allocate them separately from global_rtl. They are
85 initialized once per compilation unit, then copied into regno_reg_rtx
86 at the beginning of each function. */
87 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
89 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
90 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
91 record a copy of const[012]_rtx. */
93 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
97 REAL_VALUE_TYPE dconst0;
98 REAL_VALUE_TYPE dconst1;
99 REAL_VALUE_TYPE dconst2;
100 REAL_VALUE_TYPE dconst3;
101 REAL_VALUE_TYPE dconst10;
102 REAL_VALUE_TYPE dconstm1;
103 REAL_VALUE_TYPE dconstm2;
104 REAL_VALUE_TYPE dconsthalf;
105 REAL_VALUE_TYPE dconstthird;
106 REAL_VALUE_TYPE dconstpi;
107 REAL_VALUE_TYPE dconste;
109 /* All references to the following fixed hard registers go through
110 these unique rtl objects. On machines where the frame-pointer and
111 arg-pointer are the same register, they use the same unique object.
113 After register allocation, other rtl objects which used to be pseudo-regs
114 may be clobbered to refer to the frame-pointer register.
115 But references that were originally to the frame-pointer can be
116 distinguished from the others because they contain frame_pointer_rtx.
118 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
119 tricky: until register elimination has taken place hard_frame_pointer_rtx
120 should be used if it is being set, and frame_pointer_rtx otherwise. After
121 register elimination hard_frame_pointer_rtx should always be used.
122 On machines where the two registers are same (most) then these are the
125 In an inline procedure, the stack and frame pointer rtxs may not be
126 used for anything else. */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
146 htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
150 htab_t mem_attrs_htab;
152 /* A hash table storing register attribute structures. */
153 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
154 htab_t reg_attrs_htab;
156 /* A hash table storing all CONST_DOUBLEs. */
157 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
158 htab_t const_double_htab;
160 #define first_insn (cfun->emit->x_first_insn)
161 #define last_insn (cfun->emit->x_last_insn)
162 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
163 #define last_location (cfun->emit->x_last_location)
164 #define first_label_num (cfun->emit->x_first_label_num)
166 static rtx make_jump_insn_raw (rtx);
167 static rtx make_call_insn_raw (rtx);
168 static rtx find_line_note (rtx);
169 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
170 static void unshare_all_decls (tree);
171 static void reset_used_decls (tree);
172 static void mark_label_nuses (rtx);
173 static hashval_t const_int_htab_hash (const void *);
174 static int const_int_htab_eq (const void *, const void *);
175 static hashval_t const_double_htab_hash (const void *);
176 static int const_double_htab_eq (const void *, const void *);
177 static rtx lookup_const_double (rtx);
178 static hashval_t mem_attrs_htab_hash (const void *);
179 static int mem_attrs_htab_eq (const void *, const void *);
180 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
182 static hashval_t reg_attrs_htab_hash (const void *);
183 static int reg_attrs_htab_eq (const void *, const void *);
184 static reg_attrs *get_reg_attrs (tree, int);
185 static tree component_ref_for_mem_expr (tree);
186 static rtx gen_const_vector (enum machine_mode, int);
187 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
188 static void copy_rtx_if_shared_1 (rtx *orig);
190 /* Probability of the conditional branch currently proceeded by try_split.
191 Set to -1 otherwise. */
192 int split_branch_probability = -1;
194 /* Returns a hash code for X (which is a really a CONST_INT). */
197 const_int_htab_hash (const void *x)
199 return (hashval_t) INTVAL ((rtx) x);
202 /* Returns nonzero if the value represented by X (which is really a
203 CONST_INT) is the same as that given by Y (which is really a
207 const_int_htab_eq (const void *x, const void *y)
209 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
212 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
214 const_double_htab_hash (const void *x)
219 if (GET_MODE (value) == VOIDmode)
220 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
223 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
224 /* MODE is used in the comparison, so it should be in the hash. */
225 h ^= GET_MODE (value);
230 /* Returns nonzero if the value represented by X (really a ...)
231 is the same as that represented by Y (really a ...) */
233 const_double_htab_eq (const void *x, const void *y)
235 rtx a = (rtx)x, b = (rtx)y;
237 if (GET_MODE (a) != GET_MODE (b))
239 if (GET_MODE (a) == VOIDmode)
240 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
241 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
243 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
244 CONST_DOUBLE_REAL_VALUE (b));
247 /* Returns a hash code for X (which is a really a mem_attrs *). */
250 mem_attrs_htab_hash (const void *x)
252 mem_attrs *p = (mem_attrs *) x;
254 return (p->alias ^ (p->align * 1000)
255 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
256 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
260 /* Returns nonzero if the value represented by X (which is really a
261 mem_attrs *) is the same as that given by Y (which is also really a
265 mem_attrs_htab_eq (const void *x, const void *y)
267 mem_attrs *p = (mem_attrs *) x;
268 mem_attrs *q = (mem_attrs *) y;
270 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
271 && p->size == q->size && p->align == q->align);
274 /* Allocate a new mem_attrs structure and insert it into the hash table if
275 one identical to it is not already in the table. We are doing this for
279 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
280 unsigned int align, enum machine_mode mode)
285 /* If everything is the default, we can just return zero.
286 This must match what the corresponding MEM_* macros return when the
287 field is not present. */
288 if (alias == 0 && expr == 0 && offset == 0
290 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
291 && (STRICT_ALIGNMENT && mode != BLKmode
292 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
297 attrs.offset = offset;
301 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
304 *slot = ggc_alloc (sizeof (mem_attrs));
305 memcpy (*slot, &attrs, sizeof (mem_attrs));
311 /* Returns a hash code for X (which is a really a reg_attrs *). */
314 reg_attrs_htab_hash (const void *x)
316 reg_attrs *p = (reg_attrs *) x;
318 return ((p->offset * 1000) ^ (long) p->decl);
321 /* Returns nonzero if the value represented by X (which is really a
322 reg_attrs *) is the same as that given by Y (which is also really a
326 reg_attrs_htab_eq (const void *x, const void *y)
328 reg_attrs *p = (reg_attrs *) x;
329 reg_attrs *q = (reg_attrs *) y;
331 return (p->decl == q->decl && p->offset == q->offset);
333 /* Allocate a new reg_attrs structure and insert it into the hash table if
334 one identical to it is not already in the table. We are doing this for
338 get_reg_attrs (tree decl, int offset)
343 /* If everything is the default, we can just return zero. */
344 if (decl == 0 && offset == 0)
348 attrs.offset = offset;
350 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
353 *slot = ggc_alloc (sizeof (reg_attrs));
354 memcpy (*slot, &attrs, sizeof (reg_attrs));
360 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
361 don't attempt to share with the various global pieces of rtl (such as
362 frame_pointer_rtx). */
365 gen_raw_REG (enum machine_mode mode, int regno)
367 rtx x = gen_rtx_raw_REG (mode, regno);
368 ORIGINAL_REGNO (x) = regno;
372 /* There are some RTL codes that require special attention; the generation
373 functions do the raw handling. If you add to this list, modify
374 special_rtx in gengenrtl.c as well. */
377 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
381 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
382 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
384 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
385 if (const_true_rtx && arg == STORE_FLAG_VALUE)
386 return const_true_rtx;
389 /* Look up the CONST_INT in the hash table. */
390 slot = htab_find_slot_with_hash (const_int_htab, &arg,
391 (hashval_t) arg, INSERT);
393 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
399 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
401 return GEN_INT (trunc_int_for_mode (c, mode));
404 /* CONST_DOUBLEs might be created from pairs of integers, or from
405 REAL_VALUE_TYPEs. Also, their length is known only at run time,
406 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
408 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
409 hash table. If so, return its counterpart; otherwise add it
410 to the hash table and return it. */
412 lookup_const_double (rtx real)
414 void **slot = htab_find_slot (const_double_htab, real, INSERT);
421 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
422 VALUE in mode MODE. */
424 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
426 rtx real = rtx_alloc (CONST_DOUBLE);
427 PUT_MODE (real, mode);
429 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
431 return lookup_const_double (real);
434 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
435 of ints: I0 is the low-order word and I1 is the high-order word.
436 Do not use this routine for non-integer modes; convert to
437 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
440 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
445 if (mode != VOIDmode)
449 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
450 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
451 /* We can get a 0 for an error mark. */
452 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
453 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
455 /* We clear out all bits that don't belong in MODE, unless they and
456 our sign bit are all one. So we get either a reasonable negative
457 value or a reasonable unsigned value for this mode. */
458 width = GET_MODE_BITSIZE (mode);
459 if (width < HOST_BITS_PER_WIDE_INT
460 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
461 != ((HOST_WIDE_INT) (-1) << (width - 1))))
462 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
463 else if (width == HOST_BITS_PER_WIDE_INT
464 && ! (i1 == ~0 && i0 < 0))
467 /* We should be able to represent this value as a constant. */
468 gcc_assert (width <= 2 * HOST_BITS_PER_WIDE_INT);
470 /* If this would be an entire word for the target, but is not for
471 the host, then sign-extend on the host so that the number will
472 look the same way on the host that it would on the target.
474 For example, when building a 64 bit alpha hosted 32 bit sparc
475 targeted compiler, then we want the 32 bit unsigned value -1 to be
476 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
477 The latter confuses the sparc backend. */
479 if (width < HOST_BITS_PER_WIDE_INT
480 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
481 i0 |= ((HOST_WIDE_INT) (-1) << width);
483 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
486 ??? Strictly speaking, this is wrong if we create a CONST_INT for
487 a large unsigned constant with the size of MODE being
488 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
489 in a wider mode. In that case we will mis-interpret it as a
492 Unfortunately, the only alternative is to make a CONST_DOUBLE for
493 any constant in any mode if it is an unsigned constant larger
494 than the maximum signed integer in an int on the host. However,
495 doing this will break everyone that always expects to see a
496 CONST_INT for SImode and smaller.
498 We have always been making CONST_INTs in this case, so nothing
499 new is being broken. */
501 if (width <= HOST_BITS_PER_WIDE_INT)
502 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
505 /* If this integer fits in one word, return a CONST_INT. */
506 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
509 /* We use VOIDmode for integers. */
510 value = rtx_alloc (CONST_DOUBLE);
511 PUT_MODE (value, VOIDmode);
513 CONST_DOUBLE_LOW (value) = i0;
514 CONST_DOUBLE_HIGH (value) = i1;
516 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
517 XWINT (value, i) = 0;
519 return lookup_const_double (value);
523 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
525 /* In case the MD file explicitly references the frame pointer, have
526 all such references point to the same frame pointer. This is
527 used during frame pointer elimination to distinguish the explicit
528 references to these registers from pseudos that happened to be
531 If we have eliminated the frame pointer or arg pointer, we will
532 be using it as a normal register, for example as a spill
533 register. In such cases, we might be accessing it in a mode that
534 is not Pmode and therefore cannot use the pre-allocated rtx.
536 Also don't do this when we are making new REGs in reload, since
537 we don't want to get confused with the real pointers. */
539 if (mode == Pmode && !reload_in_progress)
541 if (regno == FRAME_POINTER_REGNUM
542 && (!reload_completed || frame_pointer_needed))
543 return frame_pointer_rtx;
544 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
545 if (regno == HARD_FRAME_POINTER_REGNUM
546 && (!reload_completed || frame_pointer_needed))
547 return hard_frame_pointer_rtx;
549 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
550 if (regno == ARG_POINTER_REGNUM)
551 return arg_pointer_rtx;
553 #ifdef RETURN_ADDRESS_POINTER_REGNUM
554 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
555 return return_address_pointer_rtx;
557 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
558 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
559 return pic_offset_table_rtx;
560 if (regno == STACK_POINTER_REGNUM)
561 return stack_pointer_rtx;
565 /* If the per-function register table has been set up, try to re-use
566 an existing entry in that table to avoid useless generation of RTL.
568 This code is disabled for now until we can fix the various backends
569 which depend on having non-shared hard registers in some cases. Long
570 term we want to re-enable this code as it can significantly cut down
571 on the amount of useless RTL that gets generated.
573 We'll also need to fix some code that runs after reload that wants to
574 set ORIGINAL_REGNO. */
579 && regno < FIRST_PSEUDO_REGISTER
580 && reg_raw_mode[regno] == mode)
581 return regno_reg_rtx[regno];
584 return gen_raw_REG (mode, regno);
588 gen_rtx_MEM (enum machine_mode mode, rtx addr)
590 rtx rt = gen_rtx_raw_MEM (mode, addr);
592 /* This field is not cleared by the mere allocation of the rtx, so
599 /* Generate a memory referring to non-trapping constant memory. */
602 gen_const_mem (enum machine_mode mode, rtx addr)
604 rtx mem = gen_rtx_MEM (mode, addr);
605 MEM_READONLY_P (mem) = 1;
606 MEM_NOTRAP_P (mem) = 1;
611 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
613 /* This is the most common failure type.
614 Catch it early so we can see who does it. */
615 gcc_assert (!(offset % GET_MODE_SIZE (mode)));
617 /* This check isn't usable right now because combine will
618 throw arbitrary crap like a CALL into a SUBREG in
619 gen_lowpart_for_combine so we must just eat it. */
621 /* Check for this too. */
622 gcc_assert (offset < GET_MODE_SIZE (GET_MODE (reg)));
624 return gen_rtx_raw_SUBREG (mode, reg, offset);
627 /* Generate a SUBREG representing the least-significant part of REG if MODE
628 is smaller than mode of REG, otherwise paradoxical SUBREG. */
631 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
633 enum machine_mode inmode;
635 inmode = GET_MODE (reg);
636 if (inmode == VOIDmode)
638 return gen_rtx_SUBREG (mode, reg,
639 subreg_lowpart_offset (mode, inmode));
642 /* gen_rtvec (n, [rt1, ..., rtn])
644 ** This routine creates an rtvec and stores within it the
645 ** pointers to rtx's which are its arguments.
650 gen_rtvec (int n, ...)
659 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
661 vector = alloca (n * sizeof (rtx));
663 for (i = 0; i < n; i++)
664 vector[i] = va_arg (p, rtx);
666 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
670 return gen_rtvec_v (save_n, vector);
674 gen_rtvec_v (int n, rtx *argp)
680 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
682 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
684 for (i = 0; i < n; i++)
685 rt_val->elem[i] = *argp++;
690 /* Generate a REG rtx for a new pseudo register of mode MODE.
691 This pseudo is assigned the next sequential register number. */
694 gen_reg_rtx (enum machine_mode mode)
696 struct function *f = cfun;
699 /* Don't let anything called after initial flow analysis create new
701 gcc_assert (!no_new_pseudos);
703 if (generating_concat_p
704 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
705 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
707 /* For complex modes, don't make a single pseudo.
708 Instead, make a CONCAT of two pseudos.
709 This allows noncontiguous allocation of the real and imaginary parts,
710 which makes much better code. Besides, allocating DCmode
711 pseudos overstrains reload on some machines like the 386. */
712 rtx realpart, imagpart;
713 enum machine_mode partmode = GET_MODE_INNER (mode);
715 realpart = gen_reg_rtx (partmode);
716 imagpart = gen_reg_rtx (partmode);
717 return gen_rtx_CONCAT (mode, realpart, imagpart);
720 /* Make sure regno_pointer_align, and regno_reg_rtx are large
721 enough to have an element for this pseudo reg number. */
723 if (reg_rtx_no == f->emit->regno_pointer_align_length)
725 int old_size = f->emit->regno_pointer_align_length;
729 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
730 memset (new + old_size, 0, old_size);
731 f->emit->regno_pointer_align = (unsigned char *) new;
733 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
734 old_size * 2 * sizeof (rtx));
735 memset (new1 + old_size, 0, old_size * sizeof (rtx));
736 regno_reg_rtx = new1;
738 f->emit->regno_pointer_align_length = old_size * 2;
741 val = gen_raw_REG (mode, reg_rtx_no);
742 regno_reg_rtx[reg_rtx_no++] = val;
746 /* Generate a register with same attributes as REG, but offsetted by OFFSET.
747 Do the big endian correction if needed. */
750 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
752 rtx new = gen_rtx_REG (mode, regno);
754 HOST_WIDE_INT var_size;
756 /* PR middle-end/14084
757 The problem appears when a variable is stored in a larger register
758 and later it is used in the original mode or some mode in between
759 or some part of variable is accessed.
761 On little endian machines there is no problem because
762 the REG_OFFSET of the start of the variable is the same when
763 accessed in any mode (it is 0).
765 However, this is not true on big endian machines.
766 The offset of the start of the variable is different when accessed
768 When we are taking a part of the REG we have to change the OFFSET
769 from offset WRT size of mode of REG to offset WRT size of variable.
771 If we would not do the big endian correction the resulting REG_OFFSET
772 would be larger than the size of the DECL.
774 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
776 REG.mode MODE DECL size old offset new offset description
777 DI SI 4 4 0 int32 in SImode
778 DI SI 1 4 0 char in SImode
779 DI QI 1 7 0 char in QImode
780 DI QI 4 5 1 1st element in QImode
782 DI HI 4 6 2 1st element in HImode
785 If the size of DECL is equal or greater than the size of REG
786 we can't do this correction because the register holds the
787 whole variable or a part of the variable and thus the REG_OFFSET
788 is already correct. */
790 decl = REG_EXPR (reg);
791 if ((BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
794 && GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode)
795 && ((var_size = int_size_in_bytes (TREE_TYPE (decl))) > 0
796 && var_size < GET_MODE_SIZE (GET_MODE (reg))))
800 /* Convert machine endian to little endian WRT size of mode of REG. */
801 if (WORDS_BIG_ENDIAN)
802 offset_le = ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
803 / UNITS_PER_WORD) * UNITS_PER_WORD;
805 offset_le = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
807 if (BYTES_BIG_ENDIAN)
808 offset_le += ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
811 offset_le += offset % UNITS_PER_WORD;
813 if (offset_le >= var_size)
815 /* MODE is wider than the variable so the new reg will cover
816 the whole variable so the resulting OFFSET should be 0. */
821 /* Convert little endian to machine endian WRT size of variable. */
822 if (WORDS_BIG_ENDIAN)
823 offset = ((var_size - 1 - offset_le)
824 / UNITS_PER_WORD) * UNITS_PER_WORD;
826 offset = (offset_le / UNITS_PER_WORD) * UNITS_PER_WORD;
828 if (BYTES_BIG_ENDIAN)
829 offset += ((var_size - 1 - offset_le)
832 offset += offset_le % UNITS_PER_WORD;
836 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
837 REG_OFFSET (reg) + offset);
841 /* Set the decl for MEM to DECL. */
844 set_reg_attrs_from_mem (rtx reg, rtx mem)
846 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
848 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
851 /* Set the register attributes for registers contained in PARM_RTX.
852 Use needed values from memory attributes of MEM. */
855 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
857 if (REG_P (parm_rtx))
858 set_reg_attrs_from_mem (parm_rtx, mem);
859 else if (GET_CODE (parm_rtx) == PARALLEL)
861 /* Check for a NULL entry in the first slot, used to indicate that the
862 parameter goes both on the stack and in registers. */
863 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
864 for (; i < XVECLEN (parm_rtx, 0); i++)
866 rtx x = XVECEXP (parm_rtx, 0, i);
867 if (REG_P (XEXP (x, 0)))
868 REG_ATTRS (XEXP (x, 0))
869 = get_reg_attrs (MEM_EXPR (mem),
870 INTVAL (XEXP (x, 1)));
875 /* Assign the RTX X to declaration T. */
877 set_decl_rtl (tree t, rtx x)
879 DECL_CHECK (t)->decl.rtl = x;
883 /* For register, we maintain the reverse information too. */
885 REG_ATTRS (x) = get_reg_attrs (t, 0);
886 else if (GET_CODE (x) == SUBREG)
887 REG_ATTRS (SUBREG_REG (x))
888 = get_reg_attrs (t, -SUBREG_BYTE (x));
889 if (GET_CODE (x) == CONCAT)
891 if (REG_P (XEXP (x, 0)))
892 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
893 if (REG_P (XEXP (x, 1)))
894 REG_ATTRS (XEXP (x, 1))
895 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
897 if (GET_CODE (x) == PARALLEL)
900 for (i = 0; i < XVECLEN (x, 0); i++)
902 rtx y = XVECEXP (x, 0, i);
903 if (REG_P (XEXP (y, 0)))
904 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
909 /* Assign the RTX X to parameter declaration T. */
911 set_decl_incoming_rtl (tree t, rtx x)
913 DECL_INCOMING_RTL (t) = x;
917 /* For register, we maintain the reverse information too. */
919 REG_ATTRS (x) = get_reg_attrs (t, 0);
920 else if (GET_CODE (x) == SUBREG)
921 REG_ATTRS (SUBREG_REG (x))
922 = get_reg_attrs (t, -SUBREG_BYTE (x));
923 if (GET_CODE (x) == CONCAT)
925 if (REG_P (XEXP (x, 0)))
926 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
927 if (REG_P (XEXP (x, 1)))
928 REG_ATTRS (XEXP (x, 1))
929 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
931 if (GET_CODE (x) == PARALLEL)
935 /* Check for a NULL entry, used to indicate that the parameter goes
936 both on the stack and in registers. */
937 if (XEXP (XVECEXP (x, 0, 0), 0))
942 for (i = start; i < XVECLEN (x, 0); i++)
944 rtx y = XVECEXP (x, 0, i);
945 if (REG_P (XEXP (y, 0)))
946 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
951 /* Identify REG (which may be a CONCAT) as a user register. */
954 mark_user_reg (rtx reg)
956 if (GET_CODE (reg) == CONCAT)
958 REG_USERVAR_P (XEXP (reg, 0)) = 1;
959 REG_USERVAR_P (XEXP (reg, 1)) = 1;
963 gcc_assert (REG_P (reg));
964 REG_USERVAR_P (reg) = 1;
968 /* Identify REG as a probable pointer register and show its alignment
969 as ALIGN, if nonzero. */
972 mark_reg_pointer (rtx reg, int align)
974 if (! REG_POINTER (reg))
976 REG_POINTER (reg) = 1;
979 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
981 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
982 /* We can no-longer be sure just how aligned this pointer is. */
983 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
986 /* Return 1 plus largest pseudo reg number used in the current function. */
994 /* Return 1 + the largest label number used so far in the current function. */
1002 /* Return first label number used in this function (if any were used). */
1005 get_first_label_num (void)
1007 return first_label_num;
1010 /* If the rtx for label was created during the expansion of a nested
1011 function, then first_label_num won't include this label number.
1012 Fix this now so that array indicies work later. */
1015 maybe_set_first_label_num (rtx x)
1017 if (CODE_LABEL_NUMBER (x) < first_label_num)
1018 first_label_num = CODE_LABEL_NUMBER (x);
1021 /* Return the final regno of X, which is a SUBREG of a hard
1024 subreg_hard_regno (rtx x, int check_mode)
1026 enum machine_mode mode = GET_MODE (x);
1027 unsigned int byte_offset, base_regno, final_regno;
1028 rtx reg = SUBREG_REG (x);
1030 /* This is where we attempt to catch illegal subregs
1031 created by the compiler. */
1032 gcc_assert (GET_CODE (x) == SUBREG && REG_P (reg));
1033 base_regno = REGNO (reg);
1034 gcc_assert (base_regno < FIRST_PSEUDO_REGISTER);
1035 gcc_assert (!check_mode || HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)));
1036 #ifdef ENABLE_CHECKING
1037 gcc_assert (subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1038 SUBREG_BYTE (x), mode));
1040 /* Catch non-congruent offsets too. */
1041 byte_offset = SUBREG_BYTE (x);
1042 gcc_assert (!(byte_offset % GET_MODE_SIZE (mode)));
1044 final_regno = subreg_regno (x);
1049 /* Return a value representing some low-order bits of X, where the number
1050 of low-order bits is given by MODE. Note that no conversion is done
1051 between floating-point and fixed-point values, rather, the bit
1052 representation is returned.
1054 This function handles the cases in common between gen_lowpart, below,
1055 and two variants in cse.c and combine.c. These are the cases that can
1056 be safely handled at all points in the compilation.
1058 If this is not a case we can handle, return 0. */
1061 gen_lowpart_common (enum machine_mode mode, rtx x)
1063 int msize = GET_MODE_SIZE (mode);
1066 enum machine_mode innermode;
1068 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1069 so we have to make one up. Yuk. */
1070 innermode = GET_MODE (x);
1071 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
1072 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1073 else if (innermode == VOIDmode)
1074 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1076 xsize = GET_MODE_SIZE (innermode);
1078 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1080 if (innermode == mode)
1083 /* MODE must occupy no more words than the mode of X. */
1084 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1085 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1088 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1089 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1092 offset = subreg_lowpart_offset (mode, innermode);
1094 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1095 && (GET_MODE_CLASS (mode) == MODE_INT
1096 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1098 /* If we are getting the low-order part of something that has been
1099 sign- or zero-extended, we can either just use the object being
1100 extended or make a narrower extension. If we want an even smaller
1101 piece than the size of the object being extended, call ourselves
1104 This case is used mostly by combine and cse. */
1106 if (GET_MODE (XEXP (x, 0)) == mode)
1108 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1109 return gen_lowpart_common (mode, XEXP (x, 0));
1110 else if (msize < xsize)
1111 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1113 else if (GET_CODE (x) == SUBREG || REG_P (x)
1114 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1115 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1116 return simplify_gen_subreg (mode, x, innermode, offset);
1118 /* Otherwise, we can't do this. */
1122 /* Return the constant real or imaginary part (which has mode MODE)
1123 of a complex value X. The IMAGPART_P argument determines whether
1124 the real or complex component should be returned. This function
1125 returns NULL_RTX if the component isn't a constant. */
1128 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1133 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1135 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1136 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1138 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1139 if (TREE_CODE (part) == REAL_CST
1140 || TREE_CODE (part) == INTEGER_CST)
1141 return expand_expr (part, NULL_RTX, mode, 0);
1147 /* Return the real part (which has mode MODE) of a complex value X.
1148 This always comes at the low address in memory. */
1151 gen_realpart (enum machine_mode mode, rtx x)
1155 /* Handle complex constants. */
1156 part = gen_complex_constant_part (mode, x, 0);
1157 if (part != NULL_RTX)
1160 if (WORDS_BIG_ENDIAN
1161 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1163 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1165 ("can't access real part of complex value in hard register");
1166 else if (WORDS_BIG_ENDIAN)
1167 return gen_highpart (mode, x);
1169 return gen_lowpart (mode, x);
1172 /* Return the imaginary part (which has mode MODE) of a complex value X.
1173 This always comes at the high address in memory. */
1176 gen_imagpart (enum machine_mode mode, rtx x)
1180 /* Handle complex constants. */
1181 part = gen_complex_constant_part (mode, x, 1);
1182 if (part != NULL_RTX)
1185 if (WORDS_BIG_ENDIAN)
1186 return gen_lowpart (mode, x);
1187 else if (! WORDS_BIG_ENDIAN
1188 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1190 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1192 ("can't access imaginary part of complex value in hard register");
1194 return gen_highpart (mode, x);
1198 gen_highpart (enum machine_mode mode, rtx x)
1200 unsigned int msize = GET_MODE_SIZE (mode);
1203 /* This case loses if X is a subreg. To catch bugs early,
1204 complain if an invalid MODE is used even in other cases. */
1205 gcc_assert (msize <= UNITS_PER_WORD
1206 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1208 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1209 subreg_highpart_offset (mode, GET_MODE (x)));
1210 gcc_assert (result);
1212 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1213 the target if we have a MEM. gen_highpart must return a valid operand,
1214 emitting code if necessary to do so. */
1217 result = validize_mem (result);
1218 gcc_assert (result);
1224 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1225 be VOIDmode constant. */
1227 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1229 if (GET_MODE (exp) != VOIDmode)
1231 gcc_assert (GET_MODE (exp) == innermode);
1232 return gen_highpart (outermode, exp);
1234 return simplify_gen_subreg (outermode, exp, innermode,
1235 subreg_highpart_offset (outermode, innermode));
1238 /* Return offset in bytes to get OUTERMODE low part
1239 of the value in mode INNERMODE stored in memory in target format. */
1242 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1244 unsigned int offset = 0;
1245 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1249 if (WORDS_BIG_ENDIAN)
1250 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1251 if (BYTES_BIG_ENDIAN)
1252 offset += difference % UNITS_PER_WORD;
1258 /* Return offset in bytes to get OUTERMODE high part
1259 of the value in mode INNERMODE stored in memory in target format. */
1261 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1263 unsigned int offset = 0;
1264 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1266 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1270 if (! WORDS_BIG_ENDIAN)
1271 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1272 if (! BYTES_BIG_ENDIAN)
1273 offset += difference % UNITS_PER_WORD;
1279 /* Return 1 iff X, assumed to be a SUBREG,
1280 refers to the least significant part of its containing reg.
1281 If X is not a SUBREG, always return 1 (it is its own low part!). */
1284 subreg_lowpart_p (rtx x)
1286 if (GET_CODE (x) != SUBREG)
1288 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1291 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1292 == SUBREG_BYTE (x));
1295 /* Return subword OFFSET of operand OP.
1296 The word number, OFFSET, is interpreted as the word number starting
1297 at the low-order address. OFFSET 0 is the low-order word if not
1298 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1300 If we cannot extract the required word, we return zero. Otherwise,
1301 an rtx corresponding to the requested word will be returned.
1303 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1304 reload has completed, a valid address will always be returned. After
1305 reload, if a valid address cannot be returned, we return zero.
1307 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1308 it is the responsibility of the caller.
1310 MODE is the mode of OP in case it is a CONST_INT.
1312 ??? This is still rather broken for some cases. The problem for the
1313 moment is that all callers of this thing provide no 'goal mode' to
1314 tell us to work with. This exists because all callers were written
1315 in a word based SUBREG world.
1316 Now use of this function can be deprecated by simplify_subreg in most
1321 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1323 if (mode == VOIDmode)
1324 mode = GET_MODE (op);
1326 gcc_assert (mode != VOIDmode);
1328 /* If OP is narrower than a word, fail. */
1330 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1333 /* If we want a word outside OP, return zero. */
1335 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1338 /* Form a new MEM at the requested address. */
1341 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1343 if (! validate_address)
1346 else if (reload_completed)
1348 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1352 return replace_equiv_address (new, XEXP (new, 0));
1355 /* Rest can be handled by simplify_subreg. */
1356 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1359 /* Similar to `operand_subword', but never return 0. If we can't extract
1360 the required subword, put OP into a register and try again. If that fails,
1361 abort. We always validate the address in this case.
1363 MODE is the mode of OP, in case it is CONST_INT. */
1366 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1368 rtx result = operand_subword (op, offset, 1, mode);
1373 if (mode != BLKmode && mode != VOIDmode)
1375 /* If this is a register which can not be accessed by words, copy it
1376 to a pseudo register. */
1378 op = copy_to_reg (op);
1380 op = force_reg (mode, op);
1383 result = operand_subword (op, offset, 1, mode);
1384 gcc_assert (result);
1389 /* Given a compare instruction, swap the operands.
1390 A test instruction is changed into a compare of 0 against the operand. */
1393 reverse_comparison (rtx insn)
1395 rtx body = PATTERN (insn);
1398 if (GET_CODE (body) == SET)
1399 comp = SET_SRC (body);
1401 comp = SET_SRC (XVECEXP (body, 0, 0));
1403 if (GET_CODE (comp) == COMPARE)
1405 rtx op0 = XEXP (comp, 0);
1406 rtx op1 = XEXP (comp, 1);
1407 XEXP (comp, 0) = op1;
1408 XEXP (comp, 1) = op0;
1412 rtx new = gen_rtx_COMPARE (VOIDmode,
1413 CONST0_RTX (GET_MODE (comp)), comp);
1414 if (GET_CODE (body) == SET)
1415 SET_SRC (body) = new;
1417 SET_SRC (XVECEXP (body, 0, 0)) = new;
1421 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1422 or (2) a component ref of something variable. Represent the later with
1423 a NULL expression. */
1426 component_ref_for_mem_expr (tree ref)
1428 tree inner = TREE_OPERAND (ref, 0);
1430 if (TREE_CODE (inner) == COMPONENT_REF)
1431 inner = component_ref_for_mem_expr (inner);
1434 /* Now remove any conversions: they don't change what the underlying
1435 object is. Likewise for SAVE_EXPR. */
1436 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1437 || TREE_CODE (inner) == NON_LVALUE_EXPR
1438 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1439 || TREE_CODE (inner) == SAVE_EXPR)
1440 inner = TREE_OPERAND (inner, 0);
1442 if (! DECL_P (inner))
1446 if (inner == TREE_OPERAND (ref, 0))
1449 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1450 TREE_OPERAND (ref, 1), NULL_TREE);
1453 /* Returns 1 if both MEM_EXPR can be considered equal
1457 mem_expr_equal_p (tree expr1, tree expr2)
1462 if (! expr1 || ! expr2)
1465 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1468 if (TREE_CODE (expr1) == COMPONENT_REF)
1470 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1471 TREE_OPERAND (expr2, 0))
1472 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1473 TREE_OPERAND (expr2, 1));
1475 if (INDIRECT_REF_P (expr1))
1476 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1477 TREE_OPERAND (expr2, 0));
1479 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1480 have been resolved here. */
1481 gcc_assert (DECL_P (expr1));
1483 /* Decls with different pointers can't be equal. */
1487 /* Given REF, a MEM, and T, either the type of X or the expression
1488 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1489 if we are making a new object of this type. BITPOS is nonzero if
1490 there is an offset outstanding on T that will be applied later. */
1493 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1494 HOST_WIDE_INT bitpos)
1496 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1497 tree expr = MEM_EXPR (ref);
1498 rtx offset = MEM_OFFSET (ref);
1499 rtx size = MEM_SIZE (ref);
1500 unsigned int align = MEM_ALIGN (ref);
1501 HOST_WIDE_INT apply_bitpos = 0;
1504 /* It can happen that type_for_mode was given a mode for which there
1505 is no language-level type. In which case it returns NULL, which
1510 type = TYPE_P (t) ? t : TREE_TYPE (t);
1511 if (type == error_mark_node)
1514 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1515 wrong answer, as it assumes that DECL_RTL already has the right alias
1516 info. Callers should not set DECL_RTL until after the call to
1517 set_mem_attributes. */
1518 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1520 /* Get the alias set from the expression or type (perhaps using a
1521 front-end routine) and use it. */
1522 alias = get_alias_set (t);
1524 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1525 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1526 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1527 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (t);
1529 /* If we are making an object of this type, or if this is a DECL, we know
1530 that it is a scalar if the type is not an aggregate. */
1531 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1532 MEM_SCALAR_P (ref) = 1;
1534 /* We can set the alignment from the type if we are making an object,
1535 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1536 if (objectp || TREE_CODE (t) == INDIRECT_REF
1537 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1538 || TYPE_ALIGN_OK (type))
1539 align = MAX (align, TYPE_ALIGN (type));
1541 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1543 if (integer_zerop (TREE_OPERAND (t, 1)))
1544 /* We don't know anything about the alignment. */
1545 align = BITS_PER_UNIT;
1547 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1550 /* If the size is known, we can set that. */
1551 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1552 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1554 /* If T is not a type, we may be able to deduce some more information about
1558 tree base = get_base_address (t);
1559 if (base && DECL_P (base)
1560 && TREE_READONLY (base)
1561 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1562 MEM_READONLY_P (ref) = 1;
1564 if (TREE_THIS_VOLATILE (t))
1565 MEM_VOLATILE_P (ref) = 1;
1567 /* Now remove any conversions: they don't change what the underlying
1568 object is. Likewise for SAVE_EXPR. */
1569 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1570 || TREE_CODE (t) == NON_LVALUE_EXPR
1571 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1572 || TREE_CODE (t) == SAVE_EXPR)
1573 t = TREE_OPERAND (t, 0);
1575 /* If this expression can't be addressed (e.g., it contains a reference
1576 to a non-addressable field), show we don't change its alias set. */
1577 if (! can_address_p (t))
1578 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1580 /* If this is a decl, set the attributes of the MEM from it. */
1584 offset = const0_rtx;
1585 apply_bitpos = bitpos;
1586 size = (DECL_SIZE_UNIT (t)
1587 && host_integerp (DECL_SIZE_UNIT (t), 1)
1588 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1589 align = DECL_ALIGN (t);
1592 /* If this is a constant, we know the alignment. */
1593 else if (CONSTANT_CLASS_P (t))
1595 align = TYPE_ALIGN (type);
1596 #ifdef CONSTANT_ALIGNMENT
1597 align = CONSTANT_ALIGNMENT (t, align);
1601 /* If this is a field reference and not a bit-field, record it. */
1602 /* ??? There is some information that can be gleened from bit-fields,
1603 such as the word offset in the structure that might be modified.
1604 But skip it for now. */
1605 else if (TREE_CODE (t) == COMPONENT_REF
1606 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1608 expr = component_ref_for_mem_expr (t);
1609 offset = const0_rtx;
1610 apply_bitpos = bitpos;
1611 /* ??? Any reason the field size would be different than
1612 the size we got from the type? */
1615 /* If this is an array reference, look for an outer field reference. */
1616 else if (TREE_CODE (t) == ARRAY_REF)
1618 tree off_tree = size_zero_node;
1619 /* We can't modify t, because we use it at the end of the
1625 tree index = TREE_OPERAND (t2, 1);
1626 tree low_bound = array_ref_low_bound (t2);
1627 tree unit_size = array_ref_element_size (t2);
1629 /* We assume all arrays have sizes that are a multiple of a byte.
1630 First subtract the lower bound, if any, in the type of the
1631 index, then convert to sizetype and multiply by the size of
1632 the array element. */
1633 if (! integer_zerop (low_bound))
1634 index = fold (build2 (MINUS_EXPR, TREE_TYPE (index),
1637 off_tree = size_binop (PLUS_EXPR,
1638 size_binop (MULT_EXPR, convert (sizetype,
1642 t2 = TREE_OPERAND (t2, 0);
1644 while (TREE_CODE (t2) == ARRAY_REF);
1650 if (host_integerp (off_tree, 1))
1652 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1653 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1654 align = DECL_ALIGN (t2);
1655 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1657 offset = GEN_INT (ioff);
1658 apply_bitpos = bitpos;
1661 else if (TREE_CODE (t2) == COMPONENT_REF)
1663 expr = component_ref_for_mem_expr (t2);
1664 if (host_integerp (off_tree, 1))
1666 offset = GEN_INT (tree_low_cst (off_tree, 1));
1667 apply_bitpos = bitpos;
1669 /* ??? Any reason the field size would be different than
1670 the size we got from the type? */
1672 else if (flag_argument_noalias > 1
1673 && (INDIRECT_REF_P (t2))
1674 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1681 /* If this is a Fortran indirect argument reference, record the
1683 else if (flag_argument_noalias > 1
1684 && (INDIRECT_REF_P (t))
1685 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1692 /* If we modified OFFSET based on T, then subtract the outstanding
1693 bit position offset. Similarly, increase the size of the accessed
1694 object to contain the negative offset. */
1697 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1699 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1702 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1704 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1705 we're overlapping. */
1710 /* Now set the attributes we computed above. */
1712 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1714 /* If this is already known to be a scalar or aggregate, we are done. */
1715 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1718 /* If it is a reference into an aggregate, this is part of an aggregate.
1719 Otherwise we don't know. */
1720 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1721 || TREE_CODE (t) == ARRAY_RANGE_REF
1722 || TREE_CODE (t) == BIT_FIELD_REF)
1723 MEM_IN_STRUCT_P (ref) = 1;
1727 set_mem_attributes (rtx ref, tree t, int objectp)
1729 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1732 /* Set the decl for MEM to DECL. */
1735 set_mem_attrs_from_reg (rtx mem, rtx reg)
1738 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1739 GEN_INT (REG_OFFSET (reg)),
1740 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1743 /* Set the alias set of MEM to SET. */
1746 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1748 #ifdef ENABLE_CHECKING
1749 /* If the new and old alias sets don't conflict, something is wrong. */
1750 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1753 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1754 MEM_SIZE (mem), MEM_ALIGN (mem),
1758 /* Set the alignment of MEM to ALIGN bits. */
1761 set_mem_align (rtx mem, unsigned int align)
1763 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1764 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1768 /* Set the expr for MEM to EXPR. */
1771 set_mem_expr (rtx mem, tree expr)
1774 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1775 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1778 /* Set the offset of MEM to OFFSET. */
1781 set_mem_offset (rtx mem, rtx offset)
1783 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1784 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1788 /* Set the size of MEM to SIZE. */
1791 set_mem_size (rtx mem, rtx size)
1793 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1794 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1798 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1799 and its address changed to ADDR. (VOIDmode means don't change the mode.
1800 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1801 returned memory location is required to be valid. The memory
1802 attributes are not changed. */
1805 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1809 gcc_assert (MEM_P (memref));
1810 if (mode == VOIDmode)
1811 mode = GET_MODE (memref);
1813 addr = XEXP (memref, 0);
1814 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1815 && (!validate || memory_address_p (mode, addr)))
1820 if (reload_in_progress || reload_completed)
1821 gcc_assert (memory_address_p (mode, addr));
1823 addr = memory_address (mode, addr);
1826 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1829 new = gen_rtx_MEM (mode, addr);
1830 MEM_COPY_ATTRIBUTES (new, memref);
1834 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1835 way we are changing MEMREF, so we only preserve the alias set. */
1838 change_address (rtx memref, enum machine_mode mode, rtx addr)
1840 rtx new = change_address_1 (memref, mode, addr, 1), size;
1841 enum machine_mode mmode = GET_MODE (new);
1844 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1845 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1847 /* If there are no changes, just return the original memory reference. */
1850 if (MEM_ATTRS (memref) == 0
1851 || (MEM_EXPR (memref) == NULL
1852 && MEM_OFFSET (memref) == NULL
1853 && MEM_SIZE (memref) == size
1854 && MEM_ALIGN (memref) == align))
1857 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1858 MEM_COPY_ATTRIBUTES (new, memref);
1862 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1867 /* Return a memory reference like MEMREF, but with its mode changed
1868 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1869 nonzero, the memory address is forced to be valid.
1870 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1871 and caller is responsible for adjusting MEMREF base register. */
1874 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1875 int validate, int adjust)
1877 rtx addr = XEXP (memref, 0);
1879 rtx memoffset = MEM_OFFSET (memref);
1881 unsigned int memalign = MEM_ALIGN (memref);
1883 /* If there are no changes, just return the original memory reference. */
1884 if (mode == GET_MODE (memref) && !offset
1885 && (!validate || memory_address_p (mode, addr)))
1888 /* ??? Prefer to create garbage instead of creating shared rtl.
1889 This may happen even if offset is nonzero -- consider
1890 (plus (plus reg reg) const_int) -- so do this always. */
1891 addr = copy_rtx (addr);
1895 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1896 object, we can merge it into the LO_SUM. */
1897 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1899 && (unsigned HOST_WIDE_INT) offset
1900 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1901 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1902 plus_constant (XEXP (addr, 1), offset));
1904 addr = plus_constant (addr, offset);
1907 new = change_address_1 (memref, mode, addr, validate);
1909 /* Compute the new values of the memory attributes due to this adjustment.
1910 We add the offsets and update the alignment. */
1912 memoffset = GEN_INT (offset + INTVAL (memoffset));
1914 /* Compute the new alignment by taking the MIN of the alignment and the
1915 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1920 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1922 /* We can compute the size in a number of ways. */
1923 if (GET_MODE (new) != BLKmode)
1924 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1925 else if (MEM_SIZE (memref))
1926 size = plus_constant (MEM_SIZE (memref), -offset);
1928 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1929 memoffset, size, memalign, GET_MODE (new));
1931 /* At some point, we should validate that this offset is within the object,
1932 if all the appropriate values are known. */
1936 /* Return a memory reference like MEMREF, but with its mode changed
1937 to MODE and its address changed to ADDR, which is assumed to be
1938 MEMREF offseted by OFFSET bytes. If VALIDATE is
1939 nonzero, the memory address is forced to be valid. */
1942 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1943 HOST_WIDE_INT offset, int validate)
1945 memref = change_address_1 (memref, VOIDmode, addr, validate);
1946 return adjust_address_1 (memref, mode, offset, validate, 0);
1949 /* Return a memory reference like MEMREF, but whose address is changed by
1950 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1951 known to be in OFFSET (possibly 1). */
1954 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1956 rtx new, addr = XEXP (memref, 0);
1958 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1960 /* At this point we don't know _why_ the address is invalid. It
1961 could have secondary memory references, multiplies or anything.
1963 However, if we did go and rearrange things, we can wind up not
1964 being able to recognize the magic around pic_offset_table_rtx.
1965 This stuff is fragile, and is yet another example of why it is
1966 bad to expose PIC machinery too early. */
1967 if (! memory_address_p (GET_MODE (memref), new)
1968 && GET_CODE (addr) == PLUS
1969 && XEXP (addr, 0) == pic_offset_table_rtx)
1971 addr = force_reg (GET_MODE (addr), addr);
1972 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1975 update_temp_slot_address (XEXP (memref, 0), new);
1976 new = change_address_1 (memref, VOIDmode, new, 1);
1978 /* If there are no changes, just return the original memory reference. */
1982 /* Update the alignment to reflect the offset. Reset the offset, which
1985 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1986 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1991 /* Return a memory reference like MEMREF, but with its address changed to
1992 ADDR. The caller is asserting that the actual piece of memory pointed
1993 to is the same, just the form of the address is being changed, such as
1994 by putting something into a register. */
1997 replace_equiv_address (rtx memref, rtx addr)
1999 /* change_address_1 copies the memory attribute structure without change
2000 and that's exactly what we want here. */
2001 update_temp_slot_address (XEXP (memref, 0), addr);
2002 return change_address_1 (memref, VOIDmode, addr, 1);
2005 /* Likewise, but the reference is not required to be valid. */
2008 replace_equiv_address_nv (rtx memref, rtx addr)
2010 return change_address_1 (memref, VOIDmode, addr, 0);
2013 /* Return a memory reference like MEMREF, but with its mode widened to
2014 MODE and offset by OFFSET. This would be used by targets that e.g.
2015 cannot issue QImode memory operations and have to use SImode memory
2016 operations plus masking logic. */
2019 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2021 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2022 tree expr = MEM_EXPR (new);
2023 rtx memoffset = MEM_OFFSET (new);
2024 unsigned int size = GET_MODE_SIZE (mode);
2026 /* If there are no changes, just return the original memory reference. */
2030 /* If we don't know what offset we were at within the expression, then
2031 we can't know if we've overstepped the bounds. */
2037 if (TREE_CODE (expr) == COMPONENT_REF)
2039 tree field = TREE_OPERAND (expr, 1);
2040 tree offset = component_ref_field_offset (expr);
2042 if (! DECL_SIZE_UNIT (field))
2048 /* Is the field at least as large as the access? If so, ok,
2049 otherwise strip back to the containing structure. */
2050 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2051 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2052 && INTVAL (memoffset) >= 0)
2055 if (! host_integerp (offset, 1))
2061 expr = TREE_OPERAND (expr, 0);
2063 = (GEN_INT (INTVAL (memoffset)
2064 + tree_low_cst (offset, 1)
2065 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2068 /* Similarly for the decl. */
2069 else if (DECL_P (expr)
2070 && DECL_SIZE_UNIT (expr)
2071 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2072 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2073 && (! memoffset || INTVAL (memoffset) >= 0))
2077 /* The widened memory access overflows the expression, which means
2078 that it could alias another expression. Zap it. */
2085 memoffset = NULL_RTX;
2087 /* The widened memory may alias other stuff, so zap the alias set. */
2088 /* ??? Maybe use get_alias_set on any remaining expression. */
2090 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2091 MEM_ALIGN (new), mode);
2096 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2099 gen_label_rtx (void)
2101 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2102 NULL, label_num++, NULL);
2105 /* For procedure integration. */
2107 /* Install new pointers to the first and last insns in the chain.
2108 Also, set cur_insn_uid to one higher than the last in use.
2109 Used for an inline-procedure after copying the insn chain. */
2112 set_new_first_and_last_insn (rtx first, rtx last)
2120 for (insn = first; insn; insn = NEXT_INSN (insn))
2121 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2126 /* Go through all the RTL insn bodies and copy any invalid shared
2127 structure. This routine should only be called once. */
2130 unshare_all_rtl_1 (tree fndecl, rtx insn)
2134 /* Make sure that virtual parameters are not shared. */
2135 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2136 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2138 /* Make sure that virtual stack slots are not shared. */
2139 unshare_all_decls (DECL_INITIAL (fndecl));
2141 /* Unshare just about everything else. */
2142 unshare_all_rtl_in_chain (insn);
2144 /* Make sure the addresses of stack slots found outside the insn chain
2145 (such as, in DECL_RTL of a variable) are not shared
2146 with the insn chain.
2148 This special care is necessary when the stack slot MEM does not
2149 actually appear in the insn chain. If it does appear, its address
2150 is unshared from all else at that point. */
2151 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2154 /* Go through all the RTL insn bodies and copy any invalid shared
2155 structure, again. This is a fairly expensive thing to do so it
2156 should be done sparingly. */
2159 unshare_all_rtl_again (rtx insn)
2164 for (p = insn; p; p = NEXT_INSN (p))
2167 reset_used_flags (PATTERN (p));
2168 reset_used_flags (REG_NOTES (p));
2169 reset_used_flags (LOG_LINKS (p));
2172 /* Make sure that virtual stack slots are not shared. */
2173 reset_used_decls (DECL_INITIAL (cfun->decl));
2175 /* Make sure that virtual parameters are not shared. */
2176 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2177 reset_used_flags (DECL_RTL (decl));
2179 reset_used_flags (stack_slot_list);
2181 unshare_all_rtl_1 (cfun->decl, insn);
2185 unshare_all_rtl (void)
2187 unshare_all_rtl_1 (current_function_decl, get_insns ());
2190 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2191 Recursively does the same for subexpressions. */
2194 verify_rtx_sharing (rtx orig, rtx insn)
2199 const char *format_ptr;
2204 code = GET_CODE (x);
2206 /* These types may be freely shared. */
2221 /* SCRATCH must be shared because they represent distinct values. */
2223 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2228 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2229 a LABEL_REF, it isn't sharable. */
2230 if (GET_CODE (XEXP (x, 0)) == PLUS
2231 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2232 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2237 /* A MEM is allowed to be shared if its address is constant. */
2238 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2239 || reload_completed || reload_in_progress)
2248 /* This rtx may not be shared. If it has already been seen,
2249 replace it with a copy of itself. */
2250 #ifdef ENABLE_CHECKING
2251 if (RTX_FLAG (x, used))
2253 error ("Invalid rtl sharing found in the insn");
2255 error ("Shared rtx");
2257 internal_error ("Internal consistency failure");
2260 gcc_assert (!RTX_FLAG (x, used));
2262 RTX_FLAG (x, used) = 1;
2264 /* Now scan the subexpressions recursively. */
2266 format_ptr = GET_RTX_FORMAT (code);
2268 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2270 switch (*format_ptr++)
2273 verify_rtx_sharing (XEXP (x, i), insn);
2277 if (XVEC (x, i) != NULL)
2280 int len = XVECLEN (x, i);
2282 for (j = 0; j < len; j++)
2284 /* We allow sharing of ASM_OPERANDS inside single
2286 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2287 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2289 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2291 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2300 /* Go through all the RTL insn bodies and check that there is no unexpected
2301 sharing in between the subexpressions. */
2304 verify_rtl_sharing (void)
2308 for (p = get_insns (); p; p = NEXT_INSN (p))
2311 reset_used_flags (PATTERN (p));
2312 reset_used_flags (REG_NOTES (p));
2313 reset_used_flags (LOG_LINKS (p));
2316 for (p = get_insns (); p; p = NEXT_INSN (p))
2319 verify_rtx_sharing (PATTERN (p), p);
2320 verify_rtx_sharing (REG_NOTES (p), p);
2321 verify_rtx_sharing (LOG_LINKS (p), p);
2325 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2326 Assumes the mark bits are cleared at entry. */
2329 unshare_all_rtl_in_chain (rtx insn)
2331 for (; insn; insn = NEXT_INSN (insn))
2334 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2335 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2336 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2340 /* Go through all virtual stack slots of a function and copy any
2341 shared structure. */
2343 unshare_all_decls (tree blk)
2347 /* Copy shared decls. */
2348 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2349 if (DECL_RTL_SET_P (t))
2350 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2352 /* Now process sub-blocks. */
2353 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2354 unshare_all_decls (t);
2357 /* Go through all virtual stack slots of a function and mark them as
2360 reset_used_decls (tree blk)
2365 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2366 if (DECL_RTL_SET_P (t))
2367 reset_used_flags (DECL_RTL (t));
2369 /* Now process sub-blocks. */
2370 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2371 reset_used_decls (t);
2374 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2375 Recursively does the same for subexpressions. Uses
2376 copy_rtx_if_shared_1 to reduce stack space. */
2379 copy_rtx_if_shared (rtx orig)
2381 copy_rtx_if_shared_1 (&orig);
2385 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2386 use. Recursively does the same for subexpressions. */
2389 copy_rtx_if_shared_1 (rtx *orig1)
2395 const char *format_ptr;
2399 /* Repeat is used to turn tail-recursion into iteration. */
2406 code = GET_CODE (x);
2408 /* These types may be freely shared. */
2422 /* SCRATCH must be shared because they represent distinct values. */
2425 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2430 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2431 a LABEL_REF, it isn't sharable. */
2432 if (GET_CODE (XEXP (x, 0)) == PLUS
2433 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2434 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2443 /* The chain of insns is not being copied. */
2450 /* This rtx may not be shared. If it has already been seen,
2451 replace it with a copy of itself. */
2453 if (RTX_FLAG (x, used))
2457 copy = rtx_alloc (code);
2458 memcpy (copy, x, RTX_SIZE (code));
2462 RTX_FLAG (x, used) = 1;
2464 /* Now scan the subexpressions recursively.
2465 We can store any replaced subexpressions directly into X
2466 since we know X is not shared! Any vectors in X
2467 must be copied if X was copied. */
2469 format_ptr = GET_RTX_FORMAT (code);
2470 length = GET_RTX_LENGTH (code);
2473 for (i = 0; i < length; i++)
2475 switch (*format_ptr++)
2479 copy_rtx_if_shared_1 (last_ptr);
2480 last_ptr = &XEXP (x, i);
2484 if (XVEC (x, i) != NULL)
2487 int len = XVECLEN (x, i);
2489 /* Copy the vector iff I copied the rtx and the length
2491 if (copied && len > 0)
2492 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2494 /* Call recursively on all inside the vector. */
2495 for (j = 0; j < len; j++)
2498 copy_rtx_if_shared_1 (last_ptr);
2499 last_ptr = &XVECEXP (x, i, j);
2514 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2515 to look for shared sub-parts. */
2518 reset_used_flags (rtx x)
2522 const char *format_ptr;
2525 /* Repeat is used to turn tail-recursion into iteration. */
2530 code = GET_CODE (x);
2532 /* These types may be freely shared so we needn't do any resetting
2553 /* The chain of insns is not being copied. */
2560 RTX_FLAG (x, used) = 0;
2562 format_ptr = GET_RTX_FORMAT (code);
2563 length = GET_RTX_LENGTH (code);
2565 for (i = 0; i < length; i++)
2567 switch (*format_ptr++)
2575 reset_used_flags (XEXP (x, i));
2579 for (j = 0; j < XVECLEN (x, i); j++)
2580 reset_used_flags (XVECEXP (x, i, j));
2586 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2587 to look for shared sub-parts. */
2590 set_used_flags (rtx x)
2594 const char *format_ptr;
2599 code = GET_CODE (x);
2601 /* These types may be freely shared so we needn't do any resetting
2622 /* The chain of insns is not being copied. */
2629 RTX_FLAG (x, used) = 1;
2631 format_ptr = GET_RTX_FORMAT (code);
2632 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2634 switch (*format_ptr++)
2637 set_used_flags (XEXP (x, i));
2641 for (j = 0; j < XVECLEN (x, i); j++)
2642 set_used_flags (XVECEXP (x, i, j));
2648 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2649 Return X or the rtx for the pseudo reg the value of X was copied into.
2650 OTHER must be valid as a SET_DEST. */
2653 make_safe_from (rtx x, rtx other)
2656 switch (GET_CODE (other))
2659 other = SUBREG_REG (other);
2661 case STRICT_LOW_PART:
2664 other = XEXP (other, 0);
2673 && GET_CODE (x) != SUBREG)
2675 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2676 || reg_mentioned_p (other, x))))
2678 rtx temp = gen_reg_rtx (GET_MODE (x));
2679 emit_move_insn (temp, x);
2685 /* Emission of insns (adding them to the doubly-linked list). */
2687 /* Return the first insn of the current sequence or current function. */
2695 /* Specify a new insn as the first in the chain. */
2698 set_first_insn (rtx insn)
2700 gcc_assert (!PREV_INSN (insn));
2704 /* Return the last insn emitted in current sequence or current function. */
2707 get_last_insn (void)
2712 /* Specify a new insn as the last in the chain. */
2715 set_last_insn (rtx insn)
2717 gcc_assert (!NEXT_INSN (insn));
2721 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2724 get_last_insn_anywhere (void)
2726 struct sequence_stack *stack;
2729 for (stack = seq_stack; stack; stack = stack->next)
2730 if (stack->last != 0)
2735 /* Return the first nonnote insn emitted in current sequence or current
2736 function. This routine looks inside SEQUENCEs. */
2739 get_first_nonnote_insn (void)
2741 rtx insn = first_insn;
2745 insn = next_insn (insn);
2746 if (insn == 0 || !NOTE_P (insn))
2753 /* Return the last nonnote insn emitted in current sequence or current
2754 function. This routine looks inside SEQUENCEs. */
2757 get_last_nonnote_insn (void)
2759 rtx insn = last_insn;
2763 insn = previous_insn (insn);
2764 if (insn == 0 || !NOTE_P (insn))
2771 /* Return a number larger than any instruction's uid in this function. */
2776 return cur_insn_uid;
2779 /* Renumber instructions so that no instruction UIDs are wasted. */
2782 renumber_insns (FILE *stream)
2786 /* If we're not supposed to renumber instructions, don't. */
2787 if (!flag_renumber_insns)
2790 /* If there aren't that many instructions, then it's not really
2791 worth renumbering them. */
2792 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2797 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2800 fprintf (stream, "Renumbering insn %d to %d\n",
2801 INSN_UID (insn), cur_insn_uid);
2802 INSN_UID (insn) = cur_insn_uid++;
2806 /* Return the next insn. If it is a SEQUENCE, return the first insn
2810 next_insn (rtx insn)
2814 insn = NEXT_INSN (insn);
2815 if (insn && NONJUMP_INSN_P (insn)
2816 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2817 insn = XVECEXP (PATTERN (insn), 0, 0);
2823 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2827 previous_insn (rtx insn)
2831 insn = PREV_INSN (insn);
2832 if (insn && NONJUMP_INSN_P (insn)
2833 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2834 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2840 /* Return the next insn after INSN that is not a NOTE. This routine does not
2841 look inside SEQUENCEs. */
2844 next_nonnote_insn (rtx insn)
2848 insn = NEXT_INSN (insn);
2849 if (insn == 0 || !NOTE_P (insn))
2856 /* Return the previous insn before INSN that is not a NOTE. This routine does
2857 not look inside SEQUENCEs. */
2860 prev_nonnote_insn (rtx insn)
2864 insn = PREV_INSN (insn);
2865 if (insn == 0 || !NOTE_P (insn))
2872 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2873 or 0, if there is none. This routine does not look inside
2877 next_real_insn (rtx insn)
2881 insn = NEXT_INSN (insn);
2882 if (insn == 0 || INSN_P (insn))
2889 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2890 or 0, if there is none. This routine does not look inside
2894 prev_real_insn (rtx insn)
2898 insn = PREV_INSN (insn);
2899 if (insn == 0 || INSN_P (insn))
2906 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2907 This routine does not look inside SEQUENCEs. */
2910 last_call_insn (void)
2914 for (insn = get_last_insn ();
2915 insn && !CALL_P (insn);
2916 insn = PREV_INSN (insn))
2922 /* Find the next insn after INSN that really does something. This routine
2923 does not look inside SEQUENCEs. Until reload has completed, this is the
2924 same as next_real_insn. */
2927 active_insn_p (rtx insn)
2929 return (CALL_P (insn) || JUMP_P (insn)
2930 || (NONJUMP_INSN_P (insn)
2931 && (! reload_completed
2932 || (GET_CODE (PATTERN (insn)) != USE
2933 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2937 next_active_insn (rtx insn)
2941 insn = NEXT_INSN (insn);
2942 if (insn == 0 || active_insn_p (insn))
2949 /* Find the last insn before INSN that really does something. This routine
2950 does not look inside SEQUENCEs. Until reload has completed, this is the
2951 same as prev_real_insn. */
2954 prev_active_insn (rtx insn)
2958 insn = PREV_INSN (insn);
2959 if (insn == 0 || active_insn_p (insn))
2966 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2969 next_label (rtx insn)
2973 insn = NEXT_INSN (insn);
2974 if (insn == 0 || LABEL_P (insn))
2981 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2984 prev_label (rtx insn)
2988 insn = PREV_INSN (insn);
2989 if (insn == 0 || LABEL_P (insn))
2996 /* Return the last label to mark the same position as LABEL. Return null
2997 if LABEL itself is null. */
3000 skip_consecutive_labels (rtx label)
3004 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3012 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3013 and REG_CC_USER notes so we can find it. */
3016 link_cc0_insns (rtx insn)
3018 rtx user = next_nonnote_insn (insn);
3020 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3021 user = XVECEXP (PATTERN (user), 0, 0);
3023 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3025 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3028 /* Return the next insn that uses CC0 after INSN, which is assumed to
3029 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3030 applied to the result of this function should yield INSN).
3032 Normally, this is simply the next insn. However, if a REG_CC_USER note
3033 is present, it contains the insn that uses CC0.
3035 Return 0 if we can't find the insn. */
3038 next_cc0_user (rtx insn)
3040 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3043 return XEXP (note, 0);
3045 insn = next_nonnote_insn (insn);
3046 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3047 insn = XVECEXP (PATTERN (insn), 0, 0);
3049 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3055 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3056 note, it is the previous insn. */
3059 prev_cc0_setter (rtx insn)
3061 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3064 return XEXP (note, 0);
3066 insn = prev_nonnote_insn (insn);
3067 gcc_assert (sets_cc0_p (PATTERN (insn)));
3073 /* Increment the label uses for all labels present in rtx. */
3076 mark_label_nuses (rtx x)
3082 code = GET_CODE (x);
3083 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3084 LABEL_NUSES (XEXP (x, 0))++;
3086 fmt = GET_RTX_FORMAT (code);
3087 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3090 mark_label_nuses (XEXP (x, i));
3091 else if (fmt[i] == 'E')
3092 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3093 mark_label_nuses (XVECEXP (x, i, j));
3098 /* Try splitting insns that can be split for better scheduling.
3099 PAT is the pattern which might split.
3100 TRIAL is the insn providing PAT.
3101 LAST is nonzero if we should return the last insn of the sequence produced.
3103 If this routine succeeds in splitting, it returns the first or last
3104 replacement insn depending on the value of LAST. Otherwise, it
3105 returns TRIAL. If the insn to be returned can be split, it will be. */
3108 try_split (rtx pat, rtx trial, int last)
3110 rtx before = PREV_INSN (trial);
3111 rtx after = NEXT_INSN (trial);
3112 int has_barrier = 0;
3116 rtx insn_last, insn;
3119 if (any_condjump_p (trial)
3120 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3121 split_branch_probability = INTVAL (XEXP (note, 0));
3122 probability = split_branch_probability;
3124 seq = split_insns (pat, trial);
3126 split_branch_probability = -1;
3128 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3129 We may need to handle this specially. */
3130 if (after && BARRIER_P (after))
3133 after = NEXT_INSN (after);
3139 /* Avoid infinite loop if any insn of the result matches
3140 the original pattern. */
3144 if (INSN_P (insn_last)
3145 && rtx_equal_p (PATTERN (insn_last), pat))
3147 if (!NEXT_INSN (insn_last))
3149 insn_last = NEXT_INSN (insn_last);
3153 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3157 mark_jump_label (PATTERN (insn), insn, 0);
3159 if (probability != -1
3160 && any_condjump_p (insn)
3161 && !find_reg_note (insn, REG_BR_PROB, 0))
3163 /* We can preserve the REG_BR_PROB notes only if exactly
3164 one jump is created, otherwise the machine description
3165 is responsible for this step using
3166 split_branch_probability variable. */
3167 gcc_assert (njumps == 1);
3169 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3170 GEN_INT (probability),
3176 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3177 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3180 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3183 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3186 *p = CALL_INSN_FUNCTION_USAGE (trial);
3187 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3191 /* Copy notes, particularly those related to the CFG. */
3192 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3194 switch (REG_NOTE_KIND (note))
3198 while (insn != NULL_RTX)
3201 || (flag_non_call_exceptions && INSN_P (insn)
3202 && may_trap_p (PATTERN (insn))))
3204 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3207 insn = PREV_INSN (insn);
3213 case REG_ALWAYS_RETURN:
3215 while (insn != NULL_RTX)
3219 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3222 insn = PREV_INSN (insn);
3226 case REG_NON_LOCAL_GOTO:
3228 while (insn != NULL_RTX)
3232 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3235 insn = PREV_INSN (insn);
3244 /* If there are LABELS inside the split insns increment the
3245 usage count so we don't delete the label. */
3246 if (NONJUMP_INSN_P (trial))
3249 while (insn != NULL_RTX)
3251 if (NONJUMP_INSN_P (insn))
3252 mark_label_nuses (PATTERN (insn));
3254 insn = PREV_INSN (insn);
3258 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3260 delete_insn (trial);
3262 emit_barrier_after (tem);
3264 /* Recursively call try_split for each new insn created; by the
3265 time control returns here that insn will be fully split, so
3266 set LAST and continue from the insn after the one returned.
3267 We can't use next_active_insn here since AFTER may be a note.
3268 Ignore deleted insns, which can be occur if not optimizing. */
3269 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3270 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3271 tem = try_split (PATTERN (tem), tem, 1);
3273 /* Return either the first or the last insn, depending on which was
3276 ? (after ? PREV_INSN (after) : last_insn)
3277 : NEXT_INSN (before);
3280 /* Make and return an INSN rtx, initializing all its slots.
3281 Store PATTERN in the pattern slots. */
3284 make_insn_raw (rtx pattern)
3288 insn = rtx_alloc (INSN);
3290 INSN_UID (insn) = cur_insn_uid++;
3291 PATTERN (insn) = pattern;
3292 INSN_CODE (insn) = -1;
3293 LOG_LINKS (insn) = NULL;
3294 REG_NOTES (insn) = NULL;
3295 INSN_LOCATOR (insn) = 0;
3296 BLOCK_FOR_INSN (insn) = NULL;
3298 #ifdef ENABLE_RTL_CHECKING
3301 && (returnjump_p (insn)
3302 || (GET_CODE (insn) == SET
3303 && SET_DEST (insn) == pc_rtx)))
3305 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3313 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3316 make_jump_insn_raw (rtx pattern)
3320 insn = rtx_alloc (JUMP_INSN);
3321 INSN_UID (insn) = cur_insn_uid++;
3323 PATTERN (insn) = pattern;
3324 INSN_CODE (insn) = -1;
3325 LOG_LINKS (insn) = NULL;
3326 REG_NOTES (insn) = NULL;
3327 JUMP_LABEL (insn) = NULL;
3328 INSN_LOCATOR (insn) = 0;
3329 BLOCK_FOR_INSN (insn) = NULL;
3334 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3337 make_call_insn_raw (rtx pattern)
3341 insn = rtx_alloc (CALL_INSN);
3342 INSN_UID (insn) = cur_insn_uid++;
3344 PATTERN (insn) = pattern;
3345 INSN_CODE (insn) = -1;
3346 LOG_LINKS (insn) = NULL;
3347 REG_NOTES (insn) = NULL;
3348 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3349 INSN_LOCATOR (insn) = 0;
3350 BLOCK_FOR_INSN (insn) = NULL;
3355 /* Add INSN to the end of the doubly-linked list.
3356 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3361 PREV_INSN (insn) = last_insn;
3362 NEXT_INSN (insn) = 0;
3364 if (NULL != last_insn)
3365 NEXT_INSN (last_insn) = insn;
3367 if (NULL == first_insn)
3373 /* Add INSN into the doubly-linked list after insn AFTER. This and
3374 the next should be the only functions called to insert an insn once
3375 delay slots have been filled since only they know how to update a
3379 add_insn_after (rtx insn, rtx after)
3381 rtx next = NEXT_INSN (after);
3384 gcc_assert (!optimize || !INSN_DELETED_P (after));
3386 NEXT_INSN (insn) = next;
3387 PREV_INSN (insn) = after;
3391 PREV_INSN (next) = insn;
3392 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3393 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3395 else if (last_insn == after)
3399 struct sequence_stack *stack = seq_stack;
3400 /* Scan all pending sequences too. */
3401 for (; stack; stack = stack->next)
3402 if (after == stack->last)
3411 if (!BARRIER_P (after)
3412 && !BARRIER_P (insn)
3413 && (bb = BLOCK_FOR_INSN (after)))
3415 set_block_for_insn (insn, bb);
3417 bb->flags |= BB_DIRTY;
3418 /* Should not happen as first in the BB is always
3419 either NOTE or LABEL. */
3420 if (BB_END (bb) == after
3421 /* Avoid clobbering of structure when creating new BB. */
3422 && !BARRIER_P (insn)
3424 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3428 NEXT_INSN (after) = insn;
3429 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3431 rtx sequence = PATTERN (after);
3432 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3436 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3437 the previous should be the only functions called to insert an insn once
3438 delay slots have been filled since only they know how to update a
3442 add_insn_before (rtx insn, rtx before)
3444 rtx prev = PREV_INSN (before);
3447 gcc_assert (!optimize || !INSN_DELETED_P (before));
3449 PREV_INSN (insn) = prev;
3450 NEXT_INSN (insn) = before;
3454 NEXT_INSN (prev) = insn;
3455 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3457 rtx sequence = PATTERN (prev);
3458 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3461 else if (first_insn == before)
3465 struct sequence_stack *stack = seq_stack;
3466 /* Scan all pending sequences too. */
3467 for (; stack; stack = stack->next)
3468 if (before == stack->first)
3470 stack->first = insn;
3477 if (!BARRIER_P (before)
3478 && !BARRIER_P (insn)
3479 && (bb = BLOCK_FOR_INSN (before)))
3481 set_block_for_insn (insn, bb);
3483 bb->flags |= BB_DIRTY;
3484 /* Should not happen as first in the BB is always either NOTE or
3486 gcc_assert (BB_HEAD (bb) != insn
3487 /* Avoid clobbering of structure when creating new BB. */
3490 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_BASIC_BLOCK));
3493 PREV_INSN (before) = insn;
3494 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3495 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3498 /* Remove an insn from its doubly-linked list. This function knows how
3499 to handle sequences. */
3501 remove_insn (rtx insn)
3503 rtx next = NEXT_INSN (insn);
3504 rtx prev = PREV_INSN (insn);
3509 NEXT_INSN (prev) = next;
3510 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3512 rtx sequence = PATTERN (prev);
3513 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3516 else if (first_insn == insn)
3520 struct sequence_stack *stack = seq_stack;
3521 /* Scan all pending sequences too. */
3522 for (; stack; stack = stack->next)
3523 if (insn == stack->first)
3525 stack->first = next;
3534 PREV_INSN (next) = prev;
3535 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3536 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3538 else if (last_insn == insn)
3542 struct sequence_stack *stack = seq_stack;
3543 /* Scan all pending sequences too. */
3544 for (; stack; stack = stack->next)
3545 if (insn == stack->last)
3553 if (!BARRIER_P (insn)
3554 && (bb = BLOCK_FOR_INSN (insn)))
3557 bb->flags |= BB_DIRTY;
3558 if (BB_HEAD (bb) == insn)
3560 /* Never ever delete the basic block note without deleting whole
3562 gcc_assert (!NOTE_P (insn));
3563 BB_HEAD (bb) = next;
3565 if (BB_END (bb) == insn)
3570 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3573 add_function_usage_to (rtx call_insn, rtx call_fusage)
3575 gcc_assert (call_insn && CALL_P (call_insn));
3577 /* Put the register usage information on the CALL. If there is already
3578 some usage information, put ours at the end. */
3579 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3583 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3584 link = XEXP (link, 1))
3587 XEXP (link, 1) = call_fusage;
3590 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3593 /* Delete all insns made since FROM.
3594 FROM becomes the new last instruction. */
3597 delete_insns_since (rtx from)
3602 NEXT_INSN (from) = 0;
3606 /* This function is deprecated, please use sequences instead.
3608 Move a consecutive bunch of insns to a different place in the chain.
3609 The insns to be moved are those between FROM and TO.
3610 They are moved to a new position after the insn AFTER.
3611 AFTER must not be FROM or TO or any insn in between.
3613 This function does not know about SEQUENCEs and hence should not be
3614 called after delay-slot filling has been done. */
3617 reorder_insns_nobb (rtx from, rtx to, rtx after)
3619 /* Splice this bunch out of where it is now. */
3620 if (PREV_INSN (from))
3621 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3623 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3624 if (last_insn == to)
3625 last_insn = PREV_INSN (from);
3626 if (first_insn == from)
3627 first_insn = NEXT_INSN (to);
3629 /* Make the new neighbors point to it and it to them. */
3630 if (NEXT_INSN (after))
3631 PREV_INSN (NEXT_INSN (after)) = to;
3633 NEXT_INSN (to) = NEXT_INSN (after);
3634 PREV_INSN (from) = after;
3635 NEXT_INSN (after) = from;
3636 if (after == last_insn)
3640 /* Same as function above, but take care to update BB boundaries. */
3642 reorder_insns (rtx from, rtx to, rtx after)
3644 rtx prev = PREV_INSN (from);
3645 basic_block bb, bb2;
3647 reorder_insns_nobb (from, to, after);
3649 if (!BARRIER_P (after)
3650 && (bb = BLOCK_FOR_INSN (after)))
3653 bb->flags |= BB_DIRTY;
3655 if (!BARRIER_P (from)
3656 && (bb2 = BLOCK_FOR_INSN (from)))
3658 if (BB_END (bb2) == to)
3659 BB_END (bb2) = prev;
3660 bb2->flags |= BB_DIRTY;
3663 if (BB_END (bb) == after)
3666 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3668 set_block_for_insn (x, bb);
3672 /* Return the line note insn preceding INSN. */
3675 find_line_note (rtx insn)
3677 if (no_line_numbers)
3680 for (; insn; insn = PREV_INSN (insn))
3682 && NOTE_LINE_NUMBER (insn) >= 0)
3688 /* Remove unnecessary notes from the instruction stream. */
3691 remove_unnecessary_notes (void)
3693 rtx block_stack = NULL_RTX;
3694 rtx eh_stack = NULL_RTX;
3699 /* We must not remove the first instruction in the function because
3700 the compiler depends on the first instruction being a note. */
3701 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3703 /* Remember what's next. */
3704 next = NEXT_INSN (insn);
3706 /* We're only interested in notes. */
3710 switch (NOTE_LINE_NUMBER (insn))
3712 case NOTE_INSN_DELETED:
3716 case NOTE_INSN_EH_REGION_BEG:
3717 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3720 case NOTE_INSN_EH_REGION_END:
3721 /* Too many end notes. */
3722 gcc_assert (eh_stack);
3723 /* Mismatched nesting. */
3724 gcc_assert (NOTE_EH_HANDLER (XEXP (eh_stack, 0))
3725 == NOTE_EH_HANDLER (insn));
3727 eh_stack = XEXP (eh_stack, 1);
3728 free_INSN_LIST_node (tmp);
3731 case NOTE_INSN_BLOCK_BEG:
3732 /* By now, all notes indicating lexical blocks should have
3733 NOTE_BLOCK filled in. */
3734 gcc_assert (NOTE_BLOCK (insn));
3735 block_stack = alloc_INSN_LIST (insn, block_stack);
3738 case NOTE_INSN_BLOCK_END:
3739 /* Too many end notes. */
3740 gcc_assert (block_stack);
3741 /* Mismatched nesting. */
3742 gcc_assert (NOTE_BLOCK (XEXP (block_stack, 0)) == NOTE_BLOCK (insn));
3744 block_stack = XEXP (block_stack, 1);
3745 free_INSN_LIST_node (tmp);
3747 /* Scan back to see if there are any non-note instructions
3748 between INSN and the beginning of this block. If not,
3749 then there is no PC range in the generated code that will
3750 actually be in this block, so there's no point in
3751 remembering the existence of the block. */
3752 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3754 /* This block contains a real instruction. Note that we
3755 don't include labels; if the only thing in the block
3756 is a label, then there are still no PC values that
3757 lie within the block. */
3761 /* We're only interested in NOTEs. */
3765 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3767 /* We just verified that this BLOCK matches us with
3768 the block_stack check above. Never delete the
3769 BLOCK for the outermost scope of the function; we
3770 can refer to names from that scope even if the
3771 block notes are messed up. */
3772 if (! is_body_block (NOTE_BLOCK (insn))
3773 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3780 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3781 /* There's a nested block. We need to leave the
3782 current block in place since otherwise the debugger
3783 wouldn't be able to show symbols from our block in
3784 the nested block. */
3790 /* Too many begin notes. */
3791 gcc_assert (!block_stack && !eh_stack);
3795 /* Emit insn(s) of given code and pattern
3796 at a specified place within the doubly-linked list.
3798 All of the emit_foo global entry points accept an object
3799 X which is either an insn list or a PATTERN of a single
3802 There are thus a few canonical ways to generate code and
3803 emit it at a specific place in the instruction stream. For
3804 example, consider the instruction named SPOT and the fact that
3805 we would like to emit some instructions before SPOT. We might
3809 ... emit the new instructions ...
3810 insns_head = get_insns ();
3813 emit_insn_before (insns_head, SPOT);
3815 It used to be common to generate SEQUENCE rtl instead, but that
3816 is a relic of the past which no longer occurs. The reason is that
3817 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3818 generated would almost certainly die right after it was created. */
3820 /* Make X be output before the instruction BEFORE. */
3823 emit_insn_before_noloc (rtx x, rtx before)
3828 gcc_assert (before);
3833 switch (GET_CODE (x))
3844 rtx next = NEXT_INSN (insn);
3845 add_insn_before (insn, before);
3851 #ifdef ENABLE_RTL_CHECKING
3858 last = make_insn_raw (x);
3859 add_insn_before (last, before);
3866 /* Make an instruction with body X and code JUMP_INSN
3867 and output it before the instruction BEFORE. */
3870 emit_jump_insn_before_noloc (rtx x, rtx before)
3872 rtx insn, last = NULL_RTX;
3874 gcc_assert (before);
3876 switch (GET_CODE (x))
3887 rtx next = NEXT_INSN (insn);
3888 add_insn_before (insn, before);
3894 #ifdef ENABLE_RTL_CHECKING
3901 last = make_jump_insn_raw (x);
3902 add_insn_before (last, before);
3909 /* Make an instruction with body X and code CALL_INSN
3910 and output it before the instruction BEFORE. */
3913 emit_call_insn_before_noloc (rtx x, rtx before)
3915 rtx last = NULL_RTX, insn;
3917 gcc_assert (before);
3919 switch (GET_CODE (x))
3930 rtx next = NEXT_INSN (insn);
3931 add_insn_before (insn, before);
3937 #ifdef ENABLE_RTL_CHECKING
3944 last = make_call_insn_raw (x);
3945 add_insn_before (last, before);
3952 /* Make an insn of code BARRIER
3953 and output it before the insn BEFORE. */
3956 emit_barrier_before (rtx before)
3958 rtx insn = rtx_alloc (BARRIER);
3960 INSN_UID (insn) = cur_insn_uid++;
3962 add_insn_before (insn, before);
3966 /* Emit the label LABEL before the insn BEFORE. */
3969 emit_label_before (rtx label, rtx before)
3971 /* This can be called twice for the same label as a result of the
3972 confusion that follows a syntax error! So make it harmless. */
3973 if (INSN_UID (label) == 0)
3975 INSN_UID (label) = cur_insn_uid++;
3976 add_insn_before (label, before);
3982 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3985 emit_note_before (int subtype, rtx before)
3987 rtx note = rtx_alloc (NOTE);
3988 INSN_UID (note) = cur_insn_uid++;
3989 #ifndef USE_MAPPED_LOCATION
3990 NOTE_SOURCE_FILE (note) = 0;
3992 NOTE_LINE_NUMBER (note) = subtype;
3993 BLOCK_FOR_INSN (note) = NULL;
3995 add_insn_before (note, before);
3999 /* Helper for emit_insn_after, handles lists of instructions
4002 static rtx emit_insn_after_1 (rtx, rtx);
4005 emit_insn_after_1 (rtx first, rtx after)
4011 if (!BARRIER_P (after)
4012 && (bb = BLOCK_FOR_INSN (after)))
4014 bb->flags |= BB_DIRTY;
4015 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4016 if (!BARRIER_P (last))
4017 set_block_for_insn (last, bb);
4018 if (!BARRIER_P (last))
4019 set_block_for_insn (last, bb);
4020 if (BB_END (bb) == after)
4024 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4027 after_after = NEXT_INSN (after);
4029 NEXT_INSN (after) = first;
4030 PREV_INSN (first) = after;
4031 NEXT_INSN (last) = after_after;
4033 PREV_INSN (after_after) = last;
4035 if (after == last_insn)
4040 /* Make X be output after the insn AFTER. */
4043 emit_insn_after_noloc (rtx x, rtx after)
4052 switch (GET_CODE (x))
4060 last = emit_insn_after_1 (x, after);
4063 #ifdef ENABLE_RTL_CHECKING
4070 last = make_insn_raw (x);
4071 add_insn_after (last, after);
4078 /* Similar to emit_insn_after, except that line notes are to be inserted so
4079 as to act as if this insn were at FROM. */
4082 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4084 rtx from_line = find_line_note (from);
4085 rtx after_line = find_line_note (after);
4086 rtx insn = emit_insn_after (x, after);
4089 emit_note_copy_after (from_line, after);
4092 emit_note_copy_after (after_line, insn);
4095 /* Make an insn of code JUMP_INSN with body X
4096 and output it after the insn AFTER. */
4099 emit_jump_insn_after_noloc (rtx x, rtx after)
4105 switch (GET_CODE (x))
4113 last = emit_insn_after_1 (x, after);
4116 #ifdef ENABLE_RTL_CHECKING
4123 last = make_jump_insn_raw (x);
4124 add_insn_after (last, after);
4131 /* Make an instruction with body X and code CALL_INSN
4132 and output it after the instruction AFTER. */
4135 emit_call_insn_after_noloc (rtx x, rtx after)
4141 switch (GET_CODE (x))
4149 last = emit_insn_after_1 (x, after);
4152 #ifdef ENABLE_RTL_CHECKING
4159 last = make_call_insn_raw (x);
4160 add_insn_after (last, after);
4167 /* Make an insn of code BARRIER
4168 and output it after the insn AFTER. */
4171 emit_barrier_after (rtx after)
4173 rtx insn = rtx_alloc (BARRIER);
4175 INSN_UID (insn) = cur_insn_uid++;
4177 add_insn_after (insn, after);
4181 /* Emit the label LABEL after the insn AFTER. */
4184 emit_label_after (rtx label, rtx after)
4186 /* This can be called twice for the same label
4187 as a result of the confusion that follows a syntax error!
4188 So make it harmless. */
4189 if (INSN_UID (label) == 0)
4191 INSN_UID (label) = cur_insn_uid++;
4192 add_insn_after (label, after);
4198 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4201 emit_note_after (int subtype, rtx after)
4203 rtx note = rtx_alloc (NOTE);
4204 INSN_UID (note) = cur_insn_uid++;
4205 #ifndef USE_MAPPED_LOCATION
4206 NOTE_SOURCE_FILE (note) = 0;
4208 NOTE_LINE_NUMBER (note) = subtype;
4209 BLOCK_FOR_INSN (note) = NULL;
4210 add_insn_after (note, after);
4214 /* Emit a copy of note ORIG after the insn AFTER. */
4217 emit_note_copy_after (rtx orig, rtx after)
4221 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4227 note = rtx_alloc (NOTE);
4228 INSN_UID (note) = cur_insn_uid++;
4229 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4230 NOTE_DATA (note) = NOTE_DATA (orig);
4231 BLOCK_FOR_INSN (note) = NULL;
4232 add_insn_after (note, after);
4236 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4238 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4240 rtx last = emit_insn_after_noloc (pattern, after);
4242 if (pattern == NULL_RTX || !loc)
4245 after = NEXT_INSN (after);
4248 if (active_insn_p (after) && !INSN_LOCATOR (after))
4249 INSN_LOCATOR (after) = loc;
4252 after = NEXT_INSN (after);
4257 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4259 emit_insn_after (rtx pattern, rtx after)
4262 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4264 return emit_insn_after_noloc (pattern, after);
4267 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4269 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4271 rtx last = emit_jump_insn_after_noloc (pattern, after);
4273 if (pattern == NULL_RTX || !loc)
4276 after = NEXT_INSN (after);
4279 if (active_insn_p (after) && !INSN_LOCATOR (after))
4280 INSN_LOCATOR (after) = loc;
4283 after = NEXT_INSN (after);
4288 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4290 emit_jump_insn_after (rtx pattern, rtx after)
4293 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4295 return emit_jump_insn_after_noloc (pattern, after);
4298 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4300 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4302 rtx last = emit_call_insn_after_noloc (pattern, after);
4304 if (pattern == NULL_RTX || !loc)
4307 after = NEXT_INSN (after);
4310 if (active_insn_p (after) && !INSN_LOCATOR (after))
4311 INSN_LOCATOR (after) = loc;
4314 after = NEXT_INSN (after);
4319 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4321 emit_call_insn_after (rtx pattern, rtx after)
4324 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4326 return emit_call_insn_after_noloc (pattern, after);
4329 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4331 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4333 rtx first = PREV_INSN (before);
4334 rtx last = emit_insn_before_noloc (pattern, before);
4336 if (pattern == NULL_RTX || !loc)
4339 first = NEXT_INSN (first);
4342 if (active_insn_p (first) && !INSN_LOCATOR (first))
4343 INSN_LOCATOR (first) = loc;
4346 first = NEXT_INSN (first);
4351 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4353 emit_insn_before (rtx pattern, rtx before)
4355 if (INSN_P (before))
4356 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4358 return emit_insn_before_noloc (pattern, before);
4361 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4363 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4365 rtx first = PREV_INSN (before);
4366 rtx last = emit_jump_insn_before_noloc (pattern, before);
4368 if (pattern == NULL_RTX)
4371 first = NEXT_INSN (first);
4374 if (active_insn_p (first) && !INSN_LOCATOR (first))
4375 INSN_LOCATOR (first) = loc;
4378 first = NEXT_INSN (first);
4383 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4385 emit_jump_insn_before (rtx pattern, rtx before)
4387 if (INSN_P (before))
4388 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4390 return emit_jump_insn_before_noloc (pattern, before);
4393 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4395 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4397 rtx first = PREV_INSN (before);
4398 rtx last = emit_call_insn_before_noloc (pattern, before);
4400 if (pattern == NULL_RTX)
4403 first = NEXT_INSN (first);
4406 if (active_insn_p (first) && !INSN_LOCATOR (first))
4407 INSN_LOCATOR (first) = loc;
4410 first = NEXT_INSN (first);
4415 /* like emit_call_insn_before_noloc,
4416 but set insn_locator according to before. */
4418 emit_call_insn_before (rtx pattern, rtx before)
4420 if (INSN_P (before))
4421 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4423 return emit_call_insn_before_noloc (pattern, before);
4426 /* Take X and emit it at the end of the doubly-linked
4429 Returns the last insn emitted. */
4434 rtx last = last_insn;
4440 switch (GET_CODE (x))
4451 rtx next = NEXT_INSN (insn);
4458 #ifdef ENABLE_RTL_CHECKING
4465 last = make_insn_raw (x);
4473 /* Make an insn of code JUMP_INSN with pattern X
4474 and add it to the end of the doubly-linked list. */
4477 emit_jump_insn (rtx x)
4479 rtx last = NULL_RTX, insn;
4481 switch (GET_CODE (x))
4492 rtx next = NEXT_INSN (insn);
4499 #ifdef ENABLE_RTL_CHECKING
4506 last = make_jump_insn_raw (x);
4514 /* Make an insn of code CALL_INSN with pattern X
4515 and add it to the end of the doubly-linked list. */
4518 emit_call_insn (rtx x)
4522 switch (GET_CODE (x))
4530 insn = emit_insn (x);
4533 #ifdef ENABLE_RTL_CHECKING
4540 insn = make_call_insn_raw (x);
4548 /* Add the label LABEL to the end of the doubly-linked list. */
4551 emit_label (rtx label)
4553 /* This can be called twice for the same label
4554 as a result of the confusion that follows a syntax error!
4555 So make it harmless. */
4556 if (INSN_UID (label) == 0)
4558 INSN_UID (label) = cur_insn_uid++;
4564 /* Make an insn of code BARRIER
4565 and add it to the end of the doubly-linked list. */
4570 rtx barrier = rtx_alloc (BARRIER);
4571 INSN_UID (barrier) = cur_insn_uid++;
4576 /* Make line numbering NOTE insn for LOCATION add it to the end
4577 of the doubly-linked list, but only if line-numbers are desired for
4578 debugging info and it doesn't match the previous one. */
4581 emit_line_note (location_t location)
4585 #ifdef USE_MAPPED_LOCATION
4586 if (location == last_location)
4589 if (location.file && last_location.file
4590 && !strcmp (location.file, last_location.file)
4591 && location.line == last_location.line)
4594 last_location = location;
4596 if (no_line_numbers)
4602 #ifdef USE_MAPPED_LOCATION
4603 note = emit_note ((int) location);
4605 note = emit_note (location.line);
4606 NOTE_SOURCE_FILE (note) = location.file;
4612 /* Emit a copy of note ORIG. */
4615 emit_note_copy (rtx orig)
4619 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4625 note = rtx_alloc (NOTE);
4627 INSN_UID (note) = cur_insn_uid++;
4628 NOTE_DATA (note) = NOTE_DATA (orig);
4629 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4630 BLOCK_FOR_INSN (note) = NULL;
4636 /* Make an insn of code NOTE or type NOTE_NO
4637 and add it to the end of the doubly-linked list. */
4640 emit_note (int note_no)
4644 note = rtx_alloc (NOTE);
4645 INSN_UID (note) = cur_insn_uid++;
4646 NOTE_LINE_NUMBER (note) = note_no;
4647 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4648 BLOCK_FOR_INSN (note) = NULL;
4653 /* Cause next statement to emit a line note even if the line number
4657 force_next_line_note (void)
4659 #ifdef USE_MAPPED_LOCATION
4662 last_location.line = -1;
4666 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4667 note of this type already exists, remove it first. */
4670 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4672 rtx note = find_reg_note (insn, kind, NULL_RTX);
4678 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4679 has multiple sets (some callers assume single_set
4680 means the insn only has one set, when in fact it
4681 means the insn only has one * useful * set). */
4682 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4688 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4689 It serves no useful purpose and breaks eliminate_regs. */
4690 if (GET_CODE (datum) == ASM_OPERANDS)
4700 XEXP (note, 0) = datum;
4704 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4705 return REG_NOTES (insn);
4708 /* Return an indication of which type of insn should have X as a body.
4709 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4711 static enum rtx_code
4712 classify_insn (rtx x)
4716 if (GET_CODE (x) == CALL)
4718 if (GET_CODE (x) == RETURN)
4720 if (GET_CODE (x) == SET)
4722 if (SET_DEST (x) == pc_rtx)
4724 else if (GET_CODE (SET_SRC (x)) == CALL)
4729 if (GET_CODE (x) == PARALLEL)
4732 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4733 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4735 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4736 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4738 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4739 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4745 /* Emit the rtl pattern X as an appropriate kind of insn.
4746 If X is a label, it is simply added into the insn chain. */
4751 enum rtx_code code = classify_insn (x);
4756 return emit_label (x);
4758 return emit_insn (x);
4761 rtx insn = emit_jump_insn (x);
4762 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4763 return emit_barrier ();
4767 return emit_call_insn (x);
4773 /* Space for free sequence stack entries. */
4774 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4776 /* Begin emitting insns to a sequence. If this sequence will contain
4777 something that might cause the compiler to pop arguments to function
4778 calls (because those pops have previously been deferred; see
4779 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4780 before calling this function. That will ensure that the deferred
4781 pops are not accidentally emitted in the middle of this sequence. */
4784 start_sequence (void)
4786 struct sequence_stack *tem;
4788 if (free_sequence_stack != NULL)
4790 tem = free_sequence_stack;
4791 free_sequence_stack = tem->next;
4794 tem = ggc_alloc (sizeof (struct sequence_stack));
4796 tem->next = seq_stack;
4797 tem->first = first_insn;
4798 tem->last = last_insn;
4806 /* Set up the insn chain starting with FIRST as the current sequence,
4807 saving the previously current one. See the documentation for
4808 start_sequence for more information about how to use this function. */
4811 push_to_sequence (rtx first)
4817 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4823 /* Set up the outer-level insn chain
4824 as the current sequence, saving the previously current one. */
4827 push_topmost_sequence (void)
4829 struct sequence_stack *stack, *top = NULL;
4833 for (stack = seq_stack; stack; stack = stack->next)
4836 first_insn = top->first;
4837 last_insn = top->last;
4840 /* After emitting to the outer-level insn chain, update the outer-level
4841 insn chain, and restore the previous saved state. */
4844 pop_topmost_sequence (void)
4846 struct sequence_stack *stack, *top = NULL;
4848 for (stack = seq_stack; stack; stack = stack->next)
4851 top->first = first_insn;
4852 top->last = last_insn;
4857 /* After emitting to a sequence, restore previous saved state.
4859 To get the contents of the sequence just made, you must call
4860 `get_insns' *before* calling here.
4862 If the compiler might have deferred popping arguments while
4863 generating this sequence, and this sequence will not be immediately
4864 inserted into the instruction stream, use do_pending_stack_adjust
4865 before calling get_insns. That will ensure that the deferred
4866 pops are inserted into this sequence, and not into some random
4867 location in the instruction stream. See INHIBIT_DEFER_POP for more
4868 information about deferred popping of arguments. */
4873 struct sequence_stack *tem = seq_stack;
4875 first_insn = tem->first;
4876 last_insn = tem->last;
4877 seq_stack = tem->next;
4879 memset (tem, 0, sizeof (*tem));
4880 tem->next = free_sequence_stack;
4881 free_sequence_stack = tem;
4884 /* Return 1 if currently emitting into a sequence. */
4887 in_sequence_p (void)
4889 return seq_stack != 0;
4892 /* Put the various virtual registers into REGNO_REG_RTX. */
4895 init_virtual_regs (struct emit_status *es)
4897 rtx *ptr = es->x_regno_reg_rtx;
4898 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4899 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4900 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4901 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4902 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4906 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4907 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4908 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4909 static int copy_insn_n_scratches;
4911 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4912 copied an ASM_OPERANDS.
4913 In that case, it is the original input-operand vector. */
4914 static rtvec orig_asm_operands_vector;
4916 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4917 copied an ASM_OPERANDS.
4918 In that case, it is the copied input-operand vector. */
4919 static rtvec copy_asm_operands_vector;
4921 /* Likewise for the constraints vector. */
4922 static rtvec orig_asm_constraints_vector;
4923 static rtvec copy_asm_constraints_vector;
4925 /* Recursively create a new copy of an rtx for copy_insn.
4926 This function differs from copy_rtx in that it handles SCRATCHes and
4927 ASM_OPERANDs properly.
4928 Normally, this function is not used directly; use copy_insn as front end.
4929 However, you could first copy an insn pattern with copy_insn and then use
4930 this function afterwards to properly copy any REG_NOTEs containing
4934 copy_insn_1 (rtx orig)
4939 const char *format_ptr;
4941 code = GET_CODE (orig);
4955 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4960 for (i = 0; i < copy_insn_n_scratches; i++)
4961 if (copy_insn_scratch_in[i] == orig)
4962 return copy_insn_scratch_out[i];
4966 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4967 a LABEL_REF, it isn't sharable. */
4968 if (GET_CODE (XEXP (orig, 0)) == PLUS
4969 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4970 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4974 /* A MEM with a constant address is not sharable. The problem is that
4975 the constant address may need to be reloaded. If the mem is shared,
4976 then reloading one copy of this mem will cause all copies to appear
4977 to have been reloaded. */
4983 copy = rtx_alloc (code);
4985 /* Copy the various flags, and other information. We assume that
4986 all fields need copying, and then clear the fields that should
4987 not be copied. That is the sensible default behavior, and forces
4988 us to explicitly document why we are *not* copying a flag. */
4989 memcpy (copy, orig, RTX_HDR_SIZE);
4991 /* We do not copy the USED flag, which is used as a mark bit during
4992 walks over the RTL. */
4993 RTX_FLAG (copy, used) = 0;
4995 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4998 RTX_FLAG (copy, jump) = 0;
4999 RTX_FLAG (copy, call) = 0;
5000 RTX_FLAG (copy, frame_related) = 0;
5003 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5005 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5007 copy->u.fld[i] = orig->u.fld[i];
5008 switch (*format_ptr++)
5011 if (XEXP (orig, i) != NULL)
5012 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5017 if (XVEC (orig, i) == orig_asm_constraints_vector)
5018 XVEC (copy, i) = copy_asm_constraints_vector;
5019 else if (XVEC (orig, i) == orig_asm_operands_vector)
5020 XVEC (copy, i) = copy_asm_operands_vector;
5021 else if (XVEC (orig, i) != NULL)
5023 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5024 for (j = 0; j < XVECLEN (copy, i); j++)
5025 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5036 /* These are left unchanged. */
5044 if (code == SCRATCH)
5046 i = copy_insn_n_scratches++;
5047 gcc_assert (i < MAX_RECOG_OPERANDS);
5048 copy_insn_scratch_in[i] = orig;
5049 copy_insn_scratch_out[i] = copy;
5051 else if (code == ASM_OPERANDS)
5053 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5054 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5055 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5056 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5062 /* Create a new copy of an rtx.
5063 This function differs from copy_rtx in that it handles SCRATCHes and
5064 ASM_OPERANDs properly.
5065 INSN doesn't really have to be a full INSN; it could be just the
5068 copy_insn (rtx insn)
5070 copy_insn_n_scratches = 0;
5071 orig_asm_operands_vector = 0;
5072 orig_asm_constraints_vector = 0;
5073 copy_asm_operands_vector = 0;
5074 copy_asm_constraints_vector = 0;
5075 return copy_insn_1 (insn);
5078 /* Initialize data structures and variables in this file
5079 before generating rtl for each function. */
5084 struct function *f = cfun;
5086 f->emit = ggc_alloc (sizeof (struct emit_status));
5090 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5091 last_location = UNKNOWN_LOCATION;
5092 first_label_num = label_num;
5095 /* Init the tables that describe all the pseudo regs. */
5097 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5099 f->emit->regno_pointer_align
5100 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5101 * sizeof (unsigned char));
5104 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5106 /* Put copies of all the hard registers into regno_reg_rtx. */
5107 memcpy (regno_reg_rtx,
5108 static_regno_reg_rtx,
5109 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5111 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5112 init_virtual_regs (f->emit);
5114 /* Indicate that the virtual registers and stack locations are
5116 REG_POINTER (stack_pointer_rtx) = 1;
5117 REG_POINTER (frame_pointer_rtx) = 1;
5118 REG_POINTER (hard_frame_pointer_rtx) = 1;
5119 REG_POINTER (arg_pointer_rtx) = 1;
5121 REG_POINTER (virtual_incoming_args_rtx) = 1;
5122 REG_POINTER (virtual_stack_vars_rtx) = 1;
5123 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5124 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5125 REG_POINTER (virtual_cfa_rtx) = 1;
5127 #ifdef STACK_BOUNDARY
5128 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5129 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5130 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5131 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5133 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5134 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5135 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5136 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5137 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5140 #ifdef INIT_EXPANDERS
5145 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5148 gen_const_vector (enum machine_mode mode, int constant)
5153 enum machine_mode inner;
5155 units = GET_MODE_NUNITS (mode);
5156 inner = GET_MODE_INNER (mode);
5158 v = rtvec_alloc (units);
5160 /* We need to call this function after we set the scalar const_tiny_rtx
5162 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5164 for (i = 0; i < units; ++i)
5165 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5167 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5171 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5172 all elements are zero, and the one vector when all elements are one. */
5174 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5176 enum machine_mode inner = GET_MODE_INNER (mode);
5177 int nunits = GET_MODE_NUNITS (mode);
5181 /* Check to see if all of the elements have the same value. */
5182 x = RTVEC_ELT (v, nunits - 1);
5183 for (i = nunits - 2; i >= 0; i--)
5184 if (RTVEC_ELT (v, i) != x)
5187 /* If the values are all the same, check to see if we can use one of the
5188 standard constant vectors. */
5191 if (x == CONST0_RTX (inner))
5192 return CONST0_RTX (mode);
5193 else if (x == CONST1_RTX (inner))
5194 return CONST1_RTX (mode);
5197 return gen_rtx_raw_CONST_VECTOR (mode, v);
5200 /* Create some permanent unique rtl objects shared between all functions.
5201 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5204 init_emit_once (int line_numbers)
5207 enum machine_mode mode;
5208 enum machine_mode double_mode;
5210 /* We need reg_raw_mode, so initialize the modes now. */
5211 init_reg_modes_once ();
5213 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5215 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5216 const_int_htab_eq, NULL);
5218 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5219 const_double_htab_eq, NULL);
5221 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5222 mem_attrs_htab_eq, NULL);
5223 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5224 reg_attrs_htab_eq, NULL);
5226 no_line_numbers = ! line_numbers;
5228 /* Compute the word and byte modes. */
5230 byte_mode = VOIDmode;
5231 word_mode = VOIDmode;
5232 double_mode = VOIDmode;
5234 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5235 mode = GET_MODE_WIDER_MODE (mode))
5237 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5238 && byte_mode == VOIDmode)
5241 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5242 && word_mode == VOIDmode)
5246 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5247 mode = GET_MODE_WIDER_MODE (mode))
5249 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5250 && double_mode == VOIDmode)
5254 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5256 /* Assign register numbers to the globally defined register rtx.
5257 This must be done at runtime because the register number field
5258 is in a union and some compilers can't initialize unions. */
5260 pc_rtx = gen_rtx_PC (VOIDmode);
5261 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5262 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5263 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5264 if (hard_frame_pointer_rtx == 0)
5265 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5266 HARD_FRAME_POINTER_REGNUM);
5267 if (arg_pointer_rtx == 0)
5268 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5269 virtual_incoming_args_rtx =
5270 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5271 virtual_stack_vars_rtx =
5272 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5273 virtual_stack_dynamic_rtx =
5274 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5275 virtual_outgoing_args_rtx =
5276 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5277 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5279 /* Initialize RTL for commonly used hard registers. These are
5280 copied into regno_reg_rtx as we begin to compile each function. */
5281 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5282 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5284 #ifdef INIT_EXPANDERS
5285 /* This is to initialize {init|mark|free}_machine_status before the first
5286 call to push_function_context_to. This is needed by the Chill front
5287 end which calls push_function_context_to before the first call to
5288 init_function_start. */
5292 /* Create the unique rtx's for certain rtx codes and operand values. */
5294 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5295 tries to use these variables. */
5296 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5297 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5298 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5300 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5301 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5302 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5304 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5306 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5307 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5308 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5309 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5310 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5311 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5312 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5314 dconsthalf = dconst1;
5315 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5317 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5319 /* Initialize mathematical constants for constant folding builtins.
5320 These constants need to be given to at least 160 bits precision. */
5321 real_from_string (&dconstpi,
5322 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5323 real_from_string (&dconste,
5324 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5326 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5328 REAL_VALUE_TYPE *r =
5329 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5331 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5332 mode = GET_MODE_WIDER_MODE (mode))
5333 const_tiny_rtx[i][(int) mode] =
5334 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5336 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5338 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5339 mode = GET_MODE_WIDER_MODE (mode))
5340 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5342 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5344 mode = GET_MODE_WIDER_MODE (mode))
5345 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5348 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5350 mode = GET_MODE_WIDER_MODE (mode))
5352 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5353 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5356 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5358 mode = GET_MODE_WIDER_MODE (mode))
5360 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5361 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5364 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5365 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5366 const_tiny_rtx[0][i] = const0_rtx;
5368 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5369 if (STORE_FLAG_VALUE == 1)
5370 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5372 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5373 return_address_pointer_rtx
5374 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5377 #ifdef STATIC_CHAIN_REGNUM
5378 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5380 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5381 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5382 static_chain_incoming_rtx
5383 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5386 static_chain_incoming_rtx = static_chain_rtx;
5390 static_chain_rtx = STATIC_CHAIN;
5392 #ifdef STATIC_CHAIN_INCOMING
5393 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5395 static_chain_incoming_rtx = static_chain_rtx;
5399 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5400 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5403 /* Produce exact duplicate of insn INSN after AFTER.
5404 Care updating of libcall regions if present. */
5407 emit_copy_of_insn_after (rtx insn, rtx after)
5410 rtx note1, note2, link;
5412 switch (GET_CODE (insn))
5415 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5419 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5423 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5424 if (CALL_INSN_FUNCTION_USAGE (insn))
5425 CALL_INSN_FUNCTION_USAGE (new)
5426 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5427 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5428 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5435 /* Update LABEL_NUSES. */
5436 mark_jump_label (PATTERN (new), new, 0);
5438 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5440 /* If the old insn is frame related, then so is the new one. This is
5441 primarily needed for IA-64 unwind info which marks epilogue insns,
5442 which may be duplicated by the basic block reordering code. */
5443 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn);
5445 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5447 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5448 if (REG_NOTE_KIND (link) != REG_LABEL)
5450 if (GET_CODE (link) == EXPR_LIST)
5452 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5457 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5462 /* Fix the libcall sequences. */
5463 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5466 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5468 XEXP (note1, 0) = p;
5469 XEXP (note2, 0) = new;
5471 INSN_CODE (new) = INSN_CODE (insn);
5475 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5477 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5479 if (hard_reg_clobbers[mode][regno])
5480 return hard_reg_clobbers[mode][regno];
5482 return (hard_reg_clobbers[mode][regno] =
5483 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5486 #include "gt-emit-rtl.h"