1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
64 struct target_rtl default_target_rtl;
66 struct target_rtl *this_target_rtl = &default_target_rtl;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num = 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
106 REAL_VALUE_TYPE dconsthalf;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
110 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
117 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
119 /* A hash table storing CONST_INTs whose absolute value is greater
120 than MAX_SAVED_CONST_INT. */
122 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
123 htab_t const_int_htab;
125 /* A hash table storing memory attribute structures. */
126 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
127 htab_t mem_attrs_htab;
129 /* A hash table storing register attribute structures. */
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
131 htab_t reg_attrs_htab;
133 /* A hash table storing all CONST_DOUBLEs. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
135 htab_t const_double_htab;
137 /* A hash table storing all CONST_FIXEDs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
139 htab_t const_fixed_htab;
141 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
142 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
143 #define last_location (crtl->emit.x_last_location)
144 #define first_label_num (crtl->emit.x_first_label_num)
146 static rtx make_call_insn_raw (rtx);
147 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
148 static void set_used_decls (tree);
149 static void mark_label_nuses (rtx);
150 static hashval_t const_int_htab_hash (const void *);
151 static int const_int_htab_eq (const void *, const void *);
152 static hashval_t const_double_htab_hash (const void *);
153 static int const_double_htab_eq (const void *, const void *);
154 static rtx lookup_const_double (rtx);
155 static hashval_t const_fixed_htab_hash (const void *);
156 static int const_fixed_htab_eq (const void *, const void *);
157 static rtx lookup_const_fixed (rtx);
158 static hashval_t mem_attrs_htab_hash (const void *);
159 static int mem_attrs_htab_eq (const void *, const void *);
160 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
161 addr_space_t, enum machine_mode);
162 static hashval_t reg_attrs_htab_hash (const void *);
163 static int reg_attrs_htab_eq (const void *, const void *);
164 static reg_attrs *get_reg_attrs (tree, int);
165 static rtx gen_const_vector (enum machine_mode, int);
166 static void copy_rtx_if_shared_1 (rtx *orig);
168 /* Probability of the conditional branch currently proceeded by try_split.
169 Set to -1 otherwise. */
170 int split_branch_probability = -1;
172 /* Returns a hash code for X (which is a really a CONST_INT). */
175 const_int_htab_hash (const void *x)
177 return (hashval_t) INTVAL ((const_rtx) x);
180 /* Returns nonzero if the value represented by X (which is really a
181 CONST_INT) is the same as that given by Y (which is really a
185 const_int_htab_eq (const void *x, const void *y)
187 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
190 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
192 const_double_htab_hash (const void *x)
194 const_rtx const value = (const_rtx) x;
197 if (GET_MODE (value) == VOIDmode)
198 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
201 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
202 /* MODE is used in the comparison, so it should be in the hash. */
203 h ^= GET_MODE (value);
208 /* Returns nonzero if the value represented by X (really a ...)
209 is the same as that represented by Y (really a ...) */
211 const_double_htab_eq (const void *x, const void *y)
213 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
215 if (GET_MODE (a) != GET_MODE (b))
217 if (GET_MODE (a) == VOIDmode)
218 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
219 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
221 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
222 CONST_DOUBLE_REAL_VALUE (b));
225 /* Returns a hash code for X (which is really a CONST_FIXED). */
228 const_fixed_htab_hash (const void *x)
230 const_rtx const value = (const_rtx) x;
233 h = fixed_hash (CONST_FIXED_VALUE (value));
234 /* MODE is used in the comparison, so it should be in the hash. */
235 h ^= GET_MODE (value);
239 /* Returns nonzero if the value represented by X (really a ...)
240 is the same as that represented by Y (really a ...). */
243 const_fixed_htab_eq (const void *x, const void *y)
245 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
247 if (GET_MODE (a) != GET_MODE (b))
249 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
252 /* Returns a hash code for X (which is a really a mem_attrs *). */
255 mem_attrs_htab_hash (const void *x)
257 const mem_attrs *const p = (const mem_attrs *) x;
259 return (p->alias ^ (p->align * 1000)
260 ^ (p->addrspace * 4000)
261 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
262 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
263 ^ (size_t) iterative_hash_expr (p->expr, 0));
266 /* Returns nonzero if the value represented by X (which is really a
267 mem_attrs *) is the same as that given by Y (which is also really a
271 mem_attrs_htab_eq (const void *x, const void *y)
273 const mem_attrs *const p = (const mem_attrs *) x;
274 const mem_attrs *const q = (const mem_attrs *) y;
276 return (p->alias == q->alias && p->offset == q->offset
277 && p->size == q->size && p->align == q->align
278 && p->addrspace == q->addrspace
279 && (p->expr == q->expr
280 || (p->expr != NULL_TREE && q->expr != NULL_TREE
281 && operand_equal_p (p->expr, q->expr, 0))));
284 /* Allocate a new mem_attrs structure and insert it into the hash table if
285 one identical to it is not already in the table. We are doing this for
289 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
290 unsigned int align, addr_space_t addrspace, enum machine_mode mode)
295 /* If everything is the default, we can just return zero.
296 This must match what the corresponding MEM_* macros return when the
297 field is not present. */
298 if (alias == 0 && expr == 0 && offset == 0 && addrspace == 0
300 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
301 && (STRICT_ALIGNMENT && mode != BLKmode
302 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
307 attrs.offset = offset;
310 attrs.addrspace = addrspace;
312 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
315 *slot = ggc_alloc_mem_attrs ();
316 memcpy (*slot, &attrs, sizeof (mem_attrs));
319 return (mem_attrs *) *slot;
322 /* Returns a hash code for X (which is a really a reg_attrs *). */
325 reg_attrs_htab_hash (const void *x)
327 const reg_attrs *const p = (const reg_attrs *) x;
329 return ((p->offset * 1000) ^ (long) p->decl);
332 /* Returns nonzero if the value represented by X (which is really a
333 reg_attrs *) is the same as that given by Y (which is also really a
337 reg_attrs_htab_eq (const void *x, const void *y)
339 const reg_attrs *const p = (const reg_attrs *) x;
340 const reg_attrs *const q = (const reg_attrs *) y;
342 return (p->decl == q->decl && p->offset == q->offset);
344 /* Allocate a new reg_attrs structure and insert it into the hash table if
345 one identical to it is not already in the table. We are doing this for
349 get_reg_attrs (tree decl, int offset)
354 /* If everything is the default, we can just return zero. */
355 if (decl == 0 && offset == 0)
359 attrs.offset = offset;
361 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
364 *slot = ggc_alloc_reg_attrs ();
365 memcpy (*slot, &attrs, sizeof (reg_attrs));
368 return (reg_attrs *) *slot;
373 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
379 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
380 MEM_VOLATILE_P (x) = true;
386 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
387 don't attempt to share with the various global pieces of rtl (such as
388 frame_pointer_rtx). */
391 gen_raw_REG (enum machine_mode mode, int regno)
393 rtx x = gen_rtx_raw_REG (mode, regno);
394 ORIGINAL_REGNO (x) = regno;
398 /* There are some RTL codes that require special attention; the generation
399 functions do the raw handling. If you add to this list, modify
400 special_rtx in gengenrtl.c as well. */
403 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
407 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
408 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
410 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
411 if (const_true_rtx && arg == STORE_FLAG_VALUE)
412 return const_true_rtx;
415 /* Look up the CONST_INT in the hash table. */
416 slot = htab_find_slot_with_hash (const_int_htab, &arg,
417 (hashval_t) arg, INSERT);
419 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
425 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
427 return GEN_INT (trunc_int_for_mode (c, mode));
430 /* CONST_DOUBLEs might be created from pairs of integers, or from
431 REAL_VALUE_TYPEs. Also, their length is known only at run time,
432 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
434 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
435 hash table. If so, return its counterpart; otherwise add it
436 to the hash table and return it. */
438 lookup_const_double (rtx real)
440 void **slot = htab_find_slot (const_double_htab, real, INSERT);
447 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
448 VALUE in mode MODE. */
450 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
452 rtx real = rtx_alloc (CONST_DOUBLE);
453 PUT_MODE (real, mode);
457 return lookup_const_double (real);
460 /* Determine whether FIXED, a CONST_FIXED, already exists in the
461 hash table. If so, return its counterpart; otherwise add it
462 to the hash table and return it. */
465 lookup_const_fixed (rtx fixed)
467 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
474 /* Return a CONST_FIXED rtx for a fixed-point value specified by
475 VALUE in mode MODE. */
478 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
480 rtx fixed = rtx_alloc (CONST_FIXED);
481 PUT_MODE (fixed, mode);
485 return lookup_const_fixed (fixed);
488 /* Constructs double_int from rtx CST. */
491 rtx_to_double_int (const_rtx cst)
495 if (CONST_INT_P (cst))
496 r = shwi_to_double_int (INTVAL (cst));
497 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
499 r.low = CONST_DOUBLE_LOW (cst);
500 r.high = CONST_DOUBLE_HIGH (cst);
509 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
513 immed_double_int_const (double_int i, enum machine_mode mode)
515 return immed_double_const (i.low, i.high, mode);
518 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
519 of ints: I0 is the low-order word and I1 is the high-order word.
520 Do not use this routine for non-integer modes; convert to
521 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
524 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
529 /* There are the following cases (note that there are no modes with
530 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
532 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
534 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
535 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
536 from copies of the sign bit, and sign of i0 and i1 are the same), then
537 we return a CONST_INT for i0.
538 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
539 if (mode != VOIDmode)
541 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
542 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
543 /* We can get a 0 for an error mark. */
544 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
545 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
547 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
548 return gen_int_mode (i0, mode);
550 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
553 /* If this integer fits in one word, return a CONST_INT. */
554 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
557 /* We use VOIDmode for integers. */
558 value = rtx_alloc (CONST_DOUBLE);
559 PUT_MODE (value, VOIDmode);
561 CONST_DOUBLE_LOW (value) = i0;
562 CONST_DOUBLE_HIGH (value) = i1;
564 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
565 XWINT (value, i) = 0;
567 return lookup_const_double (value);
571 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
573 /* In case the MD file explicitly references the frame pointer, have
574 all such references point to the same frame pointer. This is
575 used during frame pointer elimination to distinguish the explicit
576 references to these registers from pseudos that happened to be
579 If we have eliminated the frame pointer or arg pointer, we will
580 be using it as a normal register, for example as a spill
581 register. In such cases, we might be accessing it in a mode that
582 is not Pmode and therefore cannot use the pre-allocated rtx.
584 Also don't do this when we are making new REGs in reload, since
585 we don't want to get confused with the real pointers. */
587 if (mode == Pmode && !reload_in_progress)
589 if (regno == FRAME_POINTER_REGNUM
590 && (!reload_completed || frame_pointer_needed))
591 return frame_pointer_rtx;
592 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
593 if (regno == HARD_FRAME_POINTER_REGNUM
594 && (!reload_completed || frame_pointer_needed))
595 return hard_frame_pointer_rtx;
597 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
598 if (regno == ARG_POINTER_REGNUM)
599 return arg_pointer_rtx;
601 #ifdef RETURN_ADDRESS_POINTER_REGNUM
602 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
603 return return_address_pointer_rtx;
605 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
606 && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
607 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
608 return pic_offset_table_rtx;
609 if (regno == STACK_POINTER_REGNUM)
610 return stack_pointer_rtx;
614 /* If the per-function register table has been set up, try to re-use
615 an existing entry in that table to avoid useless generation of RTL.
617 This code is disabled for now until we can fix the various backends
618 which depend on having non-shared hard registers in some cases. Long
619 term we want to re-enable this code as it can significantly cut down
620 on the amount of useless RTL that gets generated.
622 We'll also need to fix some code that runs after reload that wants to
623 set ORIGINAL_REGNO. */
628 && regno < FIRST_PSEUDO_REGISTER
629 && reg_raw_mode[regno] == mode)
630 return regno_reg_rtx[regno];
633 return gen_raw_REG (mode, regno);
637 gen_rtx_MEM (enum machine_mode mode, rtx addr)
639 rtx rt = gen_rtx_raw_MEM (mode, addr);
641 /* This field is not cleared by the mere allocation of the rtx, so
648 /* Generate a memory referring to non-trapping constant memory. */
651 gen_const_mem (enum machine_mode mode, rtx addr)
653 rtx mem = gen_rtx_MEM (mode, addr);
654 MEM_READONLY_P (mem) = 1;
655 MEM_NOTRAP_P (mem) = 1;
659 /* Generate a MEM referring to fixed portions of the frame, e.g., register
663 gen_frame_mem (enum machine_mode mode, rtx addr)
665 rtx mem = gen_rtx_MEM (mode, addr);
666 MEM_NOTRAP_P (mem) = 1;
667 set_mem_alias_set (mem, get_frame_alias_set ());
671 /* Generate a MEM referring to a temporary use of the stack, not part
672 of the fixed stack frame. For example, something which is pushed
673 by a target splitter. */
675 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
677 rtx mem = gen_rtx_MEM (mode, addr);
678 MEM_NOTRAP_P (mem) = 1;
679 if (!cfun->calls_alloca)
680 set_mem_alias_set (mem, get_frame_alias_set ());
684 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
685 this construct would be valid, and false otherwise. */
688 validate_subreg (enum machine_mode omode, enum machine_mode imode,
689 const_rtx reg, unsigned int offset)
691 unsigned int isize = GET_MODE_SIZE (imode);
692 unsigned int osize = GET_MODE_SIZE (omode);
694 /* All subregs must be aligned. */
695 if (offset % osize != 0)
698 /* The subreg offset cannot be outside the inner object. */
702 /* ??? This should not be here. Temporarily continue to allow word_mode
703 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
704 Generally, backends are doing something sketchy but it'll take time to
706 if (omode == word_mode)
708 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
709 is the culprit here, and not the backends. */
710 else if (osize >= UNITS_PER_WORD && isize >= osize)
712 /* Allow component subregs of complex and vector. Though given the below
713 extraction rules, it's not always clear what that means. */
714 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
715 && GET_MODE_INNER (imode) == omode)
717 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
718 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
719 represent this. It's questionable if this ought to be represented at
720 all -- why can't this all be hidden in post-reload splitters that make
721 arbitrarily mode changes to the registers themselves. */
722 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
724 /* Subregs involving floating point modes are not allowed to
725 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
726 (subreg:SI (reg:DF) 0) isn't. */
727 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
733 /* Paradoxical subregs must have offset zero. */
737 /* This is a normal subreg. Verify that the offset is representable. */
739 /* For hard registers, we already have most of these rules collected in
740 subreg_offset_representable_p. */
741 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
743 unsigned int regno = REGNO (reg);
745 #ifdef CANNOT_CHANGE_MODE_CLASS
746 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
747 && GET_MODE_INNER (imode) == omode)
749 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
753 return subreg_offset_representable_p (regno, imode, offset, omode);
756 /* For pseudo registers, we want most of the same checks. Namely:
757 If the register no larger than a word, the subreg must be lowpart.
758 If the register is larger than a word, the subreg must be the lowpart
759 of a subword. A subreg does *not* perform arbitrary bit extraction.
760 Given that we've already checked mode/offset alignment, we only have
761 to check subword subregs here. */
762 if (osize < UNITS_PER_WORD)
764 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
765 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
766 if (offset % UNITS_PER_WORD != low_off)
773 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
775 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
776 return gen_rtx_raw_SUBREG (mode, reg, offset);
779 /* Generate a SUBREG representing the least-significant part of REG if MODE
780 is smaller than mode of REG, otherwise paradoxical SUBREG. */
783 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
785 enum machine_mode inmode;
787 inmode = GET_MODE (reg);
788 if (inmode == VOIDmode)
790 return gen_rtx_SUBREG (mode, reg,
791 subreg_lowpart_offset (mode, inmode));
795 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
798 gen_rtvec (int n, ...)
806 /* Don't allocate an empty rtvec... */
810 rt_val = rtvec_alloc (n);
812 for (i = 0; i < n; i++)
813 rt_val->elem[i] = va_arg (p, rtx);
820 gen_rtvec_v (int n, rtx *argp)
825 /* Don't allocate an empty rtvec... */
829 rt_val = rtvec_alloc (n);
831 for (i = 0; i < n; i++)
832 rt_val->elem[i] = *argp++;
837 /* Return the number of bytes between the start of an OUTER_MODE
838 in-memory value and the start of an INNER_MODE in-memory value,
839 given that the former is a lowpart of the latter. It may be a
840 paradoxical lowpart, in which case the offset will be negative
841 on big-endian targets. */
844 byte_lowpart_offset (enum machine_mode outer_mode,
845 enum machine_mode inner_mode)
847 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
848 return subreg_lowpart_offset (outer_mode, inner_mode);
850 return -subreg_lowpart_offset (inner_mode, outer_mode);
853 /* Generate a REG rtx for a new pseudo register of mode MODE.
854 This pseudo is assigned the next sequential register number. */
857 gen_reg_rtx (enum machine_mode mode)
860 unsigned int align = GET_MODE_ALIGNMENT (mode);
862 gcc_assert (can_create_pseudo_p ());
864 /* If a virtual register with bigger mode alignment is generated,
865 increase stack alignment estimation because it might be spilled
867 if (SUPPORTS_STACK_ALIGNMENT
868 && crtl->stack_alignment_estimated < align
869 && !crtl->stack_realign_processed)
871 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
872 if (crtl->stack_alignment_estimated < min_align)
873 crtl->stack_alignment_estimated = min_align;
876 if (generating_concat_p
877 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
878 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
880 /* For complex modes, don't make a single pseudo.
881 Instead, make a CONCAT of two pseudos.
882 This allows noncontiguous allocation of the real and imaginary parts,
883 which makes much better code. Besides, allocating DCmode
884 pseudos overstrains reload on some machines like the 386. */
885 rtx realpart, imagpart;
886 enum machine_mode partmode = GET_MODE_INNER (mode);
888 realpart = gen_reg_rtx (partmode);
889 imagpart = gen_reg_rtx (partmode);
890 return gen_rtx_CONCAT (mode, realpart, imagpart);
893 /* Make sure regno_pointer_align, and regno_reg_rtx are large
894 enough to have an element for this pseudo reg number. */
896 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
898 int old_size = crtl->emit.regno_pointer_align_length;
902 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
903 memset (tmp + old_size, 0, old_size);
904 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
906 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
907 memset (new1 + old_size, 0, old_size * sizeof (rtx));
908 regno_reg_rtx = new1;
910 crtl->emit.regno_pointer_align_length = old_size * 2;
913 val = gen_raw_REG (mode, reg_rtx_no);
914 regno_reg_rtx[reg_rtx_no++] = val;
918 /* Update NEW with the same attributes as REG, but with OFFSET added
919 to the REG_OFFSET. */
922 update_reg_offset (rtx new_rtx, rtx reg, int offset)
924 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
925 REG_OFFSET (reg) + offset);
928 /* Generate a register with same attributes as REG, but with OFFSET
929 added to the REG_OFFSET. */
932 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
935 rtx new_rtx = gen_rtx_REG (mode, regno);
937 update_reg_offset (new_rtx, reg, offset);
941 /* Generate a new pseudo-register with the same attributes as REG, but
942 with OFFSET added to the REG_OFFSET. */
945 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
947 rtx new_rtx = gen_reg_rtx (mode);
949 update_reg_offset (new_rtx, reg, offset);
953 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
954 new register is a (possibly paradoxical) lowpart of the old one. */
957 adjust_reg_mode (rtx reg, enum machine_mode mode)
959 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
960 PUT_MODE (reg, mode);
963 /* Copy REG's attributes from X, if X has any attributes. If REG and X
964 have different modes, REG is a (possibly paradoxical) lowpart of X. */
967 set_reg_attrs_from_value (rtx reg, rtx x)
971 /* Hard registers can be reused for multiple purposes within the same
972 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
974 if (HARD_REGISTER_P (reg))
977 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
980 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
982 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
984 mark_reg_pointer (reg, 0);
989 update_reg_offset (reg, x, offset);
991 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
995 /* Generate a REG rtx for a new pseudo register, copying the mode
996 and attributes from X. */
999 gen_reg_rtx_and_attrs (rtx x)
1001 rtx reg = gen_reg_rtx (GET_MODE (x));
1002 set_reg_attrs_from_value (reg, x);
1006 /* Set the register attributes for registers contained in PARM_RTX.
1007 Use needed values from memory attributes of MEM. */
1010 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1012 if (REG_P (parm_rtx))
1013 set_reg_attrs_from_value (parm_rtx, mem);
1014 else if (GET_CODE (parm_rtx) == PARALLEL)
1016 /* Check for a NULL entry in the first slot, used to indicate that the
1017 parameter goes both on the stack and in registers. */
1018 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1019 for (; i < XVECLEN (parm_rtx, 0); i++)
1021 rtx x = XVECEXP (parm_rtx, 0, i);
1022 if (REG_P (XEXP (x, 0)))
1023 REG_ATTRS (XEXP (x, 0))
1024 = get_reg_attrs (MEM_EXPR (mem),
1025 INTVAL (XEXP (x, 1)));
1030 /* Set the REG_ATTRS for registers in value X, given that X represents
1034 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1036 if (GET_CODE (x) == SUBREG)
1038 gcc_assert (subreg_lowpart_p (x));
1043 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1045 if (GET_CODE (x) == CONCAT)
1047 if (REG_P (XEXP (x, 0)))
1048 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1049 if (REG_P (XEXP (x, 1)))
1050 REG_ATTRS (XEXP (x, 1))
1051 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1053 if (GET_CODE (x) == PARALLEL)
1057 /* Check for a NULL entry, used to indicate that the parameter goes
1058 both on the stack and in registers. */
1059 if (XEXP (XVECEXP (x, 0, 0), 0))
1064 for (i = start; i < XVECLEN (x, 0); i++)
1066 rtx y = XVECEXP (x, 0, i);
1067 if (REG_P (XEXP (y, 0)))
1068 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1073 /* Assign the RTX X to declaration T. */
1076 set_decl_rtl (tree t, rtx x)
1078 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1080 set_reg_attrs_for_decl_rtl (t, x);
1083 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1084 if the ABI requires the parameter to be passed by reference. */
1087 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1089 DECL_INCOMING_RTL (t) = x;
1090 if (x && !by_reference_p)
1091 set_reg_attrs_for_decl_rtl (t, x);
1094 /* Identify REG (which may be a CONCAT) as a user register. */
1097 mark_user_reg (rtx reg)
1099 if (GET_CODE (reg) == CONCAT)
1101 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1102 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1106 gcc_assert (REG_P (reg));
1107 REG_USERVAR_P (reg) = 1;
1111 /* Identify REG as a probable pointer register and show its alignment
1112 as ALIGN, if nonzero. */
1115 mark_reg_pointer (rtx reg, int align)
1117 if (! REG_POINTER (reg))
1119 REG_POINTER (reg) = 1;
1122 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1124 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1125 /* We can no-longer be sure just how aligned this pointer is. */
1126 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1129 /* Return 1 plus largest pseudo reg number used in the current function. */
1137 /* Return 1 + the largest label number used so far in the current function. */
1140 max_label_num (void)
1145 /* Return first label number used in this function (if any were used). */
1148 get_first_label_num (void)
1150 return first_label_num;
1153 /* If the rtx for label was created during the expansion of a nested
1154 function, then first_label_num won't include this label number.
1155 Fix this now so that array indices work later. */
1158 maybe_set_first_label_num (rtx x)
1160 if (CODE_LABEL_NUMBER (x) < first_label_num)
1161 first_label_num = CODE_LABEL_NUMBER (x);
1164 /* Return a value representing some low-order bits of X, where the number
1165 of low-order bits is given by MODE. Note that no conversion is done
1166 between floating-point and fixed-point values, rather, the bit
1167 representation is returned.
1169 This function handles the cases in common between gen_lowpart, below,
1170 and two variants in cse.c and combine.c. These are the cases that can
1171 be safely handled at all points in the compilation.
1173 If this is not a case we can handle, return 0. */
1176 gen_lowpart_common (enum machine_mode mode, rtx x)
1178 int msize = GET_MODE_SIZE (mode);
1181 enum machine_mode innermode;
1183 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1184 so we have to make one up. Yuk. */
1185 innermode = GET_MODE (x);
1187 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1188 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1189 else if (innermode == VOIDmode)
1190 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1192 xsize = GET_MODE_SIZE (innermode);
1194 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1196 if (innermode == mode)
1199 /* MODE must occupy no more words than the mode of X. */
1200 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1201 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1204 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1205 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1208 offset = subreg_lowpart_offset (mode, innermode);
1210 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1211 && (GET_MODE_CLASS (mode) == MODE_INT
1212 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1214 /* If we are getting the low-order part of something that has been
1215 sign- or zero-extended, we can either just use the object being
1216 extended or make a narrower extension. If we want an even smaller
1217 piece than the size of the object being extended, call ourselves
1220 This case is used mostly by combine and cse. */
1222 if (GET_MODE (XEXP (x, 0)) == mode)
1224 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1225 return gen_lowpart_common (mode, XEXP (x, 0));
1226 else if (msize < xsize)
1227 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1229 else if (GET_CODE (x) == SUBREG || REG_P (x)
1230 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1231 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1232 return simplify_gen_subreg (mode, x, innermode, offset);
1234 /* Otherwise, we can't do this. */
1239 gen_highpart (enum machine_mode mode, rtx x)
1241 unsigned int msize = GET_MODE_SIZE (mode);
1244 /* This case loses if X is a subreg. To catch bugs early,
1245 complain if an invalid MODE is used even in other cases. */
1246 gcc_assert (msize <= UNITS_PER_WORD
1247 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1249 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1250 subreg_highpart_offset (mode, GET_MODE (x)));
1251 gcc_assert (result);
1253 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1254 the target if we have a MEM. gen_highpart must return a valid operand,
1255 emitting code if necessary to do so. */
1258 result = validize_mem (result);
1259 gcc_assert (result);
1265 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1266 be VOIDmode constant. */
1268 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1270 if (GET_MODE (exp) != VOIDmode)
1272 gcc_assert (GET_MODE (exp) == innermode);
1273 return gen_highpart (outermode, exp);
1275 return simplify_gen_subreg (outermode, exp, innermode,
1276 subreg_highpart_offset (outermode, innermode));
1279 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1282 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1284 unsigned int offset = 0;
1285 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1289 if (WORDS_BIG_ENDIAN)
1290 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1291 if (BYTES_BIG_ENDIAN)
1292 offset += difference % UNITS_PER_WORD;
1298 /* Return offset in bytes to get OUTERMODE high part
1299 of the value in mode INNERMODE stored in memory in target format. */
1301 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1303 unsigned int offset = 0;
1304 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1306 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1310 if (! WORDS_BIG_ENDIAN)
1311 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1312 if (! BYTES_BIG_ENDIAN)
1313 offset += difference % UNITS_PER_WORD;
1319 /* Return 1 iff X, assumed to be a SUBREG,
1320 refers to the least significant part of its containing reg.
1321 If X is not a SUBREG, always return 1 (it is its own low part!). */
1324 subreg_lowpart_p (const_rtx x)
1326 if (GET_CODE (x) != SUBREG)
1328 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1331 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1332 == SUBREG_BYTE (x));
1335 /* Return subword OFFSET of operand OP.
1336 The word number, OFFSET, is interpreted as the word number starting
1337 at the low-order address. OFFSET 0 is the low-order word if not
1338 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1340 If we cannot extract the required word, we return zero. Otherwise,
1341 an rtx corresponding to the requested word will be returned.
1343 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1344 reload has completed, a valid address will always be returned. After
1345 reload, if a valid address cannot be returned, we return zero.
1347 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1348 it is the responsibility of the caller.
1350 MODE is the mode of OP in case it is a CONST_INT.
1352 ??? This is still rather broken for some cases. The problem for the
1353 moment is that all callers of this thing provide no 'goal mode' to
1354 tell us to work with. This exists because all callers were written
1355 in a word based SUBREG world.
1356 Now use of this function can be deprecated by simplify_subreg in most
1361 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1363 if (mode == VOIDmode)
1364 mode = GET_MODE (op);
1366 gcc_assert (mode != VOIDmode);
1368 /* If OP is narrower than a word, fail. */
1370 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1373 /* If we want a word outside OP, return zero. */
1375 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1378 /* Form a new MEM at the requested address. */
1381 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1383 if (! validate_address)
1386 else if (reload_completed)
1388 if (! strict_memory_address_addr_space_p (word_mode,
1390 MEM_ADDR_SPACE (op)))
1394 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1397 /* Rest can be handled by simplify_subreg. */
1398 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1401 /* Similar to `operand_subword', but never return 0. If we can't
1402 extract the required subword, put OP into a register and try again.
1403 The second attempt must succeed. We always validate the address in
1406 MODE is the mode of OP, in case it is CONST_INT. */
1409 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1411 rtx result = operand_subword (op, offset, 1, mode);
1416 if (mode != BLKmode && mode != VOIDmode)
1418 /* If this is a register which can not be accessed by words, copy it
1419 to a pseudo register. */
1421 op = copy_to_reg (op);
1423 op = force_reg (mode, op);
1426 result = operand_subword (op, offset, 1, mode);
1427 gcc_assert (result);
1432 /* Returns 1 if both MEM_EXPR can be considered equal
1436 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1441 if (! expr1 || ! expr2)
1444 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1447 return operand_equal_p (expr1, expr2, 0);
1450 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1451 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1455 get_mem_align_offset (rtx mem, unsigned int align)
1458 unsigned HOST_WIDE_INT offset;
1460 /* This function can't use
1461 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1462 || !CONST_INT_P (MEM_OFFSET (mem))
1463 || (MAX (MEM_ALIGN (mem),
1464 get_object_alignment (MEM_EXPR (mem), align))
1468 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1470 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1471 for <variable>. get_inner_reference doesn't handle it and
1472 even if it did, the alignment in that case needs to be determined
1473 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1474 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1475 isn't sufficiently aligned, the object it is in might be. */
1476 gcc_assert (MEM_P (mem));
1477 expr = MEM_EXPR (mem);
1478 if (expr == NULL_TREE
1479 || MEM_OFFSET (mem) == NULL_RTX
1480 || !CONST_INT_P (MEM_OFFSET (mem)))
1483 offset = INTVAL (MEM_OFFSET (mem));
1486 if (DECL_ALIGN (expr) < align)
1489 else if (INDIRECT_REF_P (expr))
1491 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1494 else if (TREE_CODE (expr) == COMPONENT_REF)
1498 tree inner = TREE_OPERAND (expr, 0);
1499 tree field = TREE_OPERAND (expr, 1);
1500 tree byte_offset = component_ref_field_offset (expr);
1501 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1504 || !host_integerp (byte_offset, 1)
1505 || !host_integerp (bit_offset, 1))
1508 offset += tree_low_cst (byte_offset, 1);
1509 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1511 if (inner == NULL_TREE)
1513 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1514 < (unsigned int) align)
1518 else if (DECL_P (inner))
1520 if (DECL_ALIGN (inner) < align)
1524 else if (TREE_CODE (inner) != COMPONENT_REF)
1532 return offset & ((align / BITS_PER_UNIT) - 1);
1535 /* Given REF (a MEM) and T, either the type of X or the expression
1536 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1537 if we are making a new object of this type. BITPOS is nonzero if
1538 there is an offset outstanding on T that will be applied later. */
1541 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1542 HOST_WIDE_INT bitpos)
1544 alias_set_type alias = MEM_ALIAS_SET (ref);
1545 tree expr = MEM_EXPR (ref);
1546 rtx offset = MEM_OFFSET (ref);
1547 rtx size = MEM_SIZE (ref);
1548 unsigned int align = MEM_ALIGN (ref);
1549 HOST_WIDE_INT apply_bitpos = 0;
1552 /* It can happen that type_for_mode was given a mode for which there
1553 is no language-level type. In which case it returns NULL, which
1558 type = TYPE_P (t) ? t : TREE_TYPE (t);
1559 if (type == error_mark_node)
1562 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1563 wrong answer, as it assumes that DECL_RTL already has the right alias
1564 info. Callers should not set DECL_RTL until after the call to
1565 set_mem_attributes. */
1566 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1568 /* Get the alias set from the expression or type (perhaps using a
1569 front-end routine) and use it. */
1570 alias = get_alias_set (t);
1572 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1573 MEM_IN_STRUCT_P (ref)
1574 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1575 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1577 /* If we are making an object of this type, or if this is a DECL, we know
1578 that it is a scalar if the type is not an aggregate. */
1579 if ((objectp || DECL_P (t))
1580 && ! AGGREGATE_TYPE_P (type)
1581 && TREE_CODE (type) != COMPLEX_TYPE)
1582 MEM_SCALAR_P (ref) = 1;
1584 /* We can set the alignment from the type if we are making an object,
1585 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1586 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1587 align = MAX (align, TYPE_ALIGN (type));
1589 else if (TREE_CODE (t) == MEM_REF)
1591 tree op0 = TREE_OPERAND (t, 0);
1592 if (TREE_CODE (op0) == ADDR_EXPR
1593 && (DECL_P (TREE_OPERAND (op0, 0))
1594 || CONSTANT_CLASS_P (TREE_OPERAND (op0, 0))))
1596 if (DECL_P (TREE_OPERAND (op0, 0)))
1597 align = DECL_ALIGN (TREE_OPERAND (op0, 0));
1598 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0)))
1600 align = TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0, 0)));
1601 #ifdef CONSTANT_ALIGNMENT
1602 align = CONSTANT_ALIGNMENT (TREE_OPERAND (op0, 0), align);
1605 if (TREE_INT_CST_LOW (TREE_OPERAND (t, 1)) != 0)
1607 unsigned HOST_WIDE_INT ioff
1608 = TREE_INT_CST_LOW (TREE_OPERAND (t, 1));
1609 unsigned HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1610 align = MIN (aoff, align);
1614 /* ??? This isn't fully correct, we can't set the alignment from the
1615 type in all cases. */
1616 align = MAX (align, TYPE_ALIGN (type));
1619 else if (TREE_CODE (t) == TARGET_MEM_REF)
1620 /* ??? This isn't fully correct, we can't set the alignment from the
1621 type in all cases. */
1622 align = MAX (align, TYPE_ALIGN (type));
1624 /* If the size is known, we can set that. */
1625 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1626 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1628 /* If T is not a type, we may be able to deduce some more information about
1633 bool align_computed = false;
1635 if (TREE_THIS_VOLATILE (t))
1636 MEM_VOLATILE_P (ref) = 1;
1638 /* Now remove any conversions: they don't change what the underlying
1639 object is. Likewise for SAVE_EXPR. */
1640 while (CONVERT_EXPR_P (t)
1641 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1642 || TREE_CODE (t) == SAVE_EXPR)
1643 t = TREE_OPERAND (t, 0);
1645 /* We may look through structure-like accesses for the purposes of
1646 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1648 while (TREE_CODE (base) == COMPONENT_REF
1649 || TREE_CODE (base) == REALPART_EXPR
1650 || TREE_CODE (base) == IMAGPART_EXPR
1651 || TREE_CODE (base) == BIT_FIELD_REF)
1652 base = TREE_OPERAND (base, 0);
1654 if (TREE_CODE (base) == MEM_REF
1655 && TREE_CODE (TREE_OPERAND (base, 0)) == ADDR_EXPR)
1656 base = TREE_OPERAND (TREE_OPERAND (base, 0), 0);
1659 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1660 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1662 MEM_NOTRAP_P (ref) = 1;
1664 else if (TREE_CODE (base) == INDIRECT_REF
1665 || TREE_CODE (base) == MEM_REF
1666 || TREE_CODE (base) == TARGET_MEM_REF
1667 || TREE_CODE (base) == ARRAY_REF
1668 || TREE_CODE (base) == ARRAY_RANGE_REF)
1669 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1671 base = get_base_address (base);
1672 if (base && DECL_P (base)
1673 && TREE_READONLY (base)
1674 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1675 MEM_READONLY_P (ref) = 1;
1677 /* If this expression uses it's parent's alias set, mark it such
1678 that we won't change it. */
1679 if (component_uses_parent_alias_set (t))
1680 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1682 /* If this is a decl, set the attributes of the MEM from it. */
1686 offset = const0_rtx;
1687 apply_bitpos = bitpos;
1688 size = (DECL_SIZE_UNIT (t)
1689 && host_integerp (DECL_SIZE_UNIT (t), 1)
1690 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1691 align = DECL_ALIGN (t);
1692 align_computed = true;
1695 /* If this is a constant, we know the alignment. */
1696 else if (CONSTANT_CLASS_P (t))
1698 align = TYPE_ALIGN (type);
1699 #ifdef CONSTANT_ALIGNMENT
1700 align = CONSTANT_ALIGNMENT (t, align);
1702 align_computed = true;
1705 /* If this is a field reference and not a bit-field, record it. */
1706 /* ??? There is some information that can be gleaned from bit-fields,
1707 such as the word offset in the structure that might be modified.
1708 But skip it for now. */
1709 else if (TREE_CODE (t) == COMPONENT_REF
1710 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1713 offset = const0_rtx;
1714 apply_bitpos = bitpos;
1715 /* ??? Any reason the field size would be different than
1716 the size we got from the type? */
1719 /* If this is an array reference, look for an outer field reference. */
1720 else if (TREE_CODE (t) == ARRAY_REF)
1722 tree off_tree = size_zero_node;
1723 /* We can't modify t, because we use it at the end of the
1729 tree index = TREE_OPERAND (t2, 1);
1730 tree low_bound = array_ref_low_bound (t2);
1731 tree unit_size = array_ref_element_size (t2);
1733 /* We assume all arrays have sizes that are a multiple of a byte.
1734 First subtract the lower bound, if any, in the type of the
1735 index, then convert to sizetype and multiply by the size of
1736 the array element. */
1737 if (! integer_zerop (low_bound))
1738 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1741 off_tree = size_binop (PLUS_EXPR,
1742 size_binop (MULT_EXPR,
1743 fold_convert (sizetype,
1747 t2 = TREE_OPERAND (t2, 0);
1749 while (TREE_CODE (t2) == ARRAY_REF);
1755 if (host_integerp (off_tree, 1))
1757 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1758 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1759 align = DECL_ALIGN (t2);
1760 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1762 align_computed = true;
1763 offset = GEN_INT (ioff);
1764 apply_bitpos = bitpos;
1767 else if (TREE_CODE (t2) == COMPONENT_REF)
1771 if (host_integerp (off_tree, 1))
1773 offset = GEN_INT (tree_low_cst (off_tree, 1));
1774 apply_bitpos = bitpos;
1776 /* ??? Any reason the field size would be different than
1777 the size we got from the type? */
1780 /* If this is an indirect reference, record it. */
1781 else if (TREE_CODE (t) == MEM_REF)
1784 offset = const0_rtx;
1785 apply_bitpos = bitpos;
1789 /* If this is an indirect reference, record it. */
1790 else if (TREE_CODE (t) == MEM_REF
1791 || TREE_CODE (t) == TARGET_MEM_REF)
1794 offset = const0_rtx;
1795 apply_bitpos = bitpos;
1798 if (!align_computed && !INDIRECT_REF_P (t))
1800 unsigned int obj_align = get_object_alignment (t, BIGGEST_ALIGNMENT);
1801 align = MAX (align, obj_align);
1805 /* If we modified OFFSET based on T, then subtract the outstanding
1806 bit position offset. Similarly, increase the size of the accessed
1807 object to contain the negative offset. */
1810 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1812 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1815 /* Now set the attributes we computed above. */
1817 = get_mem_attrs (alias, expr, offset, size, align,
1818 TYPE_ADDR_SPACE (type), GET_MODE (ref));
1820 /* If this is already known to be a scalar or aggregate, we are done. */
1821 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1824 /* If it is a reference into an aggregate, this is part of an aggregate.
1825 Otherwise we don't know. */
1826 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1827 || TREE_CODE (t) == ARRAY_RANGE_REF
1828 || TREE_CODE (t) == BIT_FIELD_REF)
1829 MEM_IN_STRUCT_P (ref) = 1;
1833 set_mem_attributes (rtx ref, tree t, int objectp)
1835 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1838 /* Set the alias set of MEM to SET. */
1841 set_mem_alias_set (rtx mem, alias_set_type set)
1843 /* If the new and old alias sets don't conflict, something is wrong. */
1844 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1846 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1847 MEM_SIZE (mem), MEM_ALIGN (mem),
1848 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1851 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1854 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1856 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1857 MEM_OFFSET (mem), MEM_SIZE (mem),
1858 MEM_ALIGN (mem), addrspace, GET_MODE (mem));
1861 /* Set the alignment of MEM to ALIGN bits. */
1864 set_mem_align (rtx mem, unsigned int align)
1866 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1867 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1868 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1871 /* Set the expr for MEM to EXPR. */
1874 set_mem_expr (rtx mem, tree expr)
1877 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1878 MEM_SIZE (mem), MEM_ALIGN (mem),
1879 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1882 /* Set the offset of MEM to OFFSET. */
1885 set_mem_offset (rtx mem, rtx offset)
1887 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1888 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1889 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1892 /* Set the size of MEM to SIZE. */
1895 set_mem_size (rtx mem, rtx size)
1897 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1898 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1899 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1902 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1903 and its address changed to ADDR. (VOIDmode means don't change the mode.
1904 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1905 returned memory location is required to be valid. The memory
1906 attributes are not changed. */
1909 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1914 gcc_assert (MEM_P (memref));
1915 as = MEM_ADDR_SPACE (memref);
1916 if (mode == VOIDmode)
1917 mode = GET_MODE (memref);
1919 addr = XEXP (memref, 0);
1920 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1921 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1926 if (reload_in_progress || reload_completed)
1927 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1929 addr = memory_address_addr_space (mode, addr, as);
1932 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1935 new_rtx = gen_rtx_MEM (mode, addr);
1936 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1940 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1941 way we are changing MEMREF, so we only preserve the alias set. */
1944 change_address (rtx memref, enum machine_mode mode, rtx addr)
1946 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1947 enum machine_mode mmode = GET_MODE (new_rtx);
1950 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1951 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1953 /* If there are no changes, just return the original memory reference. */
1954 if (new_rtx == memref)
1956 if (MEM_ATTRS (memref) == 0
1957 || (MEM_EXPR (memref) == NULL
1958 && MEM_OFFSET (memref) == NULL
1959 && MEM_SIZE (memref) == size
1960 && MEM_ALIGN (memref) == align))
1963 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1964 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1968 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align,
1969 MEM_ADDR_SPACE (memref), mmode);
1974 /* Return a memory reference like MEMREF, but with its mode changed
1975 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1976 nonzero, the memory address is forced to be valid.
1977 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1978 and caller is responsible for adjusting MEMREF base register. */
1981 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1982 int validate, int adjust)
1984 rtx addr = XEXP (memref, 0);
1986 rtx memoffset = MEM_OFFSET (memref);
1988 unsigned int memalign = MEM_ALIGN (memref);
1989 addr_space_t as = MEM_ADDR_SPACE (memref);
1990 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
1993 /* If there are no changes, just return the original memory reference. */
1994 if (mode == GET_MODE (memref) && !offset
1995 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1998 /* ??? Prefer to create garbage instead of creating shared rtl.
1999 This may happen even if offset is nonzero -- consider
2000 (plus (plus reg reg) const_int) -- so do this always. */
2001 addr = copy_rtx (addr);
2003 /* Convert a possibly large offset to a signed value within the
2004 range of the target address space. */
2005 pbits = GET_MODE_BITSIZE (address_mode);
2006 if (HOST_BITS_PER_WIDE_INT > pbits)
2008 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2009 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2015 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2016 object, we can merge it into the LO_SUM. */
2017 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2019 && (unsigned HOST_WIDE_INT) offset
2020 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2021 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2022 plus_constant (XEXP (addr, 1), offset));
2024 addr = plus_constant (addr, offset);
2027 new_rtx = change_address_1 (memref, mode, addr, validate);
2029 /* If the address is a REG, change_address_1 rightfully returns memref,
2030 but this would destroy memref's MEM_ATTRS. */
2031 if (new_rtx == memref && offset != 0)
2032 new_rtx = copy_rtx (new_rtx);
2034 /* Compute the new values of the memory attributes due to this adjustment.
2035 We add the offsets and update the alignment. */
2037 memoffset = GEN_INT (offset + INTVAL (memoffset));
2039 /* Compute the new alignment by taking the MIN of the alignment and the
2040 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2045 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2047 /* We can compute the size in a number of ways. */
2048 if (GET_MODE (new_rtx) != BLKmode)
2049 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2050 else if (MEM_SIZE (memref))
2051 size = plus_constant (MEM_SIZE (memref), -offset);
2053 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2054 memoffset, size, memalign, as,
2055 GET_MODE (new_rtx));
2057 /* At some point, we should validate that this offset is within the object,
2058 if all the appropriate values are known. */
2062 /* Return a memory reference like MEMREF, but with its mode changed
2063 to MODE and its address changed to ADDR, which is assumed to be
2064 MEMREF offset by OFFSET bytes. If VALIDATE is
2065 nonzero, the memory address is forced to be valid. */
2068 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2069 HOST_WIDE_INT offset, int validate)
2071 memref = change_address_1 (memref, VOIDmode, addr, validate);
2072 return adjust_address_1 (memref, mode, offset, validate, 0);
2075 /* Return a memory reference like MEMREF, but whose address is changed by
2076 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2077 known to be in OFFSET (possibly 1). */
2080 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2082 rtx new_rtx, addr = XEXP (memref, 0);
2083 addr_space_t as = MEM_ADDR_SPACE (memref);
2084 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
2086 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2088 /* At this point we don't know _why_ the address is invalid. It
2089 could have secondary memory references, multiplies or anything.
2091 However, if we did go and rearrange things, we can wind up not
2092 being able to recognize the magic around pic_offset_table_rtx.
2093 This stuff is fragile, and is yet another example of why it is
2094 bad to expose PIC machinery too early. */
2095 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx, as)
2096 && GET_CODE (addr) == PLUS
2097 && XEXP (addr, 0) == pic_offset_table_rtx)
2099 addr = force_reg (GET_MODE (addr), addr);
2100 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2103 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2104 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2106 /* If there are no changes, just return the original memory reference. */
2107 if (new_rtx == memref)
2110 /* Update the alignment to reflect the offset. Reset the offset, which
2113 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2114 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2115 as, GET_MODE (new_rtx));
2119 /* Return a memory reference like MEMREF, but with its address changed to
2120 ADDR. The caller is asserting that the actual piece of memory pointed
2121 to is the same, just the form of the address is being changed, such as
2122 by putting something into a register. */
2125 replace_equiv_address (rtx memref, rtx addr)
2127 /* change_address_1 copies the memory attribute structure without change
2128 and that's exactly what we want here. */
2129 update_temp_slot_address (XEXP (memref, 0), addr);
2130 return change_address_1 (memref, VOIDmode, addr, 1);
2133 /* Likewise, but the reference is not required to be valid. */
2136 replace_equiv_address_nv (rtx memref, rtx addr)
2138 return change_address_1 (memref, VOIDmode, addr, 0);
2141 /* Return a memory reference like MEMREF, but with its mode widened to
2142 MODE and offset by OFFSET. This would be used by targets that e.g.
2143 cannot issue QImode memory operations and have to use SImode memory
2144 operations plus masking logic. */
2147 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2149 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2150 tree expr = MEM_EXPR (new_rtx);
2151 rtx memoffset = MEM_OFFSET (new_rtx);
2152 unsigned int size = GET_MODE_SIZE (mode);
2154 /* If there are no changes, just return the original memory reference. */
2155 if (new_rtx == memref)
2158 /* If we don't know what offset we were at within the expression, then
2159 we can't know if we've overstepped the bounds. */
2165 if (TREE_CODE (expr) == COMPONENT_REF)
2167 tree field = TREE_OPERAND (expr, 1);
2168 tree offset = component_ref_field_offset (expr);
2170 if (! DECL_SIZE_UNIT (field))
2176 /* Is the field at least as large as the access? If so, ok,
2177 otherwise strip back to the containing structure. */
2178 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2179 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2180 && INTVAL (memoffset) >= 0)
2183 if (! host_integerp (offset, 1))
2189 expr = TREE_OPERAND (expr, 0);
2191 = (GEN_INT (INTVAL (memoffset)
2192 + tree_low_cst (offset, 1)
2193 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2196 /* Similarly for the decl. */
2197 else if (DECL_P (expr)
2198 && DECL_SIZE_UNIT (expr)
2199 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2200 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2201 && (! memoffset || INTVAL (memoffset) >= 0))
2205 /* The widened memory access overflows the expression, which means
2206 that it could alias another expression. Zap it. */
2213 memoffset = NULL_RTX;
2215 /* The widened memory may alias other stuff, so zap the alias set. */
2216 /* ??? Maybe use get_alias_set on any remaining expression. */
2218 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2219 MEM_ALIGN (new_rtx),
2220 MEM_ADDR_SPACE (new_rtx), mode);
2225 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2226 static GTY(()) tree spill_slot_decl;
2229 get_spill_slot_decl (bool force_build_p)
2231 tree d = spill_slot_decl;
2234 if (d || !force_build_p)
2237 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2238 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2239 DECL_ARTIFICIAL (d) = 1;
2240 DECL_IGNORED_P (d) = 1;
2242 spill_slot_decl = d;
2244 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2245 MEM_NOTRAP_P (rd) = 1;
2246 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2247 NULL_RTX, 0, ADDR_SPACE_GENERIC, BLKmode);
2248 SET_DECL_RTL (d, rd);
2253 /* Given MEM, a result from assign_stack_local, fill in the memory
2254 attributes as appropriate for a register allocator spill slot.
2255 These slots are not aliasable by other memory. We arrange for
2256 them all to use a single MEM_EXPR, so that the aliasing code can
2257 work properly in the case of shared spill slots. */
2260 set_mem_attrs_for_spill (rtx mem)
2262 alias_set_type alias;
2266 expr = get_spill_slot_decl (true);
2267 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2269 /* We expect the incoming memory to be of the form:
2270 (mem:MODE (plus (reg sfp) (const_int offset)))
2271 with perhaps the plus missing for offset = 0. */
2272 addr = XEXP (mem, 0);
2273 offset = const0_rtx;
2274 if (GET_CODE (addr) == PLUS
2275 && CONST_INT_P (XEXP (addr, 1)))
2276 offset = XEXP (addr, 1);
2278 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2279 MEM_SIZE (mem), MEM_ALIGN (mem),
2280 ADDR_SPACE_GENERIC, GET_MODE (mem));
2281 MEM_NOTRAP_P (mem) = 1;
2284 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2287 gen_label_rtx (void)
2289 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2290 NULL, label_num++, NULL);
2293 /* For procedure integration. */
2295 /* Install new pointers to the first and last insns in the chain.
2296 Also, set cur_insn_uid to one higher than the last in use.
2297 Used for an inline-procedure after copying the insn chain. */
2300 set_new_first_and_last_insn (rtx first, rtx last)
2304 set_first_insn (first);
2305 set_last_insn (last);
2308 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2310 int debug_count = 0;
2312 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2313 cur_debug_insn_uid = 0;
2315 for (insn = first; insn; insn = NEXT_INSN (insn))
2316 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2317 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2320 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2321 if (DEBUG_INSN_P (insn))
2326 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2328 cur_debug_insn_uid++;
2331 for (insn = first; insn; insn = NEXT_INSN (insn))
2332 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2337 /* Go through all the RTL insn bodies and copy any invalid shared
2338 structure. This routine should only be called once. */
2341 unshare_all_rtl_1 (rtx insn)
2343 /* Unshare just about everything else. */
2344 unshare_all_rtl_in_chain (insn);
2346 /* Make sure the addresses of stack slots found outside the insn chain
2347 (such as, in DECL_RTL of a variable) are not shared
2348 with the insn chain.
2350 This special care is necessary when the stack slot MEM does not
2351 actually appear in the insn chain. If it does appear, its address
2352 is unshared from all else at that point. */
2353 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2356 /* Go through all the RTL insn bodies and copy any invalid shared
2357 structure, again. This is a fairly expensive thing to do so it
2358 should be done sparingly. */
2361 unshare_all_rtl_again (rtx insn)
2366 for (p = insn; p; p = NEXT_INSN (p))
2369 reset_used_flags (PATTERN (p));
2370 reset_used_flags (REG_NOTES (p));
2373 /* Make sure that virtual stack slots are not shared. */
2374 set_used_decls (DECL_INITIAL (cfun->decl));
2376 /* Make sure that virtual parameters are not shared. */
2377 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2378 set_used_flags (DECL_RTL (decl));
2380 reset_used_flags (stack_slot_list);
2382 unshare_all_rtl_1 (insn);
2386 unshare_all_rtl (void)
2388 unshare_all_rtl_1 (get_insns ());
2392 struct rtl_opt_pass pass_unshare_all_rtl =
2396 "unshare", /* name */
2398 unshare_all_rtl, /* execute */
2401 0, /* static_pass_number */
2402 TV_NONE, /* tv_id */
2403 0, /* properties_required */
2404 0, /* properties_provided */
2405 0, /* properties_destroyed */
2406 0, /* todo_flags_start */
2407 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2412 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2413 Recursively does the same for subexpressions. */
2416 verify_rtx_sharing (rtx orig, rtx insn)
2421 const char *format_ptr;
2426 code = GET_CODE (x);
2428 /* These types may be freely shared. */
2446 /* SCRATCH must be shared because they represent distinct values. */
2448 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2453 if (shared_const_p (orig))
2458 /* A MEM is allowed to be shared if its address is constant. */
2459 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2460 || reload_completed || reload_in_progress)
2469 /* This rtx may not be shared. If it has already been seen,
2470 replace it with a copy of itself. */
2471 #ifdef ENABLE_CHECKING
2472 if (RTX_FLAG (x, used))
2474 error ("invalid rtl sharing found in the insn");
2476 error ("shared rtx");
2478 internal_error ("internal consistency failure");
2481 gcc_assert (!RTX_FLAG (x, used));
2483 RTX_FLAG (x, used) = 1;
2485 /* Now scan the subexpressions recursively. */
2487 format_ptr = GET_RTX_FORMAT (code);
2489 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2491 switch (*format_ptr++)
2494 verify_rtx_sharing (XEXP (x, i), insn);
2498 if (XVEC (x, i) != NULL)
2501 int len = XVECLEN (x, i);
2503 for (j = 0; j < len; j++)
2505 /* We allow sharing of ASM_OPERANDS inside single
2507 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2508 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2510 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2512 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2521 /* Go through all the RTL insn bodies and check that there is no unexpected
2522 sharing in between the subexpressions. */
2525 verify_rtl_sharing (void)
2529 timevar_push (TV_VERIFY_RTL_SHARING);
2531 for (p = get_insns (); p; p = NEXT_INSN (p))
2534 reset_used_flags (PATTERN (p));
2535 reset_used_flags (REG_NOTES (p));
2536 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2539 rtx q, sequence = PATTERN (p);
2541 for (i = 0; i < XVECLEN (sequence, 0); i++)
2543 q = XVECEXP (sequence, 0, i);
2544 gcc_assert (INSN_P (q));
2545 reset_used_flags (PATTERN (q));
2546 reset_used_flags (REG_NOTES (q));
2551 for (p = get_insns (); p; p = NEXT_INSN (p))
2554 verify_rtx_sharing (PATTERN (p), p);
2555 verify_rtx_sharing (REG_NOTES (p), p);
2558 timevar_pop (TV_VERIFY_RTL_SHARING);
2561 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2562 Assumes the mark bits are cleared at entry. */
2565 unshare_all_rtl_in_chain (rtx insn)
2567 for (; insn; insn = NEXT_INSN (insn))
2570 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2571 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2575 /* Go through all virtual stack slots of a function and mark them as
2576 shared. We never replace the DECL_RTLs themselves with a copy,
2577 but expressions mentioned into a DECL_RTL cannot be shared with
2578 expressions in the instruction stream.
2580 Note that reload may convert pseudo registers into memories in-place.
2581 Pseudo registers are always shared, but MEMs never are. Thus if we
2582 reset the used flags on MEMs in the instruction stream, we must set
2583 them again on MEMs that appear in DECL_RTLs. */
2586 set_used_decls (tree blk)
2591 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2592 if (DECL_RTL_SET_P (t))
2593 set_used_flags (DECL_RTL (t));
2595 /* Now process sub-blocks. */
2596 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2600 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2601 Recursively does the same for subexpressions. Uses
2602 copy_rtx_if_shared_1 to reduce stack space. */
2605 copy_rtx_if_shared (rtx orig)
2607 copy_rtx_if_shared_1 (&orig);
2611 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2612 use. Recursively does the same for subexpressions. */
2615 copy_rtx_if_shared_1 (rtx *orig1)
2621 const char *format_ptr;
2625 /* Repeat is used to turn tail-recursion into iteration. */
2632 code = GET_CODE (x);
2634 /* These types may be freely shared. */
2651 /* SCRATCH must be shared because they represent distinct values. */
2654 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2659 if (shared_const_p (x))
2669 /* The chain of insns is not being copied. */
2676 /* This rtx may not be shared. If it has already been seen,
2677 replace it with a copy of itself. */
2679 if (RTX_FLAG (x, used))
2681 x = shallow_copy_rtx (x);
2684 RTX_FLAG (x, used) = 1;
2686 /* Now scan the subexpressions recursively.
2687 We can store any replaced subexpressions directly into X
2688 since we know X is not shared! Any vectors in X
2689 must be copied if X was copied. */
2691 format_ptr = GET_RTX_FORMAT (code);
2692 length = GET_RTX_LENGTH (code);
2695 for (i = 0; i < length; i++)
2697 switch (*format_ptr++)
2701 copy_rtx_if_shared_1 (last_ptr);
2702 last_ptr = &XEXP (x, i);
2706 if (XVEC (x, i) != NULL)
2709 int len = XVECLEN (x, i);
2711 /* Copy the vector iff I copied the rtx and the length
2713 if (copied && len > 0)
2714 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2716 /* Call recursively on all inside the vector. */
2717 for (j = 0; j < len; j++)
2720 copy_rtx_if_shared_1 (last_ptr);
2721 last_ptr = &XVECEXP (x, i, j);
2736 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2739 mark_used_flags (rtx x, int flag)
2743 const char *format_ptr;
2746 /* Repeat is used to turn tail-recursion into iteration. */
2751 code = GET_CODE (x);
2753 /* These types may be freely shared so we needn't do any resetting
2778 /* The chain of insns is not being copied. */
2785 RTX_FLAG (x, used) = flag;
2787 format_ptr = GET_RTX_FORMAT (code);
2788 length = GET_RTX_LENGTH (code);
2790 for (i = 0; i < length; i++)
2792 switch (*format_ptr++)
2800 mark_used_flags (XEXP (x, i), flag);
2804 for (j = 0; j < XVECLEN (x, i); j++)
2805 mark_used_flags (XVECEXP (x, i, j), flag);
2811 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2812 to look for shared sub-parts. */
2815 reset_used_flags (rtx x)
2817 mark_used_flags (x, 0);
2820 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2821 to look for shared sub-parts. */
2824 set_used_flags (rtx x)
2826 mark_used_flags (x, 1);
2829 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2830 Return X or the rtx for the pseudo reg the value of X was copied into.
2831 OTHER must be valid as a SET_DEST. */
2834 make_safe_from (rtx x, rtx other)
2837 switch (GET_CODE (other))
2840 other = SUBREG_REG (other);
2842 case STRICT_LOW_PART:
2845 other = XEXP (other, 0);
2854 && GET_CODE (x) != SUBREG)
2856 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2857 || reg_mentioned_p (other, x))))
2859 rtx temp = gen_reg_rtx (GET_MODE (x));
2860 emit_move_insn (temp, x);
2866 /* Emission of insns (adding them to the doubly-linked list). */
2868 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2871 get_last_insn_anywhere (void)
2873 struct sequence_stack *stack;
2874 if (get_last_insn ())
2875 return get_last_insn ();
2876 for (stack = seq_stack; stack; stack = stack->next)
2877 if (stack->last != 0)
2882 /* Return the first nonnote insn emitted in current sequence or current
2883 function. This routine looks inside SEQUENCEs. */
2886 get_first_nonnote_insn (void)
2888 rtx insn = get_insns ();
2893 for (insn = next_insn (insn);
2894 insn && NOTE_P (insn);
2895 insn = next_insn (insn))
2899 if (NONJUMP_INSN_P (insn)
2900 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2901 insn = XVECEXP (PATTERN (insn), 0, 0);
2908 /* Return the last nonnote insn emitted in current sequence or current
2909 function. This routine looks inside SEQUENCEs. */
2912 get_last_nonnote_insn (void)
2914 rtx insn = get_last_insn ();
2919 for (insn = previous_insn (insn);
2920 insn && NOTE_P (insn);
2921 insn = previous_insn (insn))
2925 if (NONJUMP_INSN_P (insn)
2926 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2927 insn = XVECEXP (PATTERN (insn), 0,
2928 XVECLEN (PATTERN (insn), 0) - 1);
2935 /* Return the number of actual (non-debug) insns emitted in this
2939 get_max_insn_count (void)
2941 int n = cur_insn_uid;
2943 /* The table size must be stable across -g, to avoid codegen
2944 differences due to debug insns, and not be affected by
2945 -fmin-insn-uid, to avoid excessive table size and to simplify
2946 debugging of -fcompare-debug failures. */
2947 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
2948 n -= cur_debug_insn_uid;
2950 n -= MIN_NONDEBUG_INSN_UID;
2956 /* Return the next insn. If it is a SEQUENCE, return the first insn
2960 next_insn (rtx insn)
2964 insn = NEXT_INSN (insn);
2965 if (insn && NONJUMP_INSN_P (insn)
2966 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2967 insn = XVECEXP (PATTERN (insn), 0, 0);
2973 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2977 previous_insn (rtx insn)
2981 insn = PREV_INSN (insn);
2982 if (insn && NONJUMP_INSN_P (insn)
2983 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2984 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2990 /* Return the next insn after INSN that is not a NOTE. This routine does not
2991 look inside SEQUENCEs. */
2994 next_nonnote_insn (rtx insn)
2998 insn = NEXT_INSN (insn);
2999 if (insn == 0 || !NOTE_P (insn))
3006 /* Return the next insn after INSN that is not a NOTE, but stop the
3007 search before we enter another basic block. This routine does not
3008 look inside SEQUENCEs. */
3011 next_nonnote_insn_bb (rtx insn)
3015 insn = NEXT_INSN (insn);
3016 if (insn == 0 || !NOTE_P (insn))
3018 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3025 /* Return the previous insn before INSN that is not a NOTE. This routine does
3026 not look inside SEQUENCEs. */
3029 prev_nonnote_insn (rtx insn)
3033 insn = PREV_INSN (insn);
3034 if (insn == 0 || !NOTE_P (insn))
3041 /* Return the previous insn before INSN that is not a NOTE, but stop
3042 the search before we enter another basic block. This routine does
3043 not look inside SEQUENCEs. */
3046 prev_nonnote_insn_bb (rtx insn)
3050 insn = PREV_INSN (insn);
3051 if (insn == 0 || !NOTE_P (insn))
3053 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3060 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3061 routine does not look inside SEQUENCEs. */
3064 next_nondebug_insn (rtx insn)
3068 insn = NEXT_INSN (insn);
3069 if (insn == 0 || !DEBUG_INSN_P (insn))
3076 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3077 This routine does not look inside SEQUENCEs. */
3080 prev_nondebug_insn (rtx insn)
3084 insn = PREV_INSN (insn);
3085 if (insn == 0 || !DEBUG_INSN_P (insn))
3092 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3093 This routine does not look inside SEQUENCEs. */
3096 next_nonnote_nondebug_insn (rtx insn)
3100 insn = NEXT_INSN (insn);
3101 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3108 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3109 This routine does not look inside SEQUENCEs. */
3112 prev_nonnote_nondebug_insn (rtx insn)
3116 insn = PREV_INSN (insn);
3117 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3124 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3125 or 0, if there is none. This routine does not look inside
3129 next_real_insn (rtx insn)
3133 insn = NEXT_INSN (insn);
3134 if (insn == 0 || INSN_P (insn))
3141 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3142 or 0, if there is none. This routine does not look inside
3146 prev_real_insn (rtx insn)
3150 insn = PREV_INSN (insn);
3151 if (insn == 0 || INSN_P (insn))
3158 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3159 This routine does not look inside SEQUENCEs. */
3162 last_call_insn (void)
3166 for (insn = get_last_insn ();
3167 insn && !CALL_P (insn);
3168 insn = PREV_INSN (insn))
3174 /* Find the next insn after INSN that really does something. This routine
3175 does not look inside SEQUENCEs. After reload this also skips over
3176 standalone USE and CLOBBER insn. */
3179 active_insn_p (const_rtx insn)
3181 return (CALL_P (insn) || JUMP_P (insn)
3182 || (NONJUMP_INSN_P (insn)
3183 && (! reload_completed
3184 || (GET_CODE (PATTERN (insn)) != USE
3185 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3189 next_active_insn (rtx insn)
3193 insn = NEXT_INSN (insn);
3194 if (insn == 0 || active_insn_p (insn))
3201 /* Find the last insn before INSN that really does something. This routine
3202 does not look inside SEQUENCEs. After reload this also skips over
3203 standalone USE and CLOBBER insn. */
3206 prev_active_insn (rtx insn)
3210 insn = PREV_INSN (insn);
3211 if (insn == 0 || active_insn_p (insn))
3218 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3221 next_label (rtx insn)
3225 insn = NEXT_INSN (insn);
3226 if (insn == 0 || LABEL_P (insn))
3233 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3236 prev_label (rtx insn)
3240 insn = PREV_INSN (insn);
3241 if (insn == 0 || LABEL_P (insn))
3248 /* Return the last label to mark the same position as LABEL. Return null
3249 if LABEL itself is null. */
3252 skip_consecutive_labels (rtx label)
3256 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3264 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3265 and REG_CC_USER notes so we can find it. */
3268 link_cc0_insns (rtx insn)
3270 rtx user = next_nonnote_insn (insn);
3272 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3273 user = XVECEXP (PATTERN (user), 0, 0);
3275 add_reg_note (user, REG_CC_SETTER, insn);
3276 add_reg_note (insn, REG_CC_USER, user);
3279 /* Return the next insn that uses CC0 after INSN, which is assumed to
3280 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3281 applied to the result of this function should yield INSN).
3283 Normally, this is simply the next insn. However, if a REG_CC_USER note
3284 is present, it contains the insn that uses CC0.
3286 Return 0 if we can't find the insn. */
3289 next_cc0_user (rtx insn)
3291 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3294 return XEXP (note, 0);
3296 insn = next_nonnote_insn (insn);
3297 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3298 insn = XVECEXP (PATTERN (insn), 0, 0);
3300 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3306 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3307 note, it is the previous insn. */
3310 prev_cc0_setter (rtx insn)
3312 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3315 return XEXP (note, 0);
3317 insn = prev_nonnote_insn (insn);
3318 gcc_assert (sets_cc0_p (PATTERN (insn)));
3325 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3328 find_auto_inc (rtx *xp, void *data)
3331 rtx reg = (rtx) data;
3333 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3336 switch (GET_CODE (x))
3344 if (rtx_equal_p (reg, XEXP (x, 0)))
3355 /* Increment the label uses for all labels present in rtx. */
3358 mark_label_nuses (rtx x)
3364 code = GET_CODE (x);
3365 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3366 LABEL_NUSES (XEXP (x, 0))++;
3368 fmt = GET_RTX_FORMAT (code);
3369 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3372 mark_label_nuses (XEXP (x, i));
3373 else if (fmt[i] == 'E')
3374 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3375 mark_label_nuses (XVECEXP (x, i, j));
3380 /* Try splitting insns that can be split for better scheduling.
3381 PAT is the pattern which might split.
3382 TRIAL is the insn providing PAT.
3383 LAST is nonzero if we should return the last insn of the sequence produced.
3385 If this routine succeeds in splitting, it returns the first or last
3386 replacement insn depending on the value of LAST. Otherwise, it
3387 returns TRIAL. If the insn to be returned can be split, it will be. */
3390 try_split (rtx pat, rtx trial, int last)
3392 rtx before = PREV_INSN (trial);
3393 rtx after = NEXT_INSN (trial);
3394 int has_barrier = 0;
3397 rtx insn_last, insn;
3400 /* We're not good at redistributing frame information. */
3401 if (RTX_FRAME_RELATED_P (trial))
3404 if (any_condjump_p (trial)
3405 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3406 split_branch_probability = INTVAL (XEXP (note, 0));
3407 probability = split_branch_probability;
3409 seq = split_insns (pat, trial);
3411 split_branch_probability = -1;
3413 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3414 We may need to handle this specially. */
3415 if (after && BARRIER_P (after))
3418 after = NEXT_INSN (after);
3424 /* Avoid infinite loop if any insn of the result matches
3425 the original pattern. */
3429 if (INSN_P (insn_last)
3430 && rtx_equal_p (PATTERN (insn_last), pat))
3432 if (!NEXT_INSN (insn_last))
3434 insn_last = NEXT_INSN (insn_last);
3437 /* We will be adding the new sequence to the function. The splitters
3438 may have introduced invalid RTL sharing, so unshare the sequence now. */
3439 unshare_all_rtl_in_chain (seq);
3442 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3446 mark_jump_label (PATTERN (insn), insn, 0);
3448 if (probability != -1
3449 && any_condjump_p (insn)
3450 && !find_reg_note (insn, REG_BR_PROB, 0))
3452 /* We can preserve the REG_BR_PROB notes only if exactly
3453 one jump is created, otherwise the machine description
3454 is responsible for this step using
3455 split_branch_probability variable. */
3456 gcc_assert (njumps == 1);
3457 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3462 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3463 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3466 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3469 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3472 *p = CALL_INSN_FUNCTION_USAGE (trial);
3473 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3475 /* Update the debug information for the CALL_INSN. */
3476 if (flag_enable_icf_debug)
3477 (*debug_hooks->copy_call_info) (trial, insn);
3481 /* Copy notes, particularly those related to the CFG. */
3482 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3484 switch (REG_NOTE_KIND (note))
3487 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3492 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3495 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3499 case REG_NON_LOCAL_GOTO:
3500 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3503 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3509 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3511 rtx reg = XEXP (note, 0);
3512 if (!FIND_REG_INC_NOTE (insn, reg)
3513 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3514 add_reg_note (insn, REG_INC, reg);
3524 /* If there are LABELS inside the split insns increment the
3525 usage count so we don't delete the label. */
3529 while (insn != NULL_RTX)
3531 /* JUMP_P insns have already been "marked" above. */
3532 if (NONJUMP_INSN_P (insn))
3533 mark_label_nuses (PATTERN (insn));
3535 insn = PREV_INSN (insn);
3539 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3541 delete_insn (trial);
3543 emit_barrier_after (tem);
3545 /* Recursively call try_split for each new insn created; by the
3546 time control returns here that insn will be fully split, so
3547 set LAST and continue from the insn after the one returned.
3548 We can't use next_active_insn here since AFTER may be a note.
3549 Ignore deleted insns, which can be occur if not optimizing. */
3550 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3551 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3552 tem = try_split (PATTERN (tem), tem, 1);
3554 /* Return either the first or the last insn, depending on which was
3557 ? (after ? PREV_INSN (after) : get_last_insn ())
3558 : NEXT_INSN (before);
3561 /* Make and return an INSN rtx, initializing all its slots.
3562 Store PATTERN in the pattern slots. */
3565 make_insn_raw (rtx pattern)
3569 insn = rtx_alloc (INSN);
3571 INSN_UID (insn) = cur_insn_uid++;
3572 PATTERN (insn) = pattern;
3573 INSN_CODE (insn) = -1;
3574 REG_NOTES (insn) = NULL;
3575 INSN_LOCATOR (insn) = curr_insn_locator ();
3576 BLOCK_FOR_INSN (insn) = NULL;
3578 #ifdef ENABLE_RTL_CHECKING
3581 && (returnjump_p (insn)
3582 || (GET_CODE (insn) == SET
3583 && SET_DEST (insn) == pc_rtx)))
3585 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3593 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3596 make_debug_insn_raw (rtx pattern)
3600 insn = rtx_alloc (DEBUG_INSN);
3601 INSN_UID (insn) = cur_debug_insn_uid++;
3602 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3603 INSN_UID (insn) = cur_insn_uid++;
3605 PATTERN (insn) = pattern;
3606 INSN_CODE (insn) = -1;
3607 REG_NOTES (insn) = NULL;
3608 INSN_LOCATOR (insn) = curr_insn_locator ();
3609 BLOCK_FOR_INSN (insn) = NULL;
3614 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3617 make_jump_insn_raw (rtx pattern)
3621 insn = rtx_alloc (JUMP_INSN);
3622 INSN_UID (insn) = cur_insn_uid++;
3624 PATTERN (insn) = pattern;
3625 INSN_CODE (insn) = -1;
3626 REG_NOTES (insn) = NULL;
3627 JUMP_LABEL (insn) = NULL;
3628 INSN_LOCATOR (insn) = curr_insn_locator ();
3629 BLOCK_FOR_INSN (insn) = NULL;
3634 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3637 make_call_insn_raw (rtx pattern)
3641 insn = rtx_alloc (CALL_INSN);
3642 INSN_UID (insn) = cur_insn_uid++;
3644 PATTERN (insn) = pattern;
3645 INSN_CODE (insn) = -1;
3646 REG_NOTES (insn) = NULL;
3647 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3648 INSN_LOCATOR (insn) = curr_insn_locator ();
3649 BLOCK_FOR_INSN (insn) = NULL;
3654 /* Add INSN to the end of the doubly-linked list.
3655 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3660 PREV_INSN (insn) = get_last_insn();
3661 NEXT_INSN (insn) = 0;
3663 if (NULL != get_last_insn())
3664 NEXT_INSN (get_last_insn ()) = insn;
3666 if (NULL == get_insns ())
3667 set_first_insn (insn);
3669 set_last_insn (insn);
3672 /* Add INSN into the doubly-linked list after insn AFTER. This and
3673 the next should be the only functions called to insert an insn once
3674 delay slots have been filled since only they know how to update a
3678 add_insn_after (rtx insn, rtx after, basic_block bb)
3680 rtx next = NEXT_INSN (after);
3682 gcc_assert (!optimize || !INSN_DELETED_P (after));
3684 NEXT_INSN (insn) = next;
3685 PREV_INSN (insn) = after;
3689 PREV_INSN (next) = insn;
3690 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3691 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3693 else if (get_last_insn () == after)
3694 set_last_insn (insn);
3697 struct sequence_stack *stack = seq_stack;
3698 /* Scan all pending sequences too. */
3699 for (; stack; stack = stack->next)
3700 if (after == stack->last)
3709 if (!BARRIER_P (after)
3710 && !BARRIER_P (insn)
3711 && (bb = BLOCK_FOR_INSN (after)))
3713 set_block_for_insn (insn, bb);
3715 df_insn_rescan (insn);
3716 /* Should not happen as first in the BB is always
3717 either NOTE or LABEL. */
3718 if (BB_END (bb) == after
3719 /* Avoid clobbering of structure when creating new BB. */
3720 && !BARRIER_P (insn)
3721 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3725 NEXT_INSN (after) = insn;
3726 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3728 rtx sequence = PATTERN (after);
3729 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3733 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3734 the previous should be the only functions called to insert an insn
3735 once delay slots have been filled since only they know how to
3736 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3740 add_insn_before (rtx insn, rtx before, basic_block bb)
3742 rtx prev = PREV_INSN (before);
3744 gcc_assert (!optimize || !INSN_DELETED_P (before));
3746 PREV_INSN (insn) = prev;
3747 NEXT_INSN (insn) = before;
3751 NEXT_INSN (prev) = insn;
3752 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3754 rtx sequence = PATTERN (prev);
3755 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3758 else if (get_insns () == before)
3759 set_first_insn (insn);
3762 struct sequence_stack *stack = seq_stack;
3763 /* Scan all pending sequences too. */
3764 for (; stack; stack = stack->next)
3765 if (before == stack->first)
3767 stack->first = insn;
3775 && !BARRIER_P (before)
3776 && !BARRIER_P (insn))
3777 bb = BLOCK_FOR_INSN (before);
3781 set_block_for_insn (insn, bb);
3783 df_insn_rescan (insn);
3784 /* Should not happen as first in the BB is always either NOTE or
3786 gcc_assert (BB_HEAD (bb) != insn
3787 /* Avoid clobbering of structure when creating new BB. */
3789 || NOTE_INSN_BASIC_BLOCK_P (insn));
3792 PREV_INSN (before) = insn;
3793 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3794 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3798 /* Replace insn with an deleted instruction note. */
3801 set_insn_deleted (rtx insn)
3803 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3804 PUT_CODE (insn, NOTE);
3805 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3809 /* Remove an insn from its doubly-linked list. This function knows how
3810 to handle sequences. */
3812 remove_insn (rtx insn)
3814 rtx next = NEXT_INSN (insn);
3815 rtx prev = PREV_INSN (insn);
3818 /* Later in the code, the block will be marked dirty. */
3819 df_insn_delete (NULL, INSN_UID (insn));
3823 NEXT_INSN (prev) = next;
3824 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3826 rtx sequence = PATTERN (prev);
3827 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3830 else if (get_insns () == insn)
3833 PREV_INSN (next) = NULL;
3834 set_first_insn (next);
3838 struct sequence_stack *stack = seq_stack;
3839 /* Scan all pending sequences too. */
3840 for (; stack; stack = stack->next)
3841 if (insn == stack->first)
3843 stack->first = next;
3852 PREV_INSN (next) = prev;
3853 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3854 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3856 else if (get_last_insn () == insn)
3857 set_last_insn (prev);
3860 struct sequence_stack *stack = seq_stack;
3861 /* Scan all pending sequences too. */
3862 for (; stack; stack = stack->next)
3863 if (insn == stack->last)
3871 if (!BARRIER_P (insn)
3872 && (bb = BLOCK_FOR_INSN (insn)))
3874 if (NONDEBUG_INSN_P (insn))
3875 df_set_bb_dirty (bb);
3876 if (BB_HEAD (bb) == insn)
3878 /* Never ever delete the basic block note without deleting whole
3880 gcc_assert (!NOTE_P (insn));
3881 BB_HEAD (bb) = next;
3883 if (BB_END (bb) == insn)
3888 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3891 add_function_usage_to (rtx call_insn, rtx call_fusage)
3893 gcc_assert (call_insn && CALL_P (call_insn));
3895 /* Put the register usage information on the CALL. If there is already
3896 some usage information, put ours at the end. */
3897 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3901 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3902 link = XEXP (link, 1))
3905 XEXP (link, 1) = call_fusage;
3908 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3911 /* Delete all insns made since FROM.
3912 FROM becomes the new last instruction. */
3915 delete_insns_since (rtx from)
3920 NEXT_INSN (from) = 0;
3921 set_last_insn (from);
3924 /* This function is deprecated, please use sequences instead.
3926 Move a consecutive bunch of insns to a different place in the chain.
3927 The insns to be moved are those between FROM and TO.
3928 They are moved to a new position after the insn AFTER.
3929 AFTER must not be FROM or TO or any insn in between.
3931 This function does not know about SEQUENCEs and hence should not be
3932 called after delay-slot filling has been done. */
3935 reorder_insns_nobb (rtx from, rtx to, rtx after)
3937 #ifdef ENABLE_CHECKING
3939 for (x = from; x != to; x = NEXT_INSN (x))
3940 gcc_assert (after != x);
3941 gcc_assert (after != to);
3944 /* Splice this bunch out of where it is now. */
3945 if (PREV_INSN (from))
3946 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3948 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3949 if (get_last_insn () == to)
3950 set_last_insn (PREV_INSN (from));
3951 if (get_insns () == from)
3952 set_first_insn (NEXT_INSN (to));
3954 /* Make the new neighbors point to it and it to them. */
3955 if (NEXT_INSN (after))
3956 PREV_INSN (NEXT_INSN (after)) = to;
3958 NEXT_INSN (to) = NEXT_INSN (after);
3959 PREV_INSN (from) = after;
3960 NEXT_INSN (after) = from;
3961 if (after == get_last_insn())
3965 /* Same as function above, but take care to update BB boundaries. */
3967 reorder_insns (rtx from, rtx to, rtx after)
3969 rtx prev = PREV_INSN (from);
3970 basic_block bb, bb2;
3972 reorder_insns_nobb (from, to, after);
3974 if (!BARRIER_P (after)
3975 && (bb = BLOCK_FOR_INSN (after)))
3978 df_set_bb_dirty (bb);
3980 if (!BARRIER_P (from)
3981 && (bb2 = BLOCK_FOR_INSN (from)))
3983 if (BB_END (bb2) == to)
3984 BB_END (bb2) = prev;
3985 df_set_bb_dirty (bb2);
3988 if (BB_END (bb) == after)
3991 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3993 df_insn_change_bb (x, bb);
3998 /* Emit insn(s) of given code and pattern
3999 at a specified place within the doubly-linked list.
4001 All of the emit_foo global entry points accept an object
4002 X which is either an insn list or a PATTERN of a single
4005 There are thus a few canonical ways to generate code and
4006 emit it at a specific place in the instruction stream. For
4007 example, consider the instruction named SPOT and the fact that
4008 we would like to emit some instructions before SPOT. We might
4012 ... emit the new instructions ...
4013 insns_head = get_insns ();
4016 emit_insn_before (insns_head, SPOT);
4018 It used to be common to generate SEQUENCE rtl instead, but that
4019 is a relic of the past which no longer occurs. The reason is that
4020 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4021 generated would almost certainly die right after it was created. */
4023 /* Make X be output before the instruction BEFORE. */
4026 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4031 gcc_assert (before);
4036 switch (GET_CODE (x))
4048 rtx next = NEXT_INSN (insn);
4049 add_insn_before (insn, before, bb);
4055 #ifdef ENABLE_RTL_CHECKING
4062 last = make_insn_raw (x);
4063 add_insn_before (last, before, bb);
4070 /* Make an instruction with body X and code JUMP_INSN
4071 and output it before the instruction BEFORE. */
4074 emit_jump_insn_before_noloc (rtx x, rtx before)
4076 rtx insn, last = NULL_RTX;
4078 gcc_assert (before);
4080 switch (GET_CODE (x))
4092 rtx next = NEXT_INSN (insn);
4093 add_insn_before (insn, before, NULL);
4099 #ifdef ENABLE_RTL_CHECKING
4106 last = make_jump_insn_raw (x);
4107 add_insn_before (last, before, NULL);
4114 /* Make an instruction with body X and code CALL_INSN
4115 and output it before the instruction BEFORE. */
4118 emit_call_insn_before_noloc (rtx x, rtx before)
4120 rtx last = NULL_RTX, insn;
4122 gcc_assert (before);
4124 switch (GET_CODE (x))
4136 rtx next = NEXT_INSN (insn);
4137 add_insn_before (insn, before, NULL);
4143 #ifdef ENABLE_RTL_CHECKING
4150 last = make_call_insn_raw (x);
4151 add_insn_before (last, before, NULL);
4158 /* Make an instruction with body X and code DEBUG_INSN
4159 and output it before the instruction BEFORE. */
4162 emit_debug_insn_before_noloc (rtx x, rtx before)
4164 rtx last = NULL_RTX, insn;
4166 gcc_assert (before);
4168 switch (GET_CODE (x))
4180 rtx next = NEXT_INSN (insn);
4181 add_insn_before (insn, before, NULL);
4187 #ifdef ENABLE_RTL_CHECKING
4194 last = make_debug_insn_raw (x);
4195 add_insn_before (last, before, NULL);
4202 /* Make an insn of code BARRIER
4203 and output it before the insn BEFORE. */
4206 emit_barrier_before (rtx before)
4208 rtx insn = rtx_alloc (BARRIER);
4210 INSN_UID (insn) = cur_insn_uid++;
4212 add_insn_before (insn, before, NULL);
4216 /* Emit the label LABEL before the insn BEFORE. */
4219 emit_label_before (rtx label, rtx before)
4221 /* This can be called twice for the same label as a result of the
4222 confusion that follows a syntax error! So make it harmless. */
4223 if (INSN_UID (label) == 0)
4225 INSN_UID (label) = cur_insn_uid++;
4226 add_insn_before (label, before, NULL);
4232 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4235 emit_note_before (enum insn_note subtype, rtx before)
4237 rtx note = rtx_alloc (NOTE);
4238 INSN_UID (note) = cur_insn_uid++;
4239 NOTE_KIND (note) = subtype;
4240 BLOCK_FOR_INSN (note) = NULL;
4241 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4243 add_insn_before (note, before, NULL);
4247 /* Helper for emit_insn_after, handles lists of instructions
4251 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4255 if (!bb && !BARRIER_P (after))
4256 bb = BLOCK_FOR_INSN (after);
4260 df_set_bb_dirty (bb);
4261 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4262 if (!BARRIER_P (last))
4264 set_block_for_insn (last, bb);
4265 df_insn_rescan (last);
4267 if (!BARRIER_P (last))
4269 set_block_for_insn (last, bb);
4270 df_insn_rescan (last);
4272 if (BB_END (bb) == after)
4276 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4279 after_after = NEXT_INSN (after);
4281 NEXT_INSN (after) = first;
4282 PREV_INSN (first) = after;
4283 NEXT_INSN (last) = after_after;
4285 PREV_INSN (after_after) = last;
4287 if (after == get_last_insn())
4288 set_last_insn (last);
4293 /* Make X be output after the insn AFTER and set the BB of insn. If
4294 BB is NULL, an attempt is made to infer the BB from AFTER. */
4297 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4306 switch (GET_CODE (x))
4315 last = emit_insn_after_1 (x, after, bb);
4318 #ifdef ENABLE_RTL_CHECKING
4325 last = make_insn_raw (x);
4326 add_insn_after (last, after, bb);
4334 /* Make an insn of code JUMP_INSN with body X
4335 and output it after the insn AFTER. */
4338 emit_jump_insn_after_noloc (rtx x, rtx after)
4344 switch (GET_CODE (x))
4353 last = emit_insn_after_1 (x, after, NULL);
4356 #ifdef ENABLE_RTL_CHECKING
4363 last = make_jump_insn_raw (x);
4364 add_insn_after (last, after, NULL);
4371 /* Make an instruction with body X and code CALL_INSN
4372 and output it after the instruction AFTER. */
4375 emit_call_insn_after_noloc (rtx x, rtx after)
4381 switch (GET_CODE (x))
4390 last = emit_insn_after_1 (x, after, NULL);
4393 #ifdef ENABLE_RTL_CHECKING
4400 last = make_call_insn_raw (x);
4401 add_insn_after (last, after, NULL);
4408 /* Make an instruction with body X and code CALL_INSN
4409 and output it after the instruction AFTER. */
4412 emit_debug_insn_after_noloc (rtx x, rtx after)
4418 switch (GET_CODE (x))
4427 last = emit_insn_after_1 (x, after, NULL);
4430 #ifdef ENABLE_RTL_CHECKING
4437 last = make_debug_insn_raw (x);
4438 add_insn_after (last, after, NULL);
4445 /* Make an insn of code BARRIER
4446 and output it after the insn AFTER. */
4449 emit_barrier_after (rtx after)
4451 rtx insn = rtx_alloc (BARRIER);
4453 INSN_UID (insn) = cur_insn_uid++;
4455 add_insn_after (insn, after, NULL);
4459 /* Emit the label LABEL after the insn AFTER. */
4462 emit_label_after (rtx label, rtx after)
4464 /* This can be called twice for the same label
4465 as a result of the confusion that follows a syntax error!
4466 So make it harmless. */
4467 if (INSN_UID (label) == 0)
4469 INSN_UID (label) = cur_insn_uid++;
4470 add_insn_after (label, after, NULL);
4476 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4479 emit_note_after (enum insn_note subtype, rtx after)
4481 rtx note = rtx_alloc (NOTE);
4482 INSN_UID (note) = cur_insn_uid++;
4483 NOTE_KIND (note) = subtype;
4484 BLOCK_FOR_INSN (note) = NULL;
4485 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4486 add_insn_after (note, after, NULL);
4490 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4492 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4494 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4496 if (pattern == NULL_RTX || !loc)
4499 after = NEXT_INSN (after);
4502 if (active_insn_p (after) && !INSN_LOCATOR (after))
4503 INSN_LOCATOR (after) = loc;
4506 after = NEXT_INSN (after);
4511 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4513 emit_insn_after (rtx pattern, rtx after)
4517 while (DEBUG_INSN_P (prev))
4518 prev = PREV_INSN (prev);
4521 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4523 return emit_insn_after_noloc (pattern, after, NULL);
4526 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4528 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4530 rtx last = emit_jump_insn_after_noloc (pattern, after);
4532 if (pattern == NULL_RTX || !loc)
4535 after = NEXT_INSN (after);
4538 if (active_insn_p (after) && !INSN_LOCATOR (after))
4539 INSN_LOCATOR (after) = loc;
4542 after = NEXT_INSN (after);
4547 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4549 emit_jump_insn_after (rtx pattern, rtx after)
4553 while (DEBUG_INSN_P (prev))
4554 prev = PREV_INSN (prev);
4557 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4559 return emit_jump_insn_after_noloc (pattern, after);
4562 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4564 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4566 rtx last = emit_call_insn_after_noloc (pattern, after);
4568 if (pattern == NULL_RTX || !loc)
4571 after = NEXT_INSN (after);
4574 if (active_insn_p (after) && !INSN_LOCATOR (after))
4575 INSN_LOCATOR (after) = loc;
4578 after = NEXT_INSN (after);
4583 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4585 emit_call_insn_after (rtx pattern, rtx after)
4589 while (DEBUG_INSN_P (prev))
4590 prev = PREV_INSN (prev);
4593 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4595 return emit_call_insn_after_noloc (pattern, after);
4598 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4600 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4602 rtx last = emit_debug_insn_after_noloc (pattern, after);
4604 if (pattern == NULL_RTX || !loc)
4607 after = NEXT_INSN (after);
4610 if (active_insn_p (after) && !INSN_LOCATOR (after))
4611 INSN_LOCATOR (after) = loc;
4614 after = NEXT_INSN (after);
4619 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4621 emit_debug_insn_after (rtx pattern, rtx after)
4624 return emit_debug_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4626 return emit_debug_insn_after_noloc (pattern, after);
4629 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4631 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4633 rtx first = PREV_INSN (before);
4634 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4636 if (pattern == NULL_RTX || !loc)
4640 first = get_insns ();
4642 first = NEXT_INSN (first);
4645 if (active_insn_p (first) && !INSN_LOCATOR (first))
4646 INSN_LOCATOR (first) = loc;
4649 first = NEXT_INSN (first);
4654 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4656 emit_insn_before (rtx pattern, rtx before)
4660 while (DEBUG_INSN_P (next))
4661 next = PREV_INSN (next);
4664 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4666 return emit_insn_before_noloc (pattern, before, NULL);
4669 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4671 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4673 rtx first = PREV_INSN (before);
4674 rtx last = emit_jump_insn_before_noloc (pattern, before);
4676 if (pattern == NULL_RTX)
4679 first = NEXT_INSN (first);
4682 if (active_insn_p (first) && !INSN_LOCATOR (first))
4683 INSN_LOCATOR (first) = loc;
4686 first = NEXT_INSN (first);
4691 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4693 emit_jump_insn_before (rtx pattern, rtx before)
4697 while (DEBUG_INSN_P (next))
4698 next = PREV_INSN (next);
4701 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4703 return emit_jump_insn_before_noloc (pattern, before);
4706 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4708 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4710 rtx first = PREV_INSN (before);
4711 rtx last = emit_call_insn_before_noloc (pattern, before);
4713 if (pattern == NULL_RTX)
4716 first = NEXT_INSN (first);
4719 if (active_insn_p (first) && !INSN_LOCATOR (first))
4720 INSN_LOCATOR (first) = loc;
4723 first = NEXT_INSN (first);
4728 /* like emit_call_insn_before_noloc,
4729 but set insn_locator according to before. */
4731 emit_call_insn_before (rtx pattern, rtx before)
4735 while (DEBUG_INSN_P (next))
4736 next = PREV_INSN (next);
4739 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4741 return emit_call_insn_before_noloc (pattern, before);
4744 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4746 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4748 rtx first = PREV_INSN (before);
4749 rtx last = emit_debug_insn_before_noloc (pattern, before);
4751 if (pattern == NULL_RTX)
4754 first = NEXT_INSN (first);
4757 if (active_insn_p (first) && !INSN_LOCATOR (first))
4758 INSN_LOCATOR (first) = loc;
4761 first = NEXT_INSN (first);
4766 /* like emit_debug_insn_before_noloc,
4767 but set insn_locator according to before. */
4769 emit_debug_insn_before (rtx pattern, rtx before)
4771 if (INSN_P (before))
4772 return emit_debug_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4774 return emit_debug_insn_before_noloc (pattern, before);
4777 /* Take X and emit it at the end of the doubly-linked
4780 Returns the last insn emitted. */
4785 rtx last = get_last_insn();
4791 switch (GET_CODE (x))
4803 rtx next = NEXT_INSN (insn);
4810 #ifdef ENABLE_RTL_CHECKING
4817 last = make_insn_raw (x);
4825 /* Make an insn of code DEBUG_INSN with pattern X
4826 and add it to the end of the doubly-linked list. */
4829 emit_debug_insn (rtx x)
4831 rtx last = get_last_insn();
4837 switch (GET_CODE (x))
4849 rtx next = NEXT_INSN (insn);
4856 #ifdef ENABLE_RTL_CHECKING
4863 last = make_debug_insn_raw (x);
4871 /* Make an insn of code JUMP_INSN with pattern X
4872 and add it to the end of the doubly-linked list. */
4875 emit_jump_insn (rtx x)
4877 rtx last = NULL_RTX, insn;
4879 switch (GET_CODE (x))
4891 rtx next = NEXT_INSN (insn);
4898 #ifdef ENABLE_RTL_CHECKING
4905 last = make_jump_insn_raw (x);
4913 /* Make an insn of code CALL_INSN with pattern X
4914 and add it to the end of the doubly-linked list. */
4917 emit_call_insn (rtx x)
4921 switch (GET_CODE (x))
4930 insn = emit_insn (x);
4933 #ifdef ENABLE_RTL_CHECKING
4940 insn = make_call_insn_raw (x);
4948 /* Add the label LABEL to the end of the doubly-linked list. */
4951 emit_label (rtx label)
4953 /* This can be called twice for the same label
4954 as a result of the confusion that follows a syntax error!
4955 So make it harmless. */
4956 if (INSN_UID (label) == 0)
4958 INSN_UID (label) = cur_insn_uid++;
4964 /* Make an insn of code BARRIER
4965 and add it to the end of the doubly-linked list. */
4970 rtx barrier = rtx_alloc (BARRIER);
4971 INSN_UID (barrier) = cur_insn_uid++;
4976 /* Emit a copy of note ORIG. */
4979 emit_note_copy (rtx orig)
4983 note = rtx_alloc (NOTE);
4985 INSN_UID (note) = cur_insn_uid++;
4986 NOTE_DATA (note) = NOTE_DATA (orig);
4987 NOTE_KIND (note) = NOTE_KIND (orig);
4988 BLOCK_FOR_INSN (note) = NULL;
4994 /* Make an insn of code NOTE or type NOTE_NO
4995 and add it to the end of the doubly-linked list. */
4998 emit_note (enum insn_note kind)
5002 note = rtx_alloc (NOTE);
5003 INSN_UID (note) = cur_insn_uid++;
5004 NOTE_KIND (note) = kind;
5005 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
5006 BLOCK_FOR_INSN (note) = NULL;
5011 /* Emit a clobber of lvalue X. */
5014 emit_clobber (rtx x)
5016 /* CONCATs should not appear in the insn stream. */
5017 if (GET_CODE (x) == CONCAT)
5019 emit_clobber (XEXP (x, 0));
5020 return emit_clobber (XEXP (x, 1));
5022 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5025 /* Return a sequence of insns to clobber lvalue X. */
5039 /* Emit a use of rvalue X. */
5044 /* CONCATs should not appear in the insn stream. */
5045 if (GET_CODE (x) == CONCAT)
5047 emit_use (XEXP (x, 0));
5048 return emit_use (XEXP (x, 1));
5050 return emit_insn (gen_rtx_USE (VOIDmode, x));
5053 /* Return a sequence of insns to use rvalue X. */
5067 /* Cause next statement to emit a line note even if the line number
5071 force_next_line_note (void)
5076 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5077 note of this type already exists, remove it first. */
5080 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5082 rtx note = find_reg_note (insn, kind, NULL_RTX);
5088 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5089 has multiple sets (some callers assume single_set
5090 means the insn only has one set, when in fact it
5091 means the insn only has one * useful * set). */
5092 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
5098 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5099 It serves no useful purpose and breaks eliminate_regs. */
5100 if (GET_CODE (datum) == ASM_OPERANDS)
5105 XEXP (note, 0) = datum;
5106 df_notes_rescan (insn);
5114 XEXP (note, 0) = datum;
5120 add_reg_note (insn, kind, datum);
5126 df_notes_rescan (insn);
5132 return REG_NOTES (insn);
5135 /* Return an indication of which type of insn should have X as a body.
5136 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5138 static enum rtx_code
5139 classify_insn (rtx x)
5143 if (GET_CODE (x) == CALL)
5145 if (GET_CODE (x) == RETURN)
5147 if (GET_CODE (x) == SET)
5149 if (SET_DEST (x) == pc_rtx)
5151 else if (GET_CODE (SET_SRC (x)) == CALL)
5156 if (GET_CODE (x) == PARALLEL)
5159 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5160 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5162 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5163 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5165 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5166 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5172 /* Emit the rtl pattern X as an appropriate kind of insn.
5173 If X is a label, it is simply added into the insn chain. */
5178 enum rtx_code code = classify_insn (x);
5183 return emit_label (x);
5185 return emit_insn (x);
5188 rtx insn = emit_jump_insn (x);
5189 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5190 return emit_barrier ();
5194 return emit_call_insn (x);
5196 return emit_debug_insn (x);
5202 /* Space for free sequence stack entries. */
5203 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5205 /* Begin emitting insns to a sequence. If this sequence will contain
5206 something that might cause the compiler to pop arguments to function
5207 calls (because those pops have previously been deferred; see
5208 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5209 before calling this function. That will ensure that the deferred
5210 pops are not accidentally emitted in the middle of this sequence. */
5213 start_sequence (void)
5215 struct sequence_stack *tem;
5217 if (free_sequence_stack != NULL)
5219 tem = free_sequence_stack;
5220 free_sequence_stack = tem->next;
5223 tem = ggc_alloc_sequence_stack ();
5225 tem->next = seq_stack;
5226 tem->first = get_insns ();
5227 tem->last = get_last_insn ();
5235 /* Set up the insn chain starting with FIRST as the current sequence,
5236 saving the previously current one. See the documentation for
5237 start_sequence for more information about how to use this function. */
5240 push_to_sequence (rtx first)
5246 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5248 set_first_insn (first);
5249 set_last_insn (last);
5252 /* Like push_to_sequence, but take the last insn as an argument to avoid
5253 looping through the list. */
5256 push_to_sequence2 (rtx first, rtx last)
5260 set_first_insn (first);
5261 set_last_insn (last);
5264 /* Set up the outer-level insn chain
5265 as the current sequence, saving the previously current one. */
5268 push_topmost_sequence (void)
5270 struct sequence_stack *stack, *top = NULL;
5274 for (stack = seq_stack; stack; stack = stack->next)
5277 set_first_insn (top->first);
5278 set_last_insn (top->last);
5281 /* After emitting to the outer-level insn chain, update the outer-level
5282 insn chain, and restore the previous saved state. */
5285 pop_topmost_sequence (void)
5287 struct sequence_stack *stack, *top = NULL;
5289 for (stack = seq_stack; stack; stack = stack->next)
5292 top->first = get_insns ();
5293 top->last = get_last_insn ();
5298 /* After emitting to a sequence, restore previous saved state.
5300 To get the contents of the sequence just made, you must call
5301 `get_insns' *before* calling here.
5303 If the compiler might have deferred popping arguments while
5304 generating this sequence, and this sequence will not be immediately
5305 inserted into the instruction stream, use do_pending_stack_adjust
5306 before calling get_insns. That will ensure that the deferred
5307 pops are inserted into this sequence, and not into some random
5308 location in the instruction stream. See INHIBIT_DEFER_POP for more
5309 information about deferred popping of arguments. */
5314 struct sequence_stack *tem = seq_stack;
5316 set_first_insn (tem->first);
5317 set_last_insn (tem->last);
5318 seq_stack = tem->next;
5320 memset (tem, 0, sizeof (*tem));
5321 tem->next = free_sequence_stack;
5322 free_sequence_stack = tem;
5325 /* Return 1 if currently emitting into a sequence. */
5328 in_sequence_p (void)
5330 return seq_stack != 0;
5333 /* Put the various virtual registers into REGNO_REG_RTX. */
5336 init_virtual_regs (void)
5338 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5339 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5340 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5341 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5342 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5343 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5344 = virtual_preferred_stack_boundary_rtx;
5348 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5349 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5350 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5351 static int copy_insn_n_scratches;
5353 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5354 copied an ASM_OPERANDS.
5355 In that case, it is the original input-operand vector. */
5356 static rtvec orig_asm_operands_vector;
5358 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5359 copied an ASM_OPERANDS.
5360 In that case, it is the copied input-operand vector. */
5361 static rtvec copy_asm_operands_vector;
5363 /* Likewise for the constraints vector. */
5364 static rtvec orig_asm_constraints_vector;
5365 static rtvec copy_asm_constraints_vector;
5367 /* Recursively create a new copy of an rtx for copy_insn.
5368 This function differs from copy_rtx in that it handles SCRATCHes and
5369 ASM_OPERANDs properly.
5370 Normally, this function is not used directly; use copy_insn as front end.
5371 However, you could first copy an insn pattern with copy_insn and then use
5372 this function afterwards to properly copy any REG_NOTEs containing
5376 copy_insn_1 (rtx orig)
5381 const char *format_ptr;
5386 code = GET_CODE (orig);
5401 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5406 for (i = 0; i < copy_insn_n_scratches; i++)
5407 if (copy_insn_scratch_in[i] == orig)
5408 return copy_insn_scratch_out[i];
5412 if (shared_const_p (orig))
5416 /* A MEM with a constant address is not sharable. The problem is that
5417 the constant address may need to be reloaded. If the mem is shared,
5418 then reloading one copy of this mem will cause all copies to appear
5419 to have been reloaded. */
5425 /* Copy the various flags, fields, and other information. We assume
5426 that all fields need copying, and then clear the fields that should
5427 not be copied. That is the sensible default behavior, and forces
5428 us to explicitly document why we are *not* copying a flag. */
5429 copy = shallow_copy_rtx (orig);
5431 /* We do not copy the USED flag, which is used as a mark bit during
5432 walks over the RTL. */
5433 RTX_FLAG (copy, used) = 0;
5435 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5438 RTX_FLAG (copy, jump) = 0;
5439 RTX_FLAG (copy, call) = 0;
5440 RTX_FLAG (copy, frame_related) = 0;
5443 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5445 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5446 switch (*format_ptr++)
5449 if (XEXP (orig, i) != NULL)
5450 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5455 if (XVEC (orig, i) == orig_asm_constraints_vector)
5456 XVEC (copy, i) = copy_asm_constraints_vector;
5457 else if (XVEC (orig, i) == orig_asm_operands_vector)
5458 XVEC (copy, i) = copy_asm_operands_vector;
5459 else if (XVEC (orig, i) != NULL)
5461 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5462 for (j = 0; j < XVECLEN (copy, i); j++)
5463 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5474 /* These are left unchanged. */
5481 if (code == SCRATCH)
5483 i = copy_insn_n_scratches++;
5484 gcc_assert (i < MAX_RECOG_OPERANDS);
5485 copy_insn_scratch_in[i] = orig;
5486 copy_insn_scratch_out[i] = copy;
5488 else if (code == ASM_OPERANDS)
5490 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5491 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5492 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5493 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5499 /* Create a new copy of an rtx.
5500 This function differs from copy_rtx in that it handles SCRATCHes and
5501 ASM_OPERANDs properly.
5502 INSN doesn't really have to be a full INSN; it could be just the
5505 copy_insn (rtx insn)
5507 copy_insn_n_scratches = 0;
5508 orig_asm_operands_vector = 0;
5509 orig_asm_constraints_vector = 0;
5510 copy_asm_operands_vector = 0;
5511 copy_asm_constraints_vector = 0;
5512 return copy_insn_1 (insn);
5515 /* Initialize data structures and variables in this file
5516 before generating rtl for each function. */
5521 set_first_insn (NULL);
5522 set_last_insn (NULL);
5523 if (MIN_NONDEBUG_INSN_UID)
5524 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5527 cur_debug_insn_uid = 1;
5528 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5529 last_location = UNKNOWN_LOCATION;
5530 first_label_num = label_num;
5533 /* Init the tables that describe all the pseudo regs. */
5535 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5537 crtl->emit.regno_pointer_align
5538 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5540 regno_reg_rtx = ggc_alloc_vec_rtx (crtl->emit.regno_pointer_align_length);
5542 /* Put copies of all the hard registers into regno_reg_rtx. */
5543 memcpy (regno_reg_rtx,
5544 initial_regno_reg_rtx,
5545 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5547 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5548 init_virtual_regs ();
5550 /* Indicate that the virtual registers and stack locations are
5552 REG_POINTER (stack_pointer_rtx) = 1;
5553 REG_POINTER (frame_pointer_rtx) = 1;
5554 REG_POINTER (hard_frame_pointer_rtx) = 1;
5555 REG_POINTER (arg_pointer_rtx) = 1;
5557 REG_POINTER (virtual_incoming_args_rtx) = 1;
5558 REG_POINTER (virtual_stack_vars_rtx) = 1;
5559 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5560 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5561 REG_POINTER (virtual_cfa_rtx) = 1;
5563 #ifdef STACK_BOUNDARY
5564 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5565 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5566 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5567 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5569 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5570 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5571 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5572 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5573 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5576 #ifdef INIT_EXPANDERS
5581 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5584 gen_const_vector (enum machine_mode mode, int constant)
5589 enum machine_mode inner;
5591 units = GET_MODE_NUNITS (mode);
5592 inner = GET_MODE_INNER (mode);
5594 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5596 v = rtvec_alloc (units);
5598 /* We need to call this function after we set the scalar const_tiny_rtx
5600 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5602 for (i = 0; i < units; ++i)
5603 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5605 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5609 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5610 all elements are zero, and the one vector when all elements are one. */
5612 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5614 enum machine_mode inner = GET_MODE_INNER (mode);
5615 int nunits = GET_MODE_NUNITS (mode);
5619 /* Check to see if all of the elements have the same value. */
5620 x = RTVEC_ELT (v, nunits - 1);
5621 for (i = nunits - 2; i >= 0; i--)
5622 if (RTVEC_ELT (v, i) != x)
5625 /* If the values are all the same, check to see if we can use one of the
5626 standard constant vectors. */
5629 if (x == CONST0_RTX (inner))
5630 return CONST0_RTX (mode);
5631 else if (x == CONST1_RTX (inner))
5632 return CONST1_RTX (mode);
5635 return gen_rtx_raw_CONST_VECTOR (mode, v);
5638 /* Initialise global register information required by all functions. */
5641 init_emit_regs (void)
5645 /* Reset register attributes */
5646 htab_empty (reg_attrs_htab);
5648 /* We need reg_raw_mode, so initialize the modes now. */
5649 init_reg_modes_target ();
5651 /* Assign register numbers to the globally defined register rtx. */
5652 pc_rtx = gen_rtx_PC (VOIDmode);
5653 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5654 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5655 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5656 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5657 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5658 virtual_incoming_args_rtx =
5659 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5660 virtual_stack_vars_rtx =
5661 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5662 virtual_stack_dynamic_rtx =
5663 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5664 virtual_outgoing_args_rtx =
5665 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5666 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5667 virtual_preferred_stack_boundary_rtx =
5668 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5670 /* Initialize RTL for commonly used hard registers. These are
5671 copied into regno_reg_rtx as we begin to compile each function. */
5672 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5673 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5675 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5676 return_address_pointer_rtx
5677 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5680 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5681 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5683 pic_offset_table_rtx = NULL_RTX;
5686 /* Create some permanent unique rtl objects shared between all functions. */
5689 init_emit_once (void)
5692 enum machine_mode mode;
5693 enum machine_mode double_mode;
5695 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5697 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5698 const_int_htab_eq, NULL);
5700 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5701 const_double_htab_eq, NULL);
5703 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5704 const_fixed_htab_eq, NULL);
5706 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5707 mem_attrs_htab_eq, NULL);
5708 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5709 reg_attrs_htab_eq, NULL);
5711 /* Compute the word and byte modes. */
5713 byte_mode = VOIDmode;
5714 word_mode = VOIDmode;
5715 double_mode = VOIDmode;
5717 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5719 mode = GET_MODE_WIDER_MODE (mode))
5721 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5722 && byte_mode == VOIDmode)
5725 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5726 && word_mode == VOIDmode)
5730 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5732 mode = GET_MODE_WIDER_MODE (mode))
5734 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5735 && double_mode == VOIDmode)
5739 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5741 #ifdef INIT_EXPANDERS
5742 /* This is to initialize {init|mark|free}_machine_status before the first
5743 call to push_function_context_to. This is needed by the Chill front
5744 end which calls push_function_context_to before the first call to
5745 init_function_start. */
5749 /* Create the unique rtx's for certain rtx codes and operand values. */
5751 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5752 tries to use these variables. */
5753 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5754 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5755 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5757 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5758 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5759 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5761 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5763 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5764 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5765 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5770 dconsthalf = dconst1;
5771 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5773 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5775 const REAL_VALUE_TYPE *const r =
5776 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5778 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5780 mode = GET_MODE_WIDER_MODE (mode))
5781 const_tiny_rtx[i][(int) mode] =
5782 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5784 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5786 mode = GET_MODE_WIDER_MODE (mode))
5787 const_tiny_rtx[i][(int) mode] =
5788 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5790 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5792 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5794 mode = GET_MODE_WIDER_MODE (mode))
5795 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5797 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5799 mode = GET_MODE_WIDER_MODE (mode))
5800 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5803 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5805 mode = GET_MODE_WIDER_MODE (mode))
5807 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5808 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5811 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5813 mode = GET_MODE_WIDER_MODE (mode))
5815 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5816 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5819 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5821 mode = GET_MODE_WIDER_MODE (mode))
5823 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5824 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5827 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5829 mode = GET_MODE_WIDER_MODE (mode))
5831 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5832 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5835 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5837 mode = GET_MODE_WIDER_MODE (mode))
5839 FCONST0(mode).data.high = 0;
5840 FCONST0(mode).data.low = 0;
5841 FCONST0(mode).mode = mode;
5842 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5843 FCONST0 (mode), mode);
5846 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5848 mode = GET_MODE_WIDER_MODE (mode))
5850 FCONST0(mode).data.high = 0;
5851 FCONST0(mode).data.low = 0;
5852 FCONST0(mode).mode = mode;
5853 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5854 FCONST0 (mode), mode);
5857 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5859 mode = GET_MODE_WIDER_MODE (mode))
5861 FCONST0(mode).data.high = 0;
5862 FCONST0(mode).data.low = 0;
5863 FCONST0(mode).mode = mode;
5864 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5865 FCONST0 (mode), mode);
5867 /* We store the value 1. */
5868 FCONST1(mode).data.high = 0;
5869 FCONST1(mode).data.low = 0;
5870 FCONST1(mode).mode = mode;
5871 lshift_double (1, 0, GET_MODE_FBIT (mode),
5872 2 * HOST_BITS_PER_WIDE_INT,
5873 &FCONST1(mode).data.low,
5874 &FCONST1(mode).data.high,
5875 SIGNED_FIXED_POINT_MODE_P (mode));
5876 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5877 FCONST1 (mode), mode);
5880 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5882 mode = GET_MODE_WIDER_MODE (mode))
5884 FCONST0(mode).data.high = 0;
5885 FCONST0(mode).data.low = 0;
5886 FCONST0(mode).mode = mode;
5887 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5888 FCONST0 (mode), mode);
5890 /* We store the value 1. */
5891 FCONST1(mode).data.high = 0;
5892 FCONST1(mode).data.low = 0;
5893 FCONST1(mode).mode = mode;
5894 lshift_double (1, 0, GET_MODE_FBIT (mode),
5895 2 * HOST_BITS_PER_WIDE_INT,
5896 &FCONST1(mode).data.low,
5897 &FCONST1(mode).data.high,
5898 SIGNED_FIXED_POINT_MODE_P (mode));
5899 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5900 FCONST1 (mode), mode);
5903 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5905 mode = GET_MODE_WIDER_MODE (mode))
5907 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5910 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5912 mode = GET_MODE_WIDER_MODE (mode))
5914 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5917 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5919 mode = GET_MODE_WIDER_MODE (mode))
5921 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5922 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5925 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5927 mode = GET_MODE_WIDER_MODE (mode))
5929 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5930 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5933 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5934 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5935 const_tiny_rtx[0][i] = const0_rtx;
5937 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5938 if (STORE_FLAG_VALUE == 1)
5939 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5942 /* Produce exact duplicate of insn INSN after AFTER.
5943 Care updating of libcall regions if present. */
5946 emit_copy_of_insn_after (rtx insn, rtx after)
5950 switch (GET_CODE (insn))
5953 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5957 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5961 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5965 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5966 if (CALL_INSN_FUNCTION_USAGE (insn))
5967 CALL_INSN_FUNCTION_USAGE (new_rtx)
5968 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5969 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5970 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5971 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5972 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5973 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5980 /* Update LABEL_NUSES. */
5981 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5983 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5985 /* If the old insn is frame related, then so is the new one. This is
5986 primarily needed for IA-64 unwind info which marks epilogue insns,
5987 which may be duplicated by the basic block reordering code. */
5988 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5990 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5991 will make them. REG_LABEL_TARGETs are created there too, but are
5992 supposed to be sticky, so we copy them. */
5993 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5994 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5996 if (GET_CODE (link) == EXPR_LIST)
5997 add_reg_note (new_rtx, REG_NOTE_KIND (link),
5998 copy_insn_1 (XEXP (link, 0)));
6000 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
6003 INSN_CODE (new_rtx) = INSN_CODE (insn);
6007 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6009 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
6011 if (hard_reg_clobbers[mode][regno])
6012 return hard_reg_clobbers[mode][regno];
6014 return (hard_reg_clobbers[mode][regno] =
6015 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6018 #include "gt-emit-rtl.h"