1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
64 struct target_rtl default_target_rtl;
66 struct target_rtl *this_target_rtl = &default_target_rtl;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num = 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
97 is set only for MODE_INT and MODE_VECTOR_INT modes. */
99 rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
107 REAL_VALUE_TYPE dconsthalf;
109 /* Record fixed-point constant 0 and 1. */
110 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
111 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
113 /* We make one copy of (const_int C) where C is in
114 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
115 to save space during the compilation and simplify comparisons of
118 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
120 /* Standard pieces of rtx, to be substituted directly into things. */
123 rtx simple_return_rtx;
126 /* A hash table storing CONST_INTs whose absolute value is greater
127 than MAX_SAVED_CONST_INT. */
129 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
130 htab_t const_int_htab;
132 /* A hash table storing memory attribute structures. */
133 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
134 htab_t mem_attrs_htab;
136 /* A hash table storing register attribute structures. */
137 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
138 htab_t reg_attrs_htab;
140 /* A hash table storing all CONST_DOUBLEs. */
141 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
142 htab_t const_double_htab;
144 /* A hash table storing all CONST_FIXEDs. */
145 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
146 htab_t const_fixed_htab;
148 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
149 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
150 #define first_label_num (crtl->emit.x_first_label_num)
152 static rtx make_call_insn_raw (rtx);
153 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
154 static void set_used_decls (tree);
155 static void mark_label_nuses (rtx);
156 static hashval_t const_int_htab_hash (const void *);
157 static int const_int_htab_eq (const void *, const void *);
158 static hashval_t const_double_htab_hash (const void *);
159 static int const_double_htab_eq (const void *, const void *);
160 static rtx lookup_const_double (rtx);
161 static hashval_t const_fixed_htab_hash (const void *);
162 static int const_fixed_htab_eq (const void *, const void *);
163 static rtx lookup_const_fixed (rtx);
164 static hashval_t mem_attrs_htab_hash (const void *);
165 static int mem_attrs_htab_eq (const void *, const void *);
166 static hashval_t reg_attrs_htab_hash (const void *);
167 static int reg_attrs_htab_eq (const void *, const void *);
168 static reg_attrs *get_reg_attrs (tree, int);
169 static rtx gen_const_vector (enum machine_mode, int);
170 static void copy_rtx_if_shared_1 (rtx *orig);
172 /* Probability of the conditional branch currently proceeded by try_split.
173 Set to -1 otherwise. */
174 int split_branch_probability = -1;
176 /* Returns a hash code for X (which is a really a CONST_INT). */
179 const_int_htab_hash (const void *x)
181 return (hashval_t) INTVAL ((const_rtx) x);
184 /* Returns nonzero if the value represented by X (which is really a
185 CONST_INT) is the same as that given by Y (which is really a
189 const_int_htab_eq (const void *x, const void *y)
191 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
194 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
196 const_double_htab_hash (const void *x)
198 const_rtx const value = (const_rtx) x;
201 if (GET_MODE (value) == VOIDmode)
202 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
205 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
206 /* MODE is used in the comparison, so it should be in the hash. */
207 h ^= GET_MODE (value);
212 /* Returns nonzero if the value represented by X (really a ...)
213 is the same as that represented by Y (really a ...) */
215 const_double_htab_eq (const void *x, const void *y)
217 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
219 if (GET_MODE (a) != GET_MODE (b))
221 if (GET_MODE (a) == VOIDmode)
222 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
223 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
225 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
226 CONST_DOUBLE_REAL_VALUE (b));
229 /* Returns a hash code for X (which is really a CONST_FIXED). */
232 const_fixed_htab_hash (const void *x)
234 const_rtx const value = (const_rtx) x;
237 h = fixed_hash (CONST_FIXED_VALUE (value));
238 /* MODE is used in the comparison, so it should be in the hash. */
239 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...). */
247 const_fixed_htab_eq (const void *x, const void *y)
249 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
251 if (GET_MODE (a) != GET_MODE (b))
253 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
256 /* Returns a hash code for X (which is a really a mem_attrs *). */
259 mem_attrs_htab_hash (const void *x)
261 const mem_attrs *const p = (const mem_attrs *) x;
263 return (p->alias ^ (p->align * 1000)
264 ^ (p->addrspace * 4000)
265 ^ ((p->offset_known_p ? p->offset : 0) * 50000)
266 ^ ((p->size_known_p ? p->size : 0) * 2500000)
267 ^ (size_t) iterative_hash_expr (p->expr, 0));
270 /* Return true if the given memory attributes are equal. */
273 mem_attrs_eq_p (const struct mem_attrs *p, const struct mem_attrs *q)
275 return (p->alias == q->alias
276 && p->offset_known_p == q->offset_known_p
277 && (!p->offset_known_p || p->offset == q->offset)
278 && p->size_known_p == q->size_known_p
279 && (!p->size_known_p || p->size == q->size)
280 && p->align == q->align
281 && p->addrspace == q->addrspace
282 && (p->expr == q->expr
283 || (p->expr != NULL_TREE && q->expr != NULL_TREE
284 && operand_equal_p (p->expr, q->expr, 0))));
287 /* Returns nonzero if the value represented by X (which is really a
288 mem_attrs *) is the same as that given by Y (which is also really a
292 mem_attrs_htab_eq (const void *x, const void *y)
294 return mem_attrs_eq_p ((const mem_attrs *) x, (const mem_attrs *) y);
297 /* Set MEM's memory attributes so that they are the same as ATTRS. */
300 set_mem_attrs (rtx mem, mem_attrs *attrs)
304 /* If everything is the default, we can just clear the attributes. */
305 if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
311 slot = htab_find_slot (mem_attrs_htab, attrs, INSERT);
314 *slot = ggc_alloc_mem_attrs ();
315 memcpy (*slot, attrs, sizeof (mem_attrs));
318 MEM_ATTRS (mem) = (mem_attrs *) *slot;
321 /* Returns a hash code for X (which is a really a reg_attrs *). */
324 reg_attrs_htab_hash (const void *x)
326 const reg_attrs *const p = (const reg_attrs *) x;
328 return ((p->offset * 1000) ^ (intptr_t) p->decl);
331 /* Returns nonzero if the value represented by X (which is really a
332 reg_attrs *) is the same as that given by Y (which is also really a
336 reg_attrs_htab_eq (const void *x, const void *y)
338 const reg_attrs *const p = (const reg_attrs *) x;
339 const reg_attrs *const q = (const reg_attrs *) y;
341 return (p->decl == q->decl && p->offset == q->offset);
343 /* Allocate a new reg_attrs structure and insert it into the hash table if
344 one identical to it is not already in the table. We are doing this for
348 get_reg_attrs (tree decl, int offset)
353 /* If everything is the default, we can just return zero. */
354 if (decl == 0 && offset == 0)
358 attrs.offset = offset;
360 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
363 *slot = ggc_alloc_reg_attrs ();
364 memcpy (*slot, &attrs, sizeof (reg_attrs));
367 return (reg_attrs *) *slot;
372 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
378 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
379 MEM_VOLATILE_P (x) = true;
385 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
386 don't attempt to share with the various global pieces of rtl (such as
387 frame_pointer_rtx). */
390 gen_raw_REG (enum machine_mode mode, int regno)
392 rtx x = gen_rtx_raw_REG (mode, regno);
393 ORIGINAL_REGNO (x) = regno;
397 /* There are some RTL codes that require special attention; the generation
398 functions do the raw handling. If you add to this list, modify
399 special_rtx in gengenrtl.c as well. */
402 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
406 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
407 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
409 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
410 if (const_true_rtx && arg == STORE_FLAG_VALUE)
411 return const_true_rtx;
414 /* Look up the CONST_INT in the hash table. */
415 slot = htab_find_slot_with_hash (const_int_htab, &arg,
416 (hashval_t) arg, INSERT);
418 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
424 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
426 return GEN_INT (trunc_int_for_mode (c, mode));
429 /* CONST_DOUBLEs might be created from pairs of integers, or from
430 REAL_VALUE_TYPEs. Also, their length is known only at run time,
431 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
433 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
434 hash table. If so, return its counterpart; otherwise add it
435 to the hash table and return it. */
437 lookup_const_double (rtx real)
439 void **slot = htab_find_slot (const_double_htab, real, INSERT);
446 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
447 VALUE in mode MODE. */
449 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
451 rtx real = rtx_alloc (CONST_DOUBLE);
452 PUT_MODE (real, mode);
456 return lookup_const_double (real);
459 /* Determine whether FIXED, a CONST_FIXED, already exists in the
460 hash table. If so, return its counterpart; otherwise add it
461 to the hash table and return it. */
464 lookup_const_fixed (rtx fixed)
466 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
473 /* Return a CONST_FIXED rtx for a fixed-point value specified by
474 VALUE in mode MODE. */
477 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
479 rtx fixed = rtx_alloc (CONST_FIXED);
480 PUT_MODE (fixed, mode);
484 return lookup_const_fixed (fixed);
487 /* Constructs double_int from rtx CST. */
490 rtx_to_double_int (const_rtx cst)
494 if (CONST_INT_P (cst))
495 r = shwi_to_double_int (INTVAL (cst));
496 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
498 r.low = CONST_DOUBLE_LOW (cst);
499 r.high = CONST_DOUBLE_HIGH (cst);
508 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
512 immed_double_int_const (double_int i, enum machine_mode mode)
514 return immed_double_const (i.low, i.high, mode);
517 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
518 of ints: I0 is the low-order word and I1 is the high-order word.
519 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
520 implied upper bits are copies of the high bit of i1. The value
521 itself is neither signed nor unsigned. Do not use this routine for
522 non-integer modes; convert to REAL_VALUE_TYPE and use
523 CONST_DOUBLE_FROM_REAL_VALUE. */
526 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
531 /* There are the following cases (note that there are no modes with
532 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
534 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
536 2) If the value of the integer fits into HOST_WIDE_INT anyway
537 (i.e., i1 consists only from copies of the sign bit, and sign
538 of i0 and i1 are the same), then we return a CONST_INT for i0.
539 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
540 if (mode != VOIDmode)
542 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
543 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
544 /* We can get a 0 for an error mark. */
545 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
546 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
548 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
549 return gen_int_mode (i0, mode);
552 /* If this integer fits in one word, return a CONST_INT. */
553 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
556 /* We use VOIDmode for integers. */
557 value = rtx_alloc (CONST_DOUBLE);
558 PUT_MODE (value, VOIDmode);
560 CONST_DOUBLE_LOW (value) = i0;
561 CONST_DOUBLE_HIGH (value) = i1;
563 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
564 XWINT (value, i) = 0;
566 return lookup_const_double (value);
570 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
572 /* In case the MD file explicitly references the frame pointer, have
573 all such references point to the same frame pointer. This is
574 used during frame pointer elimination to distinguish the explicit
575 references to these registers from pseudos that happened to be
578 If we have eliminated the frame pointer or arg pointer, we will
579 be using it as a normal register, for example as a spill
580 register. In such cases, we might be accessing it in a mode that
581 is not Pmode and therefore cannot use the pre-allocated rtx.
583 Also don't do this when we are making new REGs in reload, since
584 we don't want to get confused with the real pointers. */
586 if (mode == Pmode && !reload_in_progress)
588 if (regno == FRAME_POINTER_REGNUM
589 && (!reload_completed || frame_pointer_needed))
590 return frame_pointer_rtx;
591 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
592 if (regno == HARD_FRAME_POINTER_REGNUM
593 && (!reload_completed || frame_pointer_needed))
594 return hard_frame_pointer_rtx;
596 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
597 if (regno == ARG_POINTER_REGNUM)
598 return arg_pointer_rtx;
600 #ifdef RETURN_ADDRESS_POINTER_REGNUM
601 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
602 return return_address_pointer_rtx;
604 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
605 && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
606 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
607 return pic_offset_table_rtx;
608 if (regno == STACK_POINTER_REGNUM)
609 return stack_pointer_rtx;
613 /* If the per-function register table has been set up, try to re-use
614 an existing entry in that table to avoid useless generation of RTL.
616 This code is disabled for now until we can fix the various backends
617 which depend on having non-shared hard registers in some cases. Long
618 term we want to re-enable this code as it can significantly cut down
619 on the amount of useless RTL that gets generated.
621 We'll also need to fix some code that runs after reload that wants to
622 set ORIGINAL_REGNO. */
627 && regno < FIRST_PSEUDO_REGISTER
628 && reg_raw_mode[regno] == mode)
629 return regno_reg_rtx[regno];
632 return gen_raw_REG (mode, regno);
636 gen_rtx_MEM (enum machine_mode mode, rtx addr)
638 rtx rt = gen_rtx_raw_MEM (mode, addr);
640 /* This field is not cleared by the mere allocation of the rtx, so
647 /* Generate a memory referring to non-trapping constant memory. */
650 gen_const_mem (enum machine_mode mode, rtx addr)
652 rtx mem = gen_rtx_MEM (mode, addr);
653 MEM_READONLY_P (mem) = 1;
654 MEM_NOTRAP_P (mem) = 1;
658 /* Generate a MEM referring to fixed portions of the frame, e.g., register
662 gen_frame_mem (enum machine_mode mode, rtx addr)
664 rtx mem = gen_rtx_MEM (mode, addr);
665 MEM_NOTRAP_P (mem) = 1;
666 set_mem_alias_set (mem, get_frame_alias_set ());
670 /* Generate a MEM referring to a temporary use of the stack, not part
671 of the fixed stack frame. For example, something which is pushed
672 by a target splitter. */
674 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
676 rtx mem = gen_rtx_MEM (mode, addr);
677 MEM_NOTRAP_P (mem) = 1;
678 if (!cfun->calls_alloca)
679 set_mem_alias_set (mem, get_frame_alias_set ());
683 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
684 this construct would be valid, and false otherwise. */
687 validate_subreg (enum machine_mode omode, enum machine_mode imode,
688 const_rtx reg, unsigned int offset)
690 unsigned int isize = GET_MODE_SIZE (imode);
691 unsigned int osize = GET_MODE_SIZE (omode);
693 /* All subregs must be aligned. */
694 if (offset % osize != 0)
697 /* The subreg offset cannot be outside the inner object. */
701 /* ??? This should not be here. Temporarily continue to allow word_mode
702 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
703 Generally, backends are doing something sketchy but it'll take time to
705 if (omode == word_mode)
707 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
708 is the culprit here, and not the backends. */
709 else if (osize >= UNITS_PER_WORD && isize >= osize)
711 /* Allow component subregs of complex and vector. Though given the below
712 extraction rules, it's not always clear what that means. */
713 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
714 && GET_MODE_INNER (imode) == omode)
716 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
717 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
718 represent this. It's questionable if this ought to be represented at
719 all -- why can't this all be hidden in post-reload splitters that make
720 arbitrarily mode changes to the registers themselves. */
721 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
723 /* Subregs involving floating point modes are not allowed to
724 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
725 (subreg:SI (reg:DF) 0) isn't. */
726 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
732 /* Paradoxical subregs must have offset zero. */
736 /* This is a normal subreg. Verify that the offset is representable. */
738 /* For hard registers, we already have most of these rules collected in
739 subreg_offset_representable_p. */
740 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
742 unsigned int regno = REGNO (reg);
744 #ifdef CANNOT_CHANGE_MODE_CLASS
745 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
746 && GET_MODE_INNER (imode) == omode)
748 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
752 return subreg_offset_representable_p (regno, imode, offset, omode);
755 /* For pseudo registers, we want most of the same checks. Namely:
756 If the register no larger than a word, the subreg must be lowpart.
757 If the register is larger than a word, the subreg must be the lowpart
758 of a subword. A subreg does *not* perform arbitrary bit extraction.
759 Given that we've already checked mode/offset alignment, we only have
760 to check subword subregs here. */
761 if (osize < UNITS_PER_WORD)
763 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
764 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
765 if (offset % UNITS_PER_WORD != low_off)
772 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
774 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
775 return gen_rtx_raw_SUBREG (mode, reg, offset);
778 /* Generate a SUBREG representing the least-significant part of REG if MODE
779 is smaller than mode of REG, otherwise paradoxical SUBREG. */
782 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
784 enum machine_mode inmode;
786 inmode = GET_MODE (reg);
787 if (inmode == VOIDmode)
789 return gen_rtx_SUBREG (mode, reg,
790 subreg_lowpart_offset (mode, inmode));
794 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
797 gen_rtvec (int n, ...)
805 /* Don't allocate an empty rtvec... */
812 rt_val = rtvec_alloc (n);
814 for (i = 0; i < n; i++)
815 rt_val->elem[i] = va_arg (p, rtx);
822 gen_rtvec_v (int n, rtx *argp)
827 /* Don't allocate an empty rtvec... */
831 rt_val = rtvec_alloc (n);
833 for (i = 0; i < n; i++)
834 rt_val->elem[i] = *argp++;
839 /* Return the number of bytes between the start of an OUTER_MODE
840 in-memory value and the start of an INNER_MODE in-memory value,
841 given that the former is a lowpart of the latter. It may be a
842 paradoxical lowpart, in which case the offset will be negative
843 on big-endian targets. */
846 byte_lowpart_offset (enum machine_mode outer_mode,
847 enum machine_mode inner_mode)
849 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
850 return subreg_lowpart_offset (outer_mode, inner_mode);
852 return -subreg_lowpart_offset (inner_mode, outer_mode);
855 /* Generate a REG rtx for a new pseudo register of mode MODE.
856 This pseudo is assigned the next sequential register number. */
859 gen_reg_rtx (enum machine_mode mode)
862 unsigned int align = GET_MODE_ALIGNMENT (mode);
864 gcc_assert (can_create_pseudo_p ());
866 /* If a virtual register with bigger mode alignment is generated,
867 increase stack alignment estimation because it might be spilled
869 if (SUPPORTS_STACK_ALIGNMENT
870 && crtl->stack_alignment_estimated < align
871 && !crtl->stack_realign_processed)
873 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
874 if (crtl->stack_alignment_estimated < min_align)
875 crtl->stack_alignment_estimated = min_align;
878 if (generating_concat_p
879 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
880 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
882 /* For complex modes, don't make a single pseudo.
883 Instead, make a CONCAT of two pseudos.
884 This allows noncontiguous allocation of the real and imaginary parts,
885 which makes much better code. Besides, allocating DCmode
886 pseudos overstrains reload on some machines like the 386. */
887 rtx realpart, imagpart;
888 enum machine_mode partmode = GET_MODE_INNER (mode);
890 realpart = gen_reg_rtx (partmode);
891 imagpart = gen_reg_rtx (partmode);
892 return gen_rtx_CONCAT (mode, realpart, imagpart);
895 /* Make sure regno_pointer_align, and regno_reg_rtx are large
896 enough to have an element for this pseudo reg number. */
898 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
900 int old_size = crtl->emit.regno_pointer_align_length;
904 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
905 memset (tmp + old_size, 0, old_size);
906 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
908 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
909 memset (new1 + old_size, 0, old_size * sizeof (rtx));
910 regno_reg_rtx = new1;
912 crtl->emit.regno_pointer_align_length = old_size * 2;
915 val = gen_raw_REG (mode, reg_rtx_no);
916 regno_reg_rtx[reg_rtx_no++] = val;
920 /* Update NEW with the same attributes as REG, but with OFFSET added
921 to the REG_OFFSET. */
924 update_reg_offset (rtx new_rtx, rtx reg, int offset)
926 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
927 REG_OFFSET (reg) + offset);
930 /* Generate a register with same attributes as REG, but with OFFSET
931 added to the REG_OFFSET. */
934 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
937 rtx new_rtx = gen_rtx_REG (mode, regno);
939 update_reg_offset (new_rtx, reg, offset);
943 /* Generate a new pseudo-register with the same attributes as REG, but
944 with OFFSET added to the REG_OFFSET. */
947 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
949 rtx new_rtx = gen_reg_rtx (mode);
951 update_reg_offset (new_rtx, reg, offset);
955 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
956 new register is a (possibly paradoxical) lowpart of the old one. */
959 adjust_reg_mode (rtx reg, enum machine_mode mode)
961 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
962 PUT_MODE (reg, mode);
965 /* Copy REG's attributes from X, if X has any attributes. If REG and X
966 have different modes, REG is a (possibly paradoxical) lowpart of X. */
969 set_reg_attrs_from_value (rtx reg, rtx x)
972 bool can_be_reg_pointer = true;
974 /* Don't call mark_reg_pointer for incompatible pointer sign
976 while (GET_CODE (x) == SIGN_EXTEND
977 || GET_CODE (x) == ZERO_EXTEND
978 || GET_CODE (x) == TRUNCATE
979 || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x)))
981 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
982 if ((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED)
983 || (GET_CODE (x) != SIGN_EXTEND && ! POINTERS_EXTEND_UNSIGNED))
984 can_be_reg_pointer = false;
989 /* Hard registers can be reused for multiple purposes within the same
990 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
992 if (HARD_REGISTER_P (reg))
995 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
998 if (MEM_OFFSET_KNOWN_P (x))
999 REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
1000 MEM_OFFSET (x) + offset);
1001 if (can_be_reg_pointer && MEM_POINTER (x))
1002 mark_reg_pointer (reg, 0);
1007 update_reg_offset (reg, x, offset);
1008 if (can_be_reg_pointer && REG_POINTER (x))
1009 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1013 /* Generate a REG rtx for a new pseudo register, copying the mode
1014 and attributes from X. */
1017 gen_reg_rtx_and_attrs (rtx x)
1019 rtx reg = gen_reg_rtx (GET_MODE (x));
1020 set_reg_attrs_from_value (reg, x);
1024 /* Set the register attributes for registers contained in PARM_RTX.
1025 Use needed values from memory attributes of MEM. */
1028 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1030 if (REG_P (parm_rtx))
1031 set_reg_attrs_from_value (parm_rtx, mem);
1032 else if (GET_CODE (parm_rtx) == PARALLEL)
1034 /* Check for a NULL entry in the first slot, used to indicate that the
1035 parameter goes both on the stack and in registers. */
1036 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1037 for (; i < XVECLEN (parm_rtx, 0); i++)
1039 rtx x = XVECEXP (parm_rtx, 0, i);
1040 if (REG_P (XEXP (x, 0)))
1041 REG_ATTRS (XEXP (x, 0))
1042 = get_reg_attrs (MEM_EXPR (mem),
1043 INTVAL (XEXP (x, 1)));
1048 /* Set the REG_ATTRS for registers in value X, given that X represents
1052 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1054 if (GET_CODE (x) == SUBREG)
1056 gcc_assert (subreg_lowpart_p (x));
1061 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1063 if (GET_CODE (x) == CONCAT)
1065 if (REG_P (XEXP (x, 0)))
1066 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1067 if (REG_P (XEXP (x, 1)))
1068 REG_ATTRS (XEXP (x, 1))
1069 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1071 if (GET_CODE (x) == PARALLEL)
1075 /* Check for a NULL entry, used to indicate that the parameter goes
1076 both on the stack and in registers. */
1077 if (XEXP (XVECEXP (x, 0, 0), 0))
1082 for (i = start; i < XVECLEN (x, 0); i++)
1084 rtx y = XVECEXP (x, 0, i);
1085 if (REG_P (XEXP (y, 0)))
1086 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1091 /* Assign the RTX X to declaration T. */
1094 set_decl_rtl (tree t, rtx x)
1096 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1098 set_reg_attrs_for_decl_rtl (t, x);
1101 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1102 if the ABI requires the parameter to be passed by reference. */
1105 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1107 DECL_INCOMING_RTL (t) = x;
1108 if (x && !by_reference_p)
1109 set_reg_attrs_for_decl_rtl (t, x);
1112 /* Identify REG (which may be a CONCAT) as a user register. */
1115 mark_user_reg (rtx reg)
1117 if (GET_CODE (reg) == CONCAT)
1119 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1120 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1124 gcc_assert (REG_P (reg));
1125 REG_USERVAR_P (reg) = 1;
1129 /* Identify REG as a probable pointer register and show its alignment
1130 as ALIGN, if nonzero. */
1133 mark_reg_pointer (rtx reg, int align)
1135 if (! REG_POINTER (reg))
1137 REG_POINTER (reg) = 1;
1140 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1142 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1143 /* We can no-longer be sure just how aligned this pointer is. */
1144 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1147 /* Return 1 plus largest pseudo reg number used in the current function. */
1155 /* Return 1 + the largest label number used so far in the current function. */
1158 max_label_num (void)
1163 /* Return first label number used in this function (if any were used). */
1166 get_first_label_num (void)
1168 return first_label_num;
1171 /* If the rtx for label was created during the expansion of a nested
1172 function, then first_label_num won't include this label number.
1173 Fix this now so that array indices work later. */
1176 maybe_set_first_label_num (rtx x)
1178 if (CODE_LABEL_NUMBER (x) < first_label_num)
1179 first_label_num = CODE_LABEL_NUMBER (x);
1182 /* Return a value representing some low-order bits of X, where the number
1183 of low-order bits is given by MODE. Note that no conversion is done
1184 between floating-point and fixed-point values, rather, the bit
1185 representation is returned.
1187 This function handles the cases in common between gen_lowpart, below,
1188 and two variants in cse.c and combine.c. These are the cases that can
1189 be safely handled at all points in the compilation.
1191 If this is not a case we can handle, return 0. */
1194 gen_lowpart_common (enum machine_mode mode, rtx x)
1196 int msize = GET_MODE_SIZE (mode);
1199 enum machine_mode innermode;
1201 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1202 so we have to make one up. Yuk. */
1203 innermode = GET_MODE (x);
1205 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1206 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1207 else if (innermode == VOIDmode)
1208 innermode = mode_for_size (HOST_BITS_PER_DOUBLE_INT, MODE_INT, 0);
1210 xsize = GET_MODE_SIZE (innermode);
1212 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1214 if (innermode == mode)
1217 /* MODE must occupy no more words than the mode of X. */
1218 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1219 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1222 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1223 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1226 offset = subreg_lowpart_offset (mode, innermode);
1228 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1229 && (GET_MODE_CLASS (mode) == MODE_INT
1230 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1232 /* If we are getting the low-order part of something that has been
1233 sign- or zero-extended, we can either just use the object being
1234 extended or make a narrower extension. If we want an even smaller
1235 piece than the size of the object being extended, call ourselves
1238 This case is used mostly by combine and cse. */
1240 if (GET_MODE (XEXP (x, 0)) == mode)
1242 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1243 return gen_lowpart_common (mode, XEXP (x, 0));
1244 else if (msize < xsize)
1245 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1247 else if (GET_CODE (x) == SUBREG || REG_P (x)
1248 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1249 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1250 return simplify_gen_subreg (mode, x, innermode, offset);
1252 /* Otherwise, we can't do this. */
1257 gen_highpart (enum machine_mode mode, rtx x)
1259 unsigned int msize = GET_MODE_SIZE (mode);
1262 /* This case loses if X is a subreg. To catch bugs early,
1263 complain if an invalid MODE is used even in other cases. */
1264 gcc_assert (msize <= UNITS_PER_WORD
1265 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1267 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1268 subreg_highpart_offset (mode, GET_MODE (x)));
1269 gcc_assert (result);
1271 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1272 the target if we have a MEM. gen_highpart must return a valid operand,
1273 emitting code if necessary to do so. */
1276 result = validize_mem (result);
1277 gcc_assert (result);
1283 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1284 be VOIDmode constant. */
1286 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1288 if (GET_MODE (exp) != VOIDmode)
1290 gcc_assert (GET_MODE (exp) == innermode);
1291 return gen_highpart (outermode, exp);
1293 return simplify_gen_subreg (outermode, exp, innermode,
1294 subreg_highpart_offset (outermode, innermode));
1297 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1300 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1302 unsigned int offset = 0;
1303 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1307 if (WORDS_BIG_ENDIAN)
1308 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1309 if (BYTES_BIG_ENDIAN)
1310 offset += difference % UNITS_PER_WORD;
1316 /* Return offset in bytes to get OUTERMODE high part
1317 of the value in mode INNERMODE stored in memory in target format. */
1319 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1321 unsigned int offset = 0;
1322 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1324 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1328 if (! WORDS_BIG_ENDIAN)
1329 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1330 if (! BYTES_BIG_ENDIAN)
1331 offset += difference % UNITS_PER_WORD;
1337 /* Return 1 iff X, assumed to be a SUBREG,
1338 refers to the least significant part of its containing reg.
1339 If X is not a SUBREG, always return 1 (it is its own low part!). */
1342 subreg_lowpart_p (const_rtx x)
1344 if (GET_CODE (x) != SUBREG)
1346 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1349 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1350 == SUBREG_BYTE (x));
1353 /* Return true if X is a paradoxical subreg, false otherwise. */
1355 paradoxical_subreg_p (const_rtx x)
1357 if (GET_CODE (x) != SUBREG)
1359 return (GET_MODE_PRECISION (GET_MODE (x))
1360 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x))));
1363 /* Return subword OFFSET of operand OP.
1364 The word number, OFFSET, is interpreted as the word number starting
1365 at the low-order address. OFFSET 0 is the low-order word if not
1366 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1368 If we cannot extract the required word, we return zero. Otherwise,
1369 an rtx corresponding to the requested word will be returned.
1371 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1372 reload has completed, a valid address will always be returned. After
1373 reload, if a valid address cannot be returned, we return zero.
1375 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1376 it is the responsibility of the caller.
1378 MODE is the mode of OP in case it is a CONST_INT.
1380 ??? This is still rather broken for some cases. The problem for the
1381 moment is that all callers of this thing provide no 'goal mode' to
1382 tell us to work with. This exists because all callers were written
1383 in a word based SUBREG world.
1384 Now use of this function can be deprecated by simplify_subreg in most
1389 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1391 if (mode == VOIDmode)
1392 mode = GET_MODE (op);
1394 gcc_assert (mode != VOIDmode);
1396 /* If OP is narrower than a word, fail. */
1398 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1401 /* If we want a word outside OP, return zero. */
1403 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1406 /* Form a new MEM at the requested address. */
1409 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1411 if (! validate_address)
1414 else if (reload_completed)
1416 if (! strict_memory_address_addr_space_p (word_mode,
1418 MEM_ADDR_SPACE (op)))
1422 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1425 /* Rest can be handled by simplify_subreg. */
1426 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1429 /* Similar to `operand_subword', but never return 0. If we can't
1430 extract the required subword, put OP into a register and try again.
1431 The second attempt must succeed. We always validate the address in
1434 MODE is the mode of OP, in case it is CONST_INT. */
1437 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1439 rtx result = operand_subword (op, offset, 1, mode);
1444 if (mode != BLKmode && mode != VOIDmode)
1446 /* If this is a register which can not be accessed by words, copy it
1447 to a pseudo register. */
1449 op = copy_to_reg (op);
1451 op = force_reg (mode, op);
1454 result = operand_subword (op, offset, 1, mode);
1455 gcc_assert (result);
1460 /* Returns 1 if both MEM_EXPR can be considered equal
1464 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1469 if (! expr1 || ! expr2)
1472 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1475 return operand_equal_p (expr1, expr2, 0);
1478 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1479 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1483 get_mem_align_offset (rtx mem, unsigned int align)
1486 unsigned HOST_WIDE_INT offset;
1488 /* This function can't use
1489 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1490 || (MAX (MEM_ALIGN (mem),
1491 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1495 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1497 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1498 for <variable>. get_inner_reference doesn't handle it and
1499 even if it did, the alignment in that case needs to be determined
1500 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1501 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1502 isn't sufficiently aligned, the object it is in might be. */
1503 gcc_assert (MEM_P (mem));
1504 expr = MEM_EXPR (mem);
1505 if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1508 offset = MEM_OFFSET (mem);
1511 if (DECL_ALIGN (expr) < align)
1514 else if (INDIRECT_REF_P (expr))
1516 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1519 else if (TREE_CODE (expr) == COMPONENT_REF)
1523 tree inner = TREE_OPERAND (expr, 0);
1524 tree field = TREE_OPERAND (expr, 1);
1525 tree byte_offset = component_ref_field_offset (expr);
1526 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1529 || !host_integerp (byte_offset, 1)
1530 || !host_integerp (bit_offset, 1))
1533 offset += tree_low_cst (byte_offset, 1);
1534 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1536 if (inner == NULL_TREE)
1538 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1539 < (unsigned int) align)
1543 else if (DECL_P (inner))
1545 if (DECL_ALIGN (inner) < align)
1549 else if (TREE_CODE (inner) != COMPONENT_REF)
1557 return offset & ((align / BITS_PER_UNIT) - 1);
1560 /* Given REF (a MEM) and T, either the type of X or the expression
1561 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1562 if we are making a new object of this type. BITPOS is nonzero if
1563 there is an offset outstanding on T that will be applied later. */
1566 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1567 HOST_WIDE_INT bitpos)
1569 HOST_WIDE_INT apply_bitpos = 0;
1571 struct mem_attrs attrs, *defattrs, *refattrs;
1574 /* It can happen that type_for_mode was given a mode for which there
1575 is no language-level type. In which case it returns NULL, which
1580 type = TYPE_P (t) ? t : TREE_TYPE (t);
1581 if (type == error_mark_node)
1584 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1585 wrong answer, as it assumes that DECL_RTL already has the right alias
1586 info. Callers should not set DECL_RTL until after the call to
1587 set_mem_attributes. */
1588 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1590 memset (&attrs, 0, sizeof (attrs));
1592 /* Get the alias set from the expression or type (perhaps using a
1593 front-end routine) and use it. */
1594 attrs.alias = get_alias_set (t);
1596 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1597 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1599 /* Default values from pre-existing memory attributes if present. */
1600 refattrs = MEM_ATTRS (ref);
1603 /* ??? Can this ever happen? Calling this routine on a MEM that
1604 already carries memory attributes should probably be invalid. */
1605 attrs.expr = refattrs->expr;
1606 attrs.offset_known_p = refattrs->offset_known_p;
1607 attrs.offset = refattrs->offset;
1608 attrs.size_known_p = refattrs->size_known_p;
1609 attrs.size = refattrs->size;
1610 attrs.align = refattrs->align;
1613 /* Otherwise, default values from the mode of the MEM reference. */
1616 defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
1617 gcc_assert (!defattrs->expr);
1618 gcc_assert (!defattrs->offset_known_p);
1620 /* Respect mode size. */
1621 attrs.size_known_p = defattrs->size_known_p;
1622 attrs.size = defattrs->size;
1623 /* ??? Is this really necessary? We probably should always get
1624 the size from the type below. */
1626 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1627 if T is an object, always compute the object alignment below. */
1629 attrs.align = defattrs->align;
1631 attrs.align = BITS_PER_UNIT;
1632 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1633 e.g. if the type carries an alignment attribute. Should we be
1634 able to simply always use TYPE_ALIGN? */
1637 /* We can set the alignment from the type if we are making an object,
1638 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1639 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1640 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1642 else if (TREE_CODE (t) == MEM_REF)
1644 tree op0 = TREE_OPERAND (t, 0);
1645 if (TREE_CODE (op0) == ADDR_EXPR
1646 && (DECL_P (TREE_OPERAND (op0, 0))
1647 || CONSTANT_CLASS_P (TREE_OPERAND (op0, 0))))
1649 if (DECL_P (TREE_OPERAND (op0, 0)))
1650 attrs.align = DECL_ALIGN (TREE_OPERAND (op0, 0));
1651 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0)))
1653 attrs.align = TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0, 0)));
1654 #ifdef CONSTANT_ALIGNMENT
1655 attrs.align = CONSTANT_ALIGNMENT (TREE_OPERAND (op0, 0),
1659 if (TREE_INT_CST_LOW (TREE_OPERAND (t, 1)) != 0)
1661 unsigned HOST_WIDE_INT ioff
1662 = TREE_INT_CST_LOW (TREE_OPERAND (t, 1));
1663 unsigned HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1664 attrs.align = MIN (aoff, attrs.align);
1668 /* ??? This isn't fully correct, we can't set the alignment from the
1669 type in all cases. */
1670 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1673 else if (TREE_CODE (t) == TARGET_MEM_REF)
1674 /* ??? This isn't fully correct, we can't set the alignment from the
1675 type in all cases. */
1676 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1678 /* If the size is known, we can set that. */
1679 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1681 attrs.size_known_p = true;
1682 attrs.size = tree_low_cst (TYPE_SIZE_UNIT (type), 1);
1685 /* If T is not a type, we may be able to deduce some more information about
1690 bool align_computed = false;
1692 if (TREE_THIS_VOLATILE (t))
1693 MEM_VOLATILE_P (ref) = 1;
1695 /* Now remove any conversions: they don't change what the underlying
1696 object is. Likewise for SAVE_EXPR. */
1697 while (CONVERT_EXPR_P (t)
1698 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1699 || TREE_CODE (t) == SAVE_EXPR)
1700 t = TREE_OPERAND (t, 0);
1702 /* Note whether this expression can trap. */
1703 MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
1705 base = get_base_address (t);
1709 && TREE_READONLY (base)
1710 && (TREE_STATIC (base) || DECL_EXTERNAL (base))
1711 && !TREE_THIS_VOLATILE (base))
1712 MEM_READONLY_P (ref) = 1;
1714 /* Mark static const strings readonly as well. */
1715 if (TREE_CODE (base) == STRING_CST
1716 && TREE_READONLY (base)
1717 && TREE_STATIC (base))
1718 MEM_READONLY_P (ref) = 1;
1720 if (TREE_CODE (base) == MEM_REF
1721 || TREE_CODE (base) == TARGET_MEM_REF)
1722 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
1725 as = TYPE_ADDR_SPACE (TREE_TYPE (base));
1728 as = TYPE_ADDR_SPACE (type);
1730 /* If this expression uses it's parent's alias set, mark it such
1731 that we won't change it. */
1732 if (component_uses_parent_alias_set (t))
1733 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1735 /* If this is a decl, set the attributes of the MEM from it. */
1739 attrs.offset_known_p = true;
1741 apply_bitpos = bitpos;
1742 if (DECL_SIZE_UNIT (t) && host_integerp (DECL_SIZE_UNIT (t), 1))
1744 attrs.size_known_p = true;
1745 attrs.size = tree_low_cst (DECL_SIZE_UNIT (t), 1);
1748 attrs.size_known_p = false;
1749 attrs.align = DECL_ALIGN (t);
1750 align_computed = true;
1753 /* If this is a constant, we know the alignment. */
1754 else if (CONSTANT_CLASS_P (t))
1756 attrs.align = TYPE_ALIGN (type);
1757 #ifdef CONSTANT_ALIGNMENT
1758 attrs.align = CONSTANT_ALIGNMENT (t, attrs.align);
1760 align_computed = true;
1763 /* If this is a field reference and not a bit-field, record it. */
1764 /* ??? There is some information that can be gleaned from bit-fields,
1765 such as the word offset in the structure that might be modified.
1766 But skip it for now. */
1767 else if (TREE_CODE (t) == COMPONENT_REF
1768 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1771 attrs.offset_known_p = true;
1773 apply_bitpos = bitpos;
1774 /* ??? Any reason the field size would be different than
1775 the size we got from the type? */
1778 /* If this is an array reference, look for an outer field reference. */
1779 else if (TREE_CODE (t) == ARRAY_REF)
1781 tree off_tree = size_zero_node;
1782 /* We can't modify t, because we use it at the end of the
1788 tree index = TREE_OPERAND (t2, 1);
1789 tree low_bound = array_ref_low_bound (t2);
1790 tree unit_size = array_ref_element_size (t2);
1792 /* We assume all arrays have sizes that are a multiple of a byte.
1793 First subtract the lower bound, if any, in the type of the
1794 index, then convert to sizetype and multiply by the size of
1795 the array element. */
1796 if (! integer_zerop (low_bound))
1797 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1800 off_tree = size_binop (PLUS_EXPR,
1801 size_binop (MULT_EXPR,
1802 fold_convert (sizetype,
1806 t2 = TREE_OPERAND (t2, 0);
1808 while (TREE_CODE (t2) == ARRAY_REF);
1813 attrs.offset_known_p = false;
1814 if (host_integerp (off_tree, 1))
1816 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1817 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1818 attrs.align = DECL_ALIGN (t2);
1819 if (aoff && (unsigned HOST_WIDE_INT) aoff < attrs.align)
1821 align_computed = true;
1822 attrs.offset_known_p = true;
1823 attrs.offset = ioff;
1824 apply_bitpos = bitpos;
1827 else if (TREE_CODE (t2) == COMPONENT_REF)
1830 attrs.offset_known_p = false;
1831 if (host_integerp (off_tree, 1))
1833 attrs.offset_known_p = true;
1834 attrs.offset = tree_low_cst (off_tree, 1);
1835 apply_bitpos = bitpos;
1837 /* ??? Any reason the field size would be different than
1838 the size we got from the type? */
1842 /* If this is an indirect reference, record it. */
1843 else if (TREE_CODE (t) == MEM_REF
1844 || TREE_CODE (t) == TARGET_MEM_REF)
1847 attrs.offset_known_p = true;
1849 apply_bitpos = bitpos;
1852 if (!align_computed)
1854 unsigned int obj_align = get_object_alignment (t);
1855 attrs.align = MAX (attrs.align, obj_align);
1859 as = TYPE_ADDR_SPACE (type);
1861 /* If we modified OFFSET based on T, then subtract the outstanding
1862 bit position offset. Similarly, increase the size of the accessed
1863 object to contain the negative offset. */
1866 gcc_assert (attrs.offset_known_p);
1867 attrs.offset -= apply_bitpos / BITS_PER_UNIT;
1868 if (attrs.size_known_p)
1869 attrs.size += apply_bitpos / BITS_PER_UNIT;
1872 /* Now set the attributes we computed above. */
1873 attrs.addrspace = as;
1874 set_mem_attrs (ref, &attrs);
1878 set_mem_attributes (rtx ref, tree t, int objectp)
1880 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1883 /* Set the alias set of MEM to SET. */
1886 set_mem_alias_set (rtx mem, alias_set_type set)
1888 struct mem_attrs attrs;
1890 /* If the new and old alias sets don't conflict, something is wrong. */
1891 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1892 attrs = *get_mem_attrs (mem);
1894 set_mem_attrs (mem, &attrs);
1897 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1900 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1902 struct mem_attrs attrs;
1904 attrs = *get_mem_attrs (mem);
1905 attrs.addrspace = addrspace;
1906 set_mem_attrs (mem, &attrs);
1909 /* Set the alignment of MEM to ALIGN bits. */
1912 set_mem_align (rtx mem, unsigned int align)
1914 struct mem_attrs attrs;
1916 attrs = *get_mem_attrs (mem);
1917 attrs.align = align;
1918 set_mem_attrs (mem, &attrs);
1921 /* Set the expr for MEM to EXPR. */
1924 set_mem_expr (rtx mem, tree expr)
1926 struct mem_attrs attrs;
1928 attrs = *get_mem_attrs (mem);
1930 set_mem_attrs (mem, &attrs);
1933 /* Set the offset of MEM to OFFSET. */
1936 set_mem_offset (rtx mem, HOST_WIDE_INT offset)
1938 struct mem_attrs attrs;
1940 attrs = *get_mem_attrs (mem);
1941 attrs.offset_known_p = true;
1942 attrs.offset = offset;
1943 set_mem_attrs (mem, &attrs);
1946 /* Clear the offset of MEM. */
1949 clear_mem_offset (rtx mem)
1951 struct mem_attrs attrs;
1953 attrs = *get_mem_attrs (mem);
1954 attrs.offset_known_p = false;
1955 set_mem_attrs (mem, &attrs);
1958 /* Set the size of MEM to SIZE. */
1961 set_mem_size (rtx mem, HOST_WIDE_INT size)
1963 struct mem_attrs attrs;
1965 attrs = *get_mem_attrs (mem);
1966 attrs.size_known_p = true;
1968 set_mem_attrs (mem, &attrs);
1971 /* Clear the size of MEM. */
1974 clear_mem_size (rtx mem)
1976 struct mem_attrs attrs;
1978 attrs = *get_mem_attrs (mem);
1979 attrs.size_known_p = false;
1980 set_mem_attrs (mem, &attrs);
1983 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1984 and its address changed to ADDR. (VOIDmode means don't change the mode.
1985 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1986 returned memory location is required to be valid. The memory
1987 attributes are not changed. */
1990 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1995 gcc_assert (MEM_P (memref));
1996 as = MEM_ADDR_SPACE (memref);
1997 if (mode == VOIDmode)
1998 mode = GET_MODE (memref);
2000 addr = XEXP (memref, 0);
2001 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
2002 && (!validate || memory_address_addr_space_p (mode, addr, as)))
2007 if (reload_in_progress || reload_completed)
2008 gcc_assert (memory_address_addr_space_p (mode, addr, as));
2010 addr = memory_address_addr_space (mode, addr, as);
2013 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2016 new_rtx = gen_rtx_MEM (mode, addr);
2017 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2021 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2022 way we are changing MEMREF, so we only preserve the alias set. */
2025 change_address (rtx memref, enum machine_mode mode, rtx addr)
2027 rtx new_rtx = change_address_1 (memref, mode, addr, 1);
2028 enum machine_mode mmode = GET_MODE (new_rtx);
2029 struct mem_attrs attrs, *defattrs;
2031 attrs = *get_mem_attrs (memref);
2032 defattrs = mode_mem_attrs[(int) mmode];
2033 attrs.expr = NULL_TREE;
2034 attrs.offset_known_p = false;
2035 attrs.size_known_p = defattrs->size_known_p;
2036 attrs.size = defattrs->size;
2037 attrs.align = defattrs->align;
2039 /* If there are no changes, just return the original memory reference. */
2040 if (new_rtx == memref)
2042 if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2045 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2046 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2049 set_mem_attrs (new_rtx, &attrs);
2053 /* Return a memory reference like MEMREF, but with its mode changed
2054 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2055 nonzero, the memory address is forced to be valid.
2056 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2057 and caller is responsible for adjusting MEMREF base register. */
2060 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2061 int validate, int adjust)
2063 rtx addr = XEXP (memref, 0);
2065 enum machine_mode address_mode;
2067 struct mem_attrs attrs, *defattrs;
2068 unsigned HOST_WIDE_INT max_align;
2070 attrs = *get_mem_attrs (memref);
2072 /* If there are no changes, just return the original memory reference. */
2073 if (mode == GET_MODE (memref) && !offset
2074 && (!validate || memory_address_addr_space_p (mode, addr,
2078 /* ??? Prefer to create garbage instead of creating shared rtl.
2079 This may happen even if offset is nonzero -- consider
2080 (plus (plus reg reg) const_int) -- so do this always. */
2081 addr = copy_rtx (addr);
2083 /* Convert a possibly large offset to a signed value within the
2084 range of the target address space. */
2085 address_mode = get_address_mode (memref);
2086 pbits = GET_MODE_BITSIZE (address_mode);
2087 if (HOST_BITS_PER_WIDE_INT > pbits)
2089 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2090 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2096 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2097 object, we can merge it into the LO_SUM. */
2098 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2100 && (unsigned HOST_WIDE_INT) offset
2101 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2102 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2103 plus_constant (address_mode,
2104 XEXP (addr, 1), offset));
2106 addr = plus_constant (address_mode, addr, offset);
2109 new_rtx = change_address_1 (memref, mode, addr, validate);
2111 /* If the address is a REG, change_address_1 rightfully returns memref,
2112 but this would destroy memref's MEM_ATTRS. */
2113 if (new_rtx == memref && offset != 0)
2114 new_rtx = copy_rtx (new_rtx);
2116 /* Compute the new values of the memory attributes due to this adjustment.
2117 We add the offsets and update the alignment. */
2118 if (attrs.offset_known_p)
2119 attrs.offset += offset;
2121 /* Compute the new alignment by taking the MIN of the alignment and the
2122 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2126 max_align = (offset & -offset) * BITS_PER_UNIT;
2127 attrs.align = MIN (attrs.align, max_align);
2130 /* We can compute the size in a number of ways. */
2131 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2132 if (defattrs->size_known_p)
2134 attrs.size_known_p = true;
2135 attrs.size = defattrs->size;
2137 else if (attrs.size_known_p)
2138 attrs.size -= offset;
2140 set_mem_attrs (new_rtx, &attrs);
2142 /* At some point, we should validate that this offset is within the object,
2143 if all the appropriate values are known. */
2147 /* Return a memory reference like MEMREF, but with its mode changed
2148 to MODE and its address changed to ADDR, which is assumed to be
2149 MEMREF offset by OFFSET bytes. If VALIDATE is
2150 nonzero, the memory address is forced to be valid. */
2153 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2154 HOST_WIDE_INT offset, int validate)
2156 memref = change_address_1 (memref, VOIDmode, addr, validate);
2157 return adjust_address_1 (memref, mode, offset, validate, 0);
2160 /* Return a memory reference like MEMREF, but whose address is changed by
2161 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2162 known to be in OFFSET (possibly 1). */
2165 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2167 rtx new_rtx, addr = XEXP (memref, 0);
2168 enum machine_mode address_mode;
2169 struct mem_attrs attrs, *defattrs;
2171 attrs = *get_mem_attrs (memref);
2172 address_mode = get_address_mode (memref);
2173 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2175 /* At this point we don't know _why_ the address is invalid. It
2176 could have secondary memory references, multiplies or anything.
2178 However, if we did go and rearrange things, we can wind up not
2179 being able to recognize the magic around pic_offset_table_rtx.
2180 This stuff is fragile, and is yet another example of why it is
2181 bad to expose PIC machinery too early. */
2182 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2184 && GET_CODE (addr) == PLUS
2185 && XEXP (addr, 0) == pic_offset_table_rtx)
2187 addr = force_reg (GET_MODE (addr), addr);
2188 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2191 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2192 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2194 /* If there are no changes, just return the original memory reference. */
2195 if (new_rtx == memref)
2198 /* Update the alignment to reflect the offset. Reset the offset, which
2200 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2201 attrs.offset_known_p = false;
2202 attrs.size_known_p = defattrs->size_known_p;
2203 attrs.size = defattrs->size;
2204 attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2205 set_mem_attrs (new_rtx, &attrs);
2209 /* Return a memory reference like MEMREF, but with its address changed to
2210 ADDR. The caller is asserting that the actual piece of memory pointed
2211 to is the same, just the form of the address is being changed, such as
2212 by putting something into a register. */
2215 replace_equiv_address (rtx memref, rtx addr)
2217 /* change_address_1 copies the memory attribute structure without change
2218 and that's exactly what we want here. */
2219 update_temp_slot_address (XEXP (memref, 0), addr);
2220 return change_address_1 (memref, VOIDmode, addr, 1);
2223 /* Likewise, but the reference is not required to be valid. */
2226 replace_equiv_address_nv (rtx memref, rtx addr)
2228 return change_address_1 (memref, VOIDmode, addr, 0);
2231 /* Return a memory reference like MEMREF, but with its mode widened to
2232 MODE and offset by OFFSET. This would be used by targets that e.g.
2233 cannot issue QImode memory operations and have to use SImode memory
2234 operations plus masking logic. */
2237 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2239 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2240 struct mem_attrs attrs;
2241 unsigned int size = GET_MODE_SIZE (mode);
2243 /* If there are no changes, just return the original memory reference. */
2244 if (new_rtx == memref)
2247 attrs = *get_mem_attrs (new_rtx);
2249 /* If we don't know what offset we were at within the expression, then
2250 we can't know if we've overstepped the bounds. */
2251 if (! attrs.offset_known_p)
2252 attrs.expr = NULL_TREE;
2256 if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2258 tree field = TREE_OPERAND (attrs.expr, 1);
2259 tree offset = component_ref_field_offset (attrs.expr);
2261 if (! DECL_SIZE_UNIT (field))
2263 attrs.expr = NULL_TREE;
2267 /* Is the field at least as large as the access? If so, ok,
2268 otherwise strip back to the containing structure. */
2269 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2270 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2271 && attrs.offset >= 0)
2274 if (! host_integerp (offset, 1))
2276 attrs.expr = NULL_TREE;
2280 attrs.expr = TREE_OPERAND (attrs.expr, 0);
2281 attrs.offset += tree_low_cst (offset, 1);
2282 attrs.offset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2285 /* Similarly for the decl. */
2286 else if (DECL_P (attrs.expr)
2287 && DECL_SIZE_UNIT (attrs.expr)
2288 && TREE_CODE (DECL_SIZE_UNIT (attrs.expr)) == INTEGER_CST
2289 && compare_tree_int (DECL_SIZE_UNIT (attrs.expr), size) >= 0
2290 && (! attrs.offset_known_p || attrs.offset >= 0))
2294 /* The widened memory access overflows the expression, which means
2295 that it could alias another expression. Zap it. */
2296 attrs.expr = NULL_TREE;
2302 attrs.offset_known_p = false;
2304 /* The widened memory may alias other stuff, so zap the alias set. */
2305 /* ??? Maybe use get_alias_set on any remaining expression. */
2307 attrs.size_known_p = true;
2309 set_mem_attrs (new_rtx, &attrs);
2313 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2314 static GTY(()) tree spill_slot_decl;
2317 get_spill_slot_decl (bool force_build_p)
2319 tree d = spill_slot_decl;
2321 struct mem_attrs attrs;
2323 if (d || !force_build_p)
2326 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2327 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2328 DECL_ARTIFICIAL (d) = 1;
2329 DECL_IGNORED_P (d) = 1;
2331 spill_slot_decl = d;
2333 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2334 MEM_NOTRAP_P (rd) = 1;
2335 attrs = *mode_mem_attrs[(int) BLKmode];
2336 attrs.alias = new_alias_set ();
2338 set_mem_attrs (rd, &attrs);
2339 SET_DECL_RTL (d, rd);
2344 /* Given MEM, a result from assign_stack_local, fill in the memory
2345 attributes as appropriate for a register allocator spill slot.
2346 These slots are not aliasable by other memory. We arrange for
2347 them all to use a single MEM_EXPR, so that the aliasing code can
2348 work properly in the case of shared spill slots. */
2351 set_mem_attrs_for_spill (rtx mem)
2353 struct mem_attrs attrs;
2356 attrs = *get_mem_attrs (mem);
2357 attrs.expr = get_spill_slot_decl (true);
2358 attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2359 attrs.addrspace = ADDR_SPACE_GENERIC;
2361 /* We expect the incoming memory to be of the form:
2362 (mem:MODE (plus (reg sfp) (const_int offset)))
2363 with perhaps the plus missing for offset = 0. */
2364 addr = XEXP (mem, 0);
2365 attrs.offset_known_p = true;
2367 if (GET_CODE (addr) == PLUS
2368 && CONST_INT_P (XEXP (addr, 1)))
2369 attrs.offset = INTVAL (XEXP (addr, 1));
2371 set_mem_attrs (mem, &attrs);
2372 MEM_NOTRAP_P (mem) = 1;
2375 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2378 gen_label_rtx (void)
2380 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2381 NULL, label_num++, NULL);
2384 /* For procedure integration. */
2386 /* Install new pointers to the first and last insns in the chain.
2387 Also, set cur_insn_uid to one higher than the last in use.
2388 Used for an inline-procedure after copying the insn chain. */
2391 set_new_first_and_last_insn (rtx first, rtx last)
2395 set_first_insn (first);
2396 set_last_insn (last);
2399 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2401 int debug_count = 0;
2403 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2404 cur_debug_insn_uid = 0;
2406 for (insn = first; insn; insn = NEXT_INSN (insn))
2407 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2408 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2411 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2412 if (DEBUG_INSN_P (insn))
2417 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2419 cur_debug_insn_uid++;
2422 for (insn = first; insn; insn = NEXT_INSN (insn))
2423 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2428 /* Go through all the RTL insn bodies and copy any invalid shared
2429 structure. This routine should only be called once. */
2432 unshare_all_rtl_1 (rtx insn)
2434 /* Unshare just about everything else. */
2435 unshare_all_rtl_in_chain (insn);
2437 /* Make sure the addresses of stack slots found outside the insn chain
2438 (such as, in DECL_RTL of a variable) are not shared
2439 with the insn chain.
2441 This special care is necessary when the stack slot MEM does not
2442 actually appear in the insn chain. If it does appear, its address
2443 is unshared from all else at that point. */
2444 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2447 /* Go through all the RTL insn bodies and copy any invalid shared
2448 structure, again. This is a fairly expensive thing to do so it
2449 should be done sparingly. */
2452 unshare_all_rtl_again (rtx insn)
2457 for (p = insn; p; p = NEXT_INSN (p))
2460 reset_used_flags (PATTERN (p));
2461 reset_used_flags (REG_NOTES (p));
2463 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2466 /* Make sure that virtual stack slots are not shared. */
2467 set_used_decls (DECL_INITIAL (cfun->decl));
2469 /* Make sure that virtual parameters are not shared. */
2470 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2471 set_used_flags (DECL_RTL (decl));
2473 reset_used_flags (stack_slot_list);
2475 unshare_all_rtl_1 (insn);
2479 unshare_all_rtl (void)
2481 unshare_all_rtl_1 (get_insns ());
2486 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2487 Recursively does the same for subexpressions. */
2490 verify_rtx_sharing (rtx orig, rtx insn)
2495 const char *format_ptr;
2500 code = GET_CODE (x);
2502 /* These types may be freely shared. */
2522 /* SCRATCH must be shared because they represent distinct values. */
2524 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2529 if (shared_const_p (orig))
2534 /* A MEM is allowed to be shared if its address is constant. */
2535 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2536 || reload_completed || reload_in_progress)
2545 /* This rtx may not be shared. If it has already been seen,
2546 replace it with a copy of itself. */
2547 #ifdef ENABLE_CHECKING
2548 if (RTX_FLAG (x, used))
2550 error ("invalid rtl sharing found in the insn");
2552 error ("shared rtx");
2554 internal_error ("internal consistency failure");
2557 gcc_assert (!RTX_FLAG (x, used));
2559 RTX_FLAG (x, used) = 1;
2561 /* Now scan the subexpressions recursively. */
2563 format_ptr = GET_RTX_FORMAT (code);
2565 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2567 switch (*format_ptr++)
2570 verify_rtx_sharing (XEXP (x, i), insn);
2574 if (XVEC (x, i) != NULL)
2577 int len = XVECLEN (x, i);
2579 for (j = 0; j < len; j++)
2581 /* We allow sharing of ASM_OPERANDS inside single
2583 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2584 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2586 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2588 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2597 /* Go through all the RTL insn bodies and check that there is no unexpected
2598 sharing in between the subexpressions. */
2601 verify_rtl_sharing (void)
2605 timevar_push (TV_VERIFY_RTL_SHARING);
2607 for (p = get_insns (); p; p = NEXT_INSN (p))
2610 reset_used_flags (PATTERN (p));
2611 reset_used_flags (REG_NOTES (p));
2613 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2614 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2617 rtx q, sequence = PATTERN (p);
2619 for (i = 0; i < XVECLEN (sequence, 0); i++)
2621 q = XVECEXP (sequence, 0, i);
2622 gcc_assert (INSN_P (q));
2623 reset_used_flags (PATTERN (q));
2624 reset_used_flags (REG_NOTES (q));
2626 reset_used_flags (CALL_INSN_FUNCTION_USAGE (q));
2631 for (p = get_insns (); p; p = NEXT_INSN (p))
2634 verify_rtx_sharing (PATTERN (p), p);
2635 verify_rtx_sharing (REG_NOTES (p), p);
2637 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (p), p);
2640 timevar_pop (TV_VERIFY_RTL_SHARING);
2643 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2644 Assumes the mark bits are cleared at entry. */
2647 unshare_all_rtl_in_chain (rtx insn)
2649 for (; insn; insn = NEXT_INSN (insn))
2652 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2653 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2655 CALL_INSN_FUNCTION_USAGE (insn)
2656 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
2660 /* Go through all virtual stack slots of a function and mark them as
2661 shared. We never replace the DECL_RTLs themselves with a copy,
2662 but expressions mentioned into a DECL_RTL cannot be shared with
2663 expressions in the instruction stream.
2665 Note that reload may convert pseudo registers into memories in-place.
2666 Pseudo registers are always shared, but MEMs never are. Thus if we
2667 reset the used flags on MEMs in the instruction stream, we must set
2668 them again on MEMs that appear in DECL_RTLs. */
2671 set_used_decls (tree blk)
2676 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2677 if (DECL_RTL_SET_P (t))
2678 set_used_flags (DECL_RTL (t));
2680 /* Now process sub-blocks. */
2681 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2685 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2686 Recursively does the same for subexpressions. Uses
2687 copy_rtx_if_shared_1 to reduce stack space. */
2690 copy_rtx_if_shared (rtx orig)
2692 copy_rtx_if_shared_1 (&orig);
2696 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2697 use. Recursively does the same for subexpressions. */
2700 copy_rtx_if_shared_1 (rtx *orig1)
2706 const char *format_ptr;
2710 /* Repeat is used to turn tail-recursion into iteration. */
2717 code = GET_CODE (x);
2719 /* These types may be freely shared. */
2738 /* SCRATCH must be shared because they represent distinct values. */
2741 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2746 if (shared_const_p (x))
2756 /* The chain of insns is not being copied. */
2763 /* This rtx may not be shared. If it has already been seen,
2764 replace it with a copy of itself. */
2766 if (RTX_FLAG (x, used))
2768 x = shallow_copy_rtx (x);
2771 RTX_FLAG (x, used) = 1;
2773 /* Now scan the subexpressions recursively.
2774 We can store any replaced subexpressions directly into X
2775 since we know X is not shared! Any vectors in X
2776 must be copied if X was copied. */
2778 format_ptr = GET_RTX_FORMAT (code);
2779 length = GET_RTX_LENGTH (code);
2782 for (i = 0; i < length; i++)
2784 switch (*format_ptr++)
2788 copy_rtx_if_shared_1 (last_ptr);
2789 last_ptr = &XEXP (x, i);
2793 if (XVEC (x, i) != NULL)
2796 int len = XVECLEN (x, i);
2798 /* Copy the vector iff I copied the rtx and the length
2800 if (copied && len > 0)
2801 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2803 /* Call recursively on all inside the vector. */
2804 for (j = 0; j < len; j++)
2807 copy_rtx_if_shared_1 (last_ptr);
2808 last_ptr = &XVECEXP (x, i, j);
2823 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2826 mark_used_flags (rtx x, int flag)
2830 const char *format_ptr;
2833 /* Repeat is used to turn tail-recursion into iteration. */
2838 code = GET_CODE (x);
2840 /* These types may be freely shared so we needn't do any resetting
2867 /* The chain of insns is not being copied. */
2874 RTX_FLAG (x, used) = flag;
2876 format_ptr = GET_RTX_FORMAT (code);
2877 length = GET_RTX_LENGTH (code);
2879 for (i = 0; i < length; i++)
2881 switch (*format_ptr++)
2889 mark_used_flags (XEXP (x, i), flag);
2893 for (j = 0; j < XVECLEN (x, i); j++)
2894 mark_used_flags (XVECEXP (x, i, j), flag);
2900 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2901 to look for shared sub-parts. */
2904 reset_used_flags (rtx x)
2906 mark_used_flags (x, 0);
2909 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2910 to look for shared sub-parts. */
2913 set_used_flags (rtx x)
2915 mark_used_flags (x, 1);
2918 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2919 Return X or the rtx for the pseudo reg the value of X was copied into.
2920 OTHER must be valid as a SET_DEST. */
2923 make_safe_from (rtx x, rtx other)
2926 switch (GET_CODE (other))
2929 other = SUBREG_REG (other);
2931 case STRICT_LOW_PART:
2934 other = XEXP (other, 0);
2943 && GET_CODE (x) != SUBREG)
2945 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2946 || reg_mentioned_p (other, x))))
2948 rtx temp = gen_reg_rtx (GET_MODE (x));
2949 emit_move_insn (temp, x);
2955 /* Emission of insns (adding them to the doubly-linked list). */
2957 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2960 get_last_insn_anywhere (void)
2962 struct sequence_stack *stack;
2963 if (get_last_insn ())
2964 return get_last_insn ();
2965 for (stack = seq_stack; stack; stack = stack->next)
2966 if (stack->last != 0)
2971 /* Return the first nonnote insn emitted in current sequence or current
2972 function. This routine looks inside SEQUENCEs. */
2975 get_first_nonnote_insn (void)
2977 rtx insn = get_insns ();
2982 for (insn = next_insn (insn);
2983 insn && NOTE_P (insn);
2984 insn = next_insn (insn))
2988 if (NONJUMP_INSN_P (insn)
2989 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2990 insn = XVECEXP (PATTERN (insn), 0, 0);
2997 /* Return the last nonnote insn emitted in current sequence or current
2998 function. This routine looks inside SEQUENCEs. */
3001 get_last_nonnote_insn (void)
3003 rtx insn = get_last_insn ();
3008 for (insn = previous_insn (insn);
3009 insn && NOTE_P (insn);
3010 insn = previous_insn (insn))
3014 if (NONJUMP_INSN_P (insn)
3015 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3016 insn = XVECEXP (PATTERN (insn), 0,
3017 XVECLEN (PATTERN (insn), 0) - 1);
3024 /* Return the number of actual (non-debug) insns emitted in this
3028 get_max_insn_count (void)
3030 int n = cur_insn_uid;
3032 /* The table size must be stable across -g, to avoid codegen
3033 differences due to debug insns, and not be affected by
3034 -fmin-insn-uid, to avoid excessive table size and to simplify
3035 debugging of -fcompare-debug failures. */
3036 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3037 n -= cur_debug_insn_uid;
3039 n -= MIN_NONDEBUG_INSN_UID;
3045 /* Return the next insn. If it is a SEQUENCE, return the first insn
3049 next_insn (rtx insn)
3053 insn = NEXT_INSN (insn);
3054 if (insn && NONJUMP_INSN_P (insn)
3055 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3056 insn = XVECEXP (PATTERN (insn), 0, 0);
3062 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3066 previous_insn (rtx insn)
3070 insn = PREV_INSN (insn);
3071 if (insn && NONJUMP_INSN_P (insn)
3072 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3073 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3079 /* Return the next insn after INSN that is not a NOTE. This routine does not
3080 look inside SEQUENCEs. */
3083 next_nonnote_insn (rtx insn)
3087 insn = NEXT_INSN (insn);
3088 if (insn == 0 || !NOTE_P (insn))
3095 /* Return the next insn after INSN that is not a NOTE, but stop the
3096 search before we enter another basic block. This routine does not
3097 look inside SEQUENCEs. */
3100 next_nonnote_insn_bb (rtx insn)
3104 insn = NEXT_INSN (insn);
3105 if (insn == 0 || !NOTE_P (insn))
3107 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3114 /* Return the previous insn before INSN that is not a NOTE. This routine does
3115 not look inside SEQUENCEs. */
3118 prev_nonnote_insn (rtx insn)
3122 insn = PREV_INSN (insn);
3123 if (insn == 0 || !NOTE_P (insn))
3130 /* Return the previous insn before INSN that is not a NOTE, but stop
3131 the search before we enter another basic block. This routine does
3132 not look inside SEQUENCEs. */
3135 prev_nonnote_insn_bb (rtx insn)
3139 insn = PREV_INSN (insn);
3140 if (insn == 0 || !NOTE_P (insn))
3142 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3149 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3150 routine does not look inside SEQUENCEs. */
3153 next_nondebug_insn (rtx insn)
3157 insn = NEXT_INSN (insn);
3158 if (insn == 0 || !DEBUG_INSN_P (insn))
3165 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3166 This routine does not look inside SEQUENCEs. */
3169 prev_nondebug_insn (rtx insn)
3173 insn = PREV_INSN (insn);
3174 if (insn == 0 || !DEBUG_INSN_P (insn))
3181 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3182 This routine does not look inside SEQUENCEs. */
3185 next_nonnote_nondebug_insn (rtx insn)
3189 insn = NEXT_INSN (insn);
3190 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3197 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3198 This routine does not look inside SEQUENCEs. */
3201 prev_nonnote_nondebug_insn (rtx insn)
3205 insn = PREV_INSN (insn);
3206 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3213 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3214 or 0, if there is none. This routine does not look inside
3218 next_real_insn (rtx insn)
3222 insn = NEXT_INSN (insn);
3223 if (insn == 0 || INSN_P (insn))
3230 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3231 or 0, if there is none. This routine does not look inside
3235 prev_real_insn (rtx insn)
3239 insn = PREV_INSN (insn);
3240 if (insn == 0 || INSN_P (insn))
3247 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3248 This routine does not look inside SEQUENCEs. */
3251 last_call_insn (void)
3255 for (insn = get_last_insn ();
3256 insn && !CALL_P (insn);
3257 insn = PREV_INSN (insn))
3263 /* Find the next insn after INSN that really does something. This routine
3264 does not look inside SEQUENCEs. After reload this also skips over
3265 standalone USE and CLOBBER insn. */
3268 active_insn_p (const_rtx insn)
3270 return (CALL_P (insn) || JUMP_P (insn)
3271 || (NONJUMP_INSN_P (insn)
3272 && (! reload_completed
3273 || (GET_CODE (PATTERN (insn)) != USE
3274 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3278 next_active_insn (rtx insn)
3282 insn = NEXT_INSN (insn);
3283 if (insn == 0 || active_insn_p (insn))
3290 /* Find the last insn before INSN that really does something. This routine
3291 does not look inside SEQUENCEs. After reload this also skips over
3292 standalone USE and CLOBBER insn. */
3295 prev_active_insn (rtx insn)
3299 insn = PREV_INSN (insn);
3300 if (insn == 0 || active_insn_p (insn))
3307 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3310 next_label (rtx insn)
3314 insn = NEXT_INSN (insn);
3315 if (insn == 0 || LABEL_P (insn))
3322 /* Return the last label to mark the same position as LABEL. Return LABEL
3323 itself if it is null or any return rtx. */
3326 skip_consecutive_labels (rtx label)
3330 if (label && ANY_RETURN_P (label))
3333 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3341 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3342 and REG_CC_USER notes so we can find it. */
3345 link_cc0_insns (rtx insn)
3347 rtx user = next_nonnote_insn (insn);
3349 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3350 user = XVECEXP (PATTERN (user), 0, 0);
3352 add_reg_note (user, REG_CC_SETTER, insn);
3353 add_reg_note (insn, REG_CC_USER, user);
3356 /* Return the next insn that uses CC0 after INSN, which is assumed to
3357 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3358 applied to the result of this function should yield INSN).
3360 Normally, this is simply the next insn. However, if a REG_CC_USER note
3361 is present, it contains the insn that uses CC0.
3363 Return 0 if we can't find the insn. */
3366 next_cc0_user (rtx insn)
3368 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3371 return XEXP (note, 0);
3373 insn = next_nonnote_insn (insn);
3374 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3375 insn = XVECEXP (PATTERN (insn), 0, 0);
3377 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3383 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3384 note, it is the previous insn. */
3387 prev_cc0_setter (rtx insn)
3389 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3392 return XEXP (note, 0);
3394 insn = prev_nonnote_insn (insn);
3395 gcc_assert (sets_cc0_p (PATTERN (insn)));
3402 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3405 find_auto_inc (rtx *xp, void *data)
3408 rtx reg = (rtx) data;
3410 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3413 switch (GET_CODE (x))
3421 if (rtx_equal_p (reg, XEXP (x, 0)))
3432 /* Increment the label uses for all labels present in rtx. */
3435 mark_label_nuses (rtx x)
3441 code = GET_CODE (x);
3442 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3443 LABEL_NUSES (XEXP (x, 0))++;
3445 fmt = GET_RTX_FORMAT (code);
3446 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3449 mark_label_nuses (XEXP (x, i));
3450 else if (fmt[i] == 'E')
3451 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3452 mark_label_nuses (XVECEXP (x, i, j));
3457 /* Try splitting insns that can be split for better scheduling.
3458 PAT is the pattern which might split.
3459 TRIAL is the insn providing PAT.
3460 LAST is nonzero if we should return the last insn of the sequence produced.
3462 If this routine succeeds in splitting, it returns the first or last
3463 replacement insn depending on the value of LAST. Otherwise, it
3464 returns TRIAL. If the insn to be returned can be split, it will be. */
3467 try_split (rtx pat, rtx trial, int last)
3469 rtx before = PREV_INSN (trial);
3470 rtx after = NEXT_INSN (trial);
3471 int has_barrier = 0;
3474 rtx insn_last, insn;
3477 /* We're not good at redistributing frame information. */
3478 if (RTX_FRAME_RELATED_P (trial))
3481 if (any_condjump_p (trial)
3482 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3483 split_branch_probability = INTVAL (XEXP (note, 0));
3484 probability = split_branch_probability;
3486 seq = split_insns (pat, trial);
3488 split_branch_probability = -1;
3490 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3491 We may need to handle this specially. */
3492 if (after && BARRIER_P (after))
3495 after = NEXT_INSN (after);
3501 /* Avoid infinite loop if any insn of the result matches
3502 the original pattern. */
3506 if (INSN_P (insn_last)
3507 && rtx_equal_p (PATTERN (insn_last), pat))
3509 if (!NEXT_INSN (insn_last))
3511 insn_last = NEXT_INSN (insn_last);
3514 /* We will be adding the new sequence to the function. The splitters
3515 may have introduced invalid RTL sharing, so unshare the sequence now. */
3516 unshare_all_rtl_in_chain (seq);
3519 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3523 mark_jump_label (PATTERN (insn), insn, 0);
3525 if (probability != -1
3526 && any_condjump_p (insn)
3527 && !find_reg_note (insn, REG_BR_PROB, 0))
3529 /* We can preserve the REG_BR_PROB notes only if exactly
3530 one jump is created, otherwise the machine description
3531 is responsible for this step using
3532 split_branch_probability variable. */
3533 gcc_assert (njumps == 1);
3534 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3539 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3540 in SEQ and copy any additional information across. */
3543 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3548 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3549 target may have explicitly specified. */
3550 p = &CALL_INSN_FUNCTION_USAGE (insn);
3553 *p = CALL_INSN_FUNCTION_USAGE (trial);
3555 /* If the old call was a sibling call, the new one must
3557 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3559 /* If the new call is the last instruction in the sequence,
3560 it will effectively replace the old call in-situ. Otherwise
3561 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3562 so that it comes immediately after the new call. */
3563 if (NEXT_INSN (insn))
3564 for (next = NEXT_INSN (trial);
3565 next && NOTE_P (next);
3566 next = NEXT_INSN (next))
3567 if (NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
3570 add_insn_after (next, insn, NULL);
3576 /* Copy notes, particularly those related to the CFG. */
3577 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3579 switch (REG_NOTE_KIND (note))
3582 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3588 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3591 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3595 case REG_NON_LOCAL_GOTO:
3596 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3599 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3605 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3607 rtx reg = XEXP (note, 0);
3608 if (!FIND_REG_INC_NOTE (insn, reg)
3609 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3610 add_reg_note (insn, REG_INC, reg);
3616 fixup_args_size_notes (NULL_RTX, insn_last, INTVAL (XEXP (note, 0)));
3624 /* If there are LABELS inside the split insns increment the
3625 usage count so we don't delete the label. */
3629 while (insn != NULL_RTX)
3631 /* JUMP_P insns have already been "marked" above. */
3632 if (NONJUMP_INSN_P (insn))
3633 mark_label_nuses (PATTERN (insn));
3635 insn = PREV_INSN (insn);
3639 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3641 delete_insn (trial);
3643 emit_barrier_after (tem);
3645 /* Recursively call try_split for each new insn created; by the
3646 time control returns here that insn will be fully split, so
3647 set LAST and continue from the insn after the one returned.
3648 We can't use next_active_insn here since AFTER may be a note.
3649 Ignore deleted insns, which can be occur if not optimizing. */
3650 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3651 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3652 tem = try_split (PATTERN (tem), tem, 1);
3654 /* Return either the first or the last insn, depending on which was
3657 ? (after ? PREV_INSN (after) : get_last_insn ())
3658 : NEXT_INSN (before);
3661 /* Make and return an INSN rtx, initializing all its slots.
3662 Store PATTERN in the pattern slots. */
3665 make_insn_raw (rtx pattern)
3669 insn = rtx_alloc (INSN);
3671 INSN_UID (insn) = cur_insn_uid++;
3672 PATTERN (insn) = pattern;
3673 INSN_CODE (insn) = -1;
3674 REG_NOTES (insn) = NULL;
3675 INSN_LOCATOR (insn) = curr_insn_locator ();
3676 BLOCK_FOR_INSN (insn) = NULL;
3678 #ifdef ENABLE_RTL_CHECKING
3681 && (returnjump_p (insn)
3682 || (GET_CODE (insn) == SET
3683 && SET_DEST (insn) == pc_rtx)))
3685 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3693 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3696 make_debug_insn_raw (rtx pattern)
3700 insn = rtx_alloc (DEBUG_INSN);
3701 INSN_UID (insn) = cur_debug_insn_uid++;
3702 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3703 INSN_UID (insn) = cur_insn_uid++;
3705 PATTERN (insn) = pattern;
3706 INSN_CODE (insn) = -1;
3707 REG_NOTES (insn) = NULL;
3708 INSN_LOCATOR (insn) = curr_insn_locator ();
3709 BLOCK_FOR_INSN (insn) = NULL;
3714 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3717 make_jump_insn_raw (rtx pattern)
3721 insn = rtx_alloc (JUMP_INSN);
3722 INSN_UID (insn) = cur_insn_uid++;
3724 PATTERN (insn) = pattern;
3725 INSN_CODE (insn) = -1;
3726 REG_NOTES (insn) = NULL;
3727 JUMP_LABEL (insn) = NULL;
3728 INSN_LOCATOR (insn) = curr_insn_locator ();
3729 BLOCK_FOR_INSN (insn) = NULL;
3734 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3737 make_call_insn_raw (rtx pattern)
3741 insn = rtx_alloc (CALL_INSN);
3742 INSN_UID (insn) = cur_insn_uid++;
3744 PATTERN (insn) = pattern;
3745 INSN_CODE (insn) = -1;
3746 REG_NOTES (insn) = NULL;
3747 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3748 INSN_LOCATOR (insn) = curr_insn_locator ();
3749 BLOCK_FOR_INSN (insn) = NULL;
3754 /* Add INSN to the end of the doubly-linked list.
3755 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3760 PREV_INSN (insn) = get_last_insn();
3761 NEXT_INSN (insn) = 0;
3763 if (NULL != get_last_insn())
3764 NEXT_INSN (get_last_insn ()) = insn;
3766 if (NULL == get_insns ())
3767 set_first_insn (insn);
3769 set_last_insn (insn);
3772 /* Add INSN into the doubly-linked list after insn AFTER. This and
3773 the next should be the only functions called to insert an insn once
3774 delay slots have been filled since only they know how to update a
3778 add_insn_after (rtx insn, rtx after, basic_block bb)
3780 rtx next = NEXT_INSN (after);
3782 gcc_assert (!optimize || !INSN_DELETED_P (after));
3784 NEXT_INSN (insn) = next;
3785 PREV_INSN (insn) = after;
3789 PREV_INSN (next) = insn;
3790 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3791 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3793 else if (get_last_insn () == after)
3794 set_last_insn (insn);
3797 struct sequence_stack *stack = seq_stack;
3798 /* Scan all pending sequences too. */
3799 for (; stack; stack = stack->next)
3800 if (after == stack->last)
3809 if (!BARRIER_P (after)
3810 && !BARRIER_P (insn)
3811 && (bb = BLOCK_FOR_INSN (after)))
3813 set_block_for_insn (insn, bb);
3815 df_insn_rescan (insn);
3816 /* Should not happen as first in the BB is always
3817 either NOTE or LABEL. */
3818 if (BB_END (bb) == after
3819 /* Avoid clobbering of structure when creating new BB. */
3820 && !BARRIER_P (insn)
3821 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3825 NEXT_INSN (after) = insn;
3826 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3828 rtx sequence = PATTERN (after);
3829 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3833 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3834 the previous should be the only functions called to insert an insn
3835 once delay slots have been filled since only they know how to
3836 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3840 add_insn_before (rtx insn, rtx before, basic_block bb)
3842 rtx prev = PREV_INSN (before);
3844 gcc_assert (!optimize || !INSN_DELETED_P (before));
3846 PREV_INSN (insn) = prev;
3847 NEXT_INSN (insn) = before;
3851 NEXT_INSN (prev) = insn;
3852 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3854 rtx sequence = PATTERN (prev);
3855 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3858 else if (get_insns () == before)
3859 set_first_insn (insn);
3862 struct sequence_stack *stack = seq_stack;
3863 /* Scan all pending sequences too. */
3864 for (; stack; stack = stack->next)
3865 if (before == stack->first)
3867 stack->first = insn;
3875 && !BARRIER_P (before)
3876 && !BARRIER_P (insn))
3877 bb = BLOCK_FOR_INSN (before);
3881 set_block_for_insn (insn, bb);
3883 df_insn_rescan (insn);
3884 /* Should not happen as first in the BB is always either NOTE or
3886 gcc_assert (BB_HEAD (bb) != insn
3887 /* Avoid clobbering of structure when creating new BB. */
3889 || NOTE_INSN_BASIC_BLOCK_P (insn));
3892 PREV_INSN (before) = insn;
3893 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3894 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3898 /* Replace insn with an deleted instruction note. */
3901 set_insn_deleted (rtx insn)
3903 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3904 PUT_CODE (insn, NOTE);
3905 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3909 /* Remove an insn from its doubly-linked list. This function knows how
3910 to handle sequences. */
3912 remove_insn (rtx insn)
3914 rtx next = NEXT_INSN (insn);
3915 rtx prev = PREV_INSN (insn);
3918 /* Later in the code, the block will be marked dirty. */
3919 df_insn_delete (NULL, INSN_UID (insn));
3923 NEXT_INSN (prev) = next;
3924 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3926 rtx sequence = PATTERN (prev);
3927 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3930 else if (get_insns () == insn)
3933 PREV_INSN (next) = NULL;
3934 set_first_insn (next);
3938 struct sequence_stack *stack = seq_stack;
3939 /* Scan all pending sequences too. */
3940 for (; stack; stack = stack->next)
3941 if (insn == stack->first)
3943 stack->first = next;
3952 PREV_INSN (next) = prev;
3953 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3954 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3956 else if (get_last_insn () == insn)
3957 set_last_insn (prev);
3960 struct sequence_stack *stack = seq_stack;
3961 /* Scan all pending sequences too. */
3962 for (; stack; stack = stack->next)
3963 if (insn == stack->last)
3971 if (!BARRIER_P (insn)
3972 && (bb = BLOCK_FOR_INSN (insn)))
3974 if (NONDEBUG_INSN_P (insn))
3975 df_set_bb_dirty (bb);
3976 if (BB_HEAD (bb) == insn)
3978 /* Never ever delete the basic block note without deleting whole
3980 gcc_assert (!NOTE_P (insn));
3981 BB_HEAD (bb) = next;
3983 if (BB_END (bb) == insn)
3988 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3991 add_function_usage_to (rtx call_insn, rtx call_fusage)
3993 gcc_assert (call_insn && CALL_P (call_insn));
3995 /* Put the register usage information on the CALL. If there is already
3996 some usage information, put ours at the end. */
3997 if (CALL_INSN_FUNCTION_USAGE (call_insn))
4001 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
4002 link = XEXP (link, 1))
4005 XEXP (link, 1) = call_fusage;
4008 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4011 /* Delete all insns made since FROM.
4012 FROM becomes the new last instruction. */
4015 delete_insns_since (rtx from)
4020 NEXT_INSN (from) = 0;
4021 set_last_insn (from);
4024 /* This function is deprecated, please use sequences instead.
4026 Move a consecutive bunch of insns to a different place in the chain.
4027 The insns to be moved are those between FROM and TO.
4028 They are moved to a new position after the insn AFTER.
4029 AFTER must not be FROM or TO or any insn in between.
4031 This function does not know about SEQUENCEs and hence should not be
4032 called after delay-slot filling has been done. */
4035 reorder_insns_nobb (rtx from, rtx to, rtx after)
4037 #ifdef ENABLE_CHECKING
4039 for (x = from; x != to; x = NEXT_INSN (x))
4040 gcc_assert (after != x);
4041 gcc_assert (after != to);
4044 /* Splice this bunch out of where it is now. */
4045 if (PREV_INSN (from))
4046 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4048 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4049 if (get_last_insn () == to)
4050 set_last_insn (PREV_INSN (from));
4051 if (get_insns () == from)
4052 set_first_insn (NEXT_INSN (to));
4054 /* Make the new neighbors point to it and it to them. */
4055 if (NEXT_INSN (after))
4056 PREV_INSN (NEXT_INSN (after)) = to;
4058 NEXT_INSN (to) = NEXT_INSN (after);
4059 PREV_INSN (from) = after;
4060 NEXT_INSN (after) = from;
4061 if (after == get_last_insn())
4065 /* Same as function above, but take care to update BB boundaries. */
4067 reorder_insns (rtx from, rtx to, rtx after)
4069 rtx prev = PREV_INSN (from);
4070 basic_block bb, bb2;
4072 reorder_insns_nobb (from, to, after);
4074 if (!BARRIER_P (after)
4075 && (bb = BLOCK_FOR_INSN (after)))
4078 df_set_bb_dirty (bb);
4080 if (!BARRIER_P (from)
4081 && (bb2 = BLOCK_FOR_INSN (from)))
4083 if (BB_END (bb2) == to)
4084 BB_END (bb2) = prev;
4085 df_set_bb_dirty (bb2);
4088 if (BB_END (bb) == after)
4091 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4093 df_insn_change_bb (x, bb);
4098 /* Emit insn(s) of given code and pattern
4099 at a specified place within the doubly-linked list.
4101 All of the emit_foo global entry points accept an object
4102 X which is either an insn list or a PATTERN of a single
4105 There are thus a few canonical ways to generate code and
4106 emit it at a specific place in the instruction stream. For
4107 example, consider the instruction named SPOT and the fact that
4108 we would like to emit some instructions before SPOT. We might
4112 ... emit the new instructions ...
4113 insns_head = get_insns ();
4116 emit_insn_before (insns_head, SPOT);
4118 It used to be common to generate SEQUENCE rtl instead, but that
4119 is a relic of the past which no longer occurs. The reason is that
4120 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4121 generated would almost certainly die right after it was created. */
4124 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
4125 rtx (*make_raw) (rtx))
4129 gcc_assert (before);
4134 switch (GET_CODE (x))
4146 rtx next = NEXT_INSN (insn);
4147 add_insn_before (insn, before, bb);
4153 #ifdef ENABLE_RTL_CHECKING
4160 last = (*make_raw) (x);
4161 add_insn_before (last, before, bb);
4168 /* Make X be output before the instruction BEFORE. */
4171 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4173 return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4176 /* Make an instruction with body X and code JUMP_INSN
4177 and output it before the instruction BEFORE. */
4180 emit_jump_insn_before_noloc (rtx x, rtx before)
4182 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4183 make_jump_insn_raw);
4186 /* Make an instruction with body X and code CALL_INSN
4187 and output it before the instruction BEFORE. */
4190 emit_call_insn_before_noloc (rtx x, rtx before)
4192 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4193 make_call_insn_raw);
4196 /* Make an instruction with body X and code DEBUG_INSN
4197 and output it before the instruction BEFORE. */
4200 emit_debug_insn_before_noloc (rtx x, rtx before)
4202 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4203 make_debug_insn_raw);
4206 /* Make an insn of code BARRIER
4207 and output it before the insn BEFORE. */
4210 emit_barrier_before (rtx before)
4212 rtx insn = rtx_alloc (BARRIER);
4214 INSN_UID (insn) = cur_insn_uid++;
4216 add_insn_before (insn, before, NULL);
4220 /* Emit the label LABEL before the insn BEFORE. */
4223 emit_label_before (rtx label, rtx before)
4225 /* This can be called twice for the same label as a result of the
4226 confusion that follows a syntax error! So make it harmless. */
4227 if (INSN_UID (label) == 0)
4229 INSN_UID (label) = cur_insn_uid++;
4230 add_insn_before (label, before, NULL);
4236 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4239 emit_note_before (enum insn_note subtype, rtx before)
4241 rtx note = rtx_alloc (NOTE);
4242 INSN_UID (note) = cur_insn_uid++;
4243 NOTE_KIND (note) = subtype;
4244 BLOCK_FOR_INSN (note) = NULL;
4245 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4247 add_insn_before (note, before, NULL);
4251 /* Helper for emit_insn_after, handles lists of instructions
4255 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4259 if (!bb && !BARRIER_P (after))
4260 bb = BLOCK_FOR_INSN (after);
4264 df_set_bb_dirty (bb);
4265 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4266 if (!BARRIER_P (last))
4268 set_block_for_insn (last, bb);
4269 df_insn_rescan (last);
4271 if (!BARRIER_P (last))
4273 set_block_for_insn (last, bb);
4274 df_insn_rescan (last);
4276 if (BB_END (bb) == after)
4280 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4283 after_after = NEXT_INSN (after);
4285 NEXT_INSN (after) = first;
4286 PREV_INSN (first) = after;
4287 NEXT_INSN (last) = after_after;
4289 PREV_INSN (after_after) = last;
4291 if (after == get_last_insn())
4292 set_last_insn (last);
4298 emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
4299 rtx (*make_raw)(rtx))
4308 switch (GET_CODE (x))
4317 last = emit_insn_after_1 (x, after, bb);
4320 #ifdef ENABLE_RTL_CHECKING
4327 last = (*make_raw) (x);
4328 add_insn_after (last, after, bb);
4335 /* Make X be output after the insn AFTER and set the BB of insn. If
4336 BB is NULL, an attempt is made to infer the BB from AFTER. */
4339 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4341 return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4345 /* Make an insn of code JUMP_INSN with body X
4346 and output it after the insn AFTER. */
4349 emit_jump_insn_after_noloc (rtx x, rtx after)
4351 return emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw);
4354 /* Make an instruction with body X and code CALL_INSN
4355 and output it after the instruction AFTER. */
4358 emit_call_insn_after_noloc (rtx x, rtx after)
4360 return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4363 /* Make an instruction with body X and code CALL_INSN
4364 and output it after the instruction AFTER. */
4367 emit_debug_insn_after_noloc (rtx x, rtx after)
4369 return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4372 /* Make an insn of code BARRIER
4373 and output it after the insn AFTER. */
4376 emit_barrier_after (rtx after)
4378 rtx insn = rtx_alloc (BARRIER);
4380 INSN_UID (insn) = cur_insn_uid++;
4382 add_insn_after (insn, after, NULL);
4386 /* Emit the label LABEL after the insn AFTER. */
4389 emit_label_after (rtx label, rtx after)
4391 /* This can be called twice for the same label
4392 as a result of the confusion that follows a syntax error!
4393 So make it harmless. */
4394 if (INSN_UID (label) == 0)
4396 INSN_UID (label) = cur_insn_uid++;
4397 add_insn_after (label, after, NULL);
4403 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4406 emit_note_after (enum insn_note subtype, rtx after)
4408 rtx note = rtx_alloc (NOTE);
4409 INSN_UID (note) = cur_insn_uid++;
4410 NOTE_KIND (note) = subtype;
4411 BLOCK_FOR_INSN (note) = NULL;
4412 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4413 add_insn_after (note, after, NULL);
4417 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4418 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4421 emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
4422 rtx (*make_raw) (rtx))
4424 rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4426 if (pattern == NULL_RTX || !loc)
4429 after = NEXT_INSN (after);
4432 if (active_insn_p (after) && !INSN_LOCATOR (after))
4433 INSN_LOCATOR (after) = loc;
4436 after = NEXT_INSN (after);
4441 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4442 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4446 emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
4447 rtx (*make_raw) (rtx))
4451 if (skip_debug_insns)
4452 while (DEBUG_INSN_P (prev))
4453 prev = PREV_INSN (prev);
4456 return emit_pattern_after_setloc (pattern, after, INSN_LOCATOR (prev),
4459 return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4462 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4464 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4466 return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
4469 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4471 emit_insn_after (rtx pattern, rtx after)
4473 return emit_pattern_after (pattern, after, true, make_insn_raw);
4476 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4478 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4480 return emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw);
4483 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4485 emit_jump_insn_after (rtx pattern, rtx after)
4487 return emit_pattern_after (pattern, after, true, make_jump_insn_raw);
4490 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4492 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4494 return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
4497 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4499 emit_call_insn_after (rtx pattern, rtx after)
4501 return emit_pattern_after (pattern, after, true, make_call_insn_raw);
4504 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4506 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4508 return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
4511 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4513 emit_debug_insn_after (rtx pattern, rtx after)
4515 return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
4518 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4519 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4520 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4524 emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
4525 rtx (*make_raw) (rtx))
4527 rtx first = PREV_INSN (before);
4528 rtx last = emit_pattern_before_noloc (pattern, before,
4529 insnp ? before : NULL_RTX,
4532 if (pattern == NULL_RTX || !loc)
4536 first = get_insns ();
4538 first = NEXT_INSN (first);
4541 if (active_insn_p (first) && !INSN_LOCATOR (first))
4542 INSN_LOCATOR (first) = loc;
4545 first = NEXT_INSN (first);
4550 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4551 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4552 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4553 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4556 emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
4557 bool insnp, rtx (*make_raw) (rtx))
4561 if (skip_debug_insns)
4562 while (DEBUG_INSN_P (next))
4563 next = PREV_INSN (next);
4566 return emit_pattern_before_setloc (pattern, before, INSN_LOCATOR (next),
4569 return emit_pattern_before_noloc (pattern, before,
4570 insnp ? before : NULL_RTX,
4574 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4576 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4578 return emit_pattern_before_setloc (pattern, before, loc, true,
4582 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4584 emit_insn_before (rtx pattern, rtx before)
4586 return emit_pattern_before (pattern, before, true, true, make_insn_raw);
4589 /* like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4591 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4593 return emit_pattern_before_setloc (pattern, before, loc, false,
4594 make_jump_insn_raw);
4597 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4599 emit_jump_insn_before (rtx pattern, rtx before)
4601 return emit_pattern_before (pattern, before, true, false,
4602 make_jump_insn_raw);
4605 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4607 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4609 return emit_pattern_before_setloc (pattern, before, loc, false,
4610 make_call_insn_raw);
4613 /* Like emit_call_insn_before_noloc,
4614 but set insn_locator according to BEFORE. */
4616 emit_call_insn_before (rtx pattern, rtx before)
4618 return emit_pattern_before (pattern, before, true, false,
4619 make_call_insn_raw);
4622 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4624 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4626 return emit_pattern_before_setloc (pattern, before, loc, false,
4627 make_debug_insn_raw);
4630 /* Like emit_debug_insn_before_noloc,
4631 but set insn_locator according to BEFORE. */
4633 emit_debug_insn_before (rtx pattern, rtx before)
4635 return emit_pattern_before (pattern, before, false, false,
4636 make_debug_insn_raw);
4639 /* Take X and emit it at the end of the doubly-linked
4642 Returns the last insn emitted. */
4647 rtx last = get_last_insn();
4653 switch (GET_CODE (x))
4665 rtx next = NEXT_INSN (insn);
4672 #ifdef ENABLE_RTL_CHECKING
4679 last = make_insn_raw (x);
4687 /* Make an insn of code DEBUG_INSN with pattern X
4688 and add it to the end of the doubly-linked list. */
4691 emit_debug_insn (rtx x)
4693 rtx last = get_last_insn();
4699 switch (GET_CODE (x))
4711 rtx next = NEXT_INSN (insn);
4718 #ifdef ENABLE_RTL_CHECKING
4725 last = make_debug_insn_raw (x);
4733 /* Make an insn of code JUMP_INSN with pattern X
4734 and add it to the end of the doubly-linked list. */
4737 emit_jump_insn (rtx x)
4739 rtx last = NULL_RTX, insn;
4741 switch (GET_CODE (x))
4753 rtx next = NEXT_INSN (insn);
4760 #ifdef ENABLE_RTL_CHECKING
4767 last = make_jump_insn_raw (x);
4775 /* Make an insn of code CALL_INSN with pattern X
4776 and add it to the end of the doubly-linked list. */
4779 emit_call_insn (rtx x)
4783 switch (GET_CODE (x))
4792 insn = emit_insn (x);
4795 #ifdef ENABLE_RTL_CHECKING
4802 insn = make_call_insn_raw (x);
4810 /* Add the label LABEL to the end of the doubly-linked list. */
4813 emit_label (rtx label)
4815 /* This can be called twice for the same label
4816 as a result of the confusion that follows a syntax error!
4817 So make it harmless. */
4818 if (INSN_UID (label) == 0)
4820 INSN_UID (label) = cur_insn_uid++;
4826 /* Make an insn of code BARRIER
4827 and add it to the end of the doubly-linked list. */
4832 rtx barrier = rtx_alloc (BARRIER);
4833 INSN_UID (barrier) = cur_insn_uid++;
4838 /* Emit a copy of note ORIG. */
4841 emit_note_copy (rtx orig)
4845 note = rtx_alloc (NOTE);
4847 INSN_UID (note) = cur_insn_uid++;
4848 NOTE_DATA (note) = NOTE_DATA (orig);
4849 NOTE_KIND (note) = NOTE_KIND (orig);
4850 BLOCK_FOR_INSN (note) = NULL;
4856 /* Make an insn of code NOTE or type NOTE_NO
4857 and add it to the end of the doubly-linked list. */
4860 emit_note (enum insn_note kind)
4864 note = rtx_alloc (NOTE);
4865 INSN_UID (note) = cur_insn_uid++;
4866 NOTE_KIND (note) = kind;
4867 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4868 BLOCK_FOR_INSN (note) = NULL;
4873 /* Emit a clobber of lvalue X. */
4876 emit_clobber (rtx x)
4878 /* CONCATs should not appear in the insn stream. */
4879 if (GET_CODE (x) == CONCAT)
4881 emit_clobber (XEXP (x, 0));
4882 return emit_clobber (XEXP (x, 1));
4884 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4887 /* Return a sequence of insns to clobber lvalue X. */
4901 /* Emit a use of rvalue X. */
4906 /* CONCATs should not appear in the insn stream. */
4907 if (GET_CODE (x) == CONCAT)
4909 emit_use (XEXP (x, 0));
4910 return emit_use (XEXP (x, 1));
4912 return emit_insn (gen_rtx_USE (VOIDmode, x));
4915 /* Return a sequence of insns to use rvalue X. */
4929 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4930 note of this type already exists, remove it first. */
4933 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4935 rtx note = find_reg_note (insn, kind, NULL_RTX);
4941 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4942 has multiple sets (some callers assume single_set
4943 means the insn only has one set, when in fact it
4944 means the insn only has one * useful * set). */
4945 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4951 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4952 It serves no useful purpose and breaks eliminate_regs. */
4953 if (GET_CODE (datum) == ASM_OPERANDS)
4958 XEXP (note, 0) = datum;
4959 df_notes_rescan (insn);
4967 XEXP (note, 0) = datum;
4973 add_reg_note (insn, kind, datum);
4979 df_notes_rescan (insn);
4985 return REG_NOTES (insn);
4988 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
4990 set_dst_reg_note (rtx insn, enum reg_note kind, rtx datum, rtx dst)
4992 rtx set = single_set (insn);
4994 if (set && SET_DEST (set) == dst)
4995 return set_unique_reg_note (insn, kind, datum);
4999 /* Return an indication of which type of insn should have X as a body.
5000 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5002 static enum rtx_code
5003 classify_insn (rtx x)
5007 if (GET_CODE (x) == CALL)
5009 if (ANY_RETURN_P (x))
5011 if (GET_CODE (x) == SET)
5013 if (SET_DEST (x) == pc_rtx)
5015 else if (GET_CODE (SET_SRC (x)) == CALL)
5020 if (GET_CODE (x) == PARALLEL)
5023 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5024 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5026 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5027 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5029 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5030 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5036 /* Emit the rtl pattern X as an appropriate kind of insn.
5037 If X is a label, it is simply added into the insn chain. */
5042 enum rtx_code code = classify_insn (x);
5047 return emit_label (x);
5049 return emit_insn (x);
5052 rtx insn = emit_jump_insn (x);
5053 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5054 return emit_barrier ();
5058 return emit_call_insn (x);
5060 return emit_debug_insn (x);
5066 /* Space for free sequence stack entries. */
5067 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5069 /* Begin emitting insns to a sequence. If this sequence will contain
5070 something that might cause the compiler to pop arguments to function
5071 calls (because those pops have previously been deferred; see
5072 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5073 before calling this function. That will ensure that the deferred
5074 pops are not accidentally emitted in the middle of this sequence. */
5077 start_sequence (void)
5079 struct sequence_stack *tem;
5081 if (free_sequence_stack != NULL)
5083 tem = free_sequence_stack;
5084 free_sequence_stack = tem->next;
5087 tem = ggc_alloc_sequence_stack ();
5089 tem->next = seq_stack;
5090 tem->first = get_insns ();
5091 tem->last = get_last_insn ();
5099 /* Set up the insn chain starting with FIRST as the current sequence,
5100 saving the previously current one. See the documentation for
5101 start_sequence for more information about how to use this function. */
5104 push_to_sequence (rtx first)
5110 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5113 set_first_insn (first);
5114 set_last_insn (last);
5117 /* Like push_to_sequence, but take the last insn as an argument to avoid
5118 looping through the list. */
5121 push_to_sequence2 (rtx first, rtx last)
5125 set_first_insn (first);
5126 set_last_insn (last);
5129 /* Set up the outer-level insn chain
5130 as the current sequence, saving the previously current one. */
5133 push_topmost_sequence (void)
5135 struct sequence_stack *stack, *top = NULL;
5139 for (stack = seq_stack; stack; stack = stack->next)
5142 set_first_insn (top->first);
5143 set_last_insn (top->last);
5146 /* After emitting to the outer-level insn chain, update the outer-level
5147 insn chain, and restore the previous saved state. */
5150 pop_topmost_sequence (void)
5152 struct sequence_stack *stack, *top = NULL;
5154 for (stack = seq_stack; stack; stack = stack->next)
5157 top->first = get_insns ();
5158 top->last = get_last_insn ();
5163 /* After emitting to a sequence, restore previous saved state.
5165 To get the contents of the sequence just made, you must call
5166 `get_insns' *before* calling here.
5168 If the compiler might have deferred popping arguments while
5169 generating this sequence, and this sequence will not be immediately
5170 inserted into the instruction stream, use do_pending_stack_adjust
5171 before calling get_insns. That will ensure that the deferred
5172 pops are inserted into this sequence, and not into some random
5173 location in the instruction stream. See INHIBIT_DEFER_POP for more
5174 information about deferred popping of arguments. */
5179 struct sequence_stack *tem = seq_stack;
5181 set_first_insn (tem->first);
5182 set_last_insn (tem->last);
5183 seq_stack = tem->next;
5185 memset (tem, 0, sizeof (*tem));
5186 tem->next = free_sequence_stack;
5187 free_sequence_stack = tem;
5190 /* Return 1 if currently emitting into a sequence. */
5193 in_sequence_p (void)
5195 return seq_stack != 0;
5198 /* Put the various virtual registers into REGNO_REG_RTX. */
5201 init_virtual_regs (void)
5203 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5204 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5205 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5206 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5207 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5208 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5209 = virtual_preferred_stack_boundary_rtx;
5213 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5214 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5215 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5216 static int copy_insn_n_scratches;
5218 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5219 copied an ASM_OPERANDS.
5220 In that case, it is the original input-operand vector. */
5221 static rtvec orig_asm_operands_vector;
5223 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5224 copied an ASM_OPERANDS.
5225 In that case, it is the copied input-operand vector. */
5226 static rtvec copy_asm_operands_vector;
5228 /* Likewise for the constraints vector. */
5229 static rtvec orig_asm_constraints_vector;
5230 static rtvec copy_asm_constraints_vector;
5232 /* Recursively create a new copy of an rtx for copy_insn.
5233 This function differs from copy_rtx in that it handles SCRATCHes and
5234 ASM_OPERANDs properly.
5235 Normally, this function is not used directly; use copy_insn as front end.
5236 However, you could first copy an insn pattern with copy_insn and then use
5237 this function afterwards to properly copy any REG_NOTEs containing
5241 copy_insn_1 (rtx orig)
5246 const char *format_ptr;
5251 code = GET_CODE (orig);
5269 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5274 for (i = 0; i < copy_insn_n_scratches; i++)
5275 if (copy_insn_scratch_in[i] == orig)
5276 return copy_insn_scratch_out[i];
5280 if (shared_const_p (orig))
5284 /* A MEM with a constant address is not sharable. The problem is that
5285 the constant address may need to be reloaded. If the mem is shared,
5286 then reloading one copy of this mem will cause all copies to appear
5287 to have been reloaded. */
5293 /* Copy the various flags, fields, and other information. We assume
5294 that all fields need copying, and then clear the fields that should
5295 not be copied. That is the sensible default behavior, and forces
5296 us to explicitly document why we are *not* copying a flag. */
5297 copy = shallow_copy_rtx (orig);
5299 /* We do not copy the USED flag, which is used as a mark bit during
5300 walks over the RTL. */
5301 RTX_FLAG (copy, used) = 0;
5303 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5306 RTX_FLAG (copy, jump) = 0;
5307 RTX_FLAG (copy, call) = 0;
5308 RTX_FLAG (copy, frame_related) = 0;
5311 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5313 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5314 switch (*format_ptr++)
5317 if (XEXP (orig, i) != NULL)
5318 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5323 if (XVEC (orig, i) == orig_asm_constraints_vector)
5324 XVEC (copy, i) = copy_asm_constraints_vector;
5325 else if (XVEC (orig, i) == orig_asm_operands_vector)
5326 XVEC (copy, i) = copy_asm_operands_vector;
5327 else if (XVEC (orig, i) != NULL)
5329 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5330 for (j = 0; j < XVECLEN (copy, i); j++)
5331 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5342 /* These are left unchanged. */
5349 if (code == SCRATCH)
5351 i = copy_insn_n_scratches++;
5352 gcc_assert (i < MAX_RECOG_OPERANDS);
5353 copy_insn_scratch_in[i] = orig;
5354 copy_insn_scratch_out[i] = copy;
5356 else if (code == ASM_OPERANDS)
5358 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5359 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5360 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5361 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5367 /* Create a new copy of an rtx.
5368 This function differs from copy_rtx in that it handles SCRATCHes and
5369 ASM_OPERANDs properly.
5370 INSN doesn't really have to be a full INSN; it could be just the
5373 copy_insn (rtx insn)
5375 copy_insn_n_scratches = 0;
5376 orig_asm_operands_vector = 0;
5377 orig_asm_constraints_vector = 0;
5378 copy_asm_operands_vector = 0;
5379 copy_asm_constraints_vector = 0;
5380 return copy_insn_1 (insn);
5383 /* Initialize data structures and variables in this file
5384 before generating rtl for each function. */
5389 set_first_insn (NULL);
5390 set_last_insn (NULL);
5391 if (MIN_NONDEBUG_INSN_UID)
5392 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5395 cur_debug_insn_uid = 1;
5396 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5397 first_label_num = label_num;
5400 /* Init the tables that describe all the pseudo regs. */
5402 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5404 crtl->emit.regno_pointer_align
5405 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5407 regno_reg_rtx = ggc_alloc_vec_rtx (crtl->emit.regno_pointer_align_length);
5409 /* Put copies of all the hard registers into regno_reg_rtx. */
5410 memcpy (regno_reg_rtx,
5411 initial_regno_reg_rtx,
5412 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5414 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5415 init_virtual_regs ();
5417 /* Indicate that the virtual registers and stack locations are
5419 REG_POINTER (stack_pointer_rtx) = 1;
5420 REG_POINTER (frame_pointer_rtx) = 1;
5421 REG_POINTER (hard_frame_pointer_rtx) = 1;
5422 REG_POINTER (arg_pointer_rtx) = 1;
5424 REG_POINTER (virtual_incoming_args_rtx) = 1;
5425 REG_POINTER (virtual_stack_vars_rtx) = 1;
5426 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5427 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5428 REG_POINTER (virtual_cfa_rtx) = 1;
5430 #ifdef STACK_BOUNDARY
5431 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5432 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5433 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5434 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5436 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5437 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5438 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5439 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5440 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5443 #ifdef INIT_EXPANDERS
5448 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5451 gen_const_vector (enum machine_mode mode, int constant)
5456 enum machine_mode inner;
5458 units = GET_MODE_NUNITS (mode);
5459 inner = GET_MODE_INNER (mode);
5461 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5463 v = rtvec_alloc (units);
5465 /* We need to call this function after we set the scalar const_tiny_rtx
5467 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5469 for (i = 0; i < units; ++i)
5470 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5472 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5476 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5477 all elements are zero, and the one vector when all elements are one. */
5479 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5481 enum machine_mode inner = GET_MODE_INNER (mode);
5482 int nunits = GET_MODE_NUNITS (mode);
5486 /* Check to see if all of the elements have the same value. */
5487 x = RTVEC_ELT (v, nunits - 1);
5488 for (i = nunits - 2; i >= 0; i--)
5489 if (RTVEC_ELT (v, i) != x)
5492 /* If the values are all the same, check to see if we can use one of the
5493 standard constant vectors. */
5496 if (x == CONST0_RTX (inner))
5497 return CONST0_RTX (mode);
5498 else if (x == CONST1_RTX (inner))
5499 return CONST1_RTX (mode);
5500 else if (x == CONSTM1_RTX (inner))
5501 return CONSTM1_RTX (mode);
5504 return gen_rtx_raw_CONST_VECTOR (mode, v);
5507 /* Initialise global register information required by all functions. */
5510 init_emit_regs (void)
5513 enum machine_mode mode;
5516 /* Reset register attributes */
5517 htab_empty (reg_attrs_htab);
5519 /* We need reg_raw_mode, so initialize the modes now. */
5520 init_reg_modes_target ();
5522 /* Assign register numbers to the globally defined register rtx. */
5523 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5524 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5525 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5526 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5527 virtual_incoming_args_rtx =
5528 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5529 virtual_stack_vars_rtx =
5530 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5531 virtual_stack_dynamic_rtx =
5532 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5533 virtual_outgoing_args_rtx =
5534 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5535 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5536 virtual_preferred_stack_boundary_rtx =
5537 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5539 /* Initialize RTL for commonly used hard registers. These are
5540 copied into regno_reg_rtx as we begin to compile each function. */
5541 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5542 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5544 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5545 return_address_pointer_rtx
5546 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5549 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5550 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5552 pic_offset_table_rtx = NULL_RTX;
5554 for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
5556 mode = (enum machine_mode) i;
5557 attrs = ggc_alloc_cleared_mem_attrs ();
5558 attrs->align = BITS_PER_UNIT;
5559 attrs->addrspace = ADDR_SPACE_GENERIC;
5560 if (mode != BLKmode)
5562 attrs->size_known_p = true;
5563 attrs->size = GET_MODE_SIZE (mode);
5564 if (STRICT_ALIGNMENT)
5565 attrs->align = GET_MODE_ALIGNMENT (mode);
5567 mode_mem_attrs[i] = attrs;
5571 /* Create some permanent unique rtl objects shared between all functions. */
5574 init_emit_once (void)
5577 enum machine_mode mode;
5578 enum machine_mode double_mode;
5580 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5582 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5583 const_int_htab_eq, NULL);
5585 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5586 const_double_htab_eq, NULL);
5588 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5589 const_fixed_htab_eq, NULL);
5591 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5592 mem_attrs_htab_eq, NULL);
5593 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5594 reg_attrs_htab_eq, NULL);
5596 /* Compute the word and byte modes. */
5598 byte_mode = VOIDmode;
5599 word_mode = VOIDmode;
5600 double_mode = VOIDmode;
5602 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5604 mode = GET_MODE_WIDER_MODE (mode))
5606 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5607 && byte_mode == VOIDmode)
5610 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5611 && word_mode == VOIDmode)
5615 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5617 mode = GET_MODE_WIDER_MODE (mode))
5619 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5620 && double_mode == VOIDmode)
5624 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5626 #ifdef INIT_EXPANDERS
5627 /* This is to initialize {init|mark|free}_machine_status before the first
5628 call to push_function_context_to. This is needed by the Chill front
5629 end which calls push_function_context_to before the first call to
5630 init_function_start. */
5634 /* Create the unique rtx's for certain rtx codes and operand values. */
5636 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5637 tries to use these variables. */
5638 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5639 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5640 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5642 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5643 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5644 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5646 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5648 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5649 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5650 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5655 dconsthalf = dconst1;
5656 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5658 for (i = 0; i < 3; i++)
5660 const REAL_VALUE_TYPE *const r =
5661 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5663 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5665 mode = GET_MODE_WIDER_MODE (mode))
5666 const_tiny_rtx[i][(int) mode] =
5667 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5669 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5671 mode = GET_MODE_WIDER_MODE (mode))
5672 const_tiny_rtx[i][(int) mode] =
5673 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5675 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5677 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5679 mode = GET_MODE_WIDER_MODE (mode))
5680 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5682 for (mode = MIN_MODE_PARTIAL_INT;
5683 mode <= MAX_MODE_PARTIAL_INT;
5684 mode = (enum machine_mode)((int)(mode) + 1))
5685 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5688 const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
5690 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5692 mode = GET_MODE_WIDER_MODE (mode))
5693 const_tiny_rtx[3][(int) mode] = constm1_rtx;
5695 for (mode = MIN_MODE_PARTIAL_INT;
5696 mode <= MAX_MODE_PARTIAL_INT;
5697 mode = (enum machine_mode)((int)(mode) + 1))
5698 const_tiny_rtx[3][(int) mode] = constm1_rtx;
5700 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5702 mode = GET_MODE_WIDER_MODE (mode))
5704 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5705 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5708 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5710 mode = GET_MODE_WIDER_MODE (mode))
5712 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5713 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5716 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5718 mode = GET_MODE_WIDER_MODE (mode))
5720 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5721 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5722 const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
5725 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5727 mode = GET_MODE_WIDER_MODE (mode))
5729 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5730 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5733 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5735 mode = GET_MODE_WIDER_MODE (mode))
5737 FCONST0(mode).data.high = 0;
5738 FCONST0(mode).data.low = 0;
5739 FCONST0(mode).mode = mode;
5740 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5741 FCONST0 (mode), mode);
5744 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5746 mode = GET_MODE_WIDER_MODE (mode))
5748 FCONST0(mode).data.high = 0;
5749 FCONST0(mode).data.low = 0;
5750 FCONST0(mode).mode = mode;
5751 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5752 FCONST0 (mode), mode);
5755 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5757 mode = GET_MODE_WIDER_MODE (mode))
5759 FCONST0(mode).data.high = 0;
5760 FCONST0(mode).data.low = 0;
5761 FCONST0(mode).mode = mode;
5762 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5763 FCONST0 (mode), mode);
5765 /* We store the value 1. */
5766 FCONST1(mode).data.high = 0;
5767 FCONST1(mode).data.low = 0;
5768 FCONST1(mode).mode = mode;
5769 lshift_double (1, 0, GET_MODE_FBIT (mode),
5770 HOST_BITS_PER_DOUBLE_INT,
5771 &FCONST1(mode).data.low,
5772 &FCONST1(mode).data.high,
5773 SIGNED_FIXED_POINT_MODE_P (mode));
5774 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5775 FCONST1 (mode), mode);
5778 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5780 mode = GET_MODE_WIDER_MODE (mode))
5782 FCONST0(mode).data.high = 0;
5783 FCONST0(mode).data.low = 0;
5784 FCONST0(mode).mode = mode;
5785 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5786 FCONST0 (mode), mode);
5788 /* We store the value 1. */
5789 FCONST1(mode).data.high = 0;
5790 FCONST1(mode).data.low = 0;
5791 FCONST1(mode).mode = mode;
5792 lshift_double (1, 0, GET_MODE_FBIT (mode),
5793 HOST_BITS_PER_DOUBLE_INT,
5794 &FCONST1(mode).data.low,
5795 &FCONST1(mode).data.high,
5796 SIGNED_FIXED_POINT_MODE_P (mode));
5797 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5798 FCONST1 (mode), mode);
5801 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5803 mode = GET_MODE_WIDER_MODE (mode))
5805 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5808 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5810 mode = GET_MODE_WIDER_MODE (mode))
5812 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5815 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5817 mode = GET_MODE_WIDER_MODE (mode))
5819 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5820 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5823 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5825 mode = GET_MODE_WIDER_MODE (mode))
5827 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5828 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5831 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5832 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5833 const_tiny_rtx[0][i] = const0_rtx;
5835 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5836 if (STORE_FLAG_VALUE == 1)
5837 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5839 pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
5840 ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
5841 simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
5842 cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
5845 /* Produce exact duplicate of insn INSN after AFTER.
5846 Care updating of libcall regions if present. */
5849 emit_copy_of_insn_after (rtx insn, rtx after)
5853 switch (GET_CODE (insn))
5856 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5860 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5864 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5868 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5869 if (CALL_INSN_FUNCTION_USAGE (insn))
5870 CALL_INSN_FUNCTION_USAGE (new_rtx)
5871 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5872 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5873 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5874 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5875 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5876 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5883 /* Update LABEL_NUSES. */
5884 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5886 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5888 /* If the old insn is frame related, then so is the new one. This is
5889 primarily needed for IA-64 unwind info which marks epilogue insns,
5890 which may be duplicated by the basic block reordering code. */
5891 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5893 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5894 will make them. REG_LABEL_TARGETs are created there too, but are
5895 supposed to be sticky, so we copy them. */
5896 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5897 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5899 if (GET_CODE (link) == EXPR_LIST)
5900 add_reg_note (new_rtx, REG_NOTE_KIND (link),
5901 copy_insn_1 (XEXP (link, 0)));
5903 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
5906 INSN_CODE (new_rtx) = INSN_CODE (insn);
5910 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5912 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5914 if (hard_reg_clobbers[mode][regno])
5915 return hard_reg_clobbers[mode][regno];
5917 return (hard_reg_clobbers[mode][regno] =
5918 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5921 /* Data structures representing mapping of INSN_LOCATOR into scope blocks, line
5922 numbers and files. In order to be GGC friendly we need to use separate
5923 varrays. This also slightly improve the memory locality in binary search.
5924 The _locs array contains locators where the given property change. The
5925 block_locators_blocks contains the scope block that is used for all insn
5926 locator greater than corresponding block_locators_locs value and smaller
5927 than the following one. Similarly for the other properties. */
5928 static VEC(int,heap) *block_locators_locs;
5929 static GTY(()) VEC(tree,gc) *block_locators_blocks;
5930 static VEC(int,heap) *locations_locators_locs;
5931 DEF_VEC_O(location_t);
5932 DEF_VEC_ALLOC_O(location_t,heap);
5933 static VEC(location_t,heap) *locations_locators_vals;
5934 int prologue_locator;
5935 int epilogue_locator;
5937 /* Hold current location information and last location information, so the
5938 datastructures are built lazily only when some instructions in given
5939 place are needed. */
5940 static location_t curr_location, last_location;
5941 static tree curr_block, last_block;
5942 static int curr_rtl_loc = -1;
5944 /* Allocate insn locator datastructure. */
5946 insn_locators_alloc (void)
5948 prologue_locator = epilogue_locator = 0;
5950 block_locators_locs = VEC_alloc (int, heap, 32);
5951 block_locators_blocks = VEC_alloc (tree, gc, 32);
5952 locations_locators_locs = VEC_alloc (int, heap, 32);
5953 locations_locators_vals = VEC_alloc (location_t, heap, 32);
5955 curr_location = UNKNOWN_LOCATION;
5956 last_location = UNKNOWN_LOCATION;
5962 /* At the end of emit stage, clear current location. */
5964 insn_locators_finalize (void)
5966 if (curr_rtl_loc >= 0)
5967 epilogue_locator = curr_insn_locator ();
5971 /* Allocate insn locator datastructure. */
5973 insn_locators_free (void)
5975 prologue_locator = epilogue_locator = 0;
5977 VEC_free (int, heap, block_locators_locs);
5978 VEC_free (tree,gc, block_locators_blocks);
5979 VEC_free (int, heap, locations_locators_locs);
5980 VEC_free (location_t, heap, locations_locators_vals);
5983 /* Set current location. */
5985 set_curr_insn_source_location (location_t location)
5987 /* IV opts calls into RTL expansion to compute costs of operations. At this
5988 time locators are not initialized. */
5989 if (curr_rtl_loc == -1)
5991 curr_location = location;
5994 /* Get current location. */
5996 get_curr_insn_source_location (void)
5998 return curr_location;
6001 /* Set current scope block. */
6003 set_curr_insn_block (tree b)
6005 /* IV opts calls into RTL expansion to compute costs of operations. At this
6006 time locators are not initialized. */
6007 if (curr_rtl_loc == -1)
6013 /* Get current scope block. */
6015 get_curr_insn_block (void)
6020 /* Return current insn locator. */
6022 curr_insn_locator (void)
6024 if (curr_rtl_loc == -1 || curr_location == UNKNOWN_LOCATION)
6026 if (last_block != curr_block)
6029 VEC_safe_push (int, heap, block_locators_locs, curr_rtl_loc);
6030 VEC_safe_push (tree, gc, block_locators_blocks, curr_block);
6031 last_block = curr_block;
6033 if (last_location != curr_location)
6036 VEC_safe_push (int, heap, locations_locators_locs, curr_rtl_loc);
6037 VEC_safe_push (location_t, heap, locations_locators_vals, &curr_location);
6038 last_location = curr_location;
6040 return curr_rtl_loc;
6044 /* Return lexical scope block locator belongs to. */
6046 locator_scope (int loc)
6048 int max = VEC_length (int, block_locators_locs);
6051 /* When block_locators_locs was initialized, the pro- and epilogue
6052 insns didn't exist yet and can therefore not be found this way.
6053 But we know that they belong to the outer most block of the
6055 Without this test, the prologue would be put inside the block of
6056 the first valid instruction in the function and when that first
6057 insn is part of an inlined function then the low_pc of that
6058 inlined function is messed up. Likewise for the epilogue and
6059 the last valid instruction. */
6060 if (loc == prologue_locator || loc == epilogue_locator)
6061 return DECL_INITIAL (cfun->decl);
6067 int pos = (min + max) / 2;
6068 int tmp = VEC_index (int, block_locators_locs, pos);
6070 if (tmp <= loc && min != pos)
6072 else if (tmp > loc && max != pos)
6080 return VEC_index (tree, block_locators_blocks, min);
6083 /* Return lexical scope block insn belongs to. */
6085 insn_scope (const_rtx insn)
6087 return locator_scope (INSN_LOCATOR (insn));
6090 /* Return line number of the statement specified by the locator. */
6092 locator_location (int loc)
6094 int max = VEC_length (int, locations_locators_locs);
6099 int pos = (min + max) / 2;
6100 int tmp = VEC_index (int, locations_locators_locs, pos);
6102 if (tmp <= loc && min != pos)
6104 else if (tmp > loc && max != pos)
6112 return *VEC_index (location_t, locations_locators_vals, min);
6115 /* Return source line of the statement that produced this insn. */
6117 locator_line (int loc)
6119 expanded_location xloc;
6123 xloc = expand_location (locator_location (loc));
6127 /* Return line number of the statement that produced this insn. */
6129 insn_line (const_rtx insn)
6131 return locator_line (INSN_LOCATOR (insn));
6134 /* Return source file of the statement specified by LOC. */
6136 locator_file (int loc)
6138 expanded_location xloc;
6142 xloc = expand_location (locator_location (loc));
6146 /* Return source file of the statement that produced this insn. */
6148 insn_file (const_rtx insn)
6150 return locator_file (INSN_LOCATOR (insn));
6153 /* Return true if LOC1 and LOC2 locators have the same location and scope. */
6155 locator_eq (int loc1, int loc2)
6159 if (locator_location (loc1) != locator_location (loc2))
6161 return locator_scope (loc1) == locator_scope (loc2);
6164 #include "gt-emit-rtl.h"